diff --git a/distributions/LibreELEC/kernel_options b/distributions/LibreELEC/kernel_options index 44c4c8af03..5b49a4532f 100644 --- a/distributions/LibreELEC/kernel_options +++ b/distributions/LibreELEC/kernel_options @@ -16,6 +16,7 @@ CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_RAW=m CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_NF_REJECT_IPV6=m CONFIG_IP6_NF_IPTABLES=m @@ -23,6 +24,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_MANGLE=m CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_TARGET_LOG=m @@ -173,3 +175,7 @@ CONFIG_MD=y CONFIG_BLK_DEV_DM=m CONFIG_DM_THIN_PROVISIONING=m CONFIG_OVERLAY_FS=m +# new options since 28.0.0 +CONFIG_IP_SET=m +CONFIG_IP_SET_HASH_NET=m +CONFIG_NETFILTER_XT_SET=m diff --git a/packages/linux/package.mk b/packages/linux/package.mk index 59dea5a9ce..2ef55d5980 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}" case "${LINUX}" in amlogic) - PKG_VERSION="e8f897f4afef0031fe618a8e94127a0934896aba" # 6.8.0 - PKG_SHA256="52608771cc42196f0a7a71a93270a27ca5f7ba1d9280fb398e521b0620a7a3ac" + PKG_VERSION="86731a2a651e58953fc949573895f2fa6d456841" # 6.16-rc3 + PKG_SHA256="008b00968a8bfc0627580b82a2d30c7304336a4f92a58e80cdbc2d4723e01840" PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz" PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz" PKG_PATCH_DIRS="default" @@ -30,8 +30,8 @@ case "${LINUX}" in PKG_PATCH_DIRS="raspberrypi rtlwifi/6.13 rtlwifi/6.14 rtlwifi/6.15" ;; *) - PKG_VERSION="6.6.71" - PKG_SHA256="219715ba2dcfa6539fba09ad3f9212772f3507189eb60d77f8e89b06c32e724e" + PKG_VERSION="6.15.6" + PKG_SHA256="2bb586c954277d070c8fdf6d7275faa93b4807d9bf3353b491d8149cca02b4fc" PKG_URL="https://www.kernel.org/pub/linux/kernel/v${PKG_VERSION/.*/}.x/${PKG_NAME}-${PKG_VERSION}.tar.xz" PKG_PATCH_DIRS="default" ;; diff --git a/packages/linux/patches/default/linux-999-no-lzma-in-x86-perf-build.patch b/packages/linux/patches/default/linux-999-no-lzma-in-x86-perf-build.patch deleted file mode 100644 index 676d0d98ca..0000000000 --- a/packages/linux/patches/default/linux-999-no-lzma-in-x86-perf-build.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config -index 0294bfb6c5f8..153036bbed7e 100644 ---- a/tools/perf/Makefile.config -+++ b/tools/perf/Makefile.config -@@ -35,7 +35,7 @@ ifeq ($(SRCARCH),x86) - ifeq (${IS_64_BIT}, 1) - CFLAGS += -DHAVE_ARCH_X86_64_SUPPORT -DHAVE_SYSCALL_TABLE -I$(OUTPUT)arch/x86/include/generated - ARCH_INCLUDE = ../../arch/x86/lib/memcpy_64.S ../../arch/x86/lib/memset_64.S -- LIBUNWIND_LIBS = -lunwind-x86_64 -lunwind -llzma -+ LIBUNWIND_LIBS = -lunwind-x86_64 -lunwind - $(call detected,CONFIG_X86_64) - else - LIBUNWIND_LIBS = -lunwind-x86 -llzma -lunwind diff --git a/packages/linux/patches/default/linux-999.90-media-anysee-accept-read-buffers-of-length-1-in-anys.patch b/packages/linux/patches/default/linux-999.90-media-anysee-accept-read-buffers-of-length-1-in-anys.patch deleted file mode 100644 index 3115837283..0000000000 --- a/packages/linux/patches/default/linux-999.90-media-anysee-accept-read-buffers-of-length-1-in-anys.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 826beca0ce76876507372349da860a986078eacd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Istv=C3=A1n=20V=C3=A1radi?= -Date: Tue, 13 Feb 2024 21:20:32 +0100 -Subject: [PATCH] media: anysee: accept read buffers of length 1 in - anysee_master_xfer -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -anysee_master_xfer currently accepts read messages of length 2 only. -However, several frontends, e.g. tda10023 send buffers of length 1, -containing an 8-bit register number (see tda10023_readreg). -These buffers are rejected currently, making many Anysee variants -to not work. In these cases the "Unsupported Anysee version" -message is logged. - -This patch alters the function to accept buffers of a length of 1 too. - -Signed-off-by: István Váradi -Signed-off-by: Hans Verkuil -[hverkuil: add spaces around '<', fix typo in 'sevaral'] ---- - drivers/media/usb/dvb-usb-v2/anysee.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/usb/dvb-usb-v2/anysee.c b/drivers/media/usb/dvb-usb-v2/anysee.c -index a1235d0cce92..8699846eb416 100644 ---- a/drivers/media/usb/dvb-usb-v2/anysee.c -+++ b/drivers/media/usb/dvb-usb-v2/anysee.c -@@ -202,14 +202,14 @@ static int anysee_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, - - while (i < num) { - if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) { -- if (msg[i].len != 2 || msg[i + 1].len > 60) { -+ if (msg[i].len < 1 || msg[i].len > 2 || msg[i + 1].len > 60) { - ret = -EOPNOTSUPP; - break; - } - buf[0] = CMD_I2C_READ; - buf[1] = (msg[i].addr << 1) | 0x01; - buf[2] = msg[i].buf[0]; -- buf[3] = msg[i].buf[1]; -+ buf[3] = (msg[i].len < 2) ? 0 : msg[i].buf[1]; - buf[4] = msg[i].len-1; - buf[5] = msg[i+1].len; - ret = anysee_ctrl_msg(d, buf, 6, msg[i+1].buf, --- -2.34.1 - diff --git a/projects/Allwinner/linux/linux.aarch64.conf b/projects/Allwinner/linux/linux.aarch64.conf index 1f88d3c204..8117ed9bce 100644 --- a/projects/Allwinner/linux/linux.aarch64.conf +++ b/projects/Allwinner/linux/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.66 Kernel Configuration +# Linux/arm64 6.15.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -64,6 +68,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -106,6 +111,7 @@ CONFIG_PREEMPT_BUILD=y # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y +# CONFIG_PREEMPT_RT is not set CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y # CONFIG_PREEMPT_DYNAMIC is not set @@ -117,7 +123,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -137,6 +143,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -163,24 +170,29 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -221,17 +233,17 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_SYSFS_SYSCALL is not set CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SYSFS_SYSCALL is not set CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -243,17 +255,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -268,7 +280,8 @@ CONFIG_PROFILING=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y +CONFIG_CRASH_RESERVE=y +CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y # CONFIG_KEXEC_FILE is not set @@ -277,10 +290,10 @@ CONFIG_CRASH_DUMP=y # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -308,12 +321,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set CONFIG_ARCH_SUNXI=y # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -326,6 +341,7 @@ CONFIG_ARCH_SUNXI=y # CONFIG_ARCH_NXP is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -390,11 +406,13 @@ CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -404,6 +422,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -416,10 +435,10 @@ CONFIG_NR_CPUS=8 CONFIG_HOTPLUG_CPU=y # CONFIG_NUMA is not set # CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y # CONFIG_HZ_1000 is not set -CONFIG_HZ=250 +CONFIG_HZ=300 CONFIG_SCHED_HRTICK=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HW_PERF_EVENTS=y @@ -432,6 +451,8 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y +CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_TRANS_TABLE=y # CONFIG_XEN is not set CONFIG_ARCH_FORCE_MAX_ORDER=10 @@ -491,6 +512,7 @@ CONFIG_AS_HAS_ARMV8_5=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y # CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # @@ -498,12 +520,28 @@ CONFIG_ARM64_AS_HAS_MTE=y # # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +CONFIG_ARM64_POE=y +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +CONFIG_ARM64_GCS=y +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -511,6 +549,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y # CONFIG_CMDLINE="" # CONFIG_EFI is not set +# CONFIG_COMPRESSED_INSTALL is not set # end of Boot options # @@ -522,6 +561,8 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HIBERNATION_COMP_LZO=y +CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -589,19 +630,20 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y CONFIG_ARM_SCPI_CPUFREQ=y # end of CPU Frequency scaling # end of CPU Power Management -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options # +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -611,7 +653,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -629,6 +670,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -671,6 +713,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -678,13 +721,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -698,12 +745,17 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -716,10 +768,11 @@ CONFIG_HAVE_GCC_PLUGINS=y # CONFIG_GCC_PLUGINS is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -729,10 +782,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -744,10 +794,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set @@ -813,18 +862,19 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -832,7 +882,7 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y @@ -840,8 +890,9 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -856,13 +907,19 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y # CONFIG_HWPOISON_INJECT is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set CONFIG_CMA_DEBUGFS=y CONFIG_CMA_SYSFS=y CONFIG_CMA_AREAS=7 @@ -875,6 +932,8 @@ CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -887,9 +946,12 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y +CONFIG_ARCH_HAS_USER_SHADOW_STACK=y # # Data Access Monitoring @@ -904,6 +966,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -911,7 +974,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -924,6 +986,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -961,6 +1024,7 @@ CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -976,7 +1040,8 @@ CONFIG_IPV6_SIT=y CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1033,13 +1098,14 @@ CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1047,6 +1113,7 @@ CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1058,11 +1125,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1117,7 +1186,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1170,6 +1256,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1191,14 +1278,16 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_SECURITY is not set # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1220,7 +1309,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m # CONFIG_IP6_NF_SECURITY is not set CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m @@ -1229,8 +1318,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1368,6 +1457,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1386,6 +1476,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -1403,10 +1494,8 @@ CONFIG_BT_MTKUART=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1417,8 +1506,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1426,7 +1513,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1454,6 +1540,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set @@ -1485,6 +1572,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1502,7 +1590,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -CONFIG_BRCMSTB_GISB_ARB=y # CONFIG_MOXTET is not set CONFIG_SUN50I_DE2_BUS=y CONFIG_SUNXI_RSB=y @@ -1529,12 +1616,18 @@ CONFIG_VEXPRESS_CONFIG=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_ARM_FFA_TRANSPORT is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1545,6 +1638,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1552,7 +1646,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1663,6 +1756,7 @@ CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set @@ -1686,6 +1780,7 @@ CONFIG_BLK_DEV_NBD=y # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_RPMB is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_APDS9802ALS is not set @@ -1701,6 +1796,7 @@ CONFIG_SRAM=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_C2PORT is not set @@ -1709,7 +1805,6 @@ CONFIG_SRAM=y # # CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -1717,12 +1812,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -1847,6 +1936,7 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y CONFIG_MII=y @@ -1866,6 +1956,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1874,6 +1965,8 @@ CONFIG_TAP=m # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set CONFIG_ETHERNET=y CONFIG_NET_VENDOR_ALACRITECH=y CONFIG_NET_VENDOR_ALLWINNER=y @@ -1920,6 +2013,7 @@ CONFIG_MVMDIO=y CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set +# CONFIG_NET_VENDOR_META is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -1927,6 +2021,7 @@ CONFIG_NET_VENDOR_MICREL=y CONFIG_NET_VENDOR_MICROCHIP=y # CONFIG_ENC28J60 is not set # CONFIG_ENCX24J600 is not set +# CONFIG_LAN865X is not set # CONFIG_VCAP is not set CONFIG_NET_VENDOR_MICROSEMI=y # CONFIG_NET_VENDOR_MICROSOFT is not set @@ -1982,6 +2077,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set CONFIG_AC200_PHY=y # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set @@ -2017,9 +2113,14 @@ CONFIG_MOTORCOMM_PHY=y # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=m CONFIG_AT803X_PHY=m +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y CONFIG_SMSC_PHY=m @@ -2031,6 +2132,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2138,8 +2240,10 @@ CONFIG_ATH10K_CE=y CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y @@ -2152,10 +2256,8 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set # CONFIG_P54_COMMON is not set CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_LIBERTAS=m @@ -2191,6 +2293,7 @@ CONFIG_MT7663U=m CONFIG_MT7921_COMMON=m # CONFIG_MT7921S is not set CONFIG_MT7921U=m +# CONFIG_MT7925U is not set # CONFIG_WLAN_VENDOR_MICROCHIP is not set # CONFIG_WLAN_VENDOR_PURELIFI is not set CONFIG_WLAN_VENDOR_RALINK=y @@ -2216,6 +2319,11 @@ CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2224,29 +2332,38 @@ CONFIG_RTW88_SDIO=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m +CONFIG_RTW88_8703B=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m CONFIG_RTW88_8822BS=m CONFIG_RTW88_8822BU=m CONFIG_RTW88_8822CS=m CONFIG_RTW88_8822CU=m CONFIG_RTW88_8723DS=m +CONFIG_RTW88_8723CS=m CONFIG_RTW88_8723DU=m CONFIG_RTW88_8821CS=m CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set # CONFIG_WLAN_VENDOR_RSI is not set # CONFIG_WLAN_VENDOR_SILABS is not set # CONFIG_WLAN_VENDOR_ST is not set # CONFIG_WLAN_VENDOR_TI is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2277,7 +2394,6 @@ CONFIG_INPUT_VIVALDIFMAP=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2300,7 +2416,6 @@ CONFIG_KEYBOARD_GPIO_POLLED=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2347,6 +2462,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_ADS7846 is not set @@ -2363,7 +2479,6 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set @@ -2373,6 +2488,8 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -2386,7 +2503,6 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set @@ -2469,7 +2585,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F3A is not set +CONFIG_RMI4_F3A=y # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set @@ -2500,7 +2616,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -2579,6 +2694,7 @@ CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m CONFIG_DEVMEM=y CONFIG_DEVPORT=y CONFIG_TCG_TPM=y +# CONFIG_TCG_TPM2_HMAC is not set CONFIG_HW_RANDOM_TPM=y # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set @@ -2599,7 +2715,6 @@ CONFIG_TCG_TIS_I2C_INFINEON=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2683,6 +2798,7 @@ CONFIG_SPI_MEM=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_GPIO is not set # CONFIG_SPI_FSL_SPI is not set @@ -2725,10 +2841,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2742,6 +2855,7 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_PTP_1588_CLOCK_KVM=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support @@ -2753,6 +2867,7 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set @@ -2790,8 +2905,10 @@ CONFIG_PINCTRL_SUN50I_A64_R=y CONFIG_PINCTRL_SUN50I_H5=y CONFIG_PINCTRL_SUN50I_H6=y CONFIG_PINCTRL_SUN50I_H6_R=y -CONFIG_PINCTRL_SUN50I_H616=y -CONFIG_PINCTRL_SUN50I_H616_R=y +# CONFIG_PINCTRL_SUN50I_H616 is not set +# CONFIG_PINCTRL_SUN50I_H616_R is not set +# CONFIG_PINCTRL_SUN55I_A523 is not set +# CONFIG_PINCTRL_SUN55I_A523_R is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2817,6 +2934,7 @@ CONFIG_GPIO_GENERIC_PLATFORM=y # CONFIG_GPIO_LOGICVC is not set CONFIG_GPIO_MB86S7X=y CONFIG_GPIO_PL061=y +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set CONFIG_GPIO_XGENE=y @@ -2860,6 +2978,7 @@ CONFIG_GPIO_MAX77620=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2871,9 +2990,15 @@ CONFIG_GPIO_MAX77620=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -2886,6 +3011,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2907,6 +3033,7 @@ CONFIG_BATTERY_BQ27XXX_I2C=y CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -2934,6 +3061,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2959,9 +3087,11 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -2971,6 +3101,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2978,15 +3109,19 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2994,6 +3129,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -3038,14 +3174,17 @@ CONFIG_SENSORS_LM90=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set # CONFIG_SENSORS_PWM_FAN is not set # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -3073,6 +3212,7 @@ CONFIG_SENSORS_LM90=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3097,10 +3237,11 @@ CONFIG_SENSORS_INA2XX=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3160,6 +3301,7 @@ CONFIG_BCMA_POSSIBLE=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_SUN4I_GPADC is not set # CONFIG_MFD_AS3711 is not set @@ -3197,12 +3339,14 @@ CONFIG_MFD_HI6421_PMIC=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3219,7 +3363,6 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set @@ -3272,13 +3415,17 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set CONFIG_MFD_VEXPRESS_SYSREG=y # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3288,6 +3435,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3310,6 +3458,7 @@ CONFIG_REGULATOR_HI6421V530=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set @@ -3327,6 +3476,7 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3351,6 +3501,7 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SUN20I is not set # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8827N is not set @@ -3411,7 +3562,9 @@ CONFIG_CEC_PIN=y # CONFIG_CEC_PIN_ERROR_INJ is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set # CONFIG_CEC_GPIO is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -3444,6 +3597,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=y @@ -3456,7 +3610,6 @@ CONFIG_V4L2_ASYNC=y # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3648,6 +3801,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3660,6 +3817,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3691,6 +3853,7 @@ CONFIG_VIDEO_SUN8I_ROTATE=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_HEVC_RFC=y CONFIG_VIDEO_HANTRO_SUNXI=y # @@ -3735,7 +3898,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3744,6 +3912,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3754,6 +3923,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m @@ -3779,6 +3949,7 @@ CONFIG_VIDEO_OV2640=m # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -3797,10 +3968,16 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3873,6 +4050,7 @@ CONFIG_VIDEO_TVP514X=m CONFIG_VIDEO_TVP5150=m CONFIG_VIDEO_TVP7002=m CONFIG_VIDEO_TW2804=m +# CONFIG_VIDEO_TW9900 is not set CONFIG_VIDEO_TW9903=m CONFIG_VIDEO_TW9906=m CONFIG_VIDEO_TW9910=m @@ -3933,6 +4111,8 @@ CONFIG_VIDEO_THS7303=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4154,36 +4334,43 @@ CONFIG_DVB_SP2=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=m CONFIG_DRM_SCHED=m -# -# I2C encoder or helper chips -# -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4209,12 +4396,9 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_LVDS is not set -# CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_PANEL_EDP is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set @@ -4222,17 +4406,21 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_EDP is not set +# CONFIG_DRM_PANEL_SIMPLE is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set @@ -4248,6 +4436,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4272,6 +4462,7 @@ CONFIG_DRM_SIMPLE_BRIDGE=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4304,22 +4495,24 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set CONFIG_DRM_LIMA=m CONFIG_DRM_PANFROST=m +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_SMSCUFX is not set @@ -4337,10 +4530,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y @@ -4365,14 +4558,17 @@ CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=m # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4418,10 +4614,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4482,8 +4678,15 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4516,6 +4719,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4528,6 +4732,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4535,7 +4740,11 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4556,6 +4765,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4566,13 +4776,16 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set @@ -4580,7 +4793,6 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -4607,17 +4819,19 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4656,6 +4870,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4685,6 +4900,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4693,6 +4909,8 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4748,11 +4966,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set CONFIG_HID_GLORIOUS=m # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=m +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4766,7 +4986,6 @@ CONFIG_HID_TWINHAN=m CONFIG_HID_KENSINGTON=y # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y # CONFIG_HID_LOGITECH_DJ is not set @@ -4789,7 +5008,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=m -CONFIG_HID_OUYA=m CONFIG_HID_PANTHERLORD=m CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=m @@ -4827,6 +5045,7 @@ CONFIG_HID_TOPSEED=m # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=m # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=m @@ -4841,6 +5060,11 @@ CONFIG_HID_ZYDACRON=m # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4849,10 +5073,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4875,6 +5095,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4883,7 +5104,6 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4908,11 +5128,7 @@ CONFIG_USB_ACM=m # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4980,6 +5196,7 @@ CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -5075,7 +5292,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5169,6 +5386,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_HI3798CV200=y +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set @@ -5205,6 +5423,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_SUN50I_A100 is not set # CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set @@ -5212,6 +5431,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5236,6 +5456,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5247,11 +5468,14 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # @@ -5266,6 +5490,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5276,11 +5501,11 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_LEDS_TRIGGER_PANIC=y # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5315,6 +5540,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set @@ -5332,6 +5558,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5339,6 +5566,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5424,6 +5652,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y # CONFIG_DW_DMAC is not set @@ -5466,11 +5695,7 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5480,7 +5705,6 @@ CONFIG_RTL8723BS=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5507,16 +5731,14 @@ CONFIG_RTL8723BS=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers CONFIG_STAGING_MEDIA=y # CONFIG_VIDEO_MAX96712 is not set + +# +# StarFive media platform drivers +# CONFIG_VIDEO_SUNXI=y CONFIG_VIDEO_SUNXI_CEDRUS=y CONFIG_STAGING_MEDIA_DEPRECATED=y @@ -5524,17 +5746,14 @@ CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -5574,8 +5793,10 @@ CONFIG_SUN50I_A64_CCU=y # CONFIG_SUN50I_A100_CCU is not set # CONFIG_SUN50I_A100_R_CCU is not set CONFIG_SUN50I_H6_CCU=y -CONFIG_SUN50I_H616_CCU=y +# CONFIG_SUN50I_H616_CCU is not set CONFIG_SUN50I_H6_R_CCU=y +# CONFIG_SUN55I_A523_CCU is not set +# CONFIG_SUN55I_A523_R_CCU is not set CONFIG_SUN6I_RTC_CCU=y CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_DE2_CCU=y @@ -5605,6 +5826,7 @@ CONFIG_SUN50I_ERRATUM_UNKNOWN1=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y # CONFIG_ARM_MHU_V2 is not set +CONFIG_ARM_MHU_V3=m CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set # CONFIG_ALTERA_MBOX is not set @@ -5667,7 +5889,6 @@ CONFIG_RPMSG_QCOM_GLINK_RPM=y # # Broadcom SoC drivers # -CONFIG_SOC_BRCMSTB=y # end of Broadcom SoC drivers # @@ -5702,7 +5923,6 @@ CONFIG_SOC_BRCMSTB=y CONFIG_SUNXI_MBUS=y CONFIG_SUNXI_SRAM=y -# CONFIG_SUN20I_PPU is not set CONFIG_SOC_TI=y # @@ -5711,6 +5931,35 @@ CONFIG_SOC_TI=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +# CONFIG_SUN20I_PPU is not set +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5735,6 +5984,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -5772,6 +6022,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5808,36 +6060,48 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5849,11 +6113,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_SUN20I_GPADC is not set @@ -5865,8 +6133,11 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5910,10 +6181,12 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -5945,6 +6218,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5956,6 +6230,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5968,17 +6243,21 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -6014,6 +6293,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -6056,8 +6336,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -6071,8 +6353,13 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -6082,6 +6369,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6091,11 +6379,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6108,10 +6400,11 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6120,6 +6413,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6135,8 +6429,11 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6144,9 +6441,11 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6156,6 +6455,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6210,10 +6510,12 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6221,6 +6523,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6236,6 +6539,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6250,6 +6554,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6257,6 +6562,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6266,6 +6572,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6274,14 +6581,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_SUN4I=y # CONFIG_PWM_XILINX is not set @@ -6294,6 +6602,7 @@ CONFIG_ARM_GIC=y CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set CONFIG_SUN6I_R_INTC=y CONFIG_SUNXI_NMI_INTC=y @@ -6304,6 +6613,7 @@ CONFIG_PARTITION_PERCPU=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set CONFIG_RESET_SIMPLE=y CONFIG_RESET_SUNXI=y # CONFIG_RESET_TI_SYSCON is not set @@ -6314,6 +6624,7 @@ CONFIG_RESET_SUNXI=y # CONFIG_GENERIC_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set CONFIG_PHY_SUN4I_USB=y # CONFIG_PHY_SUN6I_MIPI_DPHY is not set # CONFIG_PHY_SUN9I_USB is not set @@ -6332,7 +6643,6 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6351,6 +6661,7 @@ CONFIG_PHY_SAMSUNG_USB2=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y # CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ARM_PMUV3=y @@ -6371,12 +6682,14 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y # end of Layout Types # CONFIG_NVMEM_RMEM is not set @@ -6410,6 +6723,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6422,7 +6736,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_SUPPORT_V4=y @@ -6437,10 +6750,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m @@ -6458,6 +6771,7 @@ CONFIG_F2FS_FS_LZ4HC=y CONFIG_F2FS_FS_ZSTD=y CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6479,6 +6793,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6492,6 +6808,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set # CONFIG_FSCACHE is not set # end of Caches @@ -6515,11 +6832,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6588,7 +6905,6 @@ CONFIG_PSTORE_COMPRESS=y # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_RAM is not set # CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6607,6 +6923,7 @@ CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -6634,6 +6951,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6709,12 +7027,11 @@ CONFIG_KEY_DH_OPERATIONS=y CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_FORCE_PTRACE is not set # CONFIG_PROC_MEM_NO_FORCE is not set +CONFIG_MSEAL_SYSTEM_MAPPINGS=y CONFIG_SECURITY=y CONFIG_SECURITYFS=y # CONFIG_SECURITY_NETWORK is not set # CONFIG_SECURITY_PATH is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set @@ -6750,6 +7067,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6796,6 +7120,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=y # end of Crypto core or helper @@ -6810,7 +7135,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -6843,14 +7167,11 @@ CONFIG_CRYPTO_SM4=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_CHACHA20=m CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set CONFIG_CRYPTO_NHPOLY1305=y @@ -6889,7 +7210,6 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y CONFIG_CRYPTO_SM3_GENERIC=m # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6900,15 +7220,13 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y # end of CRCs (cyclic redundancy checks) # # Compression # CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set @@ -6925,7 +7243,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6942,13 +7262,13 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y @@ -6969,7 +7289,6 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=y CONFIG_CRYPTO_AES_ARM64_CE_CCM=y # CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set # CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y # end of Accelerated Cryptographic Algorithms for CPU (arm64) CONFIG_CRYPTO_HW=y @@ -7010,6 +7329,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -7027,7 +7347,6 @@ CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -7042,16 +7361,19 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y -CONFIG_CRYPTO_LIB_CURVE25519=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m +CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines @@ -7059,19 +7381,15 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y CONFIG_CRC_T10DIF=y -CONFIG_CRC64_ROCKSOFT=y +CONFIG_ARCH_HAS_CRC_T10DIF=y +CONFIG_CRC_T10DIF_ARCH=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC64=y -# CONFIG_CRC4 is not set CONFIG_CRC7=y -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set @@ -7088,10 +7406,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_ARM64 is not set CONFIG_XZ_DEC_SPARC=y +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -7103,20 +7422,21 @@ CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -7143,11 +7463,14 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7166,11 +7489,14 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7199,7 +7525,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7209,7 +7535,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set @@ -7237,7 +7562,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -7250,6 +7575,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7265,7 +7591,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7275,12 +7601,14 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y @@ -7312,12 +7640,10 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set CONFIG_SCHED_INFO=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set # CONFIG_DEBUG_PREEMPT is not set # @@ -7371,14 +7697,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7409,6 +7738,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -7417,11 +7747,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -7431,18 +7757,19 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_FPU is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage @@ -7452,3 +7779,5 @@ CONFIG_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Allwinner/linux/linux.arm.conf b/projects/Allwinner/linux/linux.arm.conf index 4ab584194f..beaa8a7d46 100644 --- a/projects/Allwinner/linux/linux.arm.conf +++ b/projects/Allwinner/linux/linux.arm.conf @@ -1,23 +1,26 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.6.66 Kernel Configuration +# Linux/arm 6.15.0 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -118,7 +121,7 @@ CONFIG_PREEMPTION=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_PSI is not set @@ -135,6 +138,7 @@ CONFIG_PREEMPT_RCU=y CONFIG_TREE_SRCU=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -158,23 +162,28 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -210,21 +219,23 @@ CONFIG_INITRAMFS_COMPRESSION_NONE=y CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y +# CONFIG_LD_DEAD_CODE_DATA_ELIMINATION is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y +CONFIG_SYSFS_SYSCALL=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -236,18 +247,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set # CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -263,7 +273,6 @@ CONFIG_SYSTEM_DATA_VERIFICATION=y # Kexec and crash features # # CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup @@ -303,6 +312,9 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_VIRT is not set # CONFIG_ARCH_AIROHA is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_SUNPLUS is not set +# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set @@ -338,7 +350,6 @@ CONFIG_ARCH_MULTI_V6_V7=y # end of TI OMAP/AM/DM/DRA Family # CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RDA is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -347,7 +358,6 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_SUNPLUS is not set CONFIG_ARCH_SUNXI=y # CONFIG_MACH_SUN4I is not set # CONFIG_MACH_SUN5I is not set @@ -357,7 +367,6 @@ CONFIG_MACH_SUN8I=y # CONFIG_MACH_SUN9I is not set CONFIG_ARCH_SUNXI_MC_SMP=y # CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VEXPRESS is not set @@ -461,13 +470,13 @@ CONFIG_NR_CPUS=8 CONFIG_HOTPLUG_CPU=y CONFIG_ARM_PSCI=y CONFIG_HZ_FIXED=0 -CONFIG_HZ_100=y +# CONFIG_HZ_100 is not set # CONFIG_HZ_200 is not set # CONFIG_HZ_250 is not set -# CONFIG_HZ_300 is not set +CONFIG_HZ_300=y # CONFIG_HZ_500 is not set # CONFIG_HZ_1000 is not set -CONFIG_HZ=100 +CONFIG_HZ=300 CONFIG_SCHED_HRTICK=y # CONFIG_THUMB2_KERNEL is not set CONFIG_ARM_PATCH_IDIV=y @@ -478,6 +487,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_PAN=y CONFIG_CPU_SW_DOMAIN_PAN=y CONFIG_HW_PERF_EVENTS=y # CONFIG_ARM_MODULE_PLTS is not set @@ -506,6 +516,7 @@ CONFIG_CMDLINE_EXTEND=y # CONFIG_CMDLINE_FORCE is not set CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_AUTO_ZRELADDR=y # CONFIG_EFI is not set # end of Boot options @@ -538,6 +549,7 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y # CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set # end of CPU Frequency scaling @@ -597,8 +609,8 @@ CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y # end of Power management options -CONFIG_AS_VFP_VMRS_FPINST=y CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -639,9 +651,11 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y # CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y # CONFIG_STACKPROTECTOR is not set CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y @@ -654,8 +668,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -683,10 +700,11 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y CONFIG_HAVE_GCC_PLUGINS=y # CONFIG_GCC_PLUGINS is not set CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -696,10 +714,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -711,9 +726,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set @@ -746,6 +761,7 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_PM=y @@ -791,18 +807,19 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_COMPAT_BRK=y @@ -812,7 +829,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -823,13 +840,15 @@ CONFIG_BOUNCE=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_PAGE_MAPCOUNT=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set CONFIG_CMA_DEBUGFS=y CONFIG_CMA_SYSFS=y CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CPU_CACHE_ALIASING=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set @@ -843,7 +862,10 @@ CONFIG_MEMFD_CREATE=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -857,6 +879,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -864,7 +887,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -877,6 +899,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -929,7 +952,8 @@ CONFIG_IPV6_SIT=y CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -991,6 +1015,7 @@ CONFIG_NETFILTER_XTABLES=m # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -998,6 +1023,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1009,11 +1035,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1068,7 +1096,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1121,6 +1166,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1142,13 +1188,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1170,7 +1218,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1178,8 +1226,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1317,6 +1365,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1335,6 +1384,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -1352,10 +1402,8 @@ CONFIG_BT_MTKUART=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1366,8 +1414,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1375,7 +1421,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1402,6 +1447,7 @@ CONFIG_ETHTOOL_NETLINK=y # Device Drivers # CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set @@ -1433,6 +1479,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1453,7 +1500,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_ARM_CCI=y CONFIG_ARM_CCI400_COMMON=y CONFIG_ARM_CCI400_PORT_CTRL=y -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set CONFIG_SUN50I_DE2_BUS=y CONFIG_SUNXI_RSB=y @@ -1485,6 +1531,12 @@ CONFIG_SUNXI_RSB=y # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1495,6 +1547,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set # CONFIG_MTD is not set CONFIG_DTC=y @@ -1514,6 +1567,7 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_DRBD is not set @@ -1539,6 +1593,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_RPMB is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_APDS9802ALS is not set @@ -1553,6 +1608,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_SRAM is not set # CONFIG_XILINX_SDFEC is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_C2PORT is not set @@ -1561,7 +1617,6 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -1569,12 +1624,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -1711,6 +1760,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set CONFIG_NETCONSOLE=y @@ -1722,6 +1772,8 @@ CONFIG_TUN=y # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set CONFIG_ETHERNET=y CONFIG_NET_VENDOR_ALACRITECH=y CONFIG_NET_VENDOR_ALLWINNER=y @@ -1757,6 +1809,7 @@ CONFIG_NET_VENDOR_HISILICON=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set CONFIG_NET_VENDOR_MICROSEMI=y @@ -1806,6 +1859,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AC200_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set @@ -1842,8 +1896,12 @@ CONFIG_MICROCHIP_T1_PHY=y # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=y @@ -1855,6 +1913,7 @@ CONFIG_SMSC_PHY=y # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set CONFIG_MICREL_KS8995MA=y @@ -1974,8 +2033,10 @@ CONFIG_ATH10K_CE=y CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y @@ -2003,7 +2064,6 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_WLAN_VENDOR_INTERSIL is not set CONFIG_WLAN_VENDOR_MARVELL=y @@ -2040,6 +2100,7 @@ CONFIG_MT7663U=m CONFIG_MT7921_COMMON=m # CONFIG_MT7921S is not set CONFIG_MT7921U=m +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -2067,6 +2128,11 @@ CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2075,29 +2141,38 @@ CONFIG_RTW88_SDIO=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m +CONFIG_RTW88_8703B=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m CONFIG_RTW88_8822BS=m CONFIG_RTW88_8822BU=m CONFIG_RTW88_8822CS=m CONFIG_RTW88_8822CU=m CONFIG_RTW88_8723DS=m +CONFIG_RTW88_8723CS=m CONFIG_RTW88_8723DU=m CONFIG_RTW88_8821CS=m CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set # CONFIG_WLAN_VENDOR_RSI is not set # CONFIG_WLAN_VENDOR_SILABS is not set # CONFIG_WLAN_VENDOR_ST is not set # CONFIG_WLAN_VENDOR_TI is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2128,7 +2203,6 @@ CONFIG_INPUT_VIVALDIFMAP=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2151,7 +2225,6 @@ CONFIG_KEYBOARD_GPIO_POLLED=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2198,6 +2271,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y @@ -2243,7 +2317,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F3A is not set +CONFIG_RMI4_F3A=y # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set @@ -2273,7 +2347,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -2351,7 +2424,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2381,7 +2453,7 @@ CONFIG_I2C_ALGOBIT=m # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_CORE is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set CONFIG_I2C_MV64XXX=y @@ -2427,6 +2499,7 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_GPIO is not set # CONFIG_SPI_FSL_SPI is not set @@ -2466,10 +2539,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2483,6 +2553,7 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_PTP_1588_CLOCK_KVM=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support @@ -2492,6 +2563,7 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -2530,6 +2602,8 @@ CONFIG_PINCTRL_SUN8I_H3_R=y # CONFIG_PINCTRL_SUN50I_H6_R is not set # CONFIG_PINCTRL_SUN50I_H616 is not set # CONFIG_PINCTRL_SUN50I_H616_R is not set +# CONFIG_PINCTRL_SUN55I_A523 is not set +# CONFIG_PINCTRL_SUN55I_A523_R is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2552,6 +2626,7 @@ CONFIG_GPIO_CDEV_V1=y # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MPC8XXX is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_XILINX is not set @@ -2594,6 +2669,7 @@ CONFIG_GPIO_CDEV_V1=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2605,8 +2681,16 @@ CONFIG_GPIO_CDEV_V1=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set # CONFIG_POWER_RESET is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2628,6 +2712,7 @@ CONFIG_POWER_SUPPLY_HWMON=y CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -2655,6 +2740,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2664,7 +2750,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -2681,8 +2766,10 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -2692,6 +2779,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2699,15 +2787,19 @@ CONFIG_HWMON=y # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2715,6 +2807,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -2728,7 +2821,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -2759,14 +2851,17 @@ CONFIG_HWMON=y # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set # CONFIG_SENSORS_PWM_FAN is not set # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -2794,6 +2889,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -2817,10 +2913,11 @@ CONFIG_HWMON=y CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -2885,6 +2982,7 @@ CONFIG_BCMA_BLOCKIO=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set CONFIG_MFD_SUN4I_GPADC=y # CONFIG_MFD_AS3711 is not set @@ -2922,12 +3020,14 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -2944,7 +3044,6 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RT4831 is not set @@ -2998,12 +3097,16 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3013,6 +3116,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3033,6 +3137,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -3049,6 +3154,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3069,6 +3175,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_RTQ6752 is not set # CONFIG_REGULATOR_RTQ2208 is not set # CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SUN20I is not set CONFIG_REGULATOR_SY8106A=y # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8827N is not set @@ -3128,7 +3235,9 @@ CONFIG_CEC_PIN=y # CONFIG_CEC_PIN_ERROR_INJ is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set CONFIG_CEC_GPIO=m +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -3169,13 +3278,14 @@ CONFIG_V4L2_MEM2MEM_DEV=y # CONFIG_V4L2_FLASH_LED_CLASS is not set CONFIG_V4L2_FWNODE=y CONFIG_V4L2_ASYNC=y +CONFIG_V4L2_CCI=m +CONFIG_V4L2_CCI_I2C=m # end of Video4Linux options # # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3364,6 +3474,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3376,6 +3490,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3452,7 +3571,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3461,6 +3585,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3471,6 +3596,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -3496,6 +3622,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -3514,10 +3641,16 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3590,6 +3723,7 @@ CONFIG_VIDEO_TVP514X=m CONFIG_VIDEO_TVP5150=m CONFIG_VIDEO_TVP7002=m CONFIG_VIDEO_TW2804=m +# CONFIG_VIDEO_TW9900 is not set CONFIG_VIDEO_TW9903=m CONFIG_VIDEO_TW9906=m CONFIG_VIDEO_TW9910=m @@ -3651,6 +3785,8 @@ CONFIG_VIDEO_THS7303=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -3879,36 +4015,43 @@ CONFIG_DVB_SP2=m # Graphics support # CONFIG_APERTURE_HELPERS=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=m CONFIG_DRM_SCHED=m -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -3945,9 +4088,10 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set @@ -3964,6 +4108,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -3988,6 +4134,7 @@ CONFIG_DRM_SIMPLE_BRIDGE=m # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4007,6 +4154,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_LOGICVC is not set +# CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_PANEL_MIPI_DBI is not set @@ -4018,17 +4166,19 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_TVE200 is not set CONFIG_DRM_LIMA=m # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_MCDE is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -4043,7 +4193,6 @@ CONFIG_FB=y # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set CONFIG_FB_SIMPLE=y -# CONFIG_FB_SSD1307 is not set CONFIG_FB_CORE=y CONFIG_FB_NOTIFY=y # CONFIG_FIRMWARE_EDID is not set @@ -4055,9 +4204,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS=y @@ -4080,6 +4230,8 @@ CONFIG_HDMI=y # Console display driver support # CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=30 CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y @@ -4109,10 +4261,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4173,8 +4325,15 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4206,6 +4365,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4218,6 +4378,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4225,7 +4386,11 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4246,6 +4411,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4256,13 +4422,16 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set @@ -4270,7 +4439,6 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -4297,17 +4465,19 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4346,6 +4516,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4375,6 +4546,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4383,6 +4555,8 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4438,11 +4612,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set CONFIG_HID_GLORIOUS=m # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=m +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4456,7 +4632,6 @@ CONFIG_HID_TWINHAN=m CONFIG_HID_KENSINGTON=y # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y # CONFIG_HID_LOGITECH_DJ is not set @@ -4479,7 +4654,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=m -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=m CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=m @@ -4517,6 +4691,7 @@ CONFIG_HID_TOPSEED=m # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=m # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=m @@ -4531,6 +4706,11 @@ CONFIG_HID_ZYDACRON=m # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4539,10 +4719,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4565,6 +4741,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=m # @@ -4597,11 +4774,7 @@ CONFIG_USB_ACM=m # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4735,7 +4908,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -4844,6 +5017,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_SUN50I_A100 is not set # CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set @@ -4851,6 +5025,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -4875,6 +5050,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -4886,11 +5062,14 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # @@ -4904,6 +5083,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -4914,11 +5094,11 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -4953,6 +5133,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set @@ -4969,12 +5150,14 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5053,6 +5236,7 @@ CONFIG_DMA_SUN6I=y # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set @@ -5094,11 +5278,7 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set # CONFIG_RTL8723BS is not set -# CONFIG_R8712U is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5108,7 +5288,6 @@ CONFIG_STAGING=y # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5135,16 +5314,14 @@ CONFIG_STAGING=y # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers CONFIG_STAGING_MEDIA=y # CONFIG_VIDEO_MAX96712 is not set + +# +# StarFive media platform drivers +# CONFIG_VIDEO_SUNXI=y CONFIG_VIDEO_SUNXI_CEDRUS=y CONFIG_STAGING_MEDIA_DEPRECATED=y @@ -5152,13 +5329,8 @@ CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set @@ -5254,7 +5426,6 @@ CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -5289,7 +5460,6 @@ CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_SUNXI_MBUS=y CONFIG_SUNXI_SRAM=y -# CONFIG_SUN20I_PPU is not set # CONFIG_SOC_TI is not set # @@ -5298,6 +5468,33 @@ CONFIG_SUNXI_SRAM=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +# CONFIG_SUN20I_PPU is not set +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5322,6 +5519,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -5357,6 +5555,8 @@ CONFIG_IIO_SW_TRIGGER=y # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5393,36 +5593,48 @@ CONFIG_IIO_SW_TRIGGER=y # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set CONFIG_AXP20X_ADC=y # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5434,11 +5646,15 @@ CONFIG_AXP20X_ADC=y # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set CONFIG_SUN4I_GPADC=y @@ -5451,8 +5667,11 @@ CONFIG_SUN4I_GPADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5496,10 +5715,12 @@ CONFIG_SUN4I_GPADC=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -5531,6 +5752,7 @@ CONFIG_SUN4I_GPADC=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5542,6 +5764,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5554,17 +5777,21 @@ CONFIG_SUN4I_GPADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -5599,6 +5826,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV4420 is not set # CONFIG_ADRF6780 is not set @@ -5640,8 +5868,10 @@ CONFIG_SUN4I_GPADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5655,8 +5885,13 @@ CONFIG_SUN4I_GPADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -5666,6 +5901,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -5675,11 +5911,15 @@ CONFIG_SUN4I_GPADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -5692,10 +5932,11 @@ CONFIG_SUN4I_GPADC=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -5704,6 +5945,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -5719,8 +5961,11 @@ CONFIG_SUN4I_GPADC=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -5728,9 +5973,11 @@ CONFIG_SUN4I_GPADC=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -5740,6 +5987,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -5787,10 +6035,12 @@ CONFIG_SUN4I_GPADC=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -5798,6 +6048,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -5813,6 +6064,7 @@ CONFIG_SUN4I_GPADC=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -5827,6 +6079,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -5834,6 +6087,7 @@ CONFIG_SUN4I_GPADC=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -5843,6 +6097,7 @@ CONFIG_SUN4I_GPADC=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -5851,14 +6106,15 @@ CONFIG_SUN4I_GPADC=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_SUN4I=y # CONFIG_PWM_XILINX is not set @@ -5878,6 +6134,7 @@ CONFIG_SUNXI_NMI_INTC=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set CONFIG_RESET_SIMPLE=y CONFIG_RESET_SUNXI=y # CONFIG_RESET_TI_SYSCON is not set @@ -5889,6 +6146,7 @@ CONFIG_RESET_SUNXI=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set CONFIG_PHY_SUN4I_USB=y CONFIG_PHY_SUN6I_MIPI_DPHY=y CONFIG_PHY_SUN9I_USB=y @@ -5907,7 +6165,6 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -5922,6 +6179,7 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set CONFIG_ARM_PMU=y +CONFIG_ARM_V7_PMU=y # CONFIG_ARM_PMUV3 is not set # end of Performance monitor support @@ -5936,12 +6194,14 @@ CONFIG_ARM_PMU=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RMEM is not set @@ -5973,6 +6233,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -5985,7 +6246,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6004,10 +6264,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m @@ -6025,6 +6285,7 @@ CONFIG_F2FS_FS_LZ4HC=y CONFIG_F2FS_FS_ZSTD=y CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6040,6 +6301,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m # CONFIG_CUSE is not set # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6052,6 +6315,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set # CONFIG_FSCACHE is not set # end of Caches @@ -6075,10 +6339,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6133,7 +6397,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6151,6 +6414,7 @@ CONFIG_PNFS_FLEXFILE_LAYOUT=y CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" CONFIG_NFS_V4_1_MIGRATION=y CONFIG_ROOT_NFS=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -6180,6 +6444,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DFS_UPCALL is not set # CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6257,8 +6522,6 @@ CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_NO_FORCE is not set # CONFIG_SECURITY is not set CONFIG_SECURITYFS=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="yama,loadpin,safesetid,integrity" @@ -6282,6 +6545,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6326,6 +6596,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=m # end of Crypto core or helper @@ -6340,7 +6611,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m CONFIG_CRYPTO_ECDSA=m # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -6372,14 +6642,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # end of Length-preserving ciphers and modes @@ -6415,7 +6682,6 @@ CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6426,7 +6692,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=m -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -6450,7 +6715,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6470,13 +6737,13 @@ CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (arm) # -CONFIG_CRYPTO_POLY1305_ARM=y +CONFIG_CRYPTO_POLY1305_ARM=m CONFIG_CRYPTO_BLAKE2S_ARM=y CONFIG_CRYPTO_SHA1_ARM=y CONFIG_CRYPTO_SHA256_ARM=y CONFIG_CRYPTO_SHA512_ARM=y CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # end of Accelerated Cryptographic Algorithms for CPU (arm) CONFIG_CRYPTO_HW=y @@ -6517,6 +6784,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6534,7 +6802,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y # @@ -6546,34 +6813,26 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y -CONFIG_CRYPTO_LIB_CURVE25519=y +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m +CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines CONFIG_CRC_CCITT=y CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y @@ -6589,10 +6848,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_ARM64 is not set CONFIG_XZ_DEC_SPARC=y +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -6605,14 +6865,16 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_ARCH_HAS_DMA_ALLOC=y CONFIG_DMA_CMA=y # @@ -6635,11 +6897,13 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_32=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -6658,10 +6922,13 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -6689,7 +6956,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -6717,7 +6984,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -6728,6 +6995,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -6740,13 +7008,14 @@ CONFIG_SLUB_DEBUG=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set @@ -6754,6 +7023,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_KMAP_LOCAL is not set # CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -6783,11 +7053,9 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set CONFIG_DEBUG_PREEMPT=y # @@ -6856,7 +7124,9 @@ CONFIG_TRACING_SUPPORT=y # # arm Debugging # +CONFIG_ARM_PTDUMP_CORE=y # CONFIG_ARM_PTDUMP_DEBUGFS is not set +CONFIG_ARM_DEBUG_WX=y # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -6883,6 +7153,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -6891,11 +7162,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -6905,18 +7172,18 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -6926,3 +7193,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Allwinner/packages/linux/modprobe.d/ath9k.conf b/projects/Allwinner/packages/linux/modprobe.d/ath9k.conf new file mode 100644 index 0000000000..608c4b6570 --- /dev/null +++ b/projects/Allwinner/packages/linux/modprobe.d/ath9k.conf @@ -0,0 +1,5 @@ +# ath9k.conf: setup modload options for module ath9k. +# +# enable "Channel Context support" to avoid buffering in live TV + +options ath9k use_chanctx=1 diff --git a/projects/Allwinner/patches/linux/0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch b/projects/Allwinner/patches/linux/0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch index 8ac83e1b33..fed84bf74c 100644 --- a/projects/Allwinner/patches/linux/0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch +++ b/projects/Allwinner/patches/linux/0002-clk-Implement-protected-clocks-for-all-OF-clock-prov.patch @@ -62,14 +62,14 @@ again for each clock, which is part of why I didn't do it that way. Signed-off-by: Samuel Holland --- - drivers/clk/clk-conf.c | 54 ++++++++++++++++++++++++++++++++++++++++++ + drivers/clk/clk-conf.c | 56 ++++++++++++++++++++++++++++++++++++++++++ drivers/clk/clk.c | 31 ++++++++++++++++++++++++ drivers/clk/clk.h | 2 ++ 3 files changed, 87 insertions(+) --- a/drivers/clk/clk-conf.c +++ b/drivers/clk/clk-conf.c -@@ -11,6 +11,54 @@ +@@ -11,6 +11,56 @@ #include #include @@ -93,7 +93,9 @@ Signed-off-by: Samuel Holland + clkspec.np = node; + clkspec.args_count = nr_cells; + -+ of_property_for_each_u32(node, "protected-clocks", prop, cur, clkspec.args[0]) { ++ prop = of_find_property(node, "protected-clocks", NULL); ++ for (cur = of_prop_next_u32(prop, NULL, &clkspec.args[0]); cur; ++ cur = of_prop_next_u32(prop, cur, &clkspec.args[0])) { + /* read the remainder of the clock specifier */ + for (i = 1; i < nr_cells; ++i) { + cur = of_prop_next_u32(prop, cur, &clkspec.args[i]); diff --git a/projects/Allwinner/patches/linux/0003-Revert-clk-qcom-Support-protected-clocks-property.patch b/projects/Allwinner/patches/linux/0003-Revert-clk-qcom-Support-protected-clocks-property.patch index 98f48bc5d3..ea4476ab7d 100644 --- a/projects/Allwinner/patches/linux/0003-Revert-clk-qcom-Support-protected-clocks-property.patch +++ b/projects/Allwinner/patches/linux/0003-Revert-clk-qcom-Support-protected-clocks-property.patch @@ -15,7 +15,7 @@ Signed-off-by: Samuel Holland --- a/drivers/clk/qcom/common.c +++ b/drivers/clk/qcom/common.c -@@ -194,22 +194,6 @@ int qcom_cc_register_sleep_clk(struct de +@@ -223,20 +223,6 @@ int qcom_cc_register_sleep_clk(struct de } EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk); @@ -23,11 +23,9 @@ Signed-off-by: Samuel Holland -static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc) -{ - struct device_node *np = dev->of_node; -- struct property *prop; -- const __be32 *p; - u32 i; - -- of_property_for_each_u32(np, "protected-clocks", prop, p, i) { +- of_property_for_each_u32(np, "protected-clocks", i) { - if (i >= cc->num_rclks) - continue; - @@ -38,7 +36,7 @@ Signed-off-by: Samuel Holland static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec, void *data) { -@@ -272,8 +256,6 @@ int qcom_cc_really_probe(struct platform +@@ -330,8 +314,6 @@ int qcom_cc_really_probe(struct platform cc->rclks = rclks; cc->num_rclks = num_clks; diff --git a/projects/Allwinner/patches/linux/0013-drm_call_drm_atomic_helper_shutdown_at_shutdown.patch b/projects/Allwinner/patches/linux/0013-drm_call_drm_atomic_helper_shutdown_at_shutdown.patch deleted file mode 100644 index 65d9ee5a53..0000000000 --- a/projects/Allwinner/patches/linux/0013-drm_call_drm_atomic_helper_shutdown_at_shutdown.patch +++ /dev/null @@ -1,61 +0,0 @@ -Subject: [PATCH] drm: Call drm_atomic_helper_shutdown() at shutdown time for misc drivers -From: Douglas Anderson -Date: Fri, 01 Sep 2023 16:39:53 -0700 -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Based on grepping through the source code these drivers appear to be -missing a call to drm_atomic_helper_shutdown() at system shutdown -time. Among other things, this means that if a panel is in use that it -won't be cleanly powered off at system shutdown time. - -The fact that we should call drm_atomic_helper_shutdown() in the case -of OS shutdown/restart comes straight out of the kernel doc "driver -instance overview" in drm_drv.c. - -All of the drivers in this patch were fairly straightforward to fix -since they already had a call to drm_atomic_helper_shutdown() at -remove/unbind time but were just lacking one at system shutdown. The -only hitch is that some of these drivers use the component model to -register/unregister their DRM devices. The shutdown callback is part -of the original device. The typical solution here, based on how other -DRM drivers do this, is to keep track of whether the device is bound -based on drvdata. In most cases the drvdata is the drm_device, so we -can just make sure it is NULL when the device is not bound. In some -drivers, this required minor code changes. To make things simpler, -drm_atomic_helper_shutdown() has been modified to consider a NULL -drm_device as a noop in the patch ("drm/atomic-helper: -drm_atomic_helper_shutdown(NULL) should be a noop"). - -Suggested-by: Maxime Ripard -Signed-off-by: Douglas Anderson -Acked-by: Maxime Ripard -Link: https://lore.kernel.org/r/20230901163944.RFT.2.I9115e5d094a43e687978b0699cc1fe9f2a3452ea@changeid ---- - -diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c -index 6a8dfc022d3c..35d7a7ffd208 100644 ---- a/drivers/gpu/drm/sun4i/sun4i_drv.c -+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c -@@ -413,6 +413,11 @@ static void sun4i_drv_remove(struct platform_device *pdev) - component_master_del(&pdev->dev, &sun4i_drv_master_ops); - } - -+static void sun4i_drv_shutdown(struct platform_device *pdev) -+{ -+ drm_atomic_helper_shutdown(platform_get_drvdata(pdev)); -+} -+ - static const struct of_device_id sun4i_drv_of_table[] = { - { .compatible = "allwinner,sun4i-a10-display-engine" }, - { .compatible = "allwinner,sun5i-a10s-display-engine" }, -@@ -437,6 +442,7 @@ MODULE_DEVICE_TABLE(of, sun4i_drv_of_table); - static struct platform_driver sun4i_drv_platform_driver = { - .probe = sun4i_drv_probe, - .remove_new = sun4i_drv_remove, -+ .shutdown = sun4i_drv_shutdown, - .driver = { - .name = "sun4i-drm", - .of_match_table = sun4i_drv_of_table, - diff --git a/projects/Allwinner/patches/linux/0017-net-phy-Add-support-for-AC200-EPHY.patch b/projects/Allwinner/patches/linux/0017-net-phy-Add-support-for-AC200-EPHY.patch index c5814cd7c2..14b43fd182 100644 --- a/projects/Allwinner/patches/linux/0017-net-phy-Add-support-for-AC200-EPHY.patch +++ b/projects/Allwinner/patches/linux/0017-net-phy-Add-support-for-AC200-EPHY.patch @@ -39,7 +39,7 @@ Signed-off-by: Jernej Skrabec aquantia-objs += aquantia_main.o --- /dev/null +++ b/drivers/net/phy/ac200.c -@@ -0,0 +1,234 @@ +@@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0+ +/** + * Driver for AC200 Ethernet PHY @@ -242,7 +242,7 @@ Signed-off-by: Jernej Skrabec + return 0; +} + -+static int ac200_ephy_remove(struct platform_device *pdev) ++static void ac200_ephy_remove(struct platform_device *pdev) +{ + struct ac200_ephy_dev *priv = platform_get_drvdata(pdev); + @@ -251,8 +251,6 @@ Signed-off-by: Jernej Skrabec + regmap_write(priv->regmap, AC200_EPHY_CTL, AC200_EPHY_SHUTDOWN); + regmap_write(priv->regmap, AC200_SYS_EPHY_CTL1, 0); + regmap_write(priv->regmap, AC200_SYS_EPHY_CTL0, 0); -+ -+ return 0; +} + +static const struct of_device_id ac200_ephy_match[] = { diff --git a/projects/Allwinner/patches/linux/0018-wip-H6-deinterlace.patch b/projects/Allwinner/patches/linux/0018-wip-H6-deinterlace.patch index 3ddbe7d863..421d1b23b5 100644 --- a/projects/Allwinner/patches/linux/0018-wip-H6-deinterlace.patch +++ b/projects/Allwinner/patches/linux/0018-wip-H6-deinterlace.patch @@ -47,7 +47,7 @@ Signed-off-by: Jernej Skrabec +obj-$(CONFIG_VIDEO_SUN50I_DEINTERLACE) += sun50i-di.o --- /dev/null +++ b/drivers/media/platform/sunxi/sun50i-di/sun50i-di.c -@@ -0,0 +1,1137 @@ +@@ -0,0 +1,1135 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Allwinner sun50i deinterlacer driver @@ -848,7 +848,7 @@ Signed-off-by: Jernej Skrabec + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->drv_priv = ctx; + src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); -+ src_vq->min_buffers_needed = 1; ++ src_vq->min_queued_buffers = 1; + src_vq->ops = &deinterlace_qops; + src_vq->mem_ops = &vb2_dma_contig_memops; + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; @@ -863,7 +863,7 @@ Signed-off-by: Jernej Skrabec + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); -+ dst_vq->min_buffers_needed = 2; ++ dst_vq->min_queued_buffers = 2; + dst_vq->ops = &deinterlace_qops; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; @@ -1087,7 +1087,7 @@ Signed-off-by: Jernej Skrabec + return ret; +} + -+static int deinterlace_remove(struct platform_device *pdev) ++static void deinterlace_remove(struct platform_device *pdev) +{ + struct deinterlace_dev *dev = platform_get_drvdata(pdev); + @@ -1096,8 +1096,6 @@ Signed-off-by: Jernej Skrabec + v4l2_device_unregister(&dev->v4l2_dev); + + pm_runtime_force_suspend(&pdev->dev); -+ -+ return 0; +} + +static int deinterlace_runtime_resume(struct device *device) diff --git a/projects/Allwinner/patches/linux/0026-phy-handle-optional-regulator-for-PHY.patch b/projects/Allwinner/patches/linux/0026-phy-handle-optional-regulator-for-PHY.patch deleted file mode 100644 index ed9cf3f055..0000000000 --- a/projects/Allwinner/patches/linux/0026-phy-handle-optional-regulator-for-PHY.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 25b44143ea8162209beb02759ca3ea3bd3be7a74 Mon Sep 17 00:00:00 2001 -From: Corentin Labbe -Date: Fri, 14 Oct 2022 12:54:21 +0200 -Subject: [PATCH] phy: handle optional regulator for PHY - -Add handling of optional regulators for PHY. - -Regulators need to be enabled before PHY scanning, so MDIO bus -initiate this task. - -Signed-off-by: Corentin Labbe -Signed-off-by: Jernej Skrabec ---- - drivers/net/mdio/fwnode_mdio.c | 53 ++++++++++++++++++++++++++++++++-- - drivers/net/phy/phy_device.c | 6 ++++ - include/linux/phy.h | 3 ++ - 3 files changed, 60 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c -index fd02f5cbc853..bd5a27eaf40c 100644 ---- a/drivers/net/mdio/fwnode_mdio.c -+++ b/drivers/net/mdio/fwnode_mdio.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - - MODULE_AUTHOR("Calvin Johnson "); - MODULE_LICENSE("GPL"); -@@ -58,6 +59,40 @@ fwnode_find_mii_timestamper(struct fwnode_handle *fwnode) - return register_mii_timestamper(arg.np, arg.args[0]); - } - -+static int -+fwnode_regulator_get_bulk_enabled(struct device *dev, -+ struct fwnode_handle *fwnode, -+ struct regulator_bulk_data **consumers) -+{ -+ struct device_node *np; -+ int ret, reg_cnt; -+ -+ np = to_of_node(fwnode); -+ if (!np) -+ return 0; -+ -+ reg_cnt = of_regulator_bulk_get_all(dev, np, consumers); -+ if (reg_cnt < 0) { -+ ret = reg_cnt; -+ goto clean_consumers; -+ } -+ -+ if (reg_cnt == 0) -+ return 0; -+ -+ ret = regulator_bulk_enable(reg_cnt, *consumers); -+ if (ret) -+ goto clean_consumers; -+ -+ return reg_cnt; -+ -+clean_consumers: -+ kfree(*consumers); -+ *consumers = NULL; -+ -+ return ret; -+} -+ - int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio, - struct phy_device *phy, - struct fwnode_handle *child, u32 addr) -@@ -113,12 +148,13 @@ EXPORT_SYMBOL(fwnode_mdiobus_phy_device_register); - int fwnode_mdiobus_register_phy(struct mii_bus *bus, - struct fwnode_handle *child, u32 addr) - { -+ struct regulator_bulk_data *consumers = NULL; - struct mii_timestamper *mii_ts = NULL; - struct pse_control *psec = NULL; - struct phy_device *phy; -+ int rc, reg_cnt; - bool is_c45; - u32 phy_id; -- int rc; - - psec = fwnode_find_pse_control(child); - if (IS_ERR(psec)) -@@ -130,6 +166,12 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, - goto clean_pse; - } - -+ reg_cnt = fwnode_regulator_get_bulk_enabled(&bus->dev, child, &consumers); -+ if (reg_cnt < 0) { -+ rc = reg_cnt; -+ goto clean_mii_ts; -+ } -+ - is_c45 = fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45"); - if (is_c45 || fwnode_get_phy_id(child, &phy_id)) - phy = get_phy_device(bus, addr, is_c45); -@@ -137,9 +179,12 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, - phy = phy_device_create(bus, addr, phy_id, 0, NULL); - if (IS_ERR(phy)) { - rc = PTR_ERR(phy); -- goto clean_mii_ts; -+ goto clean_regulators; - } - -+ phy->regulator_cnt = reg_cnt; -+ phy->consumers = consumers; -+ - if (is_acpi_node(child)) { - phy->irq = bus->irq[addr]; - -@@ -174,6 +219,10 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, - - clean_phy: - phy_device_free(phy); -+clean_regulators: -+ if (reg_cnt > 0) -+ regulator_bulk_disable(reg_cnt, consumers); -+ kfree(consumers); - clean_mii_ts: - unregister_mii_timestamper(mii_ts); - clean_pse: -diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c -index 2ce74593d6e4..31b6913ceed1 100644 ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -31,6 +31,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -3400,6 +3401,11 @@ static int phy_remove(struct device *dev) - - phydev->drv = NULL; - -+ if (phydev->regulator_cnt > 0) -+ regulator_bulk_disable(phydev->regulator_cnt, phydev->consumers); -+ -+ kfree(phydev->consumers); -+ - return 0; - } - -diff --git a/include/linux/phy.h b/include/linux/phy.h -index 3cc52826f18e..832cb2d4f76a 100644 ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -757,6 +757,9 @@ struct phy_device { - void (*phy_link_change)(struct phy_device *phydev, bool up); - void (*adjust_link)(struct net_device *dev); - -+ int regulator_cnt; -+ struct regulator_bulk_data *consumers; -+ - #if IS_ENABLED(CONFIG_MACSEC) - /* MACsec management functions */ - const struct macsec_ops *macsec_ops; --- -2.43.0 - diff --git a/projects/Allwinner/patches/linux/0031-arm64-allwinner-h6-Enable-USB3-for-OrangePi-Lite2.patch b/projects/Allwinner/patches/linux/0031-arm64-allwinner-h6-Enable-USB3-for-OrangePi-Lite2.patch index 3162bccf97..6d4cdfc71b 100644 --- a/projects/Allwinner/patches/linux/0031-arm64-allwinner-h6-Enable-USB3-for-OrangePi-Lite2.patch +++ b/projects/Allwinner/patches/linux/0031-arm64-allwinner-h6-Enable-USB3-for-OrangePi-Lite2.patch @@ -24,7 +24,7 @@ Signed-off-by: Sebastian Meyer + enable-active-high; + }; + - wifi_pwrseq: wifi_pwrseq { + wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&rtc 1>; @@ -20,6 +30,10 @@ diff --git a/projects/Allwinner/patches/linux/0035-WIP-OPi3-DT-fixes.patch b/projects/Allwinner/patches/linux/0035-WIP-OPi3-DT-fixes.patch index 76cf0d597d..cd63f12a59 100644 --- a/projects/Allwinner/patches/linux/0035-WIP-OPi3-DT-fixes.patch +++ b/projects/Allwinner/patches/linux/0035-WIP-OPi3-DT-fixes.patch @@ -1,4 +1,4 @@ -From 59cc76036f42c7f7baa17cb46e6e19cf3a6a62bb Mon Sep 17 00:00:00 2001 +From 8f163618d4021cb84334109796c60f083fabda8d Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sun, 26 Sep 2021 09:31:45 +0200 Subject: [PATCH] WIP: OPi3 DT fixes @@ -8,7 +8,7 @@ Subject: [PATCH] WIP: OPi3 DT fixes 1 file changed, 35 insertions(+), 37 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index c45d7b7fb39a..af92d92d85a3 100644 +index f005072c68a1..d01a318653a3 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -63,27 +63,7 @@ reg_vcc5v: vcc5v { @@ -39,8 +39,8 @@ index c45d7b7fb39a..af92d92d85a3 100644 + wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; -@@ -136,8 +116,8 @@ &mmc0 { + clocks = <&rtc CLK_OSC32K_FANOUT>; +@@ -137,8 +117,8 @@ &mmc0 { }; &mmc1 { @@ -51,7 +51,7 @@ index c45d7b7fb39a..af92d92d85a3 100644 mmc-pwrseq = <&wifi_pwrseq>; bus-width = <4>; non-removable; -@@ -172,13 +152,17 @@ &ohci3 { +@@ -173,7 +153,7 @@ &ohci3 { &pio { vcc-pc-supply = <®_bldo2>; vcc-pd-supply = <®_cldo1>; @@ -59,18 +59,8 @@ index c45d7b7fb39a..af92d92d85a3 100644 + vcc-pg-supply = <®_bldo3>; }; - &r_ir { - status = "okay"; - }; - -+&r_pio { -+ vcc-pm-supply = <®_bldo3>; -+}; -+ - &r_rsb { - status = "okay"; - -@@ -234,13 +218,12 @@ reg_bldo2: bldo2 { + &r_i2c { +@@ -231,13 +211,12 @@ reg_bldo2: bldo2 { regulator-max-microvolt = <1800000>; regulator-name = "vcc-efuse-pcie-hdmi-pc"; }; @@ -90,7 +80,7 @@ index c45d7b7fb39a..af92d92d85a3 100644 }; reg_cldo1: cldo1 { -@@ -250,19 +233,34 @@ reg_cldo1: cldo1 { +@@ -247,19 +226,34 @@ reg_cldo1: cldo1 { regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2"; }; @@ -131,6 +121,17 @@ index c45d7b7fb39a..af92d92d85a3 100644 regulator-name = "vdd-cpu"; }; +@@ -296,6 +290,10 @@ &r_ir { + status = "okay"; + }; + ++&r_pio { ++ vcc-pm-supply = <®_bldo3>; ++}; ++ + &rtc { + clocks = <&ext_osc32k>; + }; -- -2.33.0 +2.48.1 diff --git a/projects/Allwinner/patches/linux/0040-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch b/projects/Allwinner/patches/linux/0040-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch index a6af506336..d83839aa5d 100644 --- a/projects/Allwinner/patches/linux/0040-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch +++ b/projects/Allwinner/patches/linux/0040-iommu-sun50i-Allow-page-sizes-multiple-of-4096.patch @@ -18,7 +18,7 @@ diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index d7c5e9b1a087..9944266c4f58 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c -@@ -593,10 +593,12 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova, +@@ -598,10 +598,12 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova, { struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); struct sun50i_iommu *iommu = sun50i_domain->iommu; @@ -29,9 +29,9 @@ index d7c5e9b1a087..9944266c4f58 100644 + pages = size / SPAGE_SIZE; + - page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp); - if (IS_ERR(page_table)) { - ret = PTR_ERR(page_table); + /* the IOMMU can only handle 32-bit addresses, both input and output */ + if ((uint64_t)paddr >> 32) { + ret = -EINVAL; @@ -604,18 +606,21 @@ static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova, } @@ -61,9 +61,9 @@ index d7c5e9b1a087..9944266c4f58 100644 - *pte_addr = sun50i_mk_pte(paddr, prot); - sun50i_table_flush(sun50i_domain, pte_addr, 1); + sun50i_table_flush(sun50i_domain, &page_table[pte_index], pages); + *mapped = size; out: - return ret; @@ -626,8 +631,10 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova { struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); @@ -97,11 +97,11 @@ index d7c5e9b1a087..9944266c4f58 100644 static phys_addr_t sun50i_iommu_iova_to_phys(struct iommu_domain *domain, @@ -828,7 +836,7 @@ static int sun50i_iommu_of_xlate(struct device *dev, - } static const struct iommu_ops sun50i_iommu_ops = { + .identity_domain = &sun50i_iommu_identity_domain, - .pgsize_bitmap = SZ_4K, + .pgsize_bitmap = 0x1ff000, - .device_group = sun50i_iommu_device_group, - .domain_alloc = sun50i_iommu_domain_alloc, + .device_group = generic_single_device_group, + .domain_alloc_paging = sun50i_iommu_domain_alloc_paging, .of_xlate = sun50i_iommu_of_xlate, diff --git a/projects/Allwinner/patches/linux/0044-ARM-dts-sun8i-r40-Add-interconnect-to-video-codec.patch b/projects/Allwinner/patches/linux/0044-ARM-dts-sun8i-r40-Add-interconnect-to-video-codec.patch deleted file mode 100644 index b0af71a9d8..0000000000 --- a/projects/Allwinner/patches/linux/0044-ARM-dts-sun8i-r40-Add-interconnect-to-video-codec.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 667a93ec571a2a8f2487c258c928936d73b7fa14 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 19 Feb 2023 13:02:31 +0100 -Subject: [PATCH] ARM: dts: sun8i-r40: Add interconnect to video-codec - -Video codec needs interconnect, so driver knows that it needs to adjust -DMA addresses. - -Signed-off-by: Jernej Skrabec ---- - arch/arm/boot/dts/allwinner/sun8i-r40.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi -index 4ef26d8f5340..a5b1f1e3900d 100644 ---- a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi -+++ b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi -@@ -338,6 +338,8 @@ video-codec@1c0e000 { - resets = <&ccu RST_BUS_VE>; - interrupts = ; - allwinner,sram = <&ve_sram 1>; -+ interconnects = <&mbus 4>; -+ interconnect-names = "dma-mem"; - }; - - mmc0: mmc@1c0f000 { --- -2.39.2 - diff --git a/projects/Allwinner/patches/linux/0049-drm-sun4i-dw-hdmi-Switch-to-bridge-functions.patch b/projects/Allwinner/patches/linux/0049-drm-sun4i-dw-hdmi-Switch-to-bridge-functions.patch index 2d4a7396ef..2b06a32663 100644 --- a/projects/Allwinner/patches/linux/0049-drm-sun4i-dw-hdmi-Switch-to-bridge-functions.patch +++ b/projects/Allwinner/patches/linux/0049-drm-sun4i-dw-hdmi-Switch-to-bridge-functions.patch @@ -17,16 +17,28 @@ Signed-off-by: Jernej Skrabec drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 5 ++ 2 files changed, 117 insertions(+), 2 deletions(-) +diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig +--- a/drivers/gpu/drm/sun4i/Kconfig ++++ b/drivers/gpu/drm/sun4i/Kconfig +@@ -3,6 +3,7 @@ + tristate "DRM Support for Allwinner A10 Display Engine" + depends on DRM && COMMON_CLK + depends on ARCH_SUNXI || COMPILE_TEST ++ select DRM_BRIDGE_CONNECTOR + select DRM_CLIENT_SELECTION + select DRM_GEM_DMA_HELPER + select DRM_KMS_HELPER diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c index 8f8d3bdba5ce..93831cdf1917 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c -@@ -8,14 +8,82 @@ +@@ -8,14 +8,90 @@ #include #include +#include +#include ++#include #include #include #include @@ -61,16 +73,23 @@ index 8f8d3bdba5ce..93831cdf1917 100644 + enum drm_connector_status status) +{ + struct sun8i_dw_hdmi *hdmi = bridge_to_sun8i_dw_hdmi(bridge); -+ struct edid *edid; + + if (!hdmi->cec_notifier) + return; + + if (status == connector_status_connected) { -+ edid = drm_bridge_get_edid(hdmi->hdmi_bridge, hdmi->connector); -+ if (edid) -+ cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, -+ edid); ++ const struct drm_edid *drm_edid; ++ const struct edid *edid; ++ ++ drm_edid = drm_bridge_edid_read(hdmi->hdmi_bridge, ++ hdmi->connector); ++ if (drm_edid) ++ return; ++ ++ edid = drm_edid_raw(drm_edid); ++ cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, ++ edid); ++ drm_edid_free(drm_edid); + } else { + cec_notifier_phys_addr_invalidate(hdmi->cec_notifier); + } diff --git a/projects/Allwinner/patches/linux/0059-WIP-drm-sun4i-de3-Add-support-for-YUV420-output.patch b/projects/Allwinner/patches/linux/0059-WIP-drm-sun4i-de3-Add-support-for-YUV420-output.patch index cbe3990cf6..d00465e0e5 100644 --- a/projects/Allwinner/patches/linux/0059-WIP-drm-sun4i-de3-Add-support-for-YUV420-output.patch +++ b/projects/Allwinner/patches/linux/0059-WIP-drm-sun4i-de3-Add-support-for-YUV420-output.patch @@ -538,7 +538,7 @@ diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i index 22e084989ee6..0837e2576556 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c -@@ -7,18 +7,25 @@ +@@ -7,19 +7,26 @@ #include #include #include @@ -546,6 +546,7 @@ index 22e084989ee6..0837e2576556 100644 #include #include + #include #include #include #include diff --git a/projects/Allwinner/patches/linux/0061-media-Add-NV12-and-P010-AFBC-compressed-formats.patch b/projects/Allwinner/patches/linux/0061-media-Add-NV12-and-P010-AFBC-compressed-formats.patch index 353c738920..f6fe9e35f8 100644 --- a/projects/Allwinner/patches/linux/0061-media-Add-NV12-and-P010-AFBC-compressed-formats.patch +++ b/projects/Allwinner/patches/linux/0061-media-Add-NV12-and-P010-AFBC-compressed-formats.patch @@ -16,10 +16,10 @@ diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2 index f4d9d6279094..1e07066fa129 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c -@@ -1510,6 +1510,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) - case V4L2_PIX_FMT_AV1_FRAME: descr = "AV1 Frame"; break; - case V4L2_PIX_FMT_MT2110T: descr = "Mediatek 10bit Tile Mode"; break; - case V4L2_PIX_FMT_MT2110R: descr = "Mediatek 10bit Raster Mode"; break; +@@ -1542,6 +1542,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) + case V4L2_PIX_FMT_PISP_COMP2_GBRG: descr = "PiSP 8b GBGB/RGRG mode2 compr"; break; + case V4L2_PIX_FMT_PISP_COMP2_BGGR: descr = "PiSP 8b BGBG/GRGR mode2 compr"; break; + case V4L2_PIX_FMT_PISP_COMP2_MONO: descr = "PiSP 8b monochrome mode2 compr"; break; + case V4L2_PIX_FMT_YUV420_8_AFBC_16X16_SPLIT: descr = "YUV 4:2:0 (AFBC 16x16)"; break; + case V4L2_PIX_FMT_YUV420_10_AFBC_16X16_SPLIT: descr = "10-bit YUV 4:2:0 (AFBC 16x16)"; break; default: diff --git a/projects/Allwinner/patches/linux/0064-drm-sun4i-de2-Initialize-layer-fields-earlier.patch b/projects/Allwinner/patches/linux/0064-drm-sun4i-de2-Initialize-layer-fields-earlier.patch index b3ac0a7bef..7dc71aec62 100644 --- a/projects/Allwinner/patches/linux/0064-drm-sun4i-de2-Initialize-layer-fields-earlier.patch +++ b/projects/Allwinner/patches/linux/0064-drm-sun4i-de2-Initialize-layer-fields-earlier.patch @@ -17,22 +17,24 @@ diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8 index 884abe3cf773..91781b5bbbbc 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c -@@ -365,6 +365,10 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, +@@ -295,6 +295,11 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; ++ layer->type = SUN8I_LAYER_TYPE_UI; + layer->channel = channel; + layer->overlay = 0; + if (index == 0) type = DRM_PLANE_TYPE_PRIMARY; -@@ -395,9 +399,6 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, +@@ -325,10 +330,6 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs); - layer->mixer = mixer; +- layer->type = SUN8I_LAYER_TYPE_UI; - layer->channel = channel; - layer->overlay = 0; @@ -42,22 +44,24 @@ diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8 index 6ee3790a2a81..329e8bf8cd20 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c -@@ -549,6 +549,10 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, +@@ -478,6 +478,11 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; ++ layer->type = SUN8I_LAYER_TYPE_VI; + layer->channel = index; + layer->overlay = 0; + if (mixer->cfg->is_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); -@@ -607,9 +611,6 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, +@@ -543,10 +549,6 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); - layer->mixer = mixer; +- layer->type = SUN8I_LAYER_TYPE_VI; - layer->channel = index; - layer->overlay = 0; diff --git a/projects/Allwinner/patches/linux/0065-drm-sun4i-de3-Implement-AFBC-support.patch b/projects/Allwinner/patches/linux/0065-drm-sun4i-de3-Implement-AFBC-support.patch index fab63060da..ecfc5967f9 100644 --- a/projects/Allwinner/patches/linux/0065-drm-sun4i-de3-Implement-AFBC-support.patch +++ b/projects/Allwinner/patches/linux/0065-drm-sun4i-de3-Implement-AFBC-support.patch @@ -372,6 +372,26 @@ index 000000000000..cea685c86855 +void sun50i_afbc_disable(struct sun8i_mixer *mixer, unsigned int channel); + +#endif +diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c +--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c ++++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c +@@ -26,6 +26,7 @@ + #include + + #include "sun4i_drv.h" ++#include "sun50i_afbc.h" + #include "sun50i_fmt.h" + #include "sun8i_mixer.h" + #include "sun8i_ui_layer.h" +@@ -272,6 +273,8 @@ + val = enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; + mask = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; + reg = SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay); ++ if (!enable && layer->mixer->cfg->is_de3) ++ sun50i_afbc_disable(layer->mixer, layer->channel); + } + + regmap_update_bits(layer->mixer->engine.regs, reg, mask, val); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 329e8bf8cd20..bda91c3e2bb7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -414,7 +434,7 @@ index 329e8bf8cd20..bda91c3e2bb7 100644 DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n"); hm = src_w; hn = scanline; -@@ -356,6 +358,15 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, +@@ -307,6 +309,15 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, return 0; } @@ -430,34 +450,20 @@ index 329e8bf8cd20..bda91c3e2bb7 100644 static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { -@@ -399,6 +410,8 @@ static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, - - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); -+ if (mixer->cfg->is_de3) -+ sun50i_afbc_disable(mixer, layer->channel); - } - - static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, -@@ -411,26 +424,53 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); +@@ -346,19 +357,44 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, + plane); + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); unsigned int zpos = new_state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; + struct drm_framebuffer *fb = plane->state->fb; struct sun8i_mixer *mixer = layer->mixer; + bool afbc = drm_is_afbc(fb->modifier); - if (!new_state->visible) { - sun8i_vi_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); -+ if (mixer->cfg->is_de3) -+ sun50i_afbc_disable(mixer, layer->channel); + if (!new_state->crtc || !new_state->visible) return; - } - ++ + if (afbc) { + u32 fmt_type; -+ + + sun8i_vi_layer_prepare_non_linear(mixer, layer->channel, + layer->overlay); + sun50i_afbc_atomic_update(mixer, layer->channel, plane); @@ -485,21 +491,17 @@ index 329e8bf8cd20..bda91c3e2bb7 100644 - sun8i_vi_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); + layer->overlay, plane, zpos, afbc); - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); - } - ++} ++ +static bool sun8i_vi_layer_format_mod_supported(struct drm_plane *plane, + u32 format, u64 modifier) +{ -+ struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); ++ struct sun8i_layer *layer = plane_to_sun8i_layer(plane); + + return sun50i_afbc_format_mod_supported(layer->mixer, format, modifier); -+} -+ + } + static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { - .atomic_check = sun8i_vi_layer_atomic_check, - .atomic_disable = sun8i_vi_layer_atomic_disable, @@ -444,6 +484,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = { .disable_plane = drm_atomic_helper_disable_plane, .reset = drm_atomic_helper_plane_reset, @@ -536,13 +538,13 @@ index 329e8bf8cd20..bda91c3e2bb7 100644 + DRM_FORMAT_MOD_INVALID +}; + - struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - int index) + struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + int index) @@ -542,6 +600,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, u32 supported_encodings, supported_ranges; unsigned int plane_cnt, format_count; - struct sun8i_vi_layer *layer; + struct sun8i_layer *layer; + const uint64_t *modifiers; const u32 *formats; int ret; diff --git a/projects/Allwinner/patches/linux/0071-HACK-SW-CEC-implementation-for-H3.patch b/projects/Allwinner/patches/linux/0071-HACK-SW-CEC-implementation-for-H3.patch index d82e27f5a4..b190c45695 100644 --- a/projects/Allwinner/patches/linux/0071-HACK-SW-CEC-implementation-for-H3.patch +++ b/projects/Allwinner/patches/linux/0071-HACK-SW-CEC-implementation-for-H3.patch @@ -201,7 +201,7 @@ index 581233d6eaf2..a5771b5d9b67 100644 static int sun8i_hdmi_phy_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -@@ -681,6 +756,14 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) +@@ -681,6 +756,15 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) phy->variant = of_device_get_match_data(dev); phy->dev = dev; @@ -209,6 +209,7 @@ index 581233d6eaf2..a5771b5d9b67 100644 + of_machine_is_compatible("friendlyarm,nanopi-m1") || + of_machine_is_compatible("xunlong,orangepi-lite") || + of_machine_is_compatible("xunlong,orangepi-one") || ++ of_machine_is_compatible("xunlong,orangepi-pc") || + of_machine_is_compatible("xunlong,orangepi-pc-plus") || + of_machine_is_compatible("xunlong,orangepi-plus2e"); + phy->bit_bang_cec = phy->disable_cec && @@ -216,18 +217,16 @@ index 581233d6eaf2..a5771b5d9b67 100644 regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) -@@ -727,8 +810,19 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) +@@ -727,8 +810,17 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) return 0; } -+static int sun8i_hdmi_phy_remove(struct platform_device *pdev) ++static void sun8i_hdmi_phy_remove(struct platform_device *pdev) +{ + struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev); + + cec_notifier_cec_adap_unregister(phy->cec_notifier, phy->cec_adapter); + cec_unregister_adapter(phy->cec_adapter); -+ -+ return 0; +} + struct platform_driver sun8i_hdmi_phy_driver = { diff --git a/projects/Allwinner/patches/linux/0074-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regu.patch b/projects/Allwinner/patches/linux/0074-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regu.patch new file mode 100644 index 0000000000..09189a3155 --- /dev/null +++ b/projects/Allwinner/patches/linux/0074-net-stmmac-sun8i-Use-devm_regulator_get-for-PHY-regu.patch @@ -0,0 +1,75 @@ +From 1877122b4d0fef204f7076f4c28761cae9fcd807 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sat, 15 Mar 2025 17:38:35 +0100 +Subject: [PATCH 1/3] net: stmmac: sun8i: Use devm_regulator_get for PHY + regulator + +Use devm_regulator_get instead of devm_regulator_get_optional and rely +on dummy supply. This avoids NULL checks before regulator_enable/disable +calls. + +This path also improves error reporting, because we now report both +use of dummy supply and error during registration with more detail, +instead of generic info level message "No regulator found" that +was reported previously on errors and lack of regulator property in DT. + +Finally, we'll be adding further optional regulators, and the overall +code will be simpler. + +Signed-off-by: Ondrej Jirman +--- + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++----------- + 1 file changed, 10 insertions(+), 13 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 4b7b2582a120..94a4898260b0 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -588,12 +588,10 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + struct sunxi_priv_data *gmac = priv; + int ret; + +- if (gmac->regulator) { +- ret = regulator_enable(gmac->regulator); +- if (ret) { +- dev_err(&pdev->dev, "Fail to enable regulator\n"); +- return ret; +- } ++ ret = regulator_enable(gmac->regulator); ++ if (ret) { ++ dev_err(&pdev->dev, "Fail to enable regulator\n"); ++ return ret; + } + + if (gmac->use_internal_phy) { +@@ -1051,8 +1049,7 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + if (gmac->variant->soc_has_internal_phy) + sun8i_dwmac_unpower_internal_phy(gmac); + +- if (gmac->regulator) +- regulator_disable(gmac->regulator); ++ regulator_disable(gmac->regulator); + } + + static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) +@@ -1176,12 +1173,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + } + + /* Optional regulator for PHY */ +- gmac->regulator = devm_regulator_get_optional(dev, "phy"); ++ gmac->regulator = devm_regulator_get(dev, "phy"); + if (IS_ERR(gmac->regulator)) { +- if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) +- return -EPROBE_DEFER; +- dev_info(dev, "No regulator found\n"); +- gmac->regulator = NULL; ++ ret = PTR_ERR(gmac->regulator); ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get PHY regulator (%d)\n", ret); ++ return ret; + } + + /* The "GMAC clock control" register might be located in the +-- +2.48.1 + diff --git a/projects/Allwinner/patches/linux/0075-net-stmmac-sun8i-Add-support-for-enabling-a-regulato.patch b/projects/Allwinner/patches/linux/0075-net-stmmac-sun8i-Add-support-for-enabling-a-regulato.patch new file mode 100644 index 0000000000..38f27a452e --- /dev/null +++ b/projects/Allwinner/patches/linux/0075-net-stmmac-sun8i-Add-support-for-enabling-a-regulato.patch @@ -0,0 +1,92 @@ +From a46ed6e8213c96d0905de691620cd473b0a2e45e Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sat, 15 Mar 2025 17:49:23 +0100 +Subject: [PATCH 2/3] net: stmmac: sun8i: Add support for enabling a regulator + for PHY I/O pins + +Orange Pi 3 has two regulators that power the Realtek RTL8211E. According +to the phy datasheet, both regulators need to be enabled at the same time. + +Add support for the second optional regulator, "phy-io", to the glue +driver. + +Signed-off-by: Ondrej Jirman +--- + .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++++++++++++- + 1 file changed, 22 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 94a4898260b0..da77e82f06d2 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -61,6 +61,8 @@ struct emac_variant { + /* struct sunxi_priv_data - hold all sunxi private data + * @ephy_clk: reference to the optional EPHY clock for the internal PHY + * @regulator: reference to the optional regulator ++ * @regulator_phy_io: reference to the optional regulator for ++ * PHY I/O pins + * @rst_ephy: reference to the optional EPHY reset for the internal PHY + * @variant: reference to the current board variant + * @regmap: regmap for using the syscon +@@ -71,6 +73,7 @@ struct emac_variant { + struct sunxi_priv_data { + struct clk *ephy_clk; + struct regulator *regulator; ++ struct regulator *regulator_phy_io; + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap_field *regmap_field; +@@ -588,10 +591,16 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + struct sunxi_priv_data *gmac = priv; + int ret; + ++ ret = regulator_enable(gmac->regulator_phy_io); ++ if (ret) { ++ dev_err(&pdev->dev, "Fail to enable PHY I/O regulator\n"); ++ return ret; ++ } ++ + ret = regulator_enable(gmac->regulator); + if (ret) { + dev_err(&pdev->dev, "Fail to enable regulator\n"); +- return ret; ++ goto err_disable_regulator_phy_io; + } + + if (gmac->use_internal_phy) { +@@ -605,6 +614,8 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) + err_disable_regulator: + if (gmac->regulator) + regulator_disable(gmac->regulator); ++err_disable_regulator_phy_io: ++ regulator_disable(gmac->regulator_phy_io); + + return ret; + } +@@ -1050,6 +1061,7 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + sun8i_dwmac_unpower_internal_phy(gmac); + + regulator_disable(gmac->regulator); ++ regulator_disable(gmac->regulator_phy_io); + } + + static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable) +@@ -1181,6 +1193,15 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + return ret; + } + ++ /* Optional regulator for PHY I/O pins */ ++ gmac->regulator_phy_io = devm_regulator_get(dev, "phy-io"); ++ if (IS_ERR(gmac->regulator_phy_io)) { ++ ret = PTR_ERR(gmac->regulator_phy_io); ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get PHY I/O regulator (%d)\n", ret); ++ return ret; ++ } ++ + /* The "GMAC clock control" register might be located in the + * CCU address range (on the R40), or the system control address + * range (on most other sun8i and later SoCs). +-- +2.48.1 + diff --git a/projects/Allwinner/patches/linux/0027-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch b/projects/Allwinner/patches/linux/0076-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch similarity index 55% rename from projects/Allwinner/patches/linux/0027-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch rename to projects/Allwinner/patches/linux/0076-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch index 05788ef492..16d540f9f8 100644 --- a/projects/Allwinner/patches/linux/0027-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch +++ b/projects/Allwinner/patches/linux/0076-arm64-dts-allwinner-orange-pi-3-Enable-ethernet.patch @@ -1,12 +1,12 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= -Date: Tue, 20 Aug 2019 14:54:48 +0200 -Subject: [PATCH] arm64: dts: allwinner: orange-pi-3: Enable ethernet +From 2409d598b229dee9036f9ea2f14dde2647e8c114 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sat, 15 Mar 2025 18:00:20 +0100 +Subject: [PATCH 3/3] arm64: dts: allwinner: orange-pi-3: Enable ethernet Orange Pi 3 has two regulators that power the Realtek RTL8211E PHY. According to the datasheet, both regulators need to be enabled at the same time, or that "phy-io" should be enabled slightly earlier -than "ephy" regulator. +than "phy" regulator. RTL8211E/RTL8211EG datasheet says: @@ -14,26 +14,33 @@ RTL8211E/RTL8211EG datasheet says: or slightly earlier than 3.3V power. Rising 2.5V (or 1.8/1.5V) power later than 3.3V power may lead to errors. -Signed-off-by: Ondrej Jirman -Signed-off-by: Corentin Labbe -Signed-off-by: Jernej Skrabec +The driver ensures the regulator enable ordering. The timing is set +in DT via startup-delay-us. + +We also need to wait at least 30ms after power-up/reset, before +accessing the PHY registers. + +All values of RX/TX delay were tested exhaustively and a middle one +of the range of working values was chosen. + +Signed-off-by: Ondrej Jirman --- - .../dts/allwinner/sun50i-h6-orangepi-3.dts | 39 +++++++++++++++++++ - 1 file changed, 39 insertions(+) + .../dts/allwinner/sun50i-h6-orangepi-3.dts | 40 +++++++++++++++++++ + 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index 6fc65e8db220..df8b6de2b4d2 100644 +index d01a318653a3..89049a7c0473 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -13,6 +13,7 @@ / { - compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6"; - +@@ -15,6 +15,7 @@ / { aliases { -+ ethernet0 = &emac; serial0 = &uart0; serial1 = &uart1; ++ ethernet0 = &emac; }; -@@ -55,6 +56,16 @@ led-1 { + + chosen { +@@ -55,6 +56,15 @@ led-1 { }; }; @@ -44,21 +51,30 @@ index 6fc65e8db220..df8b6de2b4d2 100644 + regulator-max-microvolt = <2500000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ off-on-delay-us = <100000>; + }; + reg_vcc5v: vcc5v { /* board wide 5V supply directly from the DC jack */ compatible = "regulator-fixed"; -@@ -113,6 +124,33 @@ &ehci3 { - status = "okay"; +@@ -108,6 +118,35 @@ hdmi_out_con: endpoint { + }; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii-id"; ++ phy-mode = "rgmii-txid"; + phy-handle = <&ext_rgmii_phy>; ++ /* ++ * The board uses 2.5V RGMII signalling. Power sequence to enable ++ * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails ++ * at the same time and to wait 100ms. The driver enables phy-io ++ * first. Delay is achieved with enable-ramp-delay on reg_aldo2. ++ */ ++ phy-supply = <®_aldo2>; ++ phy-io-supply = <®_gmac_2v5>; ++ allwinner,rx-delay-ps = <1500>; ++ allwinner,tx-delay-ps = <700>; + status = "okay"; +}; + @@ -66,14 +82,6 @@ index 6fc65e8db220..df8b6de2b4d2 100644 + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; -+ /* -+ * The board uses 2.5V RGMII signalling. Power sequence to enable -+ * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails -+ * at the same time and to wait 100ms. The driver enables phy-io -+ * first. Delay is achieved with enable-ramp-delay on reg_aldo2. -+ */ -+ phy-io-supply = <®_gmac_2v5>; -+ ephy-supply = <®_aldo2>; + + reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */ + reset-assert-us = <15000>; @@ -81,10 +89,10 @@ index 6fc65e8db220..df8b6de2b4d2 100644 + }; +}; + - &gpu { - mali-supply = <®_dcdcc>; - status = "okay"; -@@ -211,6 +249,7 @@ reg_aldo2: aldo2 { + &mmc0 { + vmmc-supply = <®_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ +@@ -188,6 +227,7 @@ reg_aldo2: aldo2 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc33-audio-tv-ephy-mac"; @@ -92,3 +100,6 @@ index 6fc65e8db220..df8b6de2b4d2 100644 }; /* ALDO3 is shorted to CLDO1 */ +-- +2.48.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch index eabb3fe385..50d2211b52 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch @@ -1,7 +1,7 @@ -From fa91cacc8756959b9b04b2cd3d369888b9a19e82 Mon Sep 17 00:00:00 2001 +From 9a711d3aca9f7bd053caefec4f1bef07ba1a4817 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Sat, 13 Apr 2019 05:41:51 +0000 -Subject: [PATCH 01/53] LOCAL: set meson-gx cma pool to 896MB +Subject: [PATCH 01/37] LOCAL: set meson-gx cma pool to 896MB This change sets the CMA pool to a larger 896MB! value for vdec use @@ -11,7 +11,7 @@ Signed-off-by: Christian Hewitt 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index 2673f0dbafe7..5f9b0854c201 100644 +index 7d99ca44e660..eebd4a4d388c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -58,7 +58,7 @@ secmon_reserved_bl32: secmon@5300000 { diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch index 7fb050f369..c3494a81f2 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch @@ -1,7 +1,7 @@ -From db61fd1f5ac1a4b39f7699ef5583db1464f2a419 Mon Sep 17 00:00:00 2001 +From 5979e28bfa5986d47ba62f147feb5d9b83f16e6d Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Wed, 14 Aug 2019 19:58:14 +0000 -Subject: [PATCH 02/53] LOCAL: set meson-g12 cma pool to 896MB +Subject: [PATCH 02/37] LOCAL: set meson-g12 cma pool to 896MB This change sets the CMA pool to a larger 896MB! value for vdec use @@ -11,7 +11,7 @@ Signed-off-by: Christian Hewitt 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi -index ff68b911b729..f7f8df88d464 100644 +index dcc927a9da80..0b6f13f8911b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -117,7 +117,7 @@ secmon_reserved_bl32: secmon@5300000 { diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch index 33e5b3aefb..879fdcd1c5 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch @@ -1,7 +1,7 @@ -From ee6ecf00c056184730623b0a09f8e1ce0adb3d24 Mon Sep 17 00:00:00 2001 +From 3df5b83cf844e053806a57afd5a4af8d11617c5d Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Sat, 13 Apr 2019 05:45:18 +0000 -Subject: [PATCH 03/53] LOCAL: arm64: fix Kodi sysinfo CPU information +Subject: [PATCH 03/37] LOCAL: arm64: fix Kodi sysinfo CPU information This allows the CPU information to show in the Kodi sysinfo screen, e.g. @@ -9,23 +9,25 @@ This allows the CPU information to show in the Kodi sysinfo screen, e.g. Signed-off-by: Christian Hewitt --- - arch/arm64/kernel/cpuinfo.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) + arch/arm64/kernel/cpuinfo.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c -index 47043c0d95ec..03410a9fac77 100644 +index c1f2b6b04b41..8bbdb64ec3ec 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c -@@ -190,8 +190,7 @@ static int c_show(struct seq_file *m, void *v) - * "processor". Give glibc what it expects. - */ - seq_printf(m, "processor\t: %d\n", i); -- if (compat) -- seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", -+ seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", - MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); +@@ -221,9 +221,8 @@ static int c_show(struct seq_file *m, void *v) + * "processor". Give glibc what it expects. + */ + seq_printf(m, "processor\t: %d\n", cpu); +- if (compat) +- seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", +- MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); ++ seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n", ++ MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); - seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", + seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", + loops_per_jiffy / (500000UL/HZ), -- 2.34.1 diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch index 0f6de6fc9b..5111ef0caa 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch @@ -1,7 +1,7 @@ -From 18375f3ce86dcec9a07f711b696aefb6fcb79829 Mon Sep 17 00:00:00 2001 +From cacea1a7dcf9e69c3d1cfc1026a05a9332bf9837 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 3 Nov 2016 15:29:23 +0100 -Subject: [PATCH 04/53] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend +Subject: [PATCH 04/37] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend The Amlogic Meson GX SoCs uses a non-standard argument to the PSCI CPU_SUSPEND call to enter system suspend. diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch index cecc66fa33..84a1cb9201 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch @@ -1,7 +1,7 @@ -From 346f8f56697d21901ca2c5d48c7beecc654131c0 Mon Sep 17 00:00:00 2001 +From ac95c04240bf6d1f12158f819bb9c0a0d06d6653 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 3 Nov 2016 15:29:25 +0100 -Subject: [PATCH 05/53] LOCAL: arm64: dts: meson: add support for GX PM and +Subject: [PATCH 05/37] LOCAL: arm64: dts: meson: add support for GX PM and Virtual RTC Signed-off-by: Neil Armstrong @@ -10,7 +10,7 @@ Signed-off-by: Neil Armstrong 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index 5f9b0854c201..b702a7f7bcf5 100644 +index eebd4a4d388c..260628cf218e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -223,6 +223,10 @@ sm: secure-monitor { diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch index 324ef8beed..4c8ab5a200 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch @@ -1,7 +1,7 @@ -From e288d4c79fb45f1af148b279bcfd091f770e9070 Mon Sep 17 00:00:00 2001 +From 3198831b6d71337b85e5011fc820ea13057ab3a6 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Thu, 21 Jan 2021 01:35:36 +0000 -Subject: [PATCH 06/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to +Subject: [PATCH 06/37] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Khadas VIM Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1 @@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -index fea65f20523a..dacbca73279c 100644 +index 4e89d6f6bb57..e137ebd48c5e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts @@ -29,6 +29,8 @@ button-function { diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch index 75410562d0..2282fd4014 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch @@ -1,7 +1,7 @@ -From 1ebc6f1a726d896fb8c72ed5e86423ad2485eea1 Mon Sep 17 00:00:00 2001 +From 596472232f2a08c7dd62597c9c041be4333e22b0 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Sat, 6 Nov 2021 13:01:08 +0000 -Subject: [PATCH 07/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to +Subject: [PATCH 07/37] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Khadas VIM2 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1 @@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -index 860f307494c5..cee27e7222c8 100644 +index 2a09b3d550e2..8a89940869b0 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts @@ -18,6 +18,8 @@ / { diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch index f409cb8d95..3b0320ff6d 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch @@ -1,7 +1,7 @@ -From 83e3e72c22bd9261d248c2dda723d5fb3abd4ab9 Mon Sep 17 00:00:00 2001 +From a8f90df94245a52d5a0aff58a640b5c86e0ed83c Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Mon, 1 Feb 2021 19:27:40 +0000 -Subject: [PATCH 08/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix +Subject: [PATCH 08/37] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix NEO U9-H Add node aliases to prevent meson-vrtc from claiming /dev/rtc0 diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch index 7149dafbb2..d0b613ea24 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch @@ -1,7 +1,7 @@ -From b419174ce9cd28aa55673140319aa4317922d0d7 Mon Sep 17 00:00:00 2001 +From e751b7cfeaca07cef1b14cebbd4dc567ed50ed37 Mon Sep 17 00:00:00 2001 From: Anssi Hannula Date: Sun, 17 Apr 2022 04:37:48 +0000 -Subject: [PATCH 09/53] LOCAL: ASoC: meson: assign internal PCM +Subject: [PATCH 09/37] LOCAL: ASoC: meson: assign internal PCM chmap/ELD/IEC958 kctls to device 0 On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls @@ -24,26 +24,26 @@ Tested-by: Christian Hewitt 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c -index 41103e5c43ce..0db7fe63911e 100644 +index 6eaa950504cf..f2f05f1c4f98 100644 --- a/sound/core/pcm_lib.c +++ b/sound/core/pcm_lib.c -@@ -2581,7 +2581,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream, +@@ -2612,7 +2612,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream, knew.name = "Playback Channel Map"; else knew.name = "Capture Channel Map"; - knew.device = pcm->device; + if (pcm->internal && pcm->device) -+ dev_info(pcm->card->dev, "workaround active: internal PCM chmap controls mapped to device 0\n"); ++ dev_info(pcm->card->dev, "workaround: internal PCM chmap controls mapped to device 0\n"); + else + knew.device = pcm->device; knew.count = pcm->streams[stream].substream_count; knew.private_value = private_value; info->kctl = snd_ctl_new1(&knew, info); diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c -index d3abb7ce2153..e06b28c7e5ba 100644 +index 31121f9c18c9..606abb3889c1 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c -@@ -802,7 +802,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, +@@ -821,7 +821,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, if (!kctl) return -ENOMEM; diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch index 77f185f16d..861e3db353 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch @@ -1,7 +1,7 @@ -From 9787871fe1e00af9f915237be4474a3b1f1e0887 Mon Sep 17 00:00:00 2001 +From 3de630c16f0ddbaa6442ebc3b6938bc1c4526b34 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Thu, 5 Jan 2023 15:16:46 +0000 -Subject: [PATCH 10/53] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware +Subject: [PATCH 10/37] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware decoding The MPEG1/2 decoder is broken and nobody has volunteered to poke @@ -11,11 +11,11 @@ hardware decoding for now. Signed-off-by: Christian Hewitt --- - .../staging/media/meson/vdec/vdec_platform.c | 110 ------------------ - 1 file changed, 110 deletions(-) + .../staging/media/meson/vdec/vdec_platform.c | 132 ------------------ + 1 file changed, 132 deletions(-) diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c -index 70c9fd7c8bc5..f1df637681e5 100644 +index 66bb307db85a..8a7e5b3f5d00 100644 --- a/drivers/staging/media/meson/vdec/vdec_platform.c +++ b/drivers/staging/media/meson/vdec/vdec_platform.c @@ -26,28 +26,6 @@ static const struct amvdec_format vdec_formats_gxbb[] = { @@ -76,7 +76,7 @@ index 70c9fd7c8bc5..f1df637681e5 100644 }, }; -@@ -126,28 +82,6 @@ static const struct amvdec_format vdec_formats_gxm[] = { +@@ -114,28 +70,6 @@ static const struct amvdec_format vdec_formats_gxlx[] = { .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, .flags = V4L2_FMT_FLAG_COMPRESSED | V4L2_FMT_FLAG_DYN_RESOLUTION, @@ -105,7 +105,7 @@ index 70c9fd7c8bc5..f1df637681e5 100644 }, }; -@@ -176,28 +110,6 @@ static const struct amvdec_format vdec_formats_g12a[] = { +@@ -164,28 +98,6 @@ static const struct amvdec_format vdec_formats_gxm[] = { .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, .flags = V4L2_FMT_FLAG_COMPRESSED | V4L2_FMT_FLAG_DYN_RESOLUTION, @@ -134,7 +134,36 @@ index 70c9fd7c8bc5..f1df637681e5 100644 }, }; -@@ -226,28 +138,6 @@ static const struct amvdec_format vdec_formats_sm1[] = { +@@ -214,28 +126,6 @@ static const struct amvdec_format vdec_formats_g12a[] = { + .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, + .flags = V4L2_FMT_FLAG_COMPRESSED | + V4L2_FMT_FLAG_DYN_RESOLUTION, +- }, { +- .pixfmt = V4L2_PIX_FMT_MPEG1, +- .min_buffers = 8, +- .max_buffers = 8, +- .max_width = 1920, +- .max_height = 1080, +- .vdec_ops = &vdec_1_ops, +- .codec_ops = &codec_mpeg12_ops, +- .firmware_path = "meson/vdec/gxl_mpeg12.bin", +- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, +- .flags = V4L2_FMT_FLAG_COMPRESSED, +- }, { +- .pixfmt = V4L2_PIX_FMT_MPEG2, +- .min_buffers = 8, +- .max_buffers = 8, +- .max_width = 1920, +- .max_height = 1080, +- .vdec_ops = &vdec_1_ops, +- .codec_ops = &codec_mpeg12_ops, +- .firmware_path = "meson/vdec/gxl_mpeg12.bin", +- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, +- .flags = V4L2_FMT_FLAG_COMPRESSED, + }, + }; + +@@ -264,28 +154,6 @@ static const struct amvdec_format vdec_formats_sm1[] = { .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, .flags = V4L2_FMT_FLAG_COMPRESSED | V4L2_FMT_FLAG_DYN_RESOLUTION, diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.9-arm64-dts-meson-g12-common-Set-the-rates.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.9-arm64-dts-meson-g12-common-Set-the-rates.patch deleted file mode 100644 index 3776c6bccb..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.9-arm64-dts-meson-g12-common-Set-the-rates.patch +++ /dev/null @@ -1,31 +0,0 @@ -From f376bb7ba1afbca87fba7b98f31697cba6776b1b Mon Sep 17 00:00:00 2001 -From: Tomeu Vizoso -Date: Mon, 16 Oct 2023 10:02:03 +0200 -Subject: [PATCH 11/53] FROMGIT(6.9): arm64: dts: meson-g12-common: Set the - rates of the clocks for the NPU - -Otherwise they are left at 24MHz and the NPU runs very slowly. - -Signed-off-by: Tomeu Vizoso -Suggested-by: Lucas Stach ---- - arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi -index f7f8df88d464..a960d07f9af3 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi -@@ -2502,6 +2502,9 @@ npu: npu@ff100000 { - clocks = <&clkc CLKID_NNA_CORE_CLK>, - <&clkc CLKID_NNA_AXI_CLK>; - clock-names = "core", "bus"; -+ assigned-clocks = <&clkc CLKID_NNA_CORE_CLK>, -+ <&clkc CLKID_NNA_AXI_CLK>; -+ assigned-clock-rates = <800000000>, <800000000>; - resets = <&reset RESET_NNA>; - status = "disabled"; - }; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMLIST-v1-drm-meson-fix-resource-cleanup-in-meson_.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMLIST-v1-drm-meson-fix-resource-cleanup-in-meson_.patch new file mode 100644 index 0000000000..17e56302c3 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMLIST-v1-drm-meson-fix-resource-cleanup-in-meson_.patch @@ -0,0 +1,138 @@ +From 4c895bf75fbf67654d02032cfbdfa57fa4777b20 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Wed, 9 Apr 2025 23:44:22 +0200 +Subject: [PATCH 11/37] FROMLIST(v1): drm/meson: fix resource cleanup in + meson_drv_bind_master() on error + +meson_drv_bind_master() does not free resources in the order they are +allocated. This can lead to crashes such as: + Unable to handle kernel NULL pointer dereference at virtual address 00000000000000c8 + [...] + Hardware name: Beelink GT-King Pro (DT) + pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) + pc : meson_dw_hdmi_unbind+0x10/0x24 [meson_dw_hdmi] + lr : component_unbind+0x38/0x60 + [...] + Call trace: + meson_dw_hdmi_unbind+0x10/0x24 [meson_dw_hdmi] + component_unbind+0x38/0x60 + component_unbind_all+0xb8/0xc4 + meson_drv_bind_master+0x1ec/0x514 [meson_drm] + meson_drv_bind+0x14/0x20 [meson_drm] + try_to_bring_up_aggregate_device+0xa8/0x160 + __component_add+0xb8/0x1a8 + component_add+0x14/0x20 + meson_dw_hdmi_probe+0x1c/0x28 [meson_dw_hdmi] + platform_probe+0x68/0xdc + really_probe+0xc0/0x39c + __driver_probe_device+0x7c/0x14c + driver_probe_device+0x3c/0x120 + __driver_attach+0xc4/0x200 + bus_for_each_dev+0x78/0xd8 + driver_attach+0x24/0x30 + bus_add_driver+0x110/0x240 + driver_register+0x68/0x124 + __platform_driver_register+0x24/0x30 + meson_dw_hdmi_platform_driver_init+0x20/0x1000 [meson_dw_hdmi] + do_one_initcall+0x50/0x1bc + do_init_module+0x54/0x1fc + load_module+0x788/0x884 + init_module_from_file+0x88/0xd4 + __arm64_sys_finit_module+0x248/0x340 + invoke_syscall+0x48/0x104 + el0_svc_common.constprop.0+0x40/0xe0 + do_el0_svc+0x1c/0x28 + el0_svc+0x30/0xcc + el0t_64_sync_handler+0x120/0x12c + el0t_64_sync+0x190/0x194 + +Clean up resources in the error path in the same order and under the +same conditions as they were allocated to fix this. + +Reported-by: Furkan Kardame +Signed-off-by: Martin Blumenstingl +--- + drivers/gpu/drm/meson/meson_drv.c | 31 +++++++++++++++++-------------- + 1 file changed, 17 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index 49ff9f1f16d3..ea5bda297a74 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -314,35 +314,35 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + dev_err(drm->dev, "Couldn't bind all components\n"); + /* Do not try to unbind */ + has_components = false; +- goto exit_afbcd; ++ goto cvbs_encoder_remove; + } + } + + ret = meson_encoder_hdmi_probe(priv); + if (ret) +- goto exit_afbcd; ++ goto unbind_components; + + if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { + ret = meson_encoder_dsi_probe(priv); + if (ret) +- goto exit_afbcd; ++ goto hdmi_encoder_remove; + } + + ret = meson_plane_create(priv); + if (ret) +- goto exit_afbcd; ++ goto dsi_encoder_remove; + + ret = meson_overlay_create(priv); + if (ret) +- goto exit_afbcd; ++ goto dsi_encoder_remove; + + ret = meson_crtc_create(priv); + if (ret) +- goto exit_afbcd; ++ goto dsi_encoder_remove; + + ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm); + if (ret) +- goto exit_afbcd; ++ goto dsi_encoder_remove; + + drm_mode_config_reset(drm); + +@@ -360,6 +360,16 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + + uninstall_irq: + free_irq(priv->vsync_irq, drm); ++dsi_encoder_remove: ++ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) ++ meson_encoder_dsi_remove(priv); ++hdmi_encoder_remove: ++ meson_encoder_hdmi_remove(priv); ++unbind_components: ++ if (has_components) ++ component_unbind_all(dev, drm); ++cvbs_encoder_remove: ++ meson_encoder_cvbs_remove(priv); + exit_afbcd: + if (priv->afbcd.ops) + priv->afbcd.ops->exit(priv); +@@ -374,13 +384,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + free_drm: + drm_dev_put(drm); + +- meson_encoder_dsi_remove(priv); +- meson_encoder_hdmi_remove(priv); +- meson_encoder_cvbs_remove(priv); +- +- if (has_components) +- component_unbind_all(dev, drm); +- + return ret; + } + +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.9-arm64-dts-amlogic-replace-underscores-in.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.9-arm64-dts-amlogic-replace-underscores-in.patch deleted file mode 100644 index eea4349c90..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMGIT-6.9-arm64-dts-amlogic-replace-underscores-in.patch +++ /dev/null @@ -1,1667 +0,0 @@ -From 9a7fc97f7f23a93a23d3325a3a01ec4df23ac274 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Tue, 13 Feb 2024 15:32:17 +0100 -Subject: [PATCH 12/53] FROMGIT(6.9): arm64: dts: amlogic: replace underscores - in node names - -Underscores should not be used in node names (dtc with W=2 warns about -them), so replace them with hyphens. - -Cc: Marc Gonzalez -Signed-off-by: Krzysztof Kozlowski -Reviewed-by: Neil Armstrong ---- - .../arm64/boot/dts/amlogic/meson-a1-ad402.dts | 2 +- - .../meson-axg-jethome-jethub-j1xx.dtsi | 14 ++++++------- - .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 16 +++++++-------- - .../dts/amlogic/meson-g12a-radxa-zero.dts | 12 +++++------ - .../boot/dts/amlogic/meson-g12a-sei510.dts | 14 ++++++------- - .../boot/dts/amlogic/meson-g12a-u200.dts | 16 +++++++-------- - .../boot/dts/amlogic/meson-g12a-x96-max.dts | 14 ++++++------- - .../dts/amlogic/meson-g12b-odroid-n2.dtsi | 2 +- - .../boot/dts/amlogic/meson-g12b-odroid.dtsi | 20 +++++++++---------- - .../boot/dts/amlogic/meson-g12b-w400.dtsi | 10 +++++----- - .../dts/amlogic/meson-gx-libretech-pc.dtsi | 12 +++++------ - .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 8 ++++---- - .../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 6 +++--- - .../boot/dts/amlogic/meson-gxbb-odroidc2.dts | 8 ++++---- - .../boot/dts/amlogic/meson-gxbb-p200.dts | 4 ++-- - .../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 6 +++--- - .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 8 ++++---- - .../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 8 ++++---- - .../amlogic/meson-gxl-s805x-libretech-ac.dts | 8 ++++---- - .../boot/dts/amlogic/meson-gxl-s805x-p241.dts | 8 ++++---- - .../meson-gxl-s905w-jethome-jethub-j80.dts | 8 ++++---- - .../meson-gxl-s905x-hwacom-amazetv.dts | 6 +++--- - .../meson-gxl-s905x-libretech-cc-v2.dts | 12 +++++------ - .../amlogic/meson-gxl-s905x-libretech-cc.dts | 6 +++--- - .../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 6 +++--- - .../dts/amlogic/meson-gxl-s905x-p212.dtsi | 8 ++++---- - .../dts/amlogic/meson-gxm-khadas-vim2.dts | 8 ++++---- - .../amlogic/meson-gxm-s912-libretech-pc.dts | 2 +- - .../boot/dts/amlogic/meson-khadas-vim3.dtsi | 16 +++++++-------- - .../amlogic/meson-libretech-cottonwood.dtsi | 6 +++--- - .../boot/dts/amlogic/meson-sm1-ac2xx.dtsi | 10 +++++----- - .../boot/dts/amlogic/meson-sm1-bananapi.dtsi | 14 ++++++------- - .../boot/dts/amlogic/meson-sm1-odroid-hc4.dts | 4 ++-- - .../boot/dts/amlogic/meson-sm1-odroid.dtsi | 20 +++++++++---------- - .../boot/dts/amlogic/meson-sm1-sei610.dts | 12 +++++------ - 35 files changed, 167 insertions(+), 167 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts b/arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts -index 1c20516fa653..4bc30af05848 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-a1-ad402.dts -@@ -106,7 +106,7 @@ &spifc { - pinctrl-0 = <&spifc_pins>; - pinctrl-names = "default"; - -- spi_nand@0 { -+ flash@0 { - compatible = "spi-nand"; - status = "okay"; - reg = <0>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi -index db605f3a22b4..a53e1fe9ac1e 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi -@@ -35,7 +35,7 @@ emmc_pwrseq: emmc-pwrseq { - reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -44,7 +44,7 @@ vcc_3v3: regulator-vcc_3v3 { - regulator-always-on; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC5V"; - regulator-min-microvolt = <5000000>; -@@ -52,7 +52,7 @@ vcc_5v: regulator-vcc_5v { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -61,7 +61,7 @@ vddao_3v3: regulator-vddao_3v3 { - regulator-always-on; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -70,7 +70,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <3300000>; -@@ -79,7 +79,7 @@ vddio_boot: regulator-vddio_boot { - regulator-always-on; - }; - -- vccq_1v8: regulator-vccq_1v8 { -+ vccq_1v8: regulator-vccq-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCCQ_1V8"; - regulator-min-microvolt = <1800000>; -@@ -88,7 +88,7 @@ vccq_1v8: regulator-vccq_1v8 { - regulator-always-on; - }; - -- usb_pwr: regulator-usb_pwr { -+ usb_pwr: regulator-usb-pwr { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts -index c8905663bc75..7ed526f45175 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts -@@ -12,7 +12,7 @@ / { - compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg"; - model = "Amlogic Meson AXG S400 Development Board"; - -- adc_keys { -+ keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; -@@ -111,7 +111,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- main_12v: regulator-main_12v { -+ main_12v: regulator-main-12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; -@@ -119,7 +119,7 @@ main_12v: regulator-main_12v { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -128,7 +128,7 @@ vcc_3v3: regulator-vcc_3v3 { - regulator-always-on; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC5V"; - regulator-min-microvolt = <5000000>; -@@ -139,7 +139,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -148,7 +148,7 @@ vddao_3v3: regulator-vddao_3v3 { - regulator-always-on; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -157,7 +157,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; -@@ -166,7 +166,7 @@ vddio_boot: regulator-vddio_boot { - regulator-always-on; - }; - -- usb_pwr: regulator-usb_pwr { -+ usb_pwr: regulator-usb-pwr { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts -index fcd7e1d8e16f..15b9bc280706 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts -@@ -60,7 +60,7 @@ sdio_pwrseq: sdio-pwrseq { - clock-names = "ext_clock"; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -68,7 +68,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -77,7 +77,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -86,7 +86,7 @@ vcc_3v3: regulator-vcc_3v3 { - regulator-always-on; - }; - -- hdmi_pw: regulator-hdmi_pw { -+ hdmi_pw: regulator-hdmi-pw { - compatible = "regulator-fixed"; - regulator-name = "HDMI_PW"; - regulator-min-microvolt = <5000000>; -@@ -95,7 +95,7 @@ hdmi_pw: regulator-hdmi_pw { - regulator-always-on; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -104,7 +104,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts -index 4c4550dd4711..61cb8135a392 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts -@@ -15,7 +15,7 @@ / { - compatible = "seirobotics,sei510", "amlogic,g12a"; - model = "SEI Robotics SEI510"; - -- adc_keys { -+ keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; -@@ -83,7 +83,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -92,7 +92,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -100,7 +100,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- emmc_1v8: regulator-emmc_1v8 { -+ emmc_1v8: regulator-emmc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -109,7 +109,7 @@ emmc_1v8: regulator-emmc_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -118,7 +118,7 @@ vddao_3v3: regulator-vddao_3v3 { - regulator-always-on; - }; - -- vddao_3v3_t: regultor-vddao_3v3_t { -+ vddao_3v3_t: regulator-vddao-3v3-t { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3_T"; - regulator-min-microvolt = <3300000>; -@@ -147,7 +147,7 @@ vddcpu: regulator-vddcpu { - regulator-always-on; - }; - -- vddio_ao1v8: regulator-vddio_ao1v8 { -+ vddio_ao1v8: regulator-vddio-ao1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO1V8"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts -index 8355ddd7e9ae..3da7922d83f1 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts -@@ -75,7 +75,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- flash_1v8: regulator-flash_1v8 { -+ flash_1v8: regulator-flash-1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; -@@ -84,7 +84,7 @@ flash_1v8: regulator-flash_1v8 { - regulator-always-on; - }; - -- main_12v: regulator-main_12v { -+ main_12v: regulator-main-12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; -@@ -92,7 +92,7 @@ main_12v: regulator-main_12v { - regulator-always-on; - }; - -- usb_pwr_en: regulator-usb_pwr_en { -+ usb_pwr_en: regulator-usb-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR_EN"; - regulator-min-microvolt = <5000000>; -@@ -103,7 +103,7 @@ usb_pwr_en: regulator-usb_pwr_en { - enable-active-high; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -112,7 +112,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -122,7 +122,7 @@ vcc_3v3: regulator-vcc_3v3 { - /* FIXME: actually controlled by VDDCPU_B_EN */ - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC_5V"; - regulator-min-microvolt = <5000000>; -@@ -133,7 +133,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -142,7 +142,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts -index 9b55982b6a6b..05c7a1e3f1b7 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts -@@ -66,7 +66,7 @@ sdio_pwrseq: sdio-pwrseq { - clock-names = "ext_clock"; - }; - -- flash_1v8: regulator-flash_1v8 { -+ flash_1v8: regulator-flash-1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; -@@ -75,7 +75,7 @@ flash_1v8: regulator-flash_1v8 { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -83,7 +83,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -92,7 +92,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -102,7 +102,7 @@ vcc_3v3: regulator-vcc_3v3 { - /* FIXME: actually controlled by VDDCPU_B_EN */ - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC_5V"; - regulator-min-microvolt = <5000000>; -@@ -112,7 +112,7 @@ vcc_5v: regulator-vcc_5v { - gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -121,7 +121,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -index 91c9769fda20..d80dd9a3da31 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -@@ -19,7 +19,7 @@ dio2133: audio-amplifier-0 { - status = "okay"; - }; - -- hub_5v: regulator-hub_5v { -+ hub_5v: regulator-hub-5v { - compatible = "regulator-fixed"; - regulator-name = "HUB_5V"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi -index 9e12a34b2840..09d959aefb18 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi -@@ -48,7 +48,7 @@ led-blue { - }; - }; - -- tflash_vdd: regulator-tflash_vdd { -+ tflash_vdd: regulator-tflash-vdd { - compatible = "regulator-fixed"; - - regulator-name = "TFLASH_VDD"; -@@ -60,7 +60,7 @@ tflash_vdd: regulator-tflash_vdd { - regulator-always-on; - }; - -- tf_io: gpio-regulator-tf_io { -+ tf_io: gpio-regulator-tf-io { - compatible = "regulator-gpio"; - - regulator-name = "TF_IO"; -@@ -74,7 +74,7 @@ tf_io: gpio-regulator-tf_io { - <1800000 1>; - }; - -- flash_1v8: regulator-flash_1v8 { -+ flash_1v8: regulator-flash-1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; -@@ -83,7 +83,7 @@ flash_1v8: regulator-flash_1v8 { - regulator-always-on; - }; - -- main_12v: regulator-main_12v { -+ main_12v: regulator-main-12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; -@@ -91,7 +91,7 @@ main_12v: regulator-main_12v { - regulator-always-on; - }; - -- usb_pwr_en: regulator-usb_pwr_en { -+ usb_pwr_en: regulator-usb-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR_EN"; - regulator-min-microvolt = <5000000>; -@@ -103,7 +103,7 @@ usb_pwr_en: regulator-usb_pwr_en { - enable-active-high; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; -@@ -114,7 +114,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -123,7 +123,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -171,7 +171,7 @@ vddcpu_b: regulator-vddcpu-b { - regulator-always-on; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -180,7 +180,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi -index ac8b7178257e..4cb6930ffb19 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi -@@ -39,7 +39,7 @@ sdio_pwrseq: sdio-pwrseq { - clock-names = "ext_clock"; - }; - -- flash_1v8: regulator-flash_1v8 { -+ flash_1v8: regulator-flash-1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; -@@ -48,7 +48,7 @@ flash_1v8: regulator-flash_1v8 { - regulator-always-on; - }; - -- main_12v: regulator-main_12v { -+ main_12v: regulator-main-12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; -@@ -56,7 +56,7 @@ main_12v: regulator-main_12v { - regulator-always-on; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC_5V"; - regulator-min-microvolt = <5000000>; -@@ -67,7 +67,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -76,7 +76,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi -index 5e7b9273b062..efd662a452e8 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi -@@ -84,7 +84,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x80000000>; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -93,7 +93,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -120,7 +120,7 @@ led-blue { - }; - }; - -- vcc_card: regulator-vcc_card { -+ vcc_card: regulator-vcc-card { - compatible = "regulator-fixed"; - regulator-name = "VCC_CARD"; - regulator-min-microvolt = <3300000>; -@@ -141,7 +141,7 @@ vcc5v: regulator-vcc5v { - gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -150,7 +150,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vddio_ao3v3: regulator-vddio_ao3v3 { -+ vddio_ao3v3: regulator-vddio-ao3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO3V3"; - regulator-min-microvolt = <3300000>; -@@ -159,7 +159,7 @@ vddio_ao3v3: regulator-vddio_ao3v3 { - regulator-always-on; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -index e59c3c92b1e7..08d6b69ba469 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -@@ -50,28 +50,28 @@ hdmi_5v: regulator-hdmi-5v { - regulator-always-on; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -index 4aab1ab705b4..cca129ce2c58 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -@@ -78,21 +78,21 @@ vddio_card: gpio-regulator { - <3300000 1>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -index e6d2de7c45a9..c431986e6a33 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -@@ -67,7 +67,7 @@ p5v0: regulator-p5v0 { - regulator-always-on; - }; - -- hdmi_p5v0: regulator-hdmi_p5v0 { -+ hdmi_p5v0: regulator-hdmi-p5v0 { - compatible = "regulator-fixed"; - regulator-name = "HDMI_P5V0"; - regulator-min-microvolt = <5000000>; -@@ -76,7 +76,7 @@ hdmi_p5v0: regulator-hdmi_p5v0 { - vin-supply = <&p5v0>; - }; - -- tflash_vdd: regulator-tflash_vdd { -+ tflash_vdd: regulator-tflash-vdd { - compatible = "regulator-fixed"; - - regulator-name = "TFLASH_VDD"; -@@ -92,7 +92,7 @@ tflash_vdd: regulator-tflash_vdd { - vin-supply = <&vddio_ao3v3>; - }; - -- tf_io: gpio-regulator-tf_io { -+ tf_io: gpio-regulator-tf-io { - compatible = "regulator-gpio"; - - regulator-name = "TF_IO"; -@@ -148,7 +148,7 @@ vddio_ao3v3: regulator-vddio-ao3v3 { - vin-supply = <&p5v0>; - }; - -- ddr3_1v5: regulator-ddr3_1v5 { -+ ddr3_1v5: regulator-ddr3-1v5 { - compatible = "regulator-fixed"; - regulator-name = "DDR3_1V5"; - regulator-min-microvolt = <1500000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts -index 591455c50e88..7f94716876d3 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts -@@ -21,14 +21,14 @@ spdif_dit: audio-codec-0 { - sound-name-prefix = "DIT"; - }; - -- avdd18_usb_adc: regulator-avdd18_usb_adc { -+ avdd18_usb_adc: regulator-avdd18-usb-adc { - compatible = "regulator-fixed"; - regulator-name = "AVDD18_USB_ADC"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- adc_keys { -+ keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -index e803a466fe4e..52d57773a77f 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -@@ -53,21 +53,21 @@ vddio_card: gpio-regulator { - regulator-settling-time-down-us = <150000>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -index 74df32534231..255e93a0b36d 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -@@ -47,28 +47,28 @@ usb_pwr: regulator-usb-pwrs { - enable-active-high; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -index 94dafb955301..deb295227189 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -@@ -49,21 +49,21 @@ usb_pwr: regulator-usb-pwrs { - enable-active-high; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -71,7 +71,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts -index a29b49f051ae..90ef9c17d80b 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts -@@ -42,7 +42,7 @@ cvbs_connector_in: endpoint { - }; - }; - -- dc_5v: regulator-dc_5v { -+ dc_5v: regulator-dc-5v { - compatible = "regulator-fixed"; - regulator-name = "DC_5V"; - regulator-min-microvolt = <5000000>; -@@ -89,7 +89,7 @@ vcck: regulator-vcck { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -98,7 +98,7 @@ vcc_3v3: regulator-vcc_3v3 { - regulator-always-on; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -107,7 +107,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts -index c0d6eb55100a..08a4718219b1 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts -@@ -64,28 +64,28 @@ memory@0 { - reg = <0x0 0x0 0x0 0x20000000>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts -index a18d6d241a5a..2b94b6e5285e 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-jethome-jethub-j80.dts -@@ -37,28 +37,28 @@ chosen { - stdout-path = "serial0:115200n8"; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts -index c8d74e61dec1..89fe5110f7a2 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts -@@ -42,21 +42,21 @@ vddio_card: gpio-regulator { - <3300000 1>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts -index 2825db91e462..63b20860067c 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts -@@ -67,7 +67,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x80000000>; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -76,7 +76,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -93,7 +93,7 @@ vcck: regulator-vcck { - regulator-always-on; - }; - -- vcc_card: regulator-vcc_card { -+ vcc_card: regulator-vcc-card { - compatible = "regulator-fixed"; - regulator-name = "VCC_CARD"; - regulator-min-microvolt = <3300000>; -@@ -114,7 +114,7 @@ vcc5v: regulator-vcc5v { - gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>; - }; - -- vddio_ao3v3: regulator-vddio_ao3v3 { -+ vddio_ao3v3: regulator-vddio-ao3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO3V3"; - regulator-min-microvolt = <3300000>; -@@ -139,7 +139,7 @@ vddio_card: regulator-vddio-card { - regulator-settling-time-down-us = <50000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -148,7 +148,7 @@ vddio_ao18: regulator-vddio_ao18 { - regulator-always-on; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC 1V8"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -index 27093e6ac9e2..8b26c9661be1 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -@@ -93,7 +93,7 @@ hdmi_5v: regulator-hdmi-5v { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -117,7 +117,7 @@ vcc_card: regulator-vcc-card { - regulator-settling-time-down-us = <50000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -125,7 +125,7 @@ vddio_ao18: regulator-vddio_ao18 { - }; - - /* This is provided by LDOs on the eMMC daugther card */ -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -index f1acca5c4434..c79f9f2099bf 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -@@ -42,21 +42,21 @@ vddio_card: gpio-regulator { - <3300000 1>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -index a150cc0e18ff..7e7dc87ede2d 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -@@ -39,28 +39,28 @@ hdmi_5v: regulator-hdmi-5v { - regulator-always-on; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -index cee27e7222c8..a03269a00486 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -@@ -114,28 +114,28 @@ hdmi_5v: regulator-hdmi-5v { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddio_boot: regulator-vddio_boot { -+ vddio_boot: regulator-vddio-boot { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_BOOT"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-libretech-pc.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-libretech-pc.dts -index 4eda9f634c42..a66f19851ac9 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-s912-libretech-pc.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-s912-libretech-pc.dts -@@ -14,7 +14,7 @@ / { - "amlogic,meson-gxm"; - model = "Libre Computer AML-S912-PC"; - -- typec2_vbus: regulator-typec2_vbus { -+ typec2_vbus: regulator-typec2-vbus { - compatible = "regulator-fixed"; - regulator-name = "TYPEC2_VBUS"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi -index 514a6dd4b124..e78cc9b577a0 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi -@@ -80,7 +80,7 @@ sdio_pwrseq: sdio-pwrseq { - clock-names = "ext_clock"; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -88,7 +88,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "VCC_5V"; - regulator-min-microvolt = <5000000>; -@@ -99,7 +99,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -108,7 +108,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -118,7 +118,7 @@ vcc_3v3: regulator-vcc_3v3 { - /* FIXME: actually controlled by VDDCPU_B_EN */ - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO1V8"; - regulator-min-microvolt = <1800000>; -@@ -127,7 +127,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- emmc_1v8: regulator-emmc_1v8 { -+ emmc_1v8: regulator-emmc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_AO1V8"; - regulator-min-microvolt = <1800000>; -@@ -136,7 +136,7 @@ emmc_1v8: regulator-emmc_1v8 { - regulator-always-on; - }; - -- vsys_3v3: regulator-vsys_3v3 { -+ vsys_3v3: regulator-vsys-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VSYS_3V3"; - regulator-min-microvolt = <3300000>; -@@ -145,7 +145,7 @@ vsys_3v3: regulator-vsys_3v3 { - regulator-always-on; - }; - -- usb_pwr: regulator-usb_pwr { -+ usb_pwr: regulator-usb-pwr { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi -index 35e8f5bae990..082b72703cdf 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi -@@ -150,7 +150,7 @@ vcc_5v: regulator-vcc-5v { - gpio-open-drain; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -171,7 +171,7 @@ vddcpu_b: regulator-vddcpu-b { - pwm-dutycycle-range = <100 0>; - }; - -- vddio_ao18: regulator-vddio_ao18 { -+ vddio_ao18: regulator-vddio-ao18 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO18"; - regulator-min-microvolt = <1800000>; -@@ -180,7 +180,7 @@ vddio_ao18: regulator-vddio_ao18 { - vin-supply = <&vddao_3v3>; - }; - -- vddio_c: regulator-vddio_c { -+ vddio_c: regulator-vddio-c { - compatible = "regulator-gpio"; - regulator-name = "VDDIO_C"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi -index 46a34731f7e2..d1fa8b8bf795 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi -@@ -54,7 +54,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -63,7 +63,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -71,7 +71,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- emmc_1v8: regulator-emmc_1v8 { -+ emmc_1v8: regulator-emmc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -80,7 +80,7 @@ emmc_1v8: regulator-emmc_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -105,7 +105,7 @@ vddcpu: regulator-vddcpu { - regulator-always-on; - }; - -- vddio_ao1v8: regulator-vddio_ao1v8 { -+ vddio_ao1v8: regulator-vddio-ao1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO1V8"; - regulator-min-microvolt = <1800000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi -index 62404743e62d..81dce862902a 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi -@@ -82,7 +82,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- emmc_1v8: regulator-emmc_1v8 { -+ emmc_1v8: regulator-emmc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -91,7 +91,7 @@ emmc_1v8: regulator-emmc_1v8 { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -99,7 +99,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- vddio_c: regulator-vddio_c { -+ vddio_c: regulator-vddio-c { - compatible = "regulator-gpio"; - regulator-name = "VDDIO_C"; - regulator-min-microvolt = <1800000>; -@@ -116,7 +116,7 @@ vddio_c: regulator-vddio_c { - <3300000 1>; - }; - -- tflash_vdd: regulator-tflash_vdd { -+ tflash_vdd: regulator-tflash-vdd { - compatible = "regulator-fixed"; - regulator-name = "TFLASH_VDD"; - regulator-min-microvolt = <3300000>; -@@ -127,7 +127,7 @@ tflash_vdd: regulator-tflash_vdd { - regulator-always-on; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -136,7 +136,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -165,7 +165,7 @@ vddcpu: regulator-vddcpu { - }; - - /* USB Hub Power Enable */ -- vl_pwr_en: regulator-vl_pwr_en { -+ vl_pwr_en: regulator-vl-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "VL_PWR_EN"; - regulator-min-microvolt = <5000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts -index 846a2d6c20e5..0170139b8d32 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts -@@ -43,7 +43,7 @@ led-red { - }; - - /* Powers the SATA Disk 0 regulator, which is enabled when a disk load is detected */ -- p12v_0: regulator-p12v_0 { -+ p12v_0: regulator-p12v-0 { - compatible = "regulator-fixed"; - regulator-name = "P12V_0"; - regulator-min-microvolt = <12000000>; -@@ -56,7 +56,7 @@ p12v_0: regulator-p12v_0 { - }; - - /* Powers the SATA Disk 1 regulator, which is enabled when a disk load is detected */ -- p12v_1: regulator-p12v_1 { -+ p12v_1: regulator-p12v-1 { - compatible = "regulator-fixed"; - regulator-name = "P12V_1"; - regulator-min-microvolt = <12000000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi -index 1db2327bbd13..951eb8e3f0c0 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi -@@ -28,7 +28,7 @@ emmc_pwrseq: emmc-pwrseq { - reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; - }; - -- tflash_vdd: regulator-tflash_vdd { -+ tflash_vdd: regulator-tflash-vdd { - compatible = "regulator-fixed"; - - regulator-name = "TFLASH_VDD"; -@@ -40,7 +40,7 @@ tflash_vdd: regulator-tflash_vdd { - regulator-always-on; - }; - -- tf_io: gpio-regulator-tf_io { -+ tf_io: gpio-regulator-tf-io { - compatible = "regulator-gpio"; - - regulator-name = "TF_IO"; -@@ -59,7 +59,7 @@ tf_io: gpio-regulator-tf_io { - <1800000 1>; - }; - -- flash_1v8: regulator-flash_1v8 { -+ flash_1v8: regulator-flash-1v8 { - compatible = "regulator-fixed"; - regulator-name = "FLASH_1V8"; - regulator-min-microvolt = <1800000>; -@@ -68,7 +68,7 @@ flash_1v8: regulator-flash_1v8 { - regulator-always-on; - }; - -- main_12v: regulator-main_12v { -+ main_12v: regulator-main-12v { - compatible = "regulator-fixed"; - regulator-name = "12V"; - regulator-min-microvolt = <12000000>; -@@ -76,7 +76,7 @@ main_12v: regulator-main_12v { - regulator-always-on; - }; - -- vcc_5v: regulator-vcc_5v { -+ vcc_5v: regulator-vcc-5v { - compatible = "regulator-fixed"; - regulator-name = "5V"; - regulator-min-microvolt = <5000000>; -@@ -87,7 +87,7 @@ vcc_5v: regulator-vcc_5v { - enable-active-high; - }; - -- vcc_1v8: regulator-vcc_1v8 { -+ vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -96,7 +96,7 @@ vcc_1v8: regulator-vcc_1v8 { - regulator-always-on; - }; - -- vcc_3v3: regulator-vcc_3v3 { -+ vcc_3v3: regulator-vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; - regulator-min-microvolt = <3300000>; -@@ -125,7 +125,7 @@ vddcpu: regulator-vddcpu { - regulator-always-on; - }; - -- usb_pwr_en: regulator-usb_pwr_en { -+ usb_pwr_en: regulator-usb-pwr-en { - compatible = "regulator-fixed"; - regulator-name = "USB_PWR_EN"; - regulator-min-microvolt = <5000000>; -@@ -137,7 +137,7 @@ usb_pwr_en: regulator-usb_pwr_en { - enable-active-high; - }; - -- vddao_1v8: regulator-vddao_1v8 { -+ vddao_1v8: regulator-vddao-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_1V8"; - regulator-min-microvolt = <1800000>; -@@ -146,7 +146,7 @@ vddao_1v8: regulator-vddao_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts -index 109932068dbe..3581e14cbf18 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts -@@ -127,7 +127,7 @@ memory@0 { - reg = <0x0 0x0 0x0 0x40000000>; - }; - -- ao_5v: regulator-ao_5v { -+ ao_5v: regulator-ao-5v { - compatible = "regulator-fixed"; - regulator-name = "AO_5V"; - regulator-min-microvolt = <5000000>; -@@ -136,7 +136,7 @@ ao_5v: regulator-ao_5v { - regulator-always-on; - }; - -- dc_in: regulator-dc_in { -+ dc_in: regulator-dc-in { - compatible = "regulator-fixed"; - regulator-name = "DC_IN"; - regulator-min-microvolt = <5000000>; -@@ -144,7 +144,7 @@ dc_in: regulator-dc_in { - regulator-always-on; - }; - -- emmc_1v8: regulator-emmc_1v8 { -+ emmc_1v8: regulator-emmc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "EMMC_1V8"; - regulator-min-microvolt = <1800000>; -@@ -153,7 +153,7 @@ emmc_1v8: regulator-emmc_1v8 { - regulator-always-on; - }; - -- vddao_3v3: regulator-vddao_3v3 { -+ vddao_3v3: regulator-vddao-3v3 { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3"; - regulator-min-microvolt = <3300000>; -@@ -163,7 +163,7 @@ vddao_3v3: regulator-vddao_3v3 { - }; - - /* Used by Tuner, RGB Led & IR Emitter LED array */ -- vddao_3v3_t: regulator-vddao_3v3_t { -+ vddao_3v3_t: regulator-vddao-3v3-t { - compatible = "regulator-fixed"; - regulator-name = "VDDAO_3V3_T"; - regulator-min-microvolt = <3300000>; -@@ -192,7 +192,7 @@ vddcpu: regulator-vddcpu { - regulator-always-on; - }; - -- vddio_ao1v8: regulator-vddio_ao1v8 { -+ vddio_ao1v8: regulator-vddio-ao1v8 { - compatible = "regulator-fixed"; - regulator-name = "VDDIO_AO1V8"; - regulator-min-microvolt = <1800000>; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch new file mode 100644 index 0000000000..1ae3e62929 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMLIST-v1-drm-meson-Avoid-use-after-free-issues-wi.patch @@ -0,0 +1,60 @@ +From 6745bff6c6c1ee1746c955504a3ea32d12ec8d79 Mon Sep 17 00:00:00 2001 +From: Zhang Kunbo +Date: Wed, 6 Nov 2024 02:45:48 +0000 +Subject: [PATCH 12/37] FROMLIST(v1): drm/meson: Avoid use-after-free issues + with crtc + +It's dangerous to call drm_crtc_init_with_planes() whose second +argument is allocated with devm_kzalloc() [1][2]. + +Use drmm_kzalloc instead to avoid UAF. + +[1] https://lore.kernel.org/all/a830685d8b10a00cfe0a86db1ee9fb13@ispras.ru +[2] https://lore.kernel.org/all/2111196.TG1k3f53YQ@avalon + +Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller") +Signed-off-by: Zhang Kunbo +--- + drivers/gpu/drm/meson/meson_crtc.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index d70616da8ce2..603022554a48 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + #include "meson_crtc.h" + #include "meson_plane.h" +@@ -72,7 +73,6 @@ static void meson_crtc_disable_vblank(struct drm_crtc *crtc) + static const struct drm_crtc_funcs meson_crtc_funcs = { + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, +- .destroy = drm_crtc_cleanup, + .page_flip = drm_atomic_helper_page_flip, + .reset = drm_atomic_helper_crtc_reset, + .set_config = drm_atomic_helper_set_config, +@@ -677,14 +677,14 @@ int meson_crtc_create(struct meson_drm *priv) + struct drm_crtc *crtc; + int ret; + +- meson_crtc = devm_kzalloc(priv->drm->dev, sizeof(*meson_crtc), ++ meson_crtc = drmm_kzalloc(priv->drm, sizeof(*meson_crtc), + GFP_KERNEL); + if (!meson_crtc) + return -ENOMEM; + + meson_crtc->priv = priv; + crtc = &meson_crtc->base; +- ret = drm_crtc_init_with_planes(priv->drm, crtc, ++ ret = drmm_crtc_init_with_planes(priv->drm, crtc, + priv->primary_plane, NULL, + &meson_crtc_funcs, "meson_crtc"); + if (ret) { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v2-media-si2168-increase-cmd-execution-time.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v2-media-si2168-increase-cmd-execution-time.patch new file mode 100644 index 0000000000..b5a751a2af --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v2-media-si2168-increase-cmd-execution-time.patch @@ -0,0 +1,69 @@ +From 4babe8c6a677ed0f21cf518c8ce78caecc8963b8 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 7 Feb 2025 04:29:08 +0000 +Subject: [PATCH 13/37] FROMLIST(v2): media: si2168: increase cmd execution + timeout value + +Testing with a MyGica T230C v2 USB device (0572:c68a) shows occasional +cmd timeouts that cause Tvheadend services to fail: + +Jan 28 12:23:46.788180 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms +Jan 28 12:23:46.790799 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms +Jan 28 12:23:46.878158 LibreELEC kernel: si2168 1-0060: cmd execution took 80 ms +Jan 28 12:23:46.879158 LibreELEC kernel: si2168 1-0060: failed=-110 +Jan 28 12:23:46.879908 LibreELEC kernel: si2168 1-0060: failed=-110 +Jan 28 12:23:46.948234 LibreELEC kernel: si2168 1-0060: cmd execution took 60 ms +Jan 28 12:23:46.949121 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms +Jan 28 12:23:46.949940 LibreELEC kernel: si2168 1-0060: cmd execution took 10 ms +.. +Jan 28 12:23:57.457216 LibreELEC tvheadend[3126]: subscription: 009B: service instance is bad, reason: No input detected +Jan 28 12:23:57.457392 LibreELEC tvheadend[3126]: linuxdvb: Silicon Labs Si2168 #0 : DVB-T #0 - stopping 778MHz in DVB-T Network +.. +Jan 28 12:23:57.457584 LibreELEC tvheadend[3126]: subscription: 009B: No input source available for subscription "127.0.0.1 [ | Kodi Media Center ]" to channel "XXXXXXX" + +The original timeout of 50ms was extended to 70ms in commit 551c33e729f6 +("[media] Si2168: increase timeout to fix firmware loading") but testing +shows there are other demux commands that take longer. The largest value +observed from user reports/logs is 150ms so increase timeout to 200ms. + +Signed-off-by: Christian Hewitt +Reviewed-by: Wolfram Sang +--- + drivers/media/dvb-frontends/si2168.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c +index d6b6b8bc7d4e..843f1e01318e 100644 +--- a/drivers/media/dvb-frontends/si2168.c ++++ b/drivers/media/dvb-frontends/si2168.c +@@ -9,6 +9,8 @@ + + #include "si2168_priv.h" + ++#define CMD_TIMEOUT 200 ++ + static const struct dvb_frontend_ops si2168_ops; + + static void cmd_init(struct si2168_cmd *cmd, const u8 *buf, int wlen, int rlen) +@@ -40,8 +42,7 @@ static int si2168_cmd_execute(struct i2c_client *client, struct si2168_cmd *cmd) + + if (cmd->rlen) { + /* wait cmd execution terminate */ +- #define TIMEOUT 70 +- timeout = jiffies + msecs_to_jiffies(TIMEOUT); ++ timeout = jiffies + msecs_to_jiffies(CMD_TIMEOUT); + while (!time_after(jiffies, timeout)) { + ret = i2c_master_recv(client, cmd->args, cmd->rlen); + if (ret < 0) { +@@ -58,7 +59,7 @@ static int si2168_cmd_execute(struct i2c_client *client, struct si2168_cmd *cmd) + + dev_dbg(&client->dev, "cmd execution took %d ms\n", + jiffies_to_msecs(jiffies) - +- (jiffies_to_msecs(timeout) - TIMEOUT)); ++ (jiffies_to_msecs(timeout) - CMD_TIMEOUT)); + + /* error bit set? */ + if ((cmd->args[0] >> 6) & 0x01) { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch similarity index 93% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch index 1f32853b3d..6d4a5d04c7 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch @@ -1,7 +1,7 @@ -From b4b3656688319a77827ce533f8797f317dfaa01c Mon Sep 17 00:00:00 2001 +From 3eb58e53708f534a47f4cccbd44efa36d5584a5c Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 22 Nov 2021 09:15:21 +0000 -Subject: [PATCH 20/53] FROMLIST(v1): media: meson: vdec: esparser: check +Subject: [PATCH 14/37] FROMLIST(v1): media: meson: vdec: esparser: check parsing state with hardware write pointer Also check the hardware write pointer to check if ES Parser has stalled. diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch deleted file mode 100644 index 2ae6915799..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 24712c83de1ef21e7263f7c3bbe4423068070089 Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Sun, 20 Feb 2022 08:24:47 +0000 -Subject: [PATCH 14/53] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro - Electronics TM1628 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add a YAML schema binding for TM1628 auxdisplay -(7/11-segment LED) controller. - -This patch is partially based on previous RFC work from -Andreas Färber . - -Co-developed-by: Andreas Färber -Signed-off-by: Andreas Färber -Signed-off-by: Heiner Kallweit ---- - .../bindings/auxdisplay/titanmec,tm1628.yaml | 82 +++++++++++++++++++ - 1 file changed, 82 insertions(+) - create mode 100644 Documentation/devicetree/bindings/auxdisplay/titanmec,tm1628.yaml - -diff --git a/Documentation/devicetree/bindings/auxdisplay/titanmec,tm1628.yaml b/Documentation/devicetree/bindings/auxdisplay/titanmec,tm1628.yaml -new file mode 100644 -index 000000000000..d9cbbc950aab ---- /dev/null -+++ b/Documentation/devicetree/bindings/auxdisplay/titanmec,tm1628.yaml -@@ -0,0 +1,82 @@ -+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/leds/titanmec,tm1628.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Titan Micro Electronics TM1628 LED controller -+ -+properties: -+ compatible: -+ enum: -+ - titanmec,tm1628 -+ -+ reg: -+ maxItems: 1 -+ -+ grid: -+ description: -+ Mapping of display digit position to grid number. -+ This implicitly defines the display size. -+ $ref: /schemas/types.yaml#/definitions/uint8-array -+ minItems: 1 -+ maxItems: 7 -+ -+ segment-mapping: -+ description: -+ Mapping of 7 segment display segments A-G to bit numbers 1-12. -+ $ref: /schemas/types.yaml#/definitions/uint8-array -+ minItems: 7 -+ maxItems: 7 -+ -+ "#address-cells": -+ const: 2 -+ -+ "#size-cells": -+ const: 0 -+ -+required: -+ - compatible -+ - reg -+ -+patternProperties: -+ "^.*@[1-7],([1-9]|1[0-6])$": -+ type: object -+ description: | -+ Properties for a single LED. -+ -+ properties: -+ reg: -+ description: | -+ 1-based grid number, followed by 1-based segment bit number. -+ maxItems: 1 -+ -+ required: -+ - reg -+ -+examples: -+ - | -+ #include -+ -+ spi { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ led-controller@0 { -+ compatible = "titanmec,tm1628"; -+ reg = <0>; -+ spi-3-wire; -+ spi-lsb-first; -+ spi-max-frequency = <500000>; -+ grid = /bits/ 8 <4 3 2 1>; -+ segment-mapping = /bits/ 8 <4 5 6 1 2 3 7>; -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ alarmn@5,4 { -+ reg = <5 4>; -+ function = LED_FUNCTION_ALARM; -+ }; -+ }; -+ }; -+... --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch similarity index 99% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch index 46840b6b3f..2a5251ecb0 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch @@ -1,7 +1,7 @@ -From 73aa203801527e081409ead1c5708552ecc5f82b Mon Sep 17 00:00:00 2001 +From 61874bc3835b2326bb40bae200888657e7d38fa3 Mon Sep 17 00:00:00 2001 From: Benjamin Roszak Date: Mon, 23 Jan 2023 10:56:46 +0000 -Subject: [PATCH 21/53] FROMLIST(v2): media: meson: vdec: implement 10bit +Subject: [PATCH 15/37] FROMLIST(v2): media: meson: vdec: implement 10bit bitstream handling In order to support 10bit bitstream decoding, buffers and MMU @@ -453,10 +453,10 @@ index baf0dba3c418..ef6dd05d89c8 100644 return -EAGAIN; } diff --git a/drivers/staging/media/meson/vdec/vdec.h b/drivers/staging/media/meson/vdec/vdec.h -index 0906b8fb5cc6..a48170fe4cff 100644 +index 258685177700..e1e731b7d431 100644 --- a/drivers/staging/media/meson/vdec/vdec.h +++ b/drivers/staging/media/meson/vdec/vdec.h -@@ -244,6 +244,7 @@ struct amvdec_session { +@@ -243,6 +243,7 @@ struct amvdec_session { u32 width; u32 height; u32 colorspace; diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch deleted file mode 100644 index f04e8801ec..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 35a48968c689d245bbe3dd2ff5cd9192d3a16e62 Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Sun, 20 Feb 2022 08:26:27 +0000 -Subject: [PATCH 15/53] FROMLIST(v5): docs: ABI: document tm1628 attribute - display-text - -Document the attribute for reading / writing the text to be displayed on -the 7 segment display. - -Signed-off-by: Heiner Kallweit ---- - Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 | 7 +++++++ - 1 file changed, 7 insertions(+) - create mode 100644 Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 - -diff --git a/Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 b/Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 -new file mode 100644 -index 000000000000..382757e721af ---- /dev/null -+++ b/Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 -@@ -0,0 +1,7 @@ -+What: /sys/devices/.../display-text -+Date: February 2022 -+Contact: Heiner Kallweit -+Description: -+ The text to be displayed on the 7 segment display. -+ Any printable character is allowed as input, but some -+ can not be displayed in a readable way with 7 segments. --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch similarity index 98% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch index 44edd7f875..7d04ce2ae7 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch @@ -1,7 +1,7 @@ -From 00829e834a4cd6594b076550fd18be30ddba5b0e Mon Sep 17 00:00:00 2001 +From befb64847f9d38e20a38ed9ca3e351a4d80e9d05 Mon Sep 17 00:00:00 2001 From: Maxime Jourdan Date: Mon, 23 Jan 2023 11:07:04 +0000 -Subject: [PATCH 22/53] FROMLIST(v2): media: meson: vdec: add HEVC decode codec +Subject: [PATCH 16/37] FROMLIST(v2): media: meson: vdec: add HEVC decode codec Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using the common "HEVC" decoder driver. @@ -15,8 +15,8 @@ Signed-off-by: Benjamin Roszak drivers/staging/media/meson/vdec/codec_hevc.h | 13 + drivers/staging/media/meson/vdec/esparser.c | 3 +- drivers/staging/media/meson/vdec/hevc_regs.h | 1 + - .../staging/media/meson/vdec/vdec_platform.c | 37 + - 6 files changed, 1516 insertions(+), 2 deletions(-) + .../staging/media/meson/vdec/vdec_platform.c | 49 + + 6 files changed, 1528 insertions(+), 2 deletions(-) create mode 100644 drivers/staging/media/meson/vdec/codec_hevc.c create mode 100644 drivers/staging/media/meson/vdec/codec_hevc.h @@ -1546,7 +1546,7 @@ index 0392f41a1eed..e7eabdd2b119 100644 #define HEVC_SAO_MMU_VH1_ADDR 0xd8ec diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c -index f1df637681e5..083adf0d07d9 100644 +index 8a7e5b3f5d00..870e61dedd81 100644 --- a/drivers/staging/media/meson/vdec/vdec_platform.c +++ b/drivers/staging/media/meson/vdec/vdec_platform.c @@ -11,10 +11,23 @@ @@ -1592,7 +1592,26 @@ index f1df637681e5..083adf0d07d9 100644 }, { .pixfmt = V4L2_PIX_FMT_H264, .min_buffers = 2, -@@ -70,6 +95,18 @@ static const struct amvdec_format vdec_formats_gxm[] = { +@@ -59,6 +84,18 @@ static const struct amvdec_format vdec_formats_gxl[] = { + + static const struct amvdec_format vdec_formats_gxlx[] = { + { ++ .pixfmt = V4L2_PIX_FMT_HEVC, ++ .min_buffers = 4, ++ .max_buffers = 24, ++ .max_width = 3840, ++ .max_height = 2160, ++ .vdec_ops = &vdec_hevc_ops, ++ .codec_ops = &codec_hevc_ops, ++ .firmware_path = "meson/vdec/gxl_hevc.bin", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, ++ .flags = V4L2_FMT_FLAG_COMPRESSED | ++ V4L2_FMT_FLAG_DYN_RESOLUTION, ++ }, { + .pixfmt = V4L2_PIX_FMT_H264, + .min_buffers = 2, + .max_buffers = 24, +@@ -86,6 +123,18 @@ static const struct amvdec_format vdec_formats_gxm[] = { .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, .flags = V4L2_FMT_FLAG_COMPRESSED | V4L2_FMT_FLAG_DYN_RESOLUTION, diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch deleted file mode 100644 index 0b3b424855..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch +++ /dev/null @@ -1,461 +0,0 @@ -From e7c3f45587cda5b5b445df7434f38a0d751bb197 Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Mon, 4 Apr 2022 18:51:20 +0000 -Subject: [PATCH 16/53] FROMLIST(v5): auxdisplay: add support for Titanmec - TM1628 7 segment display controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This patch adds support for the Titanmec TM1628 7 segment display -controller. It's based on previous RFC work from Andreas Färber. -The RFC version placed the driver in the LED subsystem, but this was -NAK'ed by the LED maintainer. Therefore I moved the driver to -/drivers/auxdisplay what seems most reasonable to me. - -Further changes to the RFC version: -- Driver can be built also w/o LED class support, for displays that - don't have any symbols to be exposed as LED's. -- Simplified the code and rewrote a lot of it. -- Driver is now kind of a MVP, but functionality should be sufficient - for most use cases. -- Use the existing 7 segment support in uapi/linux/map_to_7segment.h - as suggested by Geert Uytterhoeven. - -Note: There's a number of chips from other manufacturers that are - almost identical, e.g. FD628, SM1628. Only difference I saw so - far is that they partially support other display modes. - TM1628: 6x12, 7x11 - SM1628C: 4x13, 5x12, 6x11, 7x10 - For typical displays on devices using these chips this - difference shouldn't matter. - -Successfully tested on a TX3 Mini TV box that has an SM1628C and a -display with 4 digits and 7 symbols. - -Co-developed-by: Andreas Färber -Signed-off-by: Andreas Färber -Signed-off-by: Heiner Kallweit ---- - drivers/auxdisplay/Kconfig | 11 ++ - drivers/auxdisplay/Makefile | 1 + - drivers/auxdisplay/tm1628.c | 376 ++++++++++++++++++++++++++++++++++++ - 3 files changed, 388 insertions(+) - create mode 100644 drivers/auxdisplay/tm1628.c - -diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig -index d944d5298eca..f3d513139e5c 100644 ---- a/drivers/auxdisplay/Kconfig -+++ b/drivers/auxdisplay/Kconfig -@@ -197,6 +197,17 @@ config ARM_CHARLCD - line and the Linux version on the second line, but that's - still useful. - -+config TM1628 -+ tristate "TM1628 driver for LED 7/11 segment displays" -+ depends on SPI -+ depends on OF || COMPILE_TEST -+ help -+ Say Y to enable support for Titan Micro Electronics TM1628 -+ LED controller. -+ -+ It's a 3-wire SPI device controlling a two-dimensional grid of -+ LEDs. Dimming is applied to all outputs through an internal PWM. -+ - menuconfig PARPORT_PANEL - tristate "Parallel port LCD/Keypad Panel support" - depends on PARPORT -diff --git a/drivers/auxdisplay/Makefile b/drivers/auxdisplay/Makefile -index 6968ed4d3f0a..7728e17e1c5a 100644 ---- a/drivers/auxdisplay/Makefile -+++ b/drivers/auxdisplay/Makefile -@@ -14,3 +14,4 @@ obj-$(CONFIG_HT16K33) += ht16k33.o - obj-$(CONFIG_PARPORT_PANEL) += panel.o - obj-$(CONFIG_LCD2S) += lcd2s.o - obj-$(CONFIG_LINEDISP) += line-display.o -+obj-$(CONFIG_TM1628) += tm1628.o -diff --git a/drivers/auxdisplay/tm1628.c b/drivers/auxdisplay/tm1628.c -new file mode 100644 -index 000000000000..4d99a7aa077b ---- /dev/null -+++ b/drivers/auxdisplay/tm1628.c -@@ -0,0 +1,376 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Titan Micro Electronics TM1628 LED controller -+ * -+ * Copyright (c) 2019 Andreas Färber -+ * Copyright (c) 2022 Heiner Kallweit -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define TM1628_CMD_DISPLAY_MODE (0 << 6) -+#define TM1628_DISPLAY_MODE_6_12 0x02 -+#define TM1628_DISPLAY_MODE_7_11 0x03 -+ -+#define TM1628_CMD_DATA (1 << 6) -+#define TM1628_DATA_TEST_MODE BIT(3) -+#define TM1628_DATA_FIXED_ADDR BIT(2) -+#define TM1628_DATA_WRITE_DATA 0x00 -+#define TM1628_DATA_READ_DATA 0x02 -+ -+#define TM1628_CMD_DISPLAY_CTRL (2 << 6) -+#define TM1628_DISPLAY_CTRL_DISPLAY_ON BIT(3) -+ -+#define TM1628_CMD_SET_ADDRESS (3 << 6) -+ -+#define TM1628_BRIGHTNESS_MAX 7 -+#define NUM_LED_SEGS 7 -+ -+/* Physical limits, depending on the mode the chip may support less */ -+#define MAX_GRID_SIZE 7 -+#define MAX_SEGMENT_NUM 16 -+ -+struct tm1628_led { -+ struct led_classdev leddev; -+ struct tm1628 *ctrl; -+ u32 grid; -+ u32 seg; -+}; -+ -+struct tm1628 { -+ struct spi_device *spi; -+ __le16 data[MAX_GRID_SIZE]; -+ struct mutex disp_lock; -+ char text[MAX_GRID_SIZE + 1]; -+ u8 segment_mapping[NUM_LED_SEGS]; -+ u8 grid[MAX_GRID_SIZE]; -+ int grid_size; -+ struct tm1628_led leds[]; -+}; -+ -+/* Command 1: Display Mode Setting */ -+static int tm1628_set_display_mode(struct spi_device *spi, u8 grid_mode) -+{ -+ const u8 cmd = TM1628_CMD_DISPLAY_MODE | grid_mode; -+ -+ return spi_write(spi, &cmd, 1); -+} -+ -+/* Command 3: Address Setting */ -+static int tm1628_set_address(struct spi_device *spi, u8 offset) -+{ -+ const u8 cmd = TM1628_CMD_SET_ADDRESS | (offset * sizeof(__le16)); -+ -+ return spi_write(spi, &cmd, 1); -+} -+ -+/* Command 2: Data Setting */ -+static int tm1628_write_data(struct spi_device *spi, unsigned int offset, -+ unsigned int len) -+{ -+ struct tm1628 *s = spi_get_drvdata(spi); -+ const u8 cmd = TM1628_CMD_DATA | TM1628_DATA_WRITE_DATA; -+ struct spi_transfer xfers[] = { -+ { -+ .tx_buf = &cmd, -+ .len = 1, -+ }, -+ { -+ .tx_buf = (__force void *)(s->data + offset), -+ .len = len * sizeof(__le16), -+ }, -+ }; -+ -+ if (offset + len > MAX_GRID_SIZE) { -+ dev_err(&spi->dev, "Invalid data address offset %u len %u\n", -+ offset, len); -+ return -EINVAL; -+ } -+ -+ tm1628_set_address(spi, offset); -+ -+ return spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers)); -+} -+ -+/* Command 4: Display Control */ -+static int tm1628_set_display_ctrl(struct spi_device *spi, bool on) -+{ -+ u8 cmd = TM1628_CMD_DISPLAY_CTRL | TM1628_BRIGHTNESS_MAX; -+ -+ if (on) -+ cmd |= TM1628_DISPLAY_CTRL_DISPLAY_ON; -+ -+ return spi_write(spi, &cmd, 1); -+} -+ -+static int tm1628_show_text(struct tm1628 *s) -+{ -+ static SEG7_CONVERSION_MAP(map_seg7, MAP_ASCII7SEG_ALPHANUM); -+ int msg_len, i, ret; -+ -+ msg_len = strlen(s->text); -+ -+ mutex_lock(&s->disp_lock); -+ -+ for (i = 0; i < s->grid_size; i++) { -+ int pos = s->grid[i] - 1; -+ int j, char7_raw, char7; -+ -+ if (i >= msg_len) { -+ s->data[pos] = 0; -+ continue; -+ } -+ -+ char7_raw = map_to_seg7(&map_seg7, s->text[i]); -+ -+ for (j = 0, char7 = 0; j < NUM_LED_SEGS; j++) { -+ if (char7_raw & BIT(j)) -+ char7 |= BIT(s->segment_mapping[j] - 1); -+ } -+ -+ s->data[pos] = cpu_to_le16(char7); -+ } -+ -+ ret = tm1628_write_data(s->spi, 0, s->grid_size); -+ -+ mutex_unlock(&s->disp_lock); -+ -+ return ret; -+} -+ -+static int tm1628_led_set_brightness(struct led_classdev *led_cdev, -+ enum led_brightness brightness) -+{ -+ struct tm1628_led *led = container_of(led_cdev, struct tm1628_led, leddev); -+ struct tm1628 *s = led->ctrl; -+ int ret, offset = led->grid - 1; -+ __le16 bit = cpu_to_le16(BIT(led->seg - 1)); -+ -+ mutex_lock(&s->disp_lock); -+ -+ if (brightness == LED_OFF) -+ s->data[offset] &= ~bit; -+ else -+ s->data[offset] |= bit; -+ -+ ret = tm1628_write_data(s->spi, offset, 1); -+ -+ mutex_unlock(&s->disp_lock); -+ -+ return ret; -+} -+ -+static enum led_brightness tm1628_led_get_brightness(struct led_classdev *led_cdev) -+{ -+ struct tm1628_led *led = container_of(led_cdev, struct tm1628_led, leddev); -+ struct tm1628 *s = led->ctrl; -+ int offset = led->grid - 1; -+ __le16 bit = cpu_to_le16(BIT(led->seg - 1)); -+ bool on; -+ -+ mutex_lock(&s->disp_lock); -+ on = s->data[offset] & bit; -+ mutex_unlock(&s->disp_lock); -+ -+ return on ? LED_ON : LED_OFF; -+} -+ -+static int tm1628_register_led(struct tm1628 *s, struct fwnode_handle *node, -+ u32 grid, u32 seg, struct tm1628_led *led) -+{ -+ struct device *dev = &s->spi->dev; -+ struct led_init_data init_data = { .fwnode = node }; -+ -+ led->ctrl = s; -+ led->grid = grid; -+ led->seg = seg; -+ led->leddev.max_brightness = LED_ON; -+ led->leddev.brightness_set_blocking = tm1628_led_set_brightness; -+ led->leddev.brightness_get = tm1628_led_get_brightness; -+ -+ return devm_led_classdev_register_ext(dev, &led->leddev, &init_data); -+} -+ -+static ssize_t display_text_show(struct device *dev, struct device_attribute *attr, -+ char *buf) -+{ -+ struct tm1628 *s = dev_get_drvdata(dev); -+ -+ return sysfs_emit(buf, "%s\n", s->text); -+} -+ -+static ssize_t display_text_store(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct tm1628 *s = dev_get_drvdata(dev); -+ int ret, i; -+ -+ for (i = 0; i < count && i < s->grid_size && isprint(buf[i]); i++) -+ s->text[i] = buf[i]; -+ -+ s->text[i] = '\0'; -+ -+ ret = tm1628_show_text(s); -+ if (ret < 0) -+ return ret; -+ -+ return count; -+} -+ -+static const DEVICE_ATTR_RW(display_text); -+ -+static int tm1628_spi_probe(struct spi_device *spi) -+{ -+ struct fwnode_handle *child; -+ unsigned int num_leds; -+ struct tm1628 *s; -+ int ret, i; -+ -+ num_leds = device_get_child_node_count(&spi->dev); -+ -+ s = devm_kzalloc(&spi->dev, struct_size(s, leds, num_leds), GFP_KERNEL); -+ if (!s) -+ return -ENOMEM; -+ -+ s->spi = spi; -+ spi_set_drvdata(spi, s); -+ -+ mutex_init(&s->disp_lock); -+ -+ /* According to TM1628 datasheet */ -+ msleep(200); -+ -+ /* Clear screen */ -+ ret = tm1628_write_data(spi, 0, MAX_GRID_SIZE); -+ if (ret) -+ return ret; -+ -+ /* For now we support 6x12 mode only. This should be sufficient for most use cases */ -+ ret = tm1628_set_display_mode(spi, TM1628_DISPLAY_MODE_6_12); -+ if (ret) -+ return ret; -+ -+ ret = tm1628_set_display_ctrl(spi, true); -+ if (ret) -+ return ret; -+ -+ num_leds = 0; -+ -+ if (!IS_REACHABLE(CONFIG_LEDS_CLASS)) -+ goto no_leds; -+ -+ device_for_each_child_node(&spi->dev, child) { -+ u32 reg[2]; -+ -+ ret = fwnode_property_read_u32_array(child, "reg", reg, 2); -+ if (ret) { -+ dev_err(&spi->dev, "Reading %s reg property failed (%d)\n", -+ fwnode_get_name(child), ret); -+ continue; -+ } -+ -+ if (reg[0] == 0 || reg[0] > MAX_GRID_SIZE) { -+ dev_err(&spi->dev, "Invalid grid %u at %s\n", -+ reg[0], fwnode_get_name(child)); -+ continue; -+ } -+ -+ if (reg[1] == 0 || reg[1] > MAX_SEGMENT_NUM) { -+ dev_err(&spi->dev, "Invalid segment %u at %s\n", -+ reg[1], fwnode_get_name(child)); -+ continue; -+ } -+ -+ ret = tm1628_register_led(s, child, reg[0], reg[1], s->leds + num_leds); -+ if (ret) { -+ dev_err(&spi->dev, "Failed to register LED %s (%d)\n", -+ fwnode_get_name(child), ret); -+ continue; -+ } -+ num_leds++; -+ } -+ -+no_leds: -+ ret = device_property_count_u8(&spi->dev, "titanmec,grid"); -+ if (ret < 1 || ret > MAX_GRID_SIZE) { -+ dev_err(&spi->dev, "Invalid display length (%d)\n", ret); -+ return -EINVAL; -+ } -+ -+ s->grid_size = ret; -+ -+ ret = device_property_read_u8_array(&spi->dev, "titanmec,grid", s->grid, s->grid_size); -+ if (ret < 0) -+ return ret; -+ -+ for (i = 0; i < s->grid_size; i++) { -+ if (s->grid[i] < 1 || s->grid[i] > s->grid_size) -+ return -EINVAL; -+ } -+ -+ ret = device_property_read_u8_array(&spi->dev, "titanmec,segment-mapping", -+ s->segment_mapping, NUM_LED_SEGS); -+ if (ret < 0) -+ return ret; -+ -+ for (i = 0; i < NUM_LED_SEGS; i++) { -+ if (s->segment_mapping[i] < 1 || s->segment_mapping[i] > MAX_SEGMENT_NUM) -+ return -EINVAL; -+ } -+ -+ ret = device_create_file(&spi->dev, &dev_attr_display_text); -+ if (ret) -+ return ret; -+ -+ dev_info(&spi->dev, "Configured display with %u digits and %u symbols\n", -+ s->grid_size, num_leds); -+ -+ return 0; -+} -+ -+static void tm1628_spi_remove(struct spi_device *spi) -+{ -+ device_remove_file(&spi->dev, &dev_attr_display_text); -+ tm1628_set_display_ctrl(spi, false); -+} -+ -+static void tm1628_spi_shutdown(struct spi_device *spi) -+{ -+ tm1628_set_display_ctrl(spi, false); -+} -+ -+static const struct of_device_id tm1628_spi_of_matches[] = { -+ { .compatible = "titanmec,tm1628" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, tm1628_spi_of_matches); -+ -+static const struct spi_device_id tm1628_spi_id_table[] = { -+ { "tm1628" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(spi, tm1628_spi_id_table); -+ -+static struct spi_driver tm1628_spi_driver = { -+ .probe = tm1628_spi_probe, -+ .remove = tm1628_spi_remove, -+ .shutdown = tm1628_spi_shutdown, -+ .id_table = tm1628_spi_id_table, -+ -+ .driver = { -+ .name = "tm1628", -+ .of_match_table = tm1628_spi_of_matches, -+ }, -+}; -+module_spi_driver(tm1628_spi_driver); -+ -+MODULE_DESCRIPTION("TM1628 LED controller driver"); -+MODULE_AUTHOR("Andreas Färber "); -+MODULE_AUTHOR("Heiner Kallweit "); -+MODULE_LICENSE("GPL"); --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v1-arm64-dts-amlogic-sm1-bananapi-lower-SD-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v1-arm64-dts-amlogic-sm1-bananapi-lower-SD-.patch new file mode 100644 index 0000000000..f31ec5f12f --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v1-arm64-dts-amlogic-sm1-bananapi-lower-SD-.patch @@ -0,0 +1,41 @@ +From 2411a183fc6f2806727cf9dcfe62dcd5e1199ce9 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Sat, 3 May 2025 15:18:07 +0000 +Subject: [PATCH 17/37] FROMLIST(v1): arm64: dts: amlogic: sm1-bananapi: lower + SD card speed for stability + +Users report being able to boot (u-boot) from SD card but kernel +init then fails to mount partitions on the card containing boot +media resulting in first-boot failure. System logs show only the +probe of the mmc devices: the SD card is seen, but no partitions +are found so init fails to mount them and boot stalls. + +Reducing the speed of the SD card from 50MHz to 35MHz results in +complete probing of the card and successful boot. + +Signed-off-by: Christian Hewitt +--- + arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi +index 538b35036954..5e07f0f9538e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi +@@ -380,11 +380,10 @@ &sd_emmc_b { + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <50000000>; ++ /* Boot failures are observed at 50MHz */ ++ max-frequency = <35000000>; + disable-wp; + +- /* TOFIX: SD card is barely usable in SDR modes */ +- + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&tflash_vdd>; + vqmmc-supply = <&vddio_c>; +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch deleted file mode 100644 index 5405a1ebc5..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 8dd34cfc3fdb2ae31c34492b8b25bdf7d8c3352b Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Mon, 4 Apr 2022 18:52:34 +0000 -Subject: [PATCH 17/53] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add - support for the 7 segment display - -This patch adds support for the 7 segment display of the device. - -Signed-off-by: Heiner Kallweit ---- - .../dts/amlogic/meson-gxl-s905w-tx3-mini.dts | 59 +++++++++++++++++++ - 1 file changed, 59 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts -index 6705c2082a78..ae0d8d7b1e19 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts -@@ -10,6 +10,7 @@ - - #include "meson-gxl-s905x.dtsi" - #include "meson-gx-p23x-q20x.dtsi" -+#include - - / { - compatible = "oranth,tx3-mini", "amlogic,s905w", "amlogic,meson-gxl"; -@@ -19,6 +20,64 @@ memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; /* 1 GiB or 2 GiB */ - }; -+ -+ spi { -+ compatible = "spi-gpio"; -+ sck-gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>; -+ mosi-gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>; -+ cs-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>; -+ num-chipselects = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ tm1628: led-controller@0 { -+ compatible = "titanmec,tm1628"; -+ reg = <0>; -+ spi-3wire; -+ spi-lsb-first; -+ spi-rx-delay-us = <1>; -+ spi-max-frequency = <500000>; -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ titanmec,segment-mapping = /bits/ 8 <4 5 6 1 2 3 7>; -+ titanmec,grid = /bits/ 8 <4 3 2 1>; -+ -+ alarm@5,1 { -+ reg = <5 1>; -+ function = LED_FUNCTION_ALARM; -+ }; -+ -+ usb@5,2 { -+ reg = <5 2>; -+ function = LED_FUNCTION_USB; -+ }; -+ play@5,3 { -+ reg = <5 3>; -+ function = "play"; -+ }; -+ -+ pause@5,4 { -+ reg = <5 4>; -+ function = "pause"; -+ }; -+ -+ colon@5,5 { -+ reg = <5 5>; -+ function = "colon"; -+ }; -+ -+ lan@5,6 { -+ reg = <5 6>; -+ function = LED_FUNCTION_LAN; -+ }; -+ -+ wlan@5,7 { -+ reg = <5 7>; -+ function = LED_FUNCTION_WLAN; -+ }; -+ }; -+ }; - }; - - &ir { --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch deleted file mode 100644 index a5e70d0581..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 3a59c995a56b3802ceb6db413c81e2170fa767cb Mon Sep 17 00:00:00 2001 -From: Heiner Kallweit -Date: Mon, 4 Apr 2022 18:53:32 +0000 -Subject: [PATCH 18/53] FROMLIST(v5): MAINTAINERS: Add entry for tm1628 - auxdisplay driver - -Signed-off-by: Heiner Kallweit ---- - MAINTAINERS | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/MAINTAINERS b/MAINTAINERS -index 1aabf1c15bb3..ea6d2ff2eb20 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -22155,6 +22155,13 @@ W: http://sourceforge.net/projects/tlan/ - F: Documentation/networking/device_drivers/ethernet/ti/tlan.rst - F: drivers/net/ethernet/ti/tlan.* - -+TM1628 LED CONTROLLER DRIVER -+M: Heiner Kallweit -+S: Maintained -+F: Documentation/devicetree/bindings/auxdisplay/titanmec,tm1628.yaml -+F: Documentation/ABI/testing/sysfs-devices-auxdisplay-tm1628 -+F: drivers/auxdisplay/tm1628.c -+ - TMIO/SDHI MMC DRIVER - M: Wolfram Sang - L: linux-mmc@vger.kernel.org --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-WIP-media-meson-vdec-reintroduce-wiggle-room.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-WIP-media-meson-vdec-reintroduce-wiggle-room.patch new file mode 100644 index 0000000000..cbbac573f9 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-WIP-media-meson-vdec-reintroduce-wiggle-room.patch @@ -0,0 +1,50 @@ +From a1f197da3061f0ccf210e7b69c478e31377196c4 Mon Sep 17 00:00:00 2001 +From: Andreas Baierl +Date: Tue, 2 Apr 2024 14:22:52 +0000 +Subject: [PATCH 18/37] WIP: media: meson: vdec: reintroduce wiggle room + +Without the wiggle room, it happens that matching offsets can't be found. +This results in non-matches and afterwards in frame drops in userspace apps. +Reintroduce this wiggle room again. + +Signed-off-by: Andreas Baierl +--- + drivers/staging/media/meson/vdec/vdec_helpers.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.c b/drivers/staging/media/meson/vdec/vdec_helpers.c +index fef76142f0c5..fbfdbf3ec19d 100644 +--- a/drivers/staging/media/meson/vdec/vdec_helpers.c ++++ b/drivers/staging/media/meson/vdec/vdec_helpers.c +@@ -378,7 +378,16 @@ void amvdec_dst_buf_done_offset(struct amvdec_session *sess, + + /* Look for our vififo offset to get the corresponding timestamp. */ + list_for_each_entry_safe(tmp, n, &sess->timestamps, list) { +- if (tmp->offset > offset) { ++ s64 delta = (s64)offset - tmp->offset; ++ ++ /* Offsets reported by codecs usually differ slightly, ++ * so we need some wiggle room. ++ * 4KiB being the minimum packet size, there is no risk here. ++ */ ++ if (delta > (-1 * (s32)SZ_4K) && delta < SZ_4K) { ++ match = tmp; ++ break; ++ } else { + /* + * Delete any record that remained unused for 32 match + * checks +@@ -387,10 +396,7 @@ void amvdec_dst_buf_done_offset(struct amvdec_session *sess, + list_del(&tmp->list); + kfree(tmp); + } +- break; + } +- +- match = tmp; + } + + if (!match) { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v1-ASoC-hdmi-codec-reorder-channel-allocati.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v1-ASoC-hdmi-codec-reorder-channel-allocati.patch deleted file mode 100644 index 3d61af0a7d..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v1-ASoC-hdmi-codec-reorder-channel-allocati.patch +++ /dev/null @@ -1,203 +0,0 @@ -From 665584f98081e481e77286b49b6a0e1ce9fe5655 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 23 Dec 2018 02:24:38 +0100 -Subject: [PATCH 19/53] FROMLIST(v1): ASoC: hdmi-codec: reorder channel - allocation list - -Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx(). - -E.g when ELD reports FL|FR|LFE|FC|RL|RR or FL|FR|LFE|FC|RL|RR|RC|RLC|RRC - -ca_id 0x01 with speaker mask FL|FR|LFE gets selected instead of -ca_id 0x03 with speaker mask FL|FR|LFE|FC for 4 channels - -and - -ca_id 0x04 with speaker mask FL|FR|RC gets selected instead of -ca_id 0x0b with speaker mask FL|FR|LFE|FC|RL|RR for 6 channels - -Fix this by reorder the channel allocation list with -most specific speaker mask at the top. - -Signed-off-by: Jonas Karlman ---- - sound/soc/codecs/hdmi-codec.c | 140 +++++++++++++++++++--------------- - 1 file changed, 77 insertions(+), 63 deletions(-) - -diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c -index e06b28c7e5ba..6ebbd4bfa47e 100644 ---- a/sound/soc/codecs/hdmi-codec.c -+++ b/sound/soc/codecs/hdmi-codec.c -@@ -185,84 +185,97 @@ static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { - /* - * hdmi_codec_channel_alloc: speaker configuration available for CEA - * -- * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct -+ * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps - * The preceding ones have better chances to be selected by - * hdmi_codec_get_ch_alloc_table_idx(). - */ - static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { - { .ca_id = 0x00, .n_ch = 2, -- .mask = FL | FR}, -- /* 2.1 */ -- { .ca_id = 0x01, .n_ch = 4, -- .mask = FL | FR | LFE}, -- /* Dolby Surround */ -+ .mask = FL | FR }, -+ { .ca_id = 0x03, .n_ch = 4, -+ .mask = FL | FR | LFE | FC }, - { .ca_id = 0x02, .n_ch = 4, - .mask = FL | FR | FC }, -- /* surround51 */ -+ { .ca_id = 0x01, .n_ch = 4, -+ .mask = FL | FR | LFE }, - { .ca_id = 0x0b, .n_ch = 6, -- .mask = FL | FR | LFE | FC | RL | RR}, -- /* surround40 */ -- { .ca_id = 0x08, .n_ch = 6, -- .mask = FL | FR | RL | RR }, -- /* surround41 */ -- { .ca_id = 0x09, .n_ch = 6, -- .mask = FL | FR | LFE | RL | RR }, -- /* surround50 */ -+ .mask = FL | FR | LFE | FC | RL | RR }, - { .ca_id = 0x0a, .n_ch = 6, - .mask = FL | FR | FC | RL | RR }, -- /* 6.1 */ -- { .ca_id = 0x0f, .n_ch = 8, -- .mask = FL | FR | LFE | FC | RL | RR | RC }, -- /* surround71 */ -+ { .ca_id = 0x09, .n_ch = 6, -+ .mask = FL | FR | LFE | RL | RR }, -+ { .ca_id = 0x08, .n_ch = 6, -+ .mask = FL | FR | RL | RR }, -+ { .ca_id = 0x07, .n_ch = 6, -+ .mask = FL | FR | LFE | FC | RC }, -+ { .ca_id = 0x06, .n_ch = 6, -+ .mask = FL | FR | FC | RC }, -+ { .ca_id = 0x05, .n_ch = 6, -+ .mask = FL | FR | LFE | RC }, -+ { .ca_id = 0x04, .n_ch = 6, -+ .mask = FL | FR | RC }, - { .ca_id = 0x13, .n_ch = 8, - .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, -- /* others */ -- { .ca_id = 0x03, .n_ch = 8, -- .mask = FL | FR | LFE | FC }, -- { .ca_id = 0x04, .n_ch = 8, -- .mask = FL | FR | RC}, -- { .ca_id = 0x05, .n_ch = 8, -- .mask = FL | FR | LFE | RC }, -- { .ca_id = 0x06, .n_ch = 8, -- .mask = FL | FR | FC | RC }, -- { .ca_id = 0x07, .n_ch = 8, -- .mask = FL | FR | LFE | FC | RC }, -- { .ca_id = 0x0c, .n_ch = 8, -- .mask = FL | FR | RC | RL | RR }, -- { .ca_id = 0x0d, .n_ch = 8, -- .mask = FL | FR | LFE | RL | RR | RC }, -- { .ca_id = 0x0e, .n_ch = 8, -- .mask = FL | FR | FC | RL | RR | RC }, -- { .ca_id = 0x10, .n_ch = 8, -- .mask = FL | FR | RL | RR | RLC | RRC }, -- { .ca_id = 0x11, .n_ch = 8, -- .mask = FL | FR | LFE | RL | RR | RLC | RRC }, -+ { .ca_id = 0x1f, .n_ch = 8, -+ .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, - { .ca_id = 0x12, .n_ch = 8, - .mask = FL | FR | FC | RL | RR | RLC | RRC }, -- { .ca_id = 0x14, .n_ch = 8, -- .mask = FL | FR | FLC | FRC }, -- { .ca_id = 0x15, .n_ch = 8, -- .mask = FL | FR | LFE | FLC | FRC }, -- { .ca_id = 0x16, .n_ch = 8, -- .mask = FL | FR | FC | FLC | FRC }, -- { .ca_id = 0x17, .n_ch = 8, -- .mask = FL | FR | LFE | FC | FLC | FRC }, -- { .ca_id = 0x18, .n_ch = 8, -- .mask = FL | FR | RC | FLC | FRC }, -- { .ca_id = 0x19, .n_ch = 8, -- .mask = FL | FR | LFE | RC | FLC | FRC }, -- { .ca_id = 0x1a, .n_ch = 8, -- .mask = FL | FR | RC | FC | FLC | FRC }, -- { .ca_id = 0x1b, .n_ch = 8, -- .mask = FL | FR | LFE | RC | FC | FLC | FRC }, -- { .ca_id = 0x1c, .n_ch = 8, -- .mask = FL | FR | RL | RR | FLC | FRC }, -- { .ca_id = 0x1d, .n_ch = 8, -- .mask = FL | FR | LFE | RL | RR | FLC | FRC }, - { .ca_id = 0x1e, .n_ch = 8, - .mask = FL | FR | FC | RL | RR | FLC | FRC }, -- { .ca_id = 0x1f, .n_ch = 8, -- .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, -+ { .ca_id = 0x11, .n_ch = 8, -+ .mask = FL | FR | LFE | RL | RR | RLC | RRC }, -+ { .ca_id = 0x1d, .n_ch = 8, -+ .mask = FL | FR | LFE | RL | RR | FLC | FRC }, -+ { .ca_id = 0x10, .n_ch = 8, -+ .mask = FL | FR | RL | RR | RLC | RRC }, -+ { .ca_id = 0x1c, .n_ch = 8, -+ .mask = FL | FR | RL | RR | FLC | FRC }, -+ { .ca_id = 0x0f, .n_ch = 8, -+ .mask = FL | FR | LFE | FC | RL | RR | RC }, -+ { .ca_id = 0x1b, .n_ch = 8, -+ .mask = FL | FR | LFE | RC | FC | FLC | FRC }, -+ { .ca_id = 0x0e, .n_ch = 8, -+ .mask = FL | FR | FC | RL | RR | RC }, -+ { .ca_id = 0x1a, .n_ch = 8, -+ .mask = FL | FR | RC | FC | FLC | FRC }, -+ { .ca_id = 0x0d, .n_ch = 8, -+ .mask = FL | FR | LFE | RL | RR | RC }, -+ { .ca_id = 0x19, .n_ch = 8, -+ .mask = FL | FR | LFE | RC | FLC | FRC }, -+ { .ca_id = 0x0c, .n_ch = 8, -+ .mask = FL | FR | RC | RL | RR }, -+ { .ca_id = 0x18, .n_ch = 8, -+ .mask = FL | FR | RC | FLC | FRC }, -+ { .ca_id = 0x17, .n_ch = 8, -+ .mask = FL | FR | LFE | FC | FLC | FRC }, -+ { .ca_id = 0x16, .n_ch = 8, -+ .mask = FL | FR | FC | FLC | FRC }, -+ { .ca_id = 0x15, .n_ch = 8, -+ .mask = FL | FR | LFE | FLC | FRC }, -+ { .ca_id = 0x14, .n_ch = 8, -+ .mask = FL | FR | FLC | FRC }, -+ { .ca_id = 0x0b, .n_ch = 8, -+ .mask = FL | FR | LFE | FC | RL | RR }, -+ { .ca_id = 0x0a, .n_ch = 8, -+ .mask = FL | FR | FC | RL | RR }, -+ { .ca_id = 0x09, .n_ch = 8, -+ .mask = FL | FR | LFE | RL | RR }, -+ { .ca_id = 0x08, .n_ch = 8, -+ .mask = FL | FR | RL | RR }, -+ { .ca_id = 0x07, .n_ch = 8, -+ .mask = FL | FR | LFE | FC | RC }, -+ { .ca_id = 0x06, .n_ch = 8, -+ .mask = FL | FR | FC | RC }, -+ { .ca_id = 0x05, .n_ch = 8, -+ .mask = FL | FR | LFE | RC }, -+ { .ca_id = 0x04, .n_ch = 8, -+ .mask = FL | FR | RC }, -+ { .ca_id = 0x03, .n_ch = 8, -+ .mask = FL | FR | LFE | FC }, -+ { .ca_id = 0x02, .n_ch = 8, -+ .mask = FL | FR | FC }, -+ { .ca_id = 0x01, .n_ch = 8, -+ .mask = FL | FR | LFE }, - }; - - struct hdmi_codec_priv { -@@ -371,7 +384,8 @@ static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, - struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); - struct hdmi_codec_priv *hcp = info->private_data; - -- map = info->chmap[hcp->chmap_idx].map; -+ if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN) -+ map = info->chmap[hcp->chmap_idx].map; - - for (i = 0; i < info->max_channels; i++) { - if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch new file mode 100644 index 0000000000..17bfd1d460 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch @@ -0,0 +1,28 @@ +From e0ebd51471f1153d3d1dc53b9a645fde537b1411 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 14 Mar 2023 01:13:15 +0000 +Subject: [PATCH 19/37] WIP: media: meson: vdec: fix memory leak of 'new_frame' + +Reported-by: kernel test robot +Reported-by: Dan Carpenter +Link: https://lore.kernel.org/r/202303120441.YFGHDOya-lkp@intel.com/ +Signed-off-by: Christian Hewitt +--- + drivers/staging/media/meson/vdec/codec_hevc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/staging/media/meson/vdec/codec_hevc.c b/drivers/staging/media/meson/vdec/codec_hevc.c +index fcaaa1ad50b8..b0d8623c3c7d 100644 +--- a/drivers/staging/media/meson/vdec/codec_hevc.c ++++ b/drivers/staging/media/meson/vdec/codec_hevc.c +@@ -731,6 +731,7 @@ codec_hevc_prepare_new_frame(struct amvdec_session *sess) + vbuf = v4l2_m2m_dst_buf_remove(sess->m2m_ctx); + if (!vbuf) { + dev_err(sess->core->dev, "No dst buffer available\n"); ++ kfree(new_frame); + return NULL; + } + +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch new file mode 100644 index 0000000000..2422165523 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-WIP-media-meson-vdec-fix-V4L2_BUF_FLAG_-KEY-P-B-FRAM.patch @@ -0,0 +1,235 @@ +From 32d8e8ef41de29cfede75a4eed0f33fa4d326057 Mon Sep 17 00:00:00 2001 +From: Andreas Baierl +Date: Thu, 20 Feb 2025 23:59:14 +0000 +Subject: [PATCH 20/37] WIP: media: meson: vdec: fix + V4L2_BUF_FLAG_{KEY|P|B}FRAME + +ffmpeg needs the keyframe flag to be set correctly, else +AV_FRAME_FLAG_* can not be set. Fix that (only h264 atm). + +Register values and bits were obtained from the vendor +4.9 kernel source [0]. + +[0] https://github.com/hardkernel/linux/tree/odroidg12-4.9.y/drivers/amlogic/media_modules/frame_provider/decoder/h264 + +Signed-off-by: Andreas Baierl +--- + drivers/staging/media/meson/vdec/codec_h264.c | 19 +++++++++++++- + drivers/staging/media/meson/vdec/codec_hevc.c | 4 +-- + .../staging/media/meson/vdec/codec_mpeg12.c | 2 +- + drivers/staging/media/meson/vdec/codec_vp9.c | 4 +-- + .../staging/media/meson/vdec/vdec_helpers.c | 25 +++++++++++++------ + .../staging/media/meson/vdec/vdec_helpers.h | 6 ++--- + 6 files changed, 43 insertions(+), 17 deletions(-) + +diff --git a/drivers/staging/media/meson/vdec/codec_h264.c b/drivers/staging/media/meson/vdec/codec_h264.c +index d53c9a464bde..4edb4021c244 100644 +--- a/drivers/staging/media/meson/vdec/codec_h264.c ++++ b/drivers/staging/media/meson/vdec/codec_h264.c +@@ -35,6 +35,11 @@ + #define PIC_TOP_BOT 5 + #define PIC_BOT_TOP 6 + ++/* Slice type */ ++#define SLICE_TYPE_I 2 ++#define SLICE_TYPE_P 5 ++#define SLICE_TYPE_B 6 ++ + /* Size of Motion Vector per macroblock */ + #define MB_MV_SIZE 96 + +@@ -393,8 +398,11 @@ static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status) + u32 buffer_index = frame_status & BUF_IDX_MASK; + u32 pic_struct = (frame_status >> PIC_STRUCT_BIT) & + PIC_STRUCT_MASK; ++ u32 idr_flag = (frame_status & 0x400); + u32 offset = (frame_status >> OFFSET_BIT) & OFFSET_MASK; + u32 field = V4L2_FIELD_NONE; ++ u32 slice_type = (amvdec_read_dos(core, AV_SCRATCH_H) >> (i * 4)) & 0xf; ++ u32 type = 0; + + /* + * A buffer decode error means it was decoded, +@@ -410,8 +418,17 @@ static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status) + else if (pic_struct == PIC_BOT_TOP) + field = V4L2_FIELD_INTERLACED_BT; + ++ if (idr_flag) ++ type = 4; ++ else if (slice_type == SLICE_TYPE_I) ++ type = 1; ++ else if (slice_type == SLICE_TYPE_P) ++ type = 2; ++ else if (slice_type == SLICE_TYPE_B || slice_type == 8) ++ type = 3; ++ + offset |= get_offset_msb(core, i); +- amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); ++ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field, type); + } + } + +diff --git a/drivers/staging/media/meson/vdec/codec_hevc.c b/drivers/staging/media/meson/vdec/codec_hevc.c +index b0d8623c3c7d..fe439770637c 100644 +--- a/drivers/staging/media/meson/vdec/codec_hevc.c ++++ b/drivers/staging/media/meson/vdec/codec_hevc.c +@@ -499,7 +499,7 @@ static void codec_hevc_show_frames(struct amvdec_session *sess) + dev_dbg(sess->core->dev, "DONE frame poc %u; vbuf %u\n", + tmp->poc, tmp->vbuf->vb2_buf.index); + amvdec_dst_buf_done_offset(sess, tmp->vbuf, tmp->offset, +- V4L2_FIELD_NONE, false); ++ V4L2_FIELD_NONE, 0, false); + + tmp->show = 0; + hevc->frames_num--; +@@ -667,7 +667,7 @@ static void codec_hevc_flush_output(struct amvdec_session *sess) + struct hevc_frame *tmp, *n; + + while ((tmp = codec_hevc_get_next_ready_frame(hevc))) { +- amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE); ++ amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE, 0); + tmp->show = 0; + hevc->frames_num--; + } +diff --git a/drivers/staging/media/meson/vdec/codec_mpeg12.c b/drivers/staging/media/meson/vdec/codec_mpeg12.c +index 48869cc3d973..05c52766fe52 100644 +--- a/drivers/staging/media/meson/vdec/codec_mpeg12.c ++++ b/drivers/staging/media/meson/vdec/codec_mpeg12.c +@@ -187,7 +187,7 @@ static irqreturn_t codec_mpeg12_threaded_isr(struct amvdec_session *sess) + codec_mpeg12_update_dar(sess); + buffer_index = ((reg & 0xf) - 1) & 7; + offset = amvdec_read_dos(core, MREG_FRAME_OFFSET); +- amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); ++ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field, 0); + + end: + amvdec_write_dos(core, MREG_BUFFEROUT, 0); +diff --git a/drivers/staging/media/meson/vdec/codec_vp9.c b/drivers/staging/media/meson/vdec/codec_vp9.c +index 8e3bbf0db4b3..1b1f1797110a 100644 +--- a/drivers/staging/media/meson/vdec/codec_vp9.c ++++ b/drivers/staging/media/meson/vdec/codec_vp9.c +@@ -665,7 +665,7 @@ static void codec_vp9_flush_output(struct amvdec_session *sess) + if (!tmp->done) { + if (tmp->show) + amvdec_dst_buf_done(sess, tmp->vbuf, +- V4L2_FIELD_NONE); ++ V4L2_FIELD_NONE, 0); + else + v4l2_m2m_buf_queue(sess->m2m_ctx, tmp->vbuf); + +@@ -1427,7 +1427,7 @@ static void codec_vp9_show_frame(struct amvdec_session *sess) + + if (!tmp->done) { + pr_debug("Doning %u\n", tmp->index); +- amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE); ++ amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE, 0); + tmp->done = 1; + vp9->frames_num--; + } +diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.c b/drivers/staging/media/meson/vdec/vdec_helpers.c +index fbfdbf3ec19d..9a61dabd8ce9 100644 +--- a/drivers/staging/media/meson/vdec/vdec_helpers.c ++++ b/drivers/staging/media/meson/vdec/vdec_helpers.c +@@ -280,7 +280,7 @@ EXPORT_SYMBOL_GPL(amvdec_remove_ts); + + static void dst_buf_done(struct amvdec_session *sess, + struct vb2_v4l2_buffer *vbuf, +- u32 field, u64 timestamp, ++ u32 field, u32 type, u64 timestamp, + struct v4l2_timecode timecode, u32 flags) + { + struct device *dev = sess->core->dev_dec; +@@ -303,6 +303,15 @@ static void dst_buf_done(struct amvdec_session *sess, + vbuf->flags = flags; + vbuf->timecode = timecode; + ++ if (type == 1) ++ vbuf->flags |= V4L2_BUF_FLAG_KEYFRAME; ++ else if (type == 2) ++ vbuf->flags |= V4L2_BUF_FLAG_PFRAME; ++ else if (type == 3) ++ vbuf->flags |= V4L2_BUF_FLAG_BFRAME; ++ else if (type == 4) ++ vbuf->flags |= V4L2_BUF_FLAG_KEYFRAME; ++ + if (sess->should_stop && + atomic_read(&sess->esparser_queued_bufs) <= 1) { + const struct v4l2_event ev = { .type = V4L2_EVENT_EOS }; +@@ -329,7 +338,7 @@ static void dst_buf_done(struct amvdec_session *sess, + } + + void amvdec_dst_buf_done(struct amvdec_session *sess, +- struct vb2_v4l2_buffer *vbuf, u32 field) ++ struct vb2_v4l2_buffer *vbuf, u32 field, u32 type) + { + struct device *dev = sess->core->dev_dec; + struct amvdec_timestamp *tmp; +@@ -357,14 +366,14 @@ void amvdec_dst_buf_done(struct amvdec_session *sess, + kfree(tmp); + spin_unlock_irqrestore(&sess->ts_spinlock, flags); + +- dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags); ++ dst_buf_done(sess, vbuf, field, type, timestamp, timecode, vbuf_flags); + atomic_dec(&sess->esparser_queued_bufs); + } + EXPORT_SYMBOL_GPL(amvdec_dst_buf_done); + + void amvdec_dst_buf_done_offset(struct amvdec_session *sess, + struct vb2_v4l2_buffer *vbuf, +- u32 offset, u32 field, bool allow_drop) ++ u32 offset, u32 field, u32 type, bool allow_drop) + { + struct device *dev = sess->core->dev_dec; + struct amvdec_timestamp *match = NULL; +@@ -411,14 +420,14 @@ void amvdec_dst_buf_done_offset(struct amvdec_session *sess, + } + spin_unlock_irqrestore(&sess->ts_spinlock, flags); + +- dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags); ++ dst_buf_done(sess, vbuf, field, type, timestamp, timecode, vbuf_flags); + if (match) + atomic_dec(&sess->esparser_queued_bufs); + } + EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_offset); + + void amvdec_dst_buf_done_idx(struct amvdec_session *sess, +- u32 buf_idx, u32 offset, u32 field) ++ u32 buf_idx, u32 offset, u32 field, u32 type) + { + struct vb2_v4l2_buffer *vbuf; + struct device *dev = sess->core->dev_dec; +@@ -434,9 +443,9 @@ void amvdec_dst_buf_done_idx(struct amvdec_session *sess, + } + + if (offset != -1) +- amvdec_dst_buf_done_offset(sess, vbuf, offset, field, true); ++ amvdec_dst_buf_done_offset(sess, vbuf, offset, field, type, true); + else +- amvdec_dst_buf_done(sess, vbuf, field); ++ amvdec_dst_buf_done(sess, vbuf, field, type); + } + EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_idx); + +diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.h b/drivers/staging/media/meson/vdec/vdec_helpers.h +index 1a711679d26a..e30edb935e37 100644 +--- a/drivers/staging/media/meson/vdec/vdec_helpers.h ++++ b/drivers/staging/media/meson/vdec/vdec_helpers.h +@@ -41,12 +41,12 @@ u32 amvdec_amfbc_size(u32 width, u32 height, u32 is_10bit, u32 use_mmu); + * @field: V4L2 interlaced field + */ + void amvdec_dst_buf_done_idx(struct amvdec_session *sess, u32 buf_idx, +- u32 offset, u32 field); ++ u32 offset, u32 field, u32 type); + void amvdec_dst_buf_done(struct amvdec_session *sess, +- struct vb2_v4l2_buffer *vbuf, u32 field); ++ struct vb2_v4l2_buffer *vbuf, u32 field, u32 type); + void amvdec_dst_buf_done_offset(struct amvdec_session *sess, + struct vb2_v4l2_buffer *vbuf, +- u32 offset, u32 field, bool allow_drop); ++ u32 offset, u32 field, u32 type, bool allow_drop); + + /** + * amvdec_add_ts() - Add a timestamp to the list +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch new file mode 100644 index 0000000000..ba8ae22eb2 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch @@ -0,0 +1,949 @@ +From 2efb62e0eaeeb3d2c84b7d12c94a5ba99c257b06 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Sun, 26 May 2024 12:53:07 +0000 +Subject: [PATCH 21/37] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield + boards + +Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a) +and HiFi-Shield2 (pcm5242) mezzanine boards. + +Signed-off-by: Christian Hewitt +--- + arch/arm64/boot/dts/amlogic/Makefile | 4 + + .../meson-gxbb-odroidc2-hifishield.dts | 446 +++++++++++++++++ + .../meson-gxbb-odroidc2-hifishield2.dts | 458 ++++++++++++++++++ + 3 files changed, 908 insertions(+) + create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts + create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts + +diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile +index 15e7901c1268..b593736ff60b 100644 +--- a/arch/arm64/boot/dts/amlogic/Makefile ++++ b/arch/arm64/boot/dts/amlogic/Makefile +@@ -102,3 +102,7 @@ meson-g12a-fbx8am-brcm-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo + meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo + meson-g12b-a311d-khadas-vim3-ts050-dtbs := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo + meson-sm1-khadas-vim3l-ts050-dtbs := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo ++ ++# Experimental ++dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb ++dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield2.dtb +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts +new file mode 100644 +index 000000000000..80b44c2abac2 +--- /dev/null ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts +@@ -0,0 +1,446 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 Andreas Färber ++ * Copyright (c) 2016 BayLibre, Inc. ++ * Author: Kevin Hilman ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxbb.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; ++ model = "Hardkernel ODROID-C2"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ spdif_dit: audio-codec-0 { ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dit"; ++ status = "okay"; ++ sound-name-prefix = "DIT"; ++ }; ++ ++ usb_otg_pwr: regulator-usb-pwrs { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "USB_OTG_PWR"; ++ ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ /* ++ * signal name from schematics: PWREN ++ */ ++ gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ /* ++ * signal name from schematics: USB_POWER ++ */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ led-blue { ++ label = "c2:blue:alive"; ++ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ default-state = "off"; ++ }; ++ }; ++ ++ p5v0: regulator-p5v0 { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ hdmi_p5v0: regulator-hdmi-p5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "HDMI_P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ /* AP2331SA-7 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ tflash_vdd: regulator-tflash-vdd { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ /* ++ * signal name from schematics: TFLASH_VDD_EN ++ */ ++ gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ /* U16 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ tf_io: gpio-regulator-tf-io { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "TF_IO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ /* ++ * signal name from schematics: TF_3V3N_1V8_EN ++ */ ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ /* U12/U13 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ vcc1v8: regulator-vcc1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U18 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ vcc3v3: regulator-vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vddio_ao1v8: regulator-vddio-ao1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U17 RT9179GB */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ vddio_ao3v3: regulator-vddio-ao3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ /* U11 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ ddr3_1v5: regulator-ddr3-1v5 { ++ compatible = "regulator-fixed"; ++ regulator-name = "DDR3_1V5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ /* U15 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "ODROID-C2"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; ++ ++ codec-0 { ++ sound-dai = <&spdif_dit>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; ++ pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&cec_AO { ++ status = "okay"; ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&clkc { ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++}; ++ ++ðmac { ++ status = "okay"; ++ pinctrl-0 = <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <ð_phy0>; ++ phy-mode = "rgmii"; ++ ++ amlogic,tx-delay-ns = <2>; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eth_phy0: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <80000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_15 */ ++ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; ++ }; ++ }; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_p5v0>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&i2c_A { ++ status = "okay"; ++ pinctrl-0 = <&i2c_a_pins>; ++ pinctrl-names = "default"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pcm5102a: pcm5102a@4c { ++ compatible = "ti,pcm5102a"; ++ reg = <0x4c>; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++ linux,rc-map-name = "rc-odroid"; ++}; ++ ++&gpio_ao { ++ gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", ++ "USB HUB nRESET", "USB OTG Power En", ++ "SPDIF_OUTPUT", "IR In", "I2S_MCLK", ++ "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT", ++ "HDMI CEC", "SYS LED", ++ /* GPIO_TEST_N */ ++ ""; ++}; ++ ++&gpio { ++ gpio-line-names = /* Bank GPIOZ */ ++ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", ++ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", ++ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", ++ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", ++ "Eth PHY nRESET", "Eth PHY Intc", ++ /* Bank GPIOH */ ++ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "", ++ /* Bank BOOT */ ++ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", ++ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", ++ "eMMC Reset", "eMMC CMD", ++ "", "", "", "", "", "", "", ++ /* Bank CARD */ ++ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", ++ "SDCard D3", "SDCard D2", "SDCard Det", ++ /* Bank GPIODV */ ++ "", "", "", "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", "", ++ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", ++ "PWM D", "PWM B", ++ /* Bank GPIOY */ ++ "Revision Bit0", "Revision Bit1", "", ++ "J2 Header Pin35", "", "", "", "J2 Header Pin36", ++ "J2 Header Pin31", "", "", "", "TF VDD En", ++ "J2 Header Pin32", "J2 Header Pin26", "", "", ++ /* Bank GPIOX */ ++ "J2 Header Pin29", "J2 Header Pin24", ++ "J2 Header Pin23", "J2 Header Pin22", ++ "J2 Header Pin21", "J2 Header Pin18", ++ "J2 Header Pin33", "J2 Header Pin19", ++ "J2 Header Pin16", "J2 Header Pin15", ++ "J2 Header Pin12", "J2 Header Pin13", ++ "J2 Header Pin8", "J2 Header Pin10", ++ "", "", "", "", "", ++ "J2 Header Pin11", "", "J2 Header Pin7", "", ++ /* Bank GPIOCLK */ ++ "", "", "", ""; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc1v8>; ++}; ++ ++&scpi_clocks { ++ status = "disabled"; ++}; ++ ++/* SD */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-ddr50; ++ max-frequency = <100000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; ++ ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&tf_io>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc3v3>; ++ vqmmc-supply = <&vcc1v8>; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb0_phy { ++ status = "disabled"; ++ phy-supply = <&usb_otg_pwr>; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++ phy-supply = <&usb_otg_pwr>; ++}; ++ ++&usb0 { ++ status = "disabled"; ++}; ++ ++&usb1 { ++ dr_mode = "host"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ hub@1 { ++ /* Genesys Logic GL852G USB 2.0 hub */ ++ compatible = "usb5e3,610"; ++ reg = <1>; ++ vdd-supply = <&p5v0>; ++ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts +new file mode 100644 +index 000000000000..e94d6dc75fec +--- /dev/null ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts +@@ -0,0 +1,458 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 Andreas Färber ++ * Copyright (c) 2016 BayLibre, Inc. ++ * Author: Kevin Hilman ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxbb.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; ++ model = "Hardkernel ODROID-C2"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ spdif_dit: audio-codec-0 { ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dit"; ++ status = "okay"; ++ sound-name-prefix = "DIT"; ++ }; ++ ++ usb_otg_pwr: regulator-usb-pwrs { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "USB_OTG_PWR"; ++ ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ /* ++ * signal name from schematics: PWREN ++ */ ++ gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ /* ++ * signal name from schematics: USB_POWER ++ */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ led-blue { ++ label = "c2:blue:alive"; ++ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ default-state = "off"; ++ }; ++ }; ++ ++ p5v0: regulator-p5v0 { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ hdmi_p5v0: regulator-hdmi-p5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "HDMI_P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ /* AP2331SA-7 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ tflash_vdd: regulator-tflash-vdd { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ /* ++ * signal name from schematics: TFLASH_VDD_EN ++ */ ++ gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ /* U16 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ tf_io: gpio-regulator-tf-io { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "TF_IO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ /* ++ * signal name from schematics: TF_3V3N_1V8_EN ++ */ ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ /* U12/U13 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ vcc1v8: regulator-vcc1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U18 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; ++ }; ++ ++ vcc3v3: regulator-vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vddio_ao1v8: regulator-vddio-ao1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U17 RT9179GB */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ vddio_ao3v3: regulator-vddio-ao3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ /* U11 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ ddr3_1v5: regulator-ddr3-1v5 { ++ compatible = "regulator-fixed"; ++ regulator-name = "DDR3_1V5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ /* U15 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "ODROID-C2"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; ++ ++ codec-0 { ++ sound-dai = <&spdif_dit>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; ++ ++ codec-0 { ++ sound-dai = <&pcm5242>; ++ }; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; ++ pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&cec_AO { ++ status = "okay"; ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&clkc { ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++}; ++ ++ðmac { ++ status = "okay"; ++ pinctrl-0 = <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <ð_phy0>; ++ phy-mode = "rgmii"; ++ ++ amlogic,tx-delay-ns = <2>; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eth_phy0: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <80000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_15 */ ++ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; ++ }; ++ }; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_p5v0>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&i2c_A { ++ status = "okay"; ++ pinctrl-0 = <&i2c_a_pins>; ++ pinctrl-names = "default"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pcm5242: pcm5242@4c { ++ compatible = "ti,pcm5242"; ++ reg = <0x4c>; ++ #sound-dai-cells = <0>; ++ ++ AVDD-supply = <&vddio_ao3v3>; ++ DVDD-supply = <&vddio_ao3v3>; ++ CPVDD-supply = <&vddio_ao3v3>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++ linux,rc-map-name = "rc-odroid"; ++}; ++ ++&gpio_ao { ++ gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", ++ "USB HUB nRESET", "USB OTG Power En", ++ "SPDIF_OUTPUT", "IR In", "I2S_MCLK", ++ "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT", ++ "HDMI CEC", "SYS LED", ++ /* GPIO_TEST_N */ ++ ""; ++}; ++ ++&gpio { ++ gpio-line-names = /* Bank GPIOZ */ ++ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", ++ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", ++ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En", ++ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3", ++ "Eth PHY nRESET", "Eth PHY Intc", ++ /* Bank GPIOH */ ++ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "", ++ /* Bank BOOT */ ++ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4", ++ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk", ++ "eMMC Reset", "eMMC CMD", ++ "", "", "", "", "", "", "", ++ /* Bank CARD */ ++ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD", ++ "SDCard D3", "SDCard D2", "SDCard Det", ++ /* Bank GPIODV */ ++ "", "", "", "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", "", ++ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK", ++ "PWM D", "PWM B", ++ /* Bank GPIOY */ ++ "Revision Bit0", "Revision Bit1", "", ++ "J2 Header Pin35", "", "", "", "J2 Header Pin36", ++ "J2 Header Pin31", "", "", "", "TF VDD En", ++ "J2 Header Pin32", "J2 Header Pin26", "", "", ++ /* Bank GPIOX */ ++ "J2 Header Pin29", "J2 Header Pin24", ++ "J2 Header Pin23", "J2 Header Pin22", ++ "J2 Header Pin21", "J2 Header Pin18", ++ "J2 Header Pin33", "J2 Header Pin19", ++ "J2 Header Pin16", "J2 Header Pin15", ++ "J2 Header Pin12", "J2 Header Pin13", ++ "J2 Header Pin8", "J2 Header Pin10", ++ "", "", "", "", "", ++ "J2 Header Pin11", "", "J2 Header Pin7", "", ++ /* Bank GPIOCLK */ ++ "", "", "", ""; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc1v8>; ++}; ++ ++&scpi_clocks { ++ status = "disabled"; ++}; ++ ++/* SD */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-ddr50; ++ max-frequency = <100000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; ++ ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&tf_io>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc3v3>; ++ vqmmc-supply = <&vcc1v8>; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb0_phy { ++ status = "disabled"; ++ phy-supply = <&usb_otg_pwr>; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++ phy-supply = <&usb_otg_pwr>; ++}; ++ ++&usb0 { ++ status = "disabled"; ++}; ++ ++&usb1 { ++ dr_mode = "host"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ hub@1 { ++ /* Genesys Logic GL852G USB 2.0 hub */ ++ compatible = "usb5e3,610"; ++ reg = <1>; ++ vdd-supply = <&p5v0>; ++ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>; ++ }; ++}; +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch new file mode 100644 index 0000000000..55b7574de1 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-WIP-net-phy-meson-gxl-implement-meson_gxl_phy_resume.patch @@ -0,0 +1,64 @@ +From 21708d1bcb84d0d8260c143746df5bff8dbe7a77 Mon Sep 17 00:00:00 2001 +From: Da Xue +Date: Tue, 8 Aug 2023 01:00:15 -0400 +Subject: [PATCH 22/37] WIP: net: phy: meson-gxl: implement + meson_gxl_phy_resume() + +While testing the suspend/resume functionality, we found the ethernet +is broken if internal PHY of the Amlogic meson GXL SoC is used. +After system resume back, the ethernet is down, no carrier can be found. + + eth0: mtu 1500 qdisc mq state + DOWN group default qlen 1000 + +In this patch, the internal PHY is re-initialized to fix this problem. + + eth0: mtu 1500 qdisc mq state UP + group default qlen 1000 + +Cc: stable@vger.kernel.org # v5.10+ +Fixes: 7334b3e47aee ("net: phy: Add Meson GXL Internal PHY driver") +Signed-off-by: Da Xue +Signed-off-by: Luke Lu +--- + drivers/net/phy/meson-gxl.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c +index 962ebbbc1348..55f281202fd4 100644 +--- a/drivers/net/phy/meson-gxl.c ++++ b/drivers/net/phy/meson-gxl.c +@@ -132,6 +132,21 @@ static int meson_gxl_config_init(struct phy_device *phydev) + return 0; + } + ++static int meson_gxl_phy_resume(struct phy_device *phydev) ++{ ++ int ret; ++ ++ ret = genphy_resume(phydev); ++ if (ret) ++ return ret; ++ ++ ret = meson_gxl_config_init(phydev); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ + /* This function is provided to cope with the possible failures of this phy + * during aneg process. When aneg fails, the PHY reports that aneg is done + * but the value found in MII_LPA is wrong: +@@ -196,7 +211,7 @@ static struct phy_driver meson_gxl_phy[] = { + .config_intr = smsc_phy_config_intr, + .handle_interrupt = smsc_phy_handle_interrupt, + .suspend = genphy_suspend, +- .resume = genphy_resume, ++ .resume = meson_gxl_phy_resume, + .read_mmd = genphy_read_mmd_unsupported, + .write_mmd = genphy_write_mmd_unsupported, + }, { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v4-dt-bindings-usb-Add-the-binding-example-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v4-dt-bindings-usb-Add-the-binding-example-.patch deleted file mode 100644 index 362987de3b..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v4-dt-bindings-usb-Add-the-binding-example-.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 1283c858520094cb01ff6fc133eab9cad8c7e276 Mon Sep 17 00:00:00 2001 -From: Anand Moon -Date: Wed, 22 Nov 2023 23:53:46 +0530 -Subject: [PATCH 23/53] FROMLIST(v4): dt-bindings: usb: Add the binding example - for the Genesys Logic GL3523 hub - -Add the binding example for the USB3.1 Genesys Logic GL3523 -integrates with USB 3.1 Gen 1 Super Speed and USB 2.0 High-Speed -hub. - -Onboard USB hub supports USB 3.x and USB 2.0 peer controllers. -which has a common reset pin and power supply. -peer-hub phandle each peer controller with proper gpio reset -and help each peer power on during initialization -and power off during suspend. - -Signed-off-by: Anand Moon ---- - .../bindings/usb/genesys,gl850g.yaml | 67 +++++++++++++++++-- - 1 file changed, 63 insertions(+), 4 deletions(-) - -diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml -index 37cf5249e526..47b7789ce7a5 100644 ---- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml -+++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml -@@ -9,9 +9,6 @@ title: Genesys Logic USB hub controller - maintainers: - - Icenowy Zheng - --allOf: -- - $ref: usb-device.yaml# -- - properties: - compatible: - enum: -@@ -27,7 +24,16 @@ properties: - - vdd-supply: - description: -- the regulator that provides 3.3V core power to the hub. -+ phandle to the regulator that provides power to the hub. -+ -+ peer-hub: -+ $ref: /schemas/types.yaml#/definitions/phandle -+ description: -+ onboard USB hub supports USB 3.x and USB 2.0 peer controllers. -+ which has a common reset pin and power supply. -+ peer-hub phandle each peer controller with proper gpio reset -+ and help each peer power on during initialization -+ and power off during suspend. - - peer-hub: - $ref: /schemas/types.yaml#/definitions/phandle -@@ -38,6 +44,33 @@ required: - - compatible - - reg - -+allOf: -+ - $ref: usb-device.yaml# -+ - if: -+ properties: -+ compatible: -+ contains: -+ enum: -+ - usb5e3,608 -+ then: -+ properties: -+ peer-hub: false -+ vdd-supply: false -+ reset-gpios: true -+ -+ - if: -+ properties: -+ compatible: -+ contains: -+ enum: -+ - usb5e3,610 -+ - usb5e3,620 -+ then: -+ properties: -+ peer-hub: true -+ vdd-supply: true -+ reset-gpios: true -+ - additionalProperties: false - - examples: -@@ -54,3 +87,29 @@ examples: - reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>; - }; - }; -+ -+ - | -+ #include -+ usb { -+ dr_mode = "host"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* 2.0 hub on port 1 */ -+ hub_2_0: hub@1 { -+ compatible = "usb5e3,610"; -+ reg = <1>; -+ peer-hub = <&hub_3_0>; -+ reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>; -+ vdd-supply = <&vcc_5v>; -+ }; -+ -+ /* 3.1 hub on port 4 */ -+ hub_3_0: hub@2 { -+ compatible = "usb5e3,620"; -+ reg = <2>; -+ peer-hub = <&hub_2_0>; -+ reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>; -+ vdd-supply = <&vcc_5v>; -+ }; -+ }; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch new file mode 100644 index 0000000000..bd27e3e0c6 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-WIP-drm-meson-add-support-for-2560x1440-resolution-o.patch @@ -0,0 +1,62 @@ +From 71facc1a41966252fd3368b8a6cfc02d3e91d85a Mon Sep 17 00:00:00 2001 +From: Dongjin Kim +Date: Thu, 10 Sep 2020 11:01:33 +0900 +Subject: [PATCH 23/37] WIP: drm/meson: add support for 2560x1440 resolution + output + +Add support for Quad HD (QHD) 2560x1440 resolution output. Timings +have been adapted from the vendor kernel. + +Signed-off-by: Joy Cho +Signed-off-by: Dongjin Kim +Signed-off-by: Christian Hewitt +--- + drivers/gpu/drm/meson/meson_vclk.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c +index dfe0c28a0f05..f5385b3e3796 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.c ++++ b/drivers/gpu/drm/meson/meson_vclk.c +@@ -357,6 +357,8 @@ enum { + MESON_VCLK_HDMI_594000, + /* 2970 /1 /1 /1 /5 /1 => /1 /2 */ + MESON_VCLK_HDMI_594000_YUV420, ++/* 4830 /2 /1 /2 /5 /1 => /1 /1 */ ++ MESON_VCLK_HDMI_241500, + }; + + struct meson_vclk_params { +@@ -467,6 +469,18 @@ struct meson_vclk_params { + .vid_pll_div = VID_PLL_DIV_5, + .vclk_div = 1, + }, ++ [MESON_VCLK_HDMI_241500] = { ++ .pll_freq = 4830000000, ++ .phy_freq = 2415000000, ++ .venc_freq = 241500000, ++ .vclk_freq = 241500000, ++ .pixel_freq = 241500000, ++ .pll_od1 = 2, ++ .pll_od2 = 1, ++ .pll_od3 = 2, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 1, ++ }, + { /* sentinel */ }, + }; + +@@ -894,6 +908,10 @@ static void meson_vclk_set(struct meson_drm *priv, + m = 0xf7; + frac = vic_alternate_clock ? 0x8148 : 0x10000; + break; ++ case 4830000: ++ m = 0xc9; ++ frac = 0xd560; ++ break; + } + + meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v4-arm64-dts-amlogic-Used-onboard-usb-hub-r.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v4-arm64-dts-amlogic-Used-onboard-usb-hub-r.patch deleted file mode 100644 index 620a6e4a4d..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v4-arm64-dts-amlogic-Used-onboard-usb-hub-r.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 3b361c7741a8c9a7ba990eda872fcc7817d35b23 Mon Sep 17 00:00:00 2001 -From: Anand Moon -Date: Tue, 10 Oct 2023 08:54:43 +0530 -Subject: [PATCH 24/53] FROMLIST(v4): arm64: dts: amlogic: Used onboard usb hub - reset on odroid n2 - -On Odroid n2/n2+ previously use gpio-hog to reset the usb hub, -switch to used on-board usb hub reset to enable the usb hub -and enable power to hub. - -Signed-off-by: Anand Moon ---- - .../dts/amlogic/meson-g12b-odroid-n2.dtsi | 36 ++++++++++++------- - 1 file changed, 24 insertions(+), 12 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -index d80dd9a3da31..86eb81112232 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi -@@ -31,6 +31,30 @@ hub_5v: regulator-hub-5v { - enable-active-high; - }; - -+ /* USB hub supports both USB 2.0 and USB 3.0 root hub */ -+ usb-hub { -+ dr_mode = "host"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* 2.0 hub on port 1 */ -+ hub_2_0: hub@1 { -+ compatible = "usb5e3,610"; -+ reg = <1>; -+ peer-hub = <&hub_3_0>; -+ vdd-supply = <&usb_pwr_en>; -+ }; -+ -+ /* 3.0 hub on port 4 */ -+ hub_3_0: hub@2 { -+ compatible = "usb5e3,620"; -+ reg = <2>; -+ peer-hub = <&hub_2_0>; -+ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; -+ vdd-supply = <&vcc_5v>; -+ }; -+ }; -+ - sound { - compatible = "amlogic,axg-sound-card"; - model = "ODROID-N2"; -@@ -234,18 +258,6 @@ &gpio { - "PIN_3", /* GPIOX_17 */ - "PIN_5", /* GPIOX_18 */ - "PIN_36"; /* GPIOX_19 */ -- /* -- * WARNING: The USB Hub on the Odroid-N2 needs a reset signal -- * to be turned high in order to be detected by the USB Controller -- * This signal should be handled by a USB specific power sequence -- * in order to reset the Hub when USB bus is powered down. -- */ -- usb-hub-hog { -- gpio-hog; -- gpios = ; -- output-high; -- line-name = "usb-hub-reset"; -- }; - }; - - &i2c3 { --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch new file mode 100644 index 0000000000..41d8258cc1 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-WIP-drm-meson-do-setup-after-resumption-to-fix-hdmi-.patch @@ -0,0 +1,89 @@ +From 5d95e031c6517a910173b80c50b800ffdc6493fa Mon Sep 17 00:00:00 2001 +From: Luke Lu +Date: Mon, 21 Aug 2023 10:50:04 +0000 +Subject: [PATCH 24/37] WIP: drm/meson: do setup after resumption to fix hdmi + output + +Some HDMI displays connected to gxl-based boards go black after +resumption, but recover after disconnecting and reconnecting. + +Redoing setup by calling dw_hdmi_poweron() fixes the problem, which +requires a call of dw_hdmi_poweroff() to maintain the internal state. + +Signed-off-by: Luke Lu +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++-- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 3 +++ + include/drm/bridge/dw_hdmi.h | 3 ++- + 3 files changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 8791408dd1ff..5eb864d2678e 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2378,7 +2378,7 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi) + hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); + } + +-static void dw_hdmi_poweron(struct dw_hdmi *hdmi) ++void dw_hdmi_poweron(struct dw_hdmi *hdmi) + { + hdmi->bridge_is_on = true; + +@@ -2388,8 +2388,9 @@ static void dw_hdmi_poweron(struct dw_hdmi *hdmi) + */ + dw_hdmi_setup(hdmi, hdmi->curr_conn, &hdmi->previous_mode); + } ++EXPORT_SYMBOL_GPL(dw_hdmi_poweron); + +-static void dw_hdmi_poweroff(struct dw_hdmi *hdmi) ++void dw_hdmi_poweroff(struct dw_hdmi *hdmi) + { + if (hdmi->phy.enabled) { + hdmi->phy.ops->disable(hdmi, hdmi->phy.data); +@@ -2398,6 +2399,7 @@ static void dw_hdmi_poweroff(struct dw_hdmi *hdmi) + + hdmi->bridge_is_on = false; + } ++EXPORT_SYMBOL_GPL(dw_hdmi_poweroff); + + static void dw_hdmi_update_power(struct dw_hdmi *hdmi) + { +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 0d7c68b29dff..8460c93d74cb 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -809,6 +809,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev) + meson_dw_hdmi->data->top_write(meson_dw_hdmi, + HDMITX_TOP_SW_RESET, 0); + ++ dw_hdmi_poweroff(meson_dw_hdmi->hdmi); ++ + return 0; + } + +@@ -821,6 +823,7 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev) + + meson_dw_hdmi_init(meson_dw_hdmi); + ++ dw_hdmi_poweron(meson_dw_hdmi->hdmi); + dw_hdmi_resume(meson_dw_hdmi->hdmi); + + return 0; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 6a46baa0737c..5eac26a51245 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -171,7 +171,8 @@ void dw_hdmi_unbind(struct dw_hdmi *hdmi); + struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev, + struct drm_encoder *encoder, + const struct dw_hdmi_plat_data *plat_data); +- ++void dw_hdmi_poweron(struct dw_hdmi *hdmi); ++void dw_hdmi_poweroff(struct dw_hdmi *hdmi); + void dw_hdmi_resume(struct dw_hdmi *hdmi); + + void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-arm64-dts-meson-radxa-zero2-add-pwm-fan-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-arm64-dts-meson-radxa-zero2-add-pwm-fan-.patch deleted file mode 100644 index 2cede28a35..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-arm64-dts-meson-radxa-zero2-add-pwm-fan-.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 983b5729b97918d6c860bdfd01093cf60b0ea83e Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 30 Jan 2023 05:09:18 +0000 -Subject: [PATCH 25/53] FROMLIST(v1): arm64: dts: meson: radxa-zero2: add - pwm-fan support - -The A311D on Zero2 needs active cooling and the board includes a header to -connect a simple fan. Add pwm-fan support with basic thermal properties so -the fan runs when connected. - -Suggested-by: Yuntian Zhang -Signed-off-by: Christian Hewitt ---- - .../dts/amlogic/meson-g12b-radxa-zero2.dts | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts -index 890f5bfebb03..895b6ea67180 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts -@@ -33,6 +33,15 @@ memory@0 { - reg = <0x0 0x0 0x0 0x80000000>; - }; - -+ fan0: pwm-fan { -+ compatible = "pwm-fan"; -+ #cooling-cells = <2>; -+ cooling-min-state = <0>; -+ cooling-max-state = <4>; -+ cooling-levels = <0 64 128 192 255>; -+ pwms = <&pwm_AO_ab 0 40000 0>; -+ }; -+ - gpio-keys-polled { - compatible = "gpio-keys-polled"; - poll-interval = <100>; -@@ -286,6 +295,24 @@ &cpu103 { - clock-latency = <50000>; - }; - -+&cpu_thermal { -+ cooling-maps { -+ map0 { -+ trip = <&cpu_passive>; -+ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+}; -+ -+&ddr_thermal { -+ cooling-maps { -+ map0 { -+ trip = <&ddr_passive>; -+ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; -+}; -+ - &frddr_a { - status = "okay"; - }; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch new file mode 100644 index 0000000000..5274640d5c --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-WIP-drm-meson-poweron-off-dw_hdmi-only-if-dw_hdmi-en.patch @@ -0,0 +1,77 @@ +From b31529fd0ef42632387ce46def44a4e847d88ce1 Mon Sep 17 00:00:00 2001 +From: Luke Lu +Date: Wed, 13 Dec 2023 03:47:44 +0000 +Subject: [PATCH 25/37] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi + enabled + +dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling +dw_hdmi_poweron() in meson_dw_hdmi_pm_resume() only with the bridge +enabled ensures this, avoiding invalid memory access when resuming +with HDMI port disconnected. + +dw_hdmi_poweroff() is called to maintain the internal state of dw_hdmi. +This is only needed when dw_hdmi_poweron() will be called later, i.e. +dw_hdmi is enabled. +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++++ + drivers/gpu/drm/meson/meson_dw_hdmi.c | 7 +++++-- + include/drm/bridge/dw_hdmi.h | 1 + + 3 files changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 5eb864d2678e..15a90b43d607 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -3644,6 +3644,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi) + } + EXPORT_SYMBOL_GPL(dw_hdmi_resume); + ++bool dw_hdmi_is_bridge_on(struct dw_hdmi *hdmi) ++{ ++ return !hdmi->disabled; ++} ++EXPORT_SYMBOL_GPL(dw_hdmi_is_bridge_on); ++ + MODULE_AUTHOR("Sascha Hauer "); + MODULE_AUTHOR("Andy Yan "); + MODULE_AUTHOR("Yakir Yang "); +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 8460c93d74cb..c44ed72a1155 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -809,7 +809,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev) + meson_dw_hdmi->data->top_write(meson_dw_hdmi, + HDMITX_TOP_SW_RESET, 0); + +- dw_hdmi_poweroff(meson_dw_hdmi->hdmi); ++ if (dw_hdmi_is_bridge_on(meson_dw_hdmi->hdmi)) ++ dw_hdmi_poweroff(meson_dw_hdmi->hdmi); + + return 0; + } +@@ -823,7 +824,9 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev) + + meson_dw_hdmi_init(meson_dw_hdmi); + +- dw_hdmi_poweron(meson_dw_hdmi->hdmi); ++ if (dw_hdmi_is_bridge_on(meson_dw_hdmi->hdmi)) ++ dw_hdmi_poweron(meson_dw_hdmi->hdmi); ++ + dw_hdmi_resume(meson_dw_hdmi->hdmi); + + return 0; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 5eac26a51245..e57d61009645 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -174,6 +174,7 @@ struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev, + void dw_hdmi_poweron(struct dw_hdmi *hdmi); + void dw_hdmi_poweroff(struct dw_hdmi *hdmi); + void dw_hdmi_resume(struct dw_hdmi *hdmi); ++bool dw_hdmi_is_bridge_on(struct dw_hdmi *hdmi); + + void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); + +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v2-meson_plane-Add-error-handling.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v2-meson_plane-Add-error-handling.patch deleted file mode 100644 index d16f35b3bc..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v2-meson_plane-Add-error-handling.patch +++ /dev/null @@ -1,53 +0,0 @@ -From a4c4025275bcce3c13ff2d2b46dfa49ff947804a Mon Sep 17 00:00:00 2001 -From: Haoran Liu -Date: Wed, 29 Nov 2023 03:34:05 -0800 -Subject: [PATCH 26/53] FROMLIST(v2): meson_plane: Add error handling - -This patch adds robust error handling to the meson_plane_create -function in drivers/gpu/drm/meson/meson_plane.c. The function -previously lacked proper handling for potential failure scenarios -of the drm_universal_plane_init call. - -Signed-off-by: Haoran Liu ---- - drivers/gpu/drm/meson/meson_plane.c | 17 +++++++++++------ - 1 file changed, 11 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c -index 815dfe30492b..b43ac61201f3 100644 ---- a/drivers/gpu/drm/meson/meson_plane.c -+++ b/drivers/gpu/drm/meson/meson_plane.c -@@ -534,6 +534,7 @@ int meson_plane_create(struct meson_drm *priv) - struct meson_plane *meson_plane; - struct drm_plane *plane; - const uint64_t *format_modifiers = format_modifiers_default; -+ int ret; - - meson_plane = devm_kzalloc(priv->drm->dev, sizeof(*meson_plane), - GFP_KERNEL); -@@ -548,12 +549,16 @@ int meson_plane_create(struct meson_drm *priv) - else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) - format_modifiers = format_modifiers_afbc_g12a; - -- drm_universal_plane_init(priv->drm, plane, 0xFF, -- &meson_plane_funcs, -- supported_drm_formats, -- ARRAY_SIZE(supported_drm_formats), -- format_modifiers, -- DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane"); -+ ret = drm_universal_plane_init(priv->drm, plane, 0xFF, -+ &meson_plane_funcs, -+ supported_drm_formats, -+ ARRAY_SIZE(supported_drm_formats), -+ format_modifiers, -+ DRM_PLANE_TYPE_PRIMARY, "meson_primary_plane"); -+ if (ret) { -+ devm_kfree(priv->drm->dev, meson_plane); -+ return ret; -+ } - - drm_plane_helper_add(plane, &meson_plane_helper_funcs); - --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-WIP-mmc-meson-gx-mmc-add-delay-during-poweroff.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-WIP-mmc-meson-gx-mmc-add-delay-during-poweroff.patch new file mode 100644 index 0000000000..274f1435a7 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-WIP-mmc-meson-gx-mmc-add-delay-during-poweroff.patch @@ -0,0 +1,24 @@ +From b2f06cfdd0e7d396d51aa733597f2a6631a4dc8c Mon Sep 17 00:00:00 2001 +From: Da Xue +Date: Sun, 22 Jun 2025 17:46:21 -0400 +Subject: [PATCH 26/37] WIP: mmc: meson-gx-mmc: add delay during poweroff + +--- + drivers/mmc/host/meson-gx-mmc.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c +index 694bb443d5f3..a39906079d29 100644 +--- a/drivers/mmc/host/meson-gx-mmc.c ++++ b/drivers/mmc/host/meson-gx-mmc.c +@@ -605,6 +605,7 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) + case MMC_POWER_OFF: + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); + mmc_regulator_disable_vqmmc(mmc); ++ msleep(50); + + break; + +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-drm-meson-improve-encoder-probe-initiali.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-drm-meson-improve-encoder-probe-initiali.patch deleted file mode 100644 index ccf146549e..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-drm-meson-improve-encoder-probe-initiali.patch +++ /dev/null @@ -1,262 +0,0 @@ -From 6fd27cae52fb7b81a1a00822cd1e378ebb3de32b Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 18 Feb 2024 18:50:35 +0100 -Subject: [PATCH 27/53] FROMLIST(v1): drm/meson: improve encoder probe / - initialization error handling - -Rename meson_encoder_{cvbs,dsi,hdmi}_init() to -meson_encoder_{cvbs,dsi,hdmi}_probe() so it's clear that these functions -are used at probe time during driver initialization. Also switch all -error prints inside those functions to use dev_err_probe() for -consistency. - -This makes the code more straight forward to read and makes the error -prints within those functions consistent (by logging all -EPROBE_DEFER -with dev_dbg(), while actual errors are logged with dev_err() and get -the error value printed). - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_drv.c | 6 +++--- - drivers/gpu/drm/meson/meson_encoder_cvbs.c | 24 ++++++++++------------ - drivers/gpu/drm/meson/meson_encoder_cvbs.h | 2 +- - drivers/gpu/drm/meson/meson_encoder_dsi.c | 23 +++++++++------------ - drivers/gpu/drm/meson/meson_encoder_dsi.h | 2 +- - drivers/gpu/drm/meson/meson_encoder_hdmi.c | 15 +++++++------- - drivers/gpu/drm/meson/meson_encoder_hdmi.h | 2 +- - 7 files changed, 35 insertions(+), 39 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c -index cb674966e9ac..17a5cca007e2 100644 ---- a/drivers/gpu/drm/meson/meson_drv.c -+++ b/drivers/gpu/drm/meson/meson_drv.c -@@ -312,7 +312,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - - /* Encoder Initialization */ - -- ret = meson_encoder_cvbs_init(priv); -+ ret = meson_encoder_cvbs_probe(priv); - if (ret) - goto exit_afbcd; - -@@ -326,12 +326,12 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - } - } - -- ret = meson_encoder_hdmi_init(priv); -+ ret = meson_encoder_hdmi_probe(priv); - if (ret) - goto exit_afbcd; - - if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { -- ret = meson_encoder_dsi_init(priv); -+ ret = meson_encoder_dsi_probe(priv); - if (ret) - goto exit_afbcd; - } -diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.c b/drivers/gpu/drm/meson/meson_encoder_cvbs.c -index 3407450435e2..d1191de855d9 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_cvbs.c -+++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.c -@@ -219,7 +219,7 @@ static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = { - .atomic_reset = drm_atomic_helper_bridge_reset, - }; - --int meson_encoder_cvbs_init(struct meson_drm *priv) -+int meson_encoder_cvbs_probe(struct meson_drm *priv) - { - struct drm_device *drm = priv->drm; - struct meson_encoder_cvbs *meson_encoder_cvbs; -@@ -240,10 +240,9 @@ int meson_encoder_cvbs_init(struct meson_drm *priv) - - meson_encoder_cvbs->next_bridge = of_drm_find_bridge(remote); - of_node_put(remote); -- if (!meson_encoder_cvbs->next_bridge) { -- dev_err(priv->dev, "Failed to find CVBS Connector bridge\n"); -- return -EPROBE_DEFER; -- } -+ if (!meson_encoder_cvbs->next_bridge) -+ return dev_err_probe(priv->dev, -EPROBE_DEFER, -+ "Failed to find CVBS Connector bridge\n"); - - /* CVBS Encoder Bridge */ - meson_encoder_cvbs->bridge.funcs = &meson_encoder_cvbs_bridge_funcs; -@@ -259,10 +258,9 @@ int meson_encoder_cvbs_init(struct meson_drm *priv) - /* Encoder */ - ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder, - DRM_MODE_ENCODER_TVDAC); -- if (ret) { -- dev_err(priv->dev, "Failed to init CVBS encoder: %d\n", ret); -- return ret; -- } -+ if (ret) -+ return dev_err_probe(priv->dev, ret, -+ "Failed to init CVBS encoder\n"); - - meson_encoder_cvbs->encoder.possible_crtcs = BIT(0); - -@@ -276,10 +274,10 @@ int meson_encoder_cvbs_init(struct meson_drm *priv) - - /* Initialize & attach Bridge Connector */ - connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder); -- if (IS_ERR(connector)) { -- dev_err(priv->dev, "Unable to create CVBS bridge connector\n"); -- return PTR_ERR(connector); -- } -+ if (IS_ERR(connector)) -+ return dev_err_probe(priv->dev, PTR_ERR(connector), -+ "Unable to create CVBS bridge connector\n"); -+ - drm_connector_attach_encoder(connector, &meson_encoder_cvbs->encoder); - - priv->encoders[MESON_ENC_CVBS] = meson_encoder_cvbs; -diff --git a/drivers/gpu/drm/meson/meson_encoder_cvbs.h b/drivers/gpu/drm/meson/meson_encoder_cvbs.h -index 09710fec3c66..7b7bc85c03f7 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_cvbs.h -+++ b/drivers/gpu/drm/meson/meson_encoder_cvbs.h -@@ -24,7 +24,7 @@ struct meson_cvbs_mode { - /* Modes supported by the CVBS output */ - extern struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT]; - --int meson_encoder_cvbs_init(struct meson_drm *priv); -+int meson_encoder_cvbs_probe(struct meson_drm *priv); - void meson_encoder_cvbs_remove(struct meson_drm *priv); - - #endif /* __MESON_VENC_CVBS_H */ -diff --git a/drivers/gpu/drm/meson/meson_encoder_dsi.c b/drivers/gpu/drm/meson/meson_encoder_dsi.c -index 311b91630fbe..7816902f5907 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_dsi.c -+++ b/drivers/gpu/drm/meson/meson_encoder_dsi.c -@@ -100,7 +100,7 @@ static const struct drm_bridge_funcs meson_encoder_dsi_bridge_funcs = { - .atomic_reset = drm_atomic_helper_bridge_reset, - }; - --int meson_encoder_dsi_init(struct meson_drm *priv) -+int meson_encoder_dsi_probe(struct meson_drm *priv) - { - struct meson_encoder_dsi *meson_encoder_dsi; - struct device_node *remote; -@@ -118,10 +118,9 @@ int meson_encoder_dsi_init(struct meson_drm *priv) - } - - meson_encoder_dsi->next_bridge = of_drm_find_bridge(remote); -- if (!meson_encoder_dsi->next_bridge) { -- dev_dbg(priv->dev, "Failed to find DSI transceiver bridge\n"); -- return -EPROBE_DEFER; -- } -+ if (!meson_encoder_dsi->next_bridge) -+ return dev_err_probe(priv->dev, -EPROBE_DEFER, -+ "Failed to find DSI transceiver bridge\n"); - - /* DSI Encoder Bridge */ - meson_encoder_dsi->bridge.funcs = &meson_encoder_dsi_bridge_funcs; -@@ -135,19 +134,17 @@ int meson_encoder_dsi_init(struct meson_drm *priv) - /* Encoder */ - ret = drm_simple_encoder_init(priv->drm, &meson_encoder_dsi->encoder, - DRM_MODE_ENCODER_DSI); -- if (ret) { -- dev_err(priv->dev, "Failed to init DSI encoder: %d\n", ret); -- return ret; -- } -+ if (ret) -+ return dev_err_probe(priv->dev, ret, -+ "Failed to init DSI encoder\n"); - - meson_encoder_dsi->encoder.possible_crtcs = BIT(0); - - /* Attach DSI Encoder Bridge to Encoder */ - ret = drm_bridge_attach(&meson_encoder_dsi->encoder, &meson_encoder_dsi->bridge, NULL, 0); -- if (ret) { -- dev_err(priv->dev, "Failed to attach bridge: %d\n", ret); -- return ret; -- } -+ if (ret) -+ return dev_err_probe(priv->dev, ret, -+ "Failed to attach bridge\n"); - - /* - * We should have now in place: -diff --git a/drivers/gpu/drm/meson/meson_encoder_dsi.h b/drivers/gpu/drm/meson/meson_encoder_dsi.h -index 9277d7015193..85d5b61805f2 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_dsi.h -+++ b/drivers/gpu/drm/meson/meson_encoder_dsi.h -@@ -7,7 +7,7 @@ - #ifndef __MESON_ENCODER_DSI_H - #define __MESON_ENCODER_DSI_H - --int meson_encoder_dsi_init(struct meson_drm *priv); -+int meson_encoder_dsi_probe(struct meson_drm *priv); - void meson_encoder_dsi_remove(struct meson_drm *priv); - - #endif /* __MESON_ENCODER_DSI_H */ -diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c -index c4686568c9ca..22e07847a9a7 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c -+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c -@@ -354,7 +354,7 @@ static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = { - .atomic_reset = drm_atomic_helper_bridge_reset, - }; - --int meson_encoder_hdmi_init(struct meson_drm *priv) -+int meson_encoder_hdmi_probe(struct meson_drm *priv) - { - struct meson_encoder_hdmi *meson_encoder_hdmi; - struct platform_device *pdev; -@@ -374,8 +374,8 @@ int meson_encoder_hdmi_init(struct meson_drm *priv) - - meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote); - if (!meson_encoder_hdmi->next_bridge) { -- dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n"); -- ret = -EPROBE_DEFER; -+ ret = dev_err_probe(priv->dev, -EPROBE_DEFER, -+ "Failed to find HDMI transceiver bridge\n"); - goto err_put_node; - } - -@@ -393,7 +393,7 @@ int meson_encoder_hdmi_init(struct meson_drm *priv) - ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder, - DRM_MODE_ENCODER_TMDS); - if (ret) { -- dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret); -+ dev_err_probe(priv->dev, ret, "Failed to init HDMI encoder\n"); - goto err_put_node; - } - -@@ -403,7 +403,7 @@ int meson_encoder_hdmi_init(struct meson_drm *priv) - ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL, - DRM_BRIDGE_ATTACH_NO_CONNECTOR); - if (ret) { -- dev_err(priv->dev, "Failed to attach bridge: %d\n", ret); -+ dev_err_probe(priv->dev, ret, "Failed to attach bridge\n"); - goto err_put_node; - } - -@@ -411,8 +411,9 @@ int meson_encoder_hdmi_init(struct meson_drm *priv) - meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm, - &meson_encoder_hdmi->encoder); - if (IS_ERR(meson_encoder_hdmi->connector)) { -- dev_err(priv->dev, "Unable to create HDMI bridge connector\n"); -- ret = PTR_ERR(meson_encoder_hdmi->connector); -+ ret = dev_err_probe(priv->dev, -+ PTR_ERR(meson_encoder_hdmi->connector), -+ "Unable to create HDMI bridge connector\n"); - goto err_put_node; - } - drm_connector_attach_encoder(meson_encoder_hdmi->connector, -diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.h b/drivers/gpu/drm/meson/meson_encoder_hdmi.h -index a6cd38eb5f71..fd5485875db8 100644 ---- a/drivers/gpu/drm/meson/meson_encoder_hdmi.h -+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.h -@@ -7,7 +7,7 @@ - #ifndef __MESON_ENCODER_HDMI_H - #define __MESON_ENCODER_HDMI_H - --int meson_encoder_hdmi_init(struct meson_drm *priv); -+int meson_encoder_hdmi_probe(struct meson_drm *priv); - void meson_encoder_hdmi_remove(struct meson_drm *priv); - - #endif /* __MESON_ENCODER_HDMI_H */ --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch similarity index 93% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch index db4952d89a..fce998a303 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0043-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-WIP-arm64-dts-meson-set-p212-p23x-q20x-SDIO-to-100MH.patch @@ -1,7 +1,7 @@ -From 7354c155f1956487683a192e629cda68bcd38bd8 Mon Sep 17 00:00:00 2001 +From 59614ff80eb272009bc6bdfcb47e8df6ec93a2a7 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 18 Jan 2022 15:09:12 +0000 -Subject: [PATCH 43/53] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to +Subject: [PATCH 27/37] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to 100MHz Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but @@ -79,10 +79,10 @@ Signed-off-by: Christian Hewitt 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -index 08d6b69ba469..9ac5079019fa 100644 +index 6da1316d97c6..f6ef4fc4a85c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -@@ -256,7 +256,7 @@ &sd_emmc_a { +@@ -258,7 +258,7 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; @@ -92,10 +92,10 @@ index 08d6b69ba469..9ac5079019fa 100644 non-removable; disable-wp; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -index 7e7dc87ede2d..1c64b2d64ae8 100644 +index 05a0d4de3ad7..ccaadb497880 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -@@ -121,7 +121,7 @@ &sd_emmc_a { +@@ -119,7 +119,7 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-drm-meson-vclk-fix-calculation-of-59.94-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-drm-meson-vclk-fix-calculation-of-59.94-.patch deleted file mode 100644 index fe5c85f5c5..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-drm-meson-vclk-fix-calculation-of-59.94-.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 9fa5e4f1d94a0ca01deb5bbe03299e415f0df8c3 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Tue, 9 Jan 2024 16:20:14 +0000 -Subject: [PATCH 28/53] FROMLIST(v1): drm/meson: vclk: fix calculation of 59.94 - fractional rates - -Playing 4K media with 59.94 fractional rate (typically VP9) causes the screen to lose -sync with the following error reported in the system log: - -[ 89.610280] Fatal Error, invalid HDMI vclk freq 593406 - -Modetest shows the following: - -3840x2160 59.94 3840 4016 4104 4400 2160 2168 2178 2250 593407 flags: phsync, pvsync; type: driver -drm calculated value -------------------------------------^ - -Change the fractional rate calculation to stop DIV_ROUND_CLOSEST rounding down which -results in vclk freq failing to match correctly. - -Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup") -Signed-off-by: Christian Hewitt ---- - drivers/gpu/drm/meson/meson_vclk.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c -index 2a82119eb58e..2a942dc6a6dc 100644 ---- a/drivers/gpu/drm/meson/meson_vclk.c -+++ b/drivers/gpu/drm/meson/meson_vclk.c -@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq, - FREQ_1000_1001(params[i].pixel_freq)); - DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n", - i, params[i].phy_freq, -- FREQ_1000_1001(params[i].phy_freq/10)*10); -+ FREQ_1000_1001(params[i].phy_freq/1000)*1000); - /* Match strict frequency */ - if (phy_freq == params[i].phy_freq && - vclk_freq == params[i].vclk_freq) - return MODE_OK; - /* Match 1000/1001 variant */ -- if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) && -+ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/1000)*1000) && - vclk_freq == FREQ_1000_1001(params[i].vclk_freq)) - return MODE_OK; - } -@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - - for (freq = 0 ; params[freq].pixel_freq ; ++freq) { - if ((phy_freq == params[freq].phy_freq || -- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && -+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/1000)*1000) && - (vclk_freq == params[freq].vclk_freq || - vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) { - if (vclk_freq != params[freq].vclk_freq) --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch similarity index 81% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch index 232c2531d7..7a63388ffc 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0045-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-WIP-arm64-dts-meson-remove-SDIO-node-from-Khadas-VIM.patch @@ -1,7 +1,7 @@ -From 5661824fa83b4eeb182286aa8ad3b97d1025852c Mon Sep 17 00:00:00 2001 +From 087bb82aefa86c31f4ea92774452392763a4c83b Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Tue, 18 Jan 2022 15:18:32 +0000 -Subject: [PATCH 45/53] WIP: arm64: dts: meson: remove SDIO node from Khadas +Subject: [PATCH 28/37] WIP: arm64: dts: meson: remove SDIO node from Khadas VIM1 Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we @@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -index dacbca73279c..aeda42d5d606 100644 +index e137ebd48c5e..563e6e909363 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -@@ -217,10 +217,6 @@ &pwm_ef { +@@ -219,10 +219,6 @@ &pwm_ef { pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; }; diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v1-ASoC-meson-axg-tdm-interface-fix-mclk-se.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v1-ASoC-meson-axg-tdm-interface-fix-mclk-se.patch deleted file mode 100644 index 5d469047b4..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v1-ASoC-meson-axg-tdm-interface-fix-mclk-se.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 5cddc22049efb7e7aa5382ce789379c943170187 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:07 +0100 -Subject: [PATCH 29/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: fix mclk - setup without mclk-fs - -By default, when mclk-fs is not provided, the tdm-interface driver -requests an MCLK that is 4x the bit clock, SCLK. - -However there is no justification for this: - -* If the codec needs MCLK for its operation, mclk-fs is expected to be set - according to the codec requirements. -* If the codec does not need MCLK the minimum is 2 * SCLK, because this is - minimum the divider between SCLK and MCLK can do. - -Multiplying by 4 may cause problems because the PLL limit may be reached -sooner than it should, so use 2x instead. - -Fixes: d60e4f1e4be5 ("ASoC: meson: add tdm interface driver") -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-tdm-interface.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c -index 1c3d433cefd2..cd5168e826df 100644 ---- a/sound/soc/meson/axg-tdm-interface.c -+++ b/sound/soc/meson/axg-tdm-interface.c -@@ -264,8 +264,8 @@ static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai, - srate = iface->slots * iface->slot_width * params_rate(params); - - if (!iface->mclk_rate) { -- /* If no specific mclk is requested, default to bit clock * 4 */ -- clk_set_rate(iface->mclk, 4 * srate); -+ /* If no specific mclk is requested, default to bit clock * 2 */ -+ clk_set_rate(iface->mclk, 2 * srate); - } else { - /* Check if we can actually get the bit clock from mclk */ - if (iface->mclk_rate % srate) { --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch similarity index 81% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch index 0c69eff32c..8b3a739303 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0044-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-WIP-arm64-dts-meson-add-UHS-SDIO-capabilities-to-p21.patch @@ -1,7 +1,7 @@ -From fb6de4d2453abb6e9ff8f0b653eb12e94156958c Mon Sep 17 00:00:00 2001 +From d05fd0dbca2f4e7233ca5c1fb9fc8ca5575d4dbc Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Wed, 19 Jan 2022 06:45:06 +0000 -Subject: [PATCH 44/53] WIP: arm64: dts: meson: add UHS SDIO capabilities to +Subject: [PATCH 29/37] WIP: arm64: dts: meson: add UHS SDIO capabilities to p212/p23x/q20x Add UHS capabilities to the SDIO node to enable 100MHz speeds. @@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt 2 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -index 9ac5079019fa..e6f88ec58869 100644 +index f6ef4fc4a85c..b3385f71bb48 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -@@ -256,6 +256,10 @@ &sd_emmc_a { +@@ -258,6 +258,10 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; @@ -28,10 +28,10 @@ index 9ac5079019fa..e6f88ec58869 100644 non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -index 1c64b2d64ae8..b83b38b2d9e1 100644 +index ccaadb497880..59539eca8f42 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -@@ -121,6 +121,10 @@ &sd_emmc_a { +@@ -119,6 +119,10 @@ &sd_emmc_a { bus-width = <4>; cap-sd-highspeed; diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v1-ASoC-meson-axg-tdm-interface-add-frame-r.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v1-ASoC-meson-axg-tdm-interface-add-frame-r.patch deleted file mode 100644 index b9532ab4de..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v1-ASoC-meson-axg-tdm-interface-add-frame-r.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 69a95e8b2be63812ca0b8e3b59786a21f074cfe9 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:08 +0100 -Subject: [PATCH 30/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: add frame - rate constraint - -According to Amlogic datasheets for the SoCs supported by this driver, the -maximum bit clock rate is 100MHz. - -The tdm interface allows the rates listed by the DAI driver, regardless of -the number slots or their width. However, these will impact the bit clock -rate. - -Hitting the 100MHz limit is very unlikely for most use cases but it is -possible. - -For example with 32 slots / 32 bits wide, the maximum rate is no longer -384kHz but ~96kHz. - -Add the constraint accordingly if the component is not already active. -If it is active, the rate is already constrained by the first stream rate. - -Fixes: d60e4f1e4be5 ("ASoC: meson: add tdm interface driver") -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-tdm-interface.c | 25 ++++++++++++++++++------- - 1 file changed, 18 insertions(+), 7 deletions(-) - -diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c -index cd5168e826df..2cedbce73837 100644 ---- a/sound/soc/meson/axg-tdm-interface.c -+++ b/sound/soc/meson/axg-tdm-interface.c -@@ -12,6 +12,9 @@ - - #include "axg-tdm.h" - -+/* Maximum bit clock frequency according the datasheets */ -+#define MAX_SCLK 100000000 /* Hz */ -+ - enum { - TDM_IFACE_PAD, - TDM_IFACE_LOOPBACK, -@@ -153,19 +156,27 @@ static int axg_tdm_iface_startup(struct snd_pcm_substream *substream, - return -EINVAL; - } - -- /* Apply component wide rate symmetry */ - if (snd_soc_component_active(dai->component)) { -+ /* Apply component wide rate symmetry */ - ret = snd_pcm_hw_constraint_single(substream->runtime, - SNDRV_PCM_HW_PARAM_RATE, - iface->rate); -- if (ret < 0) { -- dev_err(dai->dev, -- "can't set iface rate constraint\n"); -- return ret; -- } -+ -+ } else { -+ /* Limit rate according to the slot number and width */ -+ unsigned int max_rate = -+ MAX_SCLK / (iface->slots * iface->slot_width); -+ ret = snd_pcm_hw_constraint_minmax(substream->runtime, -+ SNDRV_PCM_HW_PARAM_RATE, -+ 0, max_rate); - } - -- return 0; -+ if (ret < 0) -+ dev_err(dai->dev, "can't set iface rate constraint\n"); -+ else -+ ret = 0; -+ -+ return ret; - } - - static int axg_tdm_iface_set_stream(struct snd_pcm_substream *substream, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch new file mode 100644 index 0000000000..3e77329c8c --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-WIP-dt-bindings-arm-amlogic-add-support-for-Tanix-TX.patch @@ -0,0 +1,28 @@ +From 595ae18972bfb55b20eecf724cf73d3c3b133910 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 9 Feb 2023 09:59:58 +0000 +Subject: [PATCH 30/37] WIP: dt-bindings: arm: amlogic: add support for Tanix + TX9 Pro + +The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip + +Signed-off-by: Christian Hewitt +--- + Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml +index 05edf22e6c30..13dd7abbdcf8 100644 +--- a/Documentation/devicetree/bindings/arm/amlogic.yaml ++++ b/Documentation/devicetree/bindings/arm/amlogic.yaml +@@ -134,6 +134,7 @@ properties: + - libretech,aml-s912-pc + - minix,neo-u9h + - nexbox,a1 ++ - oranth,tx9-pro + - tronsmart,vega-s96 + - videostrong,gxm-kiii-pro + - wetek,core2 +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-ASoC-meson-axg-tdm-interface-update-erro.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-ASoC-meson-axg-tdm-interface-update-erro.patch deleted file mode 100644 index 2311277a38..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v1-ASoC-meson-axg-tdm-interface-update-erro.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9b3d51967fcfe47d82f280e8030aa3dc5fcc5c02 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:09 +0100 -Subject: [PATCH 31/53] FROMLIST(v1): ASoC: meson: axg-tdm-interface: update - error format error traces - -ASoC stopped using CBS_CFS and CBM_CFM a few years ago but the traces in -the amlogic tdm interface driver did not follow. - -Update this to match the new format names - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-tdm-interface.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/sound/soc/meson/axg-tdm-interface.c b/sound/soc/meson/axg-tdm-interface.c -index 2cedbce73837..bf708717635b 100644 ---- a/sound/soc/meson/axg-tdm-interface.c -+++ b/sound/soc/meson/axg-tdm-interface.c -@@ -133,7 +133,7 @@ static int axg_tdm_iface_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) - - case SND_SOC_DAIFMT_BP_FC: - case SND_SOC_DAIFMT_BC_FP: -- dev_err(dai->dev, "only CBS_CFS and CBM_CFM are supported\n"); -+ dev_err(dai->dev, "only BP_FP and BC_FC are supported\n"); - fallthrough; - default: - return -EINVAL; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch new file mode 100644 index 0000000000..aee1436e7d --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-WIP-arm64-dts-meson-add-initial-device-tree-for-Tani.patch @@ -0,0 +1,139 @@ +From 08187f15dc8ca4b29e2b847b3c5ed0026191480e Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 9 Feb 2023 10:01:14 +0000 +Subject: [PATCH 31/37] WIP: arm64: dts: meson: add initial device-tree for + Tanix TX9 Pro + +Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with +an S912 chip and the following specs: + +- 3GB DDR3 RAM +- 32GB eMMC +- 10/100/1000 Base-T Ethernet +- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0) +- HDMI 2.0a video +- VFD for clock/status +- 2x USB 2.0 ports +- IR receiver +- 1x Power LED (white) +- 1x Update/Reset button (underside) +- 1x micro SD card slot + +Signed-off-by: Christian Hewitt +--- + arch/arm64/boot/dts/amlogic/Makefile | 1 + + .../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 90 +++++++++++++++++++ + 2 files changed, 91 insertions(+) + create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts + +diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile +index b593736ff60b..9e57cc56bfa7 100644 +--- a/arch/arm64/boot/dts/amlogic/Makefile ++++ b/arch/arm64/boot/dts/amlogic/Makefile +@@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb ++dtb-$(CONFIG_ARCH_MESON) += meson-gxm-tx9-pro.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts +new file mode 100644 +index 000000000000..9a62176cfe5a +--- /dev/null ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts +@@ -0,0 +1,90 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 Endless Computers, Inc. ++ * Author: Carlo Caione ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxm.dtsi" ++#include "meson-gx-p23x-q20x.dtsi" ++#include ++ ++/ { ++ compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm"; ++ model = "Tanix TX9 Pro"; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1710000>; ++ ++ button-function { ++ label = "Update"; ++ linux,code = ; ++ press-threshold-microvolt = <10000>; ++ }; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ poll-interval = <100>; ++ ++ button { ++ label = "power"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; ++ phy-mode = "rgmii"; ++}; ++ ++&external_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <80000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_15 */ ++ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++&ir { ++ linux,rc-map-name = "rc-tanix-tx3mini"; ++}; ++ ++&sd_emmc_a { ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++&uart_A { ++ status = "okay"; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ max-speed = <2000000>; ++ clocks = <&wifi32k>; ++ clock-names = "lpo"; ++ }; ++}; +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-ASoC-meson-axg-spdifin-use-max-width-for.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-ASoC-meson-axg-spdifin-use-max-width-for.patch deleted file mode 100644 index 9812538b92..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-FROMLIST-v1-ASoC-meson-axg-spdifin-use-max-width-for.patch +++ /dev/null @@ -1,47 +0,0 @@ -From b399257ec04a93856fd0f1ebf5b6060dddf6aaed Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:10 +0100 -Subject: [PATCH 32/53] FROMLIST(v1): ASoC: meson: axg-spdifin: use max width - for rate detection - -Use maximum width between 2 edges to setup spdifin thresholds -and detect the input sample rate. This comes from Amlogic SDK and -seems to be marginally more reliable than minimum width. - -This is done to align with a future eARC support. -No issue was reported with minimum width so far, this is considered -to be an update so no Fixes tag is set. - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-spdifin.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/sound/soc/meson/axg-spdifin.c b/sound/soc/meson/axg-spdifin.c -index bc2f2849ecfb..e721f579321e 100644 ---- a/sound/soc/meson/axg-spdifin.c -+++ b/sound/soc/meson/axg-spdifin.c -@@ -179,9 +179,9 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai, - SPDIFIN_CTRL1_BASE_TIMER, - FIELD_PREP(SPDIFIN_CTRL1_BASE_TIMER, rate / 1000)); - -- /* Threshold based on the minimum width between two edges */ -+ /* Threshold based on the maximum width between two edges */ - regmap_update_bits(priv->map, SPDIFIN_CTRL0, -- SPDIFIN_CTRL0_WIDTH_SEL, SPDIFIN_CTRL0_WIDTH_SEL); -+ SPDIFIN_CTRL0_WIDTH_SEL, 0); - - /* Calculate the last timer which has no threshold */ - t_next = axg_spdifin_mode_timer(priv, i, rate); -@@ -199,7 +199,7 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai, - axg_spdifin_write_timer(priv->map, i, t); - - /* Set the threshold value */ -- axg_spdifin_write_threshold(priv->map, i, t + t_next); -+ axg_spdifin_write_threshold(priv->map, i, 3 * (t + t_next)); - - /* Save the current timer for the next threshold calculation */ - t_next = t; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-WIP-dt-bindings-vendor-prefixes-add-Titan-Micro-Elec.patch similarity index 52% rename from projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch rename to projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-WIP-dt-bindings-vendor-prefixes-add-Titan-Micro-Elec.patch index 8b1f89b610..ea510b4ac6 100644 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-WIP-dt-bindings-vendor-prefixes-add-Titan-Micro-Elec.patch @@ -1,26 +1,21 @@ -From 58d3f1f106febd55da1b5e56016fb8e33fde09bd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Andreas=20F=C3=A4rber?= +From bb0a8ba6c365a8dd979f2e3d040f565a1d1f36b0 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt Date: Sun, 20 Feb 2022 08:23:12 +0000 -Subject: [PATCH 13/53] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan - Micro Electronics -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit +Subject: [PATCH 32/37] WIP: dt-bindings: vendor-prefixes: add Titan Micro + Electronics -Assign vendor prefix "titanmec", matching their domain name. +Add a vendor prefix for Shenzhen Titan Micro Electronics Co., Ltd. -Acked-by: Rob Herring -Signed-off-by: Andreas Färber -Signed-off-by: Heiner Kallweit +Signed-off-by: Heiner Kallweit --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml -index 1a0dc04f1db4..a3c08f859ab1 100644 +index 5d2a7a8d3ac6..32f8f24ec809 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml -@@ -1427,6 +1427,8 @@ patternProperties: +@@ -1548,6 +1548,8 @@ patternProperties: description: Texas Instruments "^tianma,.*": description: Tianma Micro-electronics Co., Ltd. diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-ASoC-meson-axg-fifo-take-continuous-rate.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-ASoC-meson-axg-fifo-take-continuous-rate.patch deleted file mode 100644 index 1348494da3..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-FROMLIST-v1-ASoC-meson-axg-fifo-take-continuous-rate.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 453af3a1ee8cea68dfdbdaed7a0a41f4a3743c76 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:11 +0100 -Subject: [PATCH 33/53] FROMLIST(v1): ASoC: meson: axg-fifo: take continuous - rates - -The rate of the stream does not matter for the fifos of the axg family. -Fifos will just push or pull data to/from the DDR according to consumption -or production of the downstream element, which is the DPCM backend. - -Drop the rate list and allow continuous rates. The lower and upper rate are -set according what is known to work with the different backends - -This allows the PDM input backend to also use continuous rates. - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-fifo.h | 2 -- - sound/soc/meson/axg-frddr.c | 8 ++++++-- - sound/soc/meson/axg-toddr.c | 8 ++++++-- - 3 files changed, 12 insertions(+), 6 deletions(-) - -diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h -index df528e8cb7c9..a14c31eb06d8 100644 ---- a/sound/soc/meson/axg-fifo.h -+++ b/sound/soc/meson/axg-fifo.h -@@ -21,8 +21,6 @@ struct snd_soc_dai_driver; - struct snd_soc_pcm_runtime; - - #define AXG_FIFO_CH_MAX 128 --#define AXG_FIFO_RATES (SNDRV_PCM_RATE_5512 | \ -- SNDRV_PCM_RATE_8000_384000) - #define AXG_FIFO_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ - SNDRV_PCM_FMTBIT_S16_LE | \ - SNDRV_PCM_FMTBIT_S20_LE | \ -diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c -index 8c166a5f338c..98140f449eb3 100644 ---- a/sound/soc/meson/axg-frddr.c -+++ b/sound/soc/meson/axg-frddr.c -@@ -109,7 +109,9 @@ static struct snd_soc_dai_driver axg_frddr_dai_drv = { - .stream_name = "Playback", - .channels_min = 1, - .channels_max = AXG_FIFO_CH_MAX, -- .rates = AXG_FIFO_RATES, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 5515, -+ .rate_max = 384000, - .formats = AXG_FIFO_FORMATS, - }, - .ops = &axg_frddr_ops, -@@ -184,7 +186,9 @@ static struct snd_soc_dai_driver g12a_frddr_dai_drv = { - .stream_name = "Playback", - .channels_min = 1, - .channels_max = AXG_FIFO_CH_MAX, -- .rates = AXG_FIFO_RATES, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 5515, -+ .rate_max = 384000, - .formats = AXG_FIFO_FORMATS, - }, - .ops = &g12a_frddr_ops, -diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c -index 1a0be177b8fe..32ee45cce7f8 100644 ---- a/sound/soc/meson/axg-toddr.c -+++ b/sound/soc/meson/axg-toddr.c -@@ -131,7 +131,9 @@ static struct snd_soc_dai_driver axg_toddr_dai_drv = { - .stream_name = "Capture", - .channels_min = 1, - .channels_max = AXG_FIFO_CH_MAX, -- .rates = AXG_FIFO_RATES, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 5515, -+ .rate_max = 384000, - .formats = AXG_FIFO_FORMATS, - }, - .ops = &axg_toddr_ops, -@@ -226,7 +228,9 @@ static struct snd_soc_dai_driver g12a_toddr_dai_drv = { - .stream_name = "Capture", - .channels_min = 1, - .channels_max = AXG_FIFO_CH_MAX, -- .rates = AXG_FIFO_RATES, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 5515, -+ .rate_max = 384000, - .formats = AXG_FIFO_FORMATS, - }, - .ops = &g12a_toddr_ops, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-WIP-dt-bindings-vendor-prefixes-add-Fuda-Hisi-Microe.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-WIP-dt-bindings-vendor-prefixes-add-Fuda-Hisi-Microe.patch new file mode 100644 index 0000000000..26c0e5b031 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-WIP-dt-bindings-vendor-prefixes-add-Fuda-Hisi-Microe.patch @@ -0,0 +1,29 @@ +From ea1f663261cea2fe53626fd2d96c5e8b4d475e28 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 12 Jun 2025 10:25:29 +0000 +Subject: [PATCH 33/37] WIP: dt-bindings: vendor-prefixes: add Fuda Hisi + Microelectronics + +Add the "fdhisi" prefix for Fuda Hisi Microelectronics Co, Ltd. + +Signed-off-by: Christian Hewitt +--- + Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml +index 32f8f24ec809..d02615496b2b 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -531,6 +531,8 @@ patternProperties: + description: Fastrax Oy + "^fcs,.*": + description: Fairchild Semiconductor ++ "^fdhisi,.*": ++ description: Fuzhou Fuda Hisi Microelectronics Co., Ltd. + "^feixin,.*": + description: Shenzhen Feixin Photoelectic Co., Ltd + "^feiyang,.*": +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-ASoC-meson-axg-fifo-use-FIELD-helpers.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-ASoC-meson-axg-fifo-use-FIELD-helpers.patch deleted file mode 100644 index 4a00d59064..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-FROMLIST-v1-ASoC-meson-axg-fifo-use-FIELD-helpers.patch +++ /dev/null @@ -1,176 +0,0 @@ -From 3e72fee0fba2026ba5c16a4a3f329fc04fcce310 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 23 Feb 2024 18:51:12 +0100 -Subject: [PATCH 34/53] FROMLIST(v1): ASoC: meson: axg-fifo: use FIELD helpers - -Use FIELD_GET() and FIELD_PREP() helpers instead of doing it manually. - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/axg-fifo.c | 24 ++++++++++++------------ - sound/soc/meson/axg-fifo.h | 12 +++++------- - sound/soc/meson/axg-frddr.c | 4 ++-- - sound/soc/meson/axg-toddr.c | 21 +++++++++------------ - 4 files changed, 28 insertions(+), 33 deletions(-) - -diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c -index 65541fdb0038..597fd39e6e48 100644 ---- a/sound/soc/meson/axg-fifo.c -+++ b/sound/soc/meson/axg-fifo.c -@@ -145,8 +145,8 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component, - /* Enable irq if necessary */ - irq_en = runtime->no_period_wakeup ? 0 : FIFO_INT_COUNT_REPEAT; - regmap_update_bits(fifo->map, FIFO_CTRL0, -- CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT), -- CTRL0_INT_EN(irq_en)); -+ CTRL0_INT_EN, -+ FIELD_PREP(CTRL0_INT_EN, irq_en)); - - return 0; - } -@@ -176,9 +176,9 @@ int axg_fifo_pcm_hw_free(struct snd_soc_component *component, - { - struct axg_fifo *fifo = axg_fifo_data(ss); - -- /* Disable the block count irq */ -+ /* Disable irqs */ - regmap_update_bits(fifo->map, FIFO_CTRL0, -- CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT), 0); -+ CTRL0_INT_EN, 0); - - return 0; - } -@@ -187,13 +187,13 @@ EXPORT_SYMBOL_GPL(axg_fifo_pcm_hw_free); - static void axg_fifo_ack_irq(struct axg_fifo *fifo, u8 mask) - { - regmap_update_bits(fifo->map, FIFO_CTRL1, -- CTRL1_INT_CLR(FIFO_INT_MASK), -- CTRL1_INT_CLR(mask)); -+ CTRL1_INT_CLR, -+ FIELD_PREP(CTRL1_INT_CLR, mask)); - - /* Clear must also be cleared */ - regmap_update_bits(fifo->map, FIFO_CTRL1, -- CTRL1_INT_CLR(FIFO_INT_MASK), -- 0); -+ CTRL1_INT_CLR, -+ FIELD_PREP(CTRL1_INT_CLR, 0)); - } - - static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id) -@@ -204,7 +204,7 @@ static irqreturn_t axg_fifo_pcm_irq_block(int irq, void *dev_id) - - regmap_read(fifo->map, FIFO_STATUS1, &status); - -- status = STATUS1_INT_STS(status) & FIFO_INT_MASK; -+ status = FIELD_GET(STATUS1_INT_STS, status); - if (status & FIFO_INT_COUNT_REPEAT) - snd_pcm_period_elapsed(ss); - else -@@ -254,15 +254,15 @@ int axg_fifo_pcm_open(struct snd_soc_component *component, - - /* Setup status2 so it reports the memory pointer */ - regmap_update_bits(fifo->map, FIFO_CTRL1, -- CTRL1_STATUS2_SEL_MASK, -- CTRL1_STATUS2_SEL(STATUS2_SEL_DDR_READ)); -+ CTRL1_STATUS2_SEL, -+ FIELD_PREP(CTRL1_STATUS2_SEL, STATUS2_SEL_DDR_READ)); - - /* Make sure the dma is initially disabled */ - __dma_enable(fifo, false); - - /* Disable irqs until params are ready */ - regmap_update_bits(fifo->map, FIFO_CTRL0, -- CTRL0_INT_EN(FIFO_INT_MASK), 0); -+ CTRL0_INT_EN, 0); - - /* Clear any pending interrupt */ - axg_fifo_ack_irq(fifo, FIFO_INT_MASK); -diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h -index a14c31eb06d8..4c48c0a08481 100644 ---- a/sound/soc/meson/axg-fifo.h -+++ b/sound/soc/meson/axg-fifo.h -@@ -40,21 +40,19 @@ struct snd_soc_pcm_runtime; - - #define FIFO_CTRL0 0x00 - #define CTRL0_DMA_EN BIT(31) --#define CTRL0_INT_EN(x) ((x) << 16) -+#define CTRL0_INT_EN GENMASK(23, 16) - #define CTRL0_SEL_MASK GENMASK(2, 0) - #define CTRL0_SEL_SHIFT 0 - #define FIFO_CTRL1 0x04 --#define CTRL1_INT_CLR(x) ((x) << 0) --#define CTRL1_STATUS2_SEL_MASK GENMASK(11, 8) --#define CTRL1_STATUS2_SEL(x) ((x) << 8) -+#define CTRL1_INT_CLR GENMASK(7, 0) -+#define CTRL1_STATUS2_SEL GENMASK(11, 8) - #define STATUS2_SEL_DDR_READ 0 --#define CTRL1_FRDDR_DEPTH_MASK GENMASK(31, 24) --#define CTRL1_FRDDR_DEPTH(x) ((x) << 24) -+#define CTRL1_FRDDR_DEPTH GENMASK(31, 24) - #define FIFO_START_ADDR 0x08 - #define FIFO_FINISH_ADDR 0x0c - #define FIFO_INT_ADDR 0x10 - #define FIFO_STATUS1 0x14 --#define STATUS1_INT_STS(x) ((x) << 0) -+#define STATUS1_INT_STS GENMASK(7, 0) - #define FIFO_STATUS2 0x18 - #define FIFO_INIT_ADDR 0x24 - #define FIFO_CTRL2 0x28 -diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c -index 98140f449eb3..97ca0ea5faa5 100644 ---- a/sound/soc/meson/axg-frddr.c -+++ b/sound/soc/meson/axg-frddr.c -@@ -59,8 +59,8 @@ static int axg_frddr_dai_hw_params(struct snd_pcm_substream *substream, - /* Trim the FIFO depth if the period is small to improve latency */ - depth = min(period, fifo->depth); - val = (depth / AXG_FIFO_BURST) - 1; -- regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH_MASK, -- CTRL1_FRDDR_DEPTH(val)); -+ regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH, -+ FIELD_PREP(CTRL1_FRDDR_DEPTH, val)); - - return 0; - } -diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c -index 32ee45cce7f8..5b08b4e841ad 100644 ---- a/sound/soc/meson/axg-toddr.c -+++ b/sound/soc/meson/axg-toddr.c -@@ -19,12 +19,9 @@ - #define CTRL0_TODDR_EXT_SIGNED BIT(29) - #define CTRL0_TODDR_PP_MODE BIT(28) - #define CTRL0_TODDR_SYNC_CH BIT(27) --#define CTRL0_TODDR_TYPE_MASK GENMASK(15, 13) --#define CTRL0_TODDR_TYPE(x) ((x) << 13) --#define CTRL0_TODDR_MSB_POS_MASK GENMASK(12, 8) --#define CTRL0_TODDR_MSB_POS(x) ((x) << 8) --#define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3) --#define CTRL0_TODDR_LSB_POS(x) ((x) << 3) -+#define CTRL0_TODDR_TYPE GENMASK(15, 13) -+#define CTRL0_TODDR_MSB_POS GENMASK(12, 8) -+#define CTRL0_TODDR_LSB_POS GENMASK(7, 3) - #define CTRL1_TODDR_FORCE_FINISH BIT(25) - #define CTRL1_SEL_SHIFT 28 - -@@ -76,12 +73,12 @@ static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream, - width = params_width(params); - - regmap_update_bits(fifo->map, FIFO_CTRL0, -- CTRL0_TODDR_TYPE_MASK | -- CTRL0_TODDR_MSB_POS_MASK | -- CTRL0_TODDR_LSB_POS_MASK, -- CTRL0_TODDR_TYPE(type) | -- CTRL0_TODDR_MSB_POS(TODDR_MSB_POS) | -- CTRL0_TODDR_LSB_POS(TODDR_MSB_POS - (width - 1))); -+ CTRL0_TODDR_TYPE | -+ CTRL0_TODDR_MSB_POS | -+ CTRL0_TODDR_LSB_POS, -+ FIELD_PREP(CTRL0_TODDR_TYPE, type) | -+ FIELD_PREP(CTRL0_TODDR_MSB_POS, TODDR_MSB_POS) | -+ FIELD_PREP(CTRL0_TODDR_LSB_POS, TODDR_MSB_POS - (width - 1))); - - return 0; - } --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-WIP-dt-bindings-auxdisplay-add-Titan-Micro-Electroni.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-WIP-dt-bindings-auxdisplay-add-Titan-Micro-Electroni.patch new file mode 100644 index 0000000000..574f70f725 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0034-WIP-dt-bindings-auxdisplay-add-Titan-Micro-Electroni.patch @@ -0,0 +1,159 @@ +From 793c581ca351bfa08e185c3625ede56cc4cabf3f Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 12 Jun 2025 10:30:51 +0000 +Subject: [PATCH 34/37] WIP: dt-bindings: auxdisplay: add Titan Micro + Electronics TM16XX +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add documentation for auxiliary displays based on TM16XX and compatible +LED controllers. + +Signed-off-by: Jean-François Lessard +Signed-off-by: Christian Hewitt +--- + .../bindings/auxdisplay/tm16xx.yaml | 131 ++++++++++++++++++ + 1 file changed, 131 insertions(+) + create mode 100644 Documentation/devicetree/bindings/auxdisplay/tm16xx.yaml + +diff --git a/Documentation/devicetree/bindings/auxdisplay/tm16xx.yaml b/Documentation/devicetree/bindings/auxdisplay/tm16xx.yaml +new file mode 100644 +index 000000000000..80b54572926c +--- /dev/null ++++ b/Documentation/devicetree/bindings/auxdisplay/tm16xx.yaml +@@ -0,0 +1,131 @@ ++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/auxdisplay/tm16xx.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: TM16XX and Compatible Auxiliary Display Driver ++ ++maintainers: ++ - Jean-François Lessard ++ ++description: | ++ Bindings for auxiliary displays based on TM16XX and compatible LED controllers. ++ ++properties: ++ compatible: ++ enum: ++ - titanmec,tm1618 ++ - titanmec,tm1620 ++ - titanmec,tm1628 ++ - titanmec,tm1650 ++ - fdhisi,fd620 ++ - fdhisi,fd628 ++ - fdhisi,fd650 ++ - fdhisi,fd6551 ++ - fdhisi,fd655 ++ - princeton,pt6964 ++ - hbs,hbs658 ++ ++ reg: ++ maxItems: 1 ++ ++ tm16xx,digits: ++ description: Array of grid indexes for each digit ++ $ref: /schemas/types.yaml#/definitions/uint8-array ++ items: ++ minimum: 0 ++ maximum: 7 ++ minItems: 1 ++ maxItems: 8 ++ ++ tm16xx,segment-mapping: ++ description: Array specifying segment mapping (must be exactly 7 elements) ++ $ref: /schemas/types.yaml#/definitions/uint8-array ++ items: ++ minimum: 0 ++ maximum: 7 ++ minItems: 7 ++ maxItems: 7 ++ ++ tm16xx,transposed: ++ description: | ++ Optional boolean flag indicating if the device output is transposed. ++ If not present, the default value is false. ++ $ref: /schemas/types.yaml#/definitions/flag ++ ++ "#address-cells": ++ const: 2 ++ ++ "#size-cells": ++ const: 0 ++ ++patternProperties: ++ "^led@[0-7],[0-7]$": ++ $ref: /schemas/leds/common.yaml# ++ properties: ++ reg: ++ description: Grid and segment indexes ++ required: ++ - reg ++ ++required: ++ - compatible ++ - reg ++ - tm16xx,digits ++ - tm16xx,segment-mapping ++ ++additionalProperties: true ++ ++examples: ++ - | ++ display_client: i2c { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ display@24 { ++ compatible = "titanmec,tm1650"; ++ reg = <0x24>; ++ tm16xx,digits = /bits/ 8 <0 1 2 3>; ++ tm16xx,segment-mapping = /bits/ 8 <0 1 2 3 4 5 6>; ++ ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ led@4,0 { ++ reg = <4 0>; ++ function = "lan"; ++ }; ++ ++ led@4,1 { ++ reg = <4 1>; ++ function = "wlan"; ++ }; ++ }; ++ }; ++ - | ++ display_client: spi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ display@0 { ++ compatible = "titanmec,tm1628"; ++ reg = <0>; ++ tm16xx,transposed; ++ tm16xx,digits = /bits/ 8 <1 2 3 4>; ++ tm16xx,segment-mapping = /bits/ 8 <0 1 2 3 4 5 6>; ++ ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ led@0,2 { ++ reg = <0 2>; ++ function = "usb"; ++ }; ++ ++ led@0,3 { ++ reg = <0 3>; ++ function = "power"; ++ }; ++ }; ++ }; +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-drm-panfrost-fix-power-transition-timeou.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-drm-panfrost-fix-power-transition-timeou.patch deleted file mode 100644 index 0fcced7db4..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-FROMLIST-v1-drm-panfrost-fix-power-transition-timeou.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 75a8df6a4644ae9399d277c164e591130ee1c776 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Wed, 20 Mar 2024 13:28:08 +0000 -Subject: [PATCH 35/53] FROMLIST(v1): drm/panfrost: fix power transition - timeout warnings - -Increase the timeout value to prevent system logs on Amlogic boards flooding -with power transition warnings: - -[ 13.047638] panfrost ffe40000.gpu: shader power transition timeout -[ 13.048674] panfrost ffe40000.gpu: l2 power transition timeout -[ 13.937324] panfrost ffe40000.gpu: shader power transition timeout -[ 13.938351] panfrost ffe40000.gpu: l2 power transition timeout -... -[39829.506904] panfrost ffe40000.gpu: shader power transition timeout -[39829.507938] panfrost ffe40000.gpu: l2 power transition timeout -[39949.508369] panfrost ffe40000.gpu: shader power transition timeout -[39949.509405] panfrost ffe40000.gpu: l2 power transition timeout - -The 2000 value has been found through trial and error testing on Amlogic boards -with G52 and G31 GPU's. - -Fixes: 22aa1a209018 ("drm/panfrost: Really power off GPU cores in panfrost_gpu_power_off()") -Signed-off-by: Christian Hewitt ---- - drivers/gpu/drm/panfrost/panfrost_gpu.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c -index 9063ce254642..fd8e44992184 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_gpu.c -+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c -@@ -441,19 +441,19 @@ void panfrost_gpu_power_off(struct panfrost_device *pfdev) - - gpu_write(pfdev, SHADER_PWROFF_LO, pfdev->features.shader_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_PWRTRANS_LO, -- val, !val, 1, 1000); -+ val, !val, 1, 2000); - if (ret) - dev_err(pfdev->dev, "shader power transition timeout"); - - gpu_write(pfdev, TILER_PWROFF_LO, pfdev->features.tiler_present); - ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_PWRTRANS_LO, -- val, !val, 1, 1000); -+ val, !val, 1, 2000); - if (ret) - dev_err(pfdev->dev, "tiler power transition timeout"); - - gpu_write(pfdev, L2_PWROFF_LO, pfdev->features.l2_present); - ret = readl_poll_timeout(pfdev->iomem + L2_PWRTRANS_LO, -- val, !val, 0, 1000); -+ val, !val, 0, 2000); - if (ret) - dev_err(pfdev->dev, "l2 power transition timeout"); - } --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-WIP-arm64-dts-meson-gxl-s905w-tx3-mini-support-the-f.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-WIP-arm64-dts-meson-gxl-s905w-tx3-mini-support-the-f.patch new file mode 100644 index 0000000000..e5ccc328fa --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0035-WIP-arm64-dts-meson-gxl-s905w-tx3-mini-support-the-f.patch @@ -0,0 +1,100 @@ +From 536382633e9e399907fe06f34f426184965b5ab1 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 11 Jun 2025 11:23:44 +0000 +Subject: [PATCH 35/37] WIP: arm64: dts: meson-gxl-s905w-tx3-mini: support the + fd628 display + +The TX3-mini has an FD628 display. Add support using the tm166xx +kernel driver and userspace tools [0]. + +[0] https://github.com/jefflessard/tm16xx-display + +Signed-off-by: Christian Hewitt +--- + .../dts/amlogic/meson-gxl-s905w-tx3-mini.dts | 63 +++++++++++++++++++ + 1 file changed, 63 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts +index 6705c2082a78..94cae3a59554 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts +@@ -10,6 +10,8 @@ + + #include "meson-gxl-s905x.dtsi" + #include "meson-gx-p23x-q20x.dtsi" ++#include ++#include + + / { + compatible = "oranth,tx3-mini", "amlogic,s905w", "amlogic,meson-gxl"; +@@ -19,6 +21,67 @@ memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; /* 1 GiB or 2 GiB */ + }; ++ ++ display_client: spi { ++ compatible = "spi-gpio"; ++ sck-gpios = <&gpio 76 GPIO_ACTIVE_HIGH>; ++ mosi-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio_ao 4 GPIO_ACTIVE_LOW>; ++ num-chipselects = <1>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ display@0 { ++ compatible = "fdhisi,fd628"; ++ reg = <0x0>; ++ spi-3wire; ++ spi-lsb-first; ++ spi-rx-delay-us = <1>; ++ spi-max-frequency = <500000>; ++ ++ tm16xx,digits = [03 02 01 00]; ++ tm16xx,segment-mapping = [03 04 05 00 01 02 06]; ++ ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ led@4,0 { ++ reg = <4 0>; ++ function = LED_FUNCTION_ALARM; ++ }; ++ ++ led@4,1 { ++ reg = <4 1>; ++ function = LED_FUNCTION_USB; ++ }; ++ ++ led@4,2 { ++ reg = <4 2>; ++ function = "play"; ++ }; ++ ++ led@4,3 { ++ reg = <4 3>; ++ function = "pause"; ++ }; ++ ++ led@4,4 { ++ reg = <4 4>; ++ function = "colon"; ++ }; ++ ++ led@4,5 { ++ reg = <4 5>; ++ function = LED_FUNCTION_LAN; ++ }; ++ ++ led@4,6 { ++ reg = <4 6>; ++ function = LED_FUNCTION_WLAN; ++ }; ++ }; ++ }; + }; + + &ir { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch deleted file mode 100644 index 59d76c848f..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch +++ /dev/null @@ -1,66 +0,0 @@ -From ff1b40e46c3498843e616b364e8f985b0146255f Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 23 Mar 2024 20:04:49 +0100 -Subject: [PATCH 36/53] FROMLIST(v1): iio: adc: meson: fix voltage reference - selection field name typo - -The field should be called "vref_voltage", without a typo in the word -voltage. No functional changes intended. - -Signed-off-by: Martin Blumenstingl ---- - drivers/iio/adc/meson_saradc.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c -index 13b473d8c6c7..2615d74534df 100644 ---- a/drivers/iio/adc/meson_saradc.c -+++ b/drivers/iio/adc/meson_saradc.c -@@ -327,7 +327,7 @@ struct meson_sar_adc_param { - u8 vref_select; - u8 cmv_select; - u8 adc_eoc; -- enum meson_sar_adc_vref_sel vref_volatge; -+ enum meson_sar_adc_vref_sel vref_voltage; - }; - - struct meson_sar_adc_data { -@@ -1001,7 +1001,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - } - - regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_VOLTAGE, -- priv->param->vref_volatge); -+ priv->param->vref_voltage); - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval); - -@@ -1225,7 +1225,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = { - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 10, - .has_reg11 = true, -- .vref_volatge = 1, -+ .vref_voltage = 1, - .cmv_select = 1, - }; - -@@ -1237,7 +1237,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { - .resolution = 12, - .disable_ring_counter = 1, - .has_reg11 = true, -- .vref_volatge = 1, -+ .vref_voltage = 1, - .cmv_select = 1, - }; - -@@ -1249,7 +1249,7 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = { - .resolution = 12, - .disable_ring_counter = 1, - .has_reg11 = true, -- .vref_volatge = 1, -+ .vref_voltage = 1, - .has_vref_select = true, - .vref_select = VREF_VDDA, - .cmv_select = 1, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-arm64-dts-meson-gxm-tx9-pro-support-the-fd628-di.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-arm64-dts-meson-gxm-tx9-pro-support-the-fd628-di.patch new file mode 100644 index 0000000000..61dda53477 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0036-WIP-arm64-dts-meson-gxm-tx9-pro-support-the-fd628-di.patch @@ -0,0 +1,99 @@ +From 6bf5753f848d4c9e66d5e55929b307715ee1d5c5 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 9 Feb 2023 10:11:39 +0000 +Subject: [PATCH 36/37] WIP: arm64: dts: meson-gxm-tx9-pro: support the fd628 + display + +The TX9-Pro has an FD628 display. Add support using the tm166xx +kernel driver and userspace tools [0]. + +[0] https://github.com/jefflessard/tm16xx-display + +Signed-off-by: Christian Hewitt +--- + .../boot/dts/amlogic/meson-gxm-tx9-pro.dts | 62 +++++++++++++++++++ + 1 file changed, 62 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts +index 9a62176cfe5a..08603b035868 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-tx9-pro.dts +@@ -9,6 +9,7 @@ + #include "meson-gxm.dtsi" + #include "meson-gx-p23x-q20x.dtsi" + #include ++#include + + / { + compatible = "oranth,tx9-pro", "amlogic,s912", "amlogic,meson-gxm"; +@@ -37,6 +38,67 @@ button { + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; ++ ++ display_client: spi { ++ compatible = "spi-gpio"; ++ sck-gpios = <&gpio 76 GPIO_ACTIVE_HIGH>; ++ mosi-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio 53 GPIO_ACTIVE_LOW>; ++ num-chipselects = <1>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ display@0 { ++ compatible = "fdhisi,fd628"; ++ reg = <0x0>; ++ spi-3wire; ++ spi-lsb-first; ++ spi-rx-delay-us = <1>; ++ spi-max-frequency = <500000>; ++ ++ tm16xx,digits = [00 01 02 03]; ++ tm16xx,segment-mapping = [03 01 02 06 04 05 00]; ++ ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ led@4,0 { ++ reg = <4 0>; ++ function = LED_FUNCTION_ALARM; ++ }; ++ ++ led@4,1 { ++ reg = <4 1>; ++ function = LED_FUNCTION_USB; ++ }; ++ ++ led@4,2 { ++ reg = <4 2>; ++ function = "play"; ++ }; ++ ++ led@4,3 { ++ reg = <4 3>; ++ function = "pause"; ++ }; ++ ++ led@4,4 { ++ reg = <4 4>; ++ function = "colon"; ++ }; ++ ++ led@4,5 { ++ reg = <4 5>; ++ function = LED_FUNCTION_LAN; ++ }; ++ ++ led@4,6 { ++ reg = <4 6>; ++ function = LED_FUNCTION_WLAN; ++ }; ++ }; ++ }; + }; + + ðmac { +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch deleted file mode 100644 index 2f725545a8..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch +++ /dev/null @@ -1,142 +0,0 @@ -From e75fe79643d8d1be19c91d195b9fa1cc16bfffa8 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 23 Mar 2024 20:30:02 +0100 -Subject: [PATCH 37/53] FROMLIST(v1): iio: adc: consistently use bool and enum - in struct meson_sar_adc_param - -Consistently use bool for any register bit that enables/disables -functionality and enum for register values where there's a choice -between different settings. The aim is to make the code easier to read -and understand by being more consistent. No functional changes intended. - -Signed-off-by: Martin Blumenstingl ---- - drivers/iio/adc/meson_saradc.c | 47 +++++++++++++++++++--------------- - 1 file changed, 27 insertions(+), 20 deletions(-) - -diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c -index 2615d74534df..6b2af0c2bbc7 100644 ---- a/drivers/iio/adc/meson_saradc.c -+++ b/drivers/iio/adc/meson_saradc.c -@@ -156,9 +156,9 @@ - #define MESON_SAR_ADC_REG11 0x2c - #define MESON_SAR_ADC_REG11_BANDGAP_EN BIT(13) - #define MESON_SAR_ADC_REG11_CMV_SEL BIT(6) -- #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5) -- #define MESON_SAR_ADC_REG11_EOC BIT(1) -- #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0) -+ #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5) -+ #define MESON_SAR_ADC_REG11_EOC BIT(1) -+ #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0) - - #define MESON_SAR_ADC_REG13 0x34 - #define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8) -@@ -224,6 +224,11 @@ enum meson_sar_adc_vref_sel { - VREF_VDDA = 1, - }; - -+enum meson_sar_adc_vref_voltage { -+ VREF_VOLTAGE_0V9 = 0, -+ VREF_VOLTAGE_1V8 = 1, -+}; -+ - enum meson_sar_adc_avg_mode { - NO_AVERAGING = 0x0, - MEAN_AVERAGING = 0x1, -@@ -321,13 +326,13 @@ struct meson_sar_adc_param { - u8 temperature_trimming_bits; - unsigned int temperature_multiplier; - unsigned int temperature_divider; -- u8 disable_ring_counter; -+ bool disable_ring_counter; - bool has_reg11; - bool has_vref_select; -- u8 vref_select; -- u8 cmv_select; -- u8 adc_eoc; -- enum meson_sar_adc_vref_sel vref_voltage; -+ bool cmv_select; -+ bool adc_eoc; -+ enum meson_sar_adc_vref_sel vref_select; -+ enum meson_sar_adc_vref_voltage vref_voltage; - }; - - struct meson_sar_adc_data { -@@ -982,14 +987,16 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - MESON_SAR_ADC_DELTA_10_TS_REVE0, 0); - } - -- regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN, -- priv->param->disable_ring_counter); -+ if (priv->param->disable_ring_counter) -+ regval = MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN; -+ else -+ regval = 0; - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, - MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN, - regval); - - if (priv->param->has_reg11) { -- regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc); -+ regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0; - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_EOC, regval); - -@@ -1005,8 +1012,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval); - -- regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL, -- priv->param->cmv_select); -+ regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0; - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_CMV_SEL, regval); - } -@@ -1225,8 +1231,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = { - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 10, - .has_reg11 = true, -- .vref_voltage = 1, -- .cmv_select = 1, -+ .vref_voltage = VREF_VOLTAGE_1V8, -+ .cmv_select = true, - }; - - static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { -@@ -1237,8 +1243,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { - .resolution = 12, - .disable_ring_counter = 1, - .has_reg11 = true, -- .vref_voltage = 1, -- .cmv_select = 1, -+ .vref_voltage = VREF_VOLTAGE_1V8, -+ .cmv_select = true, - }; - - static const struct meson_sar_adc_param meson_sar_adc_axg_param = { -@@ -1249,10 +1255,10 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = { - .resolution = 12, - .disable_ring_counter = 1, - .has_reg11 = true, -- .vref_voltage = 1, -+ .vref_voltage = VREF_VOLTAGE_1V8, - .has_vref_select = true, - .vref_select = VREF_VDDA, -- .cmv_select = 1, -+ .cmv_select = true, - }; - - static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { -@@ -1263,7 +1269,8 @@ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { - .resolution = 12, - .disable_ring_counter = 1, - .has_reg11 = true, -- .adc_eoc = 1, -+ .vref_voltage = VREF_VOLTAGE_0V9, -+ .adc_eoc = true, - .has_vref_select = true, - .vref_select = VREF_VDDA, - }; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-arm64-dts-meson-g12a-x96-max-support-the-fd628-d.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-arm64-dts-meson-g12a-x96-max-support-the-fd628-d.patch new file mode 100644 index 0000000000..3a095c0d42 --- /dev/null +++ b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0037-WIP-arm64-dts-meson-g12a-x96-max-support-the-fd628-d.patch @@ -0,0 +1,100 @@ +From 7f3cc57dc50d31414a284761cfb5372942229571 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 11 Jun 2025 11:47:31 +0000 +Subject: [PATCH 37/37] WIP: arm64: dts: meson-g12a-x96-max: support the fd628 + display + +The X96-Max has an FD628 display. Add support using the tm166xx +kernel driver and userspace tools [0]. + +[0] https://github.com/jefflessard/tm16xx-display + +Signed-off-by: Christian Hewitt +--- + .../boot/dts/amlogic/meson-g12a-x96-max.dts | 63 +++++++++++++++++++ + 1 file changed, 63 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +index 5ab460a3e637..879276d6f6e9 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +@@ -7,6 +7,7 @@ + + #include "meson-g12a.dtsi" + #include ++#include + #include + #include + +@@ -54,6 +55,68 @@ hdmi_connector_in: endpoint { + }; + }; + ++ display_client: spi { ++ compatible = "spi-gpio"; ++ sck-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>; ++ mosi-gpios = <&gpio 63 GPIO_ACTIVE_HIGH>; ++ cs-gpios = <&gpio_ao 10 GPIO_ACTIVE_LOW>; ++ num-chipselects = <1>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ display@0 { ++ compatible = "fdhisi,fd628"; ++ reg = <0x0>; ++ spi-3wire; ++ spi-lsb-first; ++ spi-rx-delay-us = <1>; ++ spi-max-frequency = <500000>; ++ ++ tm16xx,transposed; ++ tm16xx,digits = [00 01 02 03]; ++ tm16xx,segment-mapping = [00 01 02 03 04 05 06]; ++ ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ led@4,0 { ++ reg = <4 0>; ++ function = "apps"; ++ }; ++ ++ led@4,1 { ++ reg = <4 1>; ++ function = "setup"; ++ }; ++ ++ led@4,2 { ++ reg = <4 2>; ++ function = LED_FUNCTION_USB; ++ }; ++ ++ led@4,3 { ++ reg = <4 3>; ++ function = LED_FUNCTION_SD; ++ }; ++ ++ led@4,4 { ++ reg = <4 4>; ++ function = "colon"; ++ }; ++ ++ led@4,5 { ++ reg = <4 5>; ++ function = "hdmi"; ++ }; ++ ++ led@4,6 { ++ reg = <4 6>; ++ function = "video"; ++ }; ++ }; ++ }; ++ + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; +-- +2.34.1 + diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch deleted file mode 100644 index 1f5bbecb3f..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0038-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch +++ /dev/null @@ -1,135 +0,0 @@ -From c6a0829ea93c2460d1fcc79eb59f9704832a073c Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 23 Mar 2024 20:35:58 +0100 -Subject: [PATCH 38/53] FROMLIST(v1): iio: adc: meson: simplify - MESON_SAR_ADC_REG11 register access - -Simply check the max_register value to decide whether -MESON_SAR_ADC_REG11 is present on the current IP revision. This allows -dropping two additional bool fields from struct meson_sar_adc_param -which previously had to be manually kept in sync. No functional changes -intended. - -Signed-off-by: Martin Blumenstingl ---- - drivers/iio/adc/meson_saradc.c | 29 ++++++++--------------------- - 1 file changed, 8 insertions(+), 21 deletions(-) - -diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c -index 6b2af0c2bbc7..8c1e542c0ab7 100644 ---- a/drivers/iio/adc/meson_saradc.c -+++ b/drivers/iio/adc/meson_saradc.c -@@ -320,14 +320,12 @@ static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = { - struct meson_sar_adc_param { - bool has_bl30_integration; - unsigned long clock_rate; -- u32 bandgap_reg; - unsigned int resolution; - const struct regmap_config *regmap_config; - u8 temperature_trimming_bits; - unsigned int temperature_multiplier; - unsigned int temperature_divider; - bool disable_ring_counter; -- bool has_reg11; - bool has_vref_select; - bool cmv_select; - bool adc_eoc; -@@ -995,7 +993,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN, - regval); - -- if (priv->param->has_reg11) { -+ if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11) { - regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0; - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_EOC, regval); -@@ -1031,16 +1029,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off) - { - struct meson_sar_adc_priv *priv = iio_priv(indio_dev); -- const struct meson_sar_adc_param *param = priv->param; -- u32 enable_mask; - -- if (param->bandgap_reg == MESON_SAR_ADC_REG11) -- enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN; -+ if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11) -+ regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, -+ MESON_SAR_ADC_REG11_BANDGAP_EN, -+ on_off ? MESON_SAR_ADC_REG11_BANDGAP_EN : 0); - else -- enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN; -- -- regmap_update_bits(priv->regmap, param->bandgap_reg, enable_mask, -- on_off ? enable_mask : 0); -+ regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10, -+ MESON_SAR_ADC_DELTA_10_TS_VBG_EN, -+ on_off ? MESON_SAR_ADC_DELTA_10_TS_VBG_EN : 0); - } - - static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev) -@@ -1205,7 +1202,6 @@ static const struct iio_info meson_sar_adc_iio_info = { - static const struct meson_sar_adc_param meson_sar_adc_meson8_param = { - .has_bl30_integration = false, - .clock_rate = 1150000, -- .bandgap_reg = MESON_SAR_ADC_DELTA_10, - .regmap_config = &meson_sar_adc_regmap_config_meson8, - .resolution = 10, - .temperature_trimming_bits = 4, -@@ -1216,7 +1212,6 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8_param = { - static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = { - .has_bl30_integration = false, - .clock_rate = 1150000, -- .bandgap_reg = MESON_SAR_ADC_DELTA_10, - .regmap_config = &meson_sar_adc_regmap_config_meson8, - .resolution = 10, - .temperature_trimming_bits = 5, -@@ -1227,10 +1222,8 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = { - static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = { - .has_bl30_integration = true, - .clock_rate = 1200000, -- .bandgap_reg = MESON_SAR_ADC_REG11, - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 10, -- .has_reg11 = true, - .vref_voltage = VREF_VOLTAGE_1V8, - .cmv_select = true, - }; -@@ -1238,11 +1231,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = { - static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { - .has_bl30_integration = true, - .clock_rate = 1200000, -- .bandgap_reg = MESON_SAR_ADC_REG11, - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 12, - .disable_ring_counter = 1, -- .has_reg11 = true, - .vref_voltage = VREF_VOLTAGE_1V8, - .cmv_select = true, - }; -@@ -1250,11 +1241,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { - static const struct meson_sar_adc_param meson_sar_adc_axg_param = { - .has_bl30_integration = true, - .clock_rate = 1200000, -- .bandgap_reg = MESON_SAR_ADC_REG11, - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 12, - .disable_ring_counter = 1, -- .has_reg11 = true, - .vref_voltage = VREF_VOLTAGE_1V8, - .has_vref_select = true, - .vref_select = VREF_VDDA, -@@ -1264,11 +1253,9 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = { - static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { - .has_bl30_integration = false, - .clock_rate = 1200000, -- .bandgap_reg = MESON_SAR_ADC_REG11, - .regmap_config = &meson_sar_adc_regmap_config_gxbb, - .resolution = 12, - .disable_ring_counter = 1, -- .has_reg11 = true, - .vref_voltage = VREF_VOLTAGE_0V9, - .adc_eoc = true, - .has_vref_select = true, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-dt-bindings-arm-amlogic-add-support-for-Dreambox.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-dt-bindings-arm-amlogic-add-support-for-Dreambox.patch deleted file mode 100644 index 1b54ea90ba..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0039-WIP-dt-bindings-arm-amlogic-add-support-for-Dreambox.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 8d6f4eb8a8a7bd35dd10bb4d942b0e3182042ac1 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 5 Apr 2021 13:48:34 +0000 -Subject: [PATCH 39/53] WIP: dt-bindings: arm: amlogic: add support for - Dreambox One/Two - -The Dreambox One and Dreambox Two are DVBS/T2 receiver boxes based -on the Amlogic W400 reference board with an S922X chip. - -Signed-off-by: Christian Hewitt ---- - Documentation/devicetree/bindings/arm/amlogic.yaml | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml -index caab7ceeda45..922380d6139e 100644 ---- a/Documentation/devicetree/bindings/arm/amlogic.yaml -+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml -@@ -175,6 +175,8 @@ properties: - - azw,gtking - - azw,gtking-pro - - bananapi,bpi-m2s -+ - dream,dreambox-one -+ - dream,dreambox-two - - hardkernel,odroid-go-ultra - - hardkernel,odroid-n2 - - hardkernel,odroid-n2l --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-arm64-dts-meson-add-initial-device-trees-for-Dre.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-arm64-dts-meson-add-initial-device-trees-for-Dre.patch deleted file mode 100644 index 39f5c63037..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0040-WIP-arm64-dts-meson-add-initial-device-trees-for-Dre.patch +++ /dev/null @@ -1,272 +0,0 @@ -From ffbb462ad7261792d8642717b1d17407afe81d94 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 5 Apr 2021 13:51:20 +0000 -Subject: [PATCH 40/53] WIP: arm64: dts: meson: add initial device-trees for - Dreambox One/Two - -Dreambox One and Dreambox Two are based on the Amlogic W400 reference -board with an S922X chip and the following specs: - -- 2GB DDR3 RAM -- 16GB eMMC -- 10/100/1000 Base-T Ethernet -- AP6356 Wireless (802.11 b/g/n/ac, BT 5.0) -- HDMI 2.1 video -- S/PDIF optical output -- 2x DVB-S2/T2 -- Smartcard Reader Slot -- 2x USB 2.0 port (1x micro-USB for service) -- 1x USB 3.0 port -- IR receiver -- 1x Power LED (blue) -- 1x Power button (top) -- 1x Update/Reset button (underside) -- 1x micro SD card slot - -Dreambox Two differences: - -- 3" Colour LCD display (MIPI-DSI) -- Common Interface Slot - -Signed-off-by: Christian Hewitt ---- - arch/arm64/boot/dts/amlogic/Makefile | 2 + - .../dts/amlogic/meson-g12b-dreambox-one.dts | 17 ++ - .../dts/amlogic/meson-g12b-dreambox-two.dts | 20 +++ - .../boot/dts/amlogic/meson-g12b-dreambox.dtsi | 160 ++++++++++++++++++ - 4 files changed, 199 insertions(+) - create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts - create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts - create mode 100644 arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi - -diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile -index cc8b34bd583d..edb22c57f11d 100644 ---- a/arch/arm64/boot/dts/amlogic/Makefile -+++ b/arch/arm64/boot/dts/amlogic/Makefile -@@ -15,6 +15,8 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-dreambox-one.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-g12b-dreambox-two.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts -new file mode 100644 -index 000000000000..ecfa1c683dde ---- /dev/null -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-one.dts -@@ -0,0 +1,17 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-g12b-dreambox.dtsi" -+ -+/ { -+ compatible = "dream,dreambox-one", "amlogic,s922x", "amlogic,g12b"; -+ model = "Dreambox One"; -+}; -+ -+&sd_emmc_a { -+ sd-uhs-sdr12; -+}; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts -new file mode 100644 -index 000000000000..df0d71983c3d ---- /dev/null -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox-two.dts -@@ -0,0 +1,20 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2019 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-g12b-dreambox.dtsi" -+ -+/ { -+ compatible = "dream,dreambox-two", "amlogic,s922x", "amlogic,g12b"; -+ model = "Dreambox Two"; -+}; -+ -+&sd_emmc_a { -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+}; -diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi -new file mode 100644 -index 000000000000..a76045fd739c ---- /dev/null -+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi -@@ -0,0 +1,160 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Christian Hewitt -+ */ -+ -+#include "meson-g12b-w400.dtsi" -+#include -+#include -+#include -+ -+/ { -+ cvbs-connector { -+ status = "disabled"; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio GPIOA_11 GPIO_ACTIVE_LOW>; -+ clocks = <&wifi32k>; -+ clock-names = "ext_clock"; -+ }; -+ -+ spdif_dit: audio-codec-1 { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ status = "okay"; -+ sound-name-prefix = "DIT"; -+ }; -+ -+ sound { -+ compatible = "amlogic,axg-sound-card"; -+ model = "DREAMBOX"; -+ audio-aux-devs = <&tdmout_b>; -+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", -+ "TDMOUT_B IN 1", "FRDDR_B OUT 1", -+ "TDMOUT_B IN 2", "FRDDR_C OUT 1", -+ "TDM_B Playback", "TDMOUT_B OUT", -+ "SPDIFOUT_A IN 0", "FRDDR_A OUT 3", -+ "SPDIFOUT_A IN 1", "FRDDR_B OUT 3", -+ "SPDIFOUT_A IN 2", "FRDDR_C OUT 3"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&frddr_a>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&frddr_b>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&frddr_c>; -+ }; -+ -+ /* 8ch hdmi interface */ -+ dai-link-3 { -+ sound-dai = <&tdmif_b>; -+ dai-format = "i2s"; -+ dai-tdm-slot-tx-mask-0 = <1 1>; -+ dai-tdm-slot-tx-mask-1 = <1 1>; -+ dai-tdm-slot-tx-mask-2 = <1 1>; -+ dai-tdm-slot-tx-mask-3 = <1 1>; -+ mclk-fs = <256>; -+ -+ codec { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; -+ }; -+ }; -+ -+ /* spdif hdmi or toslink interface */ -+ dai-link-4 { -+ sound-dai = <&spdifout_a>; -+ -+ codec-0 { -+ sound-dai = <&spdif_dit>; -+ }; -+ -+ codec-1 { -+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>; -+ }; -+ }; -+ -+ /* spdif hdmi interface */ -+ dai-link-5 { -+ sound-dai = <&spdifout_b>; -+ -+ codec { -+ sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>; -+ }; -+ }; -+ -+ /* hdmi glue */ -+ dai-link-6 { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&arb { -+ status = "okay"; -+}; -+ -+&clkc_audio { -+ status = "okay"; -+}; -+ -+&frddr_a { -+ status = "okay"; -+}; -+ -+&frddr_b { -+ status = "okay"; -+}; -+ -+&frddr_c { -+ status = "okay"; -+}; -+ -+&ir { -+ linux,rc-map-name = "rc-dreambox"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&vddao_1v8>; -+}; -+ -+&spdifout_a { -+ pinctrl-0 = <&spdif_out_h_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&spdifout_b { -+ status = "okay"; -+}; -+ -+&tdmif_b { -+ status = "okay"; -+}; -+ -+&tdmout_b { -+ status = "okay"; -+}; -+ -+&tohdmitx { -+ status = "okay"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-arm64-dts-meson-increase-SD-speeds-on-Minix-Neo-.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-arm64-dts-meson-increase-SD-speeds-on-Minix-Neo-.patch deleted file mode 100644 index a837827fc4..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0041-WIP-arm64-dts-meson-increase-SD-speeds-on-Minix-Neo-.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2fa9dc2253ed3266db28b0a3ebb5d942427ef7a9 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 1 Jan 2024 06:15:40 +0000 -Subject: [PATCH 41/53] WIP: arm64: dts: meson: increase SD speeds on Minix Neo - U9-H - -Lets see what happens/breaks when all the fancy modes are added - -Signed-off-by: Christian Hewitt ---- - arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -index b929682805dd..c3fb523fd18e 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -@@ -106,6 +106,15 @@ brcmf: wifi@1 { - }; - }; - -+&sd_emmc_b { -+ /* experimental */ -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ max-frequency = <200000000>; -+}; -+ - &uart_A { - status = "okay"; - pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-fixup-Minix-U9-H-wifi.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-fixup-Minix-U9-H-wifi.patch deleted file mode 100644 index fbda4e066e..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0042-WIP-arm64-dts-meson-fixup-Minix-U9-H-wifi.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 6302dc4b0ec1ce8d343ca620f1fc82e8fa5e1dda Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Fri, 5 Jan 2024 03:07:58 +0000 -Subject: [PATCH 42/53] WIP: arm64: dts: meson: fixup Minix U9-H wifi - -I think the 'drop compatible' change conflicted so remove this too. - -Signed-off-by: Christian Hewitt ---- - arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts | 7 ------- - 1 file changed, 7 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -index c3fb523fd18e..bed70c5c2d9c 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-minix-neo-u9h.dts -@@ -99,13 +99,6 @@ rtc: rtc@51 { - }; - }; - --&sd_emmc_a { -- brcmf: wifi@1 { -- reg = <1>; -- compatible = "brcm,bcm4329-fmac"; -- }; --}; -- - &sd_emmc_b { - /* experimental */ - sd-uhs-sdr12; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-drop-broadcom-compatible-from-re.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-drop-broadcom-compatible-from-re.patch deleted file mode 100644 index 449369e8d7..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0046-WIP-arm64-dts-meson-drop-broadcom-compatible-from-re.patch +++ /dev/null @@ -1,126 +0,0 @@ -From e77b259c064cd7b8c672c96834fdb1c4d2a98ff4 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Wed, 3 Jan 2024 03:14:06 +0000 -Subject: [PATCH 46/53] WIP: arm64: dts: meson: drop broadcom compatible from - reference board SDIO nodes - -Remove the Broadcom compatible to allow Android STB boards using Qualcom QCA9377 -and Realtek RTL8189ES/FS SDIO modules to also have working WiFi when booting with -the reference board device-tree(s). Also do the same to the Vega S95 dtsi as this -is commonly used in the same way. - -Signed-off-by: Christian Hewitt ---- - arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 3 +-- - arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts | 3 +-- - 7 files changed, 7 insertions(+), 14 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -index 52d57773a77f..1736bd2e96e2 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -@@ -178,9 +178,8 @@ &sd_emmc_a { - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_boot>; - -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -index 255e93a0b36d..b5e8b1cbafa9 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi -@@ -251,9 +251,8 @@ &sd_emmc_a { - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_boot>; - -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts -index c1470416faad..7dffeb5931c9 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts -@@ -102,8 +102,7 @@ hdmi_tx_tmds_out: endpoint { - }; - - &sd_emmc_a { -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts -index 92c425d0259c..ff9145d49090 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts -@@ -21,8 +21,7 @@ ðmac { - }; - - &sd_emmc_a { -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -index b83b38b2d9e1..c74308499786 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi -@@ -138,9 +138,8 @@ &sd_emmc_a { - vmmc-supply = <&vddao_3v3>; - vqmmc-supply = <&vddio_boot>; - -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts -index d4858afa0e9c..feb31207773f 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts -@@ -72,8 +72,7 @@ external_phy: ethernet-phy@0 { - }; - - &sd_emmc_a { -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts -index d02b80d77378..6c8bec1853ac 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts -@@ -21,8 +21,7 @@ ðmac { - }; - - &sd_emmc_a { -- brcmf: wifi@1 { -+ sdio: wifi@1 { - reg = <1>; -- compatible = "brcm,bcm4329-fmac"; - }; - }; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-dt-bindings-arm-amlogic-add-OSMC-Vero-4K.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-dt-bindings-arm-amlogic-add-OSMC-Vero-4K.patch deleted file mode 100644 index cfa2555cd1..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0047-WIP-dt-bindings-arm-amlogic-add-OSMC-Vero-4K.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 642e23b3f8a96c89390eb0ff05a6e46e63f9a98f Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Wed, 19 Jan 2022 02:40:20 +0000 -Subject: [PATCH 47/53] WIP: dt-bindings: arm: amlogic: add OSMC Vero 4K - -Add support for the OSMC Vero 4K - -Signed-off-by: Christian Hewitt ---- - Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml -index 922380d6139e..73598f7992fd 100644 ---- a/Documentation/devicetree/bindings/arm/amlogic.yaml -+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml -@@ -99,6 +99,7 @@ properties: - - libretech,aml-s905x-cc - - libretech,aml-s905x-cc-v2 - - nexbox,a95x -+ - osmc,vero4k - - const: amlogic,s905x - - const: amlogic,meson-gxl - --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-support-for-OSMC-Vero-4K.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-support-for-OSMC-Vero-4K.patch deleted file mode 100644 index 6dec1cb957..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0048-WIP-arm64-dts-meson-add-support-for-OSMC-Vero-4K.patch +++ /dev/null @@ -1,259 +0,0 @@ -From e4062d9479c72b37e7093a424f969829018d5a48 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Wed, 19 Jan 2022 04:06:17 +0000 -Subject: [PATCH 48/53] WIP: arm64: dts: meson: add support for OSMC Vero 4K - -The OSMC Vero 4K device is based on the Amlogic S905X (P212) reference -design with the following specifications: - -- 2GB DDR4 RAM -- 16GB eMMC -- HDMI 2.1 video -- S/PDIF optical output -- AV output -- 10/100 Ethernet -- AP6255 Wireless (802.11 a/b/g/n/ac, BT 4.2) -- 2x USB 2.0 ports (1x OTG) -- IR receiver (internal) -- IR extender port (external) -- 1x micro SD card slot -- 1x Power LED (red) -- 1x Reset button (in AV jack) - -Signed-off-by: Christian Hewitt ---- - arch/arm64/boot/dts/amlogic/Makefile | 8 + - .../dts/amlogic/meson-gxl-s905x-vero4k.dts | 202 ++++++++++++++++++ - 2 files changed, 210 insertions(+) - create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts - -diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile -index edb22c57f11d..936cd1989463 100644 ---- a/arch/arm64/boot/dts/amlogic/Makefile -+++ b/arch/arm64/boot/dts/amlogic/Makefile -@@ -49,6 +49,14 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-phicomm-n1.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-sml5442tw.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-vero4k-plus.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905l-p271.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-libretech-cc-v2.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb -+dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-vero4k.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-jethome-jethub-j80.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb - dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts -new file mode 100644 -index 000000000000..a2be35d63c96 ---- /dev/null -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts -@@ -0,0 +1,202 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2024 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-gxl-s905x-p212.dtsi" -+#include -+#include -+#include -+ -+/ { -+ compatible = "osmc,vero4k", "amlogic,s905x", "amlogic,meson-gxl"; -+ model = "OSMC Vero 4K"; -+ -+ reserved-memory { -+ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */ -+ secmon_reserved_bl32: secmon@5300000 { -+ reg = <0x0 0x05300000 0x0 0x2000000>; -+ no-map; -+ }; -+ }; -+ -+ gpio-keys-polled { -+ compatible = "gpio-keys-polled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ poll-interval = <20>; -+ -+ button@0 { -+ label = "power"; -+ linux,code = ; -+ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led-standby { -+ color = ; -+ function = LED_FUNCTION_POWER; -+ gpios = <&gpio GPIODV_24 GPIO_ACTIVE_LOW>; -+ default-state = "off"; -+ panic-indicator; -+ }; -+ }; -+ -+ dio2133: analog-amplifier { -+ compatible = "simple-audio-amplifier"; -+ sound-name-prefix = "AU2"; -+ VCC-supply = <&hdmi_5v>; -+ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ spdif_dit: audio-codec-0 { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ sound-name-prefix = "DIT"; -+ }; -+ -+ cvbs-connector { -+ compatible = "composite-video-connector"; -+ -+ port { -+ cvbs_connector_in: endpoint { -+ remote-endpoint = <&cvbs_vdac_out>; -+ }; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_tmds_out>; -+ }; -+ }; -+ }; -+ -+ sound { -+ compatible = "amlogic,gx-sound-card"; -+ model = "VERO4K"; -+ audio-aux-devs = <&dio2133>; -+ audio-widgets = "Line", "Lineout"; -+ audio-routing = "AU2 INL", "ACODEC LOLP", -+ "AU2 INR", "ACODEC LORP", -+ "AU2 INL", "ACODEC LOLN", -+ "AU2 INR", "ACODEC LORN", -+ "Lineout", "AU2 OUTL", -+ "Lineout", "AU2 OUTR"; -+ assigned-clocks = <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>, -+ <&clkc CLKID_MPLL2>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ status = "okay"; -+ -+ dai-link-0 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; -+ }; -+ -+ dai-link-1 { -+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; -+ }; -+ -+ dai-link-2 { -+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; -+ dai-format = "i2s"; -+ mclk-fs = <256>; -+ -+ codec-0 { -+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; -+ }; -+ -+ codec-1 { -+ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>; -+ }; -+ }; -+ -+ dai-link-3 { -+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; -+ -+ codec-0 { -+ sound-dai = <&spdif_dit>; -+ }; -+ }; -+ -+ dai-link-4 { -+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; -+ -+ codec-0 { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ -+ dai-link-5 { -+ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>; -+ -+ codec-0 { -+ sound-dai = <&acodec>; -+ }; -+ }; -+ }; -+}; -+ -+&acodec { -+ AVDD-supply = <&vddio_ao18>; -+ status = "okay"; -+}; -+ -+&aiu { -+ status = "okay"; -+ pinctrl-0 = <&spdif_out_h_pins>; -+ pinctrl-names = "default"; -+}; -+ -+&cec_AO { -+ status = "okay"; -+ pinctrl-0 = <&ao_cec_pins>; -+ pinctrl-names = "default"; -+ hdmi-phandle = <&hdmi_tx>; -+}; -+ -+&cvbs_vdac_port { -+ cvbs_vdac_out: endpoint { -+ remote-endpoint = <&cvbs_connector_in>; -+ }; -+}; -+ -+ðmac { -+ phy-mode = "rmii"; -+ phy-handle = <&internal_phy>; -+}; -+ -+&hdmi_tx { -+ status = "okay"; -+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; -+ pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; -+}; -+ -+&hdmi_tx_tmds_port { -+ hdmi_tx_tmds_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+}; -+ -+&internal_phy { -+ pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>; -+ pinctrl-names = "default"; -+}; -+ -+/* This UART is brought out to the DB9 connector */ -+&uart_AO { -+ status = "okay"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-WIP-dt-bindings-arm-amlogic-add-S905L-and-p271-refer.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-WIP-dt-bindings-arm-amlogic-add-S905L-and-p271-refer.patch deleted file mode 100644 index 7a84ad883e..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0049-WIP-dt-bindings-arm-amlogic-add-S905L-and-p271-refer.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 1d5c42d5f84a1b022365b4ae00c3c6325a4b8f16 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 1 Jan 2024 07:13:19 +0000 -Subject: [PATCH 49/53] WIP: dt-bindings: arm: amlogic: add S905L and p271 - reference board - -Add bindings for the Amlogic S905L SoC and reference design board. S905L is similar -to P281 (S905W) and derived from P212 (S905X) but with silicon differences to omit -VP9 codec support and using a Mali 450-MP2 (not MP3). - -Signed-off-by: Christian Hewitt ---- - Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml -index 73598f7992fd..515d58587f7c 100644 ---- a/Documentation/devicetree/bindings/arm/amlogic.yaml -+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml -@@ -81,6 +81,13 @@ properties: - - const: amlogic,s805x - - const: amlogic,meson-gxl - -+ - description: Boards with the Amlogic Meson GXL S905L SoC -+ items: -+ - enum: -+ - amlogic,p271 -+ - const: amlogic,s905l -+ - const: amlogic,meson-gxl -+ - - description: Boards with the Amlogic Meson GXL S905W SoC - items: - - enum: --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-WIP-soc-amlogic-meson-gx-socinfo-Add-S905L-ID.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-WIP-soc-amlogic-meson-gx-socinfo-Add-S905L-ID.patch deleted file mode 100644 index 4d95643b89..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0050-WIP-soc-amlogic-meson-gx-socinfo-Add-S905L-ID.patch +++ /dev/null @@ -1,29 +0,0 @@ -From f5ab209b7240f1251e100f9e7919f165bdb26f96 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 1 Jan 2024 07:48:39 +0000 -Subject: [PATCH 50/53] WIP: soc: amlogic: meson-gx-socinfo: Add S905L ID - -Add the S905L SoC id observed in several P271 boards: - -LibreELEC kernel: soc soc0: Amlogic Meson GXLX (S905L) Revision 26:a (c1:2) Detected - -Signed-off-by: Christian Hewitt ---- - drivers/soc/amlogic/meson-gx-socinfo.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c -index 6abb730344ab..7e255acf5430 100644 ---- a/drivers/soc/amlogic/meson-gx-socinfo.c -+++ b/drivers/soc/amlogic/meson-gx-socinfo.c -@@ -64,6 +64,7 @@ static const struct meson_gx_package_id { - { "962E", 0x24, 0x20, 0xf0 }, - { "A113X", 0x25, 0x37, 0xff }, - { "A113D", 0x25, 0x22, 0xff }, -+ { "S905L", 0x26, 0, 0x0 }, - { "S905D2", 0x28, 0x10, 0xf0 }, - { "S905Y2", 0x28, 0x30, 0xf0 }, - { "S905X2", 0x28, 0x40, 0xf0 }, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-dt-bindings-iio-adc-amlogic-meson-saradc-Add-GXL.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-dt-bindings-iio-adc-amlogic-meson-saradc-Add-GXL.patch deleted file mode 100644 index 4ed165f218..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0051-WIP-dt-bindings-iio-adc-amlogic-meson-saradc-Add-GXL.patch +++ /dev/null @@ -1,30 +0,0 @@ -From b2cbf810a3310389b2691797e487396aa1f621da Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 23 Mar 2024 20:38:59 +0100 -Subject: [PATCH 51/53] WIP: dt-bindings: iio: adc: amlogic,meson-saradc: Add - GXLX SoC compatible - -Add a compatible string for the GXLX SoC. It's very similar to GXL but -has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL -clocks. - -Signed-off-by: Martin Blumenstingl ---- - .../devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml -index 7e8328e9ce13..b2fef72267b4 100644 ---- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml -+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml -@@ -23,6 +23,7 @@ properties: - - amlogic,meson8m2-saradc - - amlogic,meson-gxbb-saradc - - amlogic,meson-gxl-saradc -+ - amlogic,meson-gxlx-saradc - - amlogic,meson-gxm-saradc - - amlogic,meson-axg-saradc - - amlogic,meson-g12a-saradc --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-iio-adc-meson-add-support-for-the-GXLX-SoC.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-iio-adc-meson-add-support-for-the-GXLX-SoC.patch deleted file mode 100644 index 3e79ff315e..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0052-WIP-iio-adc-meson-add-support-for-the-GXLX-SoC.patch +++ /dev/null @@ -1,97 +0,0 @@ -From a3fe76499d3b186e1b964cc24fe49afc0c12eca7 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 23 Mar 2024 20:44:41 +0100 -Subject: [PATCH 52/53] WIP: iio: adc: meson: add support for the GXLX SoC - -The SARADC IP on the GXLX SoC itself is identical to the one found on -GXL SoCs. However, GXLX SoCs require poking the first three bits in the -MESON_SAR_ADC_REG12 register to get the three MPLL clocks (used as clock -generators for the audio frequencies) to work. - -WiP: the purpose of these three bits needs to be clarified - -Signed-off-by: Martin Blumenstingl ---- - drivers/iio/adc/meson_saradc.c | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - -diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c -index 8c1e542c0ab7..6ad1a6f33f7d 100644 ---- a/drivers/iio/adc/meson_saradc.c -+++ b/drivers/iio/adc/meson_saradc.c -@@ -160,6 +160,11 @@ - #define MESON_SAR_ADC_REG11_EOC BIT(1) - #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0) - -+#define MESON_SAR_ADC_REG12 0x30 -+ #define MESON_SAR_ADC_REG12_MPLL0_UNKNOWN BIT(0) -+ #define MESON_SAR_ADC_REG12_MPLL1_UNKNOWN BIT(1) -+ #define MESON_SAR_ADC_REG12_MPLL2_UNKNOWN BIT(2) -+ - #define MESON_SAR_ADC_REG13 0x34 - #define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8) - -@@ -329,6 +334,7 @@ struct meson_sar_adc_param { - bool has_vref_select; - bool cmv_select; - bool adc_eoc; -+ bool mpll_clock_bits; - enum meson_sar_adc_vref_sel vref_select; - enum meson_sar_adc_vref_voltage vref_voltage; - }; -@@ -1013,6 +1019,12 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) - regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0; - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, - MESON_SAR_ADC_REG11_CMV_SEL, regval); -+ -+ if (priv->param->mpll_clock_bits) -+ regmap_write(priv->regmap, MESON_SAR_ADC_REG12, -+ MESON_SAR_ADC_REG12_MPLL0_UNKNOWN | -+ MESON_SAR_ADC_REG12_MPLL1_UNKNOWN | -+ MESON_SAR_ADC_REG12_MPLL2_UNKNOWN); - } - - ret = clk_set_parent(priv->adc_sel_clk, priv->clkin); -@@ -1238,6 +1250,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { - .cmv_select = true, - }; - -+static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = { -+ .has_bl30_integration = true, -+ .clock_rate = 1200000, -+ .regmap_config = &meson_sar_adc_regmap_config_gxbb, -+ .resolution = 12, -+ .disable_ring_counter = 1, -+ .vref_voltage = VREF_VOLTAGE_1V8, -+ .cmv_select = true, -+ .mpll_clock_bits = true, -+}; -+ - static const struct meson_sar_adc_param meson_sar_adc_axg_param = { - .has_bl30_integration = true, - .clock_rate = 1200000, -@@ -1287,6 +1310,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = { - .name = "meson-gxl-saradc", - }; - -+static const struct meson_sar_adc_data meson_sar_adc_gxlx_data = { -+ .param = &meson_sar_adc_gxlx_param, -+ .name = "meson-gxlx-saradc", -+}; -+ - static const struct meson_sar_adc_data meson_sar_adc_gxm_data = { - .param = &meson_sar_adc_gxl_param, - .name = "meson-gxm-saradc", -@@ -1318,6 +1346,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = { - }, { - .compatible = "amlogic,meson-gxl-saradc", - .data = &meson_sar_adc_gxl_data, -+ }, { -+ .compatible = "amlogic,meson-gxlx-saradc", -+ .data = &meson_sar_adc_gxlx_data, - }, { - .compatible = "amlogic,meson-gxm-saradc", - .data = &meson_sar_adc_gxm_data, --- -2.34.1 - diff --git a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-arm64-dts-meson-add-p271-support.patch b/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-arm64-dts-meson-add-p271-support.patch deleted file mode 100644 index a41d087366..0000000000 --- a/projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0053-WIP-arm64-dts-meson-add-p271-support.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 75671e34bec14c140e4e81ae742de16b2a29d174 Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Mon, 1 Jan 2024 07:40:15 +0000 -Subject: [PATCH 53/53] WIP: arm64: dts: meson: add p271 support - -Add a device-tree for the Amlogic P271 (S905L) reference design board. This is -similar to the P212 (S905X) but with silicon differences to omit the VP9 codec -and use Mali 450-MP2 not MP3. The SoC is marked with S905L and a "2" (believed -to denote the MP2) and is sometimes wrongly described on some distributor stock -lists (and box vendor marketing) as an S905L2 chip. - -Signed-off-by: Christian Hewitt ---- - .../boot/dts/amlogic/meson-gxl-s905l-p271.dts | 47 +++++++++++++++++++ - 1 file changed, 47 insertions(+) - create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts -new file mode 100644 -index 000000000000..a902e4af7c15 ---- /dev/null -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905l-p271.dts -@@ -0,0 +1,47 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2024 Christian Hewitt -+ */ -+ -+/dts-v1/; -+ -+#include "meson-gxl-s905x.dtsi" -+#include "meson-gx-p23x-q20x.dtsi" -+ -+/ { -+ compatible = "amlogic,p271", "amlogic,s905l", "amlogic,meson-gxl"; -+ model = "Amlogic Meson GXLX (S905L) P271 Development Board"; -+ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x40000000>; -+ }; -+ -+ sound { -+ model = "P271"; -+ }; -+}; -+ -+&apb { -+ mali: gpu@c0000 { -+ /* Mali 450-MP2 */ -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ interrupt-names = "gp", "gpmmu", "pp", "pmu", -+ "pp0", "ppmmu0", "pp1", "ppmmu1"; -+ }; -+}; -+ -+&saradc { -+ compatible = "amlogic,meson-gxlx-saradc", "amlogic,meson-saradc"; -+}; -+ -+&usb { -+ dr_mode = "host"; -+}; --- -2.34.1 - diff --git a/projects/Amlogic/linux/linux.aarch64.conf b/projects/Amlogic/linux/linux.aarch64.conf index 6e0b305a44..8617860fc4 100644 --- a/projects/Amlogic/linux/linux.aarch64.conf +++ b/projects/Amlogic/linux/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.8.0 Kernel Configuration +# Linux/arm64 6.16.0-rc3 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -41,7 +45,6 @@ CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_USELIB is not set # CONFIG_AUDIT is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y @@ -62,6 +65,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -98,14 +102,14 @@ CONFIG_BPF_SYSCALL=y # CONFIG_BPF_PRELOAD is not set # end of BPF subsystem -CONFIG_PREEMPT_BUILD=y +CONFIG_PREEMPT_VOLUNTARY_BUILD=y +CONFIG_ARCH_HAS_PREEMPT_LAZY=y # CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -CONFIG_PREEMPTION=y +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_LAZY is not set +# CONFIG_PREEMPT_RT is not set # CONFIG_PREEMPT_DYNAMIC is not set -# CONFIG_SCHED_CORE is not set # # CPU/Task time and stats accounting @@ -125,11 +129,10 @@ CONFIG_CPU_ISOLATION=y # RCU Subsystem # CONFIG_TREE_RCU=y -CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y -CONFIG_TASKS_RCU=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -157,23 +160,26 @@ CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_GCC_NO_STRINGOP_OVERFLOW=y CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -185,7 +191,7 @@ CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_TIME_NS=y CONFIG_IPC_NS=y -# CONFIG_USER_NS is not set +CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y # CONFIG_CHECKPOINT_RESTORE is not set @@ -214,19 +220,20 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y +CONFIG_FUTEX_PRIVATE_HASH=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y @@ -244,8 +251,8 @@ CONFIG_CACHESTAT_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # @@ -263,15 +270,15 @@ CONFIG_PROFILING=y # # CONFIG_KEXEC is not set # CONFIG_KEXEC_FILE is not set -# CONFIG_CRASH_DUMP is not set +# CONFIG_KEXEC_HANDOVER is not set # end of Kexec and crash features # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -298,12 +305,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -343,41 +352,39 @@ CONFIG_ARCH_MESON=y # # ARM errata workarounds via the alternatives framework # -CONFIG_AMPERE_ERRATUM_AC03_CPU_38=y +# CONFIG_AMPERE_ERRATUM_AC03_CPU_38 is not set +# CONFIG_AMPERE_ERRATUM_AC04_CPU_23 is not set CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y CONFIG_ARM64_ERRATUM_826319=y CONFIG_ARM64_ERRATUM_827319=y CONFIG_ARM64_ERRATUM_824069=y CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_1742098=y +# CONFIG_ARM64_ERRATUM_832075 is not set +# CONFIG_ARM64_ERRATUM_1742098 is not set CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_1024718=y CONFIG_ARM64_ERRATUM_1418040=y CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1319367=y +# CONFIG_ARM64_ERRATUM_1319367 is not set CONFIG_ARM64_ERRATUM_1530923=y CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_ARM64_ERRATUM_2441007=y CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_ARM64_ERRATUM_2051678=y +# CONFIG_ARM64_ERRATUM_1542419 is not set +# CONFIG_ARM64_ERRATUM_1508412 is not set +# CONFIG_ARM64_ERRATUM_2051678 is not set # CONFIG_ARM64_ERRATUM_2077057 is not set -CONFIG_ARM64_ERRATUM_2658417=y -CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y -CONFIG_ARM64_ERRATUM_2054223=y -CONFIG_ARM64_ERRATUM_2067961=y -CONFIG_ARM64_ERRATUM_2441009=y -CONFIG_ARM64_ERRATUM_2457168=y -CONFIG_ARM64_ERRATUM_2645198=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y -CONFIG_ARM64_ERRATUM_2966298=y -CONFIG_ARM64_ERRATUM_3117295=y +# CONFIG_ARM64_ERRATUM_2658417 is not set +# CONFIG_ARM64_ERRATUM_2054223 is not set +# CONFIG_ARM64_ERRATUM_2067961 is not set +# CONFIG_ARM64_ERRATUM_2441009 is not set +# CONFIG_ARM64_ERRATUM_2645198 is not set +# CONFIG_ARM64_ERRATUM_2966298 is not set +# CONFIG_ARM64_ERRATUM_3117295 is not set +CONFIG_ARM64_ERRATUM_3194386=y # CONFIG_CAVIUM_ERRATUM_22375 is not set # CONFIG_CAVIUM_ERRATUM_23154 is not set # CONFIG_CAVIUM_ERRATUM_27456 is not set @@ -385,11 +392,13 @@ CONFIG_ARM64_ERRATUM_3117295=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -399,6 +408,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -406,15 +416,15 @@ CONFIG_ARM64_PA_BITS=48 CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SCHED_MC=y # CONFIG_SCHED_CLUSTER is not set -CONFIG_SCHED_SMT=y +# CONFIG_SCHED_SMT is not set CONFIG_NR_CPUS=8 CONFIG_HOTPLUG_CPU=y # CONFIG_NUMA is not set # CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set +# CONFIG_HZ_250 is not set +CONFIG_HZ_300=y # CONFIG_HZ_1000 is not set -CONFIG_HZ=250 +CONFIG_HZ=300 CONFIG_SCHED_HRTICK=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_CC_HAVE_SHADOW_CALL_STACK=y @@ -425,7 +435,9 @@ CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_HANDOVER=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y # CONFIG_XEN is not set CONFIG_ARCH_FORCE_MAX_ORDER=10 CONFIG_UNMAP_KERNEL_AT_EL0=y @@ -446,7 +458,6 @@ CONFIG_ARMV8_DEPRECATED=y # CONFIG_ARM64_HW_AFDBM=y CONFIG_ARM64_PAN=y -CONFIG_AS_HAS_LSE_ATOMICS=y CONFIG_ARM64_LSE_ATOMICS=y CONFIG_ARM64_USE_LSE_ATOMICS=y # end of ARMv8.1 architectural features @@ -454,8 +465,6 @@ CONFIG_ARM64_USE_LSE_ATOMICS=y # # ARMv8.2 architectural features # -CONFIG_AS_HAS_ARMV8_2=y -CONFIG_AS_HAS_SHA3=y # CONFIG_ARM64_PMEM is not set CONFIG_ARM64_RAS_EXTN=y CONFIG_ARM64_CNP=y @@ -464,40 +473,51 @@ CONFIG_ARM64_CNP=y # # ARMv8.3 architectural features # -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_PTR_AUTH_KERNEL=y +# CONFIG_ARM64_PTR_AUTH is not set CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y -CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y -CONFIG_AS_HAS_ARMV8_3=y CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y -CONFIG_AS_HAS_LDAPR=y # end of ARMv8.3 architectural features # # ARMv8.4 architectural features # -CONFIG_ARM64_AMU_EXTN=y -CONFIG_AS_HAS_ARMV8_4=y -CONFIG_ARM64_TLB_RANGE=y +# CONFIG_ARM64_AMU_EXTN is not set +# CONFIG_ARM64_TLB_RANGE is not set # end of ARMv8.4 architectural features # # ARMv8.5 architectural features # CONFIG_AS_HAS_ARMV8_5=y -CONFIG_ARM64_BTI=y +# CONFIG_ARM64_BTI is not set CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y -CONFIG_ARM64_E0PD=y +# CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y -CONFIG_ARM64_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # # ARMv8.7 architectural features # -CONFIG_ARM64_EPAN=y +# CONFIG_ARM64_EPAN is not set # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +# CONFIG_ARM64_POE is not set +CONFIG_ARCH_PKEY_BITS=3 +CONFIG_ARM64_HAFT=y +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +# CONFIG_ARM64_GCS is not set +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y CONFIG_ARM64_SME=y CONFIG_ARM64_PSEUDO_NMI=y @@ -507,6 +527,7 @@ CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -514,6 +535,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y # CONFIG_CMDLINE="" # CONFIG_EFI is not set +# CONFIG_COMPRESSED_INSTALL is not set # end of Boot options # @@ -549,14 +571,18 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y # CPU Idle # CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_CPU_IDLE_GOV_TEO is not set +CONFIG_DT_IDLE_STATES=y +CONFIG_DT_IDLE_GENPD=y # # ARM CPU Idle Drivers # -# CONFIG_ARM_PSCI_CPUIDLE is not set +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y # end of ARM CPU Idle Drivers # end of CPU Idle @@ -584,18 +610,19 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_SCPI_CPUFREQ=y # end of CPU Frequency scaling # end of CPU Power Management -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set +CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options # -CONFIG_ARCH_HAS_SUBPAGE_FAULTS=y +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -605,7 +632,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -623,6 +649,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_EVENTS_NMI=y @@ -666,6 +693,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -673,13 +701,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -693,6 +725,9 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y @@ -700,6 +735,8 @@ CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -713,10 +750,11 @@ CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -726,10 +764,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -741,11 +776,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set @@ -778,10 +811,12 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types -CONFIG_BLK_MQ_PCI=y CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y # # IO Schedulers @@ -793,7 +828,57 @@ CONFIG_MQ_IOSCHED_KYBER=y CONFIG_PADATA=y CONFIG_ASN1=y -CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQ=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y @@ -832,10 +917,12 @@ CONFIG_SWAP=y # Slab allocator options # CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLAB_BUCKETS is not set # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set @@ -847,15 +934,16 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -870,17 +958,23 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y # CONFIG_HWPOISON_INJECT is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y # CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set CONFIG_CMA_DEBUGFS=y # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 +CONFIG_PAGE_BLOCK_ORDER=10 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set @@ -890,8 +984,7 @@ CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -CONFIG_ARCH_USES_PG_ARCH_X=y +CONFIG_VMAP_PFN=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -908,6 +1001,7 @@ CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -922,6 +1016,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -929,14 +1024,21 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set CONFIG_TLS=y # CONFIG_TLS_DEVICE is not set # CONFIG_TLS_TOE is not set -# CONFIG_XFRM_USER is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -964,7 +1066,9 @@ CONFIG_NET_UDP_TUNNEL=m CONFIG_NET_FOU=m # CONFIG_NET_FOU_IP_TUNNELS is not set # CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set +CONFIG_INET_ESP=y +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_ESPINTCP is not set # CONFIG_INET_IPCOMP is not set CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_TUNNEL=m @@ -1005,7 +1109,8 @@ CONFIG_IPV6_SIT=m CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1052,23 +1157,26 @@ CONFIG_NF_CONNTRACK_NETBIOS_NS=m # CONFIG_NF_CONNTRACK_PPTP is not set # CONFIG_NF_CONNTRACK_SANE is not set CONFIG_NF_CONNTRACK_SIP=m -# CONFIG_NF_CONNTRACK_TFTP is not set +CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m # CONFIG_NETFILTER_NETLINK_GLUE_CT is not set CONFIG_NF_NAT=m CONFIG_NF_NAT_FTP=m CONFIG_NF_NAT_IRC=m CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # -# CONFIG_NETFILTER_XT_MARK is not set +CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1076,6 +1184,7 @@ CONFIG_NETFILTER_XTABLES_COMPAT=y # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1087,11 +1196,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set -# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1119,6 +1230,7 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m # CONFIG_NETFILTER_XT_MATCH_HL is not set # CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m # CONFIG_NETFILTER_XT_MATCH_L2TP is not set # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set CONFIG_NETFILTER_XT_MATCH_LIMIT=m @@ -1128,6 +1240,7 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_NFACCT is not set # CONFIG_NETFILTER_XT_MATCH_OSF is not set CONFIG_NETFILTER_XT_MATCH_OWNER=m +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set @@ -1144,13 +1257,78 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set -# CONFIG_IP_VS is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_IPV6 is not set +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +# CONFIG_IP_VS_PROTO_ESP is not set +# CONFIG_IP_VS_PROTO_AH is not set +# CONFIG_IP_VS_PROTO_SCTP is not set + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +# CONFIG_IP_VS_WRR is not set +# CONFIG_IP_VS_LC is not set +# CONFIG_IP_VS_WLC is not set +# CONFIG_IP_VS_FO is not set +# CONFIG_IP_VS_OVF is not set +# CONFIG_IP_VS_LBLC is not set +# CONFIG_IP_VS_LBLCR is not set +# CONFIG_IP_VS_DH is not set +# CONFIG_IP_VS_SH is not set +# CONFIG_IP_VS_MH is not set +# CONFIG_IP_VS_SED is not set +# CONFIG_IP_VS_NQ is not set +# CONFIG_IP_VS_TWOS is not set + +# +# IPVS SH scheduler +# +CONFIG_IP_VS_SH_TAB_BITS=8 + +# +# IPVS MH scheduler +# +CONFIG_IP_VS_MH_TAB_INDEX=12 + +# +# IPVS application helper +# +# CONFIG_IP_VS_FTP is not set +CONFIG_IP_VS_NFCT=y +# CONFIG_IP_VS_PE_SIP is not set # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1168,17 +1346,19 @@ CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_NAT=m CONFIG_IP_NF_TARGET_MASQUERADE=m # CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1200,16 +1380,16 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m -# CONFIG_IP6_NF_TARGET_MASQUERADE is not set +CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set # CONFIG_TIPC is not set @@ -1218,7 +1398,7 @@ CONFIG_NF_DEFRAG_IPV6=m CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_BRIDGE_VLAN_FILTERING is not set +CONFIG_BRIDGE_VLAN_FILTERING=y # CONFIG_BRIDGE_MRP is not set # CONFIG_BRIDGE_CFM is not set # CONFIG_NET_DSA is not set @@ -1270,12 +1450,13 @@ CONFIG_NET_SCH_FQ_CODEL=y # # Classification # +CONFIG_NET_CLS=y # CONFIG_NET_CLS_BASIC is not set # CONFIG_NET_CLS_ROUTE4 is not set # CONFIG_NET_CLS_FW is not set # CONFIG_NET_CLS_U32 is not set # CONFIG_NET_CLS_FLOW is not set -# CONFIG_NET_CLS_CGROUP is not set +CONFIG_NET_CLS_CGROUP=m # CONFIG_NET_CLS_BPF is not set # CONFIG_NET_CLS_FLOWER is not set # CONFIG_NET_CLS_MATCHALL is not set @@ -1292,7 +1473,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_NET_NSH is not set # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set -# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_NET_L3_MASTER_DEV=y # CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_PCPU_DEV_REFCNT=y @@ -1301,8 +1482,8 @@ CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y # CONFIG_BPF_STREAM_PARSER is not set @@ -1323,13 +1504,12 @@ CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y # CONFIG_BT_BNEP is not set CONFIG_BT_HIDP=m -CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_LE_L2CAP_ECRED=y # CONFIG_BT_LEDS is not set # CONFIG_BT_MSFTEXT is not set # CONFIG_BT_AOSPEXT is not set -# CONFIG_BT_DEBUGFS is not set +CONFIG_BT_DEBUGFS=y # CONFIG_BT_SELFTEST is not set # @@ -1361,6 +1541,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set +CONFIG_BT_HCIUART_AML=y # CONFIG_BT_HCIBCM203X is not set # CONFIG_BT_HCIBCM4377 is not set # CONFIG_BT_HCIBPA10X is not set @@ -1371,6 +1552,7 @@ CONFIG_BT_HCIUART_QCA=y CONFIG_BT_MTKSDIO=m CONFIG_BT_MTKUART=m # CONFIG_BT_NXPUART is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1379,10 +1561,8 @@ CONFIG_STREAM_PARSER=y # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1393,8 +1573,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_CRDA_SUPPORT is not set CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1402,7 +1580,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1430,6 +1607,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1445,9 +1623,12 @@ CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set +# CONFIG_PCI_DOE is not set # CONFIG_PCI_IOV is not set +# CONFIG_PCI_NPEM is not set # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set +# CONFIG_PCIE_TPH is not set # CONFIG_PCI_DYNAMIC_OF_NODES is not set # CONFIG_PCIE_BUS_TUNE_OFF is not set CONFIG_PCIE_BUS_DEFAULT=y @@ -1466,7 +1647,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_PCI_HOST_THUNDER_ECAM is not set # CONFIG_PCI_FTPCI100 is not set # CONFIG_PCI_HOST_GENERIC is not set -# CONFIG_PCIE_MICROCHIP_HOST is not set # CONFIG_PCI_XGENE is not set # CONFIG_PCIE_XILINX is not set @@ -1480,8 +1660,10 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # DesignWare-based PCIe controllers # CONFIG_PCIE_DW=y +# CONFIG_PCIE_DW_DEBUGFS is not set CONFIG_PCIE_DW_HOST=y # CONFIG_PCIE_AL is not set +# CONFIG_PCIE_AMD_MDB is not set CONFIG_PCI_MESON=y # CONFIG_PCI_HISI is not set # CONFIG_PCIE_KIRIN is not set @@ -1492,6 +1674,12 @@ CONFIG_PCI_MESON=y # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1506,6 +1694,7 @@ CONFIG_PCI_MESON=y # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +# CONFIG_PCI_PWRCTRL_SLOT is not set # CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1513,6 +1702,7 @@ CONFIG_PCI_MESON=y # # Generic Driver Options # +CONFIG_AUXILIARY_BUS=y # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y @@ -1546,7 +1736,6 @@ CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set CONFIG_GENERIC_ARCH_TOPOLOGY=y @@ -1580,6 +1769,7 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y +# CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_ARM_FFA_TRANSPORT is not set @@ -1604,6 +1794,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1655,7 +1846,6 @@ CONFIG_MTD_CFI_I2=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1724,6 +1914,7 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_DRBD is not set @@ -1751,6 +1942,8 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set +# CONFIG_TI_FPC202 is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -1771,7 +1964,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_MCHP_LAN966X_PCI is not set # CONFIG_C2PORT is not set # @@ -1780,26 +1975,18 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_EEPROM_AT24=m # CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support # CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set # CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set -# CONFIG_ECHO is not set # CONFIG_BCM_VK is not set # CONFIG_MISC_ALCOR_PCI is not set # CONFIG_MISC_RTSX_PCI is not set @@ -1807,6 +1994,8 @@ CONFIG_EEPROM_93CX6=m # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set +# CONFIG_AMD_SBRMI_I2C is not set # end of Misc devices # @@ -1994,7 +2183,35 @@ CONFIG_MD=y # CONFIG_BLK_DEV_MD is not set CONFIG_MD_BITMAP_FILE=y # CONFIG_BCACHE is not set -# CONFIG_BLK_DEV_DM is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_BUFIO=m +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +CONFIG_DM_BIO_PRISON=m +CONFIG_DM_PERSISTENT_DATA=m +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_THIN_PROVISIONING=m +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set @@ -2009,19 +2226,23 @@ CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set -# CONFIG_DUMMY is not set +CONFIG_DUMMY=m CONFIG_WIREGUARD=m # CONFIG_WIREGUARD_DEBUG is not set +# CONFIG_OVPN is not set # CONFIG_EQUALIZER is not set # CONFIG_NET_FC is not set # CONFIG_NET_TEAM is not set CONFIG_MACVLAN=m # CONFIG_MACVTAP is not set -# CONFIG_IPVLAN is not set +CONFIG_IPVLAN_L3S=y +CONFIG_IPVLAN=m +# CONFIG_IPVTAP is not set CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set CONFIG_NETCONSOLE=y @@ -2034,6 +2255,7 @@ CONFIG_TUN=y CONFIG_VETH=m CONFIG_NLMON=m # CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set # CONFIG_ARCNET is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set @@ -2072,6 +2294,7 @@ CONFIG_NET_VENDOR_ASIX=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set @@ -2095,6 +2318,8 @@ CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set # CONFIG_8139TOO is not set CONFIG_R8169=y +# CONFIG_R8169_LEDS is not set +# CONFIG_RTASE is not set # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_SAMSUNG is not set @@ -2135,6 +2360,8 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AS21XXX_PHY is not set +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set CONFIG_MESON_GXL_PHY=y # CONFIG_ADIN_PHY is not set @@ -2158,6 +2385,7 @@ CONFIG_MARVELL_PHY=y # CONFIG_MARVELL_88Q2XXX_PHY is not set # CONFIG_MARVELL_88X2222_PHY is not set # CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MAXLINEAR_86110_PHY is not set # CONFIG_MEDIATEK_GE_PHY is not set CONFIG_MICREL_PHY=y # CONFIG_MICROCHIP_T1S_PHY is not set @@ -2171,8 +2399,12 @@ CONFIG_MICROSEMI_PHY=y # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=y @@ -2189,11 +2421,9 @@ CONFIG_SMSC_PHY=y # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set # CONFIG_PSE_CONTROLLER is not set -CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y CONFIG_FWNODE_MDIO=y CONFIG_OF_MDIO=y -CONFIG_MDIO_DEVRES=y CONFIG_MDIO_BITBANG=y # CONFIG_MDIO_BCM_UNIMAC is not set CONFIG_MDIO_GPIO=y @@ -2314,6 +2544,7 @@ CONFIG_ATH10K_SDIO=m CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set # CONFIG_ATH11K is not set @@ -2347,7 +2578,6 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_SDIO=y # CONFIG_BRCMFMAC_USB is not set # CONFIG_BRCMFMAC_PCIE is not set -# CONFIG_BRCM_TRACING is not set CONFIG_BRCMDBG=y CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set @@ -2437,11 +2667,13 @@ CONFIG_RTL8188EE=m CONFIG_RTL8192EE=m CONFIG_RTL8821AE=m CONFIG_RTL8192CU=m +CONFIG_RTL8192DU=m CONFIG_RTLWIFI=m CONFIG_RTLWIFI_PCI=m CONFIG_RTLWIFI_USB=m CONFIG_RTLWIFI_DEBUG=y CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8723_COMMON=m CONFIG_RTLBTCOEXIST=m CONFIG_RTL8XXXU=m @@ -2452,8 +2684,13 @@ CONFIG_RTW88_SDIO=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m # CONFIG_RTW88_8822BE is not set CONFIG_RTW88_8822BS=m CONFIG_RTW88_8822BU=m @@ -2462,12 +2699,18 @@ CONFIG_RTW88_8822CS=m CONFIG_RTW88_8822CU=m # CONFIG_RTW88_8723DE is not set # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m # CONFIG_RTW88_8821CE is not set CONFIG_RTW88_8821CS=m CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +# CONFIG_RTW88_8814AE is not set +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set @@ -2511,7 +2754,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2534,7 +2776,6 @@ CONFIG_KEYBOARD_GPIO_POLLED=m # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2637,7 +2878,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F3A is not set +CONFIG_RMI4_F3A=y # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set @@ -2668,7 +2909,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2765,7 +3005,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2801,7 +3040,6 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_I801 is not set # CONFIG_I2C_ISCH is not set -# CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_NVIDIA_GPU is not set # CONFIG_I2C_SIS5595 is not set @@ -2873,6 +3111,7 @@ CONFIG_SPI_BITBANG=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_GPIO=y # CONFIG_SPI_FSL_SPI is not set @@ -2883,7 +3122,6 @@ CONFIG_SPI_MESON_SPIFC=y # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SN_F_OSPI is not set @@ -2919,10 +3157,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2940,6 +3175,7 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -2956,6 +3192,7 @@ CONFIG_PINCTRL_MESON_AXG_PMX=y CONFIG_PINCTRL_MESON_G12A=y CONFIG_PINCTRL_MESON_A1=y CONFIG_PINCTRL_MESON_S4=y +CONFIG_PINCTRL_AMLOGIC_A4=y CONFIG_PINCTRL_AMLOGIC_C3=y CONFIG_PINCTRL_AMLOGIC_T7=y @@ -2990,6 +3227,7 @@ CONFIG_GPIO_GENERIC_PLATFORM=y # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_XGENE is not set @@ -3041,6 +3279,7 @@ CONFIG_GPIO_PCA953X=m # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -3052,6 +3291,13 @@ CONFIG_GPIO_PCA953X=m # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO=y @@ -3060,12 +3306,14 @@ CONFIG_POWER_RESET_GPIO_RESTART=y # CONFIG_POWER_RESET_LTC2952 is not set CONFIG_POWER_RESET_REGULATOR=y CONFIG_POWER_RESET_RESTART=y +# CONFIG_POWER_RESET_TORADEX_EC is not set # CONFIG_POWER_RESET_XGENE is not set CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -3073,6 +3321,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_IP5XXX_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CHAGALL is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set @@ -3084,6 +3333,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set @@ -3092,6 +3342,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_LTC4162L is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_MAX77976 is not set +# CONFIG_CHARGER_MAX8971 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24257 is not set @@ -3120,7 +3371,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3137,9 +3387,11 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -3158,7 +3410,9 @@ CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set # CONFIG_SENSORS_POWERZ is not set @@ -3176,6 +3430,7 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -3189,7 +3444,6 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -3221,17 +3475,19 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SBTSI is not set -# CONFIG_SENSORS_SBRMI is not set # CONFIG_SENSORS_SHT15 is not set # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SHT3x is not set @@ -3257,6 +3513,7 @@ CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3283,10 +3540,10 @@ CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set # CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3371,7 +3628,8 @@ CONFIG_BCMA_DRIVER_PCI=y # # Multifunction device drivers # -CONFIG_MFD_CORE=y +CONFIG_MFD_CORE=m +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3408,13 +3666,16 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set +# CONFIG_MFD_MAX77759 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set @@ -3430,7 +3691,6 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set @@ -3440,7 +3700,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_RK8XX_I2C is not set # CONFIG_MFD_RK8XX_SPI is not set # CONFIG_MFD_RN5T618 is not set -CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SEC_I2C is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set @@ -3484,13 +3744,17 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set CONFIG_MFD_KHADAS_MCU=m # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3504,6 +3768,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ADP5055 is not set # CONFIG_REGULATOR_AW37503 is not set # CONFIG_REGULATOR_DA9121 is not set # CONFIG_REGULATOR_DA9210 is not set @@ -3538,6 +3803,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_MT6315 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3560,9 +3826,6 @@ CONFIG_REGULATOR_PWM=y # CONFIG_REGULATOR_RTMV20 is not set # CONFIG_REGULATOR_RTQ6752 is not set # CONFIG_REGULATOR_RTQ2208 is not set -# CONFIG_REGULATOR_S2MPA01 is not set -# CONFIG_REGULATOR_S2MPS11 is not set -# CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set @@ -3623,9 +3886,10 @@ CONFIG_CEC_NOTIFIER=y # CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set CONFIG_CEC_MESON_AO=y CONFIG_CEC_MESON_G12A_AO=y -# CONFIG_CEC_GPIO is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set # CONFIG_USB_PULSE8_CEC is not set # CONFIG_USB_RAINSHADOW_CEC is not set # end of CEC support @@ -3806,6 +4070,9 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # # Amlogic media platform drivers # +# CONFIG_VIDEO_C3_ISP is not set +# CONFIG_VIDEO_C3_MIPI_ADAPTER is not set +# CONFIG_VIDEO_C3_MIPI_CSI2 is not set # CONFIG_VIDEO_MESON_GE2D is not set # @@ -3862,6 +4129,11 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -4071,6 +4343,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4299,43 +4573,66 @@ CONFIG_DVB_DUMMY_FE=m # Graphics support # CONFIG_APERTURE_HELPERS=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y CONFIG_AUXDISPLAY=y # CONFIG_HD44780 is not set -# CONFIG_IMG_ASCII_LCD is not set -# CONFIG_HT16K33 is not set # CONFIG_LCD2S is not set -CONFIG_TM1628=m # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y +# CONFIG_IMG_ASCII_LCD is not set +# CONFIG_HT16K33 is not set +# CONFIG_MAX6959 is not set +# CONFIG_SEG_LED_GPIO is not set CONFIG_DRM=y -CONFIG_DRM_MIPI_DSI=y + +# +# DRM debugging options +# +# CONFIG_DRM_WERROR is not set # CONFIG_DRM_DEBUG_MM is not set +# end of DRM debugging options + +CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set CONFIG_DRM_DEBUG_MODESET_LOCK=y +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y +CONFIG_DRM_EXEC=m +CONFIG_DRM_GPUVM=m CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=m CONFIG_DRM_SCHED=y # -# I2C encoder or helper chips +# Drivers for system framebuffers # -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips +# CONFIG_DRM_SIMPLEDRM is not set +# end of Drivers for system framebuffers # # ARM devices @@ -4367,35 +4664,42 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TD4320 is not set +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_DSI_CM is not set -# CONFIG_DRM_PANEL_LVDS is not set -# CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_PANEL_EDP is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_DSI_CM is not set +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_HIMAX_HX8279 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set # CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_LPM102A188A is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set @@ -4404,8 +4708,9 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set +# CONFIG_DRM_PANEL_NOVATEK_NT37801 is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set @@ -4413,18 +4718,26 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set @@ -4435,19 +4748,24 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set -# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +# CONFIG_DRM_PANEL_EDP is not set +# CONFIG_DRM_PANEL_SIMPLE is not set +# CONFIG_DRM_PANEL_SUMMIT is not set +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set +# CONFIG_DRM_PANEL_VISIONOX_G2647FB105 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set +# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels @@ -4461,6 +4779,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4485,6 +4805,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4516,7 +4837,6 @@ CONFIG_DRM_MESON_DW_MIPI_DSI=y # CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_PANEL_MIPI_DBI is not set -# CONFIG_DRM_SIMPLEDRM is not set # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9163 is not set # CONFIG_TINYDRM_ILI9225 is not set @@ -4524,13 +4844,16 @@ CONFIG_DRM_MESON_DW_MIPI_DSI=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set -# CONFIG_TINYDRM_ST7586 is not set -# CONFIG_TINYDRM_ST7735R is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_DRM_PL111 is not set CONFIG_DRM_LIMA=m CONFIG_DRM_PANFROST=m +CONFIG_DRM_PANTHOR=m # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set +# CONFIG_DRM_ST7571_I2C is not set +# CONFIG_DRM_ST7586 is not set +# CONFIG_DRM_ST7735R is not set # CONFIG_DRM_SSD130X is not set # CONFIG_DRM_POWERVR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y @@ -4588,6 +4911,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS=y @@ -4602,11 +4926,13 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set @@ -4656,10 +4982,10 @@ CONFIG_SND_MAX_CARDS=32 CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set CONFIG_SND_VMASTER=y # CONFIG_SND_SEQUENCER is not set # CONFIG_SND_DRIVERS is not set @@ -4688,6 +5014,7 @@ CONFIG_SND_USB_PODHD=m CONFIG_SND_USB_TONEPORT=m CONFIG_SND_USB_VARIAX=m CONFIG_SND_SOC=y +# CONFIG_SND_SOC_USB is not set # CONFIG_SND_SOC_ADI is not set # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_AMD_ACP_CONFIG is not set @@ -4715,6 +5042,12 @@ CONFIG_SND_SOC=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set @@ -4741,6 +5074,7 @@ CONFIG_SND_MESON_G12A_TOHDMITX=y CONFIG_SND_SOC_MESON_T9015=y # end of ASoC support for Amlogic platforms +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4760,6 +5094,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4772,6 +5107,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4779,7 +5115,9 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set # CONFIG_SND_SOC_AW87390 is not set # CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set @@ -4802,6 +5140,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4811,23 +5150,28 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_CS43130 is not set # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS48L32 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y CONFIG_SND_SOC_ES7134=y # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=y CONFIG_SND_SOC_ES8328_I2C=y # CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_ES8375 is not set +# CONFIG_SND_SOC_ES8389 is not set # CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set CONFIG_SND_SOC_MAX98357A=y @@ -4853,20 +5197,24 @@ CONFIG_SND_SOC_MAX98357A=y # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set CONFIG_SND_SOC_PCM5102A=m -# CONFIG_SND_SOC_PCM512x_I2C is not set +CONFIG_SND_SOC_PCM512x=m +CONFIG_SND_SOC_PCM512x_I2C=m # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RT9123 is not set +# CONFIG_SND_SOC_RT9123P is not set # CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4905,6 +5253,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4934,6 +5283,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4942,6 +5292,8 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4997,11 +5349,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -5015,7 +5369,6 @@ CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -CONFIG_HID_LENOVO=y # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y @@ -5032,13 +5385,12 @@ CONFIG_LOGIWHEELS_FF=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NINTENDO=y +CONFIG_HID_NINTENDO=m CONFIG_NINTENDO_FF=y # CONFIG_HID_NTI is not set # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -5076,6 +5428,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -5090,6 +5443,8 @@ CONFIG_HID_ZYDACRON=y # # end of HID-BPF support +# CONFIG_I2C_HID is not set + # # USB HID support # @@ -5098,7 +5453,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -# CONFIG_I2C_HID is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -5120,8 +5474,9 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_PRODUCTLIST is not set # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set # CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=m # @@ -5130,8 +5485,8 @@ CONFIG_USB_MON=m # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y +# CONFIG_USB_XHCI_SIDEBAND is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y @@ -5157,11 +5512,7 @@ CONFIG_USB_WDM=m # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -5300,7 +5651,8 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -CONFIG_USB_ONBOARD_HUB=y +CONFIG_USB_ONBOARD_DEV=y +# CONFIG_USB_ONBOARD_DEV_USB5744 is not set # # USB Physical Layer drivers @@ -5325,12 +5677,9 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_GR_UDC is not set # CONFIG_USB_R8A66597 is not set # CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set # CONFIG_USB_SNP_UDC_PLAT is not set # CONFIG_USB_M66592 is not set # CONFIG_USB_BDC_UDC is not set -# CONFIG_USB_NET2272 is not set # CONFIG_USB_GADGET_XILINX is not set # CONFIG_USB_MAX3420_UDC is not set # CONFIG_USB_DUMMY_HCD is not set @@ -5382,8 +5731,11 @@ CONFIG_TYPEC_UCSI=m # CONFIG_TYPEC_MUX_FSA4480 is not set # CONFIG_TYPEC_MUX_GPIO_SBU is not set # CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_MUX_IT5205 is not set # CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PS883X is not set # CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_TUSB1046 is not set # CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support @@ -5391,6 +5743,7 @@ CONFIG_TYPEC_UCSI=m # USB Type-C Alternate Mode drivers # # CONFIG_TYPEC_DP_ALTMODE is not set +# CONFIG_TYPEC_TBT_ALTMODE is not set # end of USB Type-C Alternate Mode drivers CONFIG_USB_ROLE_SWITCH=y @@ -5451,6 +5804,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5475,6 +5829,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5486,12 +5841,15 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set +# CONFIG_LEDS_TPS6131X is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set # CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set @@ -5499,15 +5857,15 @@ CONFIG_LEDS_SYSCON=y # LED Triggers # CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -# CONFIG_LEDS_TRIGGER_DISK is not set -# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_MTD=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y -# CONFIG_LEDS_TRIGGER_ACTIVITY is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_ACTIVITY=y +CONFIG_LEDS_TRIGGER_GPIO=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5515,14 +5873,14 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # # CONFIG_LEDS_TRIGGER_TRANSIENT is not set # CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_LEDS_TRIGGER_PANIC is not set -# CONFIG_LEDS_TRIGGER_NETDEV is not set +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEDS_TRIGGER_NETDEV=y # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5574,13 +5932,14 @@ CONFIG_RTC_DRV_PCF8563=m # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set -# CONFIG_RTC_DRV_S5M is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5643,6 +6002,7 @@ CONFIG_RTC_DRV_PL031=y # HID Sensor RTC drivers # # CONFIG_RTC_DRV_GOLDFISH is not set +CONFIG_RTC_DRV_AMLOGIC_A4=y # CONFIG_DMADEVICES is not set # @@ -5670,22 +6030,13 @@ CONFIG_DMABUF_HEAPS_CMA=y # # Microsoft Hyper-V guest support # +# CONFIG_HYPERV is not set # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -CONFIG_RTLLIB=m -CONFIG_RTLLIB_CRYPTO_CCMP=m -CONFIG_RTLLIB_CRYPTO_TKIP=m -CONFIG_RTLLIB_CRYPTO_WEP=m -# CONFIG_RTL8192E is not set CONFIG_RTL8723BS=m -CONFIG_R8712U=m -# CONFIG_RTS5208 is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5695,7 +6046,6 @@ CONFIG_R8712U=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5734,18 +6084,15 @@ CONFIG_VIDEO_MESON_VDEC=m # StarFive media platform drivers # # CONFIG_STAGING_MEDIA_DEPRECATED is not set -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set # CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -5768,7 +6115,6 @@ CONFIG_COMMON_CLK_SCPI=y # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set -# CONFIG_COMMON_CLK_S2MPS11 is not set # CONFIG_COMMON_CLK_AXI_CLKGEN is not set # CONFIG_COMMON_CLK_XGENE is not set CONFIG_COMMON_CLK_PWM=y @@ -5789,6 +6135,7 @@ CONFIG_COMMON_CLK_MESON_PHASE=y CONFIG_COMMON_CLK_MESON_PLL=y CONFIG_COMMON_CLK_MESON_SCLK_DIV=y CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y +CONFIG_COMMON_CLK_MESON_VCLK=y CONFIG_COMMON_CLK_MESON_CLKC_UTILS=y CONFIG_COMMON_CLK_MESON_AO_CLKC=y CONFIG_COMMON_CLK_MESON_EE_CLKC=y @@ -5798,6 +6145,8 @@ CONFIG_COMMON_CLK_AXG=y CONFIG_COMMON_CLK_AXG_AUDIO=y # CONFIG_COMMON_CLK_A1_PLL is not set # CONFIG_COMMON_CLK_A1_PERIPHERALS is not set +# CONFIG_COMMON_CLK_C3_PLL is not set +# CONFIG_COMMON_CLK_C3_PERIPHERALS is not set CONFIG_COMMON_CLK_G12A=y CONFIG_COMMON_CLK_S4_PLL=y CONFIG_COMMON_CLK_S4_PERIPHERALS=y @@ -5815,14 +6164,16 @@ CONFIG_TIMER_PROBE=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_FSL_ERRATUM_A008585=y +# CONFIG_FSL_ERRATUM_A008585 is not set # CONFIG_HISILICON_ERRATUM_161010101 is not set CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set # end of Clock Source drivers CONFIG_MAILBOX=y CONFIG_ARM_MHU=y # CONFIG_ARM_MHU_V2 is not set +# CONFIG_ARM_MHU_V3 is not set CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set # CONFIG_ALTERA_MBOX is not set @@ -5847,9 +6198,9 @@ CONFIG_IOMMU_DEFAULT_DMA_STRICT=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y -# CONFIG_IOMMUFD is not set # CONFIG_ARM_SMMU is not set # CONFIG_ARM_SMMU_V3 is not set +# CONFIG_IOMMUFD is not set # # Remoteproc drivers @@ -5911,6 +6262,7 @@ CONFIG_MESON_GX_SOCINFO=y # # Qualcomm SoC drivers # +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set @@ -5928,7 +6280,6 @@ CONFIG_MESON_GX_SOCINFO=y # # Amlogic PM Domains # -CONFIG_MESON_GX_PM_DOMAINS=y CONFIG_MESON_EE_PM_DOMAINS=y CONFIG_MESON_SECURE_PM_DOMAINS=y # end of Amlogic PM Domains @@ -5974,6 +6325,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -6011,6 +6363,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -6047,31 +6401,42 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set # CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set -# CONFIG_ADI_AXI_ADC is not set +# CONFIG_AD9467 is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set @@ -6095,26 +6460,33 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MCP3911 is not set CONFIG_MESON_SARADC=y # CONFIG_NAU7802 is not set +# CONFIG_NCT7201 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set +# CONFIG_ROHM_BD79124 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC12138 is not set # CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC12138 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_ADS1298 is not set +# CONFIG_TI_ADS131E08 is not set +# CONFIG_TI_ADS7138 is not set +# CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set -# CONFIG_TI_ADS124S08 is not set -# CONFIG_TI_ADS131E08 is not set # CONFIG_TI_LMP92064 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_TI_TSC2046 is not set @@ -6158,10 +6530,13 @@ CONFIG_MESON_SARADC=y # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set +# CONFIG_MHZ19B is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set # CONFIG_SCD4X is not set +# CONFIG_SEN0322 is not set # CONFIG_SENSIRION_SGP30 is not set # CONFIG_SENSIRION_SGP40 is not set # CONFIG_SPS30_I2C is not set @@ -6189,6 +6564,8 @@ CONFIG_MESON_SARADC=y # # Digital to analog converters # +# CONFIG_AD3530R is not set +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -6200,6 +6577,7 @@ CONFIG_MESON_SARADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -6212,11 +6590,14 @@ CONFIG_MESON_SARADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set @@ -6259,6 +6640,7 @@ CONFIG_MESON_SARADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -6301,6 +6683,7 @@ CONFIG_MESON_SARADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set # CONFIG_HDC3020 is not set @@ -6317,8 +6700,11 @@ CONFIG_MESON_SARADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set # CONFIG_BMI323_I2C is not set # CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set @@ -6330,6 +6716,7 @@ CONFIG_MESON_SARADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6339,11 +6726,15 @@ CONFIG_MESON_SARADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6358,7 +6749,6 @@ CONFIG_MESON_SARADC=y # CONFIG_ISL29125 is not set # CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR390 is not set @@ -6370,6 +6760,7 @@ CONFIG_MESON_SARADC=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6385,7 +6776,9 @@ CONFIG_MESON_SARADC=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set # CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set @@ -6395,9 +6788,11 @@ CONFIG_MESON_SARADC=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6407,6 +6802,7 @@ CONFIG_MESON_SARADC=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6474,6 +6870,7 @@ CONFIG_MESON_SARADC=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6489,6 +6886,7 @@ CONFIG_MESON_SARADC=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6503,6 +6901,7 @@ CONFIG_MESON_SARADC=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6534,12 +6933,13 @@ CONFIG_MESON_SARADC=y # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set +# CONFIG_PWM_MC33XS2410 is not set CONFIG_PWM_MESON=y # CONFIG_PWM_PCA9685 is not set # CONFIG_PWM_XILINX is not set @@ -6553,7 +6953,7 @@ CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y @@ -6562,11 +6962,14 @@ CONFIG_MESON_IRQ_GPIO=y # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_MESON=y -CONFIG_RESET_MESON_AUDIO_ARB=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set +CONFIG_RESET_MESON_COMMON=y +CONFIG_RESET_MESON=y +CONFIG_RESET_MESON_AUX=y +CONFIG_RESET_MESON_AUDIO_ARB=y # # PHY Subsystem @@ -6574,6 +6977,7 @@ CONFIG_RESET_MESON_AUDIO_ARB=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set CONFIG_PHY_MESON8B_USB2=y CONFIG_PHY_MESON_GXL_USB2=y CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG=y @@ -6596,7 +7000,6 @@ CONFIG_PHY_MESON_AXG_MIPI_DPHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6612,6 +7015,7 @@ CONFIG_PHY_MESON_AXG_MIPI_DPHY=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set # CONFIG_ARM_PMU is not set # CONFIG_ARM_SMMU_V3_PMU is not set # CONFIG_ARM_DSU_PMU is not set @@ -6643,6 +7047,7 @@ CONFIG_NVMEM_LAYOUTS=y # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +# CONFIG_NVMEM_LAYOUT_U_BOOT_ENV is not set # end of Layout Types CONFIG_NVMEM_MESON_EFUSE=y @@ -6705,7 +7110,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6727,6 +7131,7 @@ CONFIG_BTRFS_FS_POSIX_ACL=y # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m @@ -6748,11 +7153,14 @@ CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set # CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m # CONFIG_CUSE is not set # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6766,9 +7174,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -6792,11 +7200,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6841,6 +7249,7 @@ CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y # CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI is not set # CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set # CONFIG_SQUASHFS_XATTR is not set +# CONFIG_SQUASHFS_COMP_CACHE_FULL is not set CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y @@ -6857,7 +7266,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6870,6 +7278,7 @@ CONFIG_NFS_SWAP=y CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m CONFIG_PNFS_FLEXFILE_LAYOUT=y CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" CONFIG_NFS_V4_1_MIGRATION=y @@ -6906,6 +7315,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6978,10 +7388,12 @@ CONFIG_KEYS=y # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y # CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_PROC_MEM_ALWAYS_FORCE=y +# CONFIG_PROC_MEM_FORCE_PTRACE is not set +# CONFIG_PROC_MEM_NO_FORCE is not set +# CONFIG_MSEAL_SYSTEM_MAPPINGS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" @@ -7006,6 +7418,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -7029,6 +7448,7 @@ CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG=y CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y @@ -7045,13 +7465,13 @@ CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +# CONFIG_CRYPTO_SELFTESTS is not set CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=y CONFIG_CRYPTO_CRYPTD=y -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set +# CONFIG_CRYPTO_BENCHMARK is not set CONFIG_CRYPTO_ENGINE=y # end of Crypto core or helper @@ -7065,7 +7485,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -7102,7 +7521,6 @@ CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set @@ -7118,7 +7536,7 @@ CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_GENIV=y CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=m +CONFIG_CRYPTO_ECHAINIV=y # CONFIG_CRYPTO_ESSIV is not set # end of AEAD (authenticated encryption with associated data) ciphers @@ -7133,16 +7551,13 @@ CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_POLYVAL=y -# CONFIG_CRYPTO_POLY1305 is not set # CONFIG_CRYPTO_RMD160 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y -CONFIG_CRYPTO_SM3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=y @@ -7153,8 +7568,6 @@ CONFIG_CRYPTO_XXHASH=y # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y # end of CRCs (cyclic redundancy checks) # @@ -7197,16 +7610,12 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_CHACHA20_NEON=y # # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y CONFIG_CRYPTO_SHA512_ARM64=y CONFIG_CRYPTO_SHA512_ARM64_CE=y # CONFIG_CRYPTO_SHA3_ARM64 is not set @@ -7224,7 +7633,6 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=y CONFIG_CRYPTO_AES_ARM64_CE_CCM=y # CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set # CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y # end of Accelerated Cryptographic Algorithms for CPU (arm64) CONFIG_CRYPTO_HW=y @@ -7240,7 +7648,6 @@ CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set -# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_CCREE is not set # CONFIG_CRYPTO_DEV_HISI_SEC is not set @@ -7265,6 +7672,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -7282,7 +7690,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -7299,34 +7706,38 @@ CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y -CONFIG_CRYPTO_LIB_CURVE25519=y +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m +CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_SHA256=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD=y +CONFIG_CRYPTO_LIB_SHA256_GENERIC=y +CONFIG_CRYPTO_LIB_SM3=y +CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m +CONFIG_CRYPTO_SHA256_ARM64=y # end of Crypto library routines CONFIG_CRC_CCITT=m CONFIG_CRC16=y CONFIG_CRC_T10DIF=y -CONFIG_CRC64_ROCKSOFT=y +CONFIG_ARCH_HAS_CRC_T10DIF=y +CONFIG_CRC_T10DIF_ARCH=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC64=y -# CONFIG_CRC4 is not set CONFIG_CRC7=y -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set @@ -7343,8 +7754,11 @@ CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_POWERPC is not set # CONFIG_XZ_DEC_ARM is not set # CONFIG_XZ_DEC_ARMTHUMB is not set +CONFIG_XZ_DEC_ARM64=y # CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_GENERIC_ALLOCATOR=y CONFIG_XARRAY_MULTI=y @@ -7353,20 +7767,21 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -7385,7 +7800,6 @@ CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y -# CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y @@ -7394,11 +7808,14 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7424,6 +7841,7 @@ CONFIG_SBITMAP=y CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7482,7 +7900,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -7495,6 +7913,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7509,7 +7928,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7519,15 +7938,16 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y -CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_KASAN_SW_TAGS=y @@ -7557,32 +7977,21 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set -CONFIG_DEBUG_PREEMPT=y - # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_PROVE_LOCKING is not set # CONFIG_LOCK_STAT is not set -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y -CONFIG_DEBUG_RWSEMS=y -CONFIG_DEBUG_LOCK_ALLOC=y -CONFIG_LOCKDEP=y -CONFIG_LOCKDEP_BITS=15 -CONFIG_LOCKDEP_CHAINS_BITS=16 -CONFIG_LOCKDEP_STACK_TRACE_BITS=19 -CONFIG_LOCKDEP_STACK_TRACE_HASH_BITS=14 -CONFIG_LOCKDEP_CIRCULAR_QUEUE_BITS=12 -# CONFIG_DEBUG_LOCKDEP is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_DEBUG_ATOMIC_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set @@ -7622,14 +8031,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7652,7 +8064,6 @@ CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y # CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_FAULT_INJECTION is not set CONFIG_ARCH_HAS_KCOV=y -CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_ARCH_USE_MEMTEST=y @@ -7664,3 +8075,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Generic/devices/x11/filesystem/etc/X11/xorg-i915.conf b/projects/Generic/devices/x11/filesystem/etc/X11/xorg-i915.conf index f4f70ae255..383fd7e832 100644 --- a/projects/Generic/devices/x11/filesystem/etc/X11/xorg-i915.conf +++ b/projects/Generic/devices/x11/filesystem/etc/X11/xorg-i915.conf @@ -4,4 +4,5 @@ Section "Device" VendorName "INTEL Corporation" Option "TripleBuffer" "false" Option "TearFree" "false" + Option "DRI" "3" EndSection diff --git a/projects/Generic/devices/x11/patches/linux/linux-revert-acpi-bus-get-device-5-18.patch b/projects/Generic/devices/x11/patches/linux/linux-revert-acpi-bus-get-device-5-18.patch deleted file mode 100644 index 13365ed878..0000000000 --- a/projects/Generic/devices/x11/patches/linux/linux-revert-acpi-bus-get-device-5-18.patch +++ /dev/null @@ -1,56 +0,0 @@ -From ac2a3feefad549814f5e7cca30be07a255c8494a Mon Sep 17 00:00:00 2001 -From: "Rafael J. Wysocki" -Date: Tue, 5 Apr 2022 19:49:26 +0200 -Subject: Revert ACPI: bus: Eliminate acpi_bus_get_device() - -Revert d017a3167bcb76caedf2b444645bf4db75f775a5 - - Replace the last instance of acpi_bus_get_device(), added recently - by commit 87e59b36e5e2 ("spi: Support selection of the index of the - ACPI Spi Resource before alloc"), with acpi_fetch_acpi_dev() and - finally drop acpi_bus_get_device() that has no more users. - ---- - drivers/acpi/scan.c | 13 +++++++++++++ - include/acpi/acpi_bus.h | 1 + - 2 files changed, 14 insertions(+) - -diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c -index 9efbfe087de76..762b61f67e6c6 100644 ---- a/drivers/acpi/scan.c -+++ b/drivers/acpi/scan.c -@@ -588,6 +588,19 @@ static struct acpi_device *handle_to_device(acpi_handle handle, - return adev; - } - -+int acpi_bus_get_device(acpi_handle handle, struct acpi_device **device) -+{ -+ if (!device) -+ return -EINVAL; -+ -+ *device = handle_to_device(handle, NULL); -+ if (!*device) -+ return -ENODEV; -+ -+ return 0; -+} -+EXPORT_SYMBOL(acpi_bus_get_device); -+ - /** - * acpi_fetch_acpi_dev - Retrieve ACPI device object. - * @handle: ACPI handle associated with the requested ACPI device object. -diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h -index 3f7f01f038690..c4b78c21d7930 100644 ---- a/include/acpi/acpi_bus.h -+++ b/include/acpi/acpi_bus.h -@@ -509,6 +509,7 @@ extern int unregister_acpi_notifier(struct notifier_block *); - * External Functions - */ - -+int acpi_bus_get_device(acpi_handle handle, struct acpi_device **device); - struct acpi_device *acpi_fetch_acpi_dev(acpi_handle handle); - acpi_status acpi_bus_get_status_handle(acpi_handle handle, - unsigned long long *sta); --- -cgit 1.2.3-1.el7 - diff --git a/projects/Generic/devices/x11/patches/linux/linux-revert-fbdev--Make-registered-fb---private-to-fbmem-6-1.patch b/projects/Generic/devices/x11/patches/linux/linux-revert-fbdev--Make-registered-fb---private-to-fbmem-6-1.patch deleted file mode 100644 index c8db6602c4..0000000000 --- a/projects/Generic/devices/x11/patches/linux/linux-revert-fbdev--Make-registered-fb---private-to-fbmem-6-1.patch +++ /dev/null @@ -1,46 +0,0 @@ -commit b6fa3778e84c9d2f6d9511189ba16078b6c37196 -Author: Rudi Heitbaum -Date: Mon Oct 17 11:40:02 2022 +0000 - - Revert "fbdev: Make registered_fb[] private to fbmem.c" - - This reverts commit 5727dcfd8486399c40e39d2c08fe36fedab29d99. - -diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c -index 1e70d8c67653..6ae1c5fa19f9 100644 ---- a/drivers/video/fbdev/core/fbmem.c -+++ b/drivers/video/fbdev/core/fbmem.c -@@ -51,10 +51,10 @@ - static DEFINE_MUTEX(registration_lock); - - struct fb_info *registered_fb[FB_MAX] __read_mostly; -+EXPORT_SYMBOL(registered_fb); -+ - int num_registered_fb __read_mostly; --#define for_each_registered_fb(i) \ -- for (i = 0; i < FB_MAX; i++) \ -- if (!registered_fb[i]) {} else -+EXPORT_SYMBOL(num_registered_fb); - - bool fb_center_logo __read_mostly; - -diff --git a/include/linux/fb.h b/include/linux/fb.h -index 0aff76bcbb00..453c3b2b6b8e 100644 ---- a/include/linux/fb.h -+++ b/include/linux/fb.h -@@ -627,10 +627,16 @@ extern int fb_get_color_depth(struct fb_var_screeninfo *var, - extern int fb_get_options(const char *name, char **option); - extern int fb_new_modelist(struct fb_info *info); - -+extern struct fb_info *registered_fb[FB_MAX]; -+extern int num_registered_fb; - extern bool fb_center_logo; - extern int fb_logo_count; - -+#define for_each_registered_fb(i) \ -+ for (i = 0; i < FB_MAX; i++) \ -+ if (!registered_fb[i]) {} else -+ - static inline void lock_fb_info(struct fb_info *info) - { - mutex_lock(&info->lock); diff --git a/projects/Generic/linux/linux.x86_64.conf b/projects/Generic/linux/linux.x86_64.conf index 915ef3faa5..56e8d7b3f1 100644 --- a/projects/Generic/linux/linux.x86_64.conf +++ b/projects/Generic/linux/linux.x86_64.conf @@ -1,24 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86 6.6.66 Kernel Configuration +# Linux/x86 6.15.6 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="x86_64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="x86_64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -51,7 +54,6 @@ CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y -CONFIG_SYSVIPC_COMPAT=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set @@ -72,7 +74,6 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y -CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y @@ -82,10 +83,10 @@ CONFIG_SPARSE_IRQ=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST_IDLE=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y @@ -120,9 +121,12 @@ CONFIG_BPF_SYSCALL=y # end of BPF subsystem CONFIG_PREEMPT_VOLUNTARY_BUILD=y +CONFIG_ARCH_HAS_PREEMPT_LAZY=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_LAZY is not set +# CONFIG_PREEMPT_RT is not set # CONFIG_PREEMPT_DYNAMIC is not set # CONFIG_SCHED_CORE is not set @@ -148,6 +152,7 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RUDE_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -174,26 +179,31 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -233,21 +243,19 @@ CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y -CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_SYSFS_SYSCALL is not set CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_EXPERT=y -# CONFIG_UID16 is not set CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SYSFS_SYSCALL is not set CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y # CONFIG_PCSPKR_PLATFORM is not set -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -259,18 +267,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set # CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -286,10 +293,9 @@ CONFIG_TRACEPOINTS=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y +CONFIG_VMCORE_INFO=y # CONFIG_KEXEC is not set # CONFIG_KEXEC_FILE is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup @@ -319,16 +325,16 @@ CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=4 -CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # CONFIG_SMP=y CONFIG_X86_X2APIC=y +# CONFIG_X86_POSTED_MSI is not set CONFIG_X86_MPPARSE=y -# CONFIG_GOLDFISH is not set # CONFIG_X86_CPU_RESCTRL is not set +# CONFIG_X86_FRED is not set # CONFIG_X86_EXTENDED_PLATFORM is not set CONFIG_X86_INTEL_LPSS=y CONFIG_X86_AMD_PLATFORM_DEVICE=y @@ -349,21 +355,18 @@ CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set # CONFIG_INTEL_TDX_GUEST is not set -# CONFIG_MK8 is not set -# CONFIG_MPSC is not set -# CONFIG_MCORE2 is not set -# CONFIG_MATOM is not set -CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y -CONFIG_X86_CMPXCHG64=y +CONFIG_X86_HAVE_PAE=y +CONFIG_X86_CX8=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y # CONFIG_PROCESSOR_SELECT is not set +CONFIG_BROADCAST_TLB_FLUSH=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y @@ -384,6 +387,7 @@ CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y +CONFIG_ACPI_MADT_WAKEUP=y CONFIG_X86_IO_APIC=y # CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set # CONFIG_X86_MCE is not set @@ -414,7 +418,6 @@ CONFIG_X86_DIRECT_GBPAGES=y CONFIG_NUMA=y # CONFIG_AMD_NUMA is not set CONFIG_X86_64_ACPI_NUMA=y -# CONFIG_NUMA_EMU is not set CONFIG_NODES_SHIFT=6 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y @@ -428,12 +431,12 @@ CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y -CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y CONFIG_X86_CET=y CONFIG_X86_KERNEL_IBT=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y +CONFIG_ARCH_PKEY_BITS=4 CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set @@ -443,7 +446,6 @@ CONFIG_EFI=y CONFIG_EFI_STUB=y CONFIG_EFI_HANDOVER_PROTOCOL=y CONFIG_EFI_MIXED=y -# CONFIG_EFI_FAKE_MEMMAP is not set # CONFIG_EFI_RUNTIME_MAP is not set # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set @@ -459,6 +461,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y @@ -469,7 +472,6 @@ CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0x0 CONFIG_HOTPLUG_CPU=y -# CONFIG_COMPAT_VDSO is not set CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set CONFIG_CMDLINE_BOOL=y @@ -478,8 +480,12 @@ CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1" CONFIG_MODIFY_LDT_SYSCALL=y # CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y +CONFIG_X86_BUS_LOCK_DETECT=y # end of Processor type and features +CONFIG_CC_HAS_NAMED_AS=y +CONFIG_CC_HAS_NAMED_AS_FIXED_SANITIZERS=y +CONFIG_USE_X86_SEG_SUPPORT=y CONFIG_CC_HAS_SLS=y CONFIG_CC_HAS_RETURN_THUNK=y CONFIG_CC_HAS_ENTRY_PADDING=y @@ -490,19 +496,30 @@ CONFIG_HAVE_CALL_THUNKS=y CONFIG_CALL_THUNKS=y CONFIG_PREFIX_SYMBOLS=y CONFIG_CPU_MITIGATIONS=y -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_RETPOLINE=y -CONFIG_RETHUNK=y -CONFIG_CPU_UNRET_ENTRY=y -CONFIG_CALL_DEPTH_TRACKING=y +CONFIG_MITIGATION_PAGE_TABLE_ISOLATION=y +CONFIG_MITIGATION_RETPOLINE=y +CONFIG_MITIGATION_RETHUNK=y +CONFIG_MITIGATION_UNRET_ENTRY=y +CONFIG_MITIGATION_CALL_DEPTH_TRACKING=y # CONFIG_CALL_THUNKS_DEBUG is not set -CONFIG_CPU_IBPB_ENTRY=y -CONFIG_CPU_IBRS_ENTRY=y -CONFIG_CPU_SRSO=y -# CONFIG_SLS is not set -# CONFIG_GDS_FORCE_MITIGATION is not set +CONFIG_MITIGATION_IBPB_ENTRY=y +CONFIG_MITIGATION_IBRS_ENTRY=y +CONFIG_MITIGATION_SRSO=y +# CONFIG_MITIGATION_SLS is not set +CONFIG_MITIGATION_GDS=y CONFIG_MITIGATION_RFDS=y CONFIG_MITIGATION_SPECTRE_BHI=y +CONFIG_MITIGATION_MDS=y +CONFIG_MITIGATION_TAA=y +CONFIG_MITIGATION_MMIO_STALE_DATA=y +CONFIG_MITIGATION_L1TF=y +CONFIG_MITIGATION_RETBLEED=y +CONFIG_MITIGATION_SPECTRE_V1=y +CONFIG_MITIGATION_SPECTRE_V2=y +CONFIG_MITIGATION_SRBDS=y +CONFIG_MITIGATION_SSB=y +CONFIG_MITIGATION_ITS=y +CONFIG_MITIGATION_TSA=y CONFIG_ARCH_HAS_ADD_PAGES=y # @@ -533,12 +550,14 @@ CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y # CONFIG_ACPI_FPDT is not set CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y +CONFIG_ACPI_EC=y # CONFIG_ACPI_EC_DEBUGFS is not set # CONFIG_ACPI_AC is not set CONFIG_ACPI_BATTERY=y @@ -555,7 +574,7 @@ CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y -CONFIG_ACPI_PLATFORM_PROFILE=m +CONFIG_ACPI_PLATFORM_PROFILE=y CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_TABLE_OVERRIDE_VIA_BUILTIN_INITRD is not set @@ -565,9 +584,9 @@ CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_IOAPIC=y # CONFIG_ACPI_SBS is not set # CONFIG_ACPI_HED is not set -# CONFIG_ACPI_CUSTOM_METHOD is not set # CONFIG_ACPI_BGRT is not set # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set +CONFIG_ACPI_NHLT=y # CONFIG_ACPI_NFIT is not set CONFIG_ACPI_NUMA=y # CONFIG_ACPI_HMAT is not set @@ -606,7 +625,8 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_PCC_CPUFREQ=m -# CONFIG_X86_AMD_PSTATE is not set +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 # CONFIG_X86_AMD_PSTATE_UT is not set CONFIG_X86_ACPI_CPUFREQ=y CONFIG_X86_ACPI_CPUFREQ_CPB=y @@ -619,6 +639,7 @@ CONFIG_X86_P4_CLOCKMOD=y # shared options # CONFIG_X86_SPEEDSTEP_LIB=y +CONFIG_CPUFREQ_ARCH_CUR_FREQ=y # end of CPU Frequency scaling # @@ -641,31 +662,56 @@ CONFIG_INTEL_IDLE=y CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_MMCONF_FAM10H=y -# CONFIG_PCI_CNB20LE_QUIRK is not set # CONFIG_ISA_BUS is not set CONFIG_ISA_DMA_API=y CONFIG_AMD_NB=y +CONFIG_AMD_NODE=y # end of Bus options (PCI etc.) # # Binary Emulations # -CONFIG_IA32_EMULATION=y +# CONFIG_IA32_EMULATION is not set # CONFIG_X86_X32_ABI is not set -CONFIG_COMPAT_32=y -CONFIG_COMPAT=y -CONFIG_COMPAT_FOR_U64_ALIGNMENT=y # end of Binary Emulations -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set +CONFIG_X86_REQUIRED_FEATURE_ALWAYS=y +CONFIG_X86_REQUIRED_FEATURE_NOPL=y +CONFIG_X86_REQUIRED_FEATURE_CX8=y +CONFIG_X86_REQUIRED_FEATURE_CMOV=y +CONFIG_X86_REQUIRED_FEATURE_CPUID=y +CONFIG_X86_REQUIRED_FEATURE_FPU=y +CONFIG_X86_REQUIRED_FEATURE_PAE=y +CONFIG_X86_REQUIRED_FEATURE_PSE=y +CONFIG_X86_REQUIRED_FEATURE_PGE=y +CONFIG_X86_REQUIRED_FEATURE_MSR=y +CONFIG_X86_REQUIRED_FEATURE_FXSR=y +CONFIG_X86_REQUIRED_FEATURE_XMM=y +CONFIG_X86_REQUIRED_FEATURE_XMM2=y +CONFIG_X86_REQUIRED_FEATURE_LM=y +CONFIG_X86_DISABLED_FEATURE_VME=y +CONFIG_X86_DISABLED_FEATURE_K6_MTRR=y +CONFIG_X86_DISABLED_FEATURE_CYRIX_ARR=y +CONFIG_X86_DISABLED_FEATURE_CENTAUR_MCR=y +CONFIG_X86_DISABLED_FEATURE_LA57=y +CONFIG_X86_DISABLED_FEATURE_LAM=y +CONFIG_X86_DISABLED_FEATURE_SGX=y +CONFIG_X86_DISABLED_FEATURE_XENPV=y +CONFIG_X86_DISABLED_FEATURE_TDX_GUEST=y +CONFIG_X86_DISABLED_FEATURE_USER_SHSTK=y +CONFIG_X86_DISABLED_FEATURE_FRED=y +CONFIG_X86_DISABLED_FEATURE_SEV_SNP=y CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y CONFIG_AS_TPAUSE=y CONFIG_AS_GFNI=y +CONFIG_AS_VAES=y +CONFIG_AS_VPCLMULQDQ=y CONFIG_AS_WRUSS=y CONFIG_ARCH_CONFIGURES_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -704,6 +750,7 @@ CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_ARCH_HAS_CPU_PASID=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y @@ -726,12 +773,11 @@ CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_ARCH_HAVE_EXTRA_ELF_NOTES=y CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y @@ -744,6 +790,8 @@ CONFIG_STACKPROTECTOR_STRONG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_AUTOFDO_CLANG=y +CONFIG_ARCH_SUPPORTS_PROPELLER_CLANG=y CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y @@ -761,6 +809,7 @@ CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_EXECMEM_ROX=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y @@ -768,11 +817,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 -CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 -CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_HAVE_OBJTOOL=y CONFIG_HAVE_JUMP_LABEL_HACK=y CONFIG_HAVE_NOINSTR_HACK=y @@ -780,9 +829,8 @@ CONFIG_HAVE_NOINSTR_VALIDATION=y CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -806,7 +854,10 @@ CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAS_ELFCORE_COMPAT=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y +CONFIG_ARCH_VMLINUX_NEEDS_RELOCS=y # # GCOV-based kernel profiling @@ -820,10 +871,11 @@ CONFIG_HAVE_GCC_PLUGINS=y CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT_16B=y CONFIG_FUNCTION_ALIGNMENT=16 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -833,10 +885,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -849,9 +898,9 @@ CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -924,7 +973,6 @@ CONFIG_FREEZER=y # Executable file formats # CONFIG_BINFMT_ELF=y -CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=y @@ -939,18 +987,19 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -960,14 +1009,16 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_WANT_HUGETLB_VMEMMAP_PREINIT=y +CONFIG_HAVE_GUP_FAST=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -983,17 +1034,24 @@ CONFIG_MMU_NOTIFIER=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y # CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PUD_PFNMAP=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=19 @@ -1007,9 +1065,11 @@ CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_HMM_MIRROR=y +CONFIG_GET_FREE_REGION=y CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y +CONFIG_ARCH_USES_PG_ARCH_2=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -1023,9 +1083,16 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_IOMMU_MM_DATA=y +CONFIG_EXECMEM=y +CONFIG_NUMA_MEMBLKS=y +# CONFIG_NUMA_EMU is not set +CONFIG_ARCH_SUPPORTS_PT_RECLAIM=y +CONFIG_PT_RECLAIM=y # # Data Access Monitoring @@ -1035,11 +1102,11 @@ CONFIG_LOCK_MM_AND_FIND_VMA=y # end of Memory Management options CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -1047,20 +1114,19 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set CONFIG_XFRM=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y -# CONFIG_XFRM_USER_COMPAT is not set # CONFIG_XFRM_INTERFACE is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -1115,6 +1181,7 @@ CONFIG_TCP_CONG_CDG=m CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -1130,7 +1197,8 @@ CONFIG_IPV6_SIT=m CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1190,13 +1258,13 @@ CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1204,6 +1272,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1215,11 +1284,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1274,7 +1345,24 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1328,6 +1416,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1349,13 +1438,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1377,7 +1468,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1385,8 +1476,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1524,6 +1615,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y CONFIG_BT_HCIBTUSB_MTK=y CONFIG_BT_HCIBTUSB_RTL=y @@ -1542,6 +1634,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m # CONFIG_BT_HCIBCM4377 is not set CONFIG_BT_HCIBPA10X=m @@ -1554,6 +1647,7 @@ CONFIG_BT_MTKSDIO=m CONFIG_BT_MTKUART=m # CONFIG_BT_VIRTIO is not set # CONFIG_BT_NXPUART is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1564,7 +1658,6 @@ CONFIG_WIRELESS=y CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set @@ -1576,12 +1669,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set # CONFIG_CFG80211_CRDA_SUPPORT is not set CONFIG_CFG80211_WEXT=y -CONFIG_CFG80211_WEXT_EXPORT=y -CONFIG_LIB80211=m -CONFIG_LIB80211_CRYPT_WEP=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1589,7 +1676,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1617,9 +1703,8 @@ CONFIG_ETHTOOL_NETLINK=y # # Device Drivers # -CONFIG_HAVE_EISA=y -# CONFIG_EISA is not set CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y @@ -1639,10 +1724,13 @@ CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set CONFIG_PCI_ATS=y +# CONFIG_PCI_DOE is not set CONFIG_PCI_LOCKLESS_CONFIG=y # CONFIG_PCI_IOV is not set +# CONFIG_PCI_NPEM is not set CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y +# CONFIG_PCIE_TPH is not set CONFIG_PCI_LABEL=y # CONFIG_PCIE_BUS_TUNE_OFF is not set CONFIG_PCIE_BUS_DEFAULT=y @@ -1674,6 +1762,11 @@ CONFIG_VMD=y # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1688,6 +1781,7 @@ CONFIG_VMD=y # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +# CONFIG_PCI_PWRCTL_SLOT is not set # CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1721,6 +1815,7 @@ CONFIG_WANT_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y @@ -1784,12 +1879,18 @@ CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y # CONFIG_EFI_COCO_SECRET is not set # end of EFI (Extensible Firmware Interface) Support +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set # CONFIG_MTD is not set # CONFIG_OF is not set @@ -1807,6 +1908,7 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_FD is not set CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_DRBD is not set @@ -1830,7 +1932,7 @@ CONFIG_NVME_MULTIPATH=y CONFIG_NVME_HWMON=y # CONFIG_NVME_FC is not set # CONFIG_NVME_TCP is not set -# CONFIG_NVME_AUTH is not set +# CONFIG_NVME_HOST_AUTH is not set # CONFIG_NVME_TARGET is not set # end of NVME Support @@ -1841,6 +1943,7 @@ CONFIG_NVME_HWMON=y # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -1858,35 +1961,30 @@ CONFIG_NVME_HWMON=y # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_MISC_RTSX=y +# CONFIG_NTSYNC is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_IDT_89HPESX is not set CONFIG_EEPROM_EE1004=y # end of EEPROM support # CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_I2C is not set CONFIG_ALTERA_STAPL=m -# CONFIG_INTEL_MEI is not set -# CONFIG_INTEL_MEI_ME is not set -# CONFIG_INTEL_MEI_TXE is not set -# CONFIG_INTEL_MEI_HDCP is not set -# CONFIG_INTEL_MEI_PXP is not set -# CONFIG_INTEL_MEI_GSC_PROXY is not set +CONFIG_INTEL_MEI=m +CONFIG_INTEL_MEI_ME=m +CONFIG_INTEL_MEI_TXE=m +CONFIG_INTEL_MEI_GSC=m +CONFIG_INTEL_MEI_HDCP=m +CONFIG_INTEL_MEI_PXP=m +CONFIG_INTEL_MEI_GSC_PROXY=m # CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set # CONFIG_ECHO is not set @@ -1897,6 +1995,7 @@ CONFIG_MISC_RTSX_USB=y # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -2120,6 +2219,7 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set @@ -2153,6 +2253,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set CONFIG_NETCONSOLE=y @@ -2165,6 +2266,8 @@ CONFIG_TUN=y CONFIG_VETH=m CONFIG_VIRTIO_NET=y CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set # CONFIG_ARCNET is not set CONFIG_ETHERNET=y CONFIG_MDIO=y @@ -2234,9 +2337,13 @@ CONFIG_ULI526X=y CONFIG_NET_VENDOR_EZCHIP=y # CONFIG_NET_VENDOR_FUNGIBLE is not set # CONFIG_NET_VENDOR_GOOGLE is not set +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIBMCGE is not set # CONFIG_NET_VENDOR_HUAWEI is not set CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y +CONFIG_LIBETH=y +CONFIG_LIBIE=y CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y @@ -2250,9 +2357,10 @@ CONFIG_IXGBE_HWMON=y # CONFIG_I40E is not set # CONFIG_I40EVF is not set CONFIG_ICE=y -CONFIG_ICE_HWTS=y +CONFIG_ICE_HWMON=y # CONFIG_FM10K is not set CONFIG_IGC=y +# CONFIG_IDPF is not set CONFIG_JME=y # CONFIG_NET_VENDOR_LITEX is not set CONFIG_NET_VENDOR_MARVELL=y @@ -2263,7 +2371,9 @@ CONFIG_SKGE_GENESIS=y CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set # CONFIG_OCTEON_EP is not set +# CONFIG_OCTEON_EP_VF is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set CONFIG_NET_VENDOR_MICROCHIP=y CONFIG_LAN743X=y @@ -2299,6 +2409,7 @@ CONFIG_8139TOO=y # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=y +# CONFIG_RTASE is not set CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y # CONFIG_NET_VENDOR_SAMSUNG is not set @@ -2331,7 +2442,6 @@ CONFIG_VIA_VELOCITY=y # CONFIG_NET_VENDOR_XILINX is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -2342,6 +2452,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set CONFIG_AMD_PHY=y # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2377,9 +2488,13 @@ CONFIG_MARVELL_PHY=y # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=y CONFIG_AT803X_PHY=y +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set # CONFIG_SMSC_PHY is not set @@ -2391,6 +2506,7 @@ CONFIG_REALTEK_PHY=y # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_PSE_CONTROLLER is not set @@ -2484,7 +2600,6 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m CONFIG_ATH9K_PCI=y CONFIG_ATH9K_AHB=y -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -2512,14 +2627,13 @@ CONFIG_ATH10K_PCI=m CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y # CONFIG_ATH10K_TRACING is not set CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set # CONFIG_ATH11K is not set # CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y -CONFIG_ATMEL=m -CONFIG_PCI_ATMEL=m # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set @@ -2534,8 +2648,6 @@ CONFIG_BRCMFMAC_USB=y CONFIG_BRCMFMAC_PCIE=y # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -# CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IPW2100=m CONFIG_IPW2100_MONITOR=y @@ -2562,6 +2674,7 @@ CONFIG_IWLWIFI=m CONFIG_IWLWIFI_LEDS=y CONFIG_IWLDVM=m CONFIG_IWLMVM=m +CONFIG_IWLMLD=m CONFIG_IWLWIFI_OPMODE_MODULAR=y # @@ -2572,12 +2685,6 @@ CONFIG_IWLWIFI_DEVICE_TRACING=y # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -# CONFIG_HOSTAP_PLX is not set -# CONFIG_HOSTAP_PCI is not set -# CONFIG_HERMES is not set CONFIG_P54_COMMON=m CONFIG_P54_USB=m CONFIG_P54_PCI=m @@ -2620,10 +2727,12 @@ CONFIG_MT7663U=m # CONFIG_MT7663S is not set CONFIG_MT7915E=m CONFIG_MT7921_COMMON=m -# CONFIG_MT7921E is not set +CONFIG_MT7921E=m # CONFIG_MT7921S is not set CONFIG_MT7921U=m # CONFIG_MT7996E is not set +# CONFIG_MT7925E is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WLAN_VENDOR_PURELIFI is not set @@ -2670,10 +2779,13 @@ CONFIG_RTL8188EE=m CONFIG_RTL8192EE=m CONFIG_RTL8821AE=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m CONFIG_RTLWIFI=m CONFIG_RTLWIFI_PCI=m +CONFIG_RTLWIFI_USB=m # CONFIG_RTLWIFI_DEBUG is not set CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8723_COMMON=m CONFIG_RTLBTCOEXIST=m CONFIG_RTL8XXXU=m @@ -2684,8 +2796,13 @@ CONFIG_RTW88_PCI=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m CONFIG_RTW88_8822BE=m # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m @@ -2694,25 +2811,34 @@ CONFIG_RTW88_8822CE=m CONFIG_RTW88_8822CU=m CONFIG_RTW88_8723DE=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m CONFIG_RTW88_8821CE=m # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +# CONFIG_RTW88_8814AE is not set +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y CONFIG_RTW89=m CONFIG_RTW89_CORE=m CONFIG_RTW89_PCI=m CONFIG_RTW89_8851B=m CONFIG_RTW89_8852A=m +CONFIG_RTW89_8852B_COMMON=m CONFIG_RTW89_8852B=m CONFIG_RTW89_8852C=m +CONFIG_RTW89_8922A=m CONFIG_RTW89_8851BE=m CONFIG_RTW89_8852AE=m CONFIG_RTW89_8852BE=m +# CONFIG_RTW89_8852BTE is not set CONFIG_RTW89_8852CE=m +CONFIG_RTW89_8922AE=m # CONFIG_RTW89_DEBUGMSG is not set -# CONFIG_RTW89_DEBUGFS is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set # CONFIG_WLAN_VENDOR_SILABS is not set @@ -2724,11 +2850,9 @@ CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2764,7 +2888,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2786,7 +2909,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2851,6 +2973,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_AD7879 is not set @@ -2862,7 +2985,6 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set @@ -2871,6 +2993,7 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -2884,7 +3007,6 @@ CONFIG_TOUCHSCREEN_ELAN=y # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set @@ -2978,7 +3100,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F3A is not set +CONFIG_RMI4_F3A=y # CONFIG_RMI4_F55 is not set # @@ -3009,7 +3131,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -3043,6 +3164,7 @@ CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_LPSS is not set CONFIG_SERIAL_8250_MID=y # CONFIG_SERIAL_8250_PERICOM is not set +# CONFIG_SERIAL_8250_NI is not set # # Non-8250 serial port support @@ -3100,7 +3222,6 @@ CONFIG_DEVPORT=y CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=m @@ -3133,18 +3254,19 @@ CONFIG_I2C_CCGX_UCSI=m # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_AMD_ASF is not set CONFIG_I2C_I801=y CONFIG_I2C_ISCH=y # CONFIG_I2C_ISMT is not set CONFIG_I2C_PIIX4=y CONFIG_I2C_NFORCE2=y -# CONFIG_I2C_NFORCE2_S4985 is not set CONFIG_I2C_NVIDIA_GPU=m # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set CONFIG_I2C_VIA=y CONFIG_I2C_VIAPRO=y +# CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers @@ -3204,10 +3326,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -3219,8 +3338,10 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # CONFIG_PTP_1588_CLOCK_KVM=y +CONFIG_PTP_1588_CLOCK_VMCLOCK=m # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_VMW is not set # end of PTP clock support @@ -3242,6 +3363,7 @@ CONFIG_PINCTRL_BAYTRAIL=y CONFIG_PINCTRL_CHERRYVIEW=y CONFIG_PINCTRL_LYNXPOINT=y CONFIG_PINCTRL_INTEL=y +CONFIG_PINCTRL_INTEL_PLATFORM=y CONFIG_PINCTRL_ALDERLAKE=y CONFIG_PINCTRL_BROXTON=y CONFIG_PINCTRL_CANNONLAKE=y @@ -3255,6 +3377,7 @@ CONFIG_PINCTRL_JASPERLAKE=y CONFIG_PINCTRL_LAKEFIELD=y CONFIG_PINCTRL_LEWISBURG=y CONFIG_PINCTRL_METEORLAKE=y +CONFIG_PINCTRL_METEORPOINT=y CONFIG_PINCTRL_SUNRISEPOINT=y CONFIG_PINCTRL_TIGERLAKE=y # end of Intel pinctrl drivers @@ -3276,11 +3399,15 @@ CONFIG_GPIO_CDEV_V1=y # # Memory mapped GPIO drivers # +# CONFIG_GPIO_ALTERA is not set # CONFIG_GPIO_AMDPT is not set # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRANITERAPIDS is not set # CONFIG_GPIO_MB86S7X is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set +# CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers @@ -3328,6 +3455,7 @@ CONFIG_GPIO_CDEV_V1=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -3340,8 +3468,16 @@ CONFIG_GPIO_CDEV_V1=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set # CONFIG_POWER_RESET is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -3357,8 +3493,8 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set -# CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set @@ -3382,6 +3518,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_RT9471 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y CONFIG_HWMON_VID=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3393,7 +3530,6 @@ CONFIG_HWMON_VID=y # CONFIG_SENSORS_ABITUGURU3 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3409,13 +3545,15 @@ CONFIG_HWMON_VID=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_K8TEMP=m CONFIG_SENSORS_K10TEMP=m CONFIG_SENSORS_FAM15H_POWER=m -# CONFIG_SENSORS_APPLESMC is not set +CONFIG_SENSORS_APPLESMC=m # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -3427,21 +3565,27 @@ CONFIG_SENSORS_FAM15H_POWER=m # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FSCHMD is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_I5500 is not set CONFIG_SENSORS_CORETEMP=y +# CONFIG_SENSORS_ISL28022 is not set CONFIG_SENSORS_IT87=m CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LENOVO_EC is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -3449,6 +3593,7 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set @@ -3460,7 +3605,6 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -3489,14 +3633,17 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_OXP is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set # CONFIG_SENSORS_SHT15 is not set @@ -3521,6 +3668,7 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3557,9 +3705,10 @@ CONFIG_SENSORS_ATK0110=m CONFIG_THERMAL=y CONFIG_THERMAL_NETLINK=y CONFIG_THERMAL_STATISTICS=y +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3567,6 +3716,7 @@ CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_STEP_WISE=y # CONFIG_THERMAL_GOV_BANG_BANG is not set CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_PCIE_THERMAL=y # CONFIG_THERMAL_EMULATION is not set # @@ -3622,6 +3772,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CGBC is not set # CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set @@ -3652,6 +3803,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set @@ -3663,7 +3815,6 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_MENF21BMC is not set # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set @@ -3700,7 +3851,10 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_MFD_CS40L50_I2C is not set # CONFIG_RAVE_SP_CORE is not set +# CONFIG_MFD_QNAP_MCU is not set +# CONFIG_MFD_UPBOARD_FPGA is not set # end of Multifunction device drivers CONFIG_REGULATOR=y @@ -3708,6 +3862,7 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_FIXED_VOLTAGE is not set # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3725,6 +3880,7 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -3736,6 +3892,7 @@ CONFIG_REGULATOR=y # CONFIG_REGULATOR_MP8859 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PV88060 is not set # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set @@ -3795,6 +3952,7 @@ CONFIG_RC_ATI_REMOTE=m # CONFIG_RC_LOOPBACK is not set CONFIG_RC_XBOX_DVD=m CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y # # CEC support @@ -4029,6 +4187,8 @@ CONFIG_DVB_BUDGET=m CONFIG_DVB_BUDGET_CI=m CONFIG_DVB_BUDGET_AV=m CONFIG_VIDEO_IPU3_CIO2=m +# CONFIG_VIDEO_INTEL_IPU6 is not set +# CONFIG_INTEL_VSC is not set # CONFIG_IPU_BRIDGE is not set CONFIG_RADIO_ADAPTERS=m CONFIG_RADIO_MAXIRADIO=m @@ -4103,6 +4263,10 @@ CONFIG_MEDIA_PLATFORM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -4115,6 +4279,11 @@ CONFIG_MEDIA_PLATFORM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -4197,7 +4366,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=m CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -4206,12 +4380,14 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set # CONFIG_VIDEO_IMX355 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -4236,6 +4412,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -4256,6 +4433,12 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -4312,6 +4495,7 @@ CONFIG_VIDEO_ADV7180=m # CONFIG_VIDEO_BT819 is not set # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_LT6911UXE is not set # CONFIG_VIDEO_KS0127 is not set # CONFIG_VIDEO_ML86V7667 is not set # CONFIG_VIDEO_SAA7110 is not set @@ -4322,6 +4506,7 @@ CONFIG_VIDEO_SAA711X=m # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -4599,8 +4784,7 @@ CONFIG_DVB_DUMMY_FE=m # CONFIG_APERTURE_HELPERS=y CONFIG_SCREEN_INFO=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_AGP=y # CONFIG_AGP_AMD64 is not set @@ -4613,35 +4797,42 @@ CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_DSC_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -CONFIG_DRM_DP_AUX_CHARDEV=y -CONFIG_DRM_DP_CEC=y CONFIG_DRM_TTM=y CONFIG_DRM_EXEC=y +CONFIG_DRM_GPUVM=m CONFIG_DRM_BUDDY=y CONFIG_DRM_TTM_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SUBALLOC_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4653,6 +4844,7 @@ CONFIG_DRM_AMDGPU=y CONFIG_DRM_AMDGPU_SI=y CONFIG_DRM_AMDGPU_CIK=y CONFIG_DRM_AMDGPU_USERPTR=y +# CONFIG_DRM_AMD_ISP is not set # CONFIG_DRM_AMDGPU_WERROR is not set # @@ -4677,11 +4869,13 @@ CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y +CONFIG_DRM_I915_PXP=y # # drm/i915 Debugging # # CONFIG_DRM_I915_WERROR is not set +# CONFIG_DRM_I915_REPLAY_GPU_HANGS_API is not set # CONFIG_DRM_I915_DEBUG is not set # CONFIG_DRM_I915_DEBUG_MMIO is not set # CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set @@ -4691,6 +4885,7 @@ CONFIG_DRM_I915_USERPTR=y # CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set # CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set # CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set +# CONFIG_DRM_I915_DEBUG_WAKEREF is not set # end of drm/i915 Debugging # @@ -4707,6 +4902,37 @@ CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 # end of drm/i915 Profile Guided Optimisation +CONFIG_DRM_XE=m +CONFIG_DRM_XE_DISPLAY=y +CONFIG_DRM_XE_DEVMEM_MIRROR=y +CONFIG_DRM_XE_FORCE_PROBE="" + +# +# drm/Xe Debugging +# +# CONFIG_DRM_XE_WERROR is not set +# CONFIG_DRM_XE_DEBUG is not set +# CONFIG_DRM_XE_DEBUG_VM is not set +# CONFIG_DRM_XE_DEBUG_MEMIRQ is not set +# CONFIG_DRM_XE_DEBUG_SRIOV is not set +# CONFIG_DRM_XE_DEBUG_MEM is not set +# CONFIG_DRM_XE_LARGE_GUC_BUFFER is not set +# CONFIG_DRM_XE_USERPTR_INVAL_INJECT is not set +# end of drm/Xe Debugging + +# +# drm/xe Profile Guided Optimisation +# +CONFIG_DRM_XE_JOB_TIMEOUT_MAX=10000 +CONFIG_DRM_XE_JOB_TIMEOUT_MIN=1 +CONFIG_DRM_XE_TIMESLICE_MAX=10000000 +CONFIG_DRM_XE_TIMESLICE_MIN=1 +CONFIG_DRM_XE_PREEMPT_TIMEOUT=640000 +CONFIG_DRM_XE_PREEMPT_TIMEOUT_MAX=10000000 +CONFIG_DRM_XE_PREEMPT_TIMEOUT_MIN=1 +CONFIG_DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT=y +# end of drm/xe Profile Guided Optimisation + # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set CONFIG_DRM_VMWGFX=y @@ -4732,11 +4958,13 @@ CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # +# CONFIG_DRM_I2C_NXP_TDA998X is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set # end of Display Interface Bridges -# CONFIG_DRM_LOONGSON is not set # CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set @@ -4744,7 +4972,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_VBOXVIDEO is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +CONFIG_DRM_PANEL_BACKLIGHT_QUIRKS=y +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -4768,7 +4997,6 @@ CONFIG_FB_EFI=y # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set -# CONFIG_FB_LE80578 is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set @@ -4806,7 +5034,7 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y @@ -4822,12 +5050,14 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_APPLE is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set @@ -4855,6 +5085,7 @@ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # end of Graphics support CONFIG_DRM_ACCEL=y +# CONFIG_DRM_ACCEL_AMDXDNA is not set # CONFIG_DRM_ACCEL_HABANALABS is not set # CONFIG_DRM_ACCEL_IVPU is not set CONFIG_SOUND=y @@ -4875,10 +5106,10 @@ CONFIG_SND_MAX_CARDS=32 # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set CONFIG_SND_VMASTER=y CONFIG_SND_DMA_SGBUF=y CONFIG_SND_CTL_LED=m @@ -4972,6 +5203,7 @@ CONFIG_SND_HDA_RECONFIG=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=1 CONFIG_SND_HDA_PATCH_LOADER=y +CONFIG_SND_HDA_SCODEC_COMPONENT=m # CONFIG_SND_HDA_SCODEC_CS35L41_I2C is not set # CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set # CONFIG_SND_HDA_SCODEC_TAS2781_I2C is not set @@ -4983,6 +5215,7 @@ CONFIG_SND_HDA_CODEC_HDMI=m CONFIG_SND_HDA_CODEC_CIRRUS=m # CONFIG_SND_HDA_CODEC_CS8409 is not set CONFIG_SND_HDA_CODEC_CONEXANT=m +# CONFIG_SND_HDA_CODEC_SENARYTECH is not set CONFIG_SND_HDA_CODEC_CA0110=m CONFIG_SND_HDA_CODEC_CA0132=m CONFIG_SND_HDA_CODEC_CA0132_DSP=y @@ -5047,6 +5280,7 @@ CONFIG_SND_SOC_AMD_RENOIR_MACH=m CONFIG_SND_AMD_ACP_CONFIG=m # CONFIG_SND_SOC_AMD_ACP_COMMON is not set # CONFIG_SND_SOC_AMD_RPL_ACP6x is not set +CONFIG_SND_SOC_AMD_ACP63_TOPLEVEL=m # CONFIG_SND_SOC_AMD_PS is not set # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_BCM63XX_I2S_WHISTLER is not set @@ -5072,26 +5306,20 @@ CONFIG_SND_AMD_ACP_CONFIG=m # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y -CONFIG_SND_SOC_INTEL_SST=m # CONFIG_SND_SOC_INTEL_CATPT is not set CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI=m CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m -CONFIG_SND_SOC_INTEL_SKYLAKE=m -CONFIG_SND_SOC_INTEL_SKL=m -CONFIG_SND_SOC_INTEL_APL=m -CONFIG_SND_SOC_INTEL_KBL=m -CONFIG_SND_SOC_INTEL_GLK=m -CONFIG_SND_SOC_INTEL_CNL=m -CONFIG_SND_SOC_INTEL_CFL=m -CONFIG_SND_SOC_INTEL_CML_H=m -CONFIG_SND_SOC_INTEL_CML_LP=m -CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=m -CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=y -CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m CONFIG_SND_SOC_ACPI_INTEL_MATCH=m +CONFIG_SND_SOC_ACPI_INTEL_SDCA_QUIRKS=m CONFIG_SND_SOC_INTEL_AVS=m # @@ -5110,10 +5338,12 @@ CONFIG_SND_SOC_INTEL_AVS=m # CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98357A is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98373 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_NAU8825 is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_PCM3168A is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_PROBE is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_RT274 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_RT286 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_RT298 is not set +# CONFIG_SND_SOC_INTEL_AVS_MACH_RT5514 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_RT5663 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_RT5682 is not set # CONFIG_SND_SOC_INTEL_AVS_MACH_SSM4567 is not set @@ -5121,7 +5351,6 @@ CONFIG_SND_SOC_INTEL_AVS=m CONFIG_SND_SOC_INTEL_MACH=y # CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set -CONFIG_SND_SOC_INTEL_HDA_DSP_COMMON=m CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m @@ -5132,17 +5361,9 @@ CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m -# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set -# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH is not set -# CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH is not set -CONFIG_SND_SOC_INTEL_SKL_HDA_DSP_GENERIC_MACH=m # CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SDCA=m +CONFIG_SND_SOC_SDCA_OPTIONAL=m # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -5161,6 +5382,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set CONFIG_SND_SOC_ADAU7002=m @@ -5171,13 +5393,18 @@ CONFIG_SND_SOC_ADAU7002=m # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -5195,6 +5422,7 @@ CONFIG_SND_SOC_ADAU7002=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -5204,21 +5432,22 @@ CONFIG_SND_SOC_ADAU7002=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set CONFIG_SND_SOC_CX2072X=m CONFIG_SND_SOC_DA7213=m CONFIG_SND_SOC_DA7219=m CONFIG_SND_SOC_DMIC=m # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +CONFIG_SND_SOC_ES83XX_DSM_COMMON=m +# CONFIG_SND_SOC_ES8311 is not set CONFIG_SND_SOC_ES8316=m +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_GTM601 is not set -CONFIG_SND_SOC_HDAC_HDMI=m -CONFIG_SND_SOC_HDAC_HDA=m CONFIG_SND_SOC_HDA=m # CONFIG_SND_SOC_ICS43432 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98357A=m @@ -5240,7 +5469,7 @@ CONFIG_SND_SOC_MAX98927=m # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_PCM6240 is not set CONFIG_SND_SOC_RL6231=m # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set @@ -5252,10 +5481,12 @@ CONFIG_SND_SOC_RT5670=m CONFIG_SND_SOC_RT5682=m CONFIG_SND_SOC_RT5682_I2C=m # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=m # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -5289,6 +5520,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -5314,6 +5546,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_WM8985 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -5322,6 +5555,8 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set CONFIG_SND_SOC_NAU8824=m +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -5350,6 +5585,8 @@ CONFIG_HID_A4TECH=y # CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=y CONFIG_HID_APPLEIR=m +# CONFIG_HID_APPLETB_BL is not set +# CONFIG_HID_APPLETB_KBD is not set CONFIG_HID_ASUS=y CONFIG_HID_AUREAL=y CONFIG_HID_BELKIN=y @@ -5383,6 +5620,7 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -5419,7 +5657,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -5457,6 +5694,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -5469,17 +5707,8 @@ CONFIG_HID_ALPS=m # # HID-BPF support # -# CONFIG_HID_BPF is not set # end of HID-BPF support -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -CONFIG_USB_HIDDEV=y -# end of USB HID support - CONFIG_I2C_HID=y CONFIG_I2C_HID_ACPI=y # CONFIG_I2C_HID_OF is not set @@ -5497,6 +5726,20 @@ CONFIG_I2C_HID_CORE=y # CONFIG_AMD_SFH_HID is not set # end of AMD SFH HID Support +# +# Intel THC HID Support +# +# CONFIG_INTEL_THC_HID is not set +# end of Intel THC HID Support + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +CONFIG_USB_HIDDEV=y +# end of USB HID support + CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -5506,6 +5749,7 @@ CONFIG_USB_COMMON=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +CONFIG_USB_PCI_AMD=y # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -5519,6 +5763,7 @@ CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=m # @@ -5558,11 +5803,7 @@ CONFIG_USB_ACM=m # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -5669,6 +5910,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LJCA is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -5707,13 +5949,19 @@ CONFIG_TYPEC=m # CONFIG_TYPEC_MUX_FSA4480 is not set # CONFIG_TYPEC_MUX_GPIO_SBU is not set # CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_MUX_IT5205 is not set # CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PS883X is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_TUSB1046 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # # CONFIG_TYPEC_DP_ALTMODE is not set +# CONFIG_TYPEC_TBT_ALTMODE is not set # end of USB Type-C Alternate Mode drivers # CONFIG_USB_ROLE_SWITCH is not set @@ -5729,6 +5977,7 @@ CONFIG_MMC_BLOCK_MINORS=32 # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_UHS2=y CONFIG_MMC_SDHCI_PCI=y # CONFIG_MMC_RICOH_MMC is not set CONFIG_MMC_SDHCI_ACPI=y @@ -5802,6 +6051,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y # # RGB LED drivers # +# CONFIG_LEDS_KTD202X is not set # # LED Triggers @@ -5814,6 +6064,7 @@ CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # @@ -5824,11 +6075,11 @@ CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -CONFIG_LEDS_TRIGGER_AUDIO=m # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5864,6 +6115,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set @@ -5878,12 +6130,14 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5943,6 +6197,7 @@ CONFIG_INTEL_IOATDMA=m # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_AMD_PTDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=m @@ -5984,7 +6239,6 @@ CONFIG_UIO=y # CONFIG_UIO_SERCOS3 is not set # CONFIG_UIO_PCI_GENERIC is not set # CONFIG_UIO_NETX is not set -# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set @@ -5994,12 +6248,14 @@ CONFIG_VIRTIO_PCI_LIB=y CONFIG_VIRTIO_PCI_LIB_LEGACY=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_ADMIN_LEGACY=y CONFIG_VIRTIO_PCI_LEGACY=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set CONFIG_VIRTIO_DMA_SHARED_BUFFER=y +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set # CONFIG_VHOST_MENU is not set @@ -6012,33 +6268,27 @@ CONFIG_VIRTIO_DMA_SHARED_BUFFER=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -CONFIG_RTL8192U=m -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -CONFIG_R8712U=m -CONFIG_RTS5208=y -# CONFIG_VT6655 is not set -CONFIG_VT6656=m # CONFIG_FB_SM750 is not set CONFIG_STAGING_MEDIA=y # CONFIG_INTEL_ATOMISP is not set CONFIG_DVB_AV7110_IR=y CONFIG_DVB_AV7110=m CONFIG_DVB_AV7110_OSD=y -CONFIG_DVB_BUDGET_PATCH=m CONFIG_DVB_SP8870=m CONFIG_VIDEO_IPU3_IMGU=m + +# +# StarFive media platform drivers +# CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_LTE_GDM724X is not set -# CONFIG_KS7010 is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_QLGE is not set # CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set +# CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_SURFACE_PLATFORMS=y @@ -6059,10 +6309,17 @@ CONFIG_WMI_BMOF=y # CONFIG_ACERHDF is not set # CONFIG_ACER_WIRELESS is not set # CONFIG_ACER_WMI is not set -CONFIG_AMD_PMF=m -# CONFIG_AMD_PMF_DEBUG is not set + +# +# AMD HSMP Driver +# +# CONFIG_AMD_HSMP_ACPI is not set +# CONFIG_AMD_HSMP_PLAT is not set +# end of AMD HSMP Driver + # CONFIG_AMD_PMC is not set -# CONFIG_AMD_HSMP is not set +# CONFIG_AMD_3D_VCACHE is not set +# CONFIG_AMD_WBRF is not set # CONFIG_ADV_SWBUTTON is not set # CONFIG_APPLE_GMUX is not set # CONFIG_ASUS_LAPTOP is not set @@ -6077,7 +6334,7 @@ CONFIG_AMD_PMF=m # CONFIG_WIRELESS_HOTKEY is not set # CONFIG_IBM_RTL is not set # CONFIG_IDEAPAD_LAPTOP is not set -# CONFIG_LENOVO_YMC is not set +# CONFIG_LENOVO_WMI_HOTKEY_UTILITIES is not set # CONFIG_SENSORS_HDAPS is not set # CONFIG_THINKPAD_ACPI is not set # CONFIG_THINKPAD_LMI is not set @@ -6086,7 +6343,6 @@ CONFIG_INTEL_ATOMISP2_PM=y # CONFIG_INTEL_IFS is not set # CONFIG_INTEL_SAR_INT1092 is not set # CONFIG_INTEL_SKL_INT3472 is not set -# CONFIG_INTEL_PMC_CORE is not set # # Intel Speed Select Technology interface support @@ -6112,11 +6368,15 @@ CONFIG_INTEL_ATOMISP2_PM=y # CONFIG_INTEL_SMARTCONNECT is not set # CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_INTEL_VSEC is not set +# CONFIG_ACPI_QUICKSTART is not set +# CONFIG_MEEGOPAD_ANX7428 is not set # CONFIG_MSI_EC is not set # CONFIG_MSI_LAPTOP is not set # CONFIG_MSI_WMI is not set +# CONFIG_MSI_WMI_PLATFORM is not set # CONFIG_PCENGINES_APU2 is not set # CONFIG_BARCO_P50_GPIO is not set +# CONFIG_SAMSUNG_GALAXYBOOK is not set # CONFIG_SAMSUNG_LAPTOP is not set # CONFIG_SAMSUNG_Q10 is not set # CONFIG_TOSHIBA_BT_RFKILL is not set @@ -6129,11 +6389,14 @@ CONFIG_INTEL_ATOMISP2_PM=y # CONFIG_SONY_LAPTOP is not set # CONFIG_SYSTEM76_ACPI is not set # CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_MLX_PLATFORM is not set +# CONFIG_SERIAL_MULTI_INSTANTIATE is not set +# CONFIG_INSPUR_PLATFORM_PROFILE is not set +# CONFIG_LENOVO_WMI_CAMERA is not set # CONFIG_INTEL_IPS is not set # CONFIG_INTEL_SCU_PCI is not set # CONFIG_INTEL_SCU_PLATFORM is not set # CONFIG_SIEMENS_SIMATIC_IPC is not set +# CONFIG_SILICOM_PLATFORM is not set # CONFIG_WINMATE_FM07_KEYS is not set # CONFIG_SEL3350_PLATFORM is not set CONFIG_P2SB=y @@ -6175,8 +6438,8 @@ CONFIG_IOMMU_IO_PGTABLE=y CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y CONFIG_IOMMU_DMA=y CONFIG_IOMMU_SVA=y +CONFIG_IOMMU_IOPF=y CONFIG_AMD_IOMMU=y -CONFIG_AMD_IOMMU_V2=y CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y CONFIG_INTEL_IOMMU_SVM=y @@ -6252,6 +6515,31 @@ CONFIG_IRQ_REMAP=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set @@ -6266,6 +6554,7 @@ CONFIG_IRQ_REMAP=y # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6297,6 +6586,7 @@ CONFIG_IDLE_INJECT=y # # Performance monitor support # +# CONFIG_DWC_PCIE_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -6312,14 +6602,7 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y - -# -# Layout Types -# -# CONFIG_NVMEM_LAYOUT_SL28_VPD is not set -# CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set -# end of Layout Types - +# CONFIG_NVMEM_LAYOUTS is not set # CONFIG_NVMEM_RMEM is not set # @@ -6338,6 +6621,7 @@ CONFIG_NVMEM_SYSFS=y # CONFIG_MOST is not set # CONFIG_PECI is not set # CONFIG_HTE is not set +CONFIG_DPLL=y # end of Device Drivers # @@ -6346,6 +6630,7 @@ CONFIG_NVMEM_SYSFS=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6358,7 +6643,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6377,10 +6661,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=y CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=y @@ -6391,6 +6675,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6401,11 +6686,14 @@ CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set # CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m # CONFIG_CUSE is not set # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6419,9 +6707,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -6445,11 +6733,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6510,7 +6798,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6560,6 +6847,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6627,6 +6915,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y CONFIG_KEYS_REQUEST_CACHE=y # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -6634,11 +6923,10 @@ CONFIG_KEY_DH_OPERATIONS=y CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_FORCE_PTRACE is not set # CONFIG_PROC_MEM_NO_FORCE is not set +CONFIG_MSEAL_SYSTEM_MAPPINGS=y # CONFIG_SECURITY is not set CONFIG_SECURITYFS=y # CONFIG_INTEL_TXT is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set CONFIG_DEFAULT_SECURITY_DAC=y @@ -6663,6 +6951,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6708,6 +7003,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_SIMD=y # end of Crypto core or helper @@ -6722,7 +7018,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -6754,14 +7049,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=m CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # end of Length-preserving ciphers and modes @@ -6797,7 +7089,6 @@ CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=y @@ -6808,7 +7099,6 @@ CONFIG_CRYPTO_XXHASH=y # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -6832,7 +7122,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6884,8 +7176,6 @@ CONFIG_CRYPTO_SHA256_SSSE3=y CONFIG_CRYPTO_SHA512_SSSE3=y # CONFIG_CRYPTO_SM3_AVX_X86_64 is not set # CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set -# CONFIG_CRYPTO_CRC32C_INTEL is not set -# CONFIG_CRYPTO_CRC32_PCLMUL is not set # end of Accelerated Cryptographic Algorithms for CPU (x86) # CONFIG_CRYPTO_HW is not set @@ -6908,6 +7198,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6916,7 +7207,7 @@ CONFIG_BINARY_PRINTF=y CONFIG_RAID6_PQ=y # CONFIG_RAID6_PQ_BENCHMARK is not set CONFIG_LINEAR_RANGES=y -# CONFIG_PACKING is not set +CONFIG_PACKING=y CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y @@ -6924,7 +7215,6 @@ CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y @@ -6939,16 +7229,19 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=y CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y @@ -6957,20 +7250,13 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y +CONFIG_ARCH_HAS_CRC64=y +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y @@ -6984,10 +7270,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_IA64 is not set # CONFIG_XZ_DEC_ARM is not set # CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_ARM64 is not set # CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_ZSTD=y @@ -6999,13 +7286,14 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_CMA=y # CONFIG_DMA_NUMA_CMA is not set @@ -7037,6 +7325,9 @@ CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7059,10 +7350,14 @@ CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_PLDMFW=y +CONFIG_FIRMWARE_TABLE=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7090,7 +7385,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7105,6 +7400,7 @@ CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_FRAME_POINTER=y CONFIG_OBJTOOL=y +# CONFIG_OBJTOOL_WERROR is not set CONFIG_STACK_VALIDATION=y # CONFIG_VMLINUX_MAP is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set @@ -7123,7 +7419,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -7136,6 +7432,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7152,7 +7449,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7162,6 +7459,7 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y @@ -7170,9 +7468,11 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_PER_CPU_MAPS is not set CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y # CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_KASAN_SW_TAGS=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_HAVE_ARCH_KFENCE=y @@ -7203,6 +7503,7 @@ CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_DETECT_HUNG_TASK_BLOCKER=y # CONFIG_WQ_WATCHDOG is not set # CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set @@ -7211,12 +7512,9 @@ CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # @@ -7278,11 +7576,13 @@ CONFIG_HAVE_RETHOOK=y CONFIG_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_FTRACE_REGS_HAVING_PT_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y @@ -7307,6 +7607,7 @@ CONFIG_BOOTTIME_TRACING=y CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y # CONFIG_FUNCTION_GRAPH_RETVAL is not set +# CONFIG_FUNCTION_GRAPH_RETADDR is not set CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y @@ -7344,6 +7645,7 @@ CONFIG_FTRACE_MCOUNT_USE_CC=y # CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_TRACE_EVAL_MAP_FILE is not set # CONFIG_FTRACE_RECORD_RECURSION is not set +# CONFIG_FTRACE_VALIDATE_RCU_IS_WATCHING is not set # CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_FTRACE_SORT_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set @@ -7398,6 +7700,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -7406,11 +7709,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -7420,9 +7719,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set @@ -7430,11 +7727,13 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set # CONFIG_TEST_FPU is not set # CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -7444,3 +7743,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Generic/options b/projects/Generic/options index 321503ba86..0b2da2ef49 100644 --- a/projects/Generic/options +++ b/projects/Generic/options @@ -64,3 +64,8 @@ # Default size of the ova image, in MB, eg. 4096 OVA_SIZE="4096" + + # ensure system size is at least 1 GB + if [ ${SYSTEM_SIZE} -lt 1024 ]; then + SYSTEM_SIZE=1024 + fi diff --git a/projects/NXP/README.md b/projects/NXP/README.md new file mode 100644 index 0000000000..e5f726113a --- /dev/null +++ b/projects/NXP/README.md @@ -0,0 +1,15 @@ +# NXP + +This project is for NXP SoC devices + +## Devices + +**iMX6** +* [Cubox-i](devices/iMX6) +* [Udoo](devices/iMX6) +* [Wandboard](devices/iMX6) + +**iMX8** +* [Coral Edge TPU Development Board](devices/iMX8) +* [i.MX8MQ EVK](devices/iMX8) +* [TechNexion PICO-PI-8M](devices/iMX8) diff --git a/projects/NXP/devices/iMX6/linux/linux.arm.conf b/projects/NXP/devices/iMX6/linux/linux.arm.conf index d281a47096..eafff08d86 100644 --- a/projects/NXP/devices/iMX6/linux/linux.arm.conf +++ b/projects/NXP/devices/iMX6/linux/linux.arm.conf @@ -1,23 +1,26 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.6.66 Kernel Configuration +# Linux/arm 6.15.0 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="armv7a-libreelec-linux-gnueabihf-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="armv7a-libreelec-linux-gnueabihf-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -117,7 +120,7 @@ CONFIG_PREEMPT_COUNT=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_PSI is not set @@ -133,6 +136,7 @@ CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -154,23 +158,28 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -205,21 +214,23 @@ CONFIG_INITRAMFS_COMPRESSION_NONE=y CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y +# CONFIG_LD_DEAD_CODE_DATA_ELIMINATION is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y +CONFIG_SYSFS_SYSCALL=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -231,18 +242,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -258,7 +268,6 @@ CONFIG_TRACEPOINTS=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y # CONFIG_CRASH_DUMP is not set @@ -301,6 +310,9 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_VIRT is not set # CONFIG_ARCH_AIROHA is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_SUNPLUS is not set +# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set @@ -361,7 +373,6 @@ CONFIG_SOC_IMX6UL=y # end of TI OMAP/AM/DM/DRA Family # CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RDA is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -370,10 +381,8 @@ CONFIG_SOC_IMX6UL=y # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_SUNPLUS is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VEXPRESS is not set @@ -496,6 +505,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_PAN=y CONFIG_CPU_SW_DOMAIN_PAN=y CONFIG_HW_PERF_EVENTS=y # CONFIG_ARM_MODULE_PLTS is not set @@ -526,6 +536,7 @@ CONFIG_CMDLINE_EXTEND=y CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ATAGS_PROC=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_AUTO_ZRELADDR=y # CONFIG_EFI is not set # end of Boot options @@ -558,6 +569,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y # CPU frequency scaling drivers # # CONFIG_CPUFREQ_DT is not set +# CONFIG_CPUFREQ_VIRT is not set # CONFIG_CPUFREQ_DT_PLATDEV is not set CONFIG_ARM_IMX6Q_CPUFREQ=y # end of CPU Frequency scaling @@ -623,8 +635,8 @@ CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y # end of Power management options -CONFIG_AS_VFP_VMRS_FPINST=y CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -665,10 +677,12 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y # CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y @@ -681,8 +695,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -711,10 +728,11 @@ CONFIG_HAVE_GCC_PLUGINS=y CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -722,12 +740,12 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set CONFIG_MODVERSIONS=y +CONFIG_GENKSYMS=y +# CONFIG_EXTENDED_MODVERSIONS is not set +CONFIG_BASIC_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -738,9 +756,9 @@ CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_PUNT_BIO=y # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -801,18 +819,19 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -822,7 +841,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -833,13 +852,15 @@ CONFIG_BOUNCE=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_PAGE_MAPCOUNT=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CPU_CACHE_ALIASING=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set @@ -853,7 +874,10 @@ CONFIG_MEMFD_CREATE=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -867,6 +891,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -874,7 +899,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -887,6 +911,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -939,7 +964,8 @@ CONFIG_IPV6_SIT=y CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1004,6 +1030,7 @@ CONFIG_NETFILTER_XTABLES=m # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1011,6 +1038,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1022,11 +1050,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1081,7 +1111,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1135,6 +1182,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1156,13 +1204,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1184,7 +1234,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1192,8 +1242,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1228,6 +1278,7 @@ CONFIG_NET_DSA_TAG_EDSA=m # CONFIG_NET_DSA_TAG_LAN9303 is not set # CONFIG_NET_DSA_TAG_SJA1105 is not set # CONFIG_NET_DSA_TAG_TRAILER is not set +# CONFIG_NET_DSA_TAG_VSC73XX_8021Q is not set # CONFIG_NET_DSA_TAG_XRS700X is not set CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set @@ -1352,6 +1403,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y CONFIG_BT_HCIBTUSB_MTK=y CONFIG_BT_HCIBTUSB_RTL=y @@ -1370,6 +1422,7 @@ CONFIG_BT_HCIUART_BCM=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m # CONFIG_BT_HCIBCM4377 is not set CONFIG_BT_HCIBPA10X=m @@ -1381,6 +1434,7 @@ CONFIG_BT_ATH3K=m CONFIG_BT_MTKSDIO=m CONFIG_BT_MTKUART=m CONFIG_BT_NXPUART=m +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1388,10 +1442,8 @@ CONFIG_BT_NXPUART=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1409,7 +1461,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set # CONFIG_MAC80211_LEDS is not set -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1438,6 +1489,7 @@ CONFIG_ETHTOOL_NETLINK=y # Device Drivers # CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1458,9 +1510,12 @@ CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set +# CONFIG_PCI_DOE is not set # CONFIG_PCI_IOV is not set +# CONFIG_PCI_NPEM is not set # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set +# CONFIG_PCIE_TPH is not set CONFIG_PCI_DYNAMIC_OF_NODES=y # CONFIG_PCIE_BUS_TUNE_OFF is not set CONFIG_PCIE_BUS_DEFAULT=y @@ -1477,7 +1532,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_PCIE_ALTERA is not set # CONFIG_PCI_FTPCI100 is not set # CONFIG_PCI_HOST_GENERIC is not set -# CONFIG_PCIE_MICROCHIP_HOST is not set # CONFIG_PCI_V3_SEMI is not set # CONFIG_PCIE_XILINX is not set @@ -1485,7 +1539,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # Cadence-based PCIe controllers # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set -# CONFIG_PCI_J721E_HOST is not set # end of Cadence-based PCIe controllers # @@ -1501,6 +1554,12 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1515,6 +1574,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +# CONFIG_PCI_PWRCTL_SLOT is not set # CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1533,7 +1593,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # Firmware loader # CONFIG_FW_LOADER=y -CONFIG_EXTRA_FIRMWARE="" +CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin vpu_fw_imx6d.bin vpu_fw_imx6q.bin" +CONFIG_EXTRA_FIRMWARE_DIR="external-firmware" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y @@ -1547,6 +1608,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1564,7 +1626,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set CONFIG_IMX_WEIM=y # CONFIG_VEXPRESS_CONFIG is not set @@ -1595,8 +1656,15 @@ CONFIG_PROC_EVENTS=y # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set # CONFIG_GOOGLE_FIRMWARE is not set +# CONFIG_IMX_SCMI_MISC_DRV is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1607,6 +1675,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1614,7 +1683,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1667,7 +1735,6 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1726,6 +1793,7 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_FASTMAP=y # CONFIG_MTD_UBI_GLUEBI is not set CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_UBI_NVMEM is not set # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y CONFIG_OF=y @@ -1771,6 +1839,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -1791,6 +1860,7 @@ CONFIG_SRAM_EXEC=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_C2PORT is not set @@ -1799,7 +1869,6 @@ CONFIG_SRAM_EXEC=y # CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set @@ -1808,13 +1877,6 @@ CONFIG_EEPROM_AT25=y # end of EEPROM support # CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -2021,6 +2083,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -2028,6 +2091,8 @@ CONFIG_VXLAN=m # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set # CONFIG_ARCNET is not set # @@ -2042,6 +2107,7 @@ CONFIG_NLMON=m # CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON is not set CONFIG_NET_DSA_MV88E6XXX=m CONFIG_NET_DSA_MV88E6XXX_PTP=y +CONFIG_NET_DSA_MV88E6XXX_LEDS=y # CONFIG_NET_DSA_MSCC_OCELOT_EXT is not set # CONFIG_NET_DSA_MSCC_FELIX is not set # CONFIG_NET_DSA_MSCC_SEVILLE is not set @@ -2107,7 +2173,6 @@ CONFIG_NET_VENDOR_DEC=y # CONFIG_NET_TULIP is not set CONFIG_NET_VENDOR_DLINK=y # CONFIG_DL2K is not set -# CONFIG_SUNDANCE is not set CONFIG_NET_VENDOR_EMULEX=y # CONFIG_BE2NET is not set # CONFIG_NET_VENDOR_ENGLEDER is not set @@ -2121,9 +2186,11 @@ CONFIG_FEC=y # CONFIG_GIANFAR is not set # CONFIG_FSL_DPAA2_SWITCH is not set # CONFIG_FSL_ENETC is not set +# CONFIG_NXP_ENETC4 is not set # CONFIG_FSL_ENETC_VF is not set CONFIG_FSL_ENETC_IERB=m # CONFIG_FSL_ENETC_MDIO is not set +# CONFIG_NXP_NETC_BLK_CTRL is not set # CONFIG_NET_VENDOR_FUNGIBLE is not set CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_GVE is not set @@ -2134,6 +2201,7 @@ CONFIG_NET_VENDOR_HISILICON=y # CONFIG_HNS_DSAF is not set # CONFIG_HNS_ENET is not set # CONFIG_HNS3 is not set +# CONFIG_HIBMCGE is not set CONFIG_NET_VENDOR_HUAWEI=y CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y @@ -2150,6 +2218,7 @@ CONFIG_IGB_HWMON=y # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set +# CONFIG_IDPF is not set # CONFIG_JME is not set # CONFIG_NET_VENDOR_ADI is not set # CONFIG_NET_VENDOR_LITEX is not set @@ -2159,6 +2228,7 @@ CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set CONFIG_NET_VENDOR_MICROSEMI=y @@ -2200,6 +2270,7 @@ CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set # CONFIG_8139TOO is not set # CONFIG_R8169 is not set +# CONFIG_RTASE is not set CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y # CONFIG_ROCKER is not set @@ -2231,6 +2302,7 @@ CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set +# CONFIG_TEHUTI_TN40 is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set # CONFIG_TLAN is not set @@ -2244,7 +2316,6 @@ CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5300 is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -2259,6 +2330,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2293,7 +2365,11 @@ CONFIG_MICROCHIP_PHY=y # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=y CONFIG_AT803X_PHY=y +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_RENESAS_PHY is not set @@ -2307,6 +2383,7 @@ CONFIG_SMSC_PHY=y # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2335,6 +2412,7 @@ CONFIG_MDIO_GPIO=y # # PCS device drivers # +# CONFIG_PCS_XPCS is not set # end of PCS device drivers # CONFIG_PPP is not set @@ -2388,8 +2466,6 @@ CONFIG_WLAN=y # CONFIG_WLAN_VENDOR_ADMTEK is not set # CONFIG_WLAN_VENDOR_ATH is not set CONFIG_WLAN_VENDOR_ATMEL=y -CONFIG_ATMEL=m -# CONFIG_PCI_ATMEL is not set CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set @@ -2403,7 +2479,6 @@ CONFIG_BRCMFMAC_SDIO=y # CONFIG_BRCMFMAC_PCIE is not set # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set # CONFIG_WLAN_VENDOR_INTEL is not set # CONFIG_WLAN_VENDOR_INTERSIL is not set # CONFIG_WLAN_VENDOR_MARVELL is not set @@ -2426,14 +2501,24 @@ CONFIG_RTL_CARDS=m # CONFIG_RTL8192EE is not set # CONFIG_RTL8821AE is not set # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m # CONFIG_RTL8XXXU is not set CONFIG_RTW88=m CONFIG_RTW88_CORE=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m # CONFIG_RTW88_8822BE is not set # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m @@ -2442,12 +2527,18 @@ CONFIG_RTW88_8822BU=m CONFIG_RTW88_8822CU=m # CONFIG_RTW88_8723DE is not set # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m # CONFIG_RTW88_8821CE is not set # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +# CONFIG_RTW88_8814AE is not set +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set # CONFIG_WLAN_VENDOR_RSI is not set # CONFIG_WLAN_VENDOR_SILABS is not set @@ -2455,7 +2546,6 @@ CONFIG_RTW88_8821CU=m # CONFIG_WLAN_VENDOR_TI is not set # CONFIG_WLAN_VENDOR_ZYDAS is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2487,7 +2577,6 @@ CONFIG_INPUT_VIVALDIFMAP=y # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2510,7 +2599,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set CONFIG_KEYBOARD_SNVS_PWRKEY=y CONFIG_KEYBOARD_IMX=y @@ -2582,6 +2670,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ADS7846=y @@ -2597,7 +2686,6 @@ CONFIG_TOUCHSCREEN_ADS7846=y # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DA9052 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set @@ -2608,6 +2696,8 @@ CONFIG_TOUCHSCREEN_EGALAX=y # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -2621,7 +2711,6 @@ CONFIG_TOUCHSCREEN_EGALAX=y # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set CONFIG_TOUCHSCREEN_MAX11801=y -# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set @@ -2740,7 +2829,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2815,7 +2903,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -# CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2872,8 +2959,7 @@ CONFIG_I2C_ALGOPCA=m # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set -# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_DESIGNWARE_CORE is not set # CONFIG_I2C_EMEV2 is not set CONFIG_I2C_GPIO=y # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set @@ -2924,7 +3010,7 @@ CONFIG_SPI_MEM=y CONFIG_SPI_BITBANG=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_FSL_LPSPI is not set CONFIG_SPI_FSL_QUADSPI=y @@ -2936,7 +3022,6 @@ CONFIG_SPI_IMX=y # CONFIG_SPI_MICROCHIP_CORE_QSPI is not set # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set -# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SN_F_OSPI is not set @@ -2970,10 +3055,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2987,6 +3069,7 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PTP_1588_CLOCK_KVM is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support @@ -2996,6 +3079,7 @@ CONFIG_PINMUX=y CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -3010,9 +3094,8 @@ CONFIG_PINCTRL_IMX6SLL=y CONFIG_PINCTRL_IMX6SX=y CONFIG_PINCTRL_IMX6UL=y # CONFIG_PINCTRL_IMX8ULP is not set -# CONFIG_PINCTRL_IMXRT1050 is not set +# CONFIG_PINCTRL_IMX91 is not set # CONFIG_PINCTRL_IMX93 is not set -# CONFIG_PINCTRL_IMXRT1170 is not set # # Renesas pinctrl drivers @@ -3044,6 +3127,7 @@ CONFIG_GPIO_GENERIC=y # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MPC8XXX is not set CONFIG_GPIO_MXC=y +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set CONFIG_GPIO_VF610=y @@ -3101,6 +3185,7 @@ CONFIG_GPIO_STMPE=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -3112,10 +3197,16 @@ CONFIG_GPIO_STMPE=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_BRCMKONA is not set -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -3126,6 +3217,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y # CONFIG_SYSCON_REBOOT_MODE is not set # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -3145,6 +3237,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_DA9052 is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -3169,9 +3262,11 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9467 is not set # CONFIG_CHARGER_RT9471 is not set +# CONFIG_FUEL_GAUGE_STC3117 is not set CONFIG_CHARGER_UCS1002=y # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3181,7 +3276,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3198,8 +3292,10 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -3212,6 +3308,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_MC13783_ADC is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -3219,15 +3316,19 @@ CONFIG_HWMON=y CONFIG_SENSORS_GPIO_FAN=y # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set CONFIG_SENSORS_IIO_HWMON=y +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -3235,6 +3336,7 @@ CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -3248,7 +3350,6 @@ CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -3279,14 +3380,17 @@ CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set # CONFIG_SENSORS_PWM_FAN is not set # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -3315,6 +3419,7 @@ CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3340,10 +3445,11 @@ CONFIG_SENSORS_IIO_HWMON=y CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3353,6 +3459,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y # CONFIG_THERMAL_GOV_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_CPU_FREQ_THERMAL=y +# CONFIG_PCIE_THERMAL is not set # CONFIG_THERMAL_EMULATION is not set # CONFIG_THERMAL_MMIO is not set CONFIG_IMX_THERMAL=y @@ -3410,6 +3517,7 @@ CONFIG_BCMA_POSSIBLE=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3447,12 +3555,14 @@ CONFIG_MFD_MC13XXX_I2C=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3469,7 +3579,6 @@ CONFIG_MFD_MC13XXX_I2C=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set @@ -3532,12 +3641,16 @@ CONFIG_MFD_WM8994=y # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set CONFIG_RAVE_SP_CORE=y # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3547,6 +3660,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3568,6 +3682,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -3587,6 +3702,7 @@ CONFIG_REGULATOR_MC13892=y # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set CONFIG_REGULATOR_PFUZE100=y # CONFIG_REGULATOR_PV88060 is not set @@ -3898,6 +4014,10 @@ CONFIG_VIDEO_IMX_VDOA=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3917,6 +4037,11 @@ CONFIG_VIDEO_IMX_VDOA=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3981,7 +4106,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3990,6 +4120,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -4000,6 +4131,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -4025,6 +4157,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -4043,10 +4176,16 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -4116,6 +4255,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -4176,6 +4316,8 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4400,38 +4542,45 @@ CONFIG_MEDIA_TUNER_XC5000=y # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_IMX_IPUV3_CORE=y CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4443,6 +4592,7 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set # CONFIG_DRM_UDL is not set @@ -4464,32 +4614,40 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_DSI_CM is not set -CONFIG_DRM_PANEL_LVDS=y -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_EDP=y +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_DSI_CM is not set +CONFIG_DRM_PANEL_LVDS=y +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set @@ -4498,8 +4656,8 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set @@ -4507,17 +4665,26 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set @@ -4532,14 +4699,19 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +CONFIG_DRM_PANEL_EDP=y +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SUMMIT is not set +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set +# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels @@ -4554,6 +4726,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_FSL_LDB is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4578,6 +4752,7 @@ CONFIG_DRM_TOSHIBA_TC358767=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4588,10 +4763,14 @@ CONFIG_DRM_TOSHIBA_TC358767=y # CONFIG_DRM_I2C_ADV7511 is not set # CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_CDNS_MHDP8546 is not set +CONFIG_DRM_IMX_LEGACY_BRIDGE=y +# CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE is not set +# CONFIG_DRM_IMX8MP_HDMI_PVI is not set # CONFIG_DRM_IMX8QM_LDB is not set # CONFIG_DRM_IMX8QXP_LDB is not set # CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set +# CONFIG_DRM_IMX93_MIPI_DSI is not set CONFIG_DRM_DW_HDMI=y CONFIG_DRM_DW_HDMI_AHB_AUDIO=y CONFIG_DRM_DW_HDMI_I2S_AUDIO=y @@ -4605,12 +4784,13 @@ CONFIG_DRM_IMX_TVE=y CONFIG_DRM_IMX_LDB=y CONFIG_DRM_IMX_HDMI=y # CONFIG_DRM_IMX_LCDC is not set -# CONFIG_DRM_LOONGSON is not set CONFIG_DRM_ETNAVIV=y CONFIG_DRM_ETNAVIV_THERMAL=y +# CONFIG_DRM_HISI_HIBMC is not set # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_MXSFB is not set # CONFIG_DRM_IMX_LCDIF is not set +# CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set @@ -4624,17 +4804,19 @@ CONFIG_DRM_ETNAVIV_THERMAL=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_TVE200 is not set # CONFIG_DRM_LIMA is not set # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_MCDE is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -4686,12 +4868,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_SYSMEM_HELPERS=y -CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # end of Frame buffer Devices @@ -4714,15 +4894,18 @@ CONFIG_LCD_PLATFORM=y # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=y # CONFIG_BACKLIGHT_DA9052 is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set CONFIG_BACKLIGHT_GPIO=y # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4738,6 +4921,8 @@ CONFIG_HDMI=y # Console display driver support # CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=30 CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y @@ -4758,6 +4943,8 @@ CONFIG_SND_PCM_IEC958=y CONFIG_SND_DMAENGINE_PCM=y CONFIG_SND_HWDEP=m CONFIG_SND_RAWMIDI=m +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_COMPRESS_ACCEL=y CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y # CONFIG_SND_OSSEMUL is not set @@ -4767,10 +4954,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4894,7 +5081,6 @@ CONFIG_SND_IMX_SOC=y CONFIG_SND_SOC_EUKREA_TLV320=y CONFIG_SND_SOC_IMX_ES8328=y CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_IMX_SPDIF=y CONFIG_SND_SOC_FSL_ASOC_CARD=y # CONFIG_SND_SOC_IMX_AUDMIX is not set CONFIG_SND_SOC_IMX_HDMI=m @@ -4903,8 +5089,15 @@ CONFIG_SND_SOC_IMX_CARD=m # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4925,6 +5118,7 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4937,6 +5131,7 @@ CONFIG_SND_SOC_WM_HUBS=y CONFIG_SND_SOC_AK4458=m # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set CONFIG_SND_SOC_AK5558=m @@ -4944,7 +5139,11 @@ CONFIG_SND_SOC_AK5558=m # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4965,6 +5164,7 @@ CONFIG_SND_SOC_AK5558=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4976,13 +5176,16 @@ CONFIG_SND_SOC_CS42XX8_I2C=y # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=y CONFIG_SND_SOC_ES8328_I2C=y @@ -4991,7 +5194,6 @@ CONFIG_SND_SOC_ES8328_SPI=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -5018,17 +5220,19 @@ CONFIG_SND_SOC_ES8328_SPI=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set CONFIG_SND_SOC_SGTL5000=y # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -5069,6 +5273,7 @@ CONFIG_SND_SOC_TLV320AIC3X_SPI=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -5099,6 +5304,7 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -5107,6 +5313,8 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set CONFIG_SND_SOC_TPA6130A2=y # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -5134,6 +5342,8 @@ CONFIG_HID_GENERIC=y # CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=y # CONFIG_HID_APPLEIR is not set +# CONFIG_HID_APPLETB_BL is not set +# CONFIG_HID_APPLETB_KBD is not set # CONFIG_HID_ASUS is not set # CONFIG_HID_AUREAL is not set # CONFIG_HID_BELKIN is not set @@ -5161,11 +5371,13 @@ CONFIG_HID_APPLE=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set # CONFIG_HID_KYE is not set +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -5179,7 +5391,6 @@ CONFIG_HID_APPLE=y # CONFIG_HID_KENSINGTON is not set # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set # CONFIG_HID_LETSKETCH is not set # CONFIG_HID_LOGITECH is not set # CONFIG_HID_MAGICMOUSE is not set @@ -5196,7 +5407,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set # CONFIG_HID_ORTEK is not set -CONFIG_HID_OUYA=y # CONFIG_HID_PANTHERLORD is not set # CONFIG_HID_PENMOUNT is not set # CONFIG_HID_PETALYNX is not set @@ -5231,6 +5441,7 @@ CONFIG_SONY_FF=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set @@ -5245,6 +5456,11 @@ CONFIG_SONY_FF=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -5253,10 +5469,6 @@ CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -5266,6 +5478,7 @@ CONFIG_USB_ULPI_BUS=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +# CONFIG_USB_PCI_AMD is not set # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -5279,6 +5492,7 @@ CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -5310,11 +5524,7 @@ CONFIG_USB_EHCI_PCI=y # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -5352,6 +5562,7 @@ CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -5442,7 +5653,7 @@ CONFIG_USB_EHSET_TEST_FIXTURE=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5626,6 +5837,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5652,6 +5864,7 @@ CONFIG_LEDS_PWM=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5663,11 +5876,14 @@ CONFIG_LEDS_PWM=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # @@ -5682,6 +5898,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=y # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # @@ -5692,11 +5909,11 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5733,6 +5950,7 @@ CONFIG_RTC_DRV_DS1307=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set CONFIG_RTC_DRV_ISL1208=y @@ -5750,12 +5968,14 @@ CONFIG_RTC_DRV_M41T80=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5843,6 +6063,7 @@ CONFIG_MXS_DMA=y # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set @@ -5890,14 +6111,7 @@ CONFIG_VHOST_MENU=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTL8192U is not set -# CONFIG_RTLLIB is not set # CONFIG_RTL8723BS is not set -# CONFIG_R8712U is not set -# CONFIG_RTS5208 is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5907,7 +6121,6 @@ CONFIG_STAGING=y # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5934,25 +6147,14 @@ CONFIG_STAGING=y # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set # CONFIG_STAGING_MEDIA is not set -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_QLGE is not set # CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set @@ -5997,6 +6199,7 @@ CONFIG_CLK_IMX6UL=y # CONFIG_CLK_IMX8MQ is not set # CONFIG_CLK_IMX8ULP is not set # CONFIG_CLK_IMX93 is not set +# CONFIG_CLK_IMX95_BLK_CTL is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_HWSPINLOCK is not set @@ -6054,7 +6257,6 @@ CONFIG_IOMMU_SUPPORT=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -6072,7 +6274,6 @@ CONFIG_IOMMU_SUPPORT=y # # i.MX SoC drivers # -CONFIG_IMX_GPCV2_PM_DOMAINS=y # CONFIG_SOC_IMX8M is not set # CONFIG_SOC_IMX9 is not set # end of i.MX SoC drivers @@ -6098,6 +6299,32 @@ CONFIG_IMX_GPCV2_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +CONFIG_IMX_GPCV2_PM_DOMAINS=y +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + # CONFIG_PM_DEVFREQ is not set CONFIG_EXTCON=y @@ -6107,6 +6334,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -6143,6 +6371,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -6179,37 +6409,49 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set CONFIG_IMX7D_ADC=y # CONFIG_IMX8QXP_ADC is not set # CONFIG_IMX93_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -6221,11 +6463,15 @@ CONFIG_IMX7D_ADC=y # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_STMPE_ADC is not set @@ -6237,8 +6483,11 @@ CONFIG_IMX7D_ADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -6282,10 +6531,12 @@ CONFIG_VF610_ADC=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -6317,6 +6568,7 @@ CONFIG_VF610_ADC=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -6328,6 +6580,7 @@ CONFIG_VF610_ADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -6340,17 +6593,21 @@ CONFIG_VF610_ADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -6385,6 +6642,7 @@ CONFIG_VF610_ADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV4420 is not set # CONFIG_ADRF6780 is not set @@ -6426,8 +6684,10 @@ CONFIG_VF610_ADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -6441,8 +6701,13 @@ CONFIG_VF610_ADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -6452,6 +6717,7 @@ CONFIG_VF610_ADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6461,11 +6727,15 @@ CONFIG_VF610_ADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6478,10 +6748,11 @@ CONFIG_VF610_ADC=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6490,6 +6761,7 @@ CONFIG_VF610_ADC=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6505,8 +6777,11 @@ CONFIG_VF610_ADC=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6514,9 +6789,11 @@ CONFIG_VF610_ADC=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6526,6 +6803,7 @@ CONFIG_VF610_ADC=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6580,10 +6858,12 @@ CONFIG_VF610_ADC=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6591,6 +6871,7 @@ CONFIG_MPL3115=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6606,6 +6887,7 @@ CONFIG_MPL3115=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6620,6 +6902,7 @@ CONFIG_MPL3115=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6627,6 +6910,7 @@ CONFIG_MPL3115=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6636,6 +6920,7 @@ CONFIG_MPL3115=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6644,16 +6929,17 @@ CONFIG_MPL3115=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_DWC is not set CONFIG_PWM_FSL_FTM=y +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_IMX1 is not set # CONFIG_PWM_IMX27 is not set # CONFIG_PWM_IMX_TPM is not set @@ -6677,6 +6963,8 @@ CONFIG_IMX_INTMUX=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set +# CONFIG_RESET_IMX8MP_AUDIOMIX is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6686,6 +6974,7 @@ CONFIG_RESET_CONTROLLER=y # # CONFIG_GENERIC_PHY is not set # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6700,7 +6989,6 @@ CONFIG_RESET_CONTROLLER=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6718,9 +7006,11 @@ CONFIG_RESET_CONTROLLER=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set CONFIG_ARM_PMU=y +CONFIG_ARM_V7_PMU=y CONFIG_ARM_PMUV3=y # CONFIG_FSL_IMX8_DDR_PMU is not set # CONFIG_FSL_IMX9_DDR_PMU is not set +# CONFIG_DWC_PCIE_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -6735,12 +7025,14 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_IMX_IIM is not set @@ -6777,6 +7069,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6789,7 +7082,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_SUPPORT_V4=y @@ -6804,13 +7096,14 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6831,6 +7124,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6841,7 +7136,6 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # # Caches # -# CONFIG_FSCACHE is not set # end of Caches # @@ -6864,10 +7158,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6940,7 +7234,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6952,6 +7245,7 @@ CONFIG_NFS_V4=y # CONFIG_NFS_SWAP is not set # CONFIG_NFS_V4_1 is not set CONFIG_ROOT_NFS=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -7032,6 +7326,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -7041,8 +7336,6 @@ CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_NO_FORCE is not set # CONFIG_SECURITY is not set CONFIG_SECURITYFS=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="yama,loadpin,safesetid,integrity" @@ -7060,12 +7353,20 @@ CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_STACK_ALL_PATTERN is not set # CONFIG_INIT_STACK_ALL_ZERO is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -7112,6 +7413,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=y # end of Crypto core or helper @@ -7126,7 +7428,6 @@ CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -7158,14 +7459,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set CONFIG_CRYPTO_XTS=y # end of Length-preserving ciphers and modes @@ -7201,7 +7499,6 @@ CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -7212,7 +7509,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32 is not set -CONFIG_CRYPTO_CRCT10DIF=y # end of CRCs (cyclic redundancy checks) # @@ -7236,7 +7532,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -7249,7 +7547,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y # CONFIG_CRYPTO_USER_API_RNG is not set CONFIG_CRYPTO_USER_API_AEAD=y CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y -# CONFIG_CRYPTO_STATS is not set # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y @@ -7257,13 +7554,13 @@ CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (arm) # -CONFIG_CRYPTO_POLY1305_ARM=y +CONFIG_CRYPTO_POLY1305_ARM=m CONFIG_CRYPTO_BLAKE2S_ARM=y CONFIG_CRYPTO_SHA1_ARM=y CONFIG_CRYPTO_SHA256_ARM=y CONFIG_CRYPTO_SHA512_ARM=y CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # end of Accelerated Cryptographic Algorithms for CPU (arm) CONFIG_CRYPTO_HW=y @@ -7290,6 +7587,7 @@ CONFIG_CRYPTO_DEV_SAHARA=y # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -7315,6 +7613,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -7332,7 +7631,6 @@ CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_STMP_DEVICE=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y @@ -7345,34 +7643,26 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines -CONFIG_CRC_CCITT=y CONFIG_CRC16=y -CONFIG_CRC_T10DIF=y -# CONFIG_CRC64_ROCKSOFT is not set -CONFIG_CRC_ITU_T=m +CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -CONFIG_CRC7=m -CONFIG_LIBCRC32C=m CONFIG_CRC8=m +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y @@ -7386,10 +7676,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_ARM64 is not set CONFIG_XZ_DEC_SPARC=y +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -7401,14 +7692,16 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_ARCH_HAS_DMA_ALLOC=y CONFIG_DMA_CMA=y # @@ -7431,11 +7724,13 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_32=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7454,9 +7749,11 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7484,7 +7781,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7512,7 +7809,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7523,6 +7820,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7535,13 +7833,14 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set @@ -7549,6 +7848,7 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_KMAP_LOCAL is not set # CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -7578,18 +7878,15 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_PROVE_LOCKING=y -# CONFIG_PROVE_RAW_LOCK_NESTING is not set +CONFIG_PROVE_RAW_LOCK_NESTING=y # CONFIG_LOCK_STAT is not set CONFIG_DEBUG_RT_MUTEXES=y CONFIG_DEBUG_SPINLOCK=y @@ -7667,7 +7964,9 @@ CONFIG_TRACING_SUPPORT=y # # arm Debugging # +CONFIG_ARM_PTDUMP_CORE=y # CONFIG_ARM_PTDUMP_DEBUGFS is not set +CONFIG_ARM_DEBUG_WX=y # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -7694,6 +7993,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -7702,11 +8002,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -7716,18 +8012,18 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -7737,3 +8033,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/NXP/devices/iMX8/linux/linux.aarch64.conf b/projects/NXP/devices/iMX8/linux/linux.aarch64.conf index ddd560c9d6..b01aee4996 100644 --- a/projects/NXP/devices/iMX8/linux/linux.aarch64.conf +++ b/projects/NXP/devices/iMX8/linux/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.66 Kernel Configuration +# Linux/arm64 6.15.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -63,6 +67,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -103,6 +108,7 @@ CONFIG_PREEMPT_VOLUNTARY_BUILD=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set +# CONFIG_PREEMPT_RT is not set # CONFIG_PREEMPT_DYNAMIC is not set # @@ -125,6 +131,7 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -149,24 +156,29 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -205,17 +217,17 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_SYSFS_SYSCALL is not set CONFIG_EXPERT=y -# CONFIG_UID16 is not set +CONFIG_UID16=y CONFIG_MULTIUSER=y # CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SYSFS_SYSCALL is not set CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -227,17 +239,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set # CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -254,22 +266,20 @@ CONFIG_PROFILING=y # # CONFIG_KEXEC is not set # CONFIG_KEXEC_FILE is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=33 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 -CONFIG_NO_IOPORT_MAP=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_LOCKDEP_SUPPORT=y @@ -290,12 +300,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -311,6 +323,7 @@ CONFIG_ARCH_MXC=y # CONFIG_ARCH_S32 is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -344,15 +357,14 @@ CONFIG_ARM64_ERRATUM_827319=y CONFIG_ARM64_ERRATUM_824069=y CONFIG_ARM64_ERRATUM_819472=y # CONFIG_ARM64_ERRATUM_832075 is not set -# CONFIG_ARM64_ERRATUM_1742098 is not set +CONFIG_ARM64_ERRATUM_1742098=y CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y # CONFIG_ARM64_ERRATUM_1024718 is not set # CONFIG_ARM64_ERRATUM_1418040 is not set -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y # CONFIG_ARM64_ERRATUM_1165522 is not set -CONFIG_ARM64_ERRATUM_1319367=y +# CONFIG_ARM64_ERRATUM_1319367 is not set # CONFIG_ARM64_ERRATUM_1530923 is not set # CONFIG_ARM64_ERRATUM_2441007 is not set # CONFIG_ARM64_ERRATUM_1286807 is not set @@ -368,7 +380,7 @@ CONFIG_ARM64_ERRATUM_1319367=y # CONFIG_ARM64_ERRATUM_2645198 is not set # CONFIG_ARM64_ERRATUM_2966298 is not set # CONFIG_ARM64_ERRATUM_3117295 is not set -# CONFIG_ARM64_ERRATUM_3194386 is not set +CONFIG_ARM64_ERRATUM_3194386=y # CONFIG_CAVIUM_ERRATUM_22375 is not set # CONFIG_CAVIUM_ERRATUM_23154 is not set # CONFIG_CAVIUM_ERRATUM_27456 is not set @@ -376,11 +388,13 @@ CONFIG_ARM64_ERRATUM_1319367=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -390,6 +404,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -418,6 +433,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y # CONFIG_XEN is not set CONFIG_ARCH_FORCE_MAX_ORDER=10 CONFIG_UNMAP_KERNEL_AT_EL0=y @@ -479,6 +495,7 @@ CONFIG_AS_HAS_ARMV8_5=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y # CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # @@ -486,12 +503,28 @@ CONFIG_ARM64_AS_HAS_MTE=y # # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +# CONFIG_ARM64_POE is not set +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +CONFIG_ARM64_GCS=y +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -499,6 +532,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y # CONFIG_CMDLINE="" # CONFIG_EFI is not set +# CONFIG_COMPRESSED_INSTALL is not set # end of Boot options # @@ -569,18 +603,19 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_IMX_CPUFREQ_DT=y # end of CPU Frequency scaling # end of CPU Power Management -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options # +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -590,7 +625,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -608,6 +642,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -650,6 +685,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -657,13 +693,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -677,12 +717,17 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -696,10 +741,11 @@ CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -709,10 +755,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -725,9 +768,9 @@ CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -760,8 +803,10 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types +CONFIG_BLK_MQ_PCI=y CONFIG_BLK_PM=y CONFIG_BLOCK_HOLDER_DEPRECATED=y CONFIG_BLK_MQ_STACKING=y @@ -863,18 +908,19 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -882,15 +928,16 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -904,15 +951,21 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y # CONFIG_MEMORY_FAILURE is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set CONFIG_CMA_DEBUGFS=y -# CONFIG_CMA_SYSFS is not set +CONFIG_CMA_SYSFS=y CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set @@ -923,6 +976,7 @@ CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -935,9 +989,12 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y +CONFIG_ARCH_HAS_USER_SHADOW_STACK=y # # Data Access Monitoring @@ -952,6 +1009,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -959,7 +1017,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -972,6 +1029,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -1030,6 +1088,7 @@ CONFIG_TCP_CONG_CDG=m CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -1045,7 +1104,8 @@ CONFIG_IPV6_SIT=m CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1104,13 +1164,14 @@ CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1118,6 +1179,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1129,11 +1191,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1188,7 +1252,24 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1242,6 +1323,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1263,13 +1345,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1291,7 +1375,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1299,8 +1383,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1434,6 +1518,7 @@ CONFIG_BT_QCA=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1452,7 +1537,9 @@ CONFIG_BT_HCIUART_BCM=y CONFIG_BT_HCIUART_QCA=y # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBCM4377 is not set # CONFIG_BT_HCIBPA10X is not set CONFIG_BT_HCIBFUSB=m # CONFIG_BT_HCIVHCI is not set @@ -1461,6 +1548,7 @@ CONFIG_BT_ATH3K=m # CONFIG_BT_MTKSDIO is not set # CONFIG_BT_MTKUART is not set CONFIG_BT_NXPUART=m +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1468,10 +1556,8 @@ CONFIG_BT_NXPUART=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1489,7 +1575,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1517,8 +1602,95 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y -# CONFIG_PCI is not set +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCIEASPM is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_DOE is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_NPEM is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_PCIE_TPH is not set +CONFIG_PCI_DYNAMIC_OF_NODES=y +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set +# CONFIG_VGA_ARB is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_XILINX is not set + +# +# Cadence-based PCIe controllers +# +# CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_DEBUGFS=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_AL is not set +# CONFIG_PCIE_AMD_MDB is not set +# CONFIG_PCI_MESON is not set +CONFIG_PCI_IMX6=y +CONFIG_PCI_IMX6_HOST=y +# CONFIG_PCI_HISI is not set +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers + +# +# Mobiveil-based PCIe controllers +# +# end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +CONFIG_PCI_PWRCTL=m +CONFIG_PCI_PWRCTL_SLOT=m +# CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set # # Generic Driver Options @@ -1548,6 +1720,7 @@ CONFIG_WANT_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1565,7 +1738,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_IMX_WEIM is not set # CONFIG_VEXPRESS_CONFIG is not set @@ -1591,15 +1763,22 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set # CONFIG_ARM_FFA_TRANSPORT is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_IMX_DSP=m CONFIG_IMX_SCU=y -CONFIG_IMX_SCU_PD=y +CONFIG_IMX_SCMI_MISC_DRV=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1610,6 +1789,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1617,7 +1797,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1668,6 +1847,7 @@ CONFIG_MTD_CFI_I2=y # # Self-contained MTD device drivers # +# CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set # CONFIG_MTD_MCHP48L640 is not set @@ -1728,6 +1908,8 @@ CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_DRBD is not set @@ -1743,6 +1925,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # NVME Support # +# CONFIG_BLK_DEV_NVME is not set # CONFIG_NVME_FC is not set # CONFIG_NVME_TCP is not set # CONFIG_NVME_TARGET is not set @@ -1753,8 +1936,12 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set +# CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set # CONFIG_APDS9802ALS is not set # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set @@ -1765,10 +1952,14 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set +# CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_MCHP_LAN966X_PCI is not set # CONFIG_C2PORT is not set # @@ -1776,7 +1967,6 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -1784,19 +1974,21 @@ CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - +# CONFIG_CB710_CORE is not set # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set +# CONFIG_VMWARE_VMCI is not set +# CONFIG_GENWQE is not set # CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set # CONFIG_MISC_RTSX_USB is not set # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set +# CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -1837,7 +2029,52 @@ CONFIG_SCSI_SAS_HOST_SMP=y CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_MPI3MR is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set # CONFIG_SCSI_DH is not set # end of SCSI device support @@ -1874,7 +2111,17 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y @@ -1883,6 +2130,7 @@ CONFIG_DUMMY=m CONFIG_WIREGUARD=m # CONFIG_WIREGUARD_DEBUG is not set # CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set # CONFIG_NET_TEAM is not set CONFIG_MACVLAN=m # CONFIG_MACVTAP is not set @@ -1893,6 +2141,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set CONFIG_NETCONSOLE=y @@ -1904,20 +2153,33 @@ CONFIG_TUN=y # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set +# CONFIG_ARCNET is not set CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set # CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_ALTERA_TSE is not set # CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_AQUANTIA is not set # CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ASIX is not set +# CONFIG_NET_VENDOR_ATHEROS is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_CADENCE is not set # CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set # CONFIG_NET_VENDOR_CORTINA is not set # CONFIG_NET_VENDOR_DAVICOM is not set # CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set # CONFIG_NET_VENDOR_ENGLEDER is not set # CONFIG_NET_VENDOR_EZCHIP is not set CONFIG_NET_VENDOR_FREESCALE=y @@ -1925,30 +2187,55 @@ CONFIG_FEC=y # CONFIG_FSL_PQ_MDIO is not set # CONFIG_FSL_XGMAC_MDIO is not set # CONFIG_GIANFAR is not set +# CONFIG_FSL_ENETC is not set +# CONFIG_NXP_ENETC4 is not set +# CONFIG_FSL_ENETC_VF is not set # CONFIG_FSL_ENETC_IERB is not set +# CONFIG_FSL_ENETC_MDIO is not set +# CONFIG_NXP_NETC_BLK_CTRL is not set # CONFIG_NET_VENDOR_FUNGIBLE is not set CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set # CONFIG_NET_VENDOR_HISILICON is not set # CONFIG_NET_VENDOR_HUAWEI is not set # CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set # CONFIG_NET_VENDOR_ADI is not set # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set # CONFIG_NET_VENDOR_MICROSOFT is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set # CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set # CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set # CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +# CONFIG_RTASE is not set # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_SAMSUNG is not set # CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SOCIONEXT is not set @@ -1960,15 +2247,20 @@ CONFIG_STMMAC_PLATFORM=y CONFIG_DWMAC_GENERIC=y CONFIG_DWMAC_IMX8=y # CONFIG_DWMAC_INTEL_PLAT is not set +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set # CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set # CONFIG_NET_VENDOR_VERTEXCOM is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WANGXUN is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -1980,6 +2272,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2014,9 +2307,14 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=y CONFIG_AT803X_PHY=y +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=m @@ -2028,6 +2326,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2046,6 +2345,7 @@ CONFIG_MDIO_BITBANG=y # CONFIG_MDIO_OCTEON is not set # CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set +# CONFIG_MDIO_THUNDER is not set # # MDIO Multiplexers @@ -2102,16 +2402,18 @@ CONFIG_USB_IPHETH=m # CONFIG_USB_NET_AQC111 is not set CONFIG_USB_RTL8153_ECM=m CONFIG_WLAN=y -CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_WLAN_VENDOR_ADMTEK is not set CONFIG_ATH_COMMON=m CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set CONFIG_ATH9K_HW=m CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m +# CONFIG_ATH9K_PCI is not set # CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -2129,14 +2431,20 @@ CONFIG_ATH6KL=m CONFIG_ATH6KL_USB=m # CONFIG_ATH6KL_DEBUG is not set CONFIG_AR5523=m +# CONFIG_WIL6210 is not set CONFIG_ATH10K=m CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set CONFIG_ATH10K_SDIO=m CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set +# CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y @@ -2146,6 +2454,8 @@ CONFIG_B43_SSB=y CONFIG_B43_BUSES_BCMA_AND_SSB=y # CONFIG_B43_BUSES_BCMA is not set # CONFIG_B43_BUSES_SSB is not set +CONFIG_B43_PCI_AUTOSELECT=y +CONFIG_B43_PCICORE_AUTOSELECT=y # CONFIG_B43_SDIO is not set CONFIG_B43_BCMA_PIO=y CONFIG_B43_PIO=y @@ -2163,19 +2473,25 @@ CONFIG_BRCMFMAC=m CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y +# CONFIG_BRCMFMAC_PCIE is not set # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set CONFIG_P54_COMMON=m CONFIG_P54_USB=m +# CONFIG_P54_PCI is not set # CONFIG_P54_SPI is not set CONFIG_P54_LEDS=y CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_MT7601U=m CONFIG_MT76_CORE=m @@ -2188,19 +2504,32 @@ CONFIG_MT792x_LIB=m CONFIG_MT792x_USB=m CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m +# CONFIG_MT76x0E is not set CONFIG_MT76x2_COMMON=m +# CONFIG_MT76x2E is not set CONFIG_MT76x2U=m +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set # CONFIG_MT7663U is not set # CONFIG_MT7663S is not set +# CONFIG_MT7915E is not set CONFIG_MT7921_COMMON=m +# CONFIG_MT7921E is not set # CONFIG_MT7921S is not set CONFIG_MT7921U=m +# CONFIG_MT7996E is not set +# CONFIG_MT7925E is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set # CONFIG_WLAN_VENDOR_PURELIFI is not set CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m +# CONFIG_RT2400PCI is not set +# CONFIG_RT2500PCI is not set +# CONFIG_RT61PCI is not set +# CONFIG_RT2800PCI is not set CONFIG_RT2500USB=m CONFIG_RT73USB=m CONFIG_RT2800USB=m @@ -2218,10 +2547,24 @@ CONFIG_RT2X00_LIB_CRYPTO=y CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RT2X00_DEBUG is not set CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2229,18 +2572,33 @@ CONFIG_RTW88_CORE=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m +# CONFIG_RTW88_8822BE is not set # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m +# CONFIG_RTW88_8822CE is not set # CONFIG_RTW88_8822CS is not set CONFIG_RTW88_8822CU=m +# CONFIG_RTW88_8723DE is not set # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m +# CONFIG_RTW88_8821CE is not set # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +# CONFIG_RTW88_8814AE is not set +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set @@ -2255,11 +2613,9 @@ CONFIG_WLCORE=m # CONFIG_WLCORE_SPI is not set CONFIG_WLCORE_SDIO=m CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2270,6 +2626,7 @@ CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_WWAN is not set # end of Wireless WAN +# CONFIG_VMXNET3 is not set # CONFIG_NETDEVSIM is not set # CONFIG_NET_FAILOVER is not set # CONFIG_ISDN is not set @@ -2292,7 +2649,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2315,7 +2671,6 @@ CONFIG_KEYBOARD_GPIO=m # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_SNVS_PWRKEY is not set # CONFIG_KEYBOARD_IMX is not set @@ -2376,6 +2731,7 @@ CONFIG_JOYSTICK_PSXPAD_SPI_FF=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y @@ -2423,7 +2779,7 @@ CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F3A is not set +CONFIG_RMI4_F3A=y # CONFIG_RMI4_F55 is not set # @@ -2432,6 +2788,7 @@ CONFIG_RMI4_F30=y CONFIG_SERIO=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_AMBAKMI is not set +# CONFIG_SERIO_PCIPS2 is not set # CONFIG_SERIO_LIBPS2 is not set # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set @@ -2452,7 +2809,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2469,10 +2825,13 @@ CONFIG_SERIAL_8250_16550A_VARIANTS=y # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y +# CONFIG_SERIAL_8250_PCI is not set +# CONFIG_SERIAL_8250_EXAR is not set CONFIG_SERIAL_8250_NR_UARTS=1 CONFIG_SERIAL_8250_RUNTIME_UARTS=0 CONFIG_SERIAL_8250_EXTENDED=y # CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_PCI1XXXX is not set CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set # CONFIG_SERIAL_8250_RSA is not set @@ -2480,6 +2839,7 @@ CONFIG_SERIAL_8250_DWLIB=y CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_PERICOM is not set CONFIG_SERIAL_OF_PLATFORM=y # @@ -2496,6 +2856,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_SIFIVE is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set @@ -2503,6 +2864,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_XILINX_PS_UART is not set # CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set @@ -2512,6 +2874,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_N_GSM is not set +# CONFIG_NOZOMI is not set # CONFIG_NULL_TTY is not set # CONFIG_HVC_DCC is not set CONFIG_SERIAL_DEV_BUS=y @@ -2528,6 +2891,8 @@ CONFIG_HW_RANDOM_OPTEE=m # CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m +# CONFIG_HW_RANDOM_CN10K is not set +# CONFIG_APPLICOM is not set CONFIG_DEVMEM=y CONFIG_DEVPORT=y # CONFIG_TCG_TPM is not set @@ -2540,7 +2905,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=m @@ -2566,6 +2930,25 @@ CONFIG_I2C_ALGOBIT=m # I2C Hardware Bus support # +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + # # I2C system bus drivers (mostly embedded / system-on-chip) # @@ -2574,6 +2957,7 @@ CONFIG_I2C_ALGOBIT=m CONFIG_I2C_DESIGNWARE_CORE=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_HISI is not set @@ -2584,6 +2968,7 @@ CONFIG_I2C_IMX_LPI2C=y # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_RK3X is not set # CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set # CONFIG_I2C_XILINX is not set # @@ -2591,6 +2976,7 @@ CONFIG_I2C_IMX_LPI2C=y # # CONFIG_I2C_DIOLAN_U2C is not set # CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set @@ -2626,6 +3012,7 @@ CONFIG_SPI_BITBANG=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_FSL_LPSPI is not set # CONFIG_SPI_FSL_QUADSPI is not set @@ -2636,11 +3023,13 @@ CONFIG_SPI_IMX=y # CONFIG_SPI_MICROCHIP_CORE is not set # CONFIG_SPI_MICROCHIP_CORE_QSPI is not set # CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SN_F_OSPI is not set # CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set @@ -2670,10 +3059,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2692,6 +3078,7 @@ CONFIG_PINMUX=y CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -2709,9 +3096,8 @@ CONFIG_PINCTRL_IMX8QM=y CONFIG_PINCTRL_IMX8QXP=y # CONFIG_PINCTRL_IMX8DXL is not set # CONFIG_PINCTRL_IMX8ULP is not set -# CONFIG_PINCTRL_IMXRT1050 is not set +# CONFIG_PINCTRL_IMX91 is not set # CONFIG_PINCTRL_IMX93 is not set -# CONFIG_PINCTRL_IMXRT1170 is not set # # Renesas pinctrl drivers @@ -2745,6 +3131,7 @@ CONFIG_GPIO_IMX_SCU=y # CONFIG_GPIO_MB86S7X is not set CONFIG_GPIO_MXC=y # CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set CONFIG_GPIO_VF610=y @@ -2772,9 +3159,19 @@ CONFIG_GPIO_VF610=y # MFD GPIO expanders # # CONFIG_GPIO_ARIZONA is not set +# CONFIG_GPIO_CROS_EC is not set # CONFIG_GPIO_WM8994 is not set # end of MFD GPIO expanders +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + # # SPI GPIO expanders # @@ -2789,6 +3186,7 @@ CONFIG_GPIO_VF610=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2800,9 +3198,15 @@ CONFIG_GPIO_VF610=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMSTB is not set CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_GPIO_RESTART=y # CONFIG_POWER_RESET_LTC2952 is not set @@ -2813,6 +3217,7 @@ CONFIG_POWER_RESET_SYSCON=y # CONFIG_POWER_RESET_SYSCON_POWEROFF is not set # CONFIG_SYSCON_REBOOT_MODE is not set # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2831,6 +3236,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set @@ -2856,9 +3262,11 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_RT9471 is not set # CONFIG_CHARGER_CROS_USBPD is not set # CONFIG_CHARGER_CROS_PCHG is not set +# CONFIG_FUEL_GAUGE_STC3117 is not set # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2868,7 +3276,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -2885,17 +3292,22 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set +# CONFIG_SENSORS_CROS_EC is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2903,15 +3315,19 @@ CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2919,6 +3335,7 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -2932,7 +3349,6 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -2964,14 +3380,17 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -2980,6 +3399,7 @@ CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SHT3x is not set # CONFIG_SENSORS_SHT4x is not set # CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set @@ -2999,6 +3419,7 @@ CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3008,7 +3429,9 @@ CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_TMP464 is not set # CONFIG_SENSORS_TMP513 is not set +# CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set # CONFIG_SENSORS_W83773G is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set @@ -3022,10 +3445,11 @@ CONFIG_SENSORS_PWM_FAN=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3059,6 +3483,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set +# CONFIG_CROS_EC_WATCHDOG is not set # CONFIG_GPIO_WATCHDOG is not set # CONFIG_XILINX_WATCHDOG is not set # CONFIG_XILINX_WINDOW_WATCHDOG is not set @@ -3072,22 +3497,40 @@ CONFIG_IMX2_WDT=y # CONFIG_IMX_SC_WDT is not set # CONFIG_IMX7ULP_WDT is not set # CONFIG_ARM_SMC_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_HP_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + # # USB-based Watchdog Cards # # CONFIG_USBPCWATCHDOG is not set CONFIG_SSB_POSSIBLE=y CONFIG_SSB=m +CONFIG_SSB_SPROM=y CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_B43_PCI_BRIDGE=y CONFIG_SSB_SDIOHOST_POSSIBLE=y # CONFIG_SSB_SDIOHOST is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y # CONFIG_SSB_DRIVER_GPIO is not set CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=m CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +# CONFIG_BCMA_HOST_PCI is not set # CONFIG_BCMA_HOST_SOC is not set +# CONFIG_BCMA_DRIVER_PCI is not set # CONFIG_BCMA_DRIVER_GMAC_CMN is not set # CONFIG_BCMA_DRIVER_GPIO is not set # CONFIG_BCMA_DEBUG is not set @@ -3096,6 +3539,7 @@ CONFIG_BCMA_BLOCKIO=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3124,17 +3568,22 @@ CONFIG_MFD_CROS_EC_DEV=y # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set # CONFIG_MFD_IQS62X is not set +# CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3151,8 +3600,8 @@ CONFIG_MFD_CROS_EC_DEV=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set +# CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RT5120 is not set @@ -3192,6 +3641,7 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set # CONFIG_MFD_LOCHNAGAR is not set CONFIG_MFD_ARIZONA=m CONFIG_MFD_ARIZONA_I2C=m @@ -3209,12 +3659,16 @@ CONFIG_MFD_WM8994=y CONFIG_MFD_ROHM_BD718XX=y # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3224,6 +3678,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3248,6 +3703,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -3264,6 +3720,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set CONFIG_REGULATOR_PFUZE100=y # CONFIG_REGULATOR_PV88060 is not set @@ -3335,15 +3792,15 @@ CONFIG_IR_TTUSBIR=m CONFIG_RC_ATI_REMOTE=m # CONFIG_RC_LOOPBACK is not set CONFIG_RC_XBOX_DVD=m -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y # # CEC support # CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set # CONFIG_CEC_CROS_EC is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set # CONFIG_USB_PULSE8_CEC is not set # CONFIG_USB_RAINSHADOW_CEC is not set # end of CEC support @@ -3393,7 +3850,6 @@ CONFIG_V4L2_ASYNC=m # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3497,6 +3953,8 @@ CONFIG_DVB_USB_UMT_010=m CONFIG_DVB_USB_VP702X=m CONFIG_DVB_USB_VP7045=m CONFIG_SMS_USB_DRV=m +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set # # Webcam, TV (analog/digital) USB devices @@ -3513,6 +3971,7 @@ CONFIG_VIDEO_EM28XX_RC=m # CONFIG_USB_AIRSPY is not set # CONFIG_USB_HACKRF is not set # CONFIG_USB_MSI2500 is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set # CONFIG_RADIO_ADAPTERS is not set CONFIG_MEDIA_PLATFORM_DRIVERS=y # CONFIG_V4L_PLATFORM_DRIVERS is not set @@ -3569,6 +4028,10 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3589,6 +4052,11 @@ CONFIG_VIDEO_IMX8_JPEG=m # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3617,6 +4085,7 @@ CONFIG_VIDEO_IMX8_JPEG=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_HEVC_RFC=y CONFIG_VIDEO_HANTRO_IMX8M=y # @@ -3663,7 +4132,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=m CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3672,6 +4146,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3682,6 +4157,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -3707,6 +4183,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -3725,10 +4202,16 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3798,6 +4281,7 @@ CONFIG_VIDEO_SAA711X=m # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -3858,6 +4342,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4085,37 +4571,43 @@ CONFIG_DVB_SP2=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y -CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4124,9 +4616,17 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_KOMEDA is not set # end of ARM devices +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set +# CONFIG_DRM_VMWGFX is not set # CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_QXL is not set CONFIG_DRM_PANEL=y # @@ -4136,12 +4636,9 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set @@ -4149,17 +4646,21 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +CONFIG_DRM_PANEL_EDP=y +CONFIG_DRM_PANEL_SIMPLE=y # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set @@ -4176,6 +4677,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set CONFIG_DRM_FSL_LDB=m +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4200,6 +4703,7 @@ CONFIG_DRM_FSL_LDB=m # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4210,29 +4714,29 @@ CONFIG_DRM_FSL_LDB=m # CONFIG_DRM_I2C_ADV7511 is not set # CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_CDNS_MHDP=y -CONFIG_DRM_CDNS_HDMI=y -CONFIG_DRM_CDNS_DP=y -CONFIG_DRM_CDNS_AUDIO=y -CONFIG_DRM_CDNS_HDMI_HDCP=y -CONFIG_DRM_CDNS_HDMI_CEC=y +CONFIG_DRM_CDNS_MHDP8501=y +# CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE is not set +# CONFIG_DRM_IMX8MP_HDMI_PVI is not set # CONFIG_DRM_IMX8QM_LDB is not set # CONFIG_DRM_IMX8QXP_LDB is not set # CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set +# CONFIG_DRM_IMX93_MIPI_DSI is not set # end of Display Interface Bridges CONFIG_DRM_IMX_DCSS=y # CONFIG_DRM_IMX_LCDC is not set -CONFIG_DRM_IMX_CDNS_MHDP=y CONFIG_DRM_ETNAVIV=y CONFIG_DRM_ETNAVIV_THERMAL=y +# CONFIG_DRM_HISI_HIBMC is not set # CONFIG_DRM_HISI_KIRIN is not set # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_MXSFB is not set # CONFIG_DRM_IMX_LCDIF is not set # CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_PANEL_MIPI_DBI is not set # CONFIG_DRM_SIMPLEDRM is not set @@ -4243,49 +4747,72 @@ CONFIG_DRM_ETNAVIV_THERMAL=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_LIMA is not set # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y -CONFIG_FB_ARMCLCD=y +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set # CONFIG_FB_IMX is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set CONFIG_FB_CORE=y CONFIG_FB_NOTIFY=y # CONFIG_FIRMWARE_EDID is not set CONFIG_FB_DEVICE=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y -CONFIG_FB_SYSMEM_HELPERS=y -CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # end of Frame buffer Devices @@ -4296,14 +4823,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4348,10 +4878,10 @@ CONFIG_SND_MAX_CARDS=32 # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4361,6 +4891,7 @@ CONFIG_SND_DRIVERS=y # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_SERIAL_GENERIC is not set # CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set # # HD-Audio @@ -4406,7 +4937,6 @@ CONFIG_SND_IMX_SOC=y # CONFIG_SND_SOC_IMX_ES8328=y CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_IMX_SPDIF=y CONFIG_SND_SOC_FSL_ASOC_CARD=y CONFIG_SND_SOC_IMX_AUDMIX=y CONFIG_SND_SOC_IMX_HDMI=y @@ -4415,8 +4945,15 @@ CONFIG_SND_SOC_IMX_CARD=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4437,6 +4974,7 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4449,6 +4987,7 @@ CONFIG_SND_SOC_WM_HUBS=y CONFIG_SND_SOC_AK4458=y # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set CONFIG_SND_SOC_AK5558=y @@ -4456,7 +4995,11 @@ CONFIG_SND_SOC_AK5558=y # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4478,6 +5021,7 @@ CONFIG_SND_SOC_AK5558=y # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4488,13 +5032,16 @@ CONFIG_SND_SOC_AK5558=y # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y CONFIG_SND_SOC_ES7134=y # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=y CONFIG_SND_SOC_ES8328_I2C=y @@ -4503,7 +5050,6 @@ CONFIG_SND_SOC_ES8328_SPI=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -4530,17 +5076,19 @@ CONFIG_SND_SOC_ES8328_SPI=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set CONFIG_SND_SOC_SGTL5000=y # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4579,6 +5127,7 @@ CONFIG_SND_SOC_TLV320AIC31XX=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set CONFIG_SND_SOC_WM8524=y @@ -4609,6 +5158,7 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4617,6 +5167,8 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4672,12 +5224,14 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_HAMMER is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4691,7 +5245,6 @@ CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -CONFIG_HID_LENOVO=y # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y @@ -4714,7 +5267,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -4752,6 +5304,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -4766,6 +5319,11 @@ CONFIG_HID_ZYDACRON=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4774,10 +5332,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4786,6 +5340,7 @@ CONFIG_USB_COMMON=y # CONFIG_USB_CONN_GPIO is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y +# CONFIG_USB_PCI is not set CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # @@ -4800,6 +5355,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=m # @@ -4808,7 +5364,6 @@ CONFIG_USB_MON=m # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4835,11 +5390,7 @@ CONFIG_USB_ACM=m # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4978,7 +5529,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5056,6 +5607,7 @@ CONFIG_MMC_BLOCK_MINORS=32 # CONFIG_MMC_ARMMMCI is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y # CONFIG_MMC_SDHCI_OF_ARASAN is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set @@ -5066,13 +5618,17 @@ CONFIG_MMC_SDHCI_ESDHC_IMX=y # CONFIG_MMC_SDHCI_F_SDH30 is not set # CONFIG_MMC_SDHCI_MILBEAUT is not set # CONFIG_MMC_MXC is not set +# CONFIG_MMC_TIFM_SD is not set CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set # CONFIG_MMC_DW is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=y # CONFIG_MMC_HSQ is not set +# CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set # CONFIG_SCSI_UFSHCD is not set @@ -5092,6 +5648,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_CROS_EC is not set # CONFIG_LEDS_EL15203000 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set @@ -5104,6 +5661,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5128,6 +5686,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5139,11 +5698,14 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # @@ -5157,6 +5719,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # @@ -5167,11 +5730,11 @@ CONFIG_LEDS_TRIGGER_CPU=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5205,6 +5768,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set @@ -5221,6 +5785,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5228,6 +5793,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_S5M is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5317,14 +5883,18 @@ CONFIG_IMX_SDMA=m # CONFIG_MV_XOR_V2 is not set # CONFIG_MXS_DMA is not set CONFIG_PL330_DMA=m +# CONFIG_PLX_DMA is not set # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=m CONFIG_DW_DMAC=m +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set # CONFIG_SF_PDMA is not set # @@ -5365,11 +5935,7 @@ CONFIG_VHOST_MENU=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set # CONFIG_RTL8723BS is not set -# CONFIG_R8712U is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5379,7 +5945,6 @@ CONFIG_STAGING=y # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5406,30 +5971,28 @@ CONFIG_STAGING=y # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers +# CONFIG_FB_SM750 is not set CONFIG_STAGING_MEDIA=y +# CONFIG_DVB_AV7110 is not set # CONFIG_VIDEO_MAX96712 is not set + +# +# StarFive media platform drivers +# CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_OF_HW_PROBER is not set CONFIG_CROS_EC=y # CONFIG_CROS_EC_I2C is not set # CONFIG_CROS_EC_SPI is not set @@ -5445,6 +6008,7 @@ CONFIG_CROS_EC_SYSFS=y CONFIG_CROS_USBPD_NOTIFY=y # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -5487,6 +6051,7 @@ CONFIG_CLK_IMX8MQ=y CONFIG_CLK_IMX8QXP=y # CONFIG_CLK_IMX8ULP is not set # CONFIG_CLK_IMX93 is not set +# CONFIG_CLK_IMX95_BLK_CTL is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_HWSPINLOCK is not set @@ -5509,6 +6074,7 @@ CONFIG_TIMER_IMX_SYS_CTR=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y # CONFIG_ARM_MHU_V2 is not set +CONFIG_ARM_MHU_V3=m CONFIG_IMX_MBOX=y CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set @@ -5565,9 +6131,10 @@ CONFIG_IOMMU_DMA=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers +CONFIG_CDNS_MHDP_HELPER=y + # # NXP/Freescale QorIQ SoC drivers # @@ -5584,10 +6151,8 @@ CONFIG_FSL_GUTS=y # # i.MX SoC drivers # -CONFIG_IMX_GPCV2_PM_DOMAINS=y CONFIG_SOC_IMX8M=y # CONFIG_SOC_IMX9 is not set -CONFIG_IMX8M_BLK_CTRL=y # end of i.MX SoC drivers # @@ -5611,6 +6176,36 @@ CONFIG_IMX8M_BLK_CTRL=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +CONFIG_IMX_GPCV2_PM_DOMAINS=y +CONFIG_IMX8M_BLK_CTRL=y +CONFIG_IMX_SCU_PD=y +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5636,6 +6231,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -5666,6 +6262,8 @@ CONFIG_IIO=y # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5702,37 +6300,49 @@ CONFIG_IIO=y # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_IMX7D_ADC is not set # CONFIG_IMX8QXP_ADC is not set # CONFIG_IMX93_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5744,11 +6354,15 @@ CONFIG_IIO=y # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set @@ -5759,8 +6373,11 @@ CONFIG_IIO=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5804,10 +6421,12 @@ CONFIG_IIO=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -5841,6 +6460,7 @@ CONFIG_IIO=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5852,6 +6472,7 @@ CONFIG_IIO=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5864,17 +6485,21 @@ CONFIG_IIO=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -5910,6 +6535,7 @@ CONFIG_IIO=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -5952,8 +6578,10 @@ CONFIG_IIO=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5967,8 +6595,13 @@ CONFIG_IIO=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -5978,6 +6611,7 @@ CONFIG_IIO=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -5987,11 +6621,15 @@ CONFIG_IIO=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6004,10 +6642,11 @@ CONFIG_IIO=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6016,6 +6655,7 @@ CONFIG_IIO=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6031,8 +6671,11 @@ CONFIG_IIO=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6040,9 +6683,11 @@ CONFIG_IIO=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6052,6 +6697,7 @@ CONFIG_IIO=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6099,10 +6745,12 @@ CONFIG_IIO=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6110,6 +6758,7 @@ CONFIG_IIO=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6126,6 +6775,7 @@ CONFIG_IIO=y # Proximity and distance sensors # # CONFIG_CROS_EC_MKBP_PROXIMITY is not set +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6140,6 +6790,7 @@ CONFIG_IIO=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6147,6 +6798,7 @@ CONFIG_IIO=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6156,6 +6808,7 @@ CONFIG_IIO=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6164,15 +6817,18 @@ CONFIG_IIO=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors +# CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_CROS_EC is not set +# CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_IMX1 is not set # CONFIG_PWM_IMX27 is not set # CONFIG_PWM_IMX_TPM is not set @@ -6185,8 +6841,10 @@ CONFIG_PWM_SYSFS=y CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set CONFIG_IMX_GPCV2=y @@ -6198,7 +6856,10 @@ CONFIG_IMX_INTMUX=y # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set +# CONFIG_RESET_IMX_SCU is not set CONFIG_RESET_IMX7=y +# CONFIG_RESET_IMX8MP_AUDIOMIX is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6208,6 +6869,7 @@ CONFIG_RESET_IMX7=y # CONFIG_GENERIC_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6224,9 +6886,11 @@ CONFIG_PHY_FSL_IMX8MQ_USB=y # CONFIG_PHY_MIXEL_LVDS_PHY is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set CONFIG_PHY_FSL_IMX8M_PCIE=y +CONFIG_PHY_FSL_IMX8MQ_HDPTX=y +# CONFIG_PHY_FSL_IMX8QM_HSIO is not set +# CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6242,6 +6906,7 @@ CONFIG_PHY_FSL_IMX8M_PCIE=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y # CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ARM_PMUV3=y @@ -6249,10 +6914,14 @@ CONFIG_ARM_PMUV3=y CONFIG_FSL_IMX8_DDR_PMU=y # CONFIG_FSL_IMX9_DDR_PMU is not set # CONFIG_ARM_SPE_PMU is not set +# CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set +# CONFIG_DWC_PCIE_PMU is not set # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set # end of Performance monitor support # CONFIG_RAS is not set +# CONFIG_USB4 is not set # # Android @@ -6264,12 +6933,14 @@ CONFIG_FSL_IMX8_DDR_PMU=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_IMX_IIM is not set @@ -6285,6 +6956,7 @@ CONFIG_NVMEM_U_BOOT_ENV=m # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set # end of HW tracing support # CONFIG_FPGA is not set @@ -6309,6 +6981,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6321,7 +6994,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6340,10 +7012,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m @@ -6354,6 +7026,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6364,11 +7037,14 @@ CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set # CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m # CONFIG_CUSE is not set # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6380,12 +7056,6 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # # Caches # -CONFIG_NETFS_SUPPORT=y -# CONFIG_NETFS_STATS is not set -CONFIG_FSCACHE=y -# CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_CACHEFILES is not set # end of Caches # @@ -6408,11 +7078,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6473,7 +7143,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6491,7 +7160,7 @@ CONFIG_PNFS_FLEXFILE_LAYOUT=y CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" CONFIG_NFS_V4_1_MIGRATION=y CONFIG_ROOT_NFS=y -CONFIG_NFS_FSCACHE=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -6577,6 +7246,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -6584,10 +7254,9 @@ CONFIG_KEY_DH_OPERATIONS=y CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_FORCE_PTRACE is not set # CONFIG_PROC_MEM_NO_FORCE is not set +CONFIG_MSEAL_SYSTEM_MAPPINGS=y # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" @@ -6612,6 +7281,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6658,6 +7334,7 @@ CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=y CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set # end of Crypto core or helper @@ -6671,7 +7348,6 @@ CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -6704,14 +7380,11 @@ CONFIG_CRYPTO_SM4=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_CHACHA20=y CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=y CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set # end of Length-preserving ciphers and modes @@ -6748,7 +7421,6 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6759,7 +7431,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRCT10DIF=y # end of CRCs (cyclic redundancy checks) # @@ -6783,7 +7454,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6806,7 +7479,7 @@ CONFIG_CRYPTO_CHACHA20_NEON=y # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y @@ -6836,6 +7509,16 @@ CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_CCP is not set # CONFIG_CRYPTO_DEV_MXS_DCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set +# CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set +# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_CCREE is not set # CONFIG_CRYPTO_DEV_HISI_SEC is not set @@ -6859,6 +7542,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6876,7 +7560,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -6892,12 +7575,15 @@ CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=y CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y @@ -6906,20 +7592,14 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC7=y -CONFIG_LIBCRC32C=m CONFIG_CRC8=m +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set @@ -6934,10 +7614,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_IA64 is not set # CONFIG_XZ_DEC_ARM is not set # CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_ARM64 is not set # CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_RISCV is not set # CONFIG_XZ_DEC_MICROLZMA is not set # CONFIG_XZ_DEC_TEST is not set CONFIG_GENERIC_ALLOCATOR=y @@ -6945,21 +7626,23 @@ CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -6969,7 +7652,7 @@ CONFIG_DMA_CMA=y # # Default contiguous memory area size: # -CONFIG_CMA_SIZE_MBYTES=256 +CONFIG_CMA_SIZE_MBYTES=384 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set @@ -6986,11 +7669,14 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7009,11 +7695,14 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7041,7 +7730,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7072,7 +7761,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -7085,6 +7774,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7099,7 +7789,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7109,12 +7799,14 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y @@ -7140,6 +7832,7 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_DETECT_HUNG_TASK_BLOCKER=y # CONFIG_WQ_WATCHDOG is not set # CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set @@ -7148,12 +7841,9 @@ CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # @@ -7205,14 +7895,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7247,3 +7940,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/NXP/devices/iMX8/patches/linux/0001-Initial-support-Cadence-MHDP8501-HDMI-DP-for-i-MX8MQ.patch b/projects/NXP/devices/iMX8/patches/linux/0001-Initial-support-Cadence-MHDP8501-HDMI-DP-for-i-MX8MQ.patch new file mode 100644 index 0000000000..02f0c17ec2 --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0001-Initial-support-Cadence-MHDP8501-HDMI-DP-for-i-MX8MQ.patch @@ -0,0 +1,6735 @@ +From patchwork Tue Dec 17 06:51:43 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [PATCH v20 0/8] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ +From: Sandor Yu +Message-Id: +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:42 +0800 + +The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge +driver and Cadence HDP-TX PHY(HDMI/DP) driver for Freescale i.MX8MQ. + +The patch set compose of DRM bridge drivers and PHY driver. + +Both of them need by patch #1 and #3 to pass build. + +DRM bridges driver patches: + #1: soc: cadence: Create helper functions for Cadence MHDP + #2: drm: bridge: cadence: Update mhdp8546 mailbox access functions + #3: phy: Add HDMI configuration options + #4: dt-bindings: display: bridge: Add Cadence MHDP8501 + #5: drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver + +PHY driver patches: + #1: soc: cadence: Create helper functions for Cadence MHDP + #3: phy: Add HDMI configuration options + #6: dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY + #7: phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for i.MX8MQ + +i.MX8M/TQMa8Mx DT patches: + #8: Add DT nodes for DCSS/HDMI pipeline + #9: Enable HDMI for TQMa8Mx/MBa8Mx + +v19->v20: +Patch #1: soc: cadence: Create helper functions for Cadence MHDP +Patch #2: drm: bridge: cadence: Update mhdp8546 mailbox access functions +- The two patches are split from Patch #1 in v19. + The MHDP helper functions have been moved in a new "cadence" directory + under the SOC directory in patch #1, in order to promote code reuse + among MHDP8546, MHDP8501, and the i.MX8MQ HDMI/DP PHY drivers, + +Patch #3: phy: Add HDMI configuration options +- Add a-b tag + +Patch #4: dt-bindings: display: bridge: Add Cadence MHDP8501 +- remove data type link of data-lanes + +Patch #5: drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver +- Dump mhdp FW version by debugfs +- Combine HDMI and DP cable detect functions into one function +- Combine HDMI and DP cable bridge_mode_valid() functions into one function +- Rename cdns_hdmi_reset_link() to cdns_hdmi_handle_hotplug() +- Add comments for EDID in cdns_hdmi_handle_hotplug() and cdns_dp_check_link_state() +- Add atomic_get_input_bus_fmts() and bridge_atomic_check() for DP driver +- Remove bpc and color_fmt init in atomic_enable() function. +- More detail comments for DDC adapter only support SCDC_I2C_SLAVE_ADDRESS + read and write in HDMI driver. + +Patch #7: phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for i.MX8MQ +- implify DP configuration handling by directly copying + the configuration options to the driver's internal structure. +- return the error code directly instead of logging an error message in `hdptx_clk_enable` +- Remove redundant ref_clk_rate check + + +v18->v19: +Patch #1 +- use guard(mutex) +- Add kerneldocs for all new APIs. +- Detail comments for mailbox access specific case. +- remove cdns_mhdp_dp_reg_write() because it is not needed by driver now. + +Patch #3 +- move property data-lanes to endpoint of port@1 + +Patch #4 +- get endpoint for data-lanes as it had move to endpoint of port@1 +- update clock management as devm_clk_get_enabled() introduced. +- Fix clear_infoframe() function is not work issue. +- Manage PHY power state via phy_power_on() and phy_power_off(). + +Patch #6 +- Simplify the PLL table by removing unused and constant data +- Remove PHY power management, controller driver will handle them. +- Remove enum dp_link_rate +- introduce read_pll_timeout. +- update clock management as devm_clk_get_enabled() introduced. +- remove cdns_hdptx_phy_init() and cdns_hdptx_phy_remove(). + +Patch #8: +- move property data-lanes to endpoint of port@1 + +v17->v18: +Patch #1 +- Create three ordinary mailbox access APIs + cdns_mhdp_mailbox_send + cdns_mhdp_mailbox_send_recv + cdns_mhdp_mailbox_send_recv_multi +- Create three secure mailbox access APIs + cdns_mhdp_secure_mailbox_send + cdns_mhdp_secure_mailbox_send_recv + cdns_mhdp_secure_mailbox_send_recv_multi +- MHDP8546 DP and HDCP commands that need access mailbox are rewrited + with above 6 API functions. + +Patch #3 +- remove lane-mapping and replace it with data-lanes +- remove r-b tag as property changed. + +Patch #4 +- MHDP8501 HDMI and DP commands that need access mailbox are rewrited + with new API functions created in patch #1. +- replace lane-mapping with data-lanes, use the value from data-lanes + to reorder HDMI and DP lane mapping. +- create I2C adapter for HDMI SCDC, remove cdns_hdmi_scdc_write() function. +- Rewrite cdns_hdmi_sink_config() function, use HDMI SCDC helper function + drm_scdc_set_high_tmds_clock_ratio() and drm_scdc_set_scrambling() + to config HDMI sink TMDS. +- Remove struct video_info from HDMI driver. +- Remove tmds_char_rate_valid() be called in bridge_mode_valid(), + community had patch in reviewing to implement the function. +- Remove warning message print when get unknown HPD cable status. +- Add more detail comments for HDP plugin and plugout interrupt. +- use dev_dbg to repleace DRM_INFO when cable HPD status changed. +- Remove t-b tag as above code change. + +Patch #6 +- fix build error as code rebase to latest kernel version. + +Patch #8: +- replace lane-mapping with data-lanes + + +v16->v17: +Patch #1: +- Replaces the local mutex mbox_mutex with a global mutex mhdp_mailbox_mutex +Patch #2: +- remove hdmi.h +- add 2024 year to copyright +- Add r-b tag. +Patch #3: +- Add lane-mapping property. +Patch #4: +- Reset the HDMI/DP link when an HPD (Hot Plug Detect) event is detected +- Move the HDMI protocol settings from hdmi_ctrl_init() to a new function + cdns_hdmi_set_hdmi_mode_type(), to align with the introduced link reset functionality. +- Implement logic to check the type of HDMI sink. + If the sink is not a hdmi display, set the default mode to DVI. +- Implement hdmi_reset_infoframe function +- Reorder certain bit definitions in the header file to follow a descending order. +- Add "lane-mapping" property for both HDMI and DP, remove platform data from driver. + lane-mapping should be setting in dts according different board layout. +- Remove variable mode in struct cdns_mhdp8501_device, video mode could get from struct drm_crtc_state +- Remove variable char_rate in struct cdns_mhdp8501_device, it could get from struct struct drm_connector_state.hdmi +- Replaces the local mutex mbox_mutex with a global mutex mhdp_mailbox_mutex +- Remove mutext protect for phy_api access functions. +Patch #6: +- Remove mbox_mutex + +v15->v16: +Patch #2: +- Remove pixel_clk_rate, bpc and color_space fields from struct + phy_configure_opts_hdmi, they were replaced by + unsigned long long tmds_char_rate. +- Remove r-b and a-c tags because this patch have important change. +Patch #4: +- Add DRM_BRIDGE_OP_HDMI flags for HDMI driver, +- Introduce the hdmi info frame helper functions, + added hdmi_clear_infoframe(), hdmi_write_infoframe() and + hdmi_tmds_char_rate_valid() according Dmitry's patch + 'make use of the HDMI connector infrastructure' patchset ([2]). +- mode_fixup() is replaced by atomic_check(). +- Fix video mode 4Kp30 did not work on some displays that support + LTE_340Mcsc_scramble. +- updated for tmds_char_rate added in patch #2. +Patch #6: +- updated for tmds_char_rate added in patch #2. + +v14->v15: +Patch #6 + #7: +- Merged PHY driver into a single combo PHY driver +Patch #7 + #8: +- Add DT patches for a running HDMI setup + +v13->v14: +Patch #4: +- Rebase to next-20240219, replace get_edid function by edid_read + function as commits d807ad80d811b ("drm/bridge: add ->edid_read + hook and drm_bridge_edid_read()") and 27b8f91c08d99 ("drm/bridge: + remove ->get_edid callback") had change the API. + +v12->v13: +Patch #4: +- Explicitly include linux/platform_device.h for cdns-mhdp8501-core.c +- Fix build warning +- Order bit bpc and color_space in descending shit. +Patch #7: +- Fix build warning + +v11->v12: +Patch #1: +- Move status initialize out of mbox_mutex. +- Reorder API functions in alphabetical. +- Add notes for malibox access functions. +- Add year 2024 to copyright. +Patch #4: +- Replace DRM_INFO with dev_info or dev_warn. +- Replace DRM_ERROR with dev_err. +- Return ret when cdns_mhdp_dpcd_read failed in function cdns_dp_aux_transferi(). +- Remove unused parmeter in function cdns_dp_get_msa_misc + and use two separate variables for color space and bpc. +- Add year 2024 to copyright. +Patch #6: +- Return error code to replace -1 for function wait_for_ack(). +- Set cdns_phy->power_up = false in phy_power_down function. +- Remove "RATE_8_1 = 810000", it is not used in driver. +- Add year 2024 to copyright. +Patch #7: +- Adjust clk disable order. +- Return error code to replace -1 for function wait_for_ack(). +- Use bool for variable pclk_in. +- Add year 2024 to copyright. + +v10->v11: +- rewrite cdns_mhdp_set_firmware_active() in mhdp8546 core driver, +use cdns_mhdp_mailbox_send() to replace cdns_mhdp_mailbox_write() +same as the other mailbox access functions. +- use static for cdns_mhdp_mailbox_write() and cdns_mhdp_mailbox_read() +and remove them from EXPORT_SYMBOL_GPL(). +- remove MODULE_ALIAS() from mhdp8501 driver. + +v9->v10: +- Create mhdp helper driver to replace macro functions, +move all mhdp mailbox access functions and common functions +into the helper driver. +Patch #1:drm: bridge: Cadence: Creat mhdp helper driver +it is totaly different with v9. + +v8->v9: +- Remove compatible string "cdns,mhdp8501" that had removed + from dt-bindings file in v8. +- Add Dmitry's R-b tag to patch #2 +- Add Krzysztof's R-b tag to patch #3 + +v7->v8: +MHDP8501 HDMI/DP: +- Correct DT node name to "display-bridge". +- Remove "cdns,mhdp8501" from mhdp8501 dt-binding doc. + +HDMI/DP PHY: +- Introduced functions `wait_for_ack` and `wait_for_ack_clear` to handle + waiting with acknowledgment bits set and cleared respectively. +- Use FIELD_PRE() to set bitfields for both HDMI and DP PHY. + +v6->v7: +MHDP8501 HDMI/DP: +- Combine HDMI and DP driver into one mhdp8501 driver. + Use the connector type to load the corresponding functions. +- Remove connector init functions. +- Add in phy_hdmi.h to reuse 'enum hdmi_colorspace'. + +HDMI/DP PHY: +- Lowercase hex values +- Fix parameters indent issue on some functions +- Replace 'udelay' with 'usleep_range' + +v5->v6: +HDMI/DP bridge driver +- 8501 is the part number of Cadence MHDP on i.MX8MQ. + Use MHDP8501 to name hdmi/dp drivers and files. +- Add compatible "fsl,imx8mq-mhdp8501-dp" for i.MX8MQ DP driver +- Add compatible "fsl,imx8mq-mhdp8501-hdmi" for i.MX8MQ HDMI driver +- Combine HDMI and DP dt-bindings into one file cdns,mhdp8501.yaml +- Fix HDMI scrambling is not enable issue when driver working in 4Kp60 + mode. +- Add HDMI/DP PHY API mailbox protect. + +HDMI/DP PHY driver: +- Rename DP and HDMI PHY files and move to folder phy/freescale/ +- Remove properties num_lanes and link_rate from DP PHY driver. +- Combine HDMI and DP dt-bindings into one file fsl,imx8mq-dp-hdmi-phy.yaml +- Update compatible string to "fsl,imx8mq-dp-phy". +- Update compatible string to "fsl,imx8mq-hdmi-phy". + +v4->v5: +- Drop "clk" suffix in clock name. +- Add output port property in the example of hdmi/dp. + +v3->v4: +dt-bindings: +- Correct dt-bindings coding style and address review comments. +- Add apb_clk description. +- Add output port for HDMI/DP connector +PHY: +- Alphabetically sorted in Kconfig and Makefile for DP and HDMI PHY +- Remove unused registers define from HDMI and DP PHY drivers. +- More description in phy_hdmi.h. +- Add apb_clk to HDMI and DP phy driver. +HDMI/DP: +- Use get_unaligned_le32() to replace hardcode type conversion + in HDMI AVI infoframe data fill function. +- Add mailbox mutex lock in HDMI/DP driver for phy functions + to reslove race conditions between HDMI/DP and PHY drivers. +- Add apb_clk to both HDMI and DP driver. +- Rename some function names and add prefix with "cdns_hdmi/cdns_dp". +- Remove bpc 12 and 16 optional that not supported. + +v2->v3: +Address comments for dt-bindings files. +- Correct dts-bindings file names + Rename phy-cadence-hdptx-dp.yaml to cdns,mhdp-imx8mq-dp.yaml + Rename phy-cadence-hdptx-hdmi.yaml to cdns,mhdp-imx8mq-hdmi.yaml +- Drop redundant words and descriptions. +- Correct hdmi/dp node name. + +v2 is a completely different version compared to v1. +Previous v1 can be available here [1]. + +v1->v2: +- Reuse Cadence mailbox access functions from mhdp8546 instead of + rockchip DP. +- Mailbox access functions be convert to marco functions + that will be referenced by HDP-TX PHY(HDMI/DP) driver too. +- Plain bridge instead of component driver. +- Standalone Cadence HDP-TX PHY(HDMI/DP) driver. +- Audio driver are removed from the patch set, it will be add in another + patch set later. + +[1] https://patchwork.kernel.org/project/linux-rockchip/cover/cover.1590982881.git.Sandor.yu@nxp.com/ + +Alexander Stein (2): + arm64: dts: imx8mq: Add DCSS + HDMI/DP display pipeline + arm64: dts: imx8mq: tqma8mq-mba8mx: Enable HDMI support + +Sandor Yu (7): + soc: cadence: Create helper functions for Cadence MHDP + drm: bridge: cadence: Update mhdp8546 mailbox access functions + phy: Add HDMI configuration options + dt-bindings: display: bridge: Add Cadence MHDP8501 + drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver + dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY + phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for i.MX8MQ + + .../display/bridge/cdns,mhdp8501.yaml | 121 ++ + .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 51 + + .../dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 26 + + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 68 + + arch/arm64/boot/dts/freescale/mba8mx.dtsi | 11 + + drivers/gpu/drm/bridge/cadence/Kconfig | 17 + + drivers/gpu/drm/bridge/cadence/Makefile | 2 + + .../drm/bridge/cadence/cdns-mhdp8501-core.c | 379 +++++ + .../drm/bridge/cadence/cdns-mhdp8501-core.h | 380 +++++ + .../gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c | 694 ++++++++++ + .../drm/bridge/cadence/cdns-mhdp8501-hdmi.c | 745 ++++++++++ + .../drm/bridge/cadence/cdns-mhdp8546-core.c | 487 ++----- + .../drm/bridge/cadence/cdns-mhdp8546-core.h | 47 +- + .../drm/bridge/cadence/cdns-mhdp8546-hdcp.c | 212 +-- + .../drm/bridge/cadence/cdns-mhdp8546-hdcp.h | 18 +- + drivers/phy/freescale/Kconfig | 10 + + drivers/phy/freescale/Makefile | 1 + + drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c | 1231 +++++++++++++++++ + drivers/soc/Kconfig | 1 + + drivers/soc/Makefile | 1 + + drivers/soc/cadence/Kconfig | 9 + + drivers/soc/cadence/Makefile | 3 + + drivers/soc/cadence/cdns-mhdp-helper.c | 565 ++++++++ + include/linux/phy/phy-hdmi.h | 19 + + include/linux/phy/phy.h | 7 +- + include/soc/cadence/cdns-mhdp-helper.h | 129 ++ + 26 files changed, 4572 insertions(+), 662 deletions(-) + create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml + create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c + create mode 100644 drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c + create mode 100644 drivers/soc/cadence/Kconfig + create mode 100644 drivers/soc/cadence/Makefile + create mode 100644 drivers/soc/cadence/cdns-mhdp-helper.c + create mode 100644 include/linux/phy/phy-hdmi.h + create mode 100644 include/soc/cadence/cdns-mhdp-helper.h + +-- +2.34.1 + + + +From patchwork Tue Dec 17 06:51:43 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,1/9] soc: cadence: Create helper functions for Cadence MHDP +From: Sandor Yu +X-Patchwork-Id: 629288 +Message-Id: + <7fd5d54e2594aadd66598888ddf512f3d6d30e5d.1734340233.git.Sandor.yu@nxp.com> +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:43 +0800 + +Cadence MHDP IP includes a firmware. Driver and firmware communicate +through a mailbox. The basic mailbox access functions in this patch +are derived from the DRM bridge MHDP8546 driver. +New mailbox access functions have been created based on different mailbox +return values and security types, making them reusable across different +MHDP driver versions and SOCs. + +These helper fucntions will be reused in both the DRM bridge driver MDHP8501 +and the i.MX8MQ HDPTX PHY driver. + +Six mailbox access helper functions are introduced. +Three for non-secure mailbox access: + - cdns_mhdp_mailbox_send() + - cdns_mhdp_mailbox_send_recv() + - cdns_mhdp_mailbox_send_recv_multi() +The other three for secure mailbox access: + - cdns_mhdp_secure_mailbox_send() + - cdns_mhdp_secure_mailbox_send_recv() + - cdns_mhdp_secure_mailbox_send_recv_multi() + +All MHDP commands that need to be passed through the mailbox +should be rewritten using these new helper functions. + +The register read/write and DP DPCD read/write command functions +are also included in this new helper driver. + +Signed-off-by: Sandor Yu +--- +v19->v20: +- new patch in v20. + The patch split from Patch #1 in v19 and move to a new folder drivers/soc/cadence + + drivers/soc/Kconfig | 1 + + drivers/soc/Makefile | 1 + + drivers/soc/cadence/Kconfig | 9 + + drivers/soc/cadence/Makefile | 3 + + drivers/soc/cadence/cdns-mhdp-helper.c | 565 +++++++++++++++++++++++++ + include/soc/cadence/cdns-mhdp-helper.h | 129 ++++++ + 6 files changed, 708 insertions(+) + create mode 100644 drivers/soc/cadence/Kconfig + create mode 100644 drivers/soc/cadence/Makefile + create mode 100644 drivers/soc/cadence/cdns-mhdp-helper.c + create mode 100644 include/soc/cadence/cdns-mhdp-helper.h + +diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig +index 6a8daeb8c4b96..f6c18114b2d68 100644 +--- a/drivers/soc/Kconfig ++++ b/drivers/soc/Kconfig +@@ -6,6 +6,7 @@ source "drivers/soc/apple/Kconfig" + source "drivers/soc/aspeed/Kconfig" + source "drivers/soc/atmel/Kconfig" + source "drivers/soc/bcm/Kconfig" ++source "drivers/soc/cadence/Kconfig" + source "drivers/soc/canaan/Kconfig" + source "drivers/soc/cirrus/Kconfig" + source "drivers/soc/fsl/Kconfig" +diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile +index 2037a8695cb28..a5fa4f4d15321 100644 +--- a/drivers/soc/Makefile ++++ b/drivers/soc/Makefile +@@ -7,6 +7,7 @@ obj-y += apple/ + obj-y += aspeed/ + obj-$(CONFIG_ARCH_AT91) += atmel/ + obj-y += bcm/ ++obj-y += cadence/ + obj-$(CONFIG_ARCH_CANAAN) += canaan/ + obj-$(CONFIG_EP93XX_SOC) += cirrus/ + obj-$(CONFIG_ARCH_DOVE) += dove/ +diff --git a/drivers/soc/cadence/Kconfig b/drivers/soc/cadence/Kconfig +new file mode 100644 +index 0000000000000..b668790660fa5 +--- /dev/null ++++ b/drivers/soc/cadence/Kconfig +@@ -0,0 +1,9 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++config CDNS_MHDP_HELPER ++ tristate "Cadence MHDP Helper driver" ++ help ++ Enable Cadence MHDP helpers for mailbox, HDMI and DP. ++ This driver provides a foundational layer of mailbox communication for ++ various Cadence MHDP IP implementations, such as HDMI and DisplayPort. ++ +diff --git a/drivers/soc/cadence/Makefile b/drivers/soc/cadence/Makefile +new file mode 100644 +index 0000000000000..a1f42e1936ca5 +--- /dev/null ++++ b/drivers/soc/cadence/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++obj-$(CONFIG_CDNS_MHDP_HELPER) += cdns-mhdp-helper.o +diff --git a/drivers/soc/cadence/cdns-mhdp-helper.c b/drivers/soc/cadence/cdns-mhdp-helper.c +new file mode 100644 +index 0000000000000..f74b4cae134a2 +--- /dev/null ++++ b/drivers/soc/cadence/cdns-mhdp-helper.c +@@ -0,0 +1,565 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (C) 2023, 2024 NXP Semiconductor, Inc. ++ * ++ */ ++#include ++#include ++#include ++ ++/* Protects mailbox communications with the firmware */ ++static DEFINE_MUTEX(mhdp_mailbox_mutex); ++ ++/* Mailbox helper functions */ ++static int mhdp_mailbox_read(void __iomem *regs) ++{ ++ int ret, empty; ++ ++ WARN_ON(!mutex_is_locked(&mhdp_mailbox_mutex)); ++ ++ ret = readx_poll_timeout(readl, regs + CDNS_MAILBOX_EMPTY, ++ empty, !empty, MAILBOX_RETRY_US, ++ MAILBOX_TIMEOUT_US); ++ if (ret < 0) ++ return ret; ++ ++ return readl(regs + CDNS_MAILBOX_RX_DATA) & 0xff; ++} ++ ++static int mhdp_mailbox_write(void __iomem *regs, u8 val) ++{ ++ int ret, full; ++ ++ WARN_ON(!mutex_is_locked(&mhdp_mailbox_mutex)); ++ ++ ret = readx_poll_timeout(readl, regs + CDNS_MAILBOX_FULL, ++ full, !full, MAILBOX_RETRY_US, ++ MAILBOX_TIMEOUT_US); ++ if (ret < 0) ++ return ret; ++ ++ writel(val, regs + CDNS_MAILBOX_TX_DATA); ++ ++ return 0; ++} ++ ++static int mhdp_mailbox_recv_header(void __iomem *regs, ++ u8 module_id, u8 opcode, ++ u16 req_size) ++{ ++ u32 mbox_size, i; ++ u8 header[4]; ++ int ret; ++ ++ /* read the header of the message */ ++ for (i = 0; i < sizeof(header); i++) { ++ ret = mhdp_mailbox_read(regs); ++ if (ret < 0) ++ return ret; ++ ++ header[i] = ret; ++ } ++ ++ mbox_size = get_unaligned_be16(header + 2); ++ ++ /* ++ * If the message in mailbox is not what we want, we need to ++ * clear the mailbox by reading its contents. ++ * Response data length for HDCP TX HDCP_TRAN_IS_REC_ID_VALID depend on case. ++ */ ++ if (opcode != header[0] || ++ module_id != header[1] || ++ (opcode != HDCP_TRAN_IS_REC_ID_VALID && req_size != mbox_size)) { ++ for (i = 0; i < mbox_size; i++) ++ if (mhdp_mailbox_read(regs) < 0) ++ break; ++ ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int mhdp_mailbox_recv_data(void __iomem *regs, ++ u8 *buff, u16 buff_size) ++{ ++ u32 i; ++ int ret; ++ ++ for (i = 0; i < buff_size; i++) { ++ ret = mhdp_mailbox_read(regs); ++ if (ret < 0) ++ return ret; ++ ++ buff[i] = ret; ++ } ++ ++ return 0; ++} ++ ++static int mhdp_mailbox_send(void __iomem *regs, u8 module_id, ++ u8 opcode, u16 size, u8 *message) ++{ ++ u8 header[4]; ++ int ret, i; ++ ++ header[0] = opcode; ++ header[1] = module_id; ++ put_unaligned_be16(size, header + 2); ++ ++ for (i = 0; i < sizeof(header); i++) { ++ ret = mhdp_mailbox_write(regs, header[i]); ++ if (ret) ++ return ret; ++ } ++ ++ for (i = 0; i < size; i++) { ++ ret = mhdp_mailbox_write(regs, message[i]); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++/** ++ * cdns_mhdp_mailbox_send - Sends a message via the MHDP mailbox. ++ * ++ * This function sends a message via the MHDP mailbox. ++ * ++ * @base: Pointer to the CDNS MHDP base structure. ++ * @module_id: ID of the module to send the message to. ++ * @opcode: Operation code of the message. ++ * @size: Size of the message data. ++ * @message: Pointer to the message data. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_mailbox_send(struct cdns_mhdp_base *base, u8 module_id, ++ u8 opcode, u16 size, u8 *message) ++{ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ return mhdp_mailbox_send(base->regs, module_id, opcode, size, message); ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_send); ++ ++/** ++ * cdns_mhdp_mailbox_send_recv - Sends a message and receives a response. ++ * ++ * This function sends a message via the mailbox and then receives a response. ++ * ++ * @base: Pointer to the CDNS MHDP base structure. ++ * @module_id: ID of the module to send the message to. ++ * @opcode: Operation code of the message. ++ * @msg_size: Size of the message data. ++ * @msg: Pointer to the message data. ++ * @resp_size: Size of the response buffer. ++ * @resp: Pointer to the response buffer. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_mailbox_send_recv(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u16 resp_size, u8 *resp) ++{ ++ int ret; ++ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ ret = mhdp_mailbox_send(base->regs, module_id, ++ opcode, msg_size, msg); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d send failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_header(base->regs, module_id, ++ opcode, resp_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d recv header failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_data(base->regs, resp, resp_size); ++ if (ret) ++ dev_err(base->dev, "ModuleID=%d, CMD=%d recv data failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_send_recv); ++ ++/** ++ * cdns_mhdp_mailbox_send_recv_multi - Sends a message and receives multiple responses. ++ * ++ * This function sends a message to a specified module via the MHDP mailbox and ++ * then receives multiple responses from the module. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param module_id: ID of the module to send the message to. ++ * @param opcode: Operation code of the message. ++ * @param msg_size: Size of the message data. ++ * @param msg: Pointer to the message data. ++ * @param opcode_resp: Operation code of the response. ++ * @param resp1_size: Size of the first response buffer. ++ * @param resp1: Pointer to the first response buffer. ++ * @param resp2_size: Size of the second response buffer. ++ * @param resp2: Pointer to the second response buffer. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_mailbox_send_recv_multi(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u8 opcode_resp, ++ u16 resp1_size, u8 *resp1, ++ u16 resp2_size, u8 *resp2) ++{ ++ int ret; ++ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ ret = mhdp_mailbox_send(base->regs, module_id, ++ opcode, msg_size, msg); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d send failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_header(base->regs, module_id, opcode_resp, ++ resp1_size + resp2_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv header failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_data(base->regs, resp1, resp1_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv data1 failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_data(base->regs, resp2, resp2_size); ++ if (ret) ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv data1 failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_mailbox_send_recv_multi); ++ ++/** ++ * cdns_mhdp_secure_mailbox_send - Sends a secure message via the mailbox. ++ * ++ * This function sends a secure message to a specified module via the MHDP mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param module_id: ID of the module to send the message to. ++ * @param opcode: Operation code of the message. ++ * @param size: Size of the message data. ++ * @param message: Pointer to the message data. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_secure_mailbox_send(struct cdns_mhdp_base *base, u8 module_id, ++ u8 opcode, u16 size, u8 *message) ++{ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ return mhdp_mailbox_send(base->sapb_regs, module_id, opcode, size, message); ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_secure_mailbox_send); ++ ++/** ++ * cdns_mhdp_secure_mailbox_send_recv - Sends a secure message and receives a response. ++ * ++ * This function sends a secure message to a specified module via the mailbox and ++ * then receives a response from the module. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param module_id: ID of the module to send the message to. ++ * @param opcode: Operation code of the message. ++ * @param msg_size: Size of the message data. ++ * @param msg: Pointer to the message data. ++ * @param resp_size: Size of the response buffer. ++ * @param resp: Pointer to the response buffer. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_secure_mailbox_send_recv(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u16 resp_size, u8 *resp) ++{ ++ int ret; ++ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ ret = mhdp_mailbox_send(base->sapb_regs, module_id, ++ opcode, msg_size, msg); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d send failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_header(base->sapb_regs, module_id, ++ opcode, resp_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d recv header failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_data(base->sapb_regs, resp, resp_size); ++ if (ret) ++ dev_err(base->dev, "ModuleID=%d, CMD=%d recv data failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_secure_mailbox_send_recv); ++ ++/** ++ * cdns_mhdp_secure_mailbox_send_recv_multi - Sends a secure message and receives multiple responses. ++ * ++ * This function sends a secure message to a specified module and receives multiple responses. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param module_id: ID of the module to send the message to. ++ * @param opcode: Operation code of the message. ++ * @param msg_size: Size of the message data. ++ * @param msg: Pointer to the message data. ++ * @param opcode_resp: Operation code of the response. ++ * @param resp1_size: Size of the first response buffer. ++ * @param resp1: Pointer to the first response buffer. ++ * @param resp2_size: Size of the second response buffer. ++ * @param resp2: Pointer to the second response buffer. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_secure_mailbox_send_recv_multi(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u8 opcode_resp, ++ u16 resp1_size, u8 *resp1, ++ u16 resp2_size, u8 *resp2) ++{ ++ int ret; ++ ++ guard(mutex)(&mhdp_mailbox_mutex); ++ ++ ret = mhdp_mailbox_send(base->sapb_regs, module_id, ++ opcode, msg_size, msg); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, CMD=%d send failed: %d\n", ++ module_id, opcode, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_header(base->sapb_regs, module_id, ++ opcode_resp, ++ resp1_size + resp2_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv header failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++ } ++ ++ ret = mhdp_mailbox_recv_data(base->sapb_regs, resp1, resp1_size); ++ if (ret) { ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv data1 failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++ } ++ ++ /* ++ * Response data length for HDCP TX HDCP_TRAN_IS_REC_ID_VALID depend on ++ * the number of HDCP receivers in resp1[0]. ++ * 1 for regular case, more can be in repeater. ++ */ ++ if (module_id == MB_MODULE_ID_HDCP_TX && ++ opcode == HDCP_TRAN_IS_REC_ID_VALID) ++ ret = mhdp_mailbox_recv_data(base->sapb_regs, resp2, 5 * resp1[0]); ++ else ++ ret = mhdp_mailbox_recv_data(base->sapb_regs, resp2, resp2_size); ++ if (ret) ++ dev_err(base->dev, "ModuleID=%d, Resp_CMD=%d recv data2 failed: %d\n", ++ module_id, opcode_resp, ret); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_secure_mailbox_send_recv_multi); ++ ++/** ++ * cdns_mhdp_reg_read - Reads a general register value. ++ * ++ * This function reads the value from a general register ++ * using the mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param addr: Address of the register to read. ++ * @param value: Pointer to store the read value. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_reg_read(struct cdns_mhdp_base *base, u32 addr, u32 *value) ++{ ++ u8 msg[4], resp[8]; ++ int ret; ++ ++ put_unaligned_be32(addr, msg); ++ ++ ret = cdns_mhdp_mailbox_send_recv(base, MB_MODULE_ID_GENERAL, ++ GENERAL_REGISTER_READ, ++ sizeof(msg), msg, sizeof(resp), resp); ++ if (ret) ++ goto out; ++ ++ /* Returned address value should be the same as requested */ ++ if (memcmp(msg, resp, sizeof(msg))) { ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ *value = get_unaligned_be32(resp + 4); ++out: ++ if (ret) { ++ dev_err(base->dev, "Failed to read register\n"); ++ *value = 0; ++ } ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_reg_read); ++ ++/** ++ * cdns_mhdp_reg_write - Writes a value to a general register. ++ * ++ * This function writes a value to a general register using the mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param addr: Address of the register to write to. ++ * @param val: Value to write to the register. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_reg_write(struct cdns_mhdp_base *base, u32 addr, u32 val) ++{ ++ u8 msg[8]; ++ ++ put_unaligned_be32(addr, msg); ++ put_unaligned_be32(val, msg + 4); ++ ++ return cdns_mhdp_mailbox_send(base, MB_MODULE_ID_GENERAL, ++ GENERAL_REGISTER_WRITE, ++ sizeof(msg), msg); ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_reg_write); ++ ++/* DPTX helper functions */ ++/** ++ * cdns_mhdp_dp_reg_write_bit - Writes a bit field to a DP register. ++ * ++ * This function writes a specific bit field within a DP register ++ * using the MHDP mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param addr: Address of the DP register. ++ * @param start_bit: Starting bit position within the register. ++ * @param bits_no: Number of bits to write. ++ * @param val: Value to write to the bit field. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_dp_reg_write_bit(struct cdns_mhdp_base *base, u16 addr, ++ u8 start_bit, u8 bits_no, u32 val) ++{ ++ u8 field[8]; ++ ++ put_unaligned_be16(addr, field); ++ field[2] = start_bit; ++ field[3] = bits_no; ++ put_unaligned_be32(val, field + 4); ++ ++ return cdns_mhdp_mailbox_send(base, MB_MODULE_ID_DP_TX, ++ DPTX_WRITE_FIELD, sizeof(field), field); ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_dp_reg_write_bit); ++ ++/** ++ * cdns_mhdp_dpcd_read - Reads data from a DPCD register. ++ * ++ * This function reads data from a specified DPCD register ++ * using the MHDP mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param addr: Address of the DPCD register to read. ++ * @param data: Buffer to store the read data. ++ * @param len: Length of the data to read. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_dpcd_read(struct cdns_mhdp_base *base, ++ u32 addr, u8 *data, u16 len) ++{ ++ u8 msg[5], reg[5]; ++ ++ put_unaligned_be16(len, msg); ++ put_unaligned_be24(addr, msg + 2); ++ ++ return cdns_mhdp_mailbox_send_recv_multi(base, ++ MB_MODULE_ID_DP_TX, ++ DPTX_READ_DPCD, ++ sizeof(msg), msg, ++ DPTX_READ_DPCD, ++ sizeof(reg), reg, ++ len, data); ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_dpcd_read); ++ ++/** ++ * cdns_mhdp_dpcd_write - Writes data to a DPCD register. ++ * ++ * This function writes data to a specified DPCD register ++ * using the MHDP mailbox. ++ * ++ * @param base: Pointer to the CDNS MHDP base structure. ++ * @param addr: Address of the DPCD register to write to. ++ * @param value: Value to write to the register. ++ * ++ * Returns: 0 on success, negative error code on failure. ++ */ ++int cdns_mhdp_dpcd_write(struct cdns_mhdp_base *base, u32 addr, u8 value) ++{ ++ u8 msg[6], reg[5]; ++ int ret; ++ ++ put_unaligned_be16(1, msg); ++ put_unaligned_be24(addr, msg + 2); ++ msg[5] = value; ++ ++ ret = cdns_mhdp_mailbox_send_recv(base, MB_MODULE_ID_DP_TX, ++ DPTX_WRITE_DPCD, ++ sizeof(msg), msg, sizeof(reg), reg); ++ if (ret) { ++ dev_err(base->dev, "dpcd write failed: %d\n", ret); ++ return ret; ++ } ++ ++ if (addr != get_unaligned_be24(reg + 2)) { ++ dev_err(base->dev, "Invalid response: expected address 0x%06x, got 0x%06x\n", ++ addr, get_unaligned_be24(reg + 2)); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(cdns_mhdp_dpcd_write); ++ ++MODULE_DESCRIPTION("Cadence MHDP Helper driver"); ++MODULE_AUTHOR("Sandor Yu "); ++MODULE_LICENSE("GPL"); +diff --git a/include/soc/cadence/cdns-mhdp-helper.h b/include/soc/cadence/cdns-mhdp-helper.h +new file mode 100644 +index 0000000000000..25b9737de615f +--- /dev/null ++++ b/include/soc/cadence/cdns-mhdp-helper.h +@@ -0,0 +1,129 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* ++ * Copyright (C) 2023-2024 NXP Semiconductor, Inc. ++ */ ++#ifndef __CDNS_MHDP_HELPER_H__ ++#define __CDNS_MHDP_HELPER_H__ ++ ++#include ++#include ++ ++/* mailbox regs offset */ ++#define CDNS_MAILBOX_FULL 0x00008 ++#define CDNS_MAILBOX_EMPTY 0x0000c ++#define CDNS_MAILBOX_TX_DATA 0x00010 ++#define CDNS_MAILBOX_RX_DATA 0x00014 ++ ++#define MAILBOX_RETRY_US 1000 ++#define MAILBOX_TIMEOUT_US 2000000 ++ ++/* Module ID Code */ ++#define MB_MODULE_ID_DP_TX 0x01 ++#define MB_MODULE_ID_HDMI_TX 0x03 ++#define MB_MODULE_ID_HDCP_TX 0x07 ++#define MB_MODULE_ID_HDCP_RX 0x08 ++#define MB_MODULE_ID_HDCP_GENERAL 0x09 ++#define MB_MODULE_ID_GENERAL 0x0A ++ ++/* General Commands */ ++#define GENERAL_MAIN_CONTROL 0x01 ++#define GENERAL_TEST_ECHO 0x02 ++#define GENERAL_BUS_SETTINGS 0x03 ++#define GENERAL_TEST_ACCESS 0x04 ++#define GENERAL_REGISTER_WRITE 0x05 ++#define GENERAL_WRITE_FIELD 0x06 ++#define GENERAL_REGISTER_READ 0x07 ++#define GENERAL_GET_HPD_STATE 0x11 ++ ++/* DPTX Commands */ ++#define DPTX_SET_POWER_MNG 0x00 ++#define DPTX_SET_HOST_CAPABILITIES 0x01 ++#define DPTX_GET_EDID 0x02 ++#define DPTX_READ_DPCD 0x03 ++#define DPTX_WRITE_DPCD 0x04 ++#define DPTX_ENABLE_EVENT 0x05 ++#define DPTX_WRITE_REGISTER 0x06 ++#define DPTX_READ_REGISTER 0x07 ++#define DPTX_WRITE_FIELD 0x08 ++#define DPTX_TRAINING_CONTROL 0x09 ++#define DPTX_READ_EVENT 0x0a ++#define DPTX_READ_LINK_STAT 0x0b ++#define DPTX_SET_VIDEO 0x0c ++#define DPTX_SET_AUDIO 0x0d ++#define DPTX_GET_LAST_AUX_STAUS 0x0e ++#define DPTX_SET_LINK_BREAK_POINT 0x0f ++#define DPTX_FORCE_LANES 0x10 ++#define DPTX_HPD_STATE 0x11 ++#define DPTX_ADJUST_LT 0x12 ++ ++/* HDMI TX Commands */ ++#define HDMI_TX_READ 0x00 ++#define HDMI_TX_WRITE 0x01 ++#define HDMI_TX_UPDATE_READ 0x02 ++#define HDMI_TX_EDID 0x03 ++#define HDMI_TX_EVENTS 0x04 ++#define HDMI_TX_HPD_STATUS 0x05 ++ ++/* HDCP TX Commands */ ++#define HDCP_TRAN_CONFIGURATION 0x00 ++#define HDCP2X_TX_SET_PUBLIC_KEY_PARAMS 0x01 ++#define HDCP2X_TX_SET_DEBUG_RANDOM_NUMBERS 0x02 ++#define HDCP2X_TX_RESPOND_KM 0x03 ++#define HDCP1_TX_SEND_KEYS 0x04 ++#define HDCP1_TX_SEND_RANDOM_AN 0x05 ++#define HDCP_TRAN_STATUS_CHANGE 0x06 ++#define HDCP2X_TX_IS_KM_STORED 0x07 ++#define HDCP2X_TX_STORE_KM 0x08 ++#define HDCP_TRAN_IS_REC_ID_VALID 0x09 ++#define HDCP_TRAN_RESPOND_RECEIVER_ID_VALID 0x09 ++#define HDCP_TRAN_TEST_KEYS 0x0a ++#define HDCP2X_TX_SET_KM_KEY_PARAMS 0x0b ++#define HDCP_NUM_OF_SUPPORTED_MESSAGES 0x0c ++ ++struct cdns_mhdp_base { ++ struct device *dev; ++ void __iomem *regs; ++ void __iomem *sapb_regs; ++}; ++ ++/* Mailbox helper functions */ ++int cdns_mhdp_mailbox_send(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 size, u8 *message); ++int cdns_mhdp_mailbox_send_recv(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u16 resp_size, u8 *resp); ++int cdns_mhdp_mailbox_send_recv_multi(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u8 opcode_resp, ++ u16 resp1_size, u8 *resp1, ++ u16 resp2_size, u8 *resp2); ++ ++/* Secure mailbox helper functions */ ++int cdns_mhdp_secure_mailbox_send(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 size, u8 *message); ++int cdns_mhdp_secure_mailbox_send_recv(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u16 resp_size, u8 *resp); ++int cdns_mhdp_secure_mailbox_send_recv_multi(struct cdns_mhdp_base *base, ++ u8 module_id, u8 opcode, ++ u16 msg_size, u8 *msg, ++ u8 opcode_resp, ++ u16 resp1_size, u8 *resp1, ++ u16 resp2_size, u8 *resp2); ++ ++/* General commands helper functions */ ++int cdns_mhdp_reg_read(struct cdns_mhdp_base *base, u32 addr, u32 *value); ++int cdns_mhdp_reg_write(struct cdns_mhdp_base *base, u32 addr, u32 val); ++ ++/* DPTX commands helper functions */ ++int cdns_mhdp_dp_reg_write_bit(struct cdns_mhdp_base *base, u16 addr, ++ u8 start_bit, u8 bits_no, u32 val); ++int cdns_mhdp_dpcd_read(struct cdns_mhdp_base *base, ++ u32 addr, u8 *data, u16 len); ++int cdns_mhdp_dpcd_write(struct cdns_mhdp_base *base, u32 addr, u8 value); ++#endif /* __CDNS_MHDP_HELPER_H__ */ + +From patchwork Tue Dec 17 06:51:44 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,2/9] drm: bridge: cadence: Update mhdp8546 mailbox access + functions +From: Sandor Yu +X-Patchwork-Id: 629289 +Message-Id: + <74bc3f2ff56348afd9d773589236ddf06dc3d45c.1734340233.git.Sandor.yu@nxp.com> +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:44 +0800 + +Basic mailbox access functions are removed, they are replaced by +mailbox helper functions: +- cdns_mhdp_mailbox_send() +- cdns_mhdp_mailbox_send_recv() +- cdns_mhdp_mailbox_send_recv_multi() +- cdns_mhdp_secure_mailbox_send() +- cdns_mhdp_secure_mailbox_send_recv() +- cdns_mhdp_secure_mailbox_send_recv_multi() + +All MHDP commands that need to be passed through the mailbox +have been rewritten using these new helper functions. + +Signed-off-by: Sandor Yu +Reviewed-by: Dmitry Baryshkov +--- +v19->v20: +- remove mhdp helper functions from the patch. + +v18->v19: +- Use guard(mutex) +- Add kerneldocs for all new APIs. +- Detail comments for mailbox access specific case. +- Remove cdns_mhdp_dp_reg_write() because it is not needed by driver now. + +v17->v18: +- Create three ordinary mailbox access APIs + cdns_mhdp_mailbox_send + cdns_mhdp_mailbox_send_recv + cdns_mhdp_mailbox_send_recv_multi +- Create three secure mailbox access APIs + cdns_mhdp_secure_mailbox_send + cdns_mhdp_secure_mailbox_send_recv + cdns_mhdp_secure_mailbox_send_recv_multi +- MHDP8546 DP and HDCP commands that need access mailbox are rewrited + with above 6 API functions. + +v16->v17: +- Replaces the local mutex mbox_mutex with a global mutex mhdp_mailbox_mutex + +v12->v16: + *No change. + + drivers/gpu/drm/bridge/cadence/Kconfig | 1 + + .../drm/bridge/cadence/cdns-mhdp8546-core.c | 487 +++--------------- + .../drm/bridge/cadence/cdns-mhdp8546-core.h | 47 +- + .../drm/bridge/cadence/cdns-mhdp8546-hdcp.c | 212 +------- + .../drm/bridge/cadence/cdns-mhdp8546-hdcp.h | 18 +- + 5 files changed, 104 insertions(+), 661 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig +index cced81633ddcd..dbb06533ccab2 100644 +--- a/drivers/gpu/drm/bridge/cadence/Kconfig ++++ b/drivers/gpu/drm/bridge/cadence/Kconfig +@@ -28,6 +28,7 @@ config DRM_CDNS_MHDP8546 + select DRM_DISPLAY_HELPER + select DRM_KMS_HELPER + select DRM_PANEL_BRIDGE ++ select CDNS_MHDP_HELPER + depends on OF + help + Support Cadence DPI to DP bridge. This is an internal +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +index d081850e3c03e..bd897c3ae7642 100644 +--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +@@ -73,302 +73,18 @@ static void cdns_mhdp_bridge_hpd_disable(struct drm_bridge *bridge) + mhdp->regs + CDNS_APB_INT_MASK); + } + +-static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) +-{ +- int ret, empty; +- +- WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex)); +- +- ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_EMPTY, +- empty, !empty, MAILBOX_RETRY_US, +- MAILBOX_TIMEOUT_US); +- if (ret < 0) +- return ret; +- +- return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff; +-} +- +-static int cdns_mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val) +-{ +- int ret, full; +- +- WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex)); +- +- ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_FULL, +- full, !full, MAILBOX_RETRY_US, +- MAILBOX_TIMEOUT_US); +- if (ret < 0) +- return ret; +- +- writel(val, mhdp->regs + CDNS_MAILBOX_TX_DATA); +- +- return 0; +-} +- +-static int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_device *mhdp, +- u8 module_id, u8 opcode, +- u16 req_size) +-{ +- u32 mbox_size, i; +- u8 header[4]; +- int ret; +- +- /* read the header of the message */ +- for (i = 0; i < sizeof(header); i++) { +- ret = cdns_mhdp_mailbox_read(mhdp); +- if (ret < 0) +- return ret; +- +- header[i] = ret; +- } +- +- mbox_size = get_unaligned_be16(header + 2); +- +- if (opcode != header[0] || module_id != header[1] || +- req_size != mbox_size) { +- /* +- * If the message in mailbox is not what we want, we need to +- * clear the mailbox by reading its contents. +- */ +- for (i = 0; i < mbox_size; i++) +- if (cdns_mhdp_mailbox_read(mhdp) < 0) +- break; +- +- return -EINVAL; +- } +- +- return 0; +-} +- +-static int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_device *mhdp, +- u8 *buff, u16 buff_size) +-{ +- u32 i; +- int ret; +- +- for (i = 0; i < buff_size; i++) { +- ret = cdns_mhdp_mailbox_read(mhdp); +- if (ret < 0) +- return ret; +- +- buff[i] = ret; +- } +- +- return 0; +-} +- +-static int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id, +- u8 opcode, u16 size, u8 *message) +-{ +- u8 header[4]; +- int ret, i; +- +- header[0] = opcode; +- header[1] = module_id; +- put_unaligned_be16(size, header + 2); +- +- for (i = 0; i < sizeof(header); i++) { +- ret = cdns_mhdp_mailbox_write(mhdp, header[i]); +- if (ret) +- return ret; +- } +- +- for (i = 0; i < size; i++) { +- ret = cdns_mhdp_mailbox_write(mhdp, message[i]); +- if (ret) +- return ret; +- } +- +- return 0; +-} +- +-static +-int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr, u32 *value) +-{ +- u8 msg[4], resp[8]; +- int ret; +- +- put_unaligned_be32(addr, msg); +- +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL, +- GENERAL_REGISTER_READ, +- sizeof(msg), msg); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_GENERAL, +- GENERAL_REGISTER_READ, +- sizeof(resp)); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp)); +- if (ret) +- goto out; +- +- /* Returned address value should be the same as requested */ +- if (memcmp(msg, resp, sizeof(msg))) { +- ret = -EINVAL; +- goto out; +- } +- +- *value = get_unaligned_be32(resp + 4); +- +-out: +- mutex_unlock(&mhdp->mbox_mutex); +- if (ret) { +- dev_err(mhdp->dev, "Failed to read register\n"); +- *value = 0; +- } +- +- return ret; +-} +- +-static +-int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u16 addr, u32 val) +-{ +- u8 msg[6]; +- int ret; +- +- put_unaligned_be16(addr, msg); +- put_unaligned_be32(val, msg + 2); +- +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_WRITE_REGISTER, sizeof(msg), msg); +- +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; +-} +- +-static +-int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr, +- u8 start_bit, u8 bits_no, u32 val) +-{ +- u8 field[8]; +- int ret; +- +- put_unaligned_be16(addr, field); +- field[2] = start_bit; +- field[3] = bits_no; +- put_unaligned_be32(val, field + 4); +- +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_WRITE_FIELD, sizeof(field), field); +- +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; +-} +- +-static +-int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp, +- u32 addr, u8 *data, u16 len) +-{ +- u8 msg[5], reg[5]; +- int ret; +- +- put_unaligned_be16(len, msg); +- put_unaligned_be24(addr, msg + 2); +- +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_READ_DPCD, sizeof(msg), msg); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_READ_DPCD, +- sizeof(reg) + len); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg)); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, data, len); +- +-out: +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; +-} +- +-static +-int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value) +-{ +- u8 msg[6], reg[5]; +- int ret; +- +- put_unaligned_be16(1, msg); +- put_unaligned_be24(addr, msg + 2); +- msg[5] = value; +- +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_WRITE_DPCD, sizeof(msg), msg); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_WRITE_DPCD, sizeof(reg)); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg)); +- if (ret) +- goto out; +- +- if (addr != get_unaligned_be24(reg + 2)) +- ret = -EINVAL; +- +-out: +- mutex_unlock(&mhdp->mbox_mutex); +- +- if (ret) +- dev_err(mhdp->dev, "dpcd write failed: %d\n", ret); +- return ret; +-} +- + static + int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable) + { +- u8 msg[5]; +- int ret, i; +- +- msg[0] = GENERAL_MAIN_CONTROL; +- msg[1] = MB_MODULE_ID_GENERAL; +- msg[2] = 0; +- msg[3] = 1; +- msg[4] = enable ? FW_ACTIVE : FW_STANDBY; +- +- mutex_lock(&mhdp->mbox_mutex); +- +- for (i = 0; i < sizeof(msg); i++) { +- ret = cdns_mhdp_mailbox_write(mhdp, msg[i]); +- if (ret) +- goto out; +- } +- +- /* read the firmware state */ +- ret = cdns_mhdp_mailbox_recv_data(mhdp, msg, sizeof(msg)); +- if (ret) +- goto out; +- +- ret = 0; ++ u8 status; ++ int ret; + +-out: +- mutex_unlock(&mhdp->mbox_mutex); ++ status = enable ? FW_ACTIVE : FW_STANDBY; + ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_GENERAL, ++ GENERAL_MAIN_CONTROL, ++ sizeof(status), &status, ++ sizeof(status), &status); + if (ret < 0) + dev_err(mhdp->dev, "set firmware active failed\n"); + return ret; +@@ -380,34 +96,18 @@ int cdns_mhdp_get_hpd_status(struct cdns_mhdp_device *mhdp) + u8 status; + int ret; + +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_HPD_STATE, 0, NULL); +- if (ret) +- goto err_get_hpd; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_HPD_STATE, +- sizeof(status)); +- if (ret) +- goto err_get_hpd; ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_HPD_STATE, ++ 0, NULL, ++ sizeof(status), &status); + +- ret = cdns_mhdp_mailbox_recv_data(mhdp, &status, sizeof(status)); + if (ret) +- goto err_get_hpd; +- +- mutex_unlock(&mhdp->mbox_mutex); ++ return ret; + + dev_dbg(mhdp->dev, "%s: HPD %splugged\n", __func__, + status ? "" : "un"); + + return status; +- +-err_get_hpd: +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; + } + + static +@@ -418,28 +118,17 @@ int cdns_mhdp_get_edid_block(void *data, u8 *edid, + u8 msg[2], reg[2], i; + int ret; + +- mutex_lock(&mhdp->mbox_mutex); +- + for (i = 0; i < 4; i++) { + msg[0] = block / 2; + msg[1] = block % 2; + +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_GET_EDID, sizeof(msg), msg); +- if (ret) +- continue; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_GET_EDID, +- sizeof(reg) + length); +- if (ret) +- continue; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg)); +- if (ret) +- continue; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, edid, length); ++ ret = cdns_mhdp_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_DP_TX, ++ DPTX_GET_EDID, ++ sizeof(msg), msg, ++ DPTX_GET_EDID, ++ sizeof(reg), reg, ++ length, edid); + if (ret) + continue; + +@@ -447,8 +136,6 @@ int cdns_mhdp_get_edid_block(void *data, u8 *edid, + break; + } + +- mutex_unlock(&mhdp->mbox_mutex); +- + if (ret) + dev_err(mhdp->dev, "get block[%d] edid failed: %d\n", + block, ret); +@@ -462,21 +149,9 @@ int cdns_mhdp_read_hpd_event(struct cdns_mhdp_device *mhdp) + u8 event = 0; + int ret; + +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_READ_EVENT, 0, NULL); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_READ_EVENT, sizeof(event)); +- if (ret < 0) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, &event, sizeof(event)); +-out: +- mutex_unlock(&mhdp->mbox_mutex); ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_READ_EVENT, ++ 0, NULL, sizeof(event), &event); + + if (ret < 0) + return ret; +@@ -510,35 +185,23 @@ int cdns_mhdp_adjust_lt(struct cdns_mhdp_device *mhdp, unsigned int nlanes, + put_unaligned_be16(udelay, payload + 1); + memcpy(payload + 3, lanes_data, nlanes); + +- mutex_lock(&mhdp->mbox_mutex); +- +- ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_ADJUST_LT, +- sizeof(payload), payload); +- if (ret) +- goto out; +- + /* Yes, read the DPCD read command response */ +- ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX, +- DPTX_READ_DPCD, +- sizeof(hdr) + DP_LINK_STATUS_SIZE); +- if (ret) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, hdr, sizeof(hdr)); ++ ret = cdns_mhdp_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_DP_TX, ++ DPTX_ADJUST_LT, ++ sizeof(payload), payload, ++ DPTX_READ_DPCD, ++ sizeof(hdr), hdr, ++ DP_LINK_STATUS_SIZE, ++ link_status); + if (ret) + goto out; + + addr = get_unaligned_be24(hdr + 2); + if (addr != DP_LANE0_1_STATUS) +- goto out; +- +- ret = cdns_mhdp_mailbox_recv_data(mhdp, link_status, +- DP_LINK_STATUS_SIZE); ++ ret = -EINVAL; + + out: +- mutex_unlock(&mhdp->mbox_mutex); +- + if (ret) + dev_err(mhdp->dev, "Failed to adjust Link Training.\n"); + +@@ -847,7 +510,7 @@ static ssize_t cdns_mhdp_transfer(struct drm_dp_aux *aux, + unsigned int i; + + for (i = 0; i < msg->size; ++i) { +- ret = cdns_mhdp_dpcd_write(mhdp, ++ ret = cdns_mhdp_dpcd_write(&mhdp->base, + msg->address + i, buf[i]); + if (!ret) + continue; +@@ -859,7 +522,7 @@ static ssize_t cdns_mhdp_transfer(struct drm_dp_aux *aux, + return ret; + } + } else { +- ret = cdns_mhdp_dpcd_read(mhdp, msg->address, ++ ret = cdns_mhdp_dpcd_read(&mhdp->base, msg->address, + msg->buffer, msg->size); + if (ret) { + dev_err(mhdp->dev, +@@ -887,12 +550,12 @@ static int cdns_mhdp_link_training_init(struct cdns_mhdp_device *mhdp) + if (!mhdp->host.scrambler) + reg32 |= CDNS_PHY_SCRAMBLER_BYPASS; + +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_PHY_CONFIG, reg32); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_ENHNCD, ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_ENHNCD, + mhdp->sink.enhanced & mhdp->host.enhanced); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_LANE_EN, ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_LANE_EN, + CDNS_DP_LANE_EN_LANES(mhdp->link.num_lanes)); + + cdns_mhdp_link_configure(&mhdp->aux, &mhdp->link); +@@ -913,7 +576,7 @@ static int cdns_mhdp_link_training_init(struct cdns_mhdp_device *mhdp) + return ret; + } + +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_PHY_CONFIG, + CDNS_PHY_COMMON_CONFIG | + CDNS_PHY_TRAINING_EN | + CDNS_PHY_TRAINING_TYPE(1) | +@@ -1058,7 +721,7 @@ static bool cdns_mhdp_link_training_channel_eq(struct cdns_mhdp_device *mhdp, + CDNS_PHY_TRAINING_TYPE(eq_tps); + if (eq_tps != 4) + reg32 |= CDNS_PHY_SCRAMBLER_BYPASS; +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_PHY_CONFIG, reg32); + + drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, + (eq_tps != 4) ? eq_tps | DP_LINK_SCRAMBLING_DISABLE : +@@ -1322,7 +985,7 @@ static int cdns_mhdp_link_training(struct cdns_mhdp_device *mhdp, + mhdp->host.scrambler ? 0 : + DP_LINK_SCRAMBLING_DISABLE); + +- ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, ®32); ++ ret = cdns_mhdp_reg_read(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, ®32); + if (ret < 0) { + dev_err(mhdp->dev, + "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n", +@@ -1333,13 +996,13 @@ static int cdns_mhdp_link_training(struct cdns_mhdp_device *mhdp, + reg32 |= CDNS_DP_NUM_LANES(mhdp->link.num_lanes); + reg32 |= CDNS_DP_WR_FAILING_EDGE_VSYNC; + reg32 |= CDNS_DP_FRAMER_EN; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, reg32); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, reg32); + + /* Reset PHY config */ + reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1); + if (!mhdp->host.scrambler) + reg32 |= CDNS_PHY_SCRAMBLER_BYPASS; +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_PHY_CONFIG, reg32); + + return 0; + err: +@@ -1347,7 +1010,7 @@ static int cdns_mhdp_link_training(struct cdns_mhdp_device *mhdp, + reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1); + if (!mhdp->host.scrambler) + reg32 |= CDNS_PHY_SCRAMBLER_BYPASS; +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_PHY_CONFIG, reg32); + + drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, + DP_TRAINING_PATTERN_DISABLE); +@@ -1461,7 +1124,7 @@ static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp) + mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp); + + /* Disable framer for link training */ +- err = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp); ++ err = cdns_mhdp_reg_read(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp); + if (err < 0) { + dev_err(mhdp->dev, + "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n", +@@ -1470,7 +1133,7 @@ static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp) + } + + resp &= ~CDNS_DP_FRAMER_EN; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp); + + /* Spread AMP if required, enable 8b/10b coding */ + amp[0] = cdns_mhdp_get_ssc_supported(mhdp) ? DP_SPREAD_AMP_0_5 : 0; +@@ -1834,7 +1497,7 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + bnd_hsync2vsync |= CDNS_IP_DET_INTERLACE_FORMAT; + +- cdns_mhdp_reg_write(mhdp, CDNS_BND_HSYNC2VSYNC(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_BND_HSYNC2VSYNC(stream_id), + bnd_hsync2vsync); + + hsync2vsync_pol_ctrl = 0; +@@ -1842,10 +1505,10 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + hsync2vsync_pol_ctrl |= CDNS_H2V_HSYNC_POL_ACTIVE_LOW; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + hsync2vsync_pol_ctrl |= CDNS_H2V_VSYNC_POL_ACTIVE_LOW; +- cdns_mhdp_reg_write(mhdp, CDNS_HSYNC2VSYNC_POL_CTRL(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_HSYNC2VSYNC_POL_CTRL(stream_id), + hsync2vsync_pol_ctrl); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_PXL_REPR(stream_id), pxl_repr); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_PXL_REPR(stream_id), pxl_repr); + + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + dp_framer_sp |= CDNS_DP_FRAMER_INTERLACE; +@@ -1853,19 +1516,19 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + dp_framer_sp |= CDNS_DP_FRAMER_HSYNC_POL_LOW; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + dp_framer_sp |= CDNS_DP_FRAMER_VSYNC_POL_LOW; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_SP(stream_id), dp_framer_sp); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_SP(stream_id), dp_framer_sp); + + front_porch = mode->crtc_hsync_start - mode->crtc_hdisplay; + back_porch = mode->crtc_htotal - mode->crtc_hsync_end; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRONT_BACK_PORCH(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRONT_BACK_PORCH(stream_id), + CDNS_DP_FRONT_PORCH(front_porch) | + CDNS_DP_BACK_PORCH(back_porch)); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_BYTE_COUNT(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_BYTE_COUNT(stream_id), + mode->crtc_hdisplay * bpp / 8); + + msa_h0 = mode->crtc_htotal - mode->crtc_hsync_start; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_0(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_MSA_HORIZONTAL_0(stream_id), + CDNS_DP_MSAH0_H_TOTAL(mode->crtc_htotal) | + CDNS_DP_MSAH0_HSYNC_START(msa_h0)); + +@@ -1874,11 +1537,11 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + CDNS_DP_MSAH1_HDISP_WIDTH(mode->crtc_hdisplay); + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + msa_horizontal_1 |= CDNS_DP_MSAH1_HSYNC_POL_LOW; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_1(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_MSA_HORIZONTAL_1(stream_id), + msa_horizontal_1); + + msa_v0 = mode->crtc_vtotal - mode->crtc_vsync_start; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_0(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_MSA_VERTICAL_0(stream_id), + CDNS_DP_MSAV0_V_TOTAL(mode->crtc_vtotal) | + CDNS_DP_MSAV0_VSYNC_START(msa_v0)); + +@@ -1887,7 +1550,7 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + CDNS_DP_MSAV1_VDISP_WIDTH(mode->crtc_vdisplay); + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + msa_vertical_1 |= CDNS_DP_MSAV1_VSYNC_POL_LOW; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_1(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_MSA_VERTICAL_1(stream_id), + msa_vertical_1); + + if ((mode->flags & DRM_MODE_FLAG_INTERLACE) && +@@ -1899,14 +1562,14 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + if (pxlfmt == DRM_COLOR_FORMAT_YCBCR420) + misc1 = CDNS_DP_TEST_VSC_SDP; + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_MISC(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_MSA_MISC(stream_id), + misc0 | (misc1 << 8)); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_HORIZONTAL(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_HORIZONTAL(stream_id), + CDNS_DP_H_HSYNC_WIDTH(hsync) | + CDNS_DP_H_H_TOTAL(mode->crtc_hdisplay)); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_0(stream_id), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_VERTICAL_0(stream_id), + CDNS_DP_V0_VHEIGHT(mode->crtc_vdisplay) | + CDNS_DP_V0_VSTART(msa_v0)); + +@@ -1915,13 +1578,13 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + mode->crtc_vtotal % 2 == 0) + dp_vertical_1 |= CDNS_DP_V1_VTOTAL_EVEN; + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_1(stream_id), dp_vertical_1); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_VERTICAL_1(stream_id), dp_vertical_1); + +- cdns_mhdp_reg_write_bit(mhdp, CDNS_DP_VB_ID(stream_id), 2, 1, +- (mode->flags & DRM_MODE_FLAG_INTERLACE) ? +- CDNS_DP_VB_ID_INTERLACED : 0); ++ cdns_mhdp_dp_reg_write_bit(&mhdp->base, CDNS_DP_VB_ID(stream_id), 2, 1, ++ (mode->flags & DRM_MODE_FLAG_INTERLACE) ? ++ CDNS_DP_VB_ID_INTERLACED : 0); + +- ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &framer); ++ ret = cdns_mhdp_reg_read(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, &framer); + if (ret < 0) { + dev_err(mhdp->dev, + "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n", +@@ -1930,7 +1593,7 @@ static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp, + } + framer |= CDNS_DP_FRAMER_EN; + framer &= ~CDNS_DP_NO_VIDEO_MODE; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, framer); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, framer); + } + + static void cdns_mhdp_sst_enable(struct cdns_mhdp_device *mhdp, +@@ -1963,15 +1626,15 @@ static void cdns_mhdp_sst_enable(struct cdns_mhdp_device *mhdp, + + mhdp->stream_id = 0; + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_TU, ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_TU, + CDNS_DP_FRAMER_TU_VS(vs) | + CDNS_DP_FRAMER_TU_SIZE(tu_size) | + CDNS_DP_FRAMER_TU_CNT_RST_EN); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_LINE_THRESH(0), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_LINE_THRESH(0), + line_thresh & GENMASK(5, 0)); + +- cdns_mhdp_reg_write(mhdp, CDNS_DP_STREAM_CONFIG_2(0), ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_STREAM_CONFIG_2(0), + CDNS_DP_SC2_TU_VS_DIFF((tu_size - vs > 3) ? + 0 : tu_size - vs)); + +@@ -2006,13 +1669,13 @@ static void cdns_mhdp_atomic_enable(struct drm_bridge *bridge, + mhdp->info->ops->enable(mhdp); + + /* Enable VIF clock for stream 0 */ +- ret = cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp); ++ ret = cdns_mhdp_reg_read(&mhdp->base, CDNS_DPTX_CAR, &resp); + if (ret < 0) { + dev_err(mhdp->dev, "Failed to read CDNS_DPTX_CAR %d\n", ret); + goto out; + } + +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR, ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_CAR, + resp | CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN); + + connector = drm_atomic_get_new_connector_for_encoder(state, +@@ -2083,16 +1746,16 @@ static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge, + cdns_mhdp_hdcp_disable(mhdp); + + mhdp->bridge_enabled = false; +- cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp); ++ cdns_mhdp_reg_read(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp); + resp &= ~CDNS_DP_FRAMER_EN; + resp |= CDNS_DP_NO_VIDEO_MODE; +- cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp); + + cdns_mhdp_link_down(mhdp); + + /* Disable VIF clock for stream 0 */ +- cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp); +- cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR, ++ cdns_mhdp_reg_read(&mhdp->base, CDNS_DPTX_CAR, &resp); ++ cdns_mhdp_reg_write(&mhdp->base, CDNS_DPTX_CAR, + resp & ~(CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN)); + + if (mhdp->info && mhdp->info->ops && mhdp->info->ops->disable) +@@ -2471,7 +2134,6 @@ static int cdns_mhdp_probe(struct platform_device *pdev) + + mhdp->clk = clk; + mhdp->dev = dev; +- mutex_init(&mhdp->mbox_mutex); + mutex_init(&mhdp->link_mutex); + spin_lock_init(&mhdp->start_lock); + +@@ -2502,6 +2164,11 @@ static int cdns_mhdp_probe(struct platform_device *pdev) + + platform_set_drvdata(pdev, mhdp); + ++ /* init base struct for access mailbox */ ++ mhdp->base.dev = mhdp->dev; ++ mhdp->base.regs = mhdp->regs; ++ mhdp->base.sapb_regs = mhdp->sapb_regs; ++ + mhdp->info = of_device_get_match_data(dev); + + clk_prepare_enable(clk); +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +index bad2fc0c73066..535300d040dea 100644 +--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include + + struct clk; + struct device; +@@ -27,10 +28,6 @@ struct phy; + #define CDNS_APB_CTRL 0x00000 + #define CDNS_CPU_STALL BIT(3) + +-#define CDNS_MAILBOX_FULL 0x00008 +-#define CDNS_MAILBOX_EMPTY 0x0000c +-#define CDNS_MAILBOX_TX_DATA 0x00010 +-#define CDNS_MAILBOX_RX_DATA 0x00014 + #define CDNS_KEEP_ALIVE 0x00018 + #define CDNS_KEEP_ALIVE_MASK GENMASK(7, 0) + +@@ -198,45 +195,10 @@ struct phy; + #define CDNS_DP_BYTE_COUNT(s) (CDNS_DPTX_STREAM(s) + 0x7c) + #define CDNS_DP_BYTE_COUNT_BYTES_IN_CHUNK_SHIFT 16 + +-/* mailbox */ +-#define MAILBOX_RETRY_US 1000 +-#define MAILBOX_TIMEOUT_US 2000000 +- +-#define MB_OPCODE_ID 0 +-#define MB_MODULE_ID 1 +-#define MB_SIZE_MSB_ID 2 +-#define MB_SIZE_LSB_ID 3 +-#define MB_DATA_ID 4 +- +-#define MB_MODULE_ID_DP_TX 0x01 +-#define MB_MODULE_ID_HDCP_TX 0x07 +-#define MB_MODULE_ID_HDCP_RX 0x08 +-#define MB_MODULE_ID_HDCP_GENERAL 0x09 +-#define MB_MODULE_ID_GENERAL 0x0a +- +-/* firmware and opcodes */ ++/* firmware */ + #define FW_NAME "cadence/mhdp8546.bin" + #define CDNS_MHDP_IMEM 0x10000 + +-#define GENERAL_MAIN_CONTROL 0x01 +-#define GENERAL_TEST_ECHO 0x02 +-#define GENERAL_BUS_SETTINGS 0x03 +-#define GENERAL_TEST_ACCESS 0x04 +-#define GENERAL_REGISTER_READ 0x07 +- +-#define DPTX_SET_POWER_MNG 0x00 +-#define DPTX_GET_EDID 0x02 +-#define DPTX_READ_DPCD 0x03 +-#define DPTX_WRITE_DPCD 0x04 +-#define DPTX_ENABLE_EVENT 0x05 +-#define DPTX_WRITE_REGISTER 0x06 +-#define DPTX_READ_REGISTER 0x07 +-#define DPTX_WRITE_FIELD 0x08 +-#define DPTX_READ_EVENT 0x0a +-#define DPTX_GET_LAST_AUX_STAUS 0x0e +-#define DPTX_HPD_STATE 0x11 +-#define DPTX_ADJUST_LT 0x12 +- + #define FW_STANDBY 0 + #define FW_ACTIVE 1 + +@@ -352,6 +314,8 @@ struct cdns_mhdp_hdcp { + }; + + struct cdns_mhdp_device { ++ struct cdns_mhdp_base base; ++ + void __iomem *regs; + void __iomem *sapb_regs; + void __iomem *j721e_regs; +@@ -362,9 +326,6 @@ struct cdns_mhdp_device { + + const struct cdns_mhdp_platform_info *info; + +- /* This is to protect mailbox communications with the firmware */ +- struct mutex mbox_mutex; +- + /* + * "link_mutex" protects the access to all the link parameters + * including the link training process. Link training will be +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c +index 42248f179b69d..3944642f2ebbc 100644 +--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c +@@ -15,144 +15,20 @@ + + #include "cdns-mhdp8546-hdcp.h" + +-static int cdns_mhdp_secure_mailbox_read(struct cdns_mhdp_device *mhdp) +-{ +- int ret, empty; +- +- WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex)); +- +- ret = readx_poll_timeout(readl, mhdp->sapb_regs + CDNS_MAILBOX_EMPTY, +- empty, !empty, MAILBOX_RETRY_US, +- MAILBOX_TIMEOUT_US); +- if (ret < 0) +- return ret; +- +- return readl(mhdp->sapb_regs + CDNS_MAILBOX_RX_DATA) & 0xff; +-} +- +-static int cdns_mhdp_secure_mailbox_write(struct cdns_mhdp_device *mhdp, +- u8 val) +-{ +- int ret, full; +- +- WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex)); +- +- ret = readx_poll_timeout(readl, mhdp->sapb_regs + CDNS_MAILBOX_FULL, +- full, !full, MAILBOX_RETRY_US, +- MAILBOX_TIMEOUT_US); +- if (ret < 0) +- return ret; +- +- writel(val, mhdp->sapb_regs + CDNS_MAILBOX_TX_DATA); +- +- return 0; +-} +- +-static int cdns_mhdp_secure_mailbox_recv_header(struct cdns_mhdp_device *mhdp, +- u8 module_id, +- u8 opcode, +- u16 req_size) +-{ +- u32 mbox_size, i; +- u8 header[4]; +- int ret; +- +- /* read the header of the message */ +- for (i = 0; i < sizeof(header); i++) { +- ret = cdns_mhdp_secure_mailbox_read(mhdp); +- if (ret < 0) +- return ret; +- +- header[i] = ret; +- } +- +- mbox_size = get_unaligned_be16(header + 2); +- +- if (opcode != header[0] || module_id != header[1] || +- (opcode != HDCP_TRAN_IS_REC_ID_VALID && req_size != mbox_size)) { +- for (i = 0; i < mbox_size; i++) +- if (cdns_mhdp_secure_mailbox_read(mhdp) < 0) +- break; +- return -EINVAL; +- } +- +- return 0; +-} +- +-static int cdns_mhdp_secure_mailbox_recv_data(struct cdns_mhdp_device *mhdp, +- u8 *buff, u16 buff_size) +-{ +- int ret; +- u32 i; +- +- for (i = 0; i < buff_size; i++) { +- ret = cdns_mhdp_secure_mailbox_read(mhdp); +- if (ret < 0) +- return ret; +- +- buff[i] = ret; +- } +- +- return 0; +-} +- +-static int cdns_mhdp_secure_mailbox_send(struct cdns_mhdp_device *mhdp, +- u8 module_id, +- u8 opcode, +- u16 size, +- u8 *message) +-{ +- u8 header[4]; +- int ret; +- u32 i; +- +- header[0] = opcode; +- header[1] = module_id; +- put_unaligned_be16(size, header + 2); +- +- for (i = 0; i < sizeof(header); i++) { +- ret = cdns_mhdp_secure_mailbox_write(mhdp, header[i]); +- if (ret) +- return ret; +- } +- +- for (i = 0; i < size; i++) { +- ret = cdns_mhdp_secure_mailbox_write(mhdp, message[i]); +- if (ret) +- return ret; +- } +- +- return 0; +-} +- + static int cdns_mhdp_hdcp_get_status(struct cdns_mhdp_device *mhdp, + u16 *hdcp_port_status) + { + u8 hdcp_status[HDCP_STATUS_SIZE]; + int ret; + +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP_TRAN_STATUS_CHANGE, 0, NULL); +- if (ret) +- goto err_get_hdcp_status; +- +- ret = cdns_mhdp_secure_mailbox_recv_header(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP_TRAN_STATUS_CHANGE, +- sizeof(hdcp_status)); +- if (ret) +- goto err_get_hdcp_status; +- +- ret = cdns_mhdp_secure_mailbox_recv_data(mhdp, hdcp_status, +- sizeof(hdcp_status)); ++ ret = cdns_mhdp_secure_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_HDCP_TX, ++ HDCP_TRAN_STATUS_CHANGE, 0, NULL, ++ sizeof(hdcp_status), hdcp_status); + if (ret) +- goto err_get_hdcp_status; ++ return ret; + + *hdcp_port_status = ((u16)(hdcp_status[0] << 8) | hdcp_status[1]); + +-err_get_hdcp_status: +- mutex_unlock(&mhdp->mbox_mutex); +- + return ret; + } + +@@ -170,98 +46,52 @@ static u8 cdns_mhdp_hdcp_handle_status(struct cdns_mhdp_device *mhdp, + static int cdns_mhdp_hdcp_rx_id_valid_response(struct cdns_mhdp_device *mhdp, + u8 valid) + { +- int ret; +- +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, ++ return cdns_mhdp_secure_mailbox_send(&mhdp->base, MB_MODULE_ID_HDCP_TX, + HDCP_TRAN_RESPOND_RECEIVER_ID_VALID, + 1, &valid); +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; + } + + static int cdns_mhdp_hdcp_rx_id_valid(struct cdns_mhdp_device *mhdp, + u8 *recv_num, u8 *hdcp_rx_id) + { + u8 rec_id_hdr[2]; +- u8 status; + int ret; + +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP_TRAN_IS_REC_ID_VALID, 0, NULL); +- if (ret) +- goto err_rx_id_valid; +- +- ret = cdns_mhdp_secure_mailbox_recv_header(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP_TRAN_IS_REC_ID_VALID, +- sizeof(status)); +- if (ret) +- goto err_rx_id_valid; +- +- ret = cdns_mhdp_secure_mailbox_recv_data(mhdp, rec_id_hdr, 2); ++ ret = cdns_mhdp_secure_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_HDCP_TX, ++ HDCP_TRAN_IS_REC_ID_VALID, ++ 0, NULL, ++ HDCP_TRAN_IS_REC_ID_VALID, ++ sizeof(rec_id_hdr), rec_id_hdr, ++ 0, hdcp_rx_id); + if (ret) +- goto err_rx_id_valid; ++ return ret; + + *recv_num = rec_id_hdr[0]; + +- ret = cdns_mhdp_secure_mailbox_recv_data(mhdp, hdcp_rx_id, 5 * *recv_num); +- +-err_rx_id_valid: +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; ++ return 0; + } + + static int cdns_mhdp_hdcp_km_stored_resp(struct cdns_mhdp_device *mhdp, + u32 size, u8 *km) + { +- int ret; +- +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP2X_TX_RESPOND_KM, size, km); +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; ++ return cdns_mhdp_secure_mailbox_send(&mhdp->base, MB_MODULE_ID_HDCP_TX, ++ HDCP2X_TX_RESPOND_KM, size, km); + } + + static int cdns_mhdp_hdcp_tx_is_km_stored(struct cdns_mhdp_device *mhdp, + u8 *resp, u32 size) + { +- int ret; +- +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP2X_TX_IS_KM_STORED, 0, NULL); +- if (ret) +- goto err_is_km_stored; +- +- ret = cdns_mhdp_secure_mailbox_recv_header(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP2X_TX_IS_KM_STORED, +- size); +- if (ret) +- goto err_is_km_stored; +- +- ret = cdns_mhdp_secure_mailbox_recv_data(mhdp, resp, size); +-err_is_km_stored: +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; ++ return cdns_mhdp_secure_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_HDCP_TX, ++ HDCP2X_TX_IS_KM_STORED, ++ 0, NULL, size, resp); + } + + static int cdns_mhdp_hdcp_tx_config(struct cdns_mhdp_device *mhdp, + u8 hdcp_cfg) + { +- int ret; +- +- mutex_lock(&mhdp->mbox_mutex); +- ret = cdns_mhdp_secure_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, +- HDCP_TRAN_CONFIGURATION, 1, &hdcp_cfg); +- mutex_unlock(&mhdp->mbox_mutex); +- +- return ret; ++ return cdns_mhdp_secure_mailbox_send(&mhdp->base, MB_MODULE_ID_HDCP_TX, ++ HDCP_TRAN_CONFIGURATION, 1, &hdcp_cfg); + } + + static int cdns_mhdp_hdcp_set_config(struct cdns_mhdp_device *mhdp, +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.h +index 3b6ec9c3a8d8b..1e68530e72229 100644 +--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.h ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.h +@@ -9,6 +9,7 @@ + #ifndef CDNS_MHDP8546_HDCP_H + #define CDNS_MHDP8546_HDCP_H + ++#include + #include "cdns-mhdp8546-core.h" + + #define HDCP_MAX_RECEIVERS 32 +@@ -32,23 +33,6 @@ enum { + HDCP_SET_SEED, + }; + +-enum { +- HDCP_TRAN_CONFIGURATION, +- HDCP2X_TX_SET_PUBLIC_KEY_PARAMS, +- HDCP2X_TX_SET_DEBUG_RANDOM_NUMBERS, +- HDCP2X_TX_RESPOND_KM, +- HDCP1_TX_SEND_KEYS, +- HDCP1_TX_SEND_RANDOM_AN, +- HDCP_TRAN_STATUS_CHANGE, +- HDCP2X_TX_IS_KM_STORED, +- HDCP2X_TX_STORE_KM, +- HDCP_TRAN_IS_REC_ID_VALID, +- HDCP_TRAN_RESPOND_RECEIVER_ID_VALID, +- HDCP_TRAN_TEST_KEYS, +- HDCP2X_TX_SET_KM_KEY_PARAMS, +- HDCP_NUM_OF_SUPPORTED_MESSAGES +-}; +- + enum { + HDCP_CONTENT_TYPE_0, + HDCP_CONTENT_TYPE_1, + +From patchwork Tue Dec 17 06:51:45 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,3/9] phy: Add HDMI configuration options +From: Sandor Yu +X-Patchwork-Id: 629290 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:45 +0800 + +Allow HDMI PHYs to be configured through the generic +functions through a custom structure added to the generic union. + +The parameters added here are based on HDMI PHY +implementation practices. The current set of parameters +should cover the potential users. + +Signed-off-by: Sandor Yu +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Maxime Ripard +Acked-by: Vinod Koul +--- +v19->v20: +- Add a-b tag. + +v17->v19: + *No change. + +v16->v17: +- remove headfile hdmi.h +- add 2024 year to copyright +- Add r-b tag. + + include/linux/phy/phy-hdmi.h | 19 +++++++++++++++++++ + include/linux/phy/phy.h | 7 ++++++- + 2 files changed, 25 insertions(+), 1 deletion(-) + create mode 100644 include/linux/phy/phy-hdmi.h + +diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h +new file mode 100644 +index 0000000000000..6a696922bc7f2 +--- /dev/null ++++ b/include/linux/phy/phy-hdmi.h +@@ -0,0 +1,19 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright 2022,2024 NXP ++ */ ++ ++#ifndef __PHY_HDMI_H_ ++#define __PHY_HDMI_H_ ++ ++/** ++ * struct phy_configure_opts_hdmi - HDMI configuration set ++ * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. ++ * ++ * This structure is used to represent the configuration state of a HDMI phy. ++ */ ++struct phy_configure_opts_hdmi { ++ unsigned long long tmds_char_rate; ++}; ++ ++#endif /* __PHY_HDMI_H_ */ +diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h +index 03cd5bae92d3f..4ac486b101fe4 100644 +--- a/include/linux/phy/phy.h ++++ b/include/linux/phy/phy.h +@@ -17,6 +17,7 @@ + #include + + #include ++#include + #include + #include + +@@ -42,7 +43,8 @@ enum phy_mode { + PHY_MODE_MIPI_DPHY, + PHY_MODE_SATA, + PHY_MODE_LVDS, +- PHY_MODE_DP ++ PHY_MODE_DP, ++ PHY_MODE_HDMI, + }; + + enum phy_media { +@@ -60,11 +62,14 @@ enum phy_media { + * the DisplayPort protocol. + * @lvds: Configuration set applicable for phys supporting + * the LVDS phy mode. ++ * @hdmi: Configuration set applicable for phys supporting ++ * the HDMI phy mode. + */ + union phy_configure_opts { + struct phy_configure_opts_mipi_dphy mipi_dphy; + struct phy_configure_opts_dp dp; + struct phy_configure_opts_lvds lvds; ++ struct phy_configure_opts_hdmi hdmi; + }; + + /** + +From patchwork Tue Dec 17 06:51:46 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,4/9] dt-bindings: display: bridge: Add Cadence MHDP8501 +From: Sandor Yu +X-Patchwork-Id: 629291 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:46 +0800 + +Add bindings for Cadence MHDP8501 DisplayPort/HDMI bridge. + +Signed-off-by: Sandor Yu +Reviewed-by: Krzysztof Kozlowski +--- +v19->v20: +- remove data type link of data-lanes. + +v18->v19: +- move data-lanes property to endpoint of port@1 + +v17->v18: +- remove lane-mapping and replace it with data-lanes +- remove r-b tag as property changed. + +v16->v17: +- Add lane-mapping property + +v9->v16: + *No change + + .../display/bridge/cdns,mhdp8501.yaml | 121 ++++++++++++++++++ + 1 file changed, 121 insertions(+) + create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml + +diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml +new file mode 100644 +index 0000000000000..2417f4038b437 +--- /dev/null ++++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml +@@ -0,0 +1,121 @@ ++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8501.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Cadence MHDP8501 DP/HDMI bridge ++ ++maintainers: ++ - Sandor Yu ++ ++description: ++ Cadence MHDP8501 DisplayPort/HDMI interface. ++ ++properties: ++ compatible: ++ enum: ++ - fsl,imx8mq-mhdp8501 ++ ++ reg: ++ maxItems: 1 ++ ++ clocks: ++ maxItems: 1 ++ description: MHDP8501 DP/HDMI APB clock. ++ ++ phys: ++ maxItems: 1 ++ description: ++ phandle to the DP/HDMI PHY ++ ++ interrupts: ++ items: ++ - description: Hotplug cable plugin. ++ - description: Hotplug cable plugout. ++ ++ interrupt-names: ++ items: ++ - const: plug_in ++ - const: plug_out ++ ++ ports: ++ $ref: /schemas/graph.yaml#/properties/ports ++ ++ properties: ++ port@0: ++ $ref: /schemas/graph.yaml#/properties/port ++ description: ++ Input port from display controller output. ++ ++ port@1: ++ $ref: /schemas/graph.yaml#/$defs/port-base ++ unevaluatedProperties: false ++ description: ++ Output port to DisplayPort or HDMI connector. ++ ++ properties: ++ endpoint: ++ $ref: /schemas/media/video-interfaces.yaml# ++ unevaluatedProperties: false ++ ++ properties: ++ data-lanes: ++ description: Lane reordering for HDMI or DisplayPort interface. ++ minItems: 4 ++ maxItems: 4 ++ ++ required: ++ - data-lanes ++ ++ required: ++ - port@0 ++ - port@1 ++ ++required: ++ - compatible ++ - reg ++ - clocks ++ - interrupts ++ - interrupt-names ++ - phys ++ - ports ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ ++ mhdp: display-bridge@32c00000 { ++ compatible = "fsl,imx8mq-mhdp8501"; ++ reg = <0x32c00000 0x100000>; ++ interrupts = , ++ ; ++ interrupt-names = "plug_in", "plug_out"; ++ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; ++ phys = <&mdhp_phy>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mhdp_in: endpoint { ++ remote-endpoint = <&dcss_out>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ remote-endpoint = <&dp_connector>; ++ data-lanes = <2 1 0 3>; ++ }; ++ }; ++ }; ++ }; + +From patchwork Tue Dec 17 06:51:47 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,5/9] drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver +From: Sandor Yu +X-Patchwork-Id: 629292 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:47 +0800 + +Add a new DRM DisplayPort and HDMI bridge driver for Candence MHDP8501 +used in i.MX8MQ SOC. MHDP8501 could support HDMI or DisplayPort +standards according embedded Firmware running in the uCPU. + +For iMX8MQ SOC, the DisplayPort/HDMI FW was loaded and activated by +SOC's ROM code. Bootload binary included respective specific firmware +is required. + +Driver will check display connector type and +then load the corresponding driver. + +Signed-off-by: Sandor Yu +--- +v19->v20: +- Dump mhdp FW version by debugfs +- Combine HDMI and DP cable detect functions into one function +- Combine HDMI and DP cable bridge_mode_valid() functions into one function +- Rename cdns_hdmi_reset_link() to cdns_hdmi_handle_hotplug() +- Add comments for EDID in cdns_hdmi_handle_hotplug() and cdns_dp_check_link_state() +- Add atomic_get_input_bus_fmts() and bridge_atomic_check() for DP driver +- Remove bpc and color_fmt init in atomic_enable() function. +- More detail comments for DDC adapter only support SCDC_I2C_SLAVE_ADDRESS + read and write in HDMI driver. + + +v18->v19: +- Get endpoint for data-lanes as it had move to endpoint of port@1 +- Update clock management as devm_clk_get_enabled() introduced. +- Fix clear_infoframe() function is not work issue. +- Manage PHY power state via phy_power_on() and phy_power_off(). + +v17->v18: +- MHDP8501 HDMI and DP commands that need access mailbox are rewrited + with new API functions created in patch #1. +- replace lane-mapping with data-lanes, use the value from data-lanes + to reorder HDMI and DP lane mapping. +- create I2C adapter for HDMI SCDC, remove cdns_hdmi_scdc_write() function. +- Rewrite cdns_hdmi_sink_config() function, use HDMI SCDC helper function + drm_scdc_set_high_tmds_clock_ratio() and drm_scdc_set_scrambling() + to config HDMI sink TMDS. +- Remove struct video_info from HDMI driver. +- Remove tmds_char_rate_valid() be called in bridge_mode_valid(), + community had patch in reviewing to implement the function. +- Remove warning message print when get unknown HPD cable status. +- Add more detail comments for HDP plugin and plugout interrupt. +- use dev_dbg to repleace DRM_INFO when cable HPD status changed. +- Remove t-b tag as above code change. + + drivers/gpu/drm/bridge/cadence/Kconfig | 16 + + drivers/gpu/drm/bridge/cadence/Makefile | 2 + + .../drm/bridge/cadence/cdns-mhdp8501-core.c | 379 +++++++++ + .../drm/bridge/cadence/cdns-mhdp8501-core.h | 380 +++++++++ + .../gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c | 694 ++++++++++++++++ + .../drm/bridge/cadence/cdns-mhdp8501-hdmi.c | 745 ++++++++++++++++++ + 6 files changed, 2216 insertions(+) + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c + create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c + +diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig +index dbb06533ccab2..bd979f3e6df48 100644 +--- a/drivers/gpu/drm/bridge/cadence/Kconfig ++++ b/drivers/gpu/drm/bridge/cadence/Kconfig +@@ -48,3 +48,19 @@ config DRM_CDNS_MHDP8546_J721E + initializes the J721E Display Port and sets up the + clock and data muxes. + endif ++ ++config DRM_CDNS_MHDP8501 ++ tristate "Cadence MHDP8501 DP/HDMI bridge" ++ select DRM_KMS_HELPER ++ select DRM_PANEL_BRIDGE ++ select DRM_DISPLAY_DP_HELPER ++ select DRM_DISPLAY_HELPER ++ select DRM_CDNS_AUDIO ++ select CDNS_MHDP_HELPER ++ depends on OF ++ help ++ Support Cadence MHDP8501 DisplayPort/HDMI bridge. ++ Cadence MHDP8501 support one or more protocols, ++ including DisplayPort and HDMI. ++ To use the DP and HDMI drivers, their respective ++ specific firmware is required. +diff --git a/drivers/gpu/drm/bridge/cadence/Makefile b/drivers/gpu/drm/bridge/cadence/Makefile +index c95fd5b81d137..ea327287d1c14 100644 +--- a/drivers/gpu/drm/bridge/cadence/Makefile ++++ b/drivers/gpu/drm/bridge/cadence/Makefile +@@ -5,3 +5,5 @@ cdns-dsi-$(CONFIG_DRM_CDNS_DSI_J721E) += cdns-dsi-j721e.o + obj-$(CONFIG_DRM_CDNS_MHDP8546) += cdns-mhdp8546.o + cdns-mhdp8546-y := cdns-mhdp8546-core.o cdns-mhdp8546-hdcp.o + cdns-mhdp8546-$(CONFIG_DRM_CDNS_MHDP8546_J721E) += cdns-mhdp8546-j721e.o ++obj-$(CONFIG_DRM_CDNS_MHDP8501) += cdns-mhdp8501.o ++cdns-mhdp8501-y := cdns-mhdp8501-core.o cdns-mhdp8501-dp.o cdns-mhdp8501-hdmi.o +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c +new file mode 100644 +index 0000000000000..98116ef012fa3 +--- /dev/null ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c +@@ -0,0 +1,379 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Cadence Display Port Interface (DP) driver ++ * ++ * Copyright (C) 2023-2024 NXP Semiconductor, Inc. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "cdns-mhdp8501-core.h" ++ ++static ssize_t firmware_version_show(struct device *dev, ++ struct device_attribute *attr, char *buf); ++static struct device_attribute firmware_version = __ATTR_RO(firmware_version); ++ ++ssize_t firmware_version_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct cdns_mhdp8501_device *mhdp = dev_get_drvdata(dev); ++ ++ u32 version = readl(mhdp->base.regs + VER_L) | readl(mhdp->base.regs + VER_H) << 8; ++ u32 lib_version = readl(mhdp->base.regs + VER_LIB_L_ADDR) | ++ readl(mhdp->base.regs + VER_LIB_H_ADDR) << 8; ++ ++ return sprintf(buf, "FW version %d, Lib version %d\n", version, lib_version); ++} ++ ++static void cdns_mhdp8501_create_device_files(struct cdns_mhdp8501_device *mhdp) ++{ ++ if (device_create_file(mhdp->dev, &firmware_version)) { ++ DRM_ERROR("Unable to create firmware_version sysfs\n"); ++ device_remove_file(mhdp->dev, &firmware_version); ++ } ++} ++ ++static void cdns_mhdp8501_remove_device_files(struct cdns_mhdp8501_device *mhdp) ++{ ++ device_remove_file(mhdp->dev, &firmware_version); ++} ++ ++static int cdns_mhdp8501_read_hpd(struct cdns_mhdp8501_device *mhdp) ++{ ++ u8 status; ++ int ret; ++ ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_GENERAL, ++ GENERAL_GET_HPD_STATE, ++ 0, NULL, sizeof(status), &status); ++ if (ret) { ++ dev_err(mhdp->dev, "read hpd failed: %d\n", ret); ++ return ret; ++ } ++ ++ return status; ++} ++ ++enum drm_connector_status cdns_mhdp8501_detect(struct drm_bridge *bridge) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ u8 hpd = 0xf; ++ ++ hpd = cdns_mhdp8501_read_hpd(mhdp); ++ if (hpd == 1) ++ return connector_status_connected; ++ else if (hpd == 0) ++ return connector_status_disconnected; ++ ++ return connector_status_unknown; ++} ++ ++enum drm_mode_status ++cdns_mhdp8501_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, ++ const struct drm_display_mode *mode) ++{ ++ /* We don't support double-clocked */ ++ if (mode->flags & DRM_MODE_FLAG_DBLCLK) ++ return MODE_BAD; ++ ++ /* MAX support pixel clock rate 594MHz */ ++ if (mode->clock > 594000) ++ return MODE_CLOCK_HIGH; ++ ++ if (mode->hdisplay > 3840) ++ return MODE_BAD_HVALUE; ++ ++ if (mode->vdisplay > 2160) ++ return MODE_BAD_VVALUE; ++ ++ return MODE_OK; ++} ++ ++static void hotplug_work_func(struct work_struct *work) ++{ ++ struct cdns_mhdp8501_device *mhdp = container_of(work, ++ struct cdns_mhdp8501_device, ++ hotplug_work.work); ++ enum drm_connector_status status = cdns_mhdp8501_detect(&mhdp->bridge); ++ ++ drm_bridge_hpd_notify(&mhdp->bridge, status); ++ ++ /* ++ * iMX8MQ has two HPD interrupts: one for plugout and one for plugin. ++ * These interrupts cannot be masked and cleaned, so we must enable one ++ * and disable the other to avoid continuous interrupt generation. ++ */ ++ if (status == connector_status_connected) { ++ /* Cable connected */ ++ dev_dbg(mhdp->dev, "HDMI/DP Cable Plug In\n"); ++ enable_irq(mhdp->irq[IRQ_OUT]); ++ ++ /* Reset HDMI/DP link with sink */ ++ if (mhdp->connector_type == DRM_MODE_CONNECTOR_HDMIA) ++ cdns_hdmi_handle_hotplug(mhdp); ++ else ++ cdns_dp_check_link_state(mhdp); ++ ++ } else if (status == connector_status_disconnected) { ++ /* Cable Disconnected */ ++ dev_dbg(mhdp->dev, "HDMI/DP Cable Plug Out\n"); ++ enable_irq(mhdp->irq[IRQ_IN]); ++ } ++} ++ ++static irqreturn_t cdns_mhdp8501_irq_thread(int irq, void *data) ++{ ++ struct cdns_mhdp8501_device *mhdp = data; ++ ++ disable_irq_nosync(irq); ++ ++ mod_delayed_work(system_wq, &mhdp->hotplug_work, ++ msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS)); ++ ++ return IRQ_HANDLED; ++} ++ ++#define DATA_LANES_COUNT 4 ++static int cdns_mhdp8501_dt_parse(struct cdns_mhdp8501_device *mhdp, ++ struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ struct device_node *remote, *endpoint; ++ u32 data_lanes[DATA_LANES_COUNT]; ++ u32 lane_value; ++ int ret, i; ++ ++ remote = of_graph_get_remote_node(np, 1, 0); ++ if (!remote) { ++ dev_err(dev, "fail to get remote node\n"); ++ of_node_put(remote); ++ return -EINVAL; ++ } ++ ++ /* get connector type */ ++ if (of_device_is_compatible(remote, "hdmi-connector")) { ++ mhdp->connector_type = DRM_MODE_CONNECTOR_HDMIA; ++ ++ } else if (of_device_is_compatible(remote, "dp-connector")) { ++ mhdp->connector_type = DRM_MODE_CONNECTOR_DisplayPort; ++ ++ } else { ++ dev_err(dev, "Unknown connector type\n"); ++ of_node_put(remote); ++ return -EINVAL; ++ } ++ ++ of_node_put(remote); ++ ++ endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); ++ ++ /* Get the data lanes ordering */ ++ ret = of_property_count_u32_elems(endpoint, "data-lanes"); ++ if (ret < 0) ++ return -EINVAL; ++ if (ret != DATA_LANES_COUNT) { ++ dev_err(dev, "expected 4 data lanes\n"); ++ return -EINVAL; ++ } ++ ++ ret = of_property_read_u32_array(endpoint, "data-lanes", ++ data_lanes, DATA_LANES_COUNT); ++ if (ret) ++ return -EINVAL; ++ ++ mhdp->lane_mapping = 0; ++ for (i = 0; i < DATA_LANES_COUNT; i++) { ++ lane_value = (data_lanes[i] >= 0 && data_lanes[i] <= 3) ? data_lanes[i] : 0; ++ mhdp->lane_mapping |= lane_value << (i * 2); ++ } ++ ++ return true; ++} ++ ++static int cdns_mhdp8501_add_bridge(struct cdns_mhdp8501_device *mhdp) ++{ ++ mhdp->bridge.type = mhdp->connector_type; ++ mhdp->bridge.driver_private = mhdp; ++ mhdp->bridge.of_node = mhdp->dev->of_node; ++ mhdp->bridge.vendor = "NXP"; ++ mhdp->bridge.product = "i.MX8"; ++ mhdp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | ++ DRM_BRIDGE_OP_HPD; ++ ++ if (mhdp->connector_type == DRM_MODE_CONNECTOR_HDMIA) { ++ mhdp->bridge.funcs = &cdns_hdmi_bridge_funcs; ++ mhdp->bridge.ops |= DRM_BRIDGE_OP_HDMI; ++ mhdp->bridge.ddc = cdns_hdmi_i2c_adapter(mhdp); ++ } else if (mhdp->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { ++ mhdp->bridge.funcs = &cdns_dp_bridge_funcs; ++ } else { ++ dev_err(mhdp->dev, "Unsupported connector type!\n"); ++ return -EINVAL; ++ } ++ ++ drm_bridge_add(&mhdp->bridge); ++ ++ return 0; ++} ++ ++static int cdns_mhdp8501_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct cdns_mhdp8501_device *mhdp; ++ struct resource *res; ++ enum phy_mode phy_mode; ++ u32 reg; ++ int ret; ++ ++ mhdp = devm_kzalloc(dev, sizeof(*mhdp), GFP_KERNEL); ++ if (!mhdp) ++ return -ENOMEM; ++ ++ mhdp->dev = dev; ++ ++ INIT_DELAYED_WORK(&mhdp->hotplug_work, hotplug_work_func); ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) ++ return -ENODEV; ++ ++ mhdp->regs = devm_ioremap(dev, res->start, resource_size(res)); ++ if (IS_ERR(mhdp->regs)) ++ return PTR_ERR(mhdp->regs); ++ ++ cdns_mhdp8501_create_device_files(mhdp); ++ ++ ret = cdns_mhdp8501_dt_parse(mhdp, pdev); ++ if (ret < 0) ++ return -EINVAL; ++ ++ mhdp->phy = devm_of_phy_get_by_index(dev, pdev->dev.of_node, 0); ++ if (IS_ERR(mhdp->phy)) ++ return dev_err_probe(dev, PTR_ERR(mhdp->phy), "no PHY configured\n"); ++ ++ mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in"); ++ if (mhdp->irq[IRQ_IN] < 0) ++ return dev_err_probe(dev, mhdp->irq[IRQ_IN], "No plug_in irq number\n"); ++ ++ mhdp->irq[IRQ_OUT] = platform_get_irq_byname(pdev, "plug_out"); ++ if (mhdp->irq[IRQ_OUT] < 0) ++ return dev_err_probe(dev, mhdp->irq[IRQ_OUT], "No plug_out irq number\n"); ++ ++ irq_set_status_flags(mhdp->irq[IRQ_IN], IRQ_NOAUTOEN); ++ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_IN], ++ NULL, cdns_mhdp8501_irq_thread, ++ IRQF_ONESHOT, dev_name(dev), mhdp); ++ if (ret < 0) { ++ dev_err(dev, "can't claim irq %d\n", mhdp->irq[IRQ_IN]); ++ return -EINVAL; ++ } ++ ++ irq_set_status_flags(mhdp->irq[IRQ_OUT], IRQ_NOAUTOEN); ++ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_OUT], ++ NULL, cdns_mhdp8501_irq_thread, ++ IRQF_ONESHOT, dev_name(dev), mhdp); ++ if (ret < 0) { ++ dev_err(dev, "can't claim irq %d\n", mhdp->irq[IRQ_OUT]); ++ return -EINVAL; ++ } ++ ++ /* cdns_mhdp8501_dt_parse() ensures connector_type is valid */ ++ if (mhdp->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ++ phy_mode = PHY_MODE_DP; ++ else if (mhdp->connector_type == DRM_MODE_CONNECTOR_HDMIA) ++ phy_mode = PHY_MODE_HDMI; ++ ++ dev_set_drvdata(dev, mhdp); ++ ++ /* init base struct for access mhdp mailbox */ ++ mhdp->base.dev = mhdp->dev; ++ mhdp->base.regs = mhdp->regs; ++ ++ if (mhdp->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { ++ drm_dp_aux_init(&mhdp->dp.aux); ++ mhdp->dp.aux.name = "mhdp8501_dp_aux"; ++ mhdp->dp.aux.dev = dev; ++ mhdp->dp.aux.transfer = cdns_dp_aux_transfer; ++ } ++ ++ /* Enable APB clock */ ++ mhdp->apb_clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(mhdp->apb_clk)) ++ return dev_err_probe(dev, PTR_ERR(mhdp->apb_clk), ++ "couldn't get apb clk\n"); ++ /* ++ * Wait for the KEEP_ALIVE "message" on the first 8 bits. ++ * Updated each sched "tick" (~2ms) ++ */ ++ ret = readl_poll_timeout(mhdp->regs + KEEP_ALIVE, reg, ++ reg & CDNS_KEEP_ALIVE_MASK, 500, ++ CDNS_KEEP_ALIVE_TIMEOUT); ++ if (ret) { ++ dev_err(dev, "device didn't give any life sign: reg %d\n", reg); ++ return ret; ++ } ++ ++ ret = phy_init(mhdp->phy); ++ if (ret) { ++ dev_err(dev, "Failed to initialize PHY: %d\n", ret); ++ return ret; ++ } ++ ++ ret = phy_set_mode(mhdp->phy, phy_mode); ++ if (ret) { ++ dev_err(dev, "Failed to configure PHY: %d\n", ret); ++ return ret; ++ } ++ ++ /* Enable cable hotplug detect */ ++ if (cdns_mhdp8501_read_hpd(mhdp)) ++ enable_irq(mhdp->irq[IRQ_OUT]); ++ else ++ enable_irq(mhdp->irq[IRQ_IN]); ++ ++ return cdns_mhdp8501_add_bridge(mhdp); ++} ++ ++static void cdns_mhdp8501_remove(struct platform_device *pdev) ++{ ++ struct cdns_mhdp8501_device *mhdp = platform_get_drvdata(pdev); ++ ++ cdns_mhdp8501_remove_device_files(mhdp); ++ ++ if (mhdp->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ++ cdns_dp_aux_destroy(mhdp); ++ ++ drm_bridge_remove(&mhdp->bridge); ++} ++ ++static const struct of_device_id cdns_mhdp8501_dt_ids[] = { ++ { .compatible = "fsl,imx8mq-mhdp8501", ++ }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, cdns_mhdp8501_dt_ids); ++ ++static struct platform_driver cdns_mhdp8501_driver = { ++ .probe = cdns_mhdp8501_probe, ++ .remove = cdns_mhdp8501_remove, ++ .driver = { ++ .name = "cdns-mhdp8501", ++ .of_match_table = cdns_mhdp8501_dt_ids, ++ }, ++}; ++ ++module_platform_driver(cdns_mhdp8501_driver); ++ ++MODULE_AUTHOR("Sandor Yu "); ++MODULE_DESCRIPTION("Cadence MHDP8501 bridge driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h +new file mode 100644 +index 0000000000000..8fc463098ab84 +--- /dev/null ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h +@@ -0,0 +1,380 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Cadence MHDP 8501 Common head file ++ * ++ * Copyright (C) 2019-2024 NXP Semiconductor, Inc. ++ * ++ */ ++ ++#ifndef _CDNS_MHDP8501_CORE_H_ ++#define _CDNS_MHDP8501_CORE_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define ADDR_IMEM 0x10000 ++#define ADDR_DMEM 0x20000 ++ ++/* APB CFG addr */ ++#define APB_CTRL 0 ++#define XT_INT_CTRL 0x04 ++#define MAILBOX_FULL_ADDR 0x08 ++#define MAILBOX_EMPTY_ADDR 0x0c ++#define MAILBOX0_WR_DATA 0x10 ++#define MAILBOX0_RD_DATA 0x14 ++#define KEEP_ALIVE 0x18 ++#define VER_L 0x1c ++#define VER_H 0x20 ++#define VER_LIB_L_ADDR 0x24 ++#define VER_LIB_H_ADDR 0x28 ++#define SW_DEBUG_L 0x2c ++#define SW_DEBUG_H 0x30 ++#define MAILBOX_INT_MASK 0x34 ++#define MAILBOX_INT_STATUS 0x38 ++#define SW_CLK_L 0x3c ++#define SW_CLK_H 0x40 ++#define SW_EVENTS0 0x44 ++#define SW_EVENTS1 0x48 ++#define SW_EVENTS2 0x4c ++#define SW_EVENTS3 0x50 ++#define XT_OCD_CTRL 0x60 ++#define APB_INT_MASK 0x6c ++#define APB_STATUS_MASK 0x70 ++ ++/* Source phy comp */ ++#define PHY_DATA_SEL 0x0818 ++#define LANES_CONFIG 0x0814 ++ ++/* Source CAR Addr */ ++#define SOURCE_HDTX_CAR 0x0900 ++#define SOURCE_DPTX_CAR 0x0904 ++#define SOURCE_PHY_CAR 0x0908 ++#define SOURCE_CEC_CAR 0x090c ++#define SOURCE_CBUS_CAR 0x0910 ++#define SOURCE_PKT_CAR 0x0918 ++#define SOURCE_AIF_CAR 0x091c ++#define SOURCE_CIPHER_CAR 0x0920 ++#define SOURCE_CRYPTO_CAR 0x0924 ++ ++/* clock meters addr */ ++#define CM_CTRL 0x0a00 ++#define CM_I2S_CTRL 0x0a04 ++#define CM_SPDIF_CTRL 0x0a08 ++#define CM_VID_CTRL 0x0a0c ++#define CM_LANE_CTRL 0x0a10 ++#define I2S_NM_STABLE 0x0a14 ++#define I2S_NCTS_STABLE 0x0a18 ++#define SPDIF_NM_STABLE 0x0a1c ++#define SPDIF_NCTS_STABLE 0x0a20 ++#define NMVID_MEAS_STABLE 0x0a24 ++#define I2S_MEAS 0x0a40 ++#define SPDIF_MEAS 0x0a80 ++#define NMVID_MEAS 0x0ac0 ++ ++/* source vif addr */ ++#define BND_HSYNC2VSYNC 0x0b00 ++#define HSYNC2VSYNC_F1_L1 0x0b04 ++#define HSYNC2VSYNC_STATUS 0x0b0c ++#define HSYNC2VSYNC_POL_CTRL 0x0b10 ++ ++/* MHDP TX_top_comp */ ++#define SCHEDULER_H_SIZE 0x1000 ++#define SCHEDULER_V_SIZE 0x1004 ++#define HDTX_SIGNAL_FRONT_WIDTH 0x100c ++#define HDTX_SIGNAL_SYNC_WIDTH 0x1010 ++#define HDTX_SIGNAL_BACK_WIDTH 0x1014 ++#define HDTX_CONTROLLER 0x1018 ++#define HDTX_HPD 0x1020 ++#define HDTX_CLOCK_REG_0 0x1024 ++#define HDTX_CLOCK_REG_1 0x1028 ++ ++/* DPTX hpd addr */ ++#define HPD_IRQ_DET_MIN_TIMER 0x2100 ++#define HPD_IRQ_DET_MAX_TIMER 0x2104 ++#define HPD_UNPLGED_DET_MIN_TIMER 0x2108 ++#define HPD_STABLE_TIMER 0x210c ++#define HPD_FILTER_TIMER 0x2110 ++#define HPD_EVENT_MASK 0x211c ++#define HPD_EVENT_DET 0x2120 ++ ++/* DPTX framer addr */ ++#define DP_FRAMER_GLOBAL_CONFIG 0x2200 ++#define DP_SW_RESET 0x2204 ++#define DP_FRAMER_TU 0x2208 ++#define DP_FRAMER_PXL_REPR 0x220c ++#define DP_FRAMER_SP 0x2210 ++#define AUDIO_PACK_CONTROL 0x2214 ++#define DP_VC_TABLE(x) (0x2218 + ((x) << 2)) ++#define DP_VB_ID 0x2258 ++#define DP_MTPH_LVP_CONTROL 0x225c ++#define DP_MTPH_SYMBOL_VALUES 0x2260 ++#define DP_MTPH_ECF_CONTROL 0x2264 ++#define DP_MTPH_ACT_CONTROL 0x2268 ++#define DP_MTPH_STATUS 0x226c ++#define DP_INTERRUPT_SOURCE 0x2270 ++#define DP_INTERRUPT_MASK 0x2274 ++#define DP_FRONT_BACK_PORCH 0x2278 ++#define DP_BYTE_COUNT 0x227c ++ ++/* DPTX stream addr */ ++#define MSA_HORIZONTAL_0 0x2280 ++#define MSA_HORIZONTAL_1 0x2284 ++#define MSA_VERTICAL_0 0x2288 ++#define MSA_VERTICAL_1 0x228c ++#define MSA_MISC 0x2290 ++#define STREAM_CONFIG 0x2294 ++#define AUDIO_PACK_STATUS 0x2298 ++#define VIF_STATUS 0x229c ++#define PCK_STUFF_STATUS_0 0x22a0 ++#define PCK_STUFF_STATUS_1 0x22a4 ++#define INFO_PACK_STATUS 0x22a8 ++#define RATE_GOVERNOR_STATUS 0x22ac ++#define DP_HORIZONTAL 0x22b0 ++#define DP_VERTICAL_0 0x22b4 ++#define DP_VERTICAL_1 0x22b8 ++#define DP_BLOCK_SDP 0x22bc ++ ++/* DPTX glbl addr */ ++#define DPTX_LANE_EN 0x2300 ++#define DPTX_ENHNCD 0x2304 ++#define DPTX_INT_MASK 0x2308 ++#define DPTX_INT_STATUS 0x230c ++ ++/* DP AUX Addr */ ++#define DP_AUX_HOST_CONTROL 0x2800 ++#define DP_AUX_INTERRUPT_SOURCE 0x2804 ++#define DP_AUX_INTERRUPT_MASK 0x2808 ++#define DP_AUX_SWAP_INVERSION_CONTROL 0x280c ++#define DP_AUX_SEND_NACK_TRANSACTION 0x2810 ++#define DP_AUX_CLEAR_RX 0x2814 ++#define DP_AUX_CLEAR_TX 0x2818 ++#define DP_AUX_TIMER_STOP 0x281c ++#define DP_AUX_TIMER_CLEAR 0x2820 ++#define DP_AUX_RESET_SW 0x2824 ++#define DP_AUX_DIVIDE_2M 0x2828 ++#define DP_AUX_TX_PREACHARGE_LENGTH 0x282c ++#define DP_AUX_FREQUENCY_1M_MAX 0x2830 ++#define DP_AUX_FREQUENCY_1M_MIN 0x2834 ++#define DP_AUX_RX_PRE_MIN 0x2838 ++#define DP_AUX_RX_PRE_MAX 0x283c ++#define DP_AUX_TIMER_PRESET 0x2840 ++#define DP_AUX_NACK_FORMAT 0x2844 ++#define DP_AUX_TX_DATA 0x2848 ++#define DP_AUX_RX_DATA 0x284c ++#define DP_AUX_TX_STATUS 0x2850 ++#define DP_AUX_RX_STATUS 0x2854 ++#define DP_AUX_RX_CYCLE_COUNTER 0x2858 ++#define DP_AUX_MAIN_STATES 0x285c ++#define DP_AUX_MAIN_TIMER 0x2860 ++#define DP_AUX_AFE_OUT 0x2864 ++ ++/* source pif addr */ ++#define SOURCE_PIF_WR_ADDR 0x30800 ++#define SOURCE_PIF_WR_REQ 0x30804 ++#define SOURCE_PIF_RD_ADDR 0x30808 ++#define SOURCE_PIF_RD_REQ 0x3080c ++#define SOURCE_PIF_DATA_WR 0x30810 ++#define SOURCE_PIF_DATA_RD 0x30814 ++#define SOURCE_PIF_FIFO1_FLUSH 0x30818 ++#define SOURCE_PIF_FIFO2_FLUSH 0x3081c ++#define SOURCE_PIF_STATUS 0x30820 ++#define SOURCE_PIF_INTERRUPT_SOURCE 0x30824 ++#define SOURCE_PIF_INTERRUPT_MASK 0x30828 ++#define SOURCE_PIF_PKT_ALLOC_REG 0x3082c ++#define SOURCE_PIF_PKT_ALLOC_WR_EN 0x30830 ++#define SOURCE_PIF_SW_RESET 0x30834 ++ ++#define LINK_TRAINING_NOT_ACTIV 0 ++#define LINK_TRAINING_RUN 1 ++#define LINK_TRAINING_RESTART 2 ++ ++#define CONTROL_VIDEO_IDLE 0 ++#define CONTROL_VIDEO_VALID 1 ++ ++#define INTERLACE_FMT_DET BIT(12) ++#define VIF_BYPASS_INTERLACE BIT(13) ++#define TU_CNT_RST_EN BIT(15) ++#define INTERLACE_DTCT_WIN 0x20 ++ ++#define DP_FRAMER_SP_INTERLACE_EN BIT(2) ++#define DP_FRAMER_SP_HSP BIT(1) ++#define DP_FRAMER_SP_VSP BIT(0) ++ ++/* Capability */ ++#define AUX_HOST_INVERT 3 ++#define FAST_LT_SUPPORT 1 ++#define FAST_LT_NOT_SUPPORT 0 ++#define LANE_MAPPING_FLIPPED 0xe4 ++#define ENHANCED 1 ++#define SCRAMBLER_EN BIT(4) ++ ++#define FULL_LT_STARTED BIT(0) ++#define FASE_LT_STARTED BIT(1) ++#define CLK_RECOVERY_FINISHED BIT(2) ++#define EQ_PHASE_FINISHED BIT(3) ++#define FASE_LT_START_FINISHED BIT(4) ++#define CLK_RECOVERY_FAILED BIT(5) ++#define EQ_PHASE_FAILED BIT(6) ++#define FASE_LT_FAILED BIT(7) ++ ++#define TU_SIZE 30 ++#define CDNS_DP_MAX_LINK_RATE 540000 ++ ++#define F_HDMI2_CTRL_IL_MODE(x) (((x) & ((1 << 1) - 1)) << 19) ++#define F_HDMI2_PREAMBLE_EN(x) (((x) & ((1 << 1) - 1)) << 18) ++#define F_HDMI_ENCODING(x) (((x) & ((1 << 2) - 1)) << 16) ++#define F_DATA_EN(x) (((x) & ((1 << 1) - 1)) << 15) ++#define F_CLEAR_AVMUTE(x) (((x) & ((1 << 1) - 1)) << 14) ++#define F_SET_AVMUTE(x) (((x) & ((1 << 1) - 1)) << 13) ++#define F_GCP_EN(x) (((x) & ((1 << 1) - 1)) << 12) ++#define F_BCH_EN(x) (((x) & ((1 << 1) - 1)) << 11) ++#define F_PIC_3D(x) (((x) & ((1 << 4) - 1)) << 7) ++#define F_VIF_DATA_WIDTH(x) (((x) & ((1 << 2) - 1)) << 2) ++#define F_HDMI_MODE(x) (((x) & ((1 << 2) - 1)) << 0) ++ ++#define F_SOURCE_PHY_MHDP_SEL(x) (((x) & ((1 << 2) - 1)) << 3) ++ ++#define F_HPD_GLITCH_WIDTH(x) (((x) & ((1 << 8) - 1)) << 12) ++#define F_PACKET_TYPE(x) (((x) & ((1 << 8) - 1)) << 8) ++#define F_HPD_VALID_WIDTH(x) (((x) & ((1 << 12) - 1)) << 0) ++ ++#define F_SOURCE_PHY_LANE3_SWAP(x) (((x) & ((1 << 2) - 1)) << 6) ++#define F_SOURCE_PHY_LANE2_SWAP(x) (((x) & ((1 << 2) - 1)) << 4) ++#define F_SOURCE_PHY_LANE1_SWAP(x) (((x) & ((1 << 2) - 1)) << 2) ++#define F_SOURCE_PHY_LANE0_SWAP(x) (((x) & ((1 << 2) - 1)) << 0) ++ ++#define F_ACTIVE_IDLE_TYPE(x) (((x) & ((1 << 1) - 1)) << 17) ++#define F_TYPE_VALID(x) (((x) & ((1 << 1) - 1)) << 16) ++#define F_PKT_ALLOC_ADDRESS(x) (((x) & ((1 << 4) - 1)) << 0) ++ ++#define F_FIFO1_FLUSH(x) (((x) & ((1 << 1) - 1)) << 0) ++#define F_PKT_ALLOC_WR_EN(x) (((x) & ((1 << 1) - 1)) << 0) ++#define F_DATA_WR(x) (x) ++#define F_WR_ADDR(x) (((x) & ((1 << 4) - 1)) << 0) ++#define F_HOST_WR(x) (((x) & ((1 << 1) - 1)) << 0) ++ ++/* Reference cycles when using lane clock as reference */ ++#define LANE_REF_CYC 0x8000 ++ ++/* HPD Debounce */ ++#define HOTPLUG_DEBOUNCE_MS 200 ++ ++/* HPD IRQ Index */ ++#define IRQ_IN 0 ++#define IRQ_OUT 1 ++#define IRQ_NUM 2 ++ ++/* FW check alive timeout */ ++#define CDNS_KEEP_ALIVE_TIMEOUT 2000 ++#define CDNS_KEEP_ALIVE_MASK GENMASK(7, 0) ++ ++enum voltage_swing_level { ++ VOLTAGE_LEVEL_0, ++ VOLTAGE_LEVEL_1, ++ VOLTAGE_LEVEL_2, ++ VOLTAGE_LEVEL_3, ++}; ++ ++enum pre_emphasis_level { ++ PRE_EMPHASIS_LEVEL_0, ++ PRE_EMPHASIS_LEVEL_1, ++ PRE_EMPHASIS_LEVEL_2, ++ PRE_EMPHASIS_LEVEL_3, ++}; ++ ++enum pattern_set { ++ PTS1 = BIT(0), ++ PTS2 = BIT(1), ++ PTS3 = BIT(2), ++ PTS4 = BIT(3), ++ DP_NONE = BIT(4) ++}; ++ ++enum vic_color_depth { ++ BCS_6 = 0x1, ++ BCS_8 = 0x2, ++ BCS_10 = 0x4, ++ BCS_12 = 0x8, ++ BCS_16 = 0x10, ++}; ++ ++enum vic_bt_type { ++ BT_601 = 0x0, ++ BT_709 = 0x1, ++}; ++ ++enum { ++ MODE_DVI, ++ MODE_HDMI_1_4, ++ MODE_HDMI_2_0, ++}; ++ ++struct video_info { ++ int bpc; ++ int color_fmt; ++}; ++ ++struct cdns_hdmi_i2c { ++ struct i2c_adapter adap; ++ ++ struct mutex lock; /* used to serialize data transfers */ ++ struct completion cmp; ++ u8 stat; ++ ++ u8 slave_reg; ++ bool is_regaddr; ++ bool is_segment; ++}; ++ ++struct cdns_mhdp8501_device { ++ struct cdns_mhdp_base base; ++ ++ struct device *dev; ++ void __iomem *regs; ++ struct drm_connector *curr_conn; ++ struct drm_bridge bridge; ++ struct clk *apb_clk; ++ struct phy *phy; ++ ++ struct video_info video_info; ++ ++ int irq[IRQ_NUM]; ++ struct delayed_work hotplug_work; ++ int connector_type; ++ u32 lane_mapping; ++ ++ union { ++ struct _dp_data { ++ u32 rate; ++ u8 num_lanes; ++ struct drm_dp_aux aux; ++ u8 dpcd[DP_RECEIVER_CAP_SIZE]; ++ } dp; ++ struct _hdmi_data { ++ u32 hdmi_type; ++ struct cdns_hdmi_i2c *i2c; ++ } hdmi; ++ }; ++}; ++ ++extern const struct drm_bridge_funcs cdns_dp_bridge_funcs; ++extern const struct drm_bridge_funcs cdns_hdmi_bridge_funcs; ++ ++enum drm_connector_status ++cdns_mhdp8501_detect(struct drm_bridge *bridge); ++enum drm_mode_status ++cdns_mhdp8501_mode_valid(struct drm_bridge *bridge, ++ const struct drm_display_info *info, ++ const struct drm_display_mode *mode); ++ ++ssize_t cdns_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); ++int cdns_dp_aux_destroy(struct cdns_mhdp8501_device *mhdp); ++void cdns_dp_check_link_state(struct cdns_mhdp8501_device *mhdp); ++ ++void cdns_hdmi_handle_hotplug(struct cdns_mhdp8501_device *mhdp); ++struct i2c_adapter *cdns_hdmi_i2c_adapter(struct cdns_mhdp8501_device *mhdp); ++#endif +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c +new file mode 100644 +index 0000000000000..157b4d44b9e2b +--- /dev/null ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c +@@ -0,0 +1,693 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Cadence MHDP8501 DisplayPort(DP) bridge driver ++ * ++ * Copyright (C) 2019-2024 NXP Semiconductor, Inc. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "cdns-mhdp8501-core.h" ++ ++#define LINK_TRAINING_TIMEOUT_MS 500 ++#define LINK_TRAINING_RETRY_MS 20 ++ ++ssize_t cdns_dp_aux_transfer(struct drm_dp_aux *aux, ++ struct drm_dp_aux_msg *msg) ++{ ++ struct cdns_mhdp8501_device *mhdp = dev_get_drvdata(aux->dev); ++ bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); ++ int ret; ++ ++ /* Ignore address only message */ ++ if (!msg->size || !msg->buffer) { ++ msg->reply = native ? ++ DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK; ++ return msg->size; ++ } ++ ++ if (!native) { ++ dev_err(mhdp->dev, "%s: only native messages supported\n", __func__); ++ return -EINVAL; ++ } ++ ++ /* msg sanity check */ ++ if (msg->size > DP_AUX_MAX_PAYLOAD_BYTES) { ++ dev_err(mhdp->dev, "%s: invalid msg: size(%zu), request(%x)\n", ++ __func__, msg->size, (unsigned int)msg->request); ++ return -EINVAL; ++ } ++ ++ if (msg->request == DP_AUX_NATIVE_WRITE) { ++ const u8 *buf = msg->buffer; ++ int i; ++ ++ for (i = 0; i < msg->size; ++i) { ++ ret = cdns_mhdp_dpcd_write(&mhdp->base, ++ msg->address + i, buf[i]); ++ if (ret < 0) { ++ dev_err(mhdp->dev, "Failed to write DPCD\n"); ++ return ret; ++ } ++ } ++ msg->reply = DP_AUX_NATIVE_REPLY_ACK; ++ return msg->size; ++ } ++ ++ if (msg->request == DP_AUX_NATIVE_READ) { ++ ret = cdns_mhdp_dpcd_read(&mhdp->base, msg->address, ++ msg->buffer, msg->size); ++ if (ret < 0) ++ return ret; ++ msg->reply = DP_AUX_NATIVE_REPLY_ACK; ++ return msg->size; ++ } ++ return 0; ++} ++ ++int cdns_dp_aux_destroy(struct cdns_mhdp8501_device *mhdp) ++{ ++ drm_dp_aux_unregister(&mhdp->dp.aux); ++ ++ return 0; ++} ++ ++static int cdns_dp_get_msa_misc(struct video_info *video) ++{ ++ u32 msa_misc; ++ u8 color_space = 0; ++ u8 bpc = 0; ++ ++ switch (video->color_fmt) { ++ /* set YUV default color space conversion to BT601 */ ++ case DRM_COLOR_FORMAT_YCBCR444: ++ color_space = 6 + BT_601 * 8; ++ break; ++ case DRM_COLOR_FORMAT_YCBCR422: ++ color_space = 5 + BT_601 * 8; ++ break; ++ case DRM_COLOR_FORMAT_YCBCR420: ++ color_space = 5; ++ break; ++ case DRM_COLOR_FORMAT_RGB444: ++ default: ++ color_space = 0; ++ break; ++ }; ++ ++ switch (video->bpc) { ++ case 6: ++ bpc = 0; ++ break; ++ case 10: ++ bpc = 2; ++ break; ++ case 12: ++ bpc = 3; ++ break; ++ case 16: ++ bpc = 4; ++ break; ++ case 8: ++ default: ++ bpc = 1; ++ break; ++ }; ++ ++ msa_misc = (bpc << 5) | (color_space << 1); ++ ++ return msa_misc; ++} ++ ++static int cdns_dp_config_video(struct cdns_mhdp8501_device *mhdp, ++ const struct drm_display_mode *mode) ++{ ++ struct video_info *video = &mhdp->video_info; ++ bool h_sync_polarity, v_sync_polarity; ++ u64 symbol; ++ u32 val, link_rate, rem; ++ u8 bit_per_pix, tu_size_reg = TU_SIZE; ++ int ret; ++ ++ bit_per_pix = (video->color_fmt == DRM_COLOR_FORMAT_YCBCR422) ? ++ (video->bpc * 2) : (video->bpc * 3); ++ ++ link_rate = mhdp->dp.rate / 1000; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, BND_HSYNC2VSYNC, VIF_BYPASS_INTERLACE); ++ if (ret) ++ goto err_config_video; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HSYNC2VSYNC_POL_CTRL, 0); ++ if (ret) ++ goto err_config_video; ++ ++ /* ++ * get a best tu_size and valid symbol: ++ * 1. chose Lclk freq(162Mhz, 270Mhz, 540Mhz), set TU to 32 ++ * 2. calculate VS(valid symbol) = TU * Pclk * Bpp / (Lclk * Lanes) ++ * 3. if VS > *.85 or VS < *.1 or VS < 2 or TU < VS + 4, then set ++ * TU += 2 and repeat 2nd step. ++ */ ++ do { ++ tu_size_reg += 2; ++ symbol = tu_size_reg * mode->clock * bit_per_pix; ++ do_div(symbol, mhdp->dp.num_lanes * link_rate * 8); ++ rem = do_div(symbol, 1000); ++ if (tu_size_reg > 64) { ++ ret = -EINVAL; ++ dev_err(mhdp->dev, "tu error, clk:%d, lanes:%d, rate:%d\n", ++ mode->clock, mhdp->dp.num_lanes, link_rate); ++ goto err_config_video; ++ } ++ } while ((symbol <= 1) || (tu_size_reg - symbol < 4) || ++ (rem > 850) || (rem < 100)); ++ ++ val = symbol + (tu_size_reg << 8); ++ val |= TU_CNT_RST_EN; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_FRAMER_TU, val); ++ if (ret) ++ goto err_config_video; ++ ++ /* set the FIFO Buffer size */ ++ val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate; ++ val /= (mhdp->dp.num_lanes * link_rate); ++ val = div_u64(8 * (symbol + 1), bit_per_pix) - val; ++ val += 2; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_VC_TABLE(15), val); ++ ++ switch (video->bpc) { ++ case 6: ++ val = BCS_6; ++ break; ++ case 10: ++ val = BCS_10; ++ break; ++ case 12: ++ val = BCS_12; ++ break; ++ case 16: ++ val = BCS_16; ++ break; ++ case 8: ++ default: ++ val = BCS_8; ++ break; ++ }; ++ ++ val += video->color_fmt << 8; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_FRAMER_PXL_REPR, val); ++ if (ret) ++ goto err_config_video; ++ ++ v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); ++ h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); ++ ++ val = h_sync_polarity ? DP_FRAMER_SP_HSP : 0; ++ val |= v_sync_polarity ? DP_FRAMER_SP_VSP : 0; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_FRAMER_SP, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = (mode->hsync_start - mode->hdisplay) << 16; ++ val |= mode->htotal - mode->hsync_end; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_FRONT_BACK_PORCH, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->hdisplay * bit_per_pix / 8; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_BYTE_COUNT, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->htotal | ((mode->htotal - mode->hsync_start) << 16); ++ ret = cdns_mhdp_reg_write(&mhdp->base, MSA_HORIZONTAL_0, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->hsync_end - mode->hsync_start; ++ val |= (mode->hdisplay << 16) | (h_sync_polarity << 15); ++ ret = cdns_mhdp_reg_write(&mhdp->base, MSA_HORIZONTAL_1, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->vtotal; ++ val |= (mode->vtotal - mode->vsync_start) << 16; ++ ret = cdns_mhdp_reg_write(&mhdp->base, MSA_VERTICAL_0, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->vsync_end - mode->vsync_start; ++ val |= (mode->vdisplay << 16) | (v_sync_polarity << 15); ++ ret = cdns_mhdp_reg_write(&mhdp->base, MSA_VERTICAL_1, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = cdns_dp_get_msa_misc(video); ++ ret = cdns_mhdp_reg_write(&mhdp->base, MSA_MISC, val); ++ if (ret) ++ goto err_config_video; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, STREAM_CONFIG, 1); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->hsync_end - mode->hsync_start; ++ val |= mode->hdisplay << 16; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_HORIZONTAL, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->vdisplay; ++ val |= (mode->vtotal - mode->vsync_start) << 16; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_VERTICAL_0, val); ++ if (ret) ++ goto err_config_video; ++ ++ val = mode->vtotal; ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_VERTICAL_1, val); ++ if (ret) ++ goto err_config_video; ++ ++ ret = cdns_mhdp_dp_reg_write_bit(&mhdp->base, DP_VB_ID, 2, 1, 0); ++ ++err_config_video: ++ if (ret) ++ dev_err(mhdp->dev, "config video failed: %d\n", ret); ++ return ret; ++} ++ ++static void cdns_dp_pixel_clk_reset(struct cdns_mhdp8501_device *mhdp) ++{ ++ u32 val; ++ ++ /* reset pixel clk */ ++ cdns_mhdp_reg_read(&mhdp->base, SOURCE_HDTX_CAR, &val); ++ cdns_mhdp_reg_write(&mhdp->base, SOURCE_HDTX_CAR, val & 0xFD); ++ cdns_mhdp_reg_write(&mhdp->base, SOURCE_HDTX_CAR, val); ++} ++ ++static int cdns_dp_set_video_status(struct cdns_mhdp8501_device *mhdp, int active) ++{ ++ u8 msg; ++ int ret; ++ ++ msg = !!active; ++ ++ ret = cdns_mhdp_mailbox_send(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_SET_VIDEO, sizeof(msg), &msg); ++ if (ret) ++ dev_err(mhdp->dev, "set video status failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static int cdns_dp_training_start(struct cdns_mhdp8501_device *mhdp) ++{ ++ unsigned long timeout; ++ u8 msg, event[2]; ++ int ret; ++ ++ msg = LINK_TRAINING_RUN; ++ ++ /* start training */ ++ ret = cdns_mhdp_mailbox_send(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_TRAINING_CONTROL, sizeof(msg), &msg); ++ if (ret) ++ return ret; ++ ++ timeout = jiffies + msecs_to_jiffies(LINK_TRAINING_TIMEOUT_MS); ++ while (time_before(jiffies, timeout)) { ++ msleep(LINK_TRAINING_RETRY_MS); ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_READ_EVENT, ++ 0, NULL, sizeof(event), event); ++ if (ret) ++ return ret; ++ ++ if (event[1] & CLK_RECOVERY_FAILED) ++ dev_err(mhdp->dev, "clock recovery failed\n"); ++ else if (event[1] & EQ_PHASE_FINISHED) ++ return 0; ++ } ++ ++ return -ETIMEDOUT; ++} ++ ++static int cdns_dp_get_training_status(struct cdns_mhdp8501_device *mhdp) ++{ ++ u8 status[13]; ++ int ret; ++ ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_READ_LINK_STAT, ++ 0, NULL, sizeof(status), status); ++ if (ret) ++ return ret; ++ ++ mhdp->dp.rate = drm_dp_bw_code_to_link_rate(status[0]); ++ mhdp->dp.num_lanes = status[1]; ++ ++ return ret; ++} ++ ++static int cdns_dp_train_link(struct cdns_mhdp8501_device *mhdp) ++{ ++ int ret; ++ ++ ret = cdns_dp_training_start(mhdp); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to start training %d\n", ret); ++ return ret; ++ } ++ ++ ret = cdns_dp_get_training_status(mhdp); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to get training stat %d\n", ret); ++ return ret; ++ } ++ ++ dev_dbg(mhdp->dev, "rate:0x%x, lanes:%d\n", mhdp->dp.rate, ++ mhdp->dp.num_lanes); ++ return ret; ++} ++ ++static int cdns_dp_set_host_cap(struct cdns_mhdp8501_device *mhdp) ++{ ++ u8 msg[8]; ++ int ret; ++ ++ msg[0] = drm_dp_link_rate_to_bw_code(mhdp->dp.rate); ++ msg[1] = mhdp->dp.num_lanes | SCRAMBLER_EN; ++ msg[2] = VOLTAGE_LEVEL_2; ++ msg[3] = PRE_EMPHASIS_LEVEL_3; ++ msg[4] = PTS1 | PTS2 | PTS3 | PTS4; ++ msg[5] = FAST_LT_NOT_SUPPORT; ++ msg[6] = mhdp->lane_mapping; ++ msg[7] = ENHANCED; ++ ++ ret = cdns_mhdp_mailbox_send(&mhdp->base, MB_MODULE_ID_DP_TX, ++ DPTX_SET_HOST_CAPABILITIES, ++ sizeof(msg), msg); ++ if (ret) ++ dev_err(mhdp->dev, "set host cap failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static int cdns_dp_get_edid_block(void *data, u8 *edid, ++ unsigned int block, size_t length) ++{ ++ struct cdns_mhdp8501_device *mhdp = data; ++ u8 msg[2], reg[2], i; ++ int ret; ++ ++ for (i = 0; i < 4; i++) { ++ msg[0] = block / 2; ++ msg[1] = block % 2; ++ ++ ret = cdns_mhdp_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_DP_TX, ++ DPTX_GET_EDID, ++ sizeof(msg), msg, ++ DPTX_GET_EDID, ++ sizeof(reg), reg, ++ length, edid); ++ if (ret) ++ continue; ++ ++ if (reg[0] == length && reg[1] == block / 2) ++ break; ++ } ++ ++ if (ret) ++ dev_err(mhdp->dev, "get block[%d] edid failed: %d\n", ++ block, ret); ++ ++ return ret; ++} ++ ++static void cdns_dp_mode_set(struct cdns_mhdp8501_device *mhdp, ++ const struct drm_display_mode *mode) ++{ ++ union phy_configure_opts phy_cfg; ++ int ret; ++ ++ cdns_dp_pixel_clk_reset(mhdp); ++ ++ /* Get DP Caps */ ++ ret = drm_dp_dpcd_read(&mhdp->dp.aux, DP_DPCD_REV, mhdp->dp.dpcd, ++ DP_RECEIVER_CAP_SIZE); ++ if (ret < 0) { ++ dev_err(mhdp->dev, "Failed to get caps %d\n", ret); ++ return; ++ } ++ ++ mhdp->dp.rate = drm_dp_max_link_rate(mhdp->dp.dpcd); ++ mhdp->dp.num_lanes = drm_dp_max_lane_count(mhdp->dp.dpcd); ++ ++ /* check the max link rate */ ++ if (mhdp->dp.rate > CDNS_DP_MAX_LINK_RATE) ++ mhdp->dp.rate = CDNS_DP_MAX_LINK_RATE; ++ ++ phy_cfg.dp.lanes = mhdp->dp.num_lanes; ++ phy_cfg.dp.link_rate = mhdp->dp.rate; ++ phy_cfg.dp.set_lanes = false; ++ phy_cfg.dp.set_rate = false; ++ phy_cfg.dp.set_voltages = false; ++ ++ ret = phy_configure(mhdp->phy, &phy_cfg); ++ if (ret) { ++ dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n", ++ __func__, ret); ++ return; ++ } ++ ++ /* Video off */ ++ ret = cdns_dp_set_video_status(mhdp, CONTROL_VIDEO_IDLE); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to valid video %d\n", ret); ++ return; ++ } ++ ++ /* Line swapping */ ++ cdns_mhdp_reg_write(&mhdp->base, LANES_CONFIG, 0x00400000 | mhdp->lane_mapping); ++ ++ /* Set DP host capability */ ++ ret = cdns_dp_set_host_cap(mhdp); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to set host cap %d\n", ret); ++ return; ++ } ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, DP_AUX_SWAP_INVERSION_CONTROL, ++ AUX_HOST_INVERT); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to set host invert %d\n", ret); ++ return; ++ } ++ ++ ret = cdns_dp_config_video(mhdp, mode); ++ if (ret) ++ dev_err(mhdp->dev, "Failed to config video %d\n", ret); ++} ++ ++static bool ++cdns_dp_needs_link_retrain(struct cdns_mhdp8501_device *mhdp) ++{ ++ u8 link_status[DP_LINK_STATUS_SIZE]; ++ ++ if (drm_dp_dpcd_read_phy_link_status(&mhdp->dp.aux, DP_PHY_DPRX, ++ link_status) < 0) ++ return false; ++ ++ /* Retrain if link not ok */ ++ return !drm_dp_channel_eq_ok(link_status, mhdp->dp.num_lanes); ++} ++ ++void cdns_dp_check_link_state(struct cdns_mhdp8501_device *mhdp) ++{ ++ struct drm_connector *connector = mhdp->curr_conn; ++ const struct drm_edid *drm_edid; ++ struct drm_connector_state *conn_state; ++ struct drm_crtc_state *crtc_state; ++ struct drm_crtc *crtc; ++ ++ if (!connector) ++ return; ++ ++ /* ++ * EDID data needs updating after each cable plugin ++ * due to potential display monitor changes ++ */ ++ drm_edid = drm_edid_read_custom(connector, cdns_dp_get_edid_block, mhdp); ++ drm_edid_connector_update(connector, drm_edid); ++ ++ if (!drm_edid) ++ return; ++ ++ drm_edid_free(drm_edid); ++ ++ conn_state = connector->state; ++ crtc = conn_state->crtc; ++ if (!crtc) ++ return; ++ ++ crtc_state = crtc->state; ++ if (!crtc_state->active) ++ return; ++ ++ if (!cdns_dp_needs_link_retrain(mhdp)) ++ return; ++ ++ /* DP link retrain */ ++ if (cdns_dp_train_link(mhdp)) ++ dev_err(mhdp->dev, "Failed link train\n"); ++} ++ ++static int cdns_dp_bridge_attach(struct drm_bridge *bridge, ++ enum drm_bridge_attach_flags flags) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) { ++ dev_err(mhdp->dev, "do not support creating a drm_connector\n"); ++ return -EINVAL; ++ } ++ ++ mhdp->dp.aux.drm_dev = bridge->dev; ++ ++ return drm_dp_aux_register(&mhdp->dp.aux); ++} ++ ++static const struct drm_edid ++*cdns_dp_bridge_edid_read(struct drm_bridge *bridge, ++ struct drm_connector *connector) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ return drm_edid_read_custom(connector, cdns_dp_get_edid_block, mhdp); ++} ++ ++/* Currently supported format */ ++static const u32 mhdp8501_input_fmts[] = { ++ MEDIA_BUS_FMT_RGB888_1X24, ++ MEDIA_BUS_FMT_RGB101010_1X30, ++}; ++ ++static u32 *cdns_dp_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, ++ struct drm_bridge_state *bridge_state, ++ struct drm_crtc_state *crtc_state, ++ struct drm_connector_state *conn_state, ++ u32 output_fmt, ++ unsigned int *num_input_fmts) ++{ ++ u32 *input_fmts; ++ ++ *num_input_fmts = 0; ++ ++ input_fmts = kcalloc(ARRAY_SIZE(mhdp8501_input_fmts), ++ sizeof(*input_fmts), ++ GFP_KERNEL); ++ if (!input_fmts) ++ return NULL; ++ ++ *num_input_fmts = ARRAY_SIZE(mhdp8501_input_fmts); ++ memcpy(input_fmts, mhdp8501_input_fmts, sizeof(mhdp8501_input_fmts)); ++ ++ return input_fmts; ++} ++ ++static int cdns_dp_bridge_atomic_check(struct drm_bridge *bridge, ++ struct drm_bridge_state *bridge_state, ++ struct drm_crtc_state *crtc_state, ++ struct drm_connector_state *conn_state) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ struct video_info *video = &mhdp->video_info; ++ ++ if (bridge_state->input_bus_cfg.format == MEDIA_BUS_FMT_RGB888_1X24) { ++ video->bpc = 8; ++ video->color_fmt = DRM_COLOR_FORMAT_RGB444; ++ } else if (bridge_state->input_bus_cfg.format == MEDIA_BUS_FMT_RGB101010_1X30) { ++ video->bpc = 10; ++ video->color_fmt = DRM_COLOR_FORMAT_RGB444; ++ } else { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void cdns_dp_bridge_atomic_disable(struct drm_bridge *bridge, ++ struct drm_atomic_state *state) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ cdns_dp_set_video_status(mhdp, CONTROL_VIDEO_IDLE); ++ mhdp->curr_conn = NULL; ++ ++ phy_power_off(mhdp->phy); ++} ++ ++static void cdns_dp_bridge_atomic_enable(struct drm_bridge *bridge, ++ struct drm_atomic_state *state) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ struct drm_connector *connector; ++ struct drm_crtc_state *crtc_state; ++ struct drm_connector_state *conn_state; ++ int ret; ++ ++ connector = drm_atomic_get_new_connector_for_encoder(state, ++ bridge->encoder); ++ if (WARN_ON(!connector)) ++ return; ++ ++ mhdp->curr_conn = connector; ++ ++ conn_state = drm_atomic_get_new_connector_state(state, connector); ++ if (WARN_ON(!conn_state)) ++ return; ++ ++ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); ++ if (WARN_ON(!crtc_state)) ++ return; ++ ++ cdns_dp_mode_set(mhdp, &crtc_state->adjusted_mode); ++ ++ /* Power up PHY before link training */ ++ phy_power_on(mhdp->phy); ++ ++ /* Link training */ ++ ret = cdns_dp_train_link(mhdp); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed link train %d\n", ret); ++ return; ++ } ++ ++ ret = cdns_dp_set_video_status(mhdp, CONTROL_VIDEO_VALID); ++ if (ret) { ++ dev_err(mhdp->dev, "Failed to valid video %d\n", ret); ++ return; ++ } ++} ++ ++const struct drm_bridge_funcs cdns_dp_bridge_funcs = { ++ .attach = cdns_dp_bridge_attach, ++ .detect = cdns_mhdp8501_detect, ++ .edid_read = cdns_dp_bridge_edid_read, ++ .mode_valid = cdns_mhdp8501_mode_valid, ++ .atomic_enable = cdns_dp_bridge_atomic_enable, ++ .atomic_disable = cdns_dp_bridge_atomic_disable, ++ .atomic_get_input_bus_fmts = cdns_dp_bridge_atomic_get_input_bus_fmts, ++ .atomic_check = cdns_dp_bridge_atomic_check, ++ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, ++ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, ++ .atomic_reset = drm_atomic_helper_bridge_reset, ++}; +diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c +new file mode 100644 +index 0000000000000..9556d0929e21d +--- /dev/null ++++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c +@@ -0,0 +1,744 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Cadence MHDP8501 HDMI bridge driver ++ * ++ * Copyright (C) 2019-2024 NXP Semiconductor, Inc. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "cdns-mhdp8501-core.h" ++ ++/** ++ * cdns_hdmi_config_infoframe() - fill the HDMI infoframe ++ * @mhdp: phandle to mhdp device. ++ * @entry_id: The packet memory address in which the data is written. ++ * @len: length of infoframe. ++ * @buf: point to InfoFrame Packet. ++ * @type: Packet Type of InfoFrame in HDMI Specification. ++ * ++ */ ++ ++static void cdns_hdmi_clear_infoframe(struct cdns_mhdp8501_device *mhdp, ++ u8 entry_id, u8 type) ++{ ++ u32 val; ++ ++ /* invalidate entry */ ++ val = F_ACTIVE_IDLE_TYPE(1) | F_PKT_ALLOC_ADDRESS(entry_id) | ++ F_PACKET_TYPE(type); ++ writel(val, mhdp->regs + SOURCE_PIF_PKT_ALLOC_REG); ++ writel(F_PKT_ALLOC_WR_EN(1), mhdp->regs + SOURCE_PIF_PKT_ALLOC_WR_EN); ++} ++ ++static void cdns_hdmi_config_infoframe(struct cdns_mhdp8501_device *mhdp, ++ u8 entry_id, u8 len, ++ const u8 *buf, u8 type) ++{ ++ u8 packet[32], packet_len = 32; ++ u32 packet32, len32; ++ u32 val, i; ++ ++ /* ++ * only support 32 bytes now ++ * packet[0] = 0 ++ * packet[1-3] = HB[0-2] InfoFrame Packet Header ++ * packet[4-31 = PB[0-27] InfoFrame Packet Contents ++ */ ++ if (len >= (packet_len - 1)) ++ return; ++ packet[0] = 0; ++ memcpy(packet + 1, buf, len); ++ ++ cdns_hdmi_clear_infoframe(mhdp, entry_id, type); ++ ++ /* flush fifo 1 */ ++ writel(F_FIFO1_FLUSH(1), mhdp->regs + SOURCE_PIF_FIFO1_FLUSH); ++ ++ /* write packet into memory */ ++ len32 = packet_len / 4; ++ for (i = 0; i < len32; i++) { ++ packet32 = get_unaligned_le32(packet + 4 * i); ++ writel(F_DATA_WR(packet32), mhdp->regs + SOURCE_PIF_DATA_WR); ++ } ++ ++ /* write entry id */ ++ writel(F_WR_ADDR(entry_id), mhdp->regs + SOURCE_PIF_WR_ADDR); ++ ++ /* write request */ ++ writel(F_HOST_WR(1), mhdp->regs + SOURCE_PIF_WR_REQ); ++ ++ /* update entry */ ++ val = F_ACTIVE_IDLE_TYPE(1) | F_TYPE_VALID(1) | ++ F_PACKET_TYPE(type) | F_PKT_ALLOC_ADDRESS(entry_id); ++ writel(val, mhdp->regs + SOURCE_PIF_PKT_ALLOC_REG); ++ ++ writel(F_PKT_ALLOC_WR_EN(1), mhdp->regs + SOURCE_PIF_PKT_ALLOC_WR_EN); ++} ++ ++static int cdns_hdmi_get_edid_block(void *data, u8 *edid, ++ u32 block, size_t length) ++{ ++ struct cdns_mhdp8501_device *mhdp = data; ++ u8 msg[2], reg[5], i; ++ int ret; ++ ++ for (i = 0; i < 4; i++) { ++ msg[0] = block / 2; ++ msg[1] = block % 2; ++ ++ ret = cdns_mhdp_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_HDMI_TX, ++ HDMI_TX_EDID, ++ sizeof(msg), msg, ++ HDMI_TX_EDID, ++ sizeof(reg), reg, ++ length, edid); ++ ++ if (ret) ++ continue; ++ ++ if ((reg[3] << 8 | reg[4]) == length) ++ break; ++ } ++ ++ if (ret) ++ dev_err(mhdp->dev, "get block[%d] edid failed: %d\n", block, ret); ++ return ret; ++} ++ ++static int cdns_hdmi_set_hdmi_mode_type(struct cdns_mhdp8501_device *mhdp) ++{ ++ struct drm_connector_state *conn_state = mhdp->curr_conn->state; ++ u32 protocol = mhdp->hdmi.hdmi_type; ++ u32 val; ++ ++ if (protocol == MODE_HDMI_2_0 && ++ conn_state->hdmi.tmds_char_rate >= 340000000) { ++ cdns_mhdp_reg_write(&mhdp->base, HDTX_CLOCK_REG_0, 0); ++ cdns_mhdp_reg_write(&mhdp->base, HDTX_CLOCK_REG_1, 0xFFFFF); ++ } ++ ++ cdns_mhdp_reg_read(&mhdp->base, HDTX_CONTROLLER, &val); ++ ++ /* set HDMI mode and preemble mode data enable */ ++ val |= F_HDMI_MODE(protocol) | F_HDMI2_PREAMBLE_EN(1) | ++ F_HDMI2_CTRL_IL_MODE(1); ++ return cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++} ++ ++static int cdns_hdmi_ctrl_init(struct cdns_mhdp8501_device *mhdp) ++{ ++ u32 val; ++ int ret; ++ ++ /* Set PHY to HDMI data */ ++ ret = cdns_mhdp_reg_write(&mhdp->base, PHY_DATA_SEL, F_SOURCE_PHY_MHDP_SEL(1)); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_HPD, ++ F_HPD_VALID_WIDTH(4) | F_HPD_GLITCH_WIDTH(0)); ++ if (ret < 0) ++ return ret; ++ ++ /* open CARS */ ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_PHY_CAR, 0xF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_HDTX_CAR, 0xFF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_PKT_CAR, 0xF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_AIF_CAR, 0xF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_CIPHER_CAR, 0xF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_CRYPTO_CAR, 0xF); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, SOURCE_CEC_CAR, 3); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_CLOCK_REG_0, 0x7c1f); ++ if (ret < 0) ++ return ret; ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_CLOCK_REG_1, 0x7c1f); ++ if (ret < 0) ++ return ret; ++ ++ /* init HDMI Controller */ ++ val = F_BCH_EN(1) | F_PIC_3D(0xF) | F_CLEAR_AVMUTE(1); ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++ if (ret < 0) ++ return ret; ++ ++ return cdns_hdmi_set_hdmi_mode_type(mhdp); ++} ++ ++static int cdns_hdmi_mode_config(struct cdns_mhdp8501_device *mhdp, ++ struct drm_display_mode *mode, ++ struct drm_connector_hdmi_state *hdmi) ++{ ++ u32 vsync_lines = mode->vsync_end - mode->vsync_start; ++ u32 eof_lines = mode->vsync_start - mode->vdisplay; ++ u32 sof_lines = mode->vtotal - mode->vsync_end; ++ u32 hblank = mode->htotal - mode->hdisplay; ++ u32 hactive = mode->hdisplay; ++ u32 vblank = mode->vtotal - mode->vdisplay; ++ u32 vactive = mode->vdisplay; ++ u32 hfront = mode->hsync_start - mode->hdisplay; ++ u32 hback = mode->htotal - mode->hsync_end; ++ u32 vfront = eof_lines; ++ u32 hsync = hblank - hfront - hback; ++ u32 vsync = vsync_lines; ++ u32 vback = sof_lines; ++ u32 v_h_polarity = ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1) + ++ ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : 2); ++ int ret; ++ u32 val; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, SCHEDULER_H_SIZE, (hactive << 16) + hblank); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, SCHEDULER_V_SIZE, (vactive << 16) + vblank); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_SIGNAL_FRONT_WIDTH, (vfront << 16) + hfront); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_SIGNAL_SYNC_WIDTH, (vsync << 16) + hsync); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_SIGNAL_BACK_WIDTH, (vback << 16) + hback); ++ if (ret < 0) ++ return ret; ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HSYNC2VSYNC_POL_CTRL, v_h_polarity); ++ if (ret < 0) ++ return ret; ++ ++ /* Reset Data Enable */ ++ cdns_mhdp_reg_read(&mhdp->base, HDTX_CONTROLLER, &val); ++ val &= ~F_DATA_EN(1); ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++ if (ret < 0) ++ return ret; ++ ++ /* Set bpc */ ++ val &= ~F_VIF_DATA_WIDTH(3); ++ switch (hdmi->output_bpc) { ++ case 10: ++ val |= F_VIF_DATA_WIDTH(1); ++ break; ++ case 12: ++ val |= F_VIF_DATA_WIDTH(2); ++ break; ++ case 16: ++ val |= F_VIF_DATA_WIDTH(3); ++ break; ++ case 8: ++ default: ++ val |= F_VIF_DATA_WIDTH(0); ++ break; ++ } ++ ++ /* select color encoding */ ++ val &= ~F_HDMI_ENCODING(3); ++ switch (hdmi->output_format) { ++ case HDMI_COLORSPACE_YUV444: ++ val |= F_HDMI_ENCODING(2); ++ break; ++ case HDMI_COLORSPACE_YUV422: ++ val |= F_HDMI_ENCODING(1); ++ break; ++ case HDMI_COLORSPACE_YUV420: ++ val |= F_HDMI_ENCODING(3); ++ break; ++ case HDMI_COLORSPACE_RGB: ++ default: ++ val |= F_HDMI_ENCODING(0); ++ break; ++ } ++ ++ ret = cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++ if (ret < 0) ++ return ret; ++ ++ /* set data enable */ ++ val |= F_DATA_EN(1); ++ return cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++} ++ ++static int cdns_hdmi_disable_gcp(struct cdns_mhdp8501_device *mhdp) ++{ ++ u32 val; ++ ++ cdns_mhdp_reg_read(&mhdp->base, HDTX_CONTROLLER, &val); ++ val &= ~F_GCP_EN(1); ++ ++ return cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++} ++ ++static int cdns_hdmi_enable_gcp(struct cdns_mhdp8501_device *mhdp) ++{ ++ u32 val; ++ ++ cdns_mhdp_reg_read(&mhdp->base, HDTX_CONTROLLER, &val); ++ val |= F_GCP_EN(1); ++ ++ return cdns_mhdp_reg_write(&mhdp->base, HDTX_CONTROLLER, val); ++} ++ ++#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000) ++static void cdns_hdmi_sink_config(struct cdns_mhdp8501_device *mhdp, ++ unsigned long long tmds_char_rate) ++{ ++ struct drm_connector *connector = mhdp->curr_conn; ++ struct drm_display_info *display = &connector->display_info; ++ struct drm_scdc *scdc = &display->hdmi.scdc; ++ bool hdmi_scrambling = false; ++ bool hdmi_high_tmds_clock_ratio = false; ++ ++ /* check sink type (HDMI or DVI) */ ++ if (!display->is_hdmi) { ++ mhdp->hdmi.hdmi_type = MODE_DVI; ++ return; ++ } ++ ++ /* Default work in HDMI1.4 */ ++ mhdp->hdmi.hdmi_type = MODE_HDMI_1_4; ++ ++ /* check sink support SCDC or not */ ++ if (!scdc->supported) { ++ dev_dbg(mhdp->dev, "Sink Not Support SCDC\n"); ++ return; ++ } ++ ++ if (tmds_char_rate > HDMI_14_MAX_TMDS_CLK) { ++ hdmi_scrambling = true; ++ hdmi_high_tmds_clock_ratio = true; ++ mhdp->hdmi.hdmi_type = MODE_HDMI_2_0; ++ } else if (scdc->scrambling.low_rates) { ++ hdmi_scrambling = true; ++ mhdp->hdmi.hdmi_type = MODE_HDMI_2_0; ++ } ++ ++ /* Set TMDS bit clock ratio to 1/40 or 1/10, and enable/disable scrambling */ ++ drm_scdc_set_high_tmds_clock_ratio(connector, hdmi_high_tmds_clock_ratio); ++ drm_scdc_set_scrambling(connector, hdmi_scrambling); ++} ++ ++static int cdns_hdmi_bridge_attach(struct drm_bridge *bridge, ++ enum drm_bridge_attach_flags flags) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) { ++ dev_err(mhdp->dev, "do not support creating a drm_connector\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int reset_pipe(struct drm_crtc *crtc) ++{ ++ struct drm_atomic_state *state; ++ struct drm_crtc_state *crtc_state; ++ struct drm_modeset_acquire_ctx ctx; ++ int ret; ++ ++ state = drm_atomic_state_alloc(crtc->dev); ++ if (!state) ++ return -ENOMEM; ++ ++ drm_modeset_acquire_init(&ctx, 0); ++ ++ state->acquire_ctx = &ctx; ++ ++ crtc_state = drm_atomic_get_crtc_state(state, crtc); ++ if (IS_ERR(crtc_state)) { ++ ret = PTR_ERR(crtc_state); ++ goto out; ++ } ++ ++ crtc_state->connectors_changed = true; ++ ++ ret = drm_atomic_commit(state); ++out: ++ drm_atomic_state_put(state); ++ drm_modeset_drop_locks(&ctx); ++ drm_modeset_acquire_fini(&ctx); ++ ++ return ret; ++} ++ ++void cdns_hdmi_handle_hotplug(struct cdns_mhdp8501_device *mhdp) ++{ ++ struct drm_connector *connector = mhdp->curr_conn; ++ const struct drm_edid *drm_edid; ++ struct drm_connector_state *conn_state; ++ struct drm_crtc_state *crtc_state; ++ struct drm_crtc *crtc; ++ ++ if (!connector) ++ return; ++ ++ /* ++ * EDID data needs updating after each cable plugin ++ * due to potential display monitor changes ++ */ ++ drm_edid = drm_edid_read_custom(connector, cdns_hdmi_get_edid_block, mhdp); ++ drm_edid_connector_update(connector, drm_edid); ++ ++ if (!drm_edid) ++ return; ++ ++ drm_edid_free(drm_edid); ++ ++ conn_state = connector->state; ++ crtc = conn_state->crtc; ++ if (!crtc) ++ return; ++ ++ crtc_state = crtc->state; ++ if (!crtc_state->active) ++ return; ++ ++ /* ++ * HDMI 2.0 says that one should not send scrambled data ++ * prior to configuring the sink scrambling, and that ++ * TMDS clock/data transmission should be suspended when ++ * changing the TMDS clock rate in the sink. So let's ++ * just do a full modeset here, even though some sinks ++ * would be perfectly happy if were to just reconfigure ++ * the SCDC settings on the fly. ++ */ ++ reset_pipe(crtc); ++} ++ ++static int cdns_hdmi_i2c_write(struct cdns_mhdp8501_device *mhdp, ++ struct i2c_msg *msgs) ++{ ++ u8 msg[5], reg[5]; ++ int ret; ++ ++ msg[0] = msgs->addr; ++ msg[1] = msgs->buf[0]; ++ msg[2] = 0; ++ msg[3] = 1; ++ msg[4] = msgs->buf[1]; ++ ++ ret = cdns_mhdp_mailbox_send_recv(&mhdp->base, ++ MB_MODULE_ID_HDMI_TX, HDMI_TX_WRITE, ++ sizeof(msg), msg, sizeof(reg), reg); ++ if (ret) { ++ dev_err(mhdp->dev, "I2C write failed: %d\n", ret); ++ return ret; ++ } ++ ++ if (reg[0] != 0) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int cdns_hdmi_i2c_read(struct cdns_mhdp8501_device *mhdp, ++ struct i2c_msg *msgs, int num) ++{ ++ u8 msg[4], reg[5]; ++ u8 addr, offset, *buf, len; ++ int ret, i; ++ ++ for (i = 0; i < num; i++) { ++ if (msgs[i].flags & I2C_M_RD) { ++ addr = msgs[i].addr; ++ buf = msgs[i].buf; ++ len = msgs[i].len; ++ } else { ++ offset = msgs[i].buf[0]; ++ } ++ } ++ ++ msg[0] = addr; ++ msg[1] = offset; ++ put_unaligned_be16(len, msg + 2); ++ ++ ret = cdns_mhdp_mailbox_send_recv_multi(&mhdp->base, ++ MB_MODULE_ID_HDMI_TX, HDMI_TX_READ, ++ sizeof(msg), msg, ++ HDMI_TX_READ, ++ sizeof(reg), reg, ++ len, buf); ++ if (ret) { ++ dev_err(mhdp->dev, "I2c Read failed: %d\n", ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++#define SCDC_I2C_SLAVE_ADDRESS 0x54 ++static int cdns_hdmi_i2c_xfer(struct i2c_adapter *adap, ++ struct i2c_msg *msgs, int num) ++{ ++ struct cdns_mhdp8501_device *mhdp = i2c_get_adapdata(adap); ++ struct cdns_hdmi_i2c *i2c = mhdp->hdmi.i2c; ++ int i, ret = 0; ++ ++ /* ++ * MHDP FW provides mailbox APIs for SCDC registers access, but lacks direct I2C APIs. ++ * While individual I2C registers can be read/written using HDMI general register APIs, ++ * block reads (e.g., EDID) are not supported, making it a limited I2C interface. ++ */ ++ for (i = 0; i < num; i++) { ++ if (msgs[i].addr != SCDC_I2C_SLAVE_ADDRESS) { ++ dev_err(mhdp->dev, "ADDR=%0x is not supported\n", msgs[i].addr); ++ return -EINVAL; ++ } ++ } ++ ++ mutex_lock(&i2c->lock); ++ ++ if (num == 1) ++ ret = cdns_hdmi_i2c_write(mhdp, msgs); ++ else ++ ret = cdns_hdmi_i2c_read(mhdp, msgs, num); ++ ++ if (!ret) ++ ret = num; ++ ++ mutex_unlock(&i2c->lock); ++ ++ return ret; ++} ++ ++static u32 cdns_hdmi_i2c_func(struct i2c_adapter *adapter) ++{ ++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm cdns_hdmi_algorithm = { ++ .master_xfer = cdns_hdmi_i2c_xfer, ++ .functionality = cdns_hdmi_i2c_func, ++}; ++ ++struct i2c_adapter *cdns_hdmi_i2c_adapter(struct cdns_mhdp8501_device *mhdp) ++{ ++ struct i2c_adapter *adap; ++ struct cdns_hdmi_i2c *i2c; ++ int ret; ++ ++ i2c = devm_kzalloc(mhdp->dev, sizeof(*i2c), GFP_KERNEL); ++ if (!i2c) ++ return ERR_PTR(-ENOMEM); ++ ++ mutex_init(&i2c->lock); ++ ++ adap = &i2c->adap; ++ adap->owner = THIS_MODULE; ++ adap->dev.parent = mhdp->dev; ++ adap->algo = &cdns_hdmi_algorithm; ++ strscpy(adap->name, "MHDP HDMI", sizeof(adap->name)); ++ i2c_set_adapdata(adap, mhdp); ++ ++ ret = i2c_add_adapter(adap); ++ if (ret) { ++ dev_warn(mhdp->dev, "cannot add %s I2C adapter\n", adap->name); ++ devm_kfree(mhdp->dev, i2c); ++ return ERR_PTR(ret); ++ } ++ ++ mhdp->hdmi.i2c = i2c; ++ ++ return adap; ++} ++ ++static enum drm_mode_status ++cdns_hdmi_tmds_char_rate_valid(const struct drm_bridge *bridge, ++ const struct drm_display_mode *mode, ++ unsigned long long tmds_rate) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ union phy_configure_opts phy_cfg; ++ int ret; ++ ++ phy_cfg.hdmi.tmds_char_rate = tmds_rate; ++ ++ ret = phy_validate(mhdp->phy, PHY_MODE_HDMI, 0, &phy_cfg); ++ if (ret < 0) ++ return MODE_CLOCK_RANGE; ++ ++ return MODE_OK; ++} ++ ++static const struct drm_edid ++*cdns_hdmi_bridge_edid_read(struct drm_bridge *bridge, ++ struct drm_connector *connector) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ return drm_edid_read_custom(connector, cdns_hdmi_get_edid_block, mhdp); ++} ++ ++static void cdns_hdmi_bridge_atomic_disable(struct drm_bridge *bridge, ++ struct drm_atomic_state *state) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ mhdp->curr_conn = NULL; ++ ++ phy_power_off(mhdp->phy); ++} ++ ++static void cdns_hdmi_bridge_atomic_enable(struct drm_bridge *bridge, ++ struct drm_atomic_state *state) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ struct drm_connector *connector; ++ struct drm_crtc_state *crtc_state; ++ struct drm_connector_state *conn_state; ++ struct drm_connector_hdmi_state *hdmi; ++ union phy_configure_opts phy_cfg; ++ int ret; ++ ++ connector = drm_atomic_get_new_connector_for_encoder(state, ++ bridge->encoder); ++ if (WARN_ON(!connector)) ++ return; ++ ++ mhdp->curr_conn = connector; ++ ++ conn_state = drm_atomic_get_new_connector_state(state, connector); ++ if (WARN_ON(!conn_state)) ++ return; ++ ++ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); ++ if (WARN_ON(!crtc_state)) ++ return; ++ ++ drm_atomic_helper_connector_hdmi_update_infoframes(connector, state); ++ ++ /* Line swapping */ ++ cdns_mhdp_reg_write(&mhdp->base, LANES_CONFIG, 0x00400000 | mhdp->lane_mapping); ++ ++ hdmi = &conn_state->hdmi; ++ if (WARN_ON(!hdmi)) ++ return; ++ ++ phy_cfg.hdmi.tmds_char_rate = hdmi->tmds_char_rate; ++ ret = phy_configure(mhdp->phy, &phy_cfg); ++ if (ret) { ++ dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n", ++ __func__, ret); ++ return; ++ } ++ ++ phy_power_on(mhdp->phy); ++ ++ cdns_hdmi_sink_config(mhdp, hdmi->tmds_char_rate); ++ ++ ret = cdns_hdmi_ctrl_init(mhdp); ++ if (ret < 0) { ++ dev_err(mhdp->dev, "hdmi ctrl init failed = %d\n", ret); ++ return; ++ } ++ ++ /* Config GCP */ ++ if (hdmi->output_bpc == 8) ++ cdns_hdmi_disable_gcp(mhdp); ++ else ++ cdns_hdmi_enable_gcp(mhdp); ++ ++ ret = cdns_hdmi_mode_config(mhdp, &crtc_state->adjusted_mode, hdmi); ++ if (ret < 0) { ++ dev_err(mhdp->dev, "CDN_API_HDMITX_SetVic_blocking ret = %d\n", ret); ++ return; ++ } ++} ++ ++static int cdns_hdmi_bridge_clear_infoframe(struct drm_bridge *bridge, ++ enum hdmi_infoframe_type type) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ switch (type) { ++ case HDMI_INFOFRAME_TYPE_AVI: ++ cdns_hdmi_clear_infoframe(mhdp, 0, HDMI_INFOFRAME_TYPE_AVI); ++ break; ++ case HDMI_INFOFRAME_TYPE_SPD: ++ cdns_hdmi_clear_infoframe(mhdp, 1, HDMI_INFOFRAME_TYPE_SPD); ++ break; ++ case HDMI_INFOFRAME_TYPE_VENDOR: ++ cdns_hdmi_clear_infoframe(mhdp, 2, HDMI_INFOFRAME_TYPE_VENDOR); ++ break; ++ default: ++ dev_dbg(mhdp->dev, "Unsupported infoframe type %x\n", type); ++ } ++ ++ return 0; ++} ++ ++static int cdns_hdmi_bridge_write_infoframe(struct drm_bridge *bridge, ++ enum hdmi_infoframe_type type, ++ const u8 *buffer, size_t len) ++{ ++ struct cdns_mhdp8501_device *mhdp = bridge->driver_private; ++ ++ switch (type) { ++ case HDMI_INFOFRAME_TYPE_AVI: ++ cdns_hdmi_config_infoframe(mhdp, 0, len, buffer, HDMI_INFOFRAME_TYPE_AVI); ++ break; ++ case HDMI_INFOFRAME_TYPE_SPD: ++ cdns_hdmi_config_infoframe(mhdp, 1, len, buffer, HDMI_INFOFRAME_TYPE_SPD); ++ break; ++ case HDMI_INFOFRAME_TYPE_VENDOR: ++ cdns_hdmi_config_infoframe(mhdp, 2, len, buffer, HDMI_INFOFRAME_TYPE_VENDOR); ++ break; ++ default: ++ dev_dbg(mhdp->dev, "Unsupported infoframe type %x\n", type); ++ } ++ ++ return 0; ++} ++ ++static int cdns_hdmi_bridge_atomic_check(struct drm_bridge *bridge, ++ struct drm_bridge_state *bridge_state, ++ struct drm_crtc_state *crtc_state, ++ struct drm_connector_state *conn_state) ++{ ++ return drm_atomic_helper_connector_hdmi_check(conn_state->connector, conn_state->state); ++} ++ ++const struct drm_bridge_funcs cdns_hdmi_bridge_funcs = { ++ .attach = cdns_hdmi_bridge_attach, ++ .detect = cdns_mhdp8501_detect, ++ .edid_read = cdns_hdmi_bridge_edid_read, ++ .mode_valid = cdns_mhdp8501_mode_valid, ++ .atomic_enable = cdns_hdmi_bridge_atomic_enable, ++ .atomic_disable = cdns_hdmi_bridge_atomic_disable, ++ .atomic_check = cdns_hdmi_bridge_atomic_check, ++ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, ++ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, ++ .atomic_reset = drm_atomic_helper_bridge_reset, ++ .hdmi_clear_infoframe = cdns_hdmi_bridge_clear_infoframe, ++ .hdmi_write_infoframe = cdns_hdmi_bridge_write_infoframe, ++ .hdmi_tmds_char_rate_valid = cdns_hdmi_tmds_char_rate_valid, ++}; + +From patchwork Tue Dec 17 06:51:48 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,6/9] dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY +From: Sandor Yu +X-Patchwork-Id: 629293 +Message-Id: + <1f01892a4e462d451a21ddcb4b114283d998cd1b.1734340233.git.Sandor.yu@nxp.com> +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org, + Rob Herring +Date: Tue, 17 Dec 2024 14:51:48 +0800 + +Add bindings for Freescale iMX8MQ DP and HDMI PHY. + +Signed-off-by: Sandor Yu +Reviewed-by: Rob Herring +--- +v9->v20: + *No change. + + .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 51 +++++++++++++++++++ + 1 file changed, 51 insertions(+) + create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml + +diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml +new file mode 100644 +index 0000000000000..c17a645e71bad +--- /dev/null ++++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml +@@ -0,0 +1,51 @@ ++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/phy/fsl,imx8mq-dp-hdmi-phy.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC ++ ++maintainers: ++ - Sandor Yu ++ ++properties: ++ compatible: ++ const: fsl,imx8mq-hdptx-phy ++ ++ reg: ++ maxItems: 1 ++ ++ clocks: ++ items: ++ - description: PHY reference clock. ++ - description: APB clock. ++ ++ clock-names: ++ items: ++ - const: ref ++ - const: apb ++ ++ "#phy-cells": ++ const: 0 ++ ++required: ++ - compatible ++ - reg ++ - clocks ++ - clock-names ++ - "#phy-cells" ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ #include ++ dp_phy: phy@32c00000 { ++ compatible = "fsl,imx8mq-hdptx-phy"; ++ reg = <0x32c00000 0x100000>; ++ #phy-cells = <0>; ++ clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; ++ clock-names = "ref", "apb"; ++ }; + +From patchwork Tue Dec 17 06:51:49 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,7/9] phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for + i.MX8MQ +From: Sandor Yu +X-Patchwork-Id: 629294 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:49 +0800 + +Add Cadence HDP-TX DisplayPort and HDMI PHY driver for i.MX8MQ. + +Cadence HDP-TX PHY could be put in either DP mode or +HDMI mode base on the configuration chosen. +DisplayPort or HDMI PHY mode is configured in the driver. + +Signed-off-by: Sandor Yu +Signed-off-by: Alexander Stein +--- +v19->v20: +- implify DP configuration handling by directly copying + the configuration options to the driver's internal structure. +- return the error code directly instead of logging an error message in `hdptx_clk_enable` +- Remove redundant ref_clk_rate check + +v18->v19: +- Simplify the PLL tables by removing unused and constant data +- Remove PHY power management, controller driver will handle them. +- Remove enum dp_link_rate +- Introduce read_pll_timeout. +- Update clock management as devm_clk_get_enabled() introduced. +- Remove cdns_hdptx_phy_init() and cdns_hdptx_phy_remove(). + +v17->v18: +- fix build error as code rebase to latest kernel version. + + drivers/phy/freescale/Kconfig | 10 + + drivers/phy/freescale/Makefile | 1 + + drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c | 1231 ++++++++++++++++++ + 3 files changed, 1242 insertions(+) + create mode 100644 drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c + +diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig +index dcd9acff6d01a..2b1210367b31c 100644 +--- a/drivers/phy/freescale/Kconfig ++++ b/drivers/phy/freescale/Kconfig +@@ -35,6 +35,16 @@ config PHY_FSL_IMX8M_PCIE + Enable this to add support for the PCIE PHY as found on + i.MX8M family of SOCs. + ++config PHY_FSL_IMX8MQ_HDPTX ++ tristate "Freescale i.MX8MQ DP/HDMI PHY support" ++ depends on OF && HAS_IOMEM ++ depends on COMMON_CLK ++ select GENERIC_PHY ++ select CDNS_MHDP_HELPER ++ help ++ Enable this to support the Cadence HDPTX DP/HDMI PHY driver ++ on i.MX8MQ SOC. ++ + config PHY_FSL_IMX8QM_HSIO + tristate "Freescale i.MX8QM HSIO PHY" + depends on OF && HAS_IOMEM +diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile +index 658eac7d0a622..a946b87905498 100644 +--- a/drivers/phy/freescale/Makefile ++++ b/drivers/phy/freescale/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0-only ++obj-$(CONFIG_PHY_FSL_IMX8MQ_HDPTX) += phy-fsl-imx8mq-hdptx.o + obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o + obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o + obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o +diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c b/drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c +new file mode 100644 +index 0000000000000..230b7148639b2 +--- /dev/null ++++ b/drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c +@@ -0,0 +1,1231 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Cadence DP/HDMI PHY driver ++ * ++ * Copyright (C) 2022-2024 NXP Semiconductor, Inc. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define ADDR_PHY_AFE 0x80000 ++ ++/* PHY registers */ ++#define CMN_SSM_BIAS_TMR 0x0022 ++#define CMN_PLLSM0_PLLEN_TMR 0x0029 ++#define CMN_PLLSM0_PLLPRE_TMR 0x002a ++#define CMN_PLLSM0_PLLVREF_TMR 0x002b ++#define CMN_PLLSM0_PLLLOCK_TMR 0x002c ++#define CMN_PLLSM0_USER_DEF_CTRL 0x002f ++#define CMN_PSM_CLK_CTRL 0x0061 ++#define CMN_CDIAG_REFCLK_CTRL 0x0062 ++#define CMN_PLL0_VCOCAL_START 0x0081 ++#define CMN_PLL0_VCOCAL_INIT_TMR 0x0084 ++#define CMN_PLL0_VCOCAL_ITER_TMR 0x0085 ++#define CMN_PLL0_INTDIV 0x0094 ++#define CMN_PLL0_FRACDIV 0x0095 ++#define CMN_PLL0_HIGH_THR 0x0096 ++#define CMN_PLL0_DSM_DIAG 0x0097 ++#define CMN_PLL0_SS_CTRL2 0x0099 ++#define CMN_ICAL_INIT_TMR 0x00c4 ++#define CMN_ICAL_ITER_TMR 0x00c5 ++#define CMN_RXCAL_INIT_TMR 0x00d4 ++#define CMN_RXCAL_ITER_TMR 0x00d5 ++#define CMN_TXPUCAL_CTRL 0x00e0 ++#define CMN_TXPUCAL_INIT_TMR 0x00e4 ++#define CMN_TXPUCAL_ITER_TMR 0x00e5 ++#define CMN_TXPDCAL_CTRL 0x00f0 ++#define CMN_TXPDCAL_INIT_TMR 0x00f4 ++#define CMN_TXPDCAL_ITER_TMR 0x00f5 ++#define CMN_ICAL_ADJ_INIT_TMR 0x0102 ++#define CMN_ICAL_ADJ_ITER_TMR 0x0103 ++#define CMN_RX_ADJ_INIT_TMR 0x0106 ++#define CMN_RX_ADJ_ITER_TMR 0x0107 ++#define CMN_TXPU_ADJ_CTRL 0x0108 ++#define CMN_TXPU_ADJ_INIT_TMR 0x010a ++#define CMN_TXPU_ADJ_ITER_TMR 0x010b ++#define CMN_TXPD_ADJ_CTRL 0x010c ++#define CMN_TXPD_ADJ_INIT_TMR 0x010e ++#define CMN_TXPD_ADJ_ITER_TMR 0x010f ++#define CMN_DIAG_PLL0_FBH_OVRD 0x01c0 ++#define CMN_DIAG_PLL0_FBL_OVRD 0x01c1 ++#define CMN_DIAG_PLL0_OVRD 0x01c2 ++#define CMN_DIAG_PLL0_TEST_MODE 0x01c4 ++#define CMN_DIAG_PLL0_V2I_TUNE 0x01c5 ++#define CMN_DIAG_PLL0_CP_TUNE 0x01c6 ++#define CMN_DIAG_PLL0_LF_PROG 0x01c7 ++#define CMN_DIAG_PLL0_PTATIS_TUNE1 0x01c8 ++#define CMN_DIAG_PLL0_PTATIS_TUNE2 0x01c9 ++#define CMN_DIAG_PLL0_INCLK_CTRL 0x01ca ++#define CMN_DIAG_PLL0_PXL_DIVH 0x01cb ++#define CMN_DIAG_PLL0_PXL_DIVL 0x01cc ++#define CMN_DIAG_HSCLK_SEL 0x01e0 ++#define CMN_DIAG_PER_CAL_ADJ 0x01ec ++#define CMN_DIAG_CAL_CTRL 0x01ed ++#define CMN_DIAG_ACYA 0x01ff ++#define XCVR_PSM_RCTRL 0x4001 ++#define XCVR_PSM_CAL_TMR 0x4002 ++#define XCVR_PSM_A0IN_TMR 0x4003 ++#define TX_TXCC_CAL_SCLR_MULT_0 0x4047 ++#define TX_TXCC_CPOST_MULT_00_0 0x404c ++#define XCVR_DIAG_PLLDRC_CTRL 0x40e0 ++#define XCVR_DIAG_HSCLK_SEL 0x40e1 ++#define XCVR_DIAG_BIDI_CTRL 0x40e8 ++#define XCVR_DIAG_LANE_FCM_EN_MGN_TMR 0x40f2 ++#define TX_PSC_A0 0x4100 ++#define TX_PSC_A1 0x4101 ++#define TX_PSC_A2 0x4102 ++#define TX_PSC_A3 0x4103 ++#define TX_RCVDET_EN_TMR 0x4122 ++#define TX_RCVDET_ST_TMR 0x4123 ++#define TX_DIAG_TX_CTRL 0x41e0 ++#define TX_DIAG_TX_DRV 0x41e1 ++#define TX_DIAG_BGREF_PREDRV_DELAY 0x41e7 ++#define TX_DIAG_ACYA_0 0x41ff ++#define TX_DIAG_ACYA_1 0x43ff ++#define TX_DIAG_ACYA_2 0x45ff ++#define TX_DIAG_ACYA_3 0x47ff ++#define TX_ANA_CTRL_REG_1 0x5020 ++#define TX_ANA_CTRL_REG_2 0x5021 ++#define TX_DIG_CTRL_REG_1 0x5023 ++#define TX_DIG_CTRL_REG_2 0x5024 ++#define TXDA_CYA_AUXDA_CYA 0x5025 ++#define TX_ANA_CTRL_REG_3 0x5026 ++#define TX_ANA_CTRL_REG_4 0x5027 ++#define TX_ANA_CTRL_REG_5 0x5029 ++#define RX_PSC_A0 0x8000 ++#define RX_PSC_CAL 0x8006 ++#define PHY_HDP_MODE_CTRL 0xc008 ++#define PHY_HDP_CLK_CTL 0xc009 ++#define PHY_ISO_CMN_CTRL 0xc010 ++#define PHY_PMA_CMN_CTRL1 0xc800 ++#define PHY_PMA_ISO_CMN_CTRL 0xc810 ++#define PHY_PMA_ISO_PLL_CTRL1 0xc812 ++#define PHY_PMA_ISOLATION_CTRL 0xc81f ++ ++/* PHY_HDP_CLK_CTL */ ++#define PLL_DATA_RATE_CLK_DIV_MASK GENMASK(15, 8) ++#define PLL_DATA_RATE_CLK_DIV_HBR 0x24 ++#define PLL_DATA_RATE_CLK_DIV_HBR2 0x12 ++#define PLL_CLK_EN_ACK BIT(3) ++#define PLL_CLK_EN BIT(2) ++#define PLL_READY BIT(1) ++#define PLL_EN BIT(0) ++ ++/* PHY_PMA_CMN_CTRL1 */ ++#define CMA_REF_CLK_DIG_DIV_MASK GENMASK(13, 12) ++#define CMA_REF_CLK_SEL_MASK GENMASK(6, 4) ++#define CMA_REF_CLK_RCV_EN_MASK BIT(3) ++#define CMA_REF_CLK_RCV_EN 1 ++#define CMN_READY BIT(0) ++ ++/* PHY_PMA_ISO_PLL_CTRL1 */ ++#define CMN_PLL0_CLK_DATART_DIV_MASK GENMASK(7, 0) ++ ++/* TX_DIAG_TX_DRV */ ++#define TX_DRIVER_PROG_BOOST_ENABLE BIT(10) ++#define TX_DRIVER_PROG_BOOST_LEVEL_MASK GENMASK(9, 8) ++#define TX_DRIVER_LDO_BG_DEPENDENT_REF_ENABLE BIT(7) ++#define TX_DRIVER_LDO_BANDGAP_REF_ENABLE BIT(6) ++ ++/* TX_TXCC_CAL_SCLR_MULT_0 */ ++#define SCALED_RESISTOR_CALIBRATION_CODE_ADD BIT(8) ++#define RESISTOR_CAL_MULT_VAL_32_128 BIT(5) ++ ++/* CMN_CDIAG_REFCLK_CTRL */ ++#define DIG_REF_CLK_DIV_SCALER_MASK GENMASK(14, 12) ++#define REFCLK_TERMINATION_EN_OVERRIDE_EN BIT(7) ++#define REFCLK_TERMINATION_EN_OVERRIDE BIT(6) ++ ++/* CMN_DIAG_HSCLK_SEL */ ++#define HSCLK1_SEL_MASK GENMASK(5, 4) ++#define HSCLK0_SEL_MASK GENMASK(1, 0) ++#define HSCLK_PLL0_DIV2 1 ++ ++/* XCVR_DIAG_HSCLK_SEL */ ++#define HSCLK_SEL_MODE3_MASK GENMASK(13, 12) ++#define HSCLK_SEL_MODE3_HSCLK1 1 ++ ++/* CMN_PLL0_VCOCAL_START */ ++#define VCO_CALIB_CODE_START_POINT_VAL_MASK GENMASK(8, 0) ++ ++/* CMN_DIAG_PLL0_FBH_OVRD */ ++#define PLL_FEEDBACK_DIV_HI_OVERRIDE_EN BIT(15) ++ ++/* CMN_DIAG_PLL0_FBL_OVRD */ ++#define PLL_FEEDBACK_DIV_LO_OVERRIDE_EN BIT(15) ++ ++/* CMN_DIAG_PLL0_PXL_DIVH */ ++#define PLL_PCLK_DIV_EN BIT(15) ++ ++/* XCVR_DIAG_PLLDRC_CTRL */ ++#define DPLL_CLK_SEL_MODE3 BIT(14) ++#define DPLL_DATA_RATE_DIV_MODE3_MASK GENMASK(13, 12) ++ ++/* TX_DIAG_TX_CTRL */ ++#define TX_IF_SUBRATE_MODE3_MASK GENMASK(7, 6) ++ ++/* PHY_HDP_MODE_CTRL */ ++#define POWER_STATE_A3_ACK BIT(7) ++#define POWER_STATE_A2_ACK BIT(6) ++#define POWER_STATE_A1_ACK BIT(5) ++#define POWER_STATE_A0_ACK BIT(4) ++#define POWER_STATE_A3 BIT(3) ++#define POWER_STATE_A2 BIT(2) ++#define POWER_STATE_A1 BIT(1) ++#define POWER_STATE_A0 BIT(0) ++ ++/* PHY_PMA_ISO_CMN_CTRL */ ++#define CMN_MACRO_PWR_EN_ACK BIT(5) ++ ++#define KEEP_ALIVE 0x18 ++ ++/* FW check alive timeout */ ++#define CDNS_KEEP_ALIVE_TIMEOUT 2000 ++#define CDNS_KEEP_ALIVE_MASK GENMASK(7, 0) ++ ++#define REF_CLK_27MHZ 27000000 ++ ++#define LINK_RATE_2_7 270000 ++#define MAX_LINK_RATE 540000 ++ ++#define CMN_REF_CLK_DIG_DIV 1 ++#define REF_CLK_DIVIDER_SCALER 1 ++ ++/* HDMI TX clock control settings */ ++struct hdptx_hdmi_ctrl { ++ u32 pixel_clk_freq; ++ u32 feedback_factor; ++ u32 cmnda_pll0_ip_div; ++ u32 pll_fb_div_total; ++ u32 cmnda_pll0_fb_div_low; ++ u32 cmnda_pll0_fb_div_high; ++ u32 cmnda_pll0_pxdiv_low; ++ u32 cmnda_pll0_pxdiv_high; ++ u32 vco_ring_select; ++ u32 cmnda_hs_clk_0_sel; ++ u32 cmnda_hs_clk_1_sel; ++ u32 hsclk_div_tx_sub_rate; ++ u32 cmnda_pll0_hs_sym_div_sel; ++}; ++ ++struct cdns_hdptx_phy { ++ struct cdns_mhdp_base base; ++ ++ void __iomem *regs; /* DPTX registers base */ ++ struct device *dev; ++ struct phy *phy; ++ struct clk *ref_clk, *apb_clk; ++ u32 ref_clk_rate; ++ union { ++ struct phy_configure_opts_hdmi hdmi; ++ struct phy_configure_opts_dp dp; ++ }; ++}; ++ ++/* HDMI TX clock control settings, pixel clock is output */ ++static const struct hdptx_hdmi_ctrl pixel_clk_output_ctrl_table[] = { ++ /* clk fbak ipd totl div_l div_h pd_l pd_h v h1 h2 sub sym*/ ++ { 27000, 1000, 3, 240, 0x0bc, 0x30, 0x26, 0x26, 0, 2, 2, 4, 3 }, ++ { 27000, 1250, 3, 300, 0x0ec, 0x3c, 0x30, 0x30, 0, 2, 2, 4, 3 }, ++ { 27000, 1500, 3, 360, 0x11c, 0x48, 0x3a, 0x3a, 0, 2, 2, 4, 3 }, ++ { 27000, 2000, 3, 240, 0x0bc, 0x30, 0x26, 0x26, 0, 2, 2, 4, 2 }, ++ { 54000, 1000, 3, 480, 0x17c, 0x60, 0x26, 0x26, 1, 2, 2, 4, 3 }, ++ { 54000, 1250, 4, 400, 0x13c, 0x50, 0x17, 0x17, 0, 1, 1, 4, 2 }, ++ { 54000, 1500, 4, 480, 0x17c, 0x60, 0x1c, 0x1c, 0, 2, 2, 2, 2 }, ++ { 54000, 2000, 3, 240, 0x0bc, 0x30, 0x12, 0x12, 0, 2, 2, 1, 1 }, ++ { 74250, 1000, 3, 660, 0x20c, 0x84, 0x26, 0x26, 1, 2, 2, 4, 3 }, ++ { 74250, 1250, 4, 550, 0x1b4, 0x6e, 0x17, 0x17, 1, 1, 1, 4, 2 }, ++ { 74250, 1500, 4, 660, 0x20c, 0x84, 0x1c, 0x1c, 1, 2, 2, 2, 2 }, ++ { 74250, 2000, 3, 330, 0x104, 0x42, 0x12, 0x12, 0, 2, 2, 1, 1 }, ++ { 99000, 1000, 3, 440, 0x15c, 0x58, 0x12, 0x12, 1, 2, 2, 2, 2 }, ++ { 99000, 1250, 3, 275, 0x0d8, 0x37, 0x0b, 0x0a, 0, 1, 1, 2, 1 }, ++ { 99000, 1500, 3, 330, 0x104, 0x42, 0x0d, 0x0d, 0, 2, 2, 1, 1 }, ++ { 99000, 2000, 3, 440, 0x15c, 0x58, 0x12, 0x12, 1, 2, 2, 1, 1 }, ++ { 148500, 1000, 3, 660, 0x20c, 0x84, 0x12, 0x12, 1, 2, 2, 2, 2 }, ++ { 148500, 1250, 4, 550, 0x1b4, 0x6e, 0x0b, 0x0a, 1, 1, 1, 2, 1 }, ++ { 148500, 1500, 3, 495, 0x188, 0x63, 0x0d, 0x0d, 1, 1, 1, 2, 1 }, ++ { 148500, 2000, 3, 660, 0x20c, 0x84, 0x12, 0x12, 1, 2, 2, 1, 1 }, ++ { 198000, 1000, 3, 220, 0x0ac, 0x2c, 0x03, 0x03, 0, 1, 1, 1, 0 }, ++ { 198000, 1250, 3, 550, 0x1b4, 0x6e, 0x0b, 0x0a, 1, 1, 1, 2, 1 }, ++ { 198000, 1500, 3, 330, 0x104, 0x42, 0x06, 0x05, 0, 1, 1, 1, 0 }, ++ { 198000, 2000, 3, 440, 0x15c, 0x58, 0x08, 0x08, 1, 1, 1, 1, 0 }, ++ { 297000, 1000, 3, 330, 0x104, 0x42, 0x03, 0x03, 0, 1, 1, 1, 0 }, ++ { 297000, 1500, 3, 495, 0x188, 0x63, 0x06, 0x05, 1, 1, 1, 1, 0 }, ++ { 297000, 2000, 3, 660, 0x20c, 0x84, 0x08, 0x08, 1, 1, 1, 1, 0 }, ++ { 594000, 1000, 3, 660, 0x20c, 0x84, 0x03, 0x03, 1, 1, 1, 1, 0 }, ++ { 594000, 750, 3, 495, 0x188, 0x63, 0x03, 0x03, 1, 1, 1, 1, 0 }, ++ { 594000, 625, 4, 550, 0x1b4, 0x6e, 0x03, 0x03, 1, 1, 1, 1, 0 }, ++ { 594000, 500, 3, 660, 0x20c, 0x84, 0x03, 0x03, 1, 1, 1, 2, 1 }, ++}; ++ ++/* HDMI TX PLL tuning settings */ ++struct hdptx_hdmi_pll_tuning { ++ u32 vco_freq; ++ u32 volt_to_current_coarse; ++ u32 volt_to_current; ++ u32 ndac_ctrl; ++ u32 pmos_ctrl; ++ u32 ptat_ndac_ctrl; ++ u32 feedback_div_total; ++ u32 charge_pump_gain; ++ u32 vco_cal_code; ++}; ++ ++/* HDMI TX PLL tuning settings, pixel clock is output */ ++static const struct hdptx_hdmi_pll_tuning pixel_clk_output_pll_table[] = { ++ /*VCO_f coar cu nd pm ptat fd_d gain cal */ ++ { 1980000, 4, 3, 0, 9, 0x9, 220, 0x42, 183 }, ++ { 2160000, 4, 3, 0, 9, 0x9, 240, 0x42, 208 }, ++ { 2475000, 5, 3, 1, 0, 0x7, 275, 0x42, 209 }, ++ { 2700000, 5, 3, 1, 0, 0x7, 300, 0x42, 230 }, ++ { 2700000, 5, 3, 1, 0, 0x7, 400, 0x4c, 230 }, ++ { 2970000, 6, 3, 1, 0, 0x7, 330, 0x42, 225 }, ++ { 3240000, 6, 3, 1, 0, 0x7, 360, 0x42, 256 }, ++ { 3240000, 6, 3, 1, 0, 0x7, 480, 0x4c, 256 }, ++ { 3712500, 4, 3, 0, 7, 0xF, 550, 0x4c, 257 }, ++ { 3960000, 5, 3, 0, 7, 0xF, 440, 0x42, 226 }, ++ { 4320000, 5, 3, 1, 7, 0xF, 480, 0x42, 258 }, ++ { 4455000, 5, 3, 0, 7, 0xF, 495, 0x42, 272 }, ++ { 4455000, 5, 3, 0, 7, 0xF, 660, 0x4c, 272 }, ++ { 4950000, 6, 3, 1, 0, 0x7, 550, 0x42, 258 }, ++ { 5940000, 7, 3, 1, 0, 0x7, 660, 0x42, 292 }, ++}; ++ ++struct phy_pll_reg { ++ u16 val[7]; ++ u32 addr; ++}; ++ ++static const struct phy_pll_reg phy_pll_27m_cfg[] = { ++ /* 1.62 2.16 2.43 2.7 3.24 4.32 5.4 register address */ ++ {{ 0x010e, 0x010e, 0x010e, 0x010e, 0x010e, 0x010e, 0x010e }, CMN_PLL0_VCOCAL_INIT_TMR }, ++ {{ 0x001b, 0x001b, 0x001b, 0x001b, 0x001b, 0x001b, 0x001b }, CMN_PLL0_VCOCAL_ITER_TMR }, ++ {{ 0x30b9, 0x3087, 0x3096, 0x30b4, 0x30b9, 0x3087, 0x30b4 }, CMN_PLL0_VCOCAL_START }, ++ {{ 0x0077, 0x009f, 0x00b3, 0x00c7, 0x0077, 0x009f, 0x00c7 }, CMN_PLL0_INTDIV }, ++ {{ 0xf9da, 0xf7cd, 0xf6c7, 0xf5c1, 0xf9da, 0xf7cd, 0xf5c1 }, CMN_PLL0_FRACDIV }, ++ {{ 0x001e, 0x0028, 0x002d, 0x0032, 0x001e, 0x0028, 0x0032 }, CMN_PLL0_HIGH_THR }, ++ {{ 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020 }, CMN_PLL0_DSM_DIAG }, ++ {{ 0x0000, 0x1000, 0x1000, 0x1000, 0x0000, 0x1000, 0x1000 }, CMN_PLLSM0_USER_DEF_CTRL }, ++ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_OVRD }, ++ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBH_OVRD }, ++ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBL_OVRD }, ++ {{ 0x0006, 0x0007, 0x0007, 0x0007, 0x0006, 0x0007, 0x0007 }, CMN_DIAG_PLL0_V2I_TUNE }, ++ {{ 0x0043, 0x0043, 0x0043, 0x0042, 0x0043, 0x0043, 0x0042 }, CMN_DIAG_PLL0_CP_TUNE }, ++ {{ 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008 }, CMN_DIAG_PLL0_LF_PROG }, ++ {{ 0x0100, 0x0001, 0x0001, 0x0001, 0x0100, 0x0001, 0x0001 }, CMN_DIAG_PLL0_PTATIS_TUNE1 }, ++ {{ 0x0007, 0x0001, 0x0001, 0x0001, 0x0007, 0x0001, 0x0001 }, CMN_DIAG_PLL0_PTATIS_TUNE2 }, ++ {{ 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020 }, CMN_DIAG_PLL0_TEST_MODE}, ++ {{ 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016 }, CMN_PSM_CLK_CTRL } ++}; ++ ++static int dp_link_rate_index(u32 rate) ++{ ++ switch (rate) { ++ case 162000: ++ return 0; ++ case 216000: ++ return 1; ++ case 243000: ++ return 2; ++ case 270000: ++ return 3; ++ case 324000: ++ return 4; ++ case 432000: ++ return 5; ++ case 540000: ++ return 6; ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int cdns_phy_reg_write(struct cdns_hdptx_phy *cdns_phy, u32 addr, u32 val) ++{ ++ return cdns_mhdp_reg_write(&cdns_phy->base, ADDR_PHY_AFE + (addr << 2), val); ++} ++ ++static u32 cdns_phy_reg_read(struct cdns_hdptx_phy *cdns_phy, u32 addr) ++{ ++ u32 reg32; ++ ++ cdns_mhdp_reg_read(&cdns_phy->base, ADDR_PHY_AFE + (addr << 2), ®32); ++ ++ return reg32; ++} ++ ++static void hdptx_dp_aux_cfg(struct cdns_hdptx_phy *cdns_phy) ++{ ++ /* Power up Aux */ ++ cdns_phy_reg_write(cdns_phy, TXDA_CYA_AUXDA_CYA, 1); ++ ++ cdns_phy_reg_write(cdns_phy, TX_DIG_CTRL_REG_1, 0x3); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_DIG_CTRL_REG_2, 36); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x0100); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x0300); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_3, 0x0000); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2008); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2018); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0xa018); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030c); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_5, 0x0000); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_4, 0x1001); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0xa098); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0xa198); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030d); ++ ndelay(150); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030f); ++} ++ ++/* PMA common configuration for 27MHz */ ++static void hdptx_dp_phy_pma_cmn_cfg_27mhz(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 num_lanes = cdns_phy->dp.lanes; ++ u16 val; ++ int k; ++ ++ /* Enable PMA input ref clk(CMN_REF_CLK_RCV_EN) */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_CMN_CTRL1); ++ val &= ~CMA_REF_CLK_RCV_EN_MASK; ++ val |= FIELD_PREP(CMA_REF_CLK_RCV_EN_MASK, CMA_REF_CLK_RCV_EN); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_CMN_CTRL1, val); ++ ++ /* Startup state machine registers */ ++ cdns_phy_reg_write(cdns_phy, CMN_SSM_BIAS_TMR, 0x0087); ++ cdns_phy_reg_write(cdns_phy, CMN_PLLSM0_PLLEN_TMR, 0x001b); ++ cdns_phy_reg_write(cdns_phy, CMN_PLLSM0_PLLPRE_TMR, 0x0036); ++ cdns_phy_reg_write(cdns_phy, CMN_PLLSM0_PLLVREF_TMR, 0x001b); ++ cdns_phy_reg_write(cdns_phy, CMN_PLLSM0_PLLLOCK_TMR, 0x006c); ++ ++ /* Current calibration registers */ ++ cdns_phy_reg_write(cdns_phy, CMN_ICAL_INIT_TMR, 0x0044); ++ cdns_phy_reg_write(cdns_phy, CMN_ICAL_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_ICAL_ADJ_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_ICAL_ADJ_ITER_TMR, 0x0006); ++ ++ /* Resistor calibration registers */ ++ cdns_phy_reg_write(cdns_phy, CMN_TXPUCAL_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPUCAL_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPU_ADJ_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPU_ADJ_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPDCAL_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPDCAL_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPD_ADJ_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_TXPD_ADJ_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_RXCAL_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_RXCAL_ITER_TMR, 0x0006); ++ cdns_phy_reg_write(cdns_phy, CMN_RX_ADJ_INIT_TMR, 0x0022); ++ cdns_phy_reg_write(cdns_phy, CMN_RX_ADJ_ITER_TMR, 0x0006); ++ ++ for (k = 0; k < num_lanes; k = k + 1) { ++ /* Power state machine registers */ ++ cdns_phy_reg_write(cdns_phy, XCVR_PSM_CAL_TMR | (k << 9), 0x016d); ++ cdns_phy_reg_write(cdns_phy, XCVR_PSM_A0IN_TMR | (k << 9), 0x016d); ++ /* Transceiver control and diagnostic registers */ ++ cdns_phy_reg_write(cdns_phy, XCVR_DIAG_LANE_FCM_EN_MGN_TMR | (k << 9), 0x00a2); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_BGREF_PREDRV_DELAY | (k << 9), 0x0097); ++ /* Transmitter receiver detect registers */ ++ cdns_phy_reg_write(cdns_phy, TX_RCVDET_EN_TMR | (k << 9), 0x0a8c); ++ cdns_phy_reg_write(cdns_phy, TX_RCVDET_ST_TMR | (k << 9), 0x0036); ++ } ++ ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_0, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_1, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_2, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_3, 1); ++} ++ ++static void hdptx_dp_phy_pma_cmn_pll0_27mhz(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 num_lanes = cdns_phy->dp.lanes; ++ u32 link_rate = cdns_phy->dp.link_rate; ++ u16 val; ++ int index, i, k; ++ ++ /* DP PLL data rate 0/1 clock divider value */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val &= ~PLL_DATA_RATE_CLK_DIV_MASK; ++ if (link_rate <= LINK_RATE_2_7) ++ val |= FIELD_PREP(PLL_DATA_RATE_CLK_DIV_MASK, ++ PLL_DATA_RATE_CLK_DIV_HBR); ++ else ++ val |= FIELD_PREP(PLL_DATA_RATE_CLK_DIV_MASK, ++ PLL_DATA_RATE_CLK_DIV_HBR2); ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ++ /* High speed clock 0/1 div */ ++ val = cdns_phy_reg_read(cdns_phy, CMN_DIAG_HSCLK_SEL); ++ val &= ~(HSCLK1_SEL_MASK | HSCLK0_SEL_MASK); ++ if (link_rate <= LINK_RATE_2_7) { ++ val |= FIELD_PREP(HSCLK1_SEL_MASK, HSCLK_PLL0_DIV2); ++ val |= FIELD_PREP(HSCLK0_SEL_MASK, HSCLK_PLL0_DIV2); ++ } ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_HSCLK_SEL, val); ++ ++ for (k = 0; k < num_lanes; k++) { ++ val = cdns_phy_reg_read(cdns_phy, (XCVR_DIAG_HSCLK_SEL | (k << 9))); ++ val &= ~HSCLK_SEL_MODE3_MASK; ++ if (link_rate <= LINK_RATE_2_7) ++ val |= FIELD_PREP(HSCLK_SEL_MODE3_MASK, HSCLK_SEL_MODE3_HSCLK1); ++ cdns_phy_reg_write(cdns_phy, (XCVR_DIAG_HSCLK_SEL | (k << 9)), val); ++ } ++ ++ /* DP PHY PLL 27MHz configuration */ ++ index = dp_link_rate_index(link_rate); ++ if (index < 0) { ++ dev_err(cdns_phy->dev, "Not support link rate %d\n", link_rate); ++ return; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(phy_pll_27m_cfg); i++) ++ cdns_phy_reg_write(cdns_phy, phy_pll_27m_cfg[i].addr, ++ phy_pll_27m_cfg[i].val[index]); ++ ++ /* Transceiver control and diagnostic registers */ ++ for (k = 0; k < num_lanes; k++) { ++ val = cdns_phy_reg_read(cdns_phy, (XCVR_DIAG_PLLDRC_CTRL | (k << 9))); ++ val &= ~(DPLL_DATA_RATE_DIV_MODE3_MASK | DPLL_CLK_SEL_MODE3); ++ if (link_rate <= LINK_RATE_2_7) ++ val |= FIELD_PREP(DPLL_DATA_RATE_DIV_MODE3_MASK, 2); ++ else ++ val |= FIELD_PREP(DPLL_DATA_RATE_DIV_MODE3_MASK, 1); ++ cdns_phy_reg_write(cdns_phy, (XCVR_DIAG_PLLDRC_CTRL | (k << 9)), val); ++ } ++ ++ for (k = 0; k < num_lanes; k = k + 1) { ++ /* Power state machine registers */ ++ cdns_phy_reg_write(cdns_phy, (XCVR_PSM_RCTRL | (k << 9)), 0xbefc); ++ cdns_phy_reg_write(cdns_phy, (TX_PSC_A0 | (k << 9)), 0x6799); ++ cdns_phy_reg_write(cdns_phy, (TX_PSC_A1 | (k << 9)), 0x6798); ++ cdns_phy_reg_write(cdns_phy, (TX_PSC_A2 | (k << 9)), 0x0098); ++ cdns_phy_reg_write(cdns_phy, (TX_PSC_A3 | (k << 9)), 0x0098); ++ /* Receiver calibration power state definition register */ ++ val = cdns_phy_reg_read(cdns_phy, RX_PSC_CAL | (k << 9)); ++ val &= 0xffbb; ++ cdns_phy_reg_write(cdns_phy, (RX_PSC_CAL | (k << 9)), val); ++ val = cdns_phy_reg_read(cdns_phy, RX_PSC_A0 | (k << 9)); ++ val &= 0xffbb; ++ cdns_phy_reg_write(cdns_phy, (RX_PSC_A0 | (k << 9)), val); ++ } ++} ++ ++static void hdptx_dp_phy_ref_clock_type(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 val; ++ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_CMN_CTRL1); ++ val &= ~CMA_REF_CLK_SEL_MASK; ++ /* ++ * single ended reference clock (val |= 0x0030); ++ * differential clock (val |= 0x0000); ++ * ++ * for differential clock on the refclk_p and ++ * refclk_m off chip pins: CMN_DIAG_ACYA[8]=1'b1 ++ * cdns_phy_reg_write(cdns_phy, CMN_DIAG_ACYA, 0x0100); ++ */ ++ val |= FIELD_PREP(CMA_REF_CLK_SEL_MASK, 3); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_CMN_CTRL1, val); ++} ++ ++static int wait_for_ack(struct cdns_hdptx_phy *cdns_phy, ++ u32 reg, u32 mask, ++ const char *err_msg) ++{ ++ int ret; ++ u32 val; ++ ++ ret = read_poll_timeout(cdns_phy_reg_read, ++ val, val & mask, 20, 1000, ++ false, cdns_phy, reg); ++ if (ret < 0) ++ dev_err(cdns_phy->dev, "%s\n", err_msg); ++ ++ return ret; ++} ++ ++static int wait_for_ack_clear(struct cdns_hdptx_phy *cdns_phy, ++ u32 reg, u32 mask, ++ const char *err_msg) ++{ ++ int ret; ++ u32 val; ++ ++ ret = read_poll_timeout(cdns_phy_reg_read, ++ val, !(val & mask), 20, 1000, ++ false, cdns_phy, reg); ++ if (ret < 0) ++ dev_err(cdns_phy->dev, "%s\n", err_msg); ++ ++ return ret; ++} ++ ++static int hdptx_dp_phy_power_up(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 val; ++ int ret; ++ ++ /* Enable HDP PLL's for high speed clocks */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val |= PLL_EN; ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ret = wait_for_ack(cdns_phy, PHY_HDP_CLK_CTL, PLL_READY, ++ "Wait PLL Ack failed"); ++ if (ret < 0) ++ return ret; ++ ++ /* Enable HDP PLL's data rate and full rate clocks out of PMA. */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val |= PLL_CLK_EN; ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ret = wait_for_ack(cdns_phy, PHY_HDP_CLK_CTL, PLL_CLK_EN_ACK, ++ "Wait PLL clock enable ACK failed"); ++ if (ret < 0) ++ return ret; ++ ++ /* Configure PHY in A2 Mode */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A2); ++ ret = wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A2_ACK, ++ "Wait A2 Ack failed"); ++ if (ret < 0) ++ return ret; ++ ++ /* Configure PHY in A0 mode (PHY must be in the A0 power ++ * state in order to transmit data) ++ */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A0); ++ ++ return wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A0_ACK, ++ "Wait A0 Ack failed"); ++} ++ ++static int hdptx_dp_phy_power_down(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u16 val; ++ int ret; ++ ++ /* Place the PHY lanes in the A3 power state. */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A3); ++ ret = wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A3_ACK, ++ "Wait A3 Ack failed"); ++ if (ret) ++ return ret; ++ ++ /* Disable HDP PLL's data rate and full rate clocks out of PMA. */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val &= ~PLL_CLK_EN; ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ret = wait_for_ack_clear(cdns_phy, PHY_HDP_CLK_CTL, PLL_CLK_EN_ACK, ++ "Wait PLL clock Ack clear failed"); ++ if (ret) ++ return ret; ++ ++ /* Disable HDP PLL's for high speed clocks */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val &= ~PLL_EN; ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ++ return wait_for_ack_clear(cdns_phy, PHY_HDP_CLK_CTL, PLL_READY, ++ "Wait PLL Ack clear failed"); ++} ++ ++static int hdptx_dp_configure(struct phy *phy, ++ union phy_configure_opts *opts) ++{ ++ const struct phy_configure_opts_dp *dp_opts = &opts->dp; ++ struct cdns_hdptx_phy *cdns_phy = phy_get_drvdata(phy); ++ ++ if (opts->dp.link_rate > MAX_LINK_RATE) { ++ dev_err(cdns_phy->dev, "Link Rate(%d) Not supported\n", opts->dp.link_rate); ++ return false; ++ } ++ ++ memcpy(&cdns_phy->dp, dp_opts, sizeof(*dp_opts)); ++ ++ hdptx_dp_phy_pma_cmn_cfg_27mhz(cdns_phy); ++ hdptx_dp_phy_pma_cmn_pll0_27mhz(cdns_phy); ++ ++ return 0; ++} ++ ++static int hdptx_clk_enable(struct cdns_hdptx_phy *cdns_phy) ++{ ++ struct device *dev = cdns_phy->dev; ++ u32 ref_clk_rate; ++ ++ cdns_phy->ref_clk = devm_clk_get_enabled(dev, "ref"); ++ if (IS_ERR(cdns_phy->ref_clk)) { ++ dev_err(dev, "phy ref clock not found\n"); ++ return PTR_ERR(cdns_phy->ref_clk); ++ } ++ ++ ref_clk_rate = clk_get_rate(cdns_phy->ref_clk); ++ if (!ref_clk_rate) { ++ dev_err(cdns_phy->dev, "Failed to get ref clock rate\n"); ++ return -EINVAL; ++ } ++ ++ if (ref_clk_rate == REF_CLK_27MHZ) { ++ cdns_phy->ref_clk_rate = ref_clk_rate; ++ } else { ++ dev_err(cdns_phy->dev, "Not support Ref Clock Rate(%dHz)\n", ref_clk_rate); ++ return -EINVAL; ++ } ++ ++ cdns_phy->apb_clk = devm_clk_get_enabled(dev, "apb"); ++ if (IS_ERR(cdns_phy->apb_clk)) { ++ dev_err(dev, "phy apb clock not found\n"); ++ return PTR_ERR(cdns_phy->apb_clk); ++ } ++ ++ return 0; ++} ++ ++static void hdptx_hdmi_arc_config(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u16 txpu_calib_code; ++ u16 txpd_calib_code; ++ u16 txpu_adj_calib_code; ++ u16 txpd_adj_calib_code; ++ u16 prev_calib_code; ++ u16 new_calib_code; ++ u16 rdata; ++ ++ /* Power ARC */ ++ cdns_phy_reg_write(cdns_phy, TXDA_CYA_AUXDA_CYA, 0x0001); ++ ++ prev_calib_code = cdns_phy_reg_read(cdns_phy, TX_DIG_CTRL_REG_2); ++ txpu_calib_code = cdns_phy_reg_read(cdns_phy, CMN_TXPUCAL_CTRL); ++ txpd_calib_code = cdns_phy_reg_read(cdns_phy, CMN_TXPDCAL_CTRL); ++ txpu_adj_calib_code = cdns_phy_reg_read(cdns_phy, CMN_TXPU_ADJ_CTRL); ++ txpd_adj_calib_code = cdns_phy_reg_read(cdns_phy, CMN_TXPD_ADJ_CTRL); ++ ++ new_calib_code = ((txpu_calib_code + txpd_calib_code) / 2) ++ + txpu_adj_calib_code + txpd_adj_calib_code; ++ ++ if (new_calib_code != prev_calib_code) { ++ rdata = cdns_phy_reg_read(cdns_phy, TX_ANA_CTRL_REG_1); ++ rdata &= 0xdfff; ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, rdata); ++ cdns_phy_reg_write(cdns_phy, TX_DIG_CTRL_REG_2, new_calib_code); ++ mdelay(10); ++ rdata |= 0x2000; ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, rdata); ++ usleep_range(150, 250); ++ } ++ ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x0100); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x0300); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_3, 0x0000); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2008); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2018); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2098); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030c); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_5, 0x0010); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_4, 0x4001); ++ mdelay(5); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_1, 0x2198); ++ mdelay(5); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030d); ++ usleep_range(100, 200); ++ cdns_phy_reg_write(cdns_phy, TX_ANA_CTRL_REG_2, 0x030f); ++} ++ ++static void hdptx_hdmi_phy_set_vswing(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 k; ++ const u32 num_lanes = 4; ++ ++ for (k = 0; k < num_lanes; k++) { ++ cdns_phy_reg_write(cdns_phy, (TX_DIAG_TX_DRV | (k << 9)), ++ TX_DRIVER_PROG_BOOST_ENABLE | ++ FIELD_PREP(TX_DRIVER_PROG_BOOST_LEVEL_MASK, 3) | ++ TX_DRIVER_LDO_BG_DEPENDENT_REF_ENABLE | ++ TX_DRIVER_LDO_BANDGAP_REF_ENABLE); ++ cdns_phy_reg_write(cdns_phy, (TX_TXCC_CPOST_MULT_00_0 | (k << 9)), 0x0); ++ cdns_phy_reg_write(cdns_phy, (TX_TXCC_CAL_SCLR_MULT_0 | (k << 9)), ++ SCALED_RESISTOR_CALIBRATION_CODE_ADD | ++ RESISTOR_CAL_MULT_VAL_32_128); ++ } ++} ++ ++static int hdptx_hdmi_phy_config(struct cdns_hdptx_phy *cdns_phy, ++ const struct hdptx_hdmi_ctrl *p_ctrl_table, ++ const struct hdptx_hdmi_pll_tuning *p_pll_table, ++ bool pclk_in) ++{ ++ const u32 num_lanes = 4; ++ u32 val, k; ++ int ret; ++ ++ /* enable PHY isolation mode only for CMN */ ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_ISOLATION_CTRL, 0xd000); ++ ++ /* set cmn_pll0_clk_datart1_div/cmn_pll0_clk_datart0_div dividers */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_ISO_PLL_CTRL1); ++ val &= ~CMN_PLL0_CLK_DATART_DIV_MASK; ++ val |= FIELD_PREP(CMN_PLL0_CLK_DATART_DIV_MASK, 0x12); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_ISO_PLL_CTRL1, val); ++ ++ /* assert PHY reset from isolation register */ ++ cdns_phy_reg_write(cdns_phy, PHY_ISO_CMN_CTRL, 0x0000); ++ /* assert PMA CMN reset */ ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_ISO_CMN_CTRL, 0x0000); ++ ++ /* register XCVR_DIAG_BIDI_CTRL */ ++ for (k = 0; k < num_lanes; k++) ++ cdns_phy_reg_write(cdns_phy, XCVR_DIAG_BIDI_CTRL | (k << 9), 0x00ff); ++ ++ /* Describing Task phy_cfg_hdp */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_CMN_CTRL1); ++ val &= ~CMA_REF_CLK_RCV_EN_MASK; ++ val |= FIELD_PREP(CMA_REF_CLK_RCV_EN_MASK, CMA_REF_CLK_RCV_EN); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_CMN_CTRL1, val); ++ ++ /* PHY Registers */ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_CMN_CTRL1); ++ val &= ~CMA_REF_CLK_DIG_DIV_MASK; ++ val |= FIELD_PREP(CMA_REF_CLK_DIG_DIV_MASK, CMN_REF_CLK_DIG_DIV); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_CMN_CTRL1, val); ++ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_CLK_CTL); ++ val &= ~PLL_DATA_RATE_CLK_DIV_MASK; ++ val |= FIELD_PREP(PLL_DATA_RATE_CLK_DIV_MASK, ++ PLL_DATA_RATE_CLK_DIV_HBR2); ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_CLK_CTL, val); ++ ++ /* Common control module control and diagnostic registers */ ++ val = cdns_phy_reg_read(cdns_phy, CMN_CDIAG_REFCLK_CTRL); ++ val &= ~DIG_REF_CLK_DIV_SCALER_MASK; ++ val |= FIELD_PREP(DIG_REF_CLK_DIV_SCALER_MASK, REF_CLK_DIVIDER_SCALER); ++ val |= REFCLK_TERMINATION_EN_OVERRIDE_EN | REFCLK_TERMINATION_EN_OVERRIDE; ++ cdns_phy_reg_write(cdns_phy, CMN_CDIAG_REFCLK_CTRL, val); ++ ++ /* High speed clock used */ ++ val = cdns_phy_reg_read(cdns_phy, CMN_DIAG_HSCLK_SEL); ++ val &= ~(HSCLK1_SEL_MASK | HSCLK0_SEL_MASK); ++ val |= FIELD_PREP(HSCLK1_SEL_MASK, (p_ctrl_table->cmnda_hs_clk_1_sel >> 1)); ++ val |= FIELD_PREP(HSCLK0_SEL_MASK, (p_ctrl_table->cmnda_hs_clk_0_sel >> 1)); ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_HSCLK_SEL, val); ++ ++ for (k = 0; k < num_lanes; k++) { ++ val = cdns_phy_reg_read(cdns_phy, (XCVR_DIAG_HSCLK_SEL | (k << 9))); ++ val &= ~HSCLK_SEL_MODE3_MASK; ++ val |= FIELD_PREP(HSCLK_SEL_MODE3_MASK, ++ (p_ctrl_table->cmnda_hs_clk_0_sel >> 1)); ++ cdns_phy_reg_write(cdns_phy, (XCVR_DIAG_HSCLK_SEL | (k << 9)), val); ++ } ++ ++ /* PLL 0 control state machine registers */ ++ val = p_ctrl_table->vco_ring_select << 12; ++ cdns_phy_reg_write(cdns_phy, CMN_PLLSM0_USER_DEF_CTRL, val); ++ ++ if (pclk_in) { ++ val = 0x30a0; ++ } else { ++ val = cdns_phy_reg_read(cdns_phy, CMN_PLL0_VCOCAL_START); ++ val &= ~VCO_CALIB_CODE_START_POINT_VAL_MASK; ++ val |= FIELD_PREP(VCO_CALIB_CODE_START_POINT_VAL_MASK, ++ p_pll_table->vco_cal_code); ++ } ++ cdns_phy_reg_write(cdns_phy, CMN_PLL0_VCOCAL_START, val); ++ ++ cdns_phy_reg_write(cdns_phy, CMN_PLL0_VCOCAL_INIT_TMR, 0x0064); ++ cdns_phy_reg_write(cdns_phy, CMN_PLL0_VCOCAL_ITER_TMR, 0x000a); ++ ++ /* Common functions control and diagnostics registers */ ++ val = p_ctrl_table->cmnda_pll0_hs_sym_div_sel << 8; ++ val |= p_ctrl_table->cmnda_pll0_ip_div; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_INCLK_CTRL, val); ++ ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_OVRD, 0x0000); ++ ++ val = p_ctrl_table->cmnda_pll0_fb_div_high; ++ val |= PLL_FEEDBACK_DIV_HI_OVERRIDE_EN; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_FBH_OVRD, val); ++ ++ val = p_ctrl_table->cmnda_pll0_fb_div_low; ++ val |= PLL_FEEDBACK_DIV_LO_OVERRIDE_EN; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_FBL_OVRD, val); ++ ++ if (!pclk_in) { ++ val = p_ctrl_table->cmnda_pll0_pxdiv_low; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_PXL_DIVL, val); ++ ++ val = p_ctrl_table->cmnda_pll0_pxdiv_high; ++ val |= PLL_PCLK_DIV_EN; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_PXL_DIVH, val); ++ } ++ ++ val = p_pll_table->volt_to_current_coarse; ++ val |= (p_pll_table->volt_to_current) << 4; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_V2I_TUNE, val); ++ ++ val = p_pll_table->charge_pump_gain; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_CP_TUNE, val); ++ ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_LF_PROG, 0x0008); ++ ++ val = p_pll_table->pmos_ctrl; ++ val |= (p_pll_table->ndac_ctrl) << 8; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_PTATIS_TUNE1, val); ++ ++ val = p_pll_table->ptat_ndac_ctrl; ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_PTATIS_TUNE2, val); ++ ++ if (pclk_in) ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_TEST_MODE, 0x0022); ++ else ++ cdns_phy_reg_write(cdns_phy, CMN_DIAG_PLL0_TEST_MODE, 0x0020); ++ ++ cdns_phy_reg_write(cdns_phy, CMN_PSM_CLK_CTRL, 0x0016); ++ ++ /* Transceiver control and diagnostic registers */ ++ for (k = 0; k < num_lanes; k++) { ++ val = cdns_phy_reg_read(cdns_phy, (XCVR_DIAG_PLLDRC_CTRL | (k << 9))); ++ val &= ~DPLL_CLK_SEL_MODE3; ++ cdns_phy_reg_write(cdns_phy, (XCVR_DIAG_PLLDRC_CTRL | (k << 9)), val); ++ } ++ ++ for (k = 0; k < num_lanes; k++) { ++ val = cdns_phy_reg_read(cdns_phy, (TX_DIAG_TX_CTRL | (k << 9))); ++ val &= ~TX_IF_SUBRATE_MODE3_MASK; ++ val |= FIELD_PREP(TX_IF_SUBRATE_MODE3_MASK, ++ (p_ctrl_table->hsclk_div_tx_sub_rate >> 1)); ++ cdns_phy_reg_write(cdns_phy, (TX_DIAG_TX_CTRL | (k << 9)), val); ++ } ++ ++ val = cdns_phy_reg_read(cdns_phy, PHY_PMA_CMN_CTRL1); ++ val &= ~CMA_REF_CLK_SEL_MASK; ++ /* ++ * single ended reference clock (val |= 0x0030); ++ * differential clock (val |= 0x0000); ++ * for differential clock on the refclk_p and ++ * refclk_m off chip pins: CMN_DIAG_ACYA[8]=1'b1 ++ * cdns_phy_reg_write(cdns_phy, CMN_DIAG_ACYA, 0x0100); ++ */ ++ val |= FIELD_PREP(CMA_REF_CLK_SEL_MASK, 3); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_CMN_CTRL1, val); ++ ++ /* Deassert PHY reset */ ++ cdns_phy_reg_write(cdns_phy, PHY_ISO_CMN_CTRL, 0x0001); ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_ISO_CMN_CTRL, 0x0003); ++ ++ /* Power state machine registers */ ++ for (k = 0; k < num_lanes; k++) ++ cdns_phy_reg_write(cdns_phy, XCVR_PSM_RCTRL | (k << 9), 0xfefc); ++ ++ /* Assert cmn_macro_pwr_en */ ++ cdns_phy_reg_write(cdns_phy, PHY_PMA_ISO_CMN_CTRL, 0x0013); ++ ++ /* wait for cmn_macro_pwr_en_ack */ ++ ret = wait_for_ack(cdns_phy, PHY_PMA_ISO_CMN_CTRL, CMN_MACRO_PWR_EN_ACK, ++ "MA output macro power up failed"); ++ if (ret < 0) ++ return ret; ++ ++ /* wait for cmn_ready */ ++ ret = wait_for_ack(cdns_phy, PHY_PMA_CMN_CTRL1, CMN_READY, ++ "PMA output ready failed"); ++ if (ret < 0) ++ return ret; ++ ++ for (k = 0; k < num_lanes; k++) { ++ cdns_phy_reg_write(cdns_phy, TX_PSC_A0 | (k << 9), 0x6791); ++ cdns_phy_reg_write(cdns_phy, TX_PSC_A1 | (k << 9), 0x6790); ++ cdns_phy_reg_write(cdns_phy, TX_PSC_A2 | (k << 9), 0x0090); ++ cdns_phy_reg_write(cdns_phy, TX_PSC_A3 | (k << 9), 0x0090); ++ ++ val = cdns_phy_reg_read(cdns_phy, RX_PSC_CAL | (k << 9)); ++ val &= 0xffbb; ++ cdns_phy_reg_write(cdns_phy, RX_PSC_CAL | (k << 9), val); ++ ++ val = cdns_phy_reg_read(cdns_phy, RX_PSC_A0 | (k << 9)); ++ val &= 0xffbb; ++ cdns_phy_reg_write(cdns_phy, RX_PSC_A0 | (k << 9), val); ++ } ++ ++ return 0; ++} ++ ++static int hdptx_hdmi_phy_cfg(struct cdns_hdptx_phy *cdns_phy, unsigned long long char_rate) ++{ ++ const struct hdptx_hdmi_ctrl *p_ctrl_table; ++ const struct hdptx_hdmi_pll_tuning *p_pll_table; ++ const u32 refclk_freq_khz = cdns_phy->ref_clk_rate / 1000; ++ const bool pclk_in = false; ++ u32 char_rate_khz = char_rate / 1000; ++ u32 vco_freq, rate; ++ u32 div_total, i; ++ ++ dev_dbg(cdns_phy->dev, "character clock: %d KHz\n ", char_rate_khz); ++ ++ /* Get right row from the ctrl_table table. ++ * check the character rate. ++ */ ++ for (i = 0; i < ARRAY_SIZE(pixel_clk_output_ctrl_table); i++) { ++ rate = pixel_clk_output_ctrl_table[i].feedback_factor * ++ pixel_clk_output_ctrl_table[i].pixel_clk_freq / 1000; ++ if (char_rate_khz == rate) { ++ p_ctrl_table = &pixel_clk_output_ctrl_table[i]; ++ break; ++ } ++ } ++ if (i == ARRAY_SIZE(pixel_clk_output_ctrl_table)) { ++ dev_warn(cdns_phy->dev, ++ "char clk (%d KHz) not supported\n", char_rate_khz); ++ return -EINVAL; ++ } ++ ++ div_total = p_ctrl_table->pll_fb_div_total; ++ vco_freq = refclk_freq_khz * div_total / p_ctrl_table->cmnda_pll0_ip_div; ++ ++ /* Get right row from the pixel_clk_output_pll_table table. ++ * Check if vco_freq_khz and feedback_div_total ++ * column matching with pixel_clk_output_pll_table. ++ */ ++ for (i = 0; i < ARRAY_SIZE(pixel_clk_output_pll_table); i++) { ++ if (vco_freq == pixel_clk_output_pll_table[i].vco_freq && ++ div_total == pixel_clk_output_pll_table[i].feedback_div_total) { ++ p_pll_table = &pixel_clk_output_pll_table[i]; ++ break; ++ } ++ } ++ if (i == ARRAY_SIZE(pixel_clk_output_pll_table)) { ++ dev_warn(cdns_phy->dev, "VCO (%d KHz) not supported\n", vco_freq); ++ return -EINVAL; ++ } ++ dev_dbg(cdns_phy->dev, "VCO frequency is (%d KHz)\n", vco_freq); ++ ++ return hdptx_hdmi_phy_config(cdns_phy, p_ctrl_table, p_pll_table, pclk_in); ++} ++ ++static int hdptx_hdmi_phy_power_up(struct cdns_hdptx_phy *cdns_phy) ++{ ++ int ret; ++ ++ /* set Power State to A2 */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A2); ++ ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_0, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_1, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_2, 1); ++ cdns_phy_reg_write(cdns_phy, TX_DIAG_ACYA_3, 1); ++ ++ ret = wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A2_ACK, ++ "Wait A2 Ack failed"); ++ if (ret < 0) ++ return ret; ++ ++ /* Power up ARC */ ++ hdptx_hdmi_arc_config(cdns_phy); ++ ++ /* Configure PHY in A0 mode (PHY must be in the A0 power ++ * state in order to transmit data) ++ */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A0); ++ ++ return wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A0_ACK, ++ "Wait A0 Ack failed"); ++} ++ ++static int hdptx_hdmi_phy_power_down(struct cdns_hdptx_phy *cdns_phy) ++{ ++ u32 val; ++ ++ val = cdns_phy_reg_read(cdns_phy, PHY_HDP_MODE_CTRL); ++ val &= ~(POWER_STATE_A0 | POWER_STATE_A1 | POWER_STATE_A2 | POWER_STATE_A3); ++ /* PHY_DP_MODE_CTL set to A3 power state */ ++ cdns_phy_reg_write(cdns_phy, PHY_HDP_MODE_CTRL, val | POWER_STATE_A3); ++ ++ return wait_for_ack(cdns_phy, PHY_HDP_MODE_CTRL, POWER_STATE_A3_ACK, ++ "Wait A3 Ack failed"); ++} ++ ++static int hdptx_hdmi_configure(struct phy *phy, ++ union phy_configure_opts *opts) ++{ ++ struct cdns_hdptx_phy *cdns_phy = phy_get_drvdata(phy); ++ u32 reg; ++ int ret; ++ ++ cdns_phy->hdmi.tmds_char_rate = opts->hdmi.tmds_char_rate; ++ ++ /* Check HDMI FW alive before HDMI PHY init */ ++ ret = readl_poll_timeout(cdns_phy->regs + KEEP_ALIVE, reg, ++ reg & CDNS_KEEP_ALIVE_MASK, 500, ++ CDNS_KEEP_ALIVE_TIMEOUT); ++ if (ret < 0) { ++ dev_err(cdns_phy->dev, "NO HDMI FW running\n"); ++ return -ENXIO; ++ } ++ ++ /* Configure PHY */ ++ if (hdptx_hdmi_phy_cfg(cdns_phy, cdns_phy->hdmi.tmds_char_rate) < 0) { ++ dev_err(cdns_phy->dev, "failed to set phy pclock\n"); ++ return -EINVAL; ++ } ++ ++ hdptx_hdmi_phy_set_vswing(cdns_phy); ++ ++ return 0; ++} ++ ++static int cdns_hdptx_phy_on(struct phy *phy) ++{ ++ struct cdns_hdptx_phy *cdns_phy = phy_get_drvdata(phy); ++ ++ if (phy->attrs.mode == PHY_MODE_DP) ++ return hdptx_dp_phy_power_up(cdns_phy); ++ else ++ return hdptx_hdmi_phy_power_up(cdns_phy); ++} ++ ++static int cdns_hdptx_phy_off(struct phy *phy) ++{ ++ struct cdns_hdptx_phy *cdns_phy = phy_get_drvdata(phy); ++ ++ if (phy->attrs.mode == PHY_MODE_DP) ++ return hdptx_dp_phy_power_down(cdns_phy); ++ else ++ return hdptx_hdmi_phy_power_down(cdns_phy); ++} ++ ++static int ++cdns_hdptx_phy_valid(struct phy *phy, enum phy_mode mode, ++ int submode, union phy_configure_opts *opts) ++{ ++ u32 rate = opts->hdmi.tmds_char_rate / 1000; ++ int i; ++ ++ if (mode == PHY_MODE_DP) ++ return 0; ++ ++ for (i = 0; i < ARRAY_SIZE(pixel_clk_output_ctrl_table); i++) ++ if (rate == pixel_clk_output_ctrl_table[i].pixel_clk_freq) ++ return 0; ++ ++ return -EINVAL; ++} ++ ++static int cdns_hdptx_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode) ++{ ++ struct cdns_hdptx_phy *cdns_phy = phy_get_drvdata(phy); ++ int ret = 0; ++ ++ if (mode == PHY_MODE_DP) { ++ hdptx_dp_phy_ref_clock_type(cdns_phy); ++ hdptx_dp_aux_cfg(cdns_phy); ++ } else if (mode != PHY_MODE_HDMI) { ++ dev_err(&phy->dev, "Invalid PHY mode: %u\n", mode); ++ return -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static int cdns_hdptx_configure(struct phy *phy, ++ union phy_configure_opts *opts) ++{ ++ if (phy->attrs.mode == PHY_MODE_DP) ++ return hdptx_dp_configure(phy, opts); ++ else ++ return hdptx_hdmi_configure(phy, opts); ++} ++ ++static const struct phy_ops cdns_hdptx_phy_ops = { ++ .set_mode = cdns_hdptx_phy_set_mode, ++ .configure = cdns_hdptx_configure, ++ .power_on = cdns_hdptx_phy_on, ++ .power_off = cdns_hdptx_phy_off, ++ .validate = cdns_hdptx_phy_valid, ++ .owner = THIS_MODULE, ++}; ++ ++static int cdns_hdptx_phy_probe(struct platform_device *pdev) ++{ ++ struct cdns_hdptx_phy *cdns_phy; ++ struct device *dev = &pdev->dev; ++ struct device_node *node = dev->of_node; ++ struct phy_provider *phy_provider; ++ struct resource *res; ++ struct phy *phy; ++ int ret; ++ ++ cdns_phy = devm_kzalloc(dev, sizeof(*cdns_phy), GFP_KERNEL); ++ if (!cdns_phy) ++ return -ENOMEM; ++ ++ dev_set_drvdata(dev, cdns_phy); ++ cdns_phy->dev = dev; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) ++ return -ENODEV; ++ cdns_phy->regs = devm_ioremap(dev, res->start, resource_size(res)); ++ if (IS_ERR(cdns_phy->regs)) ++ return PTR_ERR(cdns_phy->regs); ++ ++ phy = devm_phy_create(dev, node, &cdns_hdptx_phy_ops); ++ if (IS_ERR(phy)) ++ return PTR_ERR(phy); ++ ++ cdns_phy->phy = phy; ++ phy_set_drvdata(phy, cdns_phy); ++ ++ /* init base struct for access mhdp mailbox */ ++ cdns_phy->base.dev = cdns_phy->dev; ++ cdns_phy->base.regs = cdns_phy->regs; ++ ++ ret = hdptx_clk_enable(cdns_phy); ++ if (ret) ++ return -EINVAL; ++ ++ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); ++ if (IS_ERR(phy_provider)) ++ return PTR_ERR(phy_provider); ++ ++ return 0; ++} ++ ++static const struct of_device_id cdns_hdptx_phy_of_match[] = { ++ {.compatible = "fsl,imx8mq-hdptx-phy" }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, cdns_hdptx_phy_of_match); ++ ++static struct platform_driver cdns_hdptx_phy_driver = { ++ .probe = cdns_hdptx_phy_probe, ++ .driver = { ++ .name = "cdns-hdptx-phy", ++ .of_match_table = cdns_hdptx_phy_of_match, ++ } ++}; ++module_platform_driver(cdns_hdptx_phy_driver); ++ ++MODULE_AUTHOR("Sandor Yu "); ++MODULE_DESCRIPTION("Cadence HDP-TX DP/HDMI PHY driver"); ++MODULE_LICENSE("GPL"); + +From patchwork Tue Dec 17 06:51:50 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,8/9] arm64: dts: imx8mq: Add DCSS + HDMI/DP display pipeline +From: Sandor Yu +X-Patchwork-Id: 629295 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:50 +0800 + +From: Alexander Stein + +This adds DCSS + MHDP + MHDP PHY nodes. PHY mode (DP/HDMI) is selected +by the connector type connected to mhdp port@1 endpoint. + +Signed-off-by: Alexander Stein +--- +v17->v20: + *No change + + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 68 +++++++++++++++++++++++ + 1 file changed, 68 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +index d51de8d899b2b..df8ba1d5391ae 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi +@@ -1602,6 +1602,74 @@ aips4: bus@32c00000 { /* AIPS4 */ + #size-cells = <1>; + ranges = <0x32c00000 0x32c00000 0x400000>; + ++ mdhp_phy: phy@32c00000 { ++ compatible = "fsl,imx8mq-hdptx-phy"; ++ reg = <0x32c00000 0x100000>; ++ #phy-cells = <0>; ++ clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; ++ clock-names = "ref", "apb"; ++ }; ++ ++ mhdp: bridge@32c00000 { ++ compatible = "fsl,imx8mq-mhdp8501"; ++ reg = <0x32c00000 0x100000>; ++ interrupts = , ++ ; ++ interrupt-names = "plug_in", "plug_out"; ++ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; ++ phys = <&mdhp_phy>; ++ status = "disabled"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mhdp_in: endpoint { ++ remote-endpoint = <&dcss_out>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ }; ++ }; ++ }; ++ }; ++ ++ dcss: display-controller@32e00000 { ++ compatible = "nxp,imx8mq-dcss"; ++ reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; ++ interrupt-parent = <&irqsteer>; ++ interrupts = <6>, <8>, <9>; ++ interrupt-names = "ctxld", "ctxld_kick", "vblank"; ++ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, ++ <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, ++ <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, ++ <&clk IMX8MQ_VIDEO2_PLL_OUT>, ++ <&clk IMX8MQ_CLK_DISP_DTRC>; ++ clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; ++ assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, ++ <&clk IMX8MQ_CLK_DISP_RTRM>, ++ <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; ++ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, ++ <&clk IMX8MQ_SYS1_PLL_800M>, ++ <&clk IMX8MQ_CLK_27M>; ++ assigned-clock-rates = <800000000>, ++ <400000000>; ++ status = "disabled"; ++ ++ port { ++ dcss_out: endpoint { ++ remote-endpoint = <&mhdp_in>; ++ }; ++ }; ++ }; ++ + irqsteer: interrupt-controller@32e2d000 { + compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; + reg = <0x32e2d000 0x1000>; + +From patchwork Tue Dec 17 06:51:51 2024 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v20,9/9] arm64: dts: imx8mq: tqma8mq-mba8mx: Enable HDMI support +From: Sandor Yu +X-Patchwork-Id: 629296 +Message-Id: + +To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, + neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, + jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, + daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, + shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, + vkoul@kernel.org, dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, + mripard@kernel.org +Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, + oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org +Date: Tue, 17 Dec 2024 14:51:51 +0800 + +From: Alexander Stein + +Add HDMI connector and connect it to MHDP output. Enable peripherals +for HDMI output. + +Signed-off-by: Alexander Stein +--- +v19->v20: + *No change + +v18->v19: +- Move property data-lanes to endpoint of port@1 + +v17->v18: +- replace lane-mapping with data-lanes + + .../dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 26 +++++++++++++++++++ + arch/arm64/boot/dts/freescale/mba8mx.dtsi | 11 ++++++++ + 2 files changed, 37 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts +index 0165f3a259853..5ba06a411c6a1 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts +@@ -53,6 +53,10 @@ &btn2 { + gpios = <&gpio3 17 GPIO_ACTIVE_LOW>; + }; + ++&dcss { ++ status = "okay"; ++}; ++ + &gpio_leds { + led3 { + label = "led3"; +@@ -60,6 +64,14 @@ led3 { + }; + }; + ++&hdmi_connector { ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&mhdp_out>; ++ }; ++ }; ++}; ++ + &i2c1 { + expander2: gpio@25 { + compatible = "nxp,pca9555"; +@@ -91,6 +103,20 @@ &led2 { + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; + }; + ++&mhdp { ++ status = "okay"; ++ ports { ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ data-lanes = <0 1 2 3>; ++ }; ++ }; ++ }; ++}; ++ + /* PCIe slot on X36 */ + &pcie0 { + reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; +diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi +index 58e3865c28895..d04b75a76dfe6 100644 +--- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi ++++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi +@@ -89,6 +89,17 @@ gpio_delays: gpio-delays { + gpio-line-names = "LVDS_BRIDGE_EN_1V8"; + }; + ++ hdmi_connector: connector { ++ compatible = "hdmi-connector"; ++ label = "X11"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ }; ++ }; ++ }; ++ + panel: panel-lvds { + /* + * Display is not fixed, so compatible has to be added from diff --git a/projects/NXP/devices/iMX8/patches/linux/0001-drm-bridge-mhdp-Add-cdns-mhdp-driver-bridge-driver.patch b/projects/NXP/devices/iMX8/patches/linux/0001-drm-bridge-mhdp-Add-cdns-mhdp-driver-bridge-driver.patch deleted file mode 100644 index e8af890e07..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0001-drm-bridge-mhdp-Add-cdns-mhdp-driver-bridge-driver.patch +++ /dev/null @@ -1,5933 +0,0 @@ -From c50c4f565797ac47544e1f0a2669d9cf1cb9d1c7 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Mon, 20 Apr 2020 23:01:50 +0800 -Subject: [PATCH 01/49] drm: bridge: mhdp: Add cdns mhdp driver bridge driver - -Base on rockchip cdn-dp-reg.c code, -create cdns mhdp DP API functions driver. -Move the driver to a separate directory. -Added HDMI/Audio/CEC API functions. - -Signed-off-by: Sandor Yu -[ Aisheng: fix conflict due to below commit -611e22b1d9f6 ("drm/rockchip: Remove unneeded semicolon") ] -Signed-off-by: Dong Aisheng ---- - drivers/gpu/drm/bridge/cadence/Kconfig | 26 + - drivers/gpu/drm/bridge/cadence/Makefile | 9 + - drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 574 +++++++++++ - .../gpu/drm/bridge/cadence/cdns-hdmi-core.c | 690 +++++++++++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-audio.c | 395 +++++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-cec.c | 341 +++++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-common.c | 795 +++++++++++++++ - drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c | 172 ++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c | 332 ++++++ - drivers/gpu/drm/bridge/cadence/cdns-mhdp.h | 209 ++++ - drivers/gpu/drm/rockchip/Makefile | 2 +- - drivers/gpu/drm/rockchip/cdn-dp-core.c | 241 ++--- - drivers/gpu/drm/rockchip/cdn-dp-core.h | 44 +- - drivers/gpu/drm/rockchip/cdn-dp-reg.c | 960 ------------------ - .../drm/bridge/cdns-mhdp.h | 389 ++++++- - 15 files changed, 4034 insertions(+), 1145 deletions(-) - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-dp-core.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp.h - delete mode 100644 drivers/gpu/drm/rockchip/cdn-dp-reg.c - rename drivers/gpu/drm/rockchip/cdn-dp-reg.h => include/drm/bridge/cdns-mhdp.h (53%) - -diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig -index ef8c230e0f62..bb1865b15aca 100644 ---- a/drivers/gpu/drm/bridge/cadence/Kconfig -+++ b/drivers/gpu/drm/bridge/cadence/Kconfig -@@ -22,3 +22,31 @@ config DRM_CDNS_MHDP8546_J721E - initializes the J721E Display Port and sets up the - clock and data muxes. - endif -+ -+config DRM_CDNS_MHDP -+ tristate "Cadence MHDP COMMON API driver" -+ select DRM_KMS_HELPER -+ select DRM_PANEL_BRIDGE -+ depends on OF -+ help -+ Support Cadence MHDP API library. -+ -+config DRM_CDNS_HDMI -+ tristate "Cadence HDMI DRM driver" -+ depends on DRM_CDNS_MHDP -+ select DRM_DISPLAY_HDCP_HELPER -+ select DRM_DISPLAY_HDMI_HELPER -+ -+config DRM_CDNS_DP -+ tristate "Cadence DP DRM driver" -+ depends on DRM_CDNS_MHDP -+ -+config DRM_CDNS_AUDIO -+ tristate "Cadence MHDP Audio driver" -+ depends on DRM_CDNS_MHDP -+ -+config DRM_CDNS_HDMI_CEC -+ tristate "Cadence MHDP HDMI CEC driver" -+ depends on DRM_CDNS_HDMI -+ select CEC_CORE -+ select CEC_NOTIFIER -diff --git a/drivers/gpu/drm/bridge/cadence/Makefile b/drivers/gpu/drm/bridge/cadence/Makefile -index 8f647991b374..618290870ba5 100644 ---- a/drivers/gpu/drm/bridge/cadence/Makefile -+++ b/drivers/gpu/drm/bridge/cadence/Makefile -@@ -4,4 +4,13 @@ - cdns-dsi-$(CONFIG_DRM_CDNS_DSI_J721E) += cdns-dsi-j721e.o - obj-$(CONFIG_DRM_CDNS_MHDP8546) += cdns-mhdp8546.o - cdns-mhdp8546-y := cdns-mhdp8546-core.o cdns-mhdp8546-hdcp.o - cdns-mhdp8546-$(CONFIG_DRM_CDNS_MHDP8546_J721E) += cdns-mhdp8546-j721e.o -+ -+cdns_mhdp_drmcore-y := cdns-mhdp-common.o cdns-mhdp-dp.o cdns-mhdp-hdmi.o -+ -+cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_HDMI) += cdns-hdmi-core.o -+cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_DP) += cdns-dp-core.o -+cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_AUDIO) += cdns-mhdp-audio.o -+cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_HDMI_CEC) += cdns-mhdp-cec.o -+ -+obj-$(CONFIG_DRM_CDNS_MHDP) += cdns_mhdp_drmcore.o -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -new file mode 100644 -index 000000000000..acb5c860da73 ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -@@ -0,0 +1,574 @@ -+/* -+ * Cadence Display Port Interface (DP) driver -+ * -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * This function only implements native DPDC reads and writes -+ */ -+static ssize_t dp_aux_transfer(struct drm_dp_aux *aux, -+ struct drm_dp_aux_msg *msg) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(aux->dev); -+ bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); -+ int ret; -+ -+ /* Ignore address only message */ -+ if ((msg->size == 0) || (msg->buffer == NULL)) { -+ msg->reply = native ? -+ DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY_ACK; -+ return msg->size; -+ } -+ -+ if (!native) { -+ dev_err(mhdp->dev, "%s: only native messages supported\n", __func__); -+ return -EINVAL; -+ } -+ -+ /* msg sanity check */ -+ if (msg->size > DP_AUX_MAX_PAYLOAD_BYTES) { -+ dev_err(mhdp->dev, "%s: invalid msg: size(%zu), request(%x)\n", -+ __func__, msg->size, (unsigned int)msg->request); -+ return -EINVAL; -+ } -+ -+ if (msg->request == DP_AUX_NATIVE_WRITE) { -+ const u8 *buf = msg->buffer; -+ int i; -+ for (i = 0; i < msg->size; ++i) { -+ ret = cdns_mhdp_dpcd_write(mhdp, -+ msg->address + i, buf[i]); -+ if (!ret) -+ continue; -+ -+ DRM_DEV_ERROR(mhdp->dev, "Failed to write DPCD\n"); -+ -+ return ret; -+ } -+ } -+ -+ if (msg->request == DP_AUX_NATIVE_READ) { -+ ret = cdns_mhdp_dpcd_read(mhdp, msg->address, msg->buffer, msg->size); -+ if (ret < 0) -+ return -EIO; -+ msg->reply = DP_AUX_NATIVE_REPLY_ACK; -+ return msg->size; -+ } -+ return 0; -+} -+ -+static int dp_aux_init(struct cdns_mhdp_device *mhdp, -+ struct device *dev) -+{ -+ int ret; -+ -+ mhdp->dp.aux.name = "imx_dp_aux"; -+ mhdp->dp.aux.dev = dev; -+ mhdp->dp.aux.transfer = dp_aux_transfer; -+ -+ ret = drm_dp_aux_register(&mhdp->dp.aux); -+ -+ return ret; -+} -+ -+static int dp_aux_destroy(struct cdns_mhdp_device *mhdp) -+{ -+ drm_dp_aux_unregister(&mhdp->dp.aux); -+ return 0; -+} -+ -+static void dp_pixel_clk_reset(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val; -+ -+ /* reset pixel clk */ -+ val = cdns_mhdp_reg_read(mhdp, SOURCE_HDTX_CAR); -+ cdns_mhdp_reg_write(mhdp, SOURCE_HDTX_CAR, val & 0xFD); -+ cdns_mhdp_reg_write(mhdp, SOURCE_HDTX_CAR, val); -+} -+ -+static void cdns_dp_mode_set(struct cdns_mhdp_device *mhdp) -+{ -+ u32 lane_mapping = mhdp->lane_mapping; -+ int ret; -+ -+ cdns_mhdp_plat_call(mhdp, pclk_rate); -+ -+ /* delay for DP FW stable after pixel clock relock */ -+ msleep(50); -+ -+ dp_pixel_clk_reset(mhdp); -+ -+ /* Get DP Caps */ -+ ret = drm_dp_dpcd_read(&mhdp->dp.aux, DP_DPCD_REV, mhdp->dp.dpcd, -+ DP_RECEIVER_CAP_SIZE); -+ if (ret < 0) { -+ DRM_ERROR("Failed to get caps %d\n", ret); -+ return; -+ } -+ -+ mhdp->dp.rate = drm_dp_max_link_rate(mhdp->dp.dpcd); -+ mhdp->dp.num_lanes = drm_dp_max_lane_count(mhdp->dp.dpcd); -+ -+ /* check the max link rate */ -+ if (mhdp->dp.rate > CDNS_DP_MAX_LINK_RATE) -+ mhdp->dp.rate = CDNS_DP_MAX_LINK_RATE; -+ -+ /* Initialize link rate/num_lanes as panel max link rate/max_num_lanes */ -+ cdns_mhdp_plat_call(mhdp, phy_set); -+ -+ /* Video off */ -+ ret = cdns_mhdp_set_video_status(mhdp, CONTROL_VIDEO_IDLE); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to valid video %d\n", ret); -+ return; -+ } -+ -+ /* Line swaping */ -+ cdns_mhdp_reg_write(mhdp, LANES_CONFIG, 0x00400000 | lane_mapping); -+ -+ /* Set DP host capability */ -+ ret = cdns_mhdp_set_host_cap(mhdp, false); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to set host cap %d\n", ret); -+ return; -+ } -+ -+ ret = cdns_mhdp_config_video(mhdp); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to config video %d\n", ret); -+ return; -+ } -+ -+ return; -+} -+ -+/* ----------------------------------------------------------------------------- -+ * dp TX Setup -+ */ -+static enum drm_connector_status -+cdns_dp_connector_detect(struct drm_connector *connector, bool force) -+{ -+ struct cdns_mhdp_device *mhdp = container_of(connector, -+ struct cdns_mhdp_device, connector.base); -+ u8 hpd = 0xf; -+ -+ hpd = cdns_mhdp_read_hpd(mhdp); -+ if (hpd == 1) -+ /* Cable Connected */ -+ return connector_status_connected; -+ else if (hpd == 0) -+ /* Cable Disconnedted */ -+ return connector_status_disconnected; -+ else { -+ /* Cable status unknown */ -+ DRM_INFO("Unknow cable status, hdp=%u\n", hpd); -+ return connector_status_unknown; -+ } -+} -+ -+static int cdns_dp_connector_get_modes(struct drm_connector *connector) -+{ -+ struct cdns_mhdp_device *mhdp = container_of(connector, -+ struct cdns_mhdp_device, connector.base); -+ int num_modes = 0; -+ struct edid *edid; -+ -+ edid = drm_do_get_edid(&mhdp->connector.base, -+ cdns_mhdp_get_edid_block, mhdp); -+ if (edid) { -+ dev_info(mhdp->dev, "%x,%x,%x,%x,%x,%x,%x,%x\n", -+ edid->header[0], edid->header[1], -+ edid->header[2], edid->header[3], -+ edid->header[4], edid->header[5], -+ edid->header[6], edid->header[7]); -+ drm_connector_update_edid_property(connector, edid); -+ num_modes = drm_add_edid_modes(connector, edid); -+ kfree(edid); -+ } -+ -+ if (num_modes == 0) -+ DRM_ERROR("Invalid edid\n"); -+ return num_modes; -+} -+ -+static const struct drm_connector_funcs cdns_dp_connector_funcs = { -+ .fill_modes = drm_helper_probe_single_connector_modes, -+ .detect = cdns_dp_connector_detect, -+ .destroy = drm_connector_cleanup, -+ .reset = drm_atomic_helper_connector_reset, -+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -+}; -+ -+static const struct drm_connector_helper_funcs cdns_dp_connector_helper_funcs = { -+ .get_modes = cdns_dp_connector_get_modes, -+}; -+ -+static int cdns_dp_bridge_attach(struct drm_bridge *bridge, -+ enum drm_bridge_attach_flags flags) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_encoder *encoder = bridge->encoder; -+ struct drm_connector *connector = &mhdp->connector.base; -+ -+ connector->interlace_allowed = 1; -+ -+ if (mhdp->is_hpd) -+ connector->polled = DRM_CONNECTOR_POLL_HPD; -+ else -+ connector->polled = DRM_CONNECTOR_POLL_CONNECT | -+ DRM_CONNECTOR_POLL_DISCONNECT; -+ -+ drm_connector_helper_add(connector, &cdns_dp_connector_helper_funcs); -+ -+ drm_connector_init(bridge->dev, connector, &cdns_dp_connector_funcs, -+ DRM_MODE_CONNECTOR_DisplayPort); -+ -+ drm_connector_attach_encoder(connector, encoder); -+ -+ return 0; -+} -+ -+static enum drm_mode_status -+cdns_dp_bridge_mode_valid(struct drm_bridge *bridge, -+ const struct drm_display_mode *mode) -+{ -+ enum drm_mode_status mode_status = MODE_OK; -+ -+ /* We don't support double-clocked modes */ -+ if (mode->flags & DRM_MODE_FLAG_DBLCLK || -+ mode->flags & DRM_MODE_FLAG_INTERLACE) -+ return MODE_BAD; -+ -+ /* MAX support pixel clock rate 594MHz */ -+ if (mode->clock > 594000) -+ return MODE_CLOCK_HIGH; -+ -+ /* 4096x2160 is not supported now */ -+ if (mode->hdisplay > 3840) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->vdisplay > 2160) -+ return MODE_BAD_VVALUE; -+ -+ return mode_status; -+} -+ -+static void cdns_dp_bridge_mode_set(struct drm_bridge *bridge, -+ const struct drm_display_mode *orig_mode, -+ const struct drm_display_mode *mode) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_display_info *display_info = &mhdp->connector.base.display_info; -+ struct video_info *video = &mhdp->video_info; -+ -+ switch (display_info->bpc) { -+ case 10: -+ video->color_depth = 10; -+ break; -+ case 6: -+ video->color_depth = 6; -+ break; -+ default: -+ video->color_depth = 8; -+ break; -+ } -+ -+ video->color_fmt = PXL_RGB; -+ video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); -+ video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); -+ -+ DRM_INFO("Mode: %dx%dp%d\n", mode->hdisplay, mode->vdisplay, mode->clock); -+ memcpy(&mhdp->mode, mode, sizeof(struct drm_display_mode)); -+ -+ mutex_lock(&mhdp->lock); -+ cdns_dp_mode_set(mhdp); -+ mutex_unlock(&mhdp->lock); -+ -+ /* reset force mode set flag */ -+ mhdp->force_mode_set = false; -+} -+ -+static void cdn_dp_bridge_enable(struct drm_bridge *bridge) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ int ret; -+ -+ /* Link trainning */ -+ ret = cdns_mhdp_train_link(mhdp); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed link train %d\n", ret); -+ return; -+ } -+ -+ ret = cdns_mhdp_set_video_status(mhdp, CONTROL_VIDEO_VALID); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to valid video %d\n", ret); -+ return; -+ } -+} -+ -+static void cdn_dp_bridge_disable(struct drm_bridge *bridge) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ -+ cdns_mhdp_set_video_status(mhdp, CONTROL_VIDEO_IDLE); -+} -+ -+static const struct drm_bridge_funcs cdns_dp_bridge_funcs = { -+ .attach = cdns_dp_bridge_attach, -+ .enable = cdn_dp_bridge_enable, -+ .disable = cdn_dp_bridge_disable, -+ .mode_set = cdns_dp_bridge_mode_set, -+ .mode_valid = cdns_dp_bridge_mode_valid, -+}; -+ -+static void hotplug_work_func(struct work_struct *work) -+{ -+ struct cdns_mhdp_device *mhdp = container_of(work, -+ struct cdns_mhdp_device, hotplug_work.work); -+ struct drm_connector *connector = &mhdp->connector.base; -+ -+ drm_helper_hpd_irq_event(connector->dev); -+ -+ if (connector->status == connector_status_connected) { -+ /* Cable connedted */ -+ DRM_INFO("HDMI/DP Cable Plug In\n"); -+ enable_irq(mhdp->irq[IRQ_OUT]); -+ } else if (connector->status == connector_status_disconnected) { -+ /* Cable Disconnedted */ -+ DRM_INFO("HDMI/DP Cable Plug Out\n"); -+ /* force mode set for cable replugin to recovery DP video modes */ -+ mhdp->force_mode_set = true; -+ enable_irq(mhdp->irq[IRQ_IN]); -+ } -+} -+ -+static irqreturn_t cdns_dp_irq_thread(int irq, void *data) -+{ -+ struct cdns_mhdp_device *mhdp = data; -+ -+ disable_irq_nosync(irq); -+ -+ mod_delayed_work(system_wq, &mhdp->hotplug_work, -+ msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS)); -+ -+ return IRQ_HANDLED; -+} -+ -+static void cdns_dp_parse_dt(struct cdns_mhdp_device *mhdp) -+{ -+ struct device_node *of_node = mhdp->dev->of_node; -+ int ret; -+ -+ ret = of_property_read_u32(of_node, "lane-mapping", -+ &mhdp->lane_mapping); -+ if (ret) { -+ mhdp->lane_mapping = 0xc6; -+ dev_warn(mhdp->dev, "Failed to get lane_mapping - using default 0xc6\n"); -+ } -+ dev_info(mhdp->dev, "lane-mapping 0x%02x\n", mhdp->lane_mapping); -+} -+ -+static int __cdns_dp_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp) -+{ -+ struct device *dev = &pdev->dev; -+ struct resource *iores = NULL; -+ int ret; -+ -+ mutex_init(&mhdp->lock); -+ mutex_init(&mhdp->iolock); -+ -+ INIT_DELAYED_WORK(&mhdp->hotplug_work, hotplug_work_func); -+ -+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (iores) { -+ mhdp->regs_base = devm_ioremap(dev, iores->start, -+ resource_size(iores)); -+ if (IS_ERR(mhdp->regs_base)) -+ return -ENOMEM; -+ } -+ -+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ if (iores) { -+ mhdp->regs_sec = devm_ioremap(dev, iores->start, -+ resource_size(iores)); -+ if (IS_ERR(mhdp->regs_sec)) -+ return -ENOMEM; -+ } -+ -+ mhdp->is_hpd = true; -+ mhdp->is_ls1028a = false; -+ -+ mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in"); -+ if (mhdp->irq[IRQ_IN] < 0) { -+ mhdp->is_hpd = false; -+ dev_info(dev, "No plug_in irq number\n"); -+ } -+ -+ mhdp->irq[IRQ_OUT] = platform_get_irq_byname(pdev, "plug_out"); -+ if (mhdp->irq[IRQ_OUT] < 0) { -+ mhdp->is_hpd = false; -+ dev_info(dev, "No plug_out irq number\n"); -+ } -+ -+ cdns_dp_parse_dt(mhdp); -+ -+ if (of_device_is_compatible(dev->of_node, "cdn,ls1028a-dp")) -+ mhdp->is_ls1028a = true; -+ -+ cdns_mhdp_plat_call(mhdp, power_on); -+ -+ cdns_mhdp_plat_call(mhdp, firmware_init); -+ -+ /* DP FW alive check */ -+ ret = cdns_mhdp_check_alive(mhdp); -+ if (ret == false) { -+ DRM_ERROR("NO dp FW running\n"); -+ return -ENXIO; -+ } -+ -+ /* DP PHY init before AUX init */ -+ cdns_mhdp_plat_call(mhdp, phy_set); -+ -+ /* Enable Hotplug Detect IRQ thread */ -+ if (mhdp->is_hpd) { -+ irq_set_status_flags(mhdp->irq[IRQ_IN], IRQ_NOAUTOEN); -+ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_IN], -+ NULL, cdns_dp_irq_thread, -+ IRQF_ONESHOT, dev_name(dev), -+ mhdp); -+ -+ if (ret) { -+ dev_err(dev, "can't claim irq %d\n", -+ mhdp->irq[IRQ_IN]); -+ return -EINVAL; -+ } -+ -+ irq_set_status_flags(mhdp->irq[IRQ_OUT], IRQ_NOAUTOEN); -+ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_OUT], -+ NULL, cdns_dp_irq_thread, -+ IRQF_ONESHOT, dev_name(dev), -+ mhdp); -+ -+ if (ret) { -+ dev_err(dev, "can't claim irq %d\n", -+ mhdp->irq[IRQ_OUT]); -+ return -EINVAL; -+ } -+ -+ if (cdns_mhdp_read_hpd(mhdp)) -+ enable_irq(mhdp->irq[IRQ_OUT]); -+ else -+ enable_irq(mhdp->irq[IRQ_IN]); -+ } -+ -+ mhdp->bridge.base.driver_private = mhdp; -+ mhdp->bridge.base.funcs = &cdns_dp_bridge_funcs; -+#ifdef CONFIG_OF -+ mhdp->bridge.base.of_node = dev->of_node; -+#endif -+ -+ dev_set_drvdata(dev, mhdp); -+ -+ /* register audio driver */ -+ cdns_mhdp_register_audio_driver(dev); -+ -+ dp_aux_init(mhdp, dev); -+ -+ return 0; -+} -+ -+static void __cdns_dp_remove(struct cdns_mhdp_device *mhdp) -+{ -+ dp_aux_destroy(mhdp); -+ cdns_mhdp_unregister_audio_driver(mhdp->dev); -+} -+ -+/* ----------------------------------------------------------------------------- -+ * Probe/remove API, used from platforms based on the DRM bridge API. -+ */ -+int cdns_dp_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ ret = __cdns_dp_probe(pdev, mhdp); -+ if (ret) -+ return ret; -+ -+ drm_bridge_add(&mhdp->bridge.base); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cdns_dp_probe); -+ -+void cdns_dp_remove(struct platform_device *pdev) -+{ -+ struct cdns_mhdp_device *mhdp = platform_get_drvdata(pdev); -+ -+ drm_bridge_remove(&mhdp->bridge.base); -+ -+ __cdns_dp_remove(mhdp); -+} -+EXPORT_SYMBOL_GPL(cdns_dp_remove); -+ -+/* ----------------------------------------------------------------------------- -+ * Bind/unbind API, used from platforms based on the component framework. -+ */ -+int cdns_dp_bind(struct platform_device *pdev, struct drm_encoder *encoder, -+ struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ ret = __cdns_dp_probe(pdev, mhdp); -+ if (ret < 0) -+ return ret; -+ -+ ret = drm_bridge_attach(encoder, &mhdp->bridge.base, NULL, 0); -+ if (ret) { -+ cdns_dp_remove(pdev); -+ DRM_ERROR("Failed to initialize bridge with drm\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cdns_dp_bind); -+ -+void cdns_dp_unbind(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ __cdns_dp_remove(mhdp); -+} -+EXPORT_SYMBOL_GPL(cdns_dp_unbind); -+ -+MODULE_AUTHOR("Sandor Yu "); -+MODULE_DESCRIPTION("Cadence Display Port transmitter driver"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:cdn-dp"); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -new file mode 100644 -index 000000000000..da40f62617ef ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -0,0 +1,690 @@ -+/* -+ * Cadence High-Definition Multimedia Interface (HDMI) driver -+ * -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static void hdmi_sink_config(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_scdc *scdc = &mhdp->connector.base.display_info.hdmi.scdc; -+ u8 buff = 0; -+ -+ /* Default work in HDMI1.4 */ -+ mhdp->hdmi.hdmi_type = MODE_HDMI_1_4; -+ -+ /* check sink support SCDC or not */ -+ if (scdc->supported != true) { -+ DRM_INFO("Sink Not Support SCDC\n"); -+ return; -+ } -+ -+ if (mhdp->hdmi.char_rate > 340000) { -+ /* -+ * TMDS Character Rate above 340MHz should working in HDMI2.0 -+ * Enable scrambling and TMDS_Bit_Clock_Ratio -+ */ -+ buff = SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE; -+ mhdp->hdmi.hdmi_type = MODE_HDMI_2_0; -+ } else if (scdc->scrambling.low_rates) { -+ /* -+ * Enable scrambling and HDMI2.0 when scrambling capability of sink -+ * be indicated in the HF-VSDB LTE_340Mcsc_scramble bit -+ */ -+ buff = SCDC_SCRAMBLING_ENABLE; -+ mhdp->hdmi.hdmi_type = MODE_HDMI_2_0; -+ } -+ -+ /* TMDS config */ -+ cdns_hdmi_scdc_write(mhdp, 0x20, buff); -+} -+ -+static void hdmi_lanes_config(struct cdns_mhdp_device *mhdp) -+{ -+ /* Line swaping */ -+ cdns_mhdp_reg_write(mhdp, LANES_CONFIG, 0x00400000 | mhdp->lane_mapping); -+} -+ -+static int hdmi_avi_info_set(struct cdns_mhdp_device *mhdp, -+ struct drm_display_mode *mode) -+{ -+ struct hdmi_avi_infoframe frame; -+ int format = mhdp->video_info.color_fmt; -+ struct drm_connector_state *conn_state = mhdp->connector.base.state; -+ struct drm_display_mode *adj_mode; -+ enum hdmi_quantization_range qr; -+ u8 buf[32]; -+ int ret; -+ -+ /* Initialise info frame from DRM mode */ -+ drm_hdmi_avi_infoframe_from_display_mode(&frame, &mhdp->connector.base, -+ mode); -+ -+ switch (format) { -+ case YCBCR_4_4_4: -+ frame.colorspace = HDMI_COLORSPACE_YUV444; -+ break; -+ case YCBCR_4_2_2: -+ frame.colorspace = HDMI_COLORSPACE_YUV422; -+ break; -+ case YCBCR_4_2_0: -+ frame.colorspace = HDMI_COLORSPACE_YUV420; -+ break; -+ default: -+ frame.colorspace = HDMI_COLORSPACE_RGB; -+ break; -+ } -+ -+ drm_hdmi_avi_infoframe_colorimetry(&frame, conn_state); -+ -+ adj_mode = &mhdp->bridge.base.encoder->crtc->state->adjusted_mode; -+ -+ qr = drm_default_rgb_quant_range(adj_mode); -+ -+ drm_hdmi_avi_infoframe_quant_range(&frame, &mhdp->connector.base, -+ adj_mode, qr); -+ -+ ret = hdmi_avi_infoframe_check(&frame); -+ if (WARN_ON(ret)) -+ return false; -+ -+ ret = hdmi_avi_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1); -+ if (ret < 0) { -+ DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); -+ return -1; -+ } -+ -+ buf[0] = 0; -+ cdns_mhdp_infoframe_set(mhdp, 0, sizeof(buf), buf, HDMI_INFOFRAME_TYPE_AVI); -+ return 0; -+} -+ -+static void hdmi_vendor_info_set(struct cdns_mhdp_device *mhdp, -+ struct drm_display_mode *mode) -+{ -+ struct hdmi_vendor_infoframe frame; -+ u8 buf[32]; -+ int ret; -+ -+ /* Initialise vendor frame from DRM mode */ -+ ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame, &mhdp->connector.base, mode); -+ if (ret < 0) { -+ DRM_INFO("No vendor infoframe\n"); -+ return; -+ } -+ -+ ret = hdmi_vendor_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1); -+ if (ret < 0) { -+ DRM_WARN("Unable to pack vendor infoframe: %d\n", ret); -+ return; -+ } -+ -+ buf[0] = 0; -+ cdns_mhdp_infoframe_set(mhdp, 3, sizeof(buf), buf, HDMI_INFOFRAME_TYPE_VENDOR); -+} -+ -+static void hdmi_drm_info_set(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_connector_state *conn_state; -+ struct hdmi_drm_infoframe frame; -+ u8 buf[32]; -+ int ret; -+ -+ conn_state = mhdp->connector.base.state; -+ -+ if (!conn_state->hdr_output_metadata) -+ return; -+ -+ ret = drm_hdmi_infoframe_set_hdr_metadata(&frame, conn_state); -+ if (ret < 0) { -+ DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n"); -+ return; -+ } -+ -+ ret = hdmi_drm_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1); -+ if (ret < 0) { -+ DRM_DEBUG_KMS("couldn't pack HDR infoframe\n"); -+ return; -+ } -+ -+ buf[0] = 0; -+ cdns_mhdp_infoframe_set(mhdp, 3, sizeof(buf), -+ buf, HDMI_INFOFRAME_TYPE_DRM); -+} -+ -+void cdns_hdmi_mode_set(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_display_mode *mode = &mhdp->mode; -+ int ret; -+ -+ /* video mode valid check */ -+ if (mode->clock == 0 || mode->hdisplay == 0 || mode->vdisplay == 0) -+ return; -+ -+ hdmi_lanes_config(mhdp); -+ -+ cdns_mhdp_plat_call(mhdp, pclk_rate); -+ -+ /* delay for HDMI FW stable after pixel clock relock */ -+ msleep(20); -+ -+ cdns_mhdp_plat_call(mhdp, phy_set); -+ -+ hdmi_sink_config(mhdp); -+ -+ ret = cdns_hdmi_ctrl_init(mhdp, mhdp->hdmi.hdmi_type, mhdp->hdmi.char_rate); -+ if (ret < 0) { -+ DRM_ERROR("%s, ret = %d\n", __func__, ret); -+ return; -+ } -+ -+ /* Config GCP */ -+ if (mhdp->video_info.color_depth == 8) -+ cdns_hdmi_disable_gcp(mhdp); -+ else -+ cdns_hdmi_enable_gcp(mhdp); -+ -+ ret = hdmi_avi_info_set(mhdp, mode); -+ if (ret < 0) { -+ DRM_ERROR("%s ret = %d\n", __func__, ret); -+ return; -+ } -+ -+ /* vendor info frame is enable only when HDMI1.4 4K mode */ -+ hdmi_vendor_info_set(mhdp, mode); -+ -+ hdmi_drm_info_set(mhdp); -+ -+ ret = cdns_hdmi_mode_config(mhdp, mode, &mhdp->video_info); -+ if (ret < 0) { -+ DRM_ERROR("CDN_API_HDMITX_SetVic_blocking ret = %d\n", ret); -+ return; -+ } -+} -+ -+static enum drm_connector_status -+cdns_hdmi_connector_detect(struct drm_connector *connector, bool force) -+{ -+ struct cdns_mhdp_device *mhdp = -+ container_of(connector, struct cdns_mhdp_device, connector.base); -+ -+ u8 hpd = 0xf; -+ -+ hpd = cdns_mhdp_read_hpd(mhdp); -+ -+ if (hpd == 1) -+ /* Cable Connected */ -+ return connector_status_connected; -+ else if (hpd == 0) -+ /* Cable Disconnedted */ -+ return connector_status_disconnected; -+ else { -+ /* Cable status unknown */ -+ DRM_INFO("Unknow cable status, hdp=%u\n", hpd); -+ return connector_status_unknown; -+ } -+} -+ -+static int cdns_hdmi_connector_get_modes(struct drm_connector *connector) -+{ -+ struct cdns_mhdp_device *mhdp = -+ container_of(connector, struct cdns_mhdp_device, connector.base); -+ int num_modes = 0; -+ struct edid *edid; -+ -+ edid = drm_do_get_edid(&mhdp->connector.base, -+ cdns_hdmi_get_edid_block, mhdp); -+ if (edid) { -+ dev_info(mhdp->dev, "%x,%x,%x,%x,%x,%x,%x,%x\n", -+ edid->header[0], edid->header[1], -+ edid->header[2], edid->header[3], -+ edid->header[4], edid->header[5], -+ edid->header[6], edid->header[7]); -+ drm_connector_update_edid_property(connector, edid); -+ num_modes = drm_add_edid_modes(connector, edid); -+ kfree(edid); -+ } -+ -+ if (num_modes == 0) -+ DRM_ERROR("Invalid edid\n"); -+ return num_modes; -+} -+ -+static bool blob_equal(const struct drm_property_blob *a, -+ const struct drm_property_blob *b) -+{ -+ if (a && b) -+ return a->length == b->length && -+ !memcmp(a->data, b->data, a->length); -+ -+ return !a == !b; -+} -+ -+static int cdns_hdmi_connector_atomic_check(struct drm_connector *connector, -+ struct drm_atomic_state *state) -+{ -+ struct drm_connector_state *new_con_state = -+ drm_atomic_get_new_connector_state(state, connector); -+ struct drm_connector_state *old_con_state = -+ drm_atomic_get_old_connector_state(state, connector); -+ struct drm_crtc *crtc = new_con_state->crtc; -+ struct drm_crtc_state *new_crtc_state; -+ -+ if (!blob_equal(new_con_state->hdr_output_metadata, -+ old_con_state->hdr_output_metadata) || -+ new_con_state->colorspace != old_con_state->colorspace) { -+ new_crtc_state = drm_atomic_get_crtc_state(state, crtc); -+ if (IS_ERR(new_crtc_state)) -+ return PTR_ERR(new_crtc_state); -+ -+ new_crtc_state->mode_changed = -+ !new_con_state->hdr_output_metadata || -+ !old_con_state->hdr_output_metadata || -+ new_con_state->colorspace != old_con_state->colorspace; -+ } -+ -+ return 0; -+} -+ -+static const struct drm_connector_funcs cdns_hdmi_connector_funcs = { -+ .fill_modes = drm_helper_probe_single_connector_modes, -+ .detect = cdns_hdmi_connector_detect, -+ .destroy = drm_connector_cleanup, -+ .reset = drm_atomic_helper_connector_reset, -+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -+}; -+ -+static const struct drm_connector_helper_funcs cdns_hdmi_connector_helper_funcs = { -+ .get_modes = cdns_hdmi_connector_get_modes, -+ .atomic_check = cdns_hdmi_connector_atomic_check, -+}; -+ -+static int cdns_hdmi_bridge_attach(struct drm_bridge *bridge, -+ enum drm_bridge_attach_flags flags) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_mode_config *config = &bridge->dev->mode_config; -+ struct drm_encoder *encoder = bridge->encoder; -+ struct drm_connector *connector = &mhdp->connector.base; -+ -+ connector->interlace_allowed = 1; -+ connector->polled = DRM_CONNECTOR_POLL_HPD; -+ -+ drm_connector_helper_add(connector, &cdns_hdmi_connector_helper_funcs); -+ -+ drm_connector_init(bridge->dev, connector, &cdns_hdmi_connector_funcs, -+ DRM_MODE_CONNECTOR_HDMIA); -+ -+ if (!strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) { -+ drm_object_attach_property(&connector->base, -+ config->hdr_output_metadata_property, -+ 0); -+ -+ if (!drm_mode_create_hdmi_colorspace_property(connector, 0)) -+ drm_object_attach_property(&connector->base, -+ connector->colorspace_property, -+ 0); -+ } -+ -+ drm_connector_attach_encoder(connector, encoder); -+ -+ return 0; -+} -+ -+static enum drm_mode_status -+cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, -+ const struct drm_display_mode *mode) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ enum drm_mode_status mode_status = MODE_OK; -+ int ret; -+ -+ /* We don't support double-clocked and Interlaced modes */ -+ if (mode->flags & DRM_MODE_FLAG_DBLCLK || -+ mode->flags & DRM_MODE_FLAG_INTERLACE) -+ return MODE_BAD; -+ -+ /* MAX support pixel clock rate 594MHz */ -+ if (mode->clock > 594000) -+ return MODE_CLOCK_HIGH; -+ -+ /* 4096x2160 is not supported */ -+ if (mode->hdisplay > 3840 || mode->vdisplay > 2160) -+ return MODE_BAD_HVALUE; -+ -+ mhdp->valid_mode = mode; -+ ret = cdns_mhdp_plat_call(mhdp, phy_video_valid); -+ if (ret == false) -+ return MODE_CLOCK_RANGE; -+ -+ return mode_status; -+} -+ -+static void cdns_hdmi_bridge_mode_set(struct drm_bridge *bridge, -+ const struct drm_display_mode *orig_mode, -+ const struct drm_display_mode *mode) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct video_info *video = &mhdp->video_info; -+ -+ video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); -+ video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); -+ -+ DRM_INFO("Mode: %dx%dp%d\n", mode->hdisplay, mode->vdisplay, mode->clock); -+ memcpy(&mhdp->mode, mode, sizeof(struct drm_display_mode)); -+ -+ mutex_lock(&mhdp->lock); -+ cdns_hdmi_mode_set(mhdp); -+ mutex_unlock(&mhdp->lock); -+ /* reset force mode set flag */ -+ mhdp->force_mode_set = false; -+} -+ -+bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, -+ const struct drm_display_mode *mode, -+ struct drm_display_mode *adjusted_mode) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_display_info *di = &mhdp->connector.base.display_info; -+ struct video_info *video = &mhdp->video_info; -+ int vic = drm_match_cea_mode(mode); -+ -+ video->color_depth = 8; -+ video->color_fmt = PXL_RGB; -+ -+ /* for all other platforms, other than imx8mq */ -+ if (strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) { -+ if (di->bpc == 10 || di->bpc == 6) -+ video->color_depth = di->bpc; -+ -+ return true; -+ } -+ -+ /* imx8mq */ -+ if (vic == 97 || vic == 96) { -+ if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36) -+ video->color_depth = 12; -+ else if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30) -+ video->color_depth = 10; -+ -+ if (drm_mode_is_420_only(di, mode) || -+ (drm_mode_is_420_also(di, mode) && -+ video->color_depth > 8)) { -+ video->color_fmt = YCBCR_4_2_0; -+ -+ adjusted_mode->private_flags = 1; -+ return true; -+ } -+ -+ video->color_depth = 8; -+ return true; -+ } -+ -+ /* Any defined maximum tmds clock limit we must not exceed*/ -+ if ((di->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36) && -+ (mode->clock * 3 / 2 <= di->max_tmds_clock)) -+ video->color_depth = 12; -+ else if ((di->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) && -+ (mode->clock * 5 / 4 <= di->max_tmds_clock)) -+ video->color_depth = 10; -+ -+ /* 10-bit color depth for the following modes is not supported */ -+ if ((vic == 95 || vic == 94 || vic == 93) && video->color_depth == 10) -+ video->color_depth = 8; -+ -+ return true; -+} -+ -+static const struct drm_bridge_funcs cdns_hdmi_bridge_funcs = { -+ .attach = cdns_hdmi_bridge_attach, -+ .mode_set = cdns_hdmi_bridge_mode_set, -+ .mode_valid = cdns_hdmi_bridge_mode_valid, -+ .mode_fixup = cdns_hdmi_bridge_mode_fixup, -+}; -+ -+static void hotplug_work_func(struct work_struct *work) -+{ -+ struct cdns_mhdp_device *mhdp = container_of(work, -+ struct cdns_mhdp_device, hotplug_work.work); -+ struct drm_connector *connector = &mhdp->connector.base; -+ -+ drm_helper_hpd_irq_event(connector->dev); -+ -+ if (connector->status == connector_status_connected) { -+ DRM_INFO("HDMI Cable Plug In\n"); -+ mhdp->force_mode_set = true; -+ enable_irq(mhdp->irq[IRQ_OUT]); -+ } else if (connector->status == connector_status_disconnected) { -+ /* Cable Disconnedted */ -+ DRM_INFO("HDMI Cable Plug Out\n"); -+ /* force mode set for cable replugin to recovery HDMI2.0 video modes */ -+ mhdp->force_mode_set = true; -+ enable_irq(mhdp->irq[IRQ_IN]); -+ } -+} -+ -+static irqreturn_t cdns_hdmi_irq_thread(int irq, void *data) -+{ -+ struct cdns_mhdp_device *mhdp = data; -+ -+ disable_irq_nosync(irq); -+ -+ mod_delayed_work(system_wq, &mhdp->hotplug_work, -+ msecs_to_jiffies(HOTPLUG_DEBOUNCE_MS)); -+ -+ return IRQ_HANDLED; -+} -+ -+static void cdns_hdmi_parse_dt(struct cdns_mhdp_device *mhdp) -+{ -+ struct device_node *of_node = mhdp->dev->of_node; -+ int ret; -+ -+ ret = of_property_read_u32(of_node, "lane-mapping", &mhdp->lane_mapping); -+ if (ret) { -+ mhdp->lane_mapping = 0xc6; -+ dev_warn(mhdp->dev, "Failed to get lane_mapping - using default 0xc6\n"); -+ } -+ dev_info(mhdp->dev, "lane-mapping 0x%02x\n", mhdp->lane_mapping); -+} -+ -+static int __cdns_hdmi_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp) -+{ -+ struct device *dev = &pdev->dev; -+ struct platform_device_info pdevinfo; -+ struct resource *iores = NULL; -+ int ret; -+ -+ mutex_init(&mhdp->lock); -+ mutex_init(&mhdp->iolock); -+ -+ INIT_DELAYED_WORK(&mhdp->hotplug_work, hotplug_work_func); -+ -+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ mhdp->regs_base = devm_ioremap(dev, iores->start, resource_size(iores)); -+ if (IS_ERR(mhdp->regs_base)) { -+ dev_err(dev, "No regs_base memory\n"); -+ return -ENOMEM; -+ } -+ -+ /* sec register base */ -+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ mhdp->regs_sec = devm_ioremap(dev, iores->start, resource_size(iores)); -+ if (IS_ERR(mhdp->regs_sec)) { -+ dev_err(dev, "No regs_sec memory\n"); -+ return -ENOMEM; -+ } -+ -+ mhdp->irq[IRQ_IN] = platform_get_irq_byname(pdev, "plug_in"); -+ if (mhdp->irq[IRQ_IN] < 0) { -+ dev_info(dev, "No plug_in irq number\n"); -+ return -EPROBE_DEFER; -+ } -+ -+ mhdp->irq[IRQ_OUT] = platform_get_irq_byname(pdev, "plug_out"); -+ if (mhdp->irq[IRQ_OUT] < 0) { -+ dev_info(dev, "No plug_out irq number\n"); -+ return -EPROBE_DEFER; -+ } -+ -+ cdns_mhdp_plat_call(mhdp, power_on); -+ -+ /* Initialize FW */ -+ cdns_mhdp_plat_call(mhdp, firmware_init); -+ -+ /* HDMI FW alive check */ -+ ret = cdns_mhdp_check_alive(mhdp); -+ if (ret == false) { -+ dev_err(dev, "NO HDMI FW running\n"); -+ return -ENXIO; -+ } -+ -+ /* Enable Hotplug Detect thread */ -+ irq_set_status_flags(mhdp->irq[IRQ_IN], IRQ_NOAUTOEN); -+ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_IN], -+ NULL, cdns_hdmi_irq_thread, -+ IRQF_ONESHOT, dev_name(dev), -+ mhdp); -+ if (ret < 0) { -+ dev_err(dev, "can't claim irq %d\n", -+ mhdp->irq[IRQ_IN]); -+ return -EINVAL; -+ } -+ -+ irq_set_status_flags(mhdp->irq[IRQ_OUT], IRQ_NOAUTOEN); -+ ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_OUT], -+ NULL, cdns_hdmi_irq_thread, -+ IRQF_ONESHOT, dev_name(dev), -+ mhdp); -+ if (ret < 0) { -+ dev_err(dev, "can't claim irq %d\n", -+ mhdp->irq[IRQ_OUT]); -+ return -EINVAL; -+ } -+ -+ cdns_hdmi_parse_dt(mhdp); -+ -+ if (cdns_mhdp_read_hpd(mhdp)) -+ enable_irq(mhdp->irq[IRQ_OUT]); -+ else -+ enable_irq(mhdp->irq[IRQ_IN]); -+ -+ mhdp->bridge.base.driver_private = mhdp; -+ mhdp->bridge.base.funcs = &cdns_hdmi_bridge_funcs; -+#ifdef CONFIG_OF -+ mhdp->bridge.base.of_node = dev->of_node; -+#endif -+ -+ memset(&pdevinfo, 0, sizeof(pdevinfo)); -+ pdevinfo.parent = dev; -+ pdevinfo.id = PLATFORM_DEVID_AUTO; -+ -+ dev_set_drvdata(dev, mhdp); -+ -+ /* register audio driver */ -+ cdns_mhdp_register_audio_driver(dev); -+ -+ /* register cec driver */ -+#ifdef CONFIG_DRM_CDNS_HDMI_CEC -+ cdns_mhdp_register_cec_driver(dev); -+#endif -+ -+ return 0; -+} -+ -+static void __cdns_hdmi_remove(struct cdns_mhdp_device *mhdp) -+{ -+ /* unregister cec driver */ -+#ifdef CONFIG_DRM_CDNS_HDMI_CEC -+ cdns_mhdp_unregister_cec_driver(mhdp->dev); -+#endif -+ cdns_mhdp_unregister_audio_driver(mhdp->dev); -+} -+ -+/* ----------------------------------------------------------------------------- -+ * Probe/remove API, used from platforms based on the DRM bridge API. -+ */ -+int cdns_hdmi_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ ret = __cdns_hdmi_probe(pdev, mhdp); -+ if (ret < 0) -+ return ret; -+ -+ drm_bridge_add(&mhdp->bridge.base); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cdns_hdmi_probe); -+ -+void cdns_hdmi_remove(struct platform_device *pdev) -+{ -+ struct cdns_mhdp_device *mhdp = platform_get_drvdata(pdev); -+ -+ drm_bridge_remove(&mhdp->bridge.base); -+ -+ __cdns_hdmi_remove(mhdp); -+} -+EXPORT_SYMBOL_GPL(cdns_hdmi_remove); -+ -+/* ----------------------------------------------------------------------------- -+ * Bind/unbind API, used from platforms based on the component framework. -+ */ -+int cdns_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder, -+ struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ ret = __cdns_hdmi_probe(pdev, mhdp); -+ if (ret) -+ return ret; -+ -+ ret = drm_bridge_attach(encoder, &mhdp->bridge.base, NULL, 0); -+ if (ret) { -+ cdns_hdmi_remove(pdev); -+ DRM_ERROR("Failed to initialize bridge with drm\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cdns_hdmi_bind); -+ -+void cdns_hdmi_unbind(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ __cdns_hdmi_remove(mhdp); -+} -+EXPORT_SYMBOL_GPL(cdns_hdmi_unbind); -+ -+MODULE_AUTHOR("Sandor Yu "); -+MODULE_DESCRIPTION("Cadence HDMI transmitter driver"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:cdn-hdmi"); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -new file mode 100644 -index 000000000000..86174fb633bc ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -@@ -0,0 +1,395 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd -+ * Author: Chris Zhong -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define CDNS_DP_SPDIF_CLK 200000000 -+ -+static u32 TMDS_rate_table[7] = { -+ 25200, 27000, 54000, 74250, 148500, 297000, 594000, -+}; -+ -+static u32 N_table_32k[7] = { -+/* 25200/27000/54000/74250/148500/297000/594000 */ -+ 4096, 4096, 4096, 4096, 4096, 3072, 3072, -+}; -+ -+static u32 N_table_44k[7] = { -+ 6272, 6272, 6272, 6272, 6272, 4704, 9408, -+}; -+ -+static u32 N_table_48k[7] = { -+ 6144, 6144, 6144, 6144, 6144, 5120, 6144, -+}; -+ -+static int select_N_index(u32 pclk) -+{ -+ int num = sizeof(TMDS_rate_table)/sizeof(int); -+ int i = 0; -+ -+ for (i = 0; i < num ; i++) -+ if (pclk == TMDS_rate_table[i]) -+ break; -+ -+ if (i == num) { -+ DRM_WARN("pclkc %d is not supported!\n", pclk); -+ return num-1; -+ } -+ -+ return i; -+} -+ -+static void hdmi_audio_avi_set(struct cdns_mhdp_device *mhdp, -+ u32 channels) -+{ -+ struct hdmi_audio_infoframe frame; -+ u8 buf[32]; -+ int ret; -+ -+ hdmi_audio_infoframe_init(&frame); -+ -+ frame.channels = channels; -+ frame.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; -+ -+ if (channels == 2) -+ frame.channel_allocation = 0; -+ else if (channels == 4) -+ frame.channel_allocation = 0x3; -+ else if (channels == 8) -+ frame.channel_allocation = 0x13; -+ -+ ret = hdmi_audio_infoframe_pack(&frame, buf + 1, sizeof(buf) - 1); -+ if (ret < 0) { -+ DRM_ERROR("failed to pack audio infoframe: %d\n", ret); -+ return; -+ } -+ -+ buf[0] = 0; -+ -+ cdns_mhdp_infoframe_set(mhdp, 1, sizeof(buf), buf, HDMI_INFOFRAME_TYPE_AUDIO); -+} -+ -+int cdns_mhdp_audio_stop(struct cdns_mhdp_device *mhdp, -+ struct audio_info *audio) -+{ -+ int ret; -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { -+ ret = cdns_mhdp_reg_write(mhdp, AUDIO_PACK_CONTROL, 0); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "audio stop failed: %d\n", ret); -+ return ret; -+ } -+ } -+ -+ cdns_mhdp_bus_write(0, mhdp, SPDIF_CTRL_ADDR); -+ -+ /* clearn the audio config and reset */ -+ cdns_mhdp_bus_write(0, mhdp, AUDIO_SRC_CNTL); -+ cdns_mhdp_bus_write(0, mhdp, AUDIO_SRC_CNFG); -+ cdns_mhdp_bus_write(AUDIO_SW_RST, mhdp, AUDIO_SRC_CNTL); -+ cdns_mhdp_bus_write(0, mhdp, AUDIO_SRC_CNTL); -+ -+ /* reset smpl2pckt component */ -+ cdns_mhdp_bus_write(0, mhdp, SMPL2PKT_CNTL); -+ cdns_mhdp_bus_write(AUDIO_SW_RST, mhdp, SMPL2PKT_CNTL); -+ cdns_mhdp_bus_write(0, mhdp, SMPL2PKT_CNTL); -+ -+ /* reset FIFO */ -+ cdns_mhdp_bus_write(AUDIO_SW_RST, mhdp, FIFO_CNTL); -+ cdns_mhdp_bus_write(0, mhdp, FIFO_CNTL); -+ -+ if (audio->format == AFMT_SPDIF_INT) -+ clk_disable_unprepare(mhdp->spdif_clk); -+ -+ return 0; -+} -+EXPORT_SYMBOL(cdns_mhdp_audio_stop); -+ -+int cdns_mhdp_audio_mute(struct cdns_mhdp_device *mhdp, bool enable) -+{ -+ struct audio_info *audio = &mhdp->audio_info; -+ int ret = true; -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { -+ ret = cdns_mhdp_reg_write_bit(mhdp, DP_VB_ID, 4, 1, enable); -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "audio mute failed: %d\n", ret); -+ } -+ -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_audio_mute); -+ -+static void cdns_mhdp_audio_config_i2s(struct cdns_mhdp_device *mhdp, -+ struct audio_info *audio) -+{ -+ int sub_pckt_num = 1, i2s_port_en_val = 0xf, i; -+ int idx = select_N_index(mhdp->mode.clock); -+ u32 val, ncts; -+ -+ if (audio->channels == 2) { -+ if (mhdp->dp.num_lanes == 1) -+ sub_pckt_num = 2; -+ else -+ sub_pckt_num = 4; -+ -+ i2s_port_en_val = 1; -+ } else if (audio->channels == 4) { -+ i2s_port_en_val = 3; -+ } -+ -+ cdns_mhdp_bus_write(0x0, mhdp, SPDIF_CTRL_ADDR); -+ -+ cdns_mhdp_bus_write(SYNC_WR_TO_CH_ZERO, mhdp, FIFO_CNTL); -+ -+ val = MAX_NUM_CH(audio->channels); -+ val |= NUM_OF_I2S_PORTS(audio->channels); -+ val |= AUDIO_TYPE_LPCM; -+ val |= CFG_SUB_PCKT_NUM(sub_pckt_num); -+ cdns_mhdp_bus_write(val, mhdp, SMPL2PKT_CNFG); -+ -+ if (audio->sample_width == 16) -+ val = 0; -+ else if (audio->sample_width == 24) -+ val = 1 << 9; -+ else -+ val = 2 << 9; -+ -+ val |= AUDIO_CH_NUM(audio->channels); -+ val |= I2S_DEC_PORT_EN(i2s_port_en_val); -+ val |= TRANS_SMPL_WIDTH_32; -+ cdns_mhdp_bus_write(val, mhdp, AUDIO_SRC_CNFG); -+ -+ for (i = 0; i < (audio->channels + 1) / 2; i++) { -+ if (audio->sample_width == 16) -+ val = (0x02 << 8) | (0x02 << 20); -+ else if (audio->sample_width == 24) -+ val = (0x0b << 8) | (0x0b << 20); -+ -+ val |= ((2 * i) << 4) | ((2 * i + 1) << 16); -+ cdns_mhdp_bus_write(val, mhdp, STTS_BIT_CH(i)); -+ } -+ -+ switch (audio->sample_rate) { -+ case 32000: -+ val = SAMPLING_FREQ(3) | -+ ORIGINAL_SAMP_FREQ(0xc); -+ ncts = N_table_32k[idx]; -+ break; -+ case 44100: -+ val = SAMPLING_FREQ(0) | -+ ORIGINAL_SAMP_FREQ(0xf); -+ ncts = N_table_44k[idx]; -+ break; -+ case 48000: -+ val = SAMPLING_FREQ(2) | -+ ORIGINAL_SAMP_FREQ(0xd); -+ ncts = N_table_48k[idx]; -+ break; -+ case 88200: -+ val = SAMPLING_FREQ(8) | -+ ORIGINAL_SAMP_FREQ(0x7); -+ ncts = N_table_44k[idx] * 2; -+ break; -+ case 96000: -+ val = SAMPLING_FREQ(0xa) | -+ ORIGINAL_SAMP_FREQ(5); -+ ncts = N_table_48k[idx] * 2; -+ break; -+ case 176400: -+ val = SAMPLING_FREQ(0xc) | -+ ORIGINAL_SAMP_FREQ(3); -+ ncts = N_table_44k[idx] * 4; -+ break; -+ case 192000: -+ default: -+ val = SAMPLING_FREQ(0xe) | -+ ORIGINAL_SAMP_FREQ(1); -+ ncts = N_table_48k[idx] * 4; -+ break; -+ } -+ val |= 4; -+ cdns_mhdp_bus_write(val, mhdp, COM_CH_STTS_BITS); -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_HDMIA) -+ cdns_mhdp_reg_write(mhdp, CM_I2S_CTRL, ncts | 0x4000000); -+ -+ cdns_mhdp_bus_write(SMPL2PKT_EN, mhdp, SMPL2PKT_CNTL); -+ cdns_mhdp_bus_write(I2S_DEC_START, mhdp, AUDIO_SRC_CNTL); -+} -+ -+static void cdns_mhdp_audio_config_spdif(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val; -+ -+ cdns_mhdp_bus_write(SYNC_WR_TO_CH_ZERO, mhdp, FIFO_CNTL); -+ -+ val = MAX_NUM_CH(2) | AUDIO_TYPE_LPCM | CFG_SUB_PCKT_NUM(4); -+ cdns_mhdp_bus_write(val, mhdp, SMPL2PKT_CNFG); -+ cdns_mhdp_bus_write(SMPL2PKT_EN, mhdp, SMPL2PKT_CNTL); -+ -+ val = SPDIF_ENABLE | SPDIF_AVG_SEL | SPDIF_JITTER_BYPASS; -+ cdns_mhdp_bus_write(val, mhdp, SPDIF_CTRL_ADDR); -+ -+ clk_prepare_enable(mhdp->spdif_clk); -+ clk_set_rate(mhdp->spdif_clk, CDNS_DP_SPDIF_CLK); -+} -+ -+int cdns_mhdp_audio_config(struct cdns_mhdp_device *mhdp, -+ struct audio_info *audio) -+{ -+ int ret; -+ -+ /* reset the spdif clk before config */ -+ if (audio->format == AFMT_SPDIF_INT) { -+ reset_control_assert(mhdp->spdif_rst); -+ reset_control_deassert(mhdp->spdif_rst); -+ } -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { -+ ret = cdns_mhdp_reg_write(mhdp, CM_LANE_CTRL, LANE_REF_CYC); -+ if (ret) -+ goto err_audio_config; -+ -+ ret = cdns_mhdp_reg_write(mhdp, CM_CTRL, 0); -+ if (ret) -+ goto err_audio_config; -+ } else { -+ /* HDMI Mode */ -+ ret = cdns_mhdp_reg_write(mhdp, CM_CTRL, 8); -+ if (ret) -+ goto err_audio_config; -+ } -+ -+ if (audio->format == AFMT_I2S) -+ cdns_mhdp_audio_config_i2s(mhdp, audio); -+ else if (audio->format == AFMT_SPDIF_INT) -+ cdns_mhdp_audio_config_spdif(mhdp); -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_DisplayPort) -+ ret = cdns_mhdp_reg_write(mhdp, AUDIO_PACK_CONTROL, AUDIO_PACK_EN); -+ -+ if (audio->connector_type == DRM_MODE_CONNECTOR_HDMIA) -+ hdmi_audio_avi_set(mhdp, audio->channels); -+ -+err_audio_config: -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "audio config failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_audio_config); -+ -+static int audio_hw_params(struct device *dev, void *data, -+ struct hdmi_codec_daifmt *daifmt, -+ struct hdmi_codec_params *params) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ struct audio_info audio = { -+ .sample_width = params->sample_width, -+ .sample_rate = params->sample_rate, -+ .channels = params->channels, -+ .connector_type = mhdp->connector.base.connector_type, -+ }; -+ int ret; -+ -+ switch (daifmt->fmt) { -+ case HDMI_I2S: -+ audio.format = AFMT_I2S; -+ break; -+ case HDMI_SPDIF: -+ audio.format = AFMT_SPDIF_EXT; -+ break; -+ default: -+ DRM_DEV_ERROR(dev, "Invalid format %d\n", daifmt->fmt); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ ret = cdns_mhdp_audio_config(mhdp, &audio); -+ if (!ret) -+ mhdp->audio_info = audio; -+ -+out: -+ return ret; -+} -+ -+static void audio_shutdown(struct device *dev, void *data) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ int ret; -+ -+ ret = cdns_mhdp_audio_stop(mhdp, &mhdp->audio_info); -+ if (!ret) -+ mhdp->audio_info.format = AFMT_UNUSED; -+} -+ -+static int audio_digital_mute(struct device *dev, void *data, -+ bool enable) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ int ret; -+ -+ ret = cdns_mhdp_audio_mute(mhdp, enable); -+ -+ return ret; -+} -+ -+static int audio_get_eld(struct device *dev, void *data, -+ u8 *buf, size_t len) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ memcpy(buf, mhdp->connector.base.eld, -+ min(sizeof(mhdp->connector.base.eld), len)); -+ -+ return 0; -+} -+ -+static const struct hdmi_codec_ops audio_codec_ops = { -+ .hw_params = audio_hw_params, -+ .audio_shutdown = audio_shutdown, -+ .digital_mute = audio_digital_mute, -+ .get_eld = audio_get_eld, -+}; -+ -+int cdns_mhdp_register_audio_driver(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ struct hdmi_codec_pdata codec_data = { -+ .i2s = 1, -+ .spdif = 1, -+ .ops = &audio_codec_ops, -+ .max_i2s_channels = 8, -+ }; -+ -+ mhdp->audio_pdev = platform_device_register_data( -+ dev, HDMI_CODEC_DRV_NAME, 1, -+ &codec_data, sizeof(codec_data)); -+ -+ return PTR_ERR_OR_ZERO(mhdp->audio_pdev); -+} -+ -+void cdns_mhdp_unregister_audio_driver(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ platform_device_unregister(mhdp->audio_pdev); -+} -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -new file mode 100644 -index 000000000000..5717bb0bcb75 ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -@@ -0,0 +1,341 @@ -+/* -+ * Copyright 2019 NXP -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+ -+#define CEC_NAME "cdns-mhdp-cec" -+ -+#define REG_ADDR_OFF 4 -+ -+/* regsiter define */ -+#define TX_MSG_HEADER 0x33800 -+#define TX_MSG_LENGTH 0x33840 -+#define TX_MSG_CMD 0x33844 -+#define RX_MSG_CMD 0x33850 -+#define RX_CLEAR_BUF 0x33854 -+#define LOGICAL_ADDRESS_LA0 0x33858 -+ -+#define CLK_DIV_MSB 0x3386c -+#define CLK_DIV_LSB 0x33870 -+#define RX_MSG_DATA1 0x33900 -+#define RX_MSG_LENGTH 0x33940 -+#define RX_MSG_STATUS 0x33944 -+#define NUM_OF_MSG_RX_BUF 0x33948 -+#define TX_MSG_STATUS 0x3394c -+#define DB_L_TIMER 0x33980 -+ -+/** -+ * CEC Transceiver operation. -+ */ -+enum { -+ CEC_TX_STOP, -+ CEC_TX_TRANSMIT, -+ CEC_TX_ABORT, -+ CEC_TX_ABORT_AND_TRANSMIT -+}; -+ -+/** -+ * CEC Transceiver status. -+ */ -+enum { -+ CEC_STS_IDLE, -+ CEC_STS_BUSY, -+ CEC_STS_SUCCESS, -+ CEC_STS_ERROR -+}; -+ -+/** -+ * CEC Receiver operation. -+ */ -+enum { -+ CEC_RX_STOP, -+ CEC_RX_READ, -+ CEC_RX_DISABLE, -+ CEC_RX_ABORT_AND_CLR_FIFO -+}; -+/** -+ * Maximum number of Messages in the RX Buffers. -+ */ -+#define CEC_MAX_RX_MSGS 2 -+ -+static u32 mhdp_cec_read(struct cdns_mhdp_cec *cec, u32 offset) -+{ -+ struct cdns_mhdp_device *mhdp = -+ container_of(cec, struct cdns_mhdp_device, hdmi.cec); -+ return cdns_mhdp_bus_read(mhdp, offset); -+} -+ -+static void mhdp_cec_write(struct cdns_mhdp_cec *cec, u32 offset, u32 val) -+{ -+ struct cdns_mhdp_device *mhdp = -+ container_of(cec, struct cdns_mhdp_device, hdmi.cec); -+ cdns_mhdp_bus_write(val, mhdp, offset); -+} -+ -+static void mhdp_cec_clear_rx_buffer(struct cdns_mhdp_cec *cec) -+{ -+ mhdp_cec_write(cec, RX_CLEAR_BUF, 1); -+ mhdp_cec_write(cec, RX_CLEAR_BUF, 0); -+} -+ -+static void mhdp_cec_set_divider(struct cdns_mhdp_cec *cec) -+{ -+ struct cdns_mhdp_device *mhdp = -+ container_of(cec, struct cdns_mhdp_device, hdmi.cec); -+ u32 clk_div; -+ -+ /* Set clock divider */ -+ clk_div = cdns_mhdp_get_fw_clk(mhdp) * 10; -+ -+ mhdp_cec_write(cec, CLK_DIV_MSB, -+ (clk_div >> 8) & 0xFF); -+ mhdp_cec_write(cec, CLK_DIV_LSB, clk_div & 0xFF); -+} -+ -+static u32 mhdp_cec_read_message(struct cdns_mhdp_cec *cec) -+{ -+ struct cec_msg *msg = &cec->msg; -+ int len; -+ int i; -+ -+ mhdp_cec_write(cec, RX_MSG_CMD, CEC_RX_READ); -+ -+ len = mhdp_cec_read(cec, RX_MSG_LENGTH); -+ msg->len = len + 1; -+ dev_dbg(cec->dev, "RX MSG len =%d\n", len); -+ -+ /* Read RX MSG bytes */ -+ for (i = 0; i < msg->len; ++i) { -+ msg->msg[i] = (u8) mhdp_cec_read(cec, RX_MSG_DATA1 + (i * REG_ADDR_OFF)); -+ dev_dbg(cec->dev, "RX MSG[%d]=0x%x\n", i, msg->msg[i]); -+ } -+ -+ mhdp_cec_write(cec, RX_MSG_CMD, CEC_RX_STOP); -+ -+ return true; -+} -+ -+static u32 mhdp_cec_write_message(struct cdns_mhdp_cec *cec, struct cec_msg *msg) -+{ -+ u8 i; -+ -+ mhdp_cec_write(cec, TX_MSG_CMD, CEC_TX_STOP); -+ -+ if (msg->len > CEC_MAX_MSG_SIZE) { -+ dev_err(cec->dev, "Invalid MSG size!\n"); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < msg->len; ++i) -+ printk("msg[%d]=0x%x\n",i, msg->msg[i]); -+ -+ /* Write Message to register */ -+ for (i = 0; i < msg->len; ++i) { -+ mhdp_cec_write(cec, TX_MSG_HEADER + (i * REG_ADDR_OFF), -+ msg->msg[i]); -+ } -+ /* Write Message Length (payload + opcode) */ -+ mhdp_cec_write(cec, TX_MSG_LENGTH, msg->len - 1); -+ -+ mhdp_cec_write(cec, TX_MSG_CMD, CEC_TX_TRANSMIT); -+ -+ return true; -+} -+ -+static int mhdp_cec_set_logical_addr(struct cdns_mhdp_cec *cec, u32 la) -+{ -+ u8 la_reg; -+ u8 i; -+ -+ if (la == CEC_LOG_ADDR_INVALID) -+ /* invalid all LA address */ -+ for (i = 0; i < CEC_MAX_LOG_ADDRS; ++i) { -+ mhdp_cec_write(cec, LOGICAL_ADDRESS_LA0 + (i * REG_ADDR_OFF), 0); -+ return 0; -+ } -+ -+ /* In fact cdns mhdp cec could support max 5 La address */ -+ for (i = 0; i < CEC_MAX_LOG_ADDRS; ++i) { -+ la_reg = mhdp_cec_read(cec, LOGICAL_ADDRESS_LA0 + (i * REG_ADDR_OFF)); -+ /* Check LA already used */ -+ if (la_reg & 0x10) -+ continue; -+ -+ if ((la_reg & 0xF) == la) { -+ dev_warn(cec->dev, "Warning. LA already in use.\n"); -+ return 0; -+ } -+ -+ la = (la & 0xF) | (1 << 4); -+ -+ mhdp_cec_write(cec, LOGICAL_ADDRESS_LA0 + (i * REG_ADDR_OFF), la); -+ return 0; -+ } -+ -+ dev_warn(cec->dev, "All LA in use\n"); -+ -+ return -ENXIO; -+} -+ -+static int mhdp_cec_poll_worker(void *_cec) -+{ -+ struct cdns_mhdp_cec *cec = (struct cdns_mhdp_cec *)_cec; -+ int num_rx_msgs, i; -+ int sts; -+ -+ set_freezable(); -+ -+ for (;;) { -+ if (kthread_freezable_should_stop(NULL)) -+ break; -+ -+ /* Check TX State */ -+ sts = mhdp_cec_read(cec, TX_MSG_STATUS); -+ switch (sts) { -+ case CEC_STS_SUCCESS: -+ cec_transmit_done(cec->adap, CEC_TX_STATUS_OK, 0, 0, 0, -+ 0); -+ mhdp_cec_write(cec, TX_MSG_CMD, CEC_TX_STOP); -+ break; -+ case CEC_STS_ERROR: -+ mhdp_cec_write(cec, TX_MSG_CMD, CEC_TX_STOP); -+ cec_transmit_done(cec->adap, -+ CEC_TX_STATUS_MAX_RETRIES | -+ CEC_TX_STATUS_NACK, 0, 1, 0, 0); -+ break; -+ case CEC_STS_BUSY: -+ default: -+ break; -+ } -+ -+ /* Check RX State */ -+ sts = mhdp_cec_read(cec, RX_MSG_STATUS); -+ num_rx_msgs = mhdp_cec_read(cec, NUM_OF_MSG_RX_BUF); -+ switch (sts) { -+ case CEC_STS_SUCCESS: -+ if (num_rx_msgs == 0xf) -+ num_rx_msgs = CEC_MAX_RX_MSGS; -+ -+ if (num_rx_msgs > CEC_MAX_RX_MSGS) { -+ dev_err(cec->dev, "Error rx msg num %d\n", -+ num_rx_msgs); -+ mhdp_cec_clear_rx_buffer(cec); -+ break; -+ } -+ -+ /* Rx FIFO Depth 2 RX MSG */ -+ for (i = 0; i < num_rx_msgs; i++) { -+ mhdp_cec_read_message(cec); -+ cec->msg.rx_status = CEC_RX_STATUS_OK; -+ cec_received_msg(cec->adap, &cec->msg); -+ } -+ break; -+ default: -+ break; -+ } -+ -+ if (!kthread_should_stop()) -+ schedule_timeout_idle(20); -+ } -+ -+ return 0; -+} -+ -+static int mhdp_cec_adap_enable(struct cec_adapter *adap, bool enable) -+{ -+ struct cdns_mhdp_cec *cec = cec_get_drvdata(adap); -+ -+ if (enable) { -+ mhdp_cec_write(cec, DB_L_TIMER, 0x10); -+ mhdp_cec_set_divider(cec); -+ } else -+ mhdp_cec_set_divider(cec); -+ -+ return 0; -+} -+ -+static int mhdp_cec_adap_log_addr(struct cec_adapter *adap, u8 addr) -+{ -+ struct cdns_mhdp_cec *cec = cec_get_drvdata(adap); -+ -+ return mhdp_cec_set_logical_addr(cec, addr); -+} -+ -+static int mhdp_cec_adap_transmit(struct cec_adapter *adap, u8 attempts, -+ u32 signal_free_time, struct cec_msg *msg) -+{ -+ struct cdns_mhdp_cec *cec = cec_get_drvdata(adap); -+ -+ mhdp_cec_write_message(cec, msg); -+ -+ return 0; -+} -+ -+static const struct cec_adap_ops cdns_mhdp_cec_adap_ops = { -+ .adap_enable = mhdp_cec_adap_enable, -+ .adap_log_addr = mhdp_cec_adap_log_addr, -+ .adap_transmit = mhdp_cec_adap_transmit, -+}; -+ -+int cdns_mhdp_register_cec_driver(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ struct cdns_mhdp_cec *cec = &mhdp->hdmi.cec; -+ int ret; -+ -+ cec->adap = cec_allocate_adapter(&cdns_mhdp_cec_adap_ops, cec, -+ CEC_NAME, -+ CEC_CAP_PHYS_ADDR | CEC_CAP_LOG_ADDRS | -+ CEC_CAP_TRANSMIT | CEC_CAP_PASSTHROUGH -+ | CEC_CAP_RC, CEC_MAX_LOG_ADDRS); -+ ret = PTR_ERR_OR_ZERO(cec->adap); -+ if (ret) -+ return ret; -+ ret = cec_register_adapter(cec->adap, dev); -+ if (ret) { -+ cec_delete_adapter(cec->adap); -+ return ret; -+ } -+ -+ cec->dev = dev; -+ -+ cec->cec_worker = kthread_create(mhdp_cec_poll_worker, cec, "cdns-mhdp-cec"); -+ if (IS_ERR(cec->cec_worker)) -+ dev_err(cec->dev, "failed create hdp cec thread\n"); -+ -+ wake_up_process(cec->cec_worker); -+ -+ dev_dbg(dev, "CEC successfuly probed\n"); -+ return 0; -+} -+ -+int cdns_mhdp_unregister_cec_driver(struct device *dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ struct cdns_mhdp_cec *cec = &mhdp->hdmi.cec; -+ -+ if (cec->cec_worker) { -+ kthread_stop(cec->cec_worker); -+ cec->cec_worker = NULL; -+ } -+ cec_unregister_adapter(cec->adap); -+ return 0; -+} -+ -+MODULE_AUTHOR("Sandor.Yu@NXP.com"); -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("NXP CDNS MHDP HDMI CEC driver"); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -new file mode 100644 -index 000000000000..91d1cfd4b2af ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -0,0 +1,795 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd -+ * Author: Chris Zhong -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#define CDNS_DP_SPDIF_CLK 200000000 -+#define FW_ALIVE_TIMEOUT_US 1000000 -+#define MAILBOX_RETRY_US 1000 -+#define MAILBOX_TIMEOUT_US 5000000 -+ -+#define mhdp_readx_poll_timeout(op, addr, offset, val, cond, sleep_us, timeout_us) \ -+({ \ -+ u64 __timeout_us = (timeout_us); \ -+ unsigned long __sleep_us = (sleep_us); \ -+ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ -+ might_sleep_if((__sleep_us) != 0); \ -+ for (;;) { \ -+ (val) = op(addr, offset); \ -+ if (cond) \ -+ break; \ -+ if (__timeout_us && \ -+ ktime_compare(ktime_get(), __timeout) > 0) { \ -+ (val) = op(addr, offset); \ -+ break; \ -+ } \ -+ if (__sleep_us) \ -+ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ -+ } \ -+ (cond) ? 0 : -ETIMEDOUT; \ -+}) -+ -+u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset) -+{ -+ u32 val; -+ -+ mutex_lock(&mhdp->iolock); -+ -+ if (mhdp->bus_type == BUS_TYPE_LOW4K_SAPB) { -+ /* Remap address to low 4K SAPB bus */ -+ writel(offset >> 12, mhdp->regs_sec + 0xc); -+ val = readl((offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K memory */ -+ writel(offset >> 12, mhdp->regs_sec + 8); -+ val = readl((offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_NORMAL_SAPB) -+ val = readl(mhdp->regs_sec + offset); -+ else -+ val = readl(mhdp->regs_base + offset); -+ -+ mutex_unlock(&mhdp->iolock); -+ -+ return val; -+} -+EXPORT_SYMBOL(cdns_mhdp_bus_read); -+ -+void cdns_mhdp_bus_write(u32 val, struct cdns_mhdp_device *mhdp, u32 offset) -+{ -+ mutex_lock(&mhdp->iolock); -+ -+ if (mhdp->bus_type == BUS_TYPE_LOW4K_SAPB) { -+ /* Remap address to low 4K SAPB bus */ -+ writel(offset >> 12, mhdp->regs_sec + 0xc); -+ writel(val, (offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K memory */ -+ writel(offset >> 12, mhdp->regs_sec + 8); -+ writel(val, (offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_NORMAL_SAPB) -+ writel(val, mhdp->regs_sec + offset); -+ else -+ writel(val, mhdp->regs_base + offset); -+ -+ mutex_unlock(&mhdp->iolock); -+} -+EXPORT_SYMBOL(cdns_mhdp_bus_write); -+ -+u32 cdns_mhdp_get_fw_clk(struct cdns_mhdp_device *mhdp) -+{ -+ return cdns_mhdp_bus_read(mhdp, SW_CLK_H); -+} -+EXPORT_SYMBOL(cdns_mhdp_get_fw_clk); -+ -+void cdns_mhdp_set_fw_clk(struct cdns_mhdp_device *mhdp, unsigned long clk) -+{ -+ cdns_mhdp_bus_write(clk / 1000000, mhdp, SW_CLK_H); -+} -+EXPORT_SYMBOL(cdns_mhdp_set_fw_clk); -+ -+void cdns_mhdp_clock_reset(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val; -+ -+ val = DPTX_FRMR_DATA_CLK_RSTN_EN | -+ DPTX_FRMR_DATA_CLK_EN | -+ DPTX_PHY_DATA_RSTN_EN | -+ DPTX_PHY_DATA_CLK_EN | -+ DPTX_PHY_CHAR_RSTN_EN | -+ DPTX_PHY_CHAR_CLK_EN | -+ SOURCE_AUX_SYS_CLK_RSTN_EN | -+ SOURCE_AUX_SYS_CLK_EN | -+ DPTX_SYS_CLK_RSTN_EN | -+ DPTX_SYS_CLK_EN | -+ CFG_DPTX_VIF_CLK_RSTN_EN | -+ CFG_DPTX_VIF_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_DPTX_CAR); -+ -+ val = SOURCE_PHY_RSTN_EN | SOURCE_PHY_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_PHY_CAR); -+ -+ val = SOURCE_PKT_SYS_RSTN_EN | -+ SOURCE_PKT_SYS_CLK_EN | -+ SOURCE_PKT_DATA_RSTN_EN | -+ SOURCE_PKT_DATA_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_PKT_CAR); -+ -+ val = SPDIF_CDR_CLK_RSTN_EN | -+ SPDIF_CDR_CLK_EN | -+ SOURCE_AIF_SYS_RSTN_EN | -+ SOURCE_AIF_SYS_CLK_EN | -+ SOURCE_AIF_CLK_RSTN_EN | -+ SOURCE_AIF_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_AIF_CAR); -+ -+ val = SOURCE_CIPHER_SYSTEM_CLK_RSTN_EN | -+ SOURCE_CIPHER_SYS_CLK_EN | -+ SOURCE_CIPHER_CHAR_CLK_RSTN_EN | -+ SOURCE_CIPHER_CHAR_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_CIPHER_CAR); -+ -+ val = SOURCE_CRYPTO_SYS_CLK_RSTN_EN | -+ SOURCE_CRYPTO_SYS_CLK_EN; -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_CRYPTO_CAR); -+ -+ /* enable Mailbox and PIF interrupt */ -+ cdns_mhdp_bus_write(0, mhdp, APB_INT_MASK); -+} -+EXPORT_SYMBOL(cdns_mhdp_clock_reset); -+ -+bool cdns_mhdp_check_alive(struct cdns_mhdp_device *mhdp) -+{ -+ u32 alive, newalive; -+ u8 retries_left = 50; -+ -+ alive = cdns_mhdp_bus_read(mhdp, KEEP_ALIVE); -+ -+ while (retries_left--) { -+ udelay(2); -+ -+ newalive = cdns_mhdp_bus_read(mhdp, KEEP_ALIVE); -+ if (alive == newalive) -+ continue; -+ return true; -+ } -+ return false; -+} -+EXPORT_SYMBOL(cdns_mhdp_check_alive); -+ -+static int mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) -+{ -+ int val, ret; -+ -+ ret = mhdp_readx_poll_timeout(cdns_mhdp_bus_read, mhdp, MAILBOX_EMPTY_ADDR, -+ val, !val, MAILBOX_RETRY_US, -+ MAILBOX_TIMEOUT_US); -+ if (ret < 0) -+ return ret; -+ -+ return cdns_mhdp_bus_read(mhdp, MAILBOX0_RD_DATA) & 0xff; -+} -+ -+static int mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val) -+{ -+ int ret, full; -+ -+ ret = mhdp_readx_poll_timeout(cdns_mhdp_bus_read, mhdp, MAILBOX_FULL_ADDR, -+ full, !full, MAILBOX_RETRY_US, -+ MAILBOX_TIMEOUT_US); -+ if (ret < 0) -+ return ret; -+ -+ cdns_mhdp_bus_write(val, mhdp, MAILBOX0_WR_DATA); -+ -+ return 0; -+} -+ -+int cdns_mhdp_mailbox_validate_receive(struct cdns_mhdp_device *mhdp, -+ u8 module_id, u8 opcode, -+ u16 req_size) -+{ -+ u32 mbox_size, i; -+ u8 header[4]; -+ int ret; -+ -+ /* read the header of the message */ -+ for (i = 0; i < 4; i++) { -+ ret = mhdp_mailbox_read(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ header[i] = ret; -+ } -+ -+ mbox_size = get_unaligned_be16(header + 2); -+ -+ if (opcode != header[0] || module_id != header[1] || -+ req_size != mbox_size) { -+ /* -+ * If the message in mailbox is not what we want, we need to -+ * clear the mailbox by reading its contents. -+ */ -+ for (i = 0; i < mbox_size; i++) -+ if (mhdp_mailbox_read(mhdp) < 0) -+ break; -+ -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(cdns_mhdp_mailbox_validate_receive); -+ -+int cdns_mhdp_mailbox_read_receive(struct cdns_mhdp_device *mhdp, -+ u8 *buff, u16 buff_size) -+{ -+ u32 i; -+ int ret; -+ -+ for (i = 0; i < buff_size; i++) { -+ ret = mhdp_mailbox_read(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ buff[i] = ret; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(cdns_mhdp_mailbox_read_receive); -+ -+int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id, -+ u8 opcode, u16 size, u8 *message) -+{ -+ u8 header[4]; -+ int ret, i; -+ -+ header[0] = opcode; -+ header[1] = module_id; -+ put_unaligned_be16(size, header + 2); -+ -+ for (i = 0; i < 4; i++) { -+ ret = mhdp_mailbox_write(mhdp, header[i]); -+ if (ret) -+ return ret; -+ } -+ -+ for (i = 0; i < size; i++) { -+ ret = mhdp_mailbox_write(mhdp, message[i]); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(cdns_mhdp_mailbox_send); -+ -+int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr) -+{ -+ u8 msg[4], resp[8]; -+ u32 val; -+ int ret; -+ -+ if (addr == 0) { -+ ret = -EINVAL; -+ goto err_reg_read; -+ } -+ -+ put_unaligned_be32(addr, msg); -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL, -+ GENERAL_READ_REGISTER, -+ sizeof(msg), msg); -+ if (ret) -+ goto err_reg_read; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_GENERAL, -+ GENERAL_READ_REGISTER, -+ sizeof(resp)); -+ if (ret) -+ goto err_reg_read; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, resp, sizeof(resp)); -+ if (ret) -+ goto err_reg_read; -+ -+ /* Returned address value should be the same as requested */ -+ if (memcmp(msg, resp, sizeof(msg))) { -+ ret = -EINVAL; -+ goto err_reg_read; -+ } -+ -+ val = get_unaligned_be32(resp + 4); -+ -+ return val; -+err_reg_read: -+ DRM_DEV_ERROR(mhdp->dev, "Failed to read register.\n"); -+ -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_reg_read); -+ -+int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u32 addr, u32 val) -+{ -+ u8 msg[8]; -+ -+ put_unaligned_be32(addr, msg); -+ put_unaligned_be32(val, msg + 4); -+ -+ return cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL, -+ GENERAL_WRITE_REGISTER, sizeof(msg), msg); -+} -+EXPORT_SYMBOL(cdns_mhdp_reg_write); -+ -+int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr, -+ u8 start_bit, u8 bits_no, u32 val) -+{ -+ u8 field[8]; -+ -+ put_unaligned_be16(addr, field); -+ field[2] = start_bit; -+ field[3] = bits_no; -+ put_unaligned_be32(val, field + 4); -+ -+ return cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_WRITE_FIELD, sizeof(field), field); -+} -+EXPORT_SYMBOL(cdns_mhdp_reg_write_bit); -+ -+int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp, const u32 *i_mem, -+ u32 i_size, const u32 *d_mem, u32 d_size) -+{ -+ u32 reg; -+ int i, ret; -+ -+ /* reset ucpu before load firmware*/ -+ cdns_mhdp_bus_write(APB_IRAM_PATH | APB_DRAM_PATH | APB_XT_RESET, -+ mhdp, APB_CTRL); -+ -+ for (i = 0; i < i_size; i += 4) -+ cdns_mhdp_bus_write(*i_mem++, mhdp, ADDR_IMEM + i); -+ -+ for (i = 0; i < d_size; i += 4) -+ cdns_mhdp_bus_write(*d_mem++, mhdp, ADDR_DMEM + i); -+ -+ /* un-reset ucpu */ -+ cdns_mhdp_bus_write(0, mhdp, APB_CTRL); -+ -+ /* check the keep alive register to make sure fw working */ -+ ret = mhdp_readx_poll_timeout(cdns_mhdp_bus_read, mhdp, KEEP_ALIVE, -+ reg, reg, 2000, FW_ALIVE_TIMEOUT_US); -+ if (ret < 0) { -+ DRM_DEV_ERROR(mhdp->dev, "failed to loaded the FW reg = %x\n", -+ reg); -+ return -EINVAL; -+ } -+ -+ reg = cdns_mhdp_bus_read(mhdp, VER_L) & 0xff; -+ mhdp->fw_version = reg; -+ reg = cdns_mhdp_bus_read(mhdp, VER_H) & 0xff; -+ mhdp->fw_version |= reg << 8; -+ reg = cdns_mhdp_bus_read(mhdp, VER_LIB_L_ADDR) & 0xff; -+ mhdp->fw_version |= reg << 16; -+ reg = cdns_mhdp_bus_read(mhdp, VER_LIB_H_ADDR) & 0xff; -+ mhdp->fw_version |= reg << 24; -+ -+ DRM_DEV_DEBUG(mhdp->dev, "firmware version: %x\n", mhdp->fw_version); -+ -+ return 0; -+} -+EXPORT_SYMBOL(cdns_mhdp_load_firmware); -+ -+int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable) -+{ -+ u8 msg[5]; -+ int ret, i; -+ -+ msg[0] = GENERAL_MAIN_CONTROL; -+ msg[1] = MB_MODULE_ID_GENERAL; -+ msg[2] = 0; -+ msg[3] = 1; -+ msg[4] = enable ? FW_ACTIVE : FW_STANDBY; -+ -+ for (i = 0; i < sizeof(msg); i++) { -+ ret = mhdp_mailbox_write(mhdp, msg[i]); -+ if (ret) -+ goto err_set_firmware_active; -+ } -+ -+ /* read the firmware state */ -+ for (i = 0; i < sizeof(msg); i++) { -+ ret = mhdp_mailbox_read(mhdp); -+ if (ret < 0) -+ goto err_set_firmware_active; -+ -+ msg[i] = ret; -+ } -+ -+ ret = 0; -+ -+err_set_firmware_active: -+ if (ret < 0) -+ DRM_DEV_ERROR(mhdp->dev, "set firmware active failed\n"); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_set_firmware_active); -+ -+int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp, bool flip) -+{ -+ u8 msg[8]; -+ int ret; -+ -+ msg[0] = drm_dp_link_rate_to_bw_code(mhdp->dp.rate); -+ msg[1] = mhdp->dp.num_lanes | SCRAMBLER_EN; -+ msg[2] = VOLTAGE_LEVEL_2; -+ msg[3] = PRE_EMPHASIS_LEVEL_3; -+ msg[4] = PTS1 | PTS2 | PTS3 | PTS4; -+ msg[5] = FAST_LT_NOT_SUPPORT; -+ msg[6] = flip ? LANE_MAPPING_FLIPPED : LANE_MAPPING_NORMAL; -+ msg[7] = ENHANCED; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_SET_HOST_CAPABILITIES, -+ sizeof(msg), msg); -+ if (ret) -+ goto err_set_host_cap; -+ -+/* TODO Sandor */ -+// ret = cdns_mhdp_reg_write(mhdp, DP_AUX_SWAP_INVERSION_CONTROL, -+// AUX_HOST_INVERT); -+ -+err_set_host_cap: -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "set host cap failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_set_host_cap); -+ -+int cdns_mhdp_event_config(struct cdns_mhdp_device *mhdp) -+{ -+ u8 msg[5]; -+ int ret; -+ -+ memset(msg, 0, sizeof(msg)); -+ -+ msg[0] = MHDP_EVENT_ENABLE_HPD | MHDP_EVENT_ENABLE_TRAINING; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_ENABLE_EVENT, sizeof(msg), msg); -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "set event config failed: %d\n", ret); -+ -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_event_config); -+ -+u32 cdns_mhdp_get_event(struct cdns_mhdp_device *mhdp) -+{ -+ return cdns_mhdp_bus_read(mhdp, SW_EVENTS0); -+} -+EXPORT_SYMBOL(cdns_mhdp_get_event); -+ -+int cdns_mhdp_read_hpd(struct cdns_mhdp_device *mhdp) -+{ -+ u8 status; -+ int ret; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL, GENERAL_GET_HPD_STATE, -+ 0, NULL); -+ if (ret) -+ goto err_get_hpd; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_GENERAL, -+ GENERAL_GET_HPD_STATE, sizeof(status)); -+ if (ret) -+ goto err_get_hpd; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, &status, sizeof(status)); -+ if (ret) -+ goto err_get_hpd; -+ -+ return status; -+ -+err_get_hpd: -+ DRM_ERROR("read hpd failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_read_hpd); -+ -+int cdns_mhdp_get_edid_block(void *data, u8 *edid, -+ unsigned int block, size_t length) -+{ -+ struct cdns_mhdp_device *mhdp = data; -+ u8 msg[2], reg[2], i; -+ int ret; -+ -+ for (i = 0; i < 4; i++) { -+ msg[0] = block / 2; -+ msg[1] = block % 2; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_GET_EDID, sizeof(msg), msg); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, -+ MB_MODULE_ID_DP_TX, -+ DPTX_GET_EDID, -+ sizeof(reg) + length); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, edid, length); -+ if (ret) -+ continue; -+ -+ if (reg[0] == length && reg[1] == block / 2) -+ break; -+ } -+ -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "get block[%d] edid failed: %d\n", -+ block, ret); -+ -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_get_edid_block); -+ -+int cdns_mhdp_set_video_status(struct cdns_mhdp_device *mhdp, int active) -+{ -+ u8 msg; -+ int ret; -+ -+ msg = !!active; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_SET_VIDEO, sizeof(msg), &msg); -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "set video status failed: %d\n", ret); -+ -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_set_video_status); -+ -+static int mhdp_get_msa_misc(struct video_info *video, -+ struct drm_display_mode *mode) -+{ -+ u32 msa_misc; -+ u8 val[2] = {0}; -+ -+ switch (video->color_fmt) { -+ case PXL_RGB: -+ case Y_ONLY: -+ val[0] = 0; -+ break; -+ /* set YUV default color space conversion to BT601 */ -+ case YCBCR_4_4_4: -+ val[0] = 6 + BT_601 * 8; -+ break; -+ case YCBCR_4_2_2: -+ val[0] = 5 + BT_601 * 8; -+ break; -+ case YCBCR_4_2_0: -+ val[0] = 5; -+ break; -+ } -+ -+ switch (video->color_depth) { -+ case 6: -+ val[1] = 0; -+ break; -+ case 8: -+ val[1] = 1; -+ break; -+ case 10: -+ val[1] = 2; -+ break; -+ case 12: -+ val[1] = 3; -+ break; -+ case 16: -+ val[1] = 4; -+ break; -+ } -+ -+ msa_misc = 2 * val[0] + 32 * val[1] + -+ ((video->color_fmt == Y_ONLY) ? (1 << 14) : 0); -+ -+ return msa_misc; -+} -+ -+int cdns_mhdp_config_video(struct cdns_mhdp_device *mhdp) -+{ -+ struct video_info *video = &mhdp->video_info; -+ struct drm_display_mode *mode = &mhdp->mode; -+ u64 symbol; -+ u32 val, link_rate, rem; -+ u8 bit_per_pix, tu_size_reg = TU_SIZE; -+ int ret; -+ -+ bit_per_pix = (video->color_fmt == YCBCR_4_2_2) ? -+ (video->color_depth * 2) : (video->color_depth * 3); -+ -+ link_rate = mhdp->dp.rate / 1000; -+ -+ ret = cdns_mhdp_reg_write(mhdp, BND_HSYNC2VSYNC, VIF_BYPASS_INTERLACE); -+ if (ret) -+ goto err_config_video; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HSYNC2VSYNC_POL_CTRL, 0); -+ if (ret) -+ goto err_config_video; -+ -+ /* -+ * get a best tu_size and valid symbol: -+ * 1. chose Lclk freq(162Mhz, 270Mhz, 540Mhz), set TU to 32 -+ * 2. calculate VS(valid symbol) = TU * Pclk * Bpp / (Lclk * Lanes) -+ * 3. if VS > *.85 or VS < *.1 or VS < 2 or TU < VS + 4, then set -+ * TU += 2 and repeat 2nd step. -+ */ -+ do { -+ tu_size_reg += 2; -+ symbol = tu_size_reg * mode->clock * bit_per_pix; -+ do_div(symbol, mhdp->dp.num_lanes * link_rate * 8); -+ rem = do_div(symbol, 1000); -+ if (tu_size_reg > 64) { -+ ret = -EINVAL; -+ DRM_DEV_ERROR(mhdp->dev, -+ "tu error, clk:%d, lanes:%d, rate:%d\n", -+ mode->clock, mhdp->dp.num_lanes, -+ link_rate); -+ goto err_config_video; -+ } -+ } while ((symbol <= 1) || (tu_size_reg - symbol < 4) || -+ (rem > 850) || (rem < 100)); -+ -+ val = symbol + (tu_size_reg << 8); -+ val |= TU_CNT_RST_EN; -+ ret = cdns_mhdp_reg_write(mhdp, DP_FRAMER_TU, val); -+ if (ret) -+ goto err_config_video; -+ -+ /* set the FIFO Buffer size */ -+ val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate; -+ val /= (mhdp->dp.num_lanes * link_rate); -+ val = div_u64(8 * (symbol + 1), bit_per_pix) - val; -+ val += 2; -+ ret = cdns_mhdp_reg_write(mhdp, DP_VC_TABLE(15), val); -+ -+ switch (video->color_depth) { -+ case 6: -+ val = BCS_6; -+ break; -+ case 8: -+ val = BCS_8; -+ break; -+ case 10: -+ val = BCS_10; -+ break; -+ case 12: -+ val = BCS_12; -+ break; -+ case 16: -+ val = BCS_16; -+ break; -+ } -+ -+ val += video->color_fmt << 8; -+ ret = cdns_mhdp_reg_write(mhdp, DP_FRAMER_PXL_REPR, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = video->h_sync_polarity ? DP_FRAMER_SP_HSP : 0; -+ val |= video->v_sync_polarity ? DP_FRAMER_SP_VSP : 0; -+ ret = cdns_mhdp_reg_write(mhdp, DP_FRAMER_SP, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = (mode->hsync_start - mode->hdisplay) << 16; -+ val |= mode->htotal - mode->hsync_end; -+ ret = cdns_mhdp_reg_write(mhdp, DP_FRONT_BACK_PORCH, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->hdisplay * bit_per_pix / 8; -+ ret = cdns_mhdp_reg_write(mhdp, DP_BYTE_COUNT, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->htotal | ((mode->htotal - mode->hsync_start) << 16); -+ ret = cdns_mhdp_reg_write(mhdp, MSA_HORIZONTAL_0, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->hsync_end - mode->hsync_start; -+ val |= (mode->hdisplay << 16) | (video->h_sync_polarity << 15); -+ ret = cdns_mhdp_reg_write(mhdp, MSA_HORIZONTAL_1, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->vtotal; -+ val |= (mode->vtotal - mode->vsync_start) << 16; -+ ret = cdns_mhdp_reg_write(mhdp, MSA_VERTICAL_0, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->vsync_end - mode->vsync_start; -+ val |= (mode->vdisplay << 16) | (video->v_sync_polarity << 15); -+ ret = cdns_mhdp_reg_write(mhdp, MSA_VERTICAL_1, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mhdp_get_msa_misc(video, mode); -+ ret = cdns_mhdp_reg_write(mhdp, MSA_MISC, val); -+ if (ret) -+ goto err_config_video; -+ -+ ret = cdns_mhdp_reg_write(mhdp, STREAM_CONFIG, 1); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->hsync_end - mode->hsync_start; -+ val |= mode->hdisplay << 16; -+ ret = cdns_mhdp_reg_write(mhdp, DP_HORIZONTAL, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->vdisplay; -+ val |= (mode->vtotal - mode->vsync_start) << 16; -+ ret = cdns_mhdp_reg_write(mhdp, DP_VERTICAL_0, val); -+ if (ret) -+ goto err_config_video; -+ -+ val = mode->vtotal; -+ ret = cdns_mhdp_reg_write(mhdp, DP_VERTICAL_1, val); -+ if (ret) -+ goto err_config_video; -+ -+ ret = cdns_mhdp_reg_write_bit(mhdp, DP_VB_ID, 2, 1, 0); -+ -+err_config_video: -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "config video failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_config_video); -+ -+int cdns_phy_reg_write(struct cdns_mhdp_device *mhdp, u32 addr, u32 val) -+{ -+ return cdns_mhdp_reg_write(mhdp, ADDR_PHY_AFE + (addr << 2), val); -+} -+EXPORT_SYMBOL(cdns_phy_reg_write); -+ -+u32 cdns_phy_reg_read(struct cdns_mhdp_device *mhdp, u32 addr) -+{ -+ return cdns_mhdp_reg_read(mhdp, ADDR_PHY_AFE + (addr << 2)); -+} -+EXPORT_SYMBOL(cdns_phy_reg_read); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c -new file mode 100644 -index 000000000000..f025c39d12ea ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c -@@ -0,0 +1,172 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+ -+#include -+#include -+#include -+#include -+ -+#define LINK_TRAINING_TIMEOUT_MS 500 -+#define LINK_TRAINING_RETRY_MS 20 -+ -+int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp, -+ u32 addr, u8 *data, u16 len) -+{ -+ u8 msg[5], reg[5]; -+ int ret; -+ -+ put_unaligned_be16(len, msg); -+ put_unaligned_be24(addr, msg + 2); -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_READ_DPCD, sizeof(msg), msg); -+ if (ret) -+ goto err_dpcd_read; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_READ_DPCD, -+ sizeof(reg) + len); -+ if (ret) -+ goto err_dpcd_read; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ goto err_dpcd_read; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, data, len); -+ -+err_dpcd_read: -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_dpcd_read); -+ -+int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value) -+{ -+ u8 msg[6], reg[5]; -+ int ret; -+ -+ put_unaligned_be16(1, msg); -+ put_unaligned_be24(addr, msg + 2); -+ msg[5] = value; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_WRITE_DPCD, sizeof(msg), msg); -+ if (ret) -+ goto err_dpcd_write; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_WRITE_DPCD, sizeof(reg)); -+ if (ret) -+ goto err_dpcd_write; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ goto err_dpcd_write; -+ -+ if (addr != get_unaligned_be24(reg + 2)) -+ ret = -EINVAL; -+ -+err_dpcd_write: -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "dpcd write failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_dpcd_write); -+ -+static int cdns_mhdp_training_start(struct cdns_mhdp_device *mhdp) -+{ -+ unsigned long timeout; -+ u8 msg, event[2]; -+ int ret; -+ -+ msg = LINK_TRAINING_RUN; -+ -+ /* start training */ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_TRAINING_CONTROL, sizeof(msg), &msg); -+ if (ret) -+ goto err_training_start; -+ -+ timeout = jiffies + msecs_to_jiffies(LINK_TRAINING_TIMEOUT_MS); -+ while (time_before(jiffies, timeout)) { -+ msleep(LINK_TRAINING_RETRY_MS); -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_READ_EVENT, 0, NULL); -+ if (ret) -+ goto err_training_start; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, -+ MB_MODULE_ID_DP_TX, -+ DPTX_READ_EVENT, -+ sizeof(event)); -+ if (ret) -+ goto err_training_start; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, event, -+ sizeof(event)); -+ if (ret) -+ goto err_training_start; -+ -+ if (event[1] & EQ_PHASE_FINISHED) -+ return 0; -+ } -+ -+ ret = -ETIMEDOUT; -+ -+err_training_start: -+ DRM_DEV_ERROR(mhdp->dev, "training failed: %d\n", ret); -+ return ret; -+} -+ -+static int cdns_mhdp_get_training_status(struct cdns_mhdp_device *mhdp) -+{ -+ u8 status[10]; -+ int ret; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_READ_LINK_STAT, 0, NULL); -+ if (ret) -+ goto err_get_training_status; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_DP_TX, -+ DPTX_READ_LINK_STAT, -+ sizeof(status)); -+ if (ret) -+ goto err_get_training_status; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, status, sizeof(status)); -+ if (ret) -+ goto err_get_training_status; -+ -+ mhdp->dp.rate = drm_dp_bw_code_to_link_rate(status[0]); -+ mhdp->dp.num_lanes = status[1]; -+ -+err_get_training_status: -+ if (ret) -+ DRM_DEV_ERROR(mhdp->dev, "get training status failed: %d\n", -+ ret); -+ return ret; -+} -+ -+int cdns_mhdp_train_link(struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ ret = cdns_mhdp_training_start(mhdp); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to start training %d\n", -+ ret); -+ return ret; -+ } -+ -+ ret = cdns_mhdp_get_training_status(mhdp); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to get training stat %d\n", -+ ret); -+ return ret; -+ } -+ -+ DRM_DEV_DEBUG_KMS(mhdp->dev, "rate:0x%x, lanes:%d\n", mhdp->dp.rate, -+ mhdp->dp.num_lanes); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_train_link); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c -new file mode 100644 -index 000000000000..c37a7ac6af9b ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c -@@ -0,0 +1,332 @@ -+/* -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+void cdns_mhdp_infoframe_set(struct cdns_mhdp_device *mhdp, -+ u8 entry_id, u8 packet_len, u8 *packet, u8 packet_type) -+{ -+ u32 *packet32, len32; -+ u32 val, i; -+ -+ /* invalidate entry */ -+ val = F_ACTIVE_IDLE_TYPE(1) | F_PKT_ALLOC_ADDRESS(entry_id); -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_PIF_PKT_ALLOC_REG); -+ cdns_mhdp_bus_write(F_PKT_ALLOC_WR_EN(1), mhdp, SOURCE_PIF_PKT_ALLOC_WR_EN); -+ -+ /* flush fifo 1 */ -+ cdns_mhdp_bus_write(F_FIFO1_FLUSH(1), mhdp, SOURCE_PIF_FIFO1_FLUSH); -+ -+ /* write packet into memory */ -+ packet32 = (u32 *)packet; -+ len32 = packet_len / 4; -+ for (i = 0; i < len32; i++) -+ cdns_mhdp_bus_write(F_DATA_WR(packet32[i]), mhdp, SOURCE_PIF_DATA_WR); -+ -+ /* write entry id */ -+ cdns_mhdp_bus_write(F_WR_ADDR(entry_id), mhdp, SOURCE_PIF_WR_ADDR); -+ -+ /* write request */ -+ cdns_mhdp_bus_write(F_HOST_WR(1), mhdp, SOURCE_PIF_WR_REQ); -+ -+ /* update entry */ -+ val = F_ACTIVE_IDLE_TYPE(1) | F_TYPE_VALID(1) | -+ F_PACKET_TYPE(packet_type) | F_PKT_ALLOC_ADDRESS(entry_id); -+ cdns_mhdp_bus_write(val, mhdp, SOURCE_PIF_PKT_ALLOC_REG); -+ -+ cdns_mhdp_bus_write(F_PKT_ALLOC_WR_EN(1), mhdp, SOURCE_PIF_PKT_ALLOC_WR_EN); -+} -+ -+int cdns_hdmi_get_edid_block(void *data, u8 *edid, -+ u32 block, size_t length) -+{ -+ struct cdns_mhdp_device *mhdp = data; -+ u8 msg[2], reg[5], i; -+ int ret; -+ -+ for (i = 0; i < 4; i++) { -+ msg[0] = block / 2; -+ msg[1] = block % 2; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_HDMI_TX, HDMI_TX_EDID, -+ sizeof(msg), msg); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDMI_TX, -+ HDMI_TX_EDID, sizeof(reg) + length); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ continue; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, edid, length); -+ if (ret) -+ continue; -+ -+ if ((reg[3] << 8 | reg[4]) == length) -+ break; -+ } -+ -+ if (ret) -+ DRM_ERROR("get block[%d] edid failed: %d\n", block, ret); -+ return ret; -+} -+ -+int cdns_hdmi_scdc_read(struct cdns_mhdp_device *mhdp, u8 addr, u8 *data) -+{ -+ u8 msg[4], reg[6]; -+ int ret; -+ -+ msg[0] = 0x54; -+ msg[1] = addr; -+ msg[2] = 0; -+ msg[3] = 1; -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_HDMI_TX, HDMI_TX_READ, -+ sizeof(msg), msg); -+ if (ret) -+ goto err_scdc_read; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDMI_TX, -+ HDMI_TX_READ, sizeof(reg)); -+ if (ret) -+ goto err_scdc_read; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ goto err_scdc_read; -+ -+ *data = reg[5]; -+ -+err_scdc_read: -+ if (ret) -+ DRM_ERROR("scdc read failed: %d\n", ret); -+ return ret; -+} -+ -+int cdns_hdmi_scdc_write(struct cdns_mhdp_device *mhdp, u8 addr, u8 value) -+{ -+ u8 msg[5], reg[5]; -+ int ret; -+ -+ msg[0] = 0x54; -+ msg[1] = addr; -+ msg[2] = 0; -+ msg[3] = 1; -+ msg[4] = value; -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_HDMI_TX, HDMI_TX_WRITE, -+ sizeof(msg), msg); -+ if (ret) -+ goto err_scdc_write; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDMI_TX, -+ HDMI_TX_WRITE, sizeof(reg)); -+ if (ret) -+ goto err_scdc_write; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, reg, sizeof(reg)); -+ if (ret) -+ goto err_scdc_write; -+ -+ if (reg[0] != 0) -+ ret = -EINVAL; -+ -+err_scdc_write: -+ if (ret) -+ DRM_ERROR("scdc write failed: %d\n", ret); -+ return ret; -+} -+ -+int cdns_hdmi_ctrl_init(struct cdns_mhdp_device *mhdp, -+ int protocol, -+ u32 char_rate) -+{ -+ u32 reg0; -+ u32 reg1; -+ u32 val; -+ int ret; -+ -+ /* Set PHY to HDMI data */ -+ ret = cdns_mhdp_reg_write(mhdp, PHY_DATA_SEL, F_SOURCE_PHY_MHDP_SEL(1)); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_HPD, -+ F_HPD_VALID_WIDTH(4) | F_HPD_GLITCH_WIDTH(0)); -+ if (ret < 0) -+ return ret; -+ -+ /* open CARS */ -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_PHY_CAR, 0xF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_HDTX_CAR, 0xFF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_PKT_CAR, 0xF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_AIF_CAR, 0xF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_CIPHER_CAR, 0xF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_CRYPTO_CAR, 0xF); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, SOURCE_CEC_CAR, 3); -+ if (ret < 0) -+ return ret; -+ -+ reg0 = reg1 = 0x7c1f; -+ if (protocol == MODE_HDMI_2_0 && char_rate >= 340000) { -+ reg0 = 0; -+ reg1 = 0xFFFFF; -+ } -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CLOCK_REG_0, reg0); -+ if (ret < 0) -+ return ret; -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CLOCK_REG_1, reg1); -+ if (ret < 0) -+ return ret; -+ -+ /* set hdmi mode and preemble mode data enable */ -+ val = F_HDMI_MODE(protocol) | F_HDMI2_PREAMBLE_EN(1) | F_DATA_EN(1) | -+ F_HDMI2_CTRL_IL_MODE(1) | F_BCH_EN(1) | F_PIC_3D(0XF); -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+ -+ return ret; -+} -+ -+int cdns_hdmi_mode_config(struct cdns_mhdp_device *mhdp, -+ struct drm_display_mode *mode, -+ struct video_info *video_info) -+{ -+ int ret; -+ u32 val; -+ u32 vsync_lines = mode->vsync_end - mode->vsync_start; -+ u32 eof_lines = mode->vsync_start - mode->vdisplay; -+ u32 sof_lines = mode->vtotal - mode->vsync_end; -+ u32 hblank = mode->htotal - mode->hdisplay; -+ u32 hactive = mode->hdisplay; -+ u32 vblank = mode->vtotal - mode->vdisplay; -+ u32 vactive = mode->vdisplay; -+ u32 hfront = mode->hsync_start - mode->hdisplay; -+ u32 hback = mode->htotal - mode->hsync_end; -+ u32 vfront = eof_lines; -+ u32 hsync = hblank - hfront - hback; -+ u32 vsync = vsync_lines; -+ u32 vback = sof_lines; -+ u32 v_h_polarity = ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1) + -+ ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : 2); -+ -+ ret = cdns_mhdp_reg_write(mhdp, SCHEDULER_H_SIZE, (hactive << 16) + hblank); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, SCHEDULER_V_SIZE, (vactive << 16) + vblank); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_SIGNAL_FRONT_WIDTH, (vfront << 16) + hfront); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_SIGNAL_SYNC_WIDTH, (vsync << 16) + hsync); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_SIGNAL_BACK_WIDTH, (vback << 16) + hback); -+ if (ret < 0) -+ return ret; -+ -+ ret = cdns_mhdp_reg_write(mhdp, HSYNC2VSYNC_POL_CTRL, v_h_polarity); -+ if (ret < 0) -+ return ret; -+ -+ /* Reset Data Enable */ -+ val = cdns_mhdp_reg_read(mhdp, HDTX_CONTROLLER); -+ val &= ~F_DATA_EN(1); -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+ if (ret < 0) -+ return ret; -+ -+ /* Set bpc */ -+ val &= ~F_VIF_DATA_WIDTH(3); -+ switch (video_info->color_depth) { -+ case 10: -+ val |= F_VIF_DATA_WIDTH(1); -+ break; -+ case 12: -+ val |= F_VIF_DATA_WIDTH(2); -+ break; -+ case 16: -+ val |= F_VIF_DATA_WIDTH(3); -+ break; -+ case 8: -+ default: -+ val |= F_VIF_DATA_WIDTH(0); -+ break; -+ } -+ -+ /* select color encoding */ -+ val &= ~F_HDMI_ENCODING(3); -+ switch (video_info->color_fmt) { -+ case YCBCR_4_4_4: -+ val |= F_HDMI_ENCODING(2); -+ break; -+ case YCBCR_4_2_2: -+ val |= F_HDMI_ENCODING(1); -+ break; -+ case YCBCR_4_2_0: -+ val |= F_HDMI_ENCODING(3); -+ break; -+ case PXL_RGB: -+ default: -+ val |= F_HDMI_ENCODING(0); -+ break; -+ } -+ -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+ if (ret < 0) -+ return ret; -+ -+ /* set data enable */ -+ val |= F_DATA_EN(1); -+ ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+ -+ return ret; -+} -+ -+int cdns_hdmi_disable_gcp(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val; -+ -+ val = cdns_mhdp_reg_read(mhdp, HDTX_CONTROLLER); -+ val &= ~F_GCP_EN(1); -+ -+ return cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+} -+ -+int cdns_hdmi_enable_gcp(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val; -+ -+ val = cdns_mhdp_reg_read(mhdp, HDTX_CONTROLLER); -+ val |= F_GCP_EN(1); -+ -+ return cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); -+} -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h -new file mode 100644 -index 000000000000..399c3f6f86ad ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h -@@ -0,0 +1,209 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Cadence MHDP DP MST bridge driver. -+ * -+ * Copyright: 2018 Cadence Design Systems, Inc. -+ * -+ * Author: Quentin Schulz -+ */ -+ -+ -+#ifndef CDNS_MHDP_H -+#define CDNS_MHDP_H -+ -+#include -+ -+#define CDNS_APB_CFG 0x00000 -+#define CDNS_APB_CTRL (CDNS_APB_CFG + 0x00) -+#define CDNS_MAILBOX_FULL (CDNS_APB_CFG + 0x08) -+#define CDNS_MAILBOX_EMPTY (CDNS_APB_CFG + 0x0c) -+#define CDNS_MAILBOX_TX_DATA (CDNS_APB_CFG + 0x10) -+#define CDNS_MAILBOX_RX_DATA (CDNS_APB_CFG + 0x14) -+#define CDNS_KEEP_ALIVE (CDNS_APB_CFG + 0x18) -+#define CDNS_KEEP_ALIVE_MASK GENMASK(7, 0) -+ -+#define CDNS_MB_INT_MASK (CDNS_APB_CFG + 0x34) -+ -+#define CDNS_SW_CLK_L (CDNS_APB_CFG + 0x3c) -+#define CDNS_SW_CLK_H (CDNS_APB_CFG + 0x40) -+#define CDNS_SW_EVENT0 (CDNS_APB_CFG + 0x44) -+#define CDNS_DPTX_HPD BIT(0) -+ -+#define CDNS_SW_EVENT1 (CDNS_APB_CFG + 0x48) -+#define CDNS_SW_EVENT2 (CDNS_APB_CFG + 0x4c) -+#define CDNS_SW_EVENT3 (CDNS_APB_CFG + 0x50) -+ -+#define CDNS_APB_INT_MASK (CDNS_APB_CFG + 0x6C) -+#define CDNS_APB_INT_MASK_MAILBOX_INT BIT(0) -+#define CDNS_APB_INT_MASK_SW_EVENT_INT BIT(1) -+ -+#define CDNS_DPTX_CAR (CDNS_APB_CFG + 0x904) -+#define CDNS_VIF_CLK_EN BIT(0) -+#define CDNS_VIF_CLK_RSTN BIT(1) -+ -+#define CDNS_SOURCE_VIDEO_IF(s) (0x00b00 + (s * 0x20)) -+#define CDNS_BND_HSYNC2VSYNC(s) (CDNS_SOURCE_VIDEO_IF(s) + \ -+ 0x00) -+#define CDNS_IP_DTCT_WIN GENMASK(11, 0) -+#define CDNS_IP_DET_INTERLACE_FORMAT BIT(12) -+#define CDNS_IP_BYPASS_V_INTERFACE BIT(13) -+ -+#define CDNS_HSYNC2VSYNC_POL_CTRL(s) (CDNS_SOURCE_VIDEO_IF(s) + \ -+ 0x10) -+#define CDNS_H2V_HSYNC_POL_ACTIVE_LOW BIT(1) -+#define CDNS_H2V_VSYNC_POL_ACTIVE_LOW BIT(2) -+ -+#define CDNS_DPTX_PHY_CONFIG 0x02000 -+#define CDNS_PHY_TRAINING_EN BIT(0) -+#define CDNS_PHY_TRAINING_TYPE(x) (((x) & GENMASK(3, 0)) << 1) -+#define CDNS_PHY_SCRAMBLER_BYPASS BIT(5) -+#define CDNS_PHY_ENCODER_BYPASS BIT(6) -+#define CDNS_PHY_SKEW_BYPASS BIT(7) -+#define CDNS_PHY_TRAINING_AUTO BIT(8) -+#define CDNS_PHY_LANE0_SKEW(x) (((x) & GENMASK(2, 0)) << 9) -+#define CDNS_PHY_LANE1_SKEW(x) (((x) & GENMASK(2, 0)) << 12) -+#define CDNS_PHY_LANE2_SKEW(x) (((x) & GENMASK(2, 0)) << 15) -+#define CDNS_PHY_LANE3_SKEW(x) (((x) & GENMASK(2, 0)) << 18) -+#define CDNS_PHY_COMMON_CONFIG (CDNS_PHY_LANE1_SKEW(1) | \ -+ CDNS_PHY_LANE2_SKEW(2) | \ -+ CDNS_PHY_LANE3_SKEW(3)) -+#define CDNS_PHY_10BIT_EN BIT(21) -+ -+#define CDNS_DPTX_FRAMER 0x02200 -+#define CDNS_DP_FRAMER_GLOBAL_CONFIG (CDNS_DPTX_FRAMER + 0x00) -+#define CDNS_DP_NUM_LANES(x) (x - 1) -+#define CDNS_DP_MST_EN BIT(2) -+#define CDNS_DP_FRAMER_EN BIT(3) -+#define CDNS_DP_RATE_GOVERNOR_EN BIT(4) -+#define CDNS_DP_NO_VIDEO_MODE BIT(5) -+#define CDNS_DP_DISABLE_PHY_RST BIT(6) -+#define CDNS_DP_WR_FAILING_EDGE_VSYNC BIT(7) -+ -+#define CDNS_DP_SW_RESET (CDNS_DPTX_FRAMER + 0x04) -+#define CDNS_DP_FRAMER_TU (CDNS_DPTX_FRAMER + 0x08) -+#define CDNS_DP_FRAMER_TU_SIZE(x) (((x) & GENMASK(6, 0)) << 8) -+#define CDNS_DP_FRAMER_TU_VS(x) ((x) & GENMASK(5, 0)) -+#define CDNS_DP_FRAMER_TU_CNT_RST_EN BIT(15) -+ -+#define CDNS_DPTX_STREAM(s) (0x03000 + s * 0x80) -+#define CDNS_DP_MSA_HORIZONTAL_0(s) (CDNS_DPTX_STREAM(s) + 0x00) -+#define CDNS_DP_MSAH0_H_TOTAL(x) (x) -+#define CDNS_DP_MSAH0_HSYNC_START(x) ((x) << 16) -+ -+#define CDNS_DP_MSA_HORIZONTAL_1(s) (CDNS_DPTX_STREAM(s) + 0x04) -+#define CDNS_DP_MSAH1_HSYNC_WIDTH(x) (x) -+#define CDNS_DP_MSAH1_HSYNC_POL_LOW BIT(15) -+#define CDNS_DP_MSAH1_HDISP_WIDTH(x) ((x) << 16) -+ -+#define CDNS_DP_MSA_VERTICAL_0(s) (CDNS_DPTX_STREAM(s) + 0x08) -+#define CDNS_DP_MSAV0_V_TOTAL(x) (x) -+#define CDNS_DP_MSAV0_VSYNC_START(x) ((x) << 16) -+ -+#define CDNS_DP_MSA_VERTICAL_1(s) (CDNS_DPTX_STREAM(s) + 0x0c) -+#define CDNS_DP_MSAV1_VSYNC_WIDTH(x) (x) -+#define CDNS_DP_MSAV1_VSYNC_POL_LOW BIT(15) -+#define CDNS_DP_MSAV1_VDISP_WIDTH(x) ((x) << 16) -+ -+#define CDNS_DP_MSA_MISC(s) (CDNS_DPTX_STREAM(s) + 0x10) -+#define CDNS_DP_STREAM_CONFIGs(s) (CDNS_DPTX_STREAM(s) + 0x14) -+#define CDNS_DP_STREAM_CONFIG_2(s) (CDNS_DPTX_STREAM(s) + 0x2c) -+#define CDNS_DP_SC2_TU_VS_DIFF(x) ((x) << 8) -+ -+#define CDNS_DP_HORIZONTAL(s) (CDNS_DPTX_STREAM(s) + 0x30) -+#define CDNS_DP_H_HSYNC_WIDTH(x) (x) -+#define CDNS_DP_H_H_TOTAL(x) ((x) << 16) -+ -+#define CDNS_DP_VERTICAL_0(s) (CDNS_DPTX_STREAM(s) + 0x34) -+#define CDNS_DP_V0_VHEIGHT(x) (x) -+#define CDNS_DP_V0_VSTART(x) ((x) << 16) -+ -+#define CDNS_DP_VERTICAL_1(s) (CDNS_DPTX_STREAM(s) + 0x38) -+#define CDNS_DP_V1_VTOTAL(x) (x) -+#define CDNS_DP_V1_VTOTAL_EVEN BIT(16) -+ -+#define CDNS_DP_FRAMER_PXL_REPR(s) (CDNS_DPTX_STREAM(s) + 0x4c) -+#define CDNS_DP_FRAMER_6_BPC BIT(0) -+#define CDNS_DP_FRAMER_8_BPC BIT(1) -+#define CDNS_DP_FRAMER_10_BPC BIT(2) -+#define CDNS_DP_FRAMER_12_BPC BIT(3) -+#define CDNS_DP_FRAMER_16_BPC BIT(4) -+#define CDNS_DP_FRAMER_PXL_FORMAT 0x8 -+#define CDNS_DP_FRAMER_RGB BIT(0) -+#define CDNS_DP_FRAMER_YCBCR444 BIT(1) -+#define CDNS_DP_FRAMER_YCBCR422 BIT(2) -+#define CDNS_DP_FRAMER_YCBCR420 BIT(3) -+#define CDNS_DP_FRAMER_Y_ONLY BIT(4) -+ -+#define CDNS_DP_FRAMER_SP(s) (CDNS_DPTX_STREAM(s) + 0x10) -+#define CDNS_DP_FRAMER_VSYNC_POL_LOW BIT(0) -+#define CDNS_DP_FRAMER_HSYNC_POL_LOW BIT(1) -+#define CDNS_DP_FRAMER_INTERLACE BIT(2) -+ -+#define CDNS_DP_LINE_THRESH(s) (CDNS_DPTX_STREAM(s) + 0x64) -+#define CDNS_DP_ACTIVE_LINE_THRESH(x) (x) -+ -+#define CDNS_DP_VB_ID(s) (CDNS_DPTX_STREAM(s) + 0x68) -+#define CDNS_DP_VB_ID_INTERLACED BIT(2) -+#define CDNS_DP_VB_ID_COMPRESSED BIT(6) -+ -+#define CDNS_DP_FRONT_BACK_PORCH(s) (CDNS_DPTX_STREAM(s) + 0x78) -+#define CDNS_DP_BACK_PORCH(x) (x) -+#define CDNS_DP_FRONT_PORCH(x) ((x) << 16) -+ -+#define CDNS_DP_BYTE_COUNT(s) (CDNS_DPTX_STREAM(s) + 0x7c) -+#define CDNS_DP_BYTE_COUNT_BYTES_IN_CHUNK_SHIFT 16 -+ -+#define CDNS_DP_MST_STREAM_CONFIG(s) (CDNS_DPTX_STREAM(s) + 0x14) -+#define CDNS_DP_MST_STRM_CFG_STREAM_EN BIT(0) -+#define CDNS_DP_MST_STRM_CFG_NO_VIDEO BIT(1) -+ -+#define CDNS_DP_MST_SLOT_ALLOCATE(s) (CDNS_DPTX_STREAM(s) + 0x44) -+#define CDNS_DP_S_ALLOC_START_SLOT(x) (x) -+#define CDNS_DP_S_ALLOC_END_SLOT(x) ((x) << 8) -+ -+#define CDNS_DP_RATE_GOVERNING(s) (CDNS_DPTX_STREAM(s) + 0x48) -+#define CDNS_DP_RG_TARG_AV_SLOTS_Y(x) (x) -+#define CDNS_DP_RG_TARG_AV_SLOTS_X(x) (x << 4) -+#define CDNS_DP_RG_ENABLE BIT(10) -+ -+#define CDNS_DP_MTPH_CONTROL 0x2264 -+#define CDNS_DP_MTPH_ECF_EN BIT(0) -+#define CDNS_DP_MTPH_ACT_EN BIT(1) -+#define CDNS_DP_MTPH_LVP_EN BIT(2) -+ -+#define CDNS_DP_MTPH_STATUS 0x226C -+#define CDNS_DP_MTPH_ACT_STATUS BIT(0) -+ -+ -+#define CDNS_DPTX_GLOBAL 0x02300 -+#define CDNS_DP_LANE_EN (CDNS_DPTX_GLOBAL + 0x00) -+#define CDNS_DP_LANE_EN_LANES(x) GENMASK(x - 1, 0) -+#define CDNS_DP_ENHNCD (CDNS_DPTX_GLOBAL + 0x04) -+ -+ -+#define to_mhdp_connector(x) container_of(x, struct cdns_mhdp_connector, base) -+#define to_mhdp_bridge(x) container_of(x, struct cdns_mhdp_bridge, base) -+#define mgr_to_mhdp(x) container_of(x, struct cdns_mhdp_device, mst_mgr) -+ -+#define CDNS_MHDP_MAX_STREAMS 4 -+ -+enum pixel_format { -+ PIXEL_FORMAT_RGB = 1, -+ PIXEL_FORMAT_YCBCR_444 = 2, -+ PIXEL_FORMAT_YCBCR_422 = 4, -+ PIXEL_FORMAT_YCBCR_420 = 8, -+ PIXEL_FORMAT_Y_ONLY = 16, -+}; -+ -+ -+int cdns_mhdp_mst_init(struct cdns_mhdp_device *mhdp); -+void cdns_mhdp_mst_deinit(struct cdns_mhdp_device *mhdp); -+bool cdns_mhdp_mst_probe(struct cdns_mhdp_device *mhdp); -+enum pixel_format cdns_mhdp_get_pxlfmt(u32 color_formats); -+u32 cdns_mhdp_get_bpp(u32 bpc, u32 color_formats); -+void cdns_mhdp_configure_video(struct drm_bridge *bridge); -+void cdns_mhdp_mst_enable(struct drm_bridge *bridge); -+void cdns_mhdp_mst_disable(struct drm_bridge *bridge); -+void cdns_mhdp_enable(struct drm_bridge *bridge); -+ -+#endif -diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile -index 17a9e7eb2130..bd013659404f 100644 ---- a/drivers/gpu/drm/rockchip/Makefile -+++ b/drivers/gpu/drm/rockchip/Makefile -@@ -8,7 +8,7 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \ - rockchipdrm-$(CONFIG_ROCKCHIP_VOP2) += rockchip_drm_vop2.o rockchip_vop2_reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_VOP) += rockchip_drm_vop.o rockchip_vop_reg.o - rockchipdrm-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o --rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o cdn-dp-reg.o -+rockchipdrm-$(CONFIG_ROCKCHIP_CDN_DP) += cdn-dp-core.o - rockchipdrm-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o - rockchipdrm-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi-rockchip.o - rockchipdrm-$(CONFIG_ROCKCHIP_INNO_HDMI) += inno_hdmi.o -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c -index a4a45daf93f2..058bc372f02b 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.c -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c -@@ -23,11 +23,10 @@ - #include - - #include "cdn-dp-core.h" --#include "cdn-dp-reg.h" - #include "rockchip_drm_vop.h" - - static inline struct cdn_dp_device *connector_to_dp(struct drm_connector *connector) - { -- return container_of(connector, struct cdn_dp_device, connector); -+ return container_of(connector, struct cdn_dp_device, mhdp.connector.base); - } - -@@ -62,17 +61,18 @@ MODULE_DEVICE_TABLE(of, cdn_dp_dt_ids); - static int cdn_dp_grf_write(struct cdn_dp_device *dp, - unsigned int reg, unsigned int val) - { -+ struct device *dev = dp->mhdp.dev; - int ret; - - ret = clk_prepare_enable(dp->grf_clk); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to prepare_enable grf clock\n"); -+ DRM_DEV_ERROR(dev, "Failed to prepare_enable grf clock\n"); - return ret; - } - - ret = regmap_write(dp->grf, reg, val); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret); -+ DRM_DEV_ERROR(dev, "Could not write to GRF: %d\n", ret); - clk_disable_unprepare(dp->grf_clk); - return ret; - } -@@ -83,24 +83,25 @@ static int cdn_dp_grf_write(struct cdn_dp_device *dp, - - static int cdn_dp_clk_enable(struct cdn_dp_device *dp) - { -+ struct device *dev = dp->mhdp.dev; - int ret; - unsigned long rate; - - ret = clk_prepare_enable(dp->pclk); - if (ret < 0) { -- DRM_DEV_ERROR(dp->dev, "cannot enable dp pclk %d\n", ret); -+ DRM_DEV_ERROR(dev, "cannot enable dp pclk %d\n", ret); - goto err_pclk; - } - - ret = clk_prepare_enable(dp->core_clk); - if (ret < 0) { -- DRM_DEV_ERROR(dp->dev, "cannot enable core_clk %d\n", ret); -+ DRM_DEV_ERROR(dev, "cannot enable core_clk %d\n", ret); - goto err_core_clk; - } - -- ret = pm_runtime_get_sync(dp->dev); -+ ret = pm_runtime_get_sync(dev); - if (ret < 0) { -- DRM_DEV_ERROR(dp->dev, "cannot get pm runtime %d\n", ret); -+ DRM_DEV_ERROR(dev, "cannot get pm runtime %d\n", ret); - goto err_pm_runtime_get; - } - -@@ -113,18 +114,18 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp) - - rate = clk_get_rate(dp->core_clk); - if (!rate) { -- DRM_DEV_ERROR(dp->dev, "get clk rate failed\n"); -+ DRM_DEV_ERROR(dev, "get clk rate failed\n"); - ret = -EINVAL; - goto err_set_rate; - } - -- cdn_dp_set_fw_clk(dp, rate); -- cdn_dp_clock_reset(dp); -+ cdns_mhdp_set_fw_clk(&dp->mhdp, rate); -+ cdns_mhdp_clock_reset(&dp->mhdp); - - return 0; - - err_set_rate: -- pm_runtime_put(dp->dev); -+ pm_runtime_put(dev); - err_pm_runtime_get: - clk_disable_unprepare(dp->core_clk); - err_core_clk: -@@ -135,7 +136,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp) - - static void cdn_dp_clk_disable(struct cdn_dp_device *dp) - { -- pm_runtime_put_sync(dp->dev); -+ pm_runtime_put_sync(dp->mhdp.dev); - clk_disable_unprepare(dp->pclk); - clk_disable_unprepare(dp->core_clk); - } -@@ -168,7 +169,7 @@ static int cdn_dp_get_sink_count(struct cdn_dp_device *dp, u8 *sink_count) - u8 value; - - *sink_count = 0; -- ret = cdn_dp_dpcd_read(dp, DP_SINK_COUNT, &value, 1); -+ ret = drm_dp_dpcd_read(&dp->mhdp.dp.aux, DP_SINK_COUNT, &value, 1); - if (ret) - return ret; - -@@ -192,12 +193,13 @@ static struct cdn_dp_port *cdn_dp_connected_port(struct cdn_dp_device *dp) - - static bool cdn_dp_check_sink_connection(struct cdn_dp_device *dp) - { -+ struct device *dev = dp->mhdp.dev; - unsigned long timeout = jiffies + msecs_to_jiffies(CDN_DPCD_TIMEOUT_MS); - struct cdn_dp_port *port; - u8 sink_count = 0; - - if (dp->active_port < 0 || dp->active_port >= dp->ports) { -- DRM_DEV_ERROR(dp->dev, "active_port is wrong!\n"); -+ DRM_DEV_ERROR(dev, "active_port is wrong!\n"); - return false; - } - -@@ -219,7 +221,7 @@ static bool cdn_dp_check_sink_connection(struct cdn_dp_device *dp) - usleep_range(5000, 10000); - } - -- DRM_DEV_ERROR(dp->dev, "Get sink capability timed out\n"); -+ DRM_DEV_ERROR(dev, "Get sink capability timed out\n"); - return false; - } - -@@ -261,7 +263,8 @@ static int cdn_dp_connector_get_modes(struct drm_connector *connector) - mutex_lock(&dp->lock); - edid = dp->edid; - if (edid) { -- DRM_DEV_DEBUG_KMS(dp->dev, "got edid: width[%d] x height[%d]\n", -+ DRM_DEV_DEBUG_KMS(dp->mhdp.dev, -+ "got edid: width[%d] x height[%d]\n", - edid->width_cm, edid->height_cm); - - dp->sink_has_audio = drm_detect_monitor_audio(edid); -@@ -279,7 +282,8 @@ cdn_dp_connector_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) - { - struct cdn_dp_device *dp = connector_to_dp(connector); -- struct drm_display_info *display_info = &dp->connector.display_info; -+ struct drm_display_info *display_info = -+ &dp->mhdp.connector.base.display_info; - u32 requested, actual, rate, sink_max, source_max = 0; - u8 lanes, bpc; - -@@ -302,11 +306,11 @@ static int cdn_dp_connector_mode_valid(struct drm_connector *connector, - requested = mode->clock * bpc * 3 / 1000; - - source_max = dp->lanes; -- sink_max = drm_dp_max_lane_count(dp->dpcd); -+ sink_max = drm_dp_max_lane_count(dp->mhdp.dp.dpcd); - lanes = min(source_max, sink_max); - -- source_max = drm_dp_bw_code_to_link_rate(CDN_DP_MAX_LINK_RATE); -- sink_max = drm_dp_max_link_rate(dp->dpcd); -+ source_max = CDNS_DP_MAX_LINK_RATE; -+ sink_max = drm_dp_max_link_rate(dp->mhdp.dp.dpcd); - rate = min(source_max, sink_max); - - actual = rate * lanes / 100; -@@ -315,7 +319,7 @@ static int cdn_dp_connector_mode_valid(struct drm_connector *connector, - actual = actual * 8 / 10; - - if (requested > actual) { -- DRM_DEV_DEBUG_KMS(dp->dev, -+ DRM_DEV_DEBUG_KMS(dp->mhdp.dev, - "requested=%d, actual=%d, clock=%d\n", - requested, actual, mode->clock); - return MODE_CLOCK_HIGH; -@@ -335,59 +339,62 @@ static int cdn_dp_firmware_init(struct cdn_dp_device *dp) - const u32 *iram_data, *dram_data; - const struct firmware *fw = dp->fw; - const struct cdn_firmware_header *hdr; -+ struct device *dev = dp->mhdp.dev; - - hdr = (struct cdn_firmware_header *)fw->data; - if (fw->size != le32_to_cpu(hdr->size_bytes)) { -- DRM_DEV_ERROR(dp->dev, "firmware is invalid\n"); -+ DRM_DEV_ERROR(dev, "firmware is invalid\n"); - return -EINVAL; - } - - iram_data = (const u32 *)(fw->data + hdr->header_size); - dram_data = (const u32 *)(fw->data + hdr->header_size + hdr->iram_size); - -- ret = cdn_dp_load_firmware(dp, iram_data, hdr->iram_size, -- dram_data, hdr->dram_size); -+ ret = cdns_mhdp_load_firmware(&dp->mhdp, iram_data, hdr->iram_size, -+ dram_data, hdr->dram_size); - if (ret) - return ret; - -- ret = cdn_dp_set_firmware_active(dp, true); -+ ret = cdns_mhdp_set_firmware_active(&dp->mhdp, true); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "active ucpu failed: %d\n", ret); -+ DRM_DEV_ERROR(dev, "active ucpu failed: %d\n", ret); - return ret; - } - -- return cdn_dp_event_config(dp); -+ return cdns_mhdp_event_config(&dp->mhdp); - } - - static int cdn_dp_get_sink_capability(struct cdn_dp_device *dp) - { -+ struct cdns_mhdp_device *mhdp = &dp->mhdp; - int ret; - - if (!cdn_dp_check_sink_connection(dp)) - return -ENODEV; - -- ret = cdn_dp_dpcd_read(dp, DP_DPCD_REV, dp->dpcd, -+ ret = drm_dp_dpcd_read(&mhdp->dp.aux, DP_DPCD_REV, mhdp->dp.dpcd, - DP_RECEIVER_CAP_SIZE); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to get caps %d\n", ret); -+ DRM_DEV_ERROR(mhdp->dev, "Failed to get caps %d\n", ret); - return ret; - } - - kfree(dp->edid); -- dp->edid = drm_do_get_edid(&dp->connector, -- cdn_dp_get_edid_block, dp); -+ dp->edid = drm_do_get_edid(&mhdp->connector.base, -+ cdns_mhdp_get_edid_block, mhdp); - return 0; - } - - static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port) - { -+ struct device *dev = dp->mhdp.dev; - union extcon_property_value property; - int ret; - - if (!port->phy_enabled) { - ret = phy_power_on(port->phy); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "phy power on failed: %d\n", -+ DRM_DEV_ERROR(dev, "phy power on failed: %d\n", - ret); - goto err_phy; - } -@@ -397,28 +404,28 @@ static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port) - ret = cdn_dp_grf_write(dp, GRF_SOC_CON26, - DPTX_HPD_SEL_MASK | DPTX_HPD_SEL); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to write HPD_SEL %d\n", ret); -+ DRM_DEV_ERROR(dev, "Failed to write HPD_SEL %d\n", ret); - goto err_power_on; - } - -- ret = cdn_dp_get_hpd_status(dp); -+ ret = cdns_mhdp_read_hpd(&dp->mhdp); - if (ret <= 0) { - if (!ret) -- DRM_DEV_ERROR(dp->dev, "hpd does not exist\n"); -+ DRM_DEV_ERROR(dev, "hpd does not exist\n"); - goto err_power_on; - } - - ret = extcon_get_property(port->extcon, EXTCON_DISP_DP, - EXTCON_PROP_USB_TYPEC_POLARITY, &property); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "get property failed\n"); -+ DRM_DEV_ERROR(dev, "get property failed\n"); - goto err_power_on; - } - - port->lanes = cdn_dp_get_port_lanes(port); -- ret = cdn_dp_set_host_cap(dp, port->lanes, property.intval); -+ ret = cdns_mhdp_set_host_cap(&dp->mhdp, property.intval); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "set host capabilities failed: %d\n", -+ DRM_DEV_ERROR(dev, "set host capabilities failed: %d\n", - ret); - goto err_power_on; - } -@@ -428,7 +435,7 @@ static int cdn_dp_enable_phy(struct cdn_dp_device *dp, struct cdn_dp_port *port) - - err_power_on: - if (phy_power_off(port->phy)) -- DRM_DEV_ERROR(dp->dev, "phy power off failed: %d", ret); -+ DRM_DEV_ERROR(dev, "phy power off failed: %d", ret); - else - port->phy_enabled = false; - -@@ -446,7 +453,8 @@ static int cdn_dp_disable_phy(struct cdn_dp_device *dp, - if (port->phy_enabled) { - ret = phy_power_off(port->phy); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "phy power off failed: %d", ret); -+ DRM_DEV_ERROR(dp->mhdp.dev, -+ "phy power off failed: %d", ret); - return ret; - } - } -@@ -470,16 +478,16 @@ static int cdn_dp_disable(struct cdn_dp_device *dp) - ret = cdn_dp_grf_write(dp, GRF_SOC_CON26, - DPTX_HPD_SEL_MASK | DPTX_HPD_DEL); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to clear hpd sel %d\n", -+ DRM_DEV_ERROR(dp->mhdp.dev, "Failed to clear hpd sel %d\n", - ret); - return ret; - } - -- cdn_dp_set_firmware_active(dp, false); -+ cdns_mhdp_set_firmware_active(&dp->mhdp, false); - cdn_dp_clk_disable(dp); - dp->active = false; -- dp->max_lanes = 0; -- dp->max_rate = 0; -+ dp->mhdp.dp.rate = 0; -+ dp->mhdp.dp.num_lanes = 0; - if (!dp->connected) { - kfree(dp->edid); - dp->edid = NULL; -@@ -492,11 +500,11 @@ static int cdn_dp_enable(struct cdn_dp_device *dp) - { - int ret, i, lanes; - struct cdn_dp_port *port; -+ struct device *dev = dp->mhdp.dev; - - port = cdn_dp_connected_port(dp); - if (!port) { -- DRM_DEV_ERROR(dp->dev, -- "Can't enable without connection\n"); -+ DRM_DEV_ERROR(dev, "Can't enable without connection\n"); - return -ENODEV; - } - -@@ -509,7 +517,7 @@ static int cdn_dp_enable(struct cdn_dp_device *dp) - - ret = cdn_dp_firmware_init(dp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "firmware init failed: %d", ret); -+ DRM_DEV_ERROR(dp->mhdp.dev, "firmware init failed: %d", ret); - goto err_clk_disable; - } - -@@ -543,8 +551,9 @@ static void cdn_dp_encoder_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *adjusted) - { - struct cdn_dp_device *dp = encoder_to_dp(encoder); -- struct drm_display_info *display_info = &dp->connector.display_info; -- struct video_info *video = &dp->video_info; -+ struct drm_display_info *display_info = -+ &dp->mhdp.connector.base.display_info; -+ struct video_info *video = &dp->mhdp.video_info; - - switch (display_info->bpc) { - case 10: -@@ -562,20 +571,20 @@ static void cdn_dp_encoder_mode_set(struct drm_encoder *encoder, - video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); - video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); - -- drm_mode_copy(&dp->mode, adjusted); -+ drm_mode_copy(&dp->mhdp.mode, adjusted); - } - - static bool cdn_dp_check_link_status(struct cdn_dp_device *dp) - { - u8 link_status[DP_LINK_STATUS_SIZE]; - struct cdn_dp_port *port = cdn_dp_connected_port(dp); -- u8 sink_lanes = drm_dp_max_lane_count(dp->dpcd); -+ u8 sink_lanes = drm_dp_max_lane_count(dp->mhdp.dp.dpcd); - -- if (!port || !dp->max_rate || !dp->max_lanes) -+ if (!port || !dp->mhdp.dp.rate || !dp->mhdp.dp.num_lanes) - return false; - -- if (cdn_dp_dpcd_read(dp, DP_LANE0_1_STATUS, link_status, -- DP_LINK_STATUS_SIZE)) { -+ if (drm_dp_dpcd_read(&dp->mhdp.dp.aux, DP_LANE0_1_STATUS, link_status, -+ DP_LINK_STATUS_SIZE)) { - DRM_ERROR("Failed to get link status\n"); - return false; - } -@@ -587,15 +596,16 @@ static bool cdn_dp_check_link_status(struct cdn_dp_device *dp) - static void cdn_dp_encoder_enable(struct drm_encoder *encoder) - { - struct cdn_dp_device *dp = encoder_to_dp(encoder); -+ struct device *dev = dp->mhdp.dev; - int ret, val; - -- ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder); -+ ret = drm_of_encoder_active_endpoint_id(dev->of_node, encoder); - if (ret < 0) { -- DRM_DEV_ERROR(dp->dev, "Could not get vop id, %d", ret); -+ DRM_DEV_ERROR(dev, "Could not get vop id, %d", ret); - return; - } - -- DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n", -+ DRM_DEV_DEBUG_KMS(dev, "vop %s output to cdn-dp\n", - (ret) ? "LIT" : "BIG"); - if (ret) - val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16); -@@ -610,33 +620,33 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder) - - ret = cdn_dp_enable(dp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to enable encoder %d\n", -+ DRM_DEV_ERROR(dev, "Failed to enable encoder %d\n", - ret); - goto out; - } - if (!cdn_dp_check_link_status(dp)) { -- ret = cdn_dp_train_link(dp); -+ ret = cdns_mhdp_train_link(&dp->mhdp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed link train %d\n", ret); -+ DRM_DEV_ERROR(dev, "Failed link train %d\n", ret); - goto out; - } - } - -- ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_IDLE); -+ ret = cdns_mhdp_set_video_status(&dp->mhdp, CONTROL_VIDEO_IDLE); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to idle video %d\n", ret); -+ DRM_DEV_ERROR(dev, "Failed to idle video %d\n", ret); - goto out; - } - -- ret = cdn_dp_config_video(dp); -+ ret = cdns_mhdp_config_video(&dp->mhdp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to config video %d\n", ret); -+ DRM_DEV_ERROR(dev, "Failed to config video %d\n", ret); - goto out; - } - -- ret = cdn_dp_set_video_status(dp, CONTROL_VIDEO_VALID); -+ ret = cdns_mhdp_set_video_status(&dp->mhdp, CONTROL_VIDEO_VALID); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to valid video %d\n", ret); -+ DRM_DEV_ERROR(dev, "Failed to valid video %d\n", ret); - goto out; - } - -@@ -652,7 +662,8 @@ static void cdn_dp_encoder_disable(struct drm_encoder *encoder) - if (dp->active) { - ret = cdn_dp_disable(dp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to disable encoder %d\n", -+ DRM_DEV_ERROR(dp->mhdp.dev, -+ "Failed to disable encoder %d\n", - ret); - } - } -@@ -692,7 +703,7 @@ static const struct drm_encoder_helper_funcs cdn_dp_encoder_helper_funcs = { - - static int cdn_dp_parse_dt(struct cdn_dp_device *dp) - { -- struct device *dev = dp->dev; -+ struct device *dev = dp->mhdp.dev; - struct device_node *np = dev->of_node; - struct platform_device *pdev = to_platform_device(dev); - -@@ -704,10 +715,10 @@ static int cdn_dp_parse_dt(struct cdn_dp_device *dp) - return PTR_ERR(dp->grf); - } - -- dp->regs = devm_platform_ioremap_resource(pdev, 0); -- if (IS_ERR(dp->regs)) { -+ dp->mhdp.regs_base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(dp->mhdp.regs_base)) { - DRM_DEV_ERROR(dev, "ioremap reg failed\n"); -- return PTR_ERR(dp->regs); -+ return PTR_ERR(dp->mhdp.regs_base); - } - - dp->core_clk = devm_clk_get(dev, "core-clk"); -@@ -722,10 +733,10 @@ static int cdn_dp_parse_dt(struct cdn_dp_device *dp) - return PTR_ERR(dp->pclk); - } - -- dp->spdif_clk = devm_clk_get(dev, "spdif"); -- if (IS_ERR(dp->spdif_clk)) { -+ dp->mhdp.spdif_clk = devm_clk_get(dev, "spdif"); -+ if (IS_ERR(dp->mhdp.spdif_clk)) { - DRM_DEV_ERROR(dev, "cannot get spdif_clk\n"); -- return PTR_ERR(dp->spdif_clk); -+ return PTR_ERR(dp->mhdp.spdif_clk); - } - - dp->grf_clk = devm_clk_get(dev, "grf"); -@@ -734,10 +745,10 @@ static int cdn_dp_parse_dt(struct cdn_dp_device *dp) - return PTR_ERR(dp->grf_clk); - } - -- dp->spdif_rst = devm_reset_control_get(dev, "spdif"); -- if (IS_ERR(dp->spdif_rst)) { -+ dp->mhdp.spdif_rst = devm_reset_control_get(dev, "spdif"); -+ if (IS_ERR(dp->mhdp.spdif_rst)) { - DRM_DEV_ERROR(dev, "no spdif reset control found\n"); -- return PTR_ERR(dp->spdif_rst); -+ return PTR_ERR(dp->mhdp.spdif_rst); - } - - dp->dptx_rst = devm_reset_control_get(dev, "dptx"); -@@ -784,7 +795,7 @@ static int cdn_dp_audio_hw_params(struct device *dev, void *data, - audio.format = AFMT_I2S; - break; - case HDMI_SPDIF: -- audio.format = AFMT_SPDIF; -+ audio.format = AFMT_SPDIF_INT; - break; - default: - DRM_DEV_ERROR(dev, "Invalid format %d\n", daifmt->fmt); -@@ -792,9 +803,9 @@ static int cdn_dp_audio_hw_params(struct device *dev, void *data, - goto out; - } - -- ret = cdn_dp_audio_config(dp, &audio); -+ ret = cdns_mhdp_audio_config(&dp->mhdp, &audio); - if (!ret) -- dp->audio_info = audio; -+ dp->mhdp.audio_info = audio; - - out: - mutex_unlock(&dp->lock); -@@ -810,9 +821,9 @@ static void cdn_dp_audio_shutdown(struct device *dev, void *data) - if (!dp->active) - goto out; - -- ret = cdn_dp_audio_stop(dp, &dp->audio_info); -+ ret = cdns_mhdp_audio_stop(&dp->mhdp, &dp->mhdp.audio_info); - if (!ret) -- dp->audio_info.format = AFMT_UNUSED; -+ dp->mhdp.audio_info.format = AFMT_UNUSED; - out: - mutex_unlock(&dp->lock); - } -@@ -829,7 +840,7 @@ static int cdn_dp_audio_mute_stream(struct device *dev, void *data, - goto out; - } - -- ret = cdn_dp_audio_mute(dp, enable); -+ ret = cdns_mhdp_audio_mute(&dp->mhdp, enable); - - out: - mutex_unlock(&dp->lock); -@@ -841,7 +852,8 @@ static int cdn_dp_audio_get_eld(struct device *dev, void *data, - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - -- memcpy(buf, dp->connector.eld, min(sizeof(dp->connector.eld), len)); -+ memcpy(buf, dp->mhdp.connector.base.eld, -+ min(sizeof(dp->mhdp.connector.base.eld), len)); - - return 0; - } -@@ -864,11 +876,11 @@ static int cdn_dp_audio_codec_init(struct cdn_dp_device *dp, - .max_i2s_channels = 8, - }; - -- dp->audio_pdev = platform_device_register_data( -- dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, -- &codec_data, sizeof(codec_data)); -+ dp->mhdp.audio_pdev = platform_device_register_data( -+ dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, -+ &codec_data, sizeof(codec_data)); - -- return PTR_ERR_OR_ZERO(dp->audio_pdev); -+ return PTR_ERR_OR_ZERO(dp->mhdp.audio_pdev); - } - - static int cdn_dp_request_firmware(struct cdn_dp_device *dp) -@@ -876,6 +888,7 @@ static int cdn_dp_request_firmware(struct cdn_dp_device *dp) - int ret; - unsigned long timeout = jiffies + msecs_to_jiffies(CDN_FW_TIMEOUT_MS); - unsigned long sleep = 1000; -+ struct device *dev = dp->mhdp.dev; - - WARN_ON(!mutex_is_locked(&dp->lock)); - -@@ -886,13 +899,13 @@ static int cdn_dp_request_firmware(struct cdn_dp_device *dp) - mutex_unlock(&dp->lock); - - while (time_before(jiffies, timeout)) { -- ret = request_firmware(&dp->fw, CDN_DP_FIRMWARE, dp->dev); -+ ret = request_firmware(&dp->fw, CDN_DP_FIRMWARE, dev); - if (ret == -ENOENT) { - msleep(sleep); - sleep *= 2; - continue; - } else if (ret) { -- DRM_DEV_ERROR(dp->dev, -+ DRM_DEV_ERROR(dev, - "failed to request firmware: %d\n", ret); - goto out; - } -@@ -902,7 +915,7 @@ static int cdn_dp_request_firmware(struct cdn_dp_device *dp) - goto out; - } - -- DRM_DEV_ERROR(dp->dev, "Timed out trying to load firmware\n"); -+ DRM_DEV_ERROR(dev, "Timed out trying to load firmware\n"); - ret = -ETIMEDOUT; - out: - mutex_lock(&dp->lock); -@@ -913,8 +926,9 @@ static void cdn_dp_pd_event_work(struct work_struct *work) - { - struct cdn_dp_device *dp = container_of(work, struct cdn_dp_device, - event_work); -- struct drm_connector *connector = &dp->connector; -+ struct drm_connector *connector = &dp->mhdp.connector.base; - enum drm_connector_status old_status; -+ struct device *dev = dp->mhdp.dev; - - int ret; - -@@ -931,44 +945,45 @@ static void cdn_dp_pd_event_work(struct work_struct *work) - - /* Not connected, notify userspace to disable the block */ - if (!cdn_dp_connected_port(dp)) { -- DRM_DEV_INFO(dp->dev, "Not connected. Disabling cdn\n"); -+ DRM_DEV_INFO(dev, "Not connected. Disabling cdn\n"); - dp->connected = false; - - /* Connected but not enabled, enable the block */ - } else if (!dp->active) { -- DRM_DEV_INFO(dp->dev, "Connected, not enabled. Enabling cdn\n"); -+ DRM_DEV_INFO(dev, "Connected, not enabled. Enabling cdn\n"); - ret = cdn_dp_enable(dp); - if (ret) { -- DRM_DEV_ERROR(dp->dev, "Enable dp failed %d\n", ret); -+ DRM_DEV_ERROR(dev, "Enable dp failed %d\n", ret); - dp->connected = false; - } - - /* Enabled and connected to a dongle without a sink, notify userspace */ - } else if (!cdn_dp_check_sink_connection(dp)) { -- DRM_DEV_INFO(dp->dev, "Connected without sink. Assert hpd\n"); -+ DRM_DEV_INFO(dev, "Connected without sink. Assert hpd\n"); - dp->connected = false; - - /* Enabled and connected with a sink, re-train if requested */ - } else if (!cdn_dp_check_link_status(dp)) { -- unsigned int rate = dp->max_rate; -- unsigned int lanes = dp->max_lanes; -- struct drm_display_mode *mode = &dp->mode; -+ unsigned int rate = dp->mhdp.dp.rate; -+ unsigned int lanes = dp->mhdp.dp.num_lanes; -+ struct drm_display_mode *mode = &dp->mhdp.mode; - -- DRM_DEV_INFO(dp->dev, "Connected with sink. Re-train link\n"); -- ret = cdn_dp_train_link(dp); -+ DRM_DEV_INFO(dev, "Connected with sink. Re-train link\n"); -+ ret = cdns_mhdp_train_link(&dp->mhdp); - if (ret) { - dp->connected = false; -- DRM_DEV_ERROR(dp->dev, "Train link failed %d\n", ret); -+ DRM_DEV_ERROR(dev, "Train link failed %d\n", ret); - goto out; - } - - /* If training result is changed, update the video config */ - if (mode->clock && -- (rate != dp->max_rate || lanes != dp->max_lanes)) { -- ret = cdn_dp_config_video(dp); -+ (rate != dp->mhdp.dp.rate || -+ lanes != dp->mhdp.dp.num_lanes)) { -+ ret = cdns_mhdp_config_video(&dp->mhdp); - if (ret) { - dp->connected = false; -- DRM_DEV_ERROR(dp->dev, -+ DRM_DEV_ERROR(dev, - "Failed to config video %d\n", - ret); - } -@@ -1037,7 +1052,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data) - - drm_encoder_helper_add(encoder, &cdn_dp_encoder_helper_funcs); - -- connector = &dp->connector; -+ connector = &dp->mhdp.connector.base; - connector->polled = DRM_CONNECTOR_POLL_HPD; - connector->dpms = DRM_MODE_DPMS_OFF; - -@@ -1061,7 +1076,7 @@ static int cdn_dp_bind(struct device *dev, struct device *master, void *data) - port = dp->port[i]; - - port->event_nb.notifier_call = cdn_dp_pd_event; -- ret = devm_extcon_register_notifier(dp->dev, port->extcon, -+ ret = devm_extcon_register_notifier(dp->mhdp.dev, port->extcon, - EXTCON_DISP_DP, - &port->event_nb); - if (ret) { -@@ -1088,7 +1103,7 @@ static void cdn_dp_unbind(struct device *dev, struct device *master, void *data) - { - struct cdn_dp_device *dp = dev_get_drvdata(dev); - struct drm_encoder *encoder = &dp->encoder.encoder; -- struct drm_connector *connector = &dp->connector; -+ struct drm_connector *connector = &dp->mhdp.connector.base; - - cancel_work_sync(&dp->event_work); - cdn_dp_encoder_disable(encoder); -@@ -1148,7 +1163,7 @@ static int cdn_dp_probe(struct platform_device *pdev) - dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL); - if (!dp) - return -ENOMEM; -- dp->dev = dev; -+ dp->mhdp.dev = dev; - - match = of_match_node(cdn_dp_dt_ids, pdev->dev.of_node); - dp_data = (struct cdn_dp_data *)match->data; -@@ -1192,8 +1207,8 @@ static int cdn_dp_remove(struct platform_device *pdev) - { - struct cdn_dp_device *dp = platform_get_drvdata(pdev); - -- platform_device_unregister(dp->audio_pdev); -- cdn_dp_suspend(dp->dev); -+ platform_device_unregister(dp->mhdp.audio_pdev); -+ cdn_dp_suspend(dp->mhdp.dev); - component_del(&pdev->dev, &cdn_dp_component_ops); - } - -@@ -1203,7 +1218,7 @@ static void cdn_dp_shutdown(struct platform_device *pdev) - { - struct cdn_dp_device *dp = platform_get_drvdata(pdev); - -- cdn_dp_suspend(dp->dev); -+ cdn_dp_suspend(dp->mhdp.dev); - } - - static const struct dev_pm_ops cdn_dp_pm_ops = { -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.h b/drivers/gpu/drm/rockchip/cdn-dp-core.h -index 81ac9b658a70..8b1b15b92503 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-core.h -+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.h -@@ -7,6 +7,7 @@ - #ifndef _CDN_DP_CORE_H - #define _CDN_DP_CORE_H - -+#include - #include - #include - #include -@@ -15,35 +16,6 @@ - - #define MAX_PHY 2 - --enum audio_format { -- AFMT_I2S = 0, -- AFMT_SPDIF = 1, -- AFMT_UNUSED, --}; -- --struct audio_info { -- enum audio_format format; -- int sample_rate; -- int channels; -- int sample_width; --}; -- --enum vic_pxl_encoding_format { -- PXL_RGB = 0x1, -- YCBCR_4_4_4 = 0x2, -- YCBCR_4_2_2 = 0x4, -- YCBCR_4_2_0 = 0x8, -- Y_ONLY = 0x10, --}; -- --struct video_info { -- bool h_sync_polarity; -- bool v_sync_polarity; -- bool interlaced; -- int color_depth; -- enum vic_pxl_encoding_format color_fmt; --}; -- - struct cdn_firmware_header { - u32 size_bytes; /* size of the entire header+image(s) in bytes */ - u32 header_size; /* size of just the header in bytes */ -@@ -62,12 +34,9 @@ struct cdn_dp_port { - }; - - struct cdn_dp_device { -- struct device *dev; -+ struct cdns_mhdp_device mhdp; - struct drm_device *drm_dev; -- struct drm_connector connector; - struct rockchip_encoder encoder; -- struct drm_display_mode mode; -- struct platform_device *audio_pdev; - struct work_struct event_work; - struct edid *edid; - -@@ -77,29 +46,20 @@ struct cdn_dp_device { - bool suspended; - - const struct firmware *fw; /* cdn dp firmware */ -- unsigned int fw_version; /* cdn fw version */ - bool fw_loaded; - -- void __iomem *regs; - struct regmap *grf; - struct clk *core_clk; - struct clk *pclk; -- struct clk *spdif_clk; - struct clk *grf_clk; -- struct reset_control *spdif_rst; - struct reset_control *dptx_rst; - struct reset_control *apb_rst; - struct reset_control *core_rst; -- struct audio_info audio_info; -- struct video_info video_info; - struct cdn_dp_port *port[MAX_PHY]; - u8 ports; -- u8 max_lanes; -- unsigned int max_rate; - u8 lanes; - int active_port; - -- u8 dpcd[DP_RECEIVER_CAP_SIZE]; - bool sink_has_audio; - - hdmi_codec_plugged_cb plugged_cb; -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.c b/drivers/gpu/drm/rockchip/cdn-dp-reg.c -deleted file mode 100644 -index 9d2163ef4d6e..000000000000 ---- a/drivers/gpu/drm/rockchip/cdn-dp-reg.c -+++ /dev/null -@@ -1,960 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0-only --/* -- * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd -- * Author: Chris Zhong -- */ -- --#include --#include --#include --#include --#include --#include -- --#include "cdn-dp-core.h" --#include "cdn-dp-reg.h" -- --#define CDN_DP_SPDIF_CLK 200000000 --#define FW_ALIVE_TIMEOUT_US 1000000 --#define MAILBOX_RETRY_US 1000 --#define MAILBOX_TIMEOUT_US 5000000 --#define LINK_TRAINING_RETRY_MS 20 --#define LINK_TRAINING_TIMEOUT_MS 500 -- --void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk) --{ -- writel(clk / 1000000, dp->regs + SW_CLK_H); --} -- --void cdn_dp_clock_reset(struct cdn_dp_device *dp) --{ -- u32 val; -- -- val = DPTX_FRMR_DATA_CLK_RSTN_EN | -- DPTX_FRMR_DATA_CLK_EN | -- DPTX_PHY_DATA_RSTN_EN | -- DPTX_PHY_DATA_CLK_EN | -- DPTX_PHY_CHAR_RSTN_EN | -- DPTX_PHY_CHAR_CLK_EN | -- SOURCE_AUX_SYS_CLK_RSTN_EN | -- SOURCE_AUX_SYS_CLK_EN | -- DPTX_SYS_CLK_RSTN_EN | -- DPTX_SYS_CLK_EN | -- CFG_DPTX_VIF_CLK_RSTN_EN | -- CFG_DPTX_VIF_CLK_EN; -- writel(val, dp->regs + SOURCE_DPTX_CAR); -- -- val = SOURCE_PHY_RSTN_EN | SOURCE_PHY_CLK_EN; -- writel(val, dp->regs + SOURCE_PHY_CAR); -- -- val = SOURCE_PKT_SYS_RSTN_EN | -- SOURCE_PKT_SYS_CLK_EN | -- SOURCE_PKT_DATA_RSTN_EN | -- SOURCE_PKT_DATA_CLK_EN; -- writel(val, dp->regs + SOURCE_PKT_CAR); -- -- val = SPDIF_CDR_CLK_RSTN_EN | -- SPDIF_CDR_CLK_EN | -- SOURCE_AIF_SYS_RSTN_EN | -- SOURCE_AIF_SYS_CLK_EN | -- SOURCE_AIF_CLK_RSTN_EN | -- SOURCE_AIF_CLK_EN; -- writel(val, dp->regs + SOURCE_AIF_CAR); -- -- val = SOURCE_CIPHER_SYSTEM_CLK_RSTN_EN | -- SOURCE_CIPHER_SYS_CLK_EN | -- SOURCE_CIPHER_CHAR_CLK_RSTN_EN | -- SOURCE_CIPHER_CHAR_CLK_EN; -- writel(val, dp->regs + SOURCE_CIPHER_CAR); -- -- val = SOURCE_CRYPTO_SYS_CLK_RSTN_EN | -- SOURCE_CRYPTO_SYS_CLK_EN; -- writel(val, dp->regs + SOURCE_CRYPTO_CAR); -- -- /* enable Mailbox and PIF interrupt */ -- writel(0, dp->regs + APB_INT_MASK); --} -- --static int cdn_dp_mailbox_read(struct cdn_dp_device *dp) --{ -- int val, ret; -- -- ret = readx_poll_timeout(readl, dp->regs + MAILBOX_EMPTY_ADDR, -- val, !val, MAILBOX_RETRY_US, -- MAILBOX_TIMEOUT_US); -- if (ret < 0) -- return ret; -- -- return readl(dp->regs + MAILBOX0_RD_DATA) & 0xff; --} -- --static int cdp_dp_mailbox_write(struct cdn_dp_device *dp, u8 val) --{ -- int ret, full; -- -- ret = readx_poll_timeout(readl, dp->regs + MAILBOX_FULL_ADDR, -- full, !full, MAILBOX_RETRY_US, -- MAILBOX_TIMEOUT_US); -- if (ret < 0) -- return ret; -- -- writel(val, dp->regs + MAILBOX0_WR_DATA); -- -- return 0; --} -- --static int cdn_dp_mailbox_validate_receive(struct cdn_dp_device *dp, -- u8 module_id, u8 opcode, -- u16 req_size) --{ -- u32 mbox_size, i; -- u8 header[4]; -- int ret; -- -- /* read the header of the message */ -- for (i = 0; i < 4; i++) { -- ret = cdn_dp_mailbox_read(dp); -- if (ret < 0) -- return ret; -- -- header[i] = ret; -- } -- -- mbox_size = (header[2] << 8) | header[3]; -- -- if (opcode != header[0] || module_id != header[1] || -- req_size != mbox_size) { -- /* -- * If the message in mailbox is not what we want, we need to -- * clear the mailbox by reading its contents. -- */ -- for (i = 0; i < mbox_size; i++) -- if (cdn_dp_mailbox_read(dp) < 0) -- break; -- -- return -EINVAL; -- } -- -- return 0; --} -- --static int cdn_dp_mailbox_read_receive(struct cdn_dp_device *dp, -- u8 *buff, u16 buff_size) --{ -- u32 i; -- int ret; -- -- for (i = 0; i < buff_size; i++) { -- ret = cdn_dp_mailbox_read(dp); -- if (ret < 0) -- return ret; -- -- buff[i] = ret; -- } -- -- return 0; --} -- --static int cdn_dp_mailbox_send(struct cdn_dp_device *dp, u8 module_id, -- u8 opcode, u16 size, u8 *message) --{ -- u8 header[4]; -- int ret, i; -- -- header[0] = opcode; -- header[1] = module_id; -- header[2] = (size >> 8) & 0xff; -- header[3] = size & 0xff; -- -- for (i = 0; i < 4; i++) { -- ret = cdp_dp_mailbox_write(dp, header[i]); -- if (ret) -- return ret; -- } -- -- for (i = 0; i < size; i++) { -- ret = cdp_dp_mailbox_write(dp, message[i]); -- if (ret) -- return ret; -- } -- -- return 0; --} -- --static int cdn_dp_reg_write(struct cdn_dp_device *dp, u16 addr, u32 val) --{ -- u8 msg[6]; -- -- msg[0] = (addr >> 8) & 0xff; -- msg[1] = addr & 0xff; -- msg[2] = (val >> 24) & 0xff; -- msg[3] = (val >> 16) & 0xff; -- msg[4] = (val >> 8) & 0xff; -- msg[5] = val & 0xff; -- return cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_REGISTER, -- sizeof(msg), msg); --} -- --static int cdn_dp_reg_write_bit(struct cdn_dp_device *dp, u16 addr, -- u8 start_bit, u8 bits_no, u32 val) --{ -- u8 field[8]; -- -- field[0] = (addr >> 8) & 0xff; -- field[1] = addr & 0xff; -- field[2] = start_bit; -- field[3] = bits_no; -- field[4] = (val >> 24) & 0xff; -- field[5] = (val >> 16) & 0xff; -- field[6] = (val >> 8) & 0xff; -- field[7] = val & 0xff; -- -- return cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_FIELD, -- sizeof(field), field); --} -- --int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len) --{ -- u8 msg[5], reg[5]; -- int ret; -- -- msg[0] = (len >> 8) & 0xff; -- msg[1] = len & 0xff; -- msg[2] = (addr >> 16) & 0xff; -- msg[3] = (addr >> 8) & 0xff; -- msg[4] = addr & 0xff; -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_READ_DPCD, -- sizeof(msg), msg); -- if (ret) -- goto err_dpcd_read; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_READ_DPCD, -- sizeof(reg) + len); -- if (ret) -- goto err_dpcd_read; -- -- ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg)); -- if (ret) -- goto err_dpcd_read; -- -- ret = cdn_dp_mailbox_read_receive(dp, data, len); -- --err_dpcd_read: -- return ret; --} -- --int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value) --{ -- u8 msg[6], reg[5]; -- int ret; -- -- msg[0] = 0; -- msg[1] = 1; -- msg[2] = (addr >> 16) & 0xff; -- msg[3] = (addr >> 8) & 0xff; -- msg[4] = addr & 0xff; -- msg[5] = value; -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_WRITE_DPCD, -- sizeof(msg), msg); -- if (ret) -- goto err_dpcd_write; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_WRITE_DPCD, sizeof(reg)); -- if (ret) -- goto err_dpcd_write; -- -- ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg)); -- if (ret) -- goto err_dpcd_write; -- -- if (addr != (reg[2] << 16 | reg[3] << 8 | reg[4])) -- ret = -EINVAL; -- --err_dpcd_write: -- if (ret) -- DRM_DEV_ERROR(dp->dev, "dpcd write failed: %d\n", ret); -- return ret; --} -- --int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem, -- u32 i_size, const u32 *d_mem, u32 d_size) --{ -- u32 reg; -- int i, ret; -- -- /* reset ucpu before load firmware*/ -- writel(APB_IRAM_PATH | APB_DRAM_PATH | APB_XT_RESET, -- dp->regs + APB_CTRL); -- -- for (i = 0; i < i_size; i += 4) -- writel(*i_mem++, dp->regs + ADDR_IMEM + i); -- -- for (i = 0; i < d_size; i += 4) -- writel(*d_mem++, dp->regs + ADDR_DMEM + i); -- -- /* un-reset ucpu */ -- writel(0, dp->regs + APB_CTRL); -- -- /* check the keep alive register to make sure fw working */ -- ret = readx_poll_timeout(readl, dp->regs + KEEP_ALIVE, -- reg, reg, 2000, FW_ALIVE_TIMEOUT_US); -- if (ret < 0) { -- DRM_DEV_ERROR(dp->dev, "failed to loaded the FW reg = %x\n", -- reg); -- return -EINVAL; -- } -- -- reg = readl(dp->regs + VER_L) & 0xff; -- dp->fw_version = reg; -- reg = readl(dp->regs + VER_H) & 0xff; -- dp->fw_version |= reg << 8; -- reg = readl(dp->regs + VER_LIB_L_ADDR) & 0xff; -- dp->fw_version |= reg << 16; -- reg = readl(dp->regs + VER_LIB_H_ADDR) & 0xff; -- dp->fw_version |= reg << 24; -- -- DRM_DEV_DEBUG(dp->dev, "firmware version: %x\n", dp->fw_version); -- -- return 0; --} -- --int cdn_dp_set_firmware_active(struct cdn_dp_device *dp, bool enable) --{ -- u8 msg[5]; -- int ret, i; -- -- msg[0] = GENERAL_MAIN_CONTROL; -- msg[1] = MB_MODULE_ID_GENERAL; -- msg[2] = 0; -- msg[3] = 1; -- msg[4] = enable ? FW_ACTIVE : FW_STANDBY; -- -- for (i = 0; i < sizeof(msg); i++) { -- ret = cdp_dp_mailbox_write(dp, msg[i]); -- if (ret) -- goto err_set_firmware_active; -- } -- -- /* read the firmware state */ -- for (i = 0; i < sizeof(msg); i++) { -- ret = cdn_dp_mailbox_read(dp); -- if (ret < 0) -- goto err_set_firmware_active; -- -- msg[i] = ret; -- } -- -- ret = 0; -- --err_set_firmware_active: -- if (ret < 0) -- DRM_DEV_ERROR(dp->dev, "set firmware active failed\n"); -- return ret; --} -- --int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip) --{ -- u8 msg[8]; -- int ret; -- -- msg[0] = CDN_DP_MAX_LINK_RATE; -- msg[1] = lanes | SCRAMBLER_EN; -- msg[2] = VOLTAGE_LEVEL_2; -- msg[3] = PRE_EMPHASIS_LEVEL_3; -- msg[4] = PTS1 | PTS2 | PTS3 | PTS4; -- msg[5] = FAST_LT_NOT_SUPPORT; -- msg[6] = flip ? LANE_MAPPING_FLIPPED : LANE_MAPPING_NORMAL; -- msg[7] = ENHANCED; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, -- DPTX_SET_HOST_CAPABILITIES, -- sizeof(msg), msg); -- if (ret) -- goto err_set_host_cap; -- -- ret = cdn_dp_reg_write(dp, DP_AUX_SWAP_INVERSION_CONTROL, -- AUX_HOST_INVERT); -- --err_set_host_cap: -- if (ret) -- DRM_DEV_ERROR(dp->dev, "set host cap failed: %d\n", ret); -- return ret; --} -- --int cdn_dp_event_config(struct cdn_dp_device *dp) --{ -- u8 msg[5]; -- int ret; -- -- memset(msg, 0, sizeof(msg)); -- -- msg[0] = DPTX_EVENT_ENABLE_HPD | DPTX_EVENT_ENABLE_TRAINING; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_ENABLE_EVENT, -- sizeof(msg), msg); -- if (ret) -- DRM_DEV_ERROR(dp->dev, "set event config failed: %d\n", ret); -- -- return ret; --} -- --u32 cdn_dp_get_event(struct cdn_dp_device *dp) --{ -- return readl(dp->regs + SW_EVENTS0); --} -- --int cdn_dp_get_hpd_status(struct cdn_dp_device *dp) --{ -- u8 status; -- int ret; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_HPD_STATE, -- 0, NULL); -- if (ret) -- goto err_get_hpd; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_HPD_STATE, sizeof(status)); -- if (ret) -- goto err_get_hpd; -- -- ret = cdn_dp_mailbox_read_receive(dp, &status, sizeof(status)); -- if (ret) -- goto err_get_hpd; -- -- return status; -- --err_get_hpd: -- DRM_DEV_ERROR(dp->dev, "get hpd status failed: %d\n", ret); -- return ret; --} -- --int cdn_dp_get_edid_block(void *data, u8 *edid, -- unsigned int block, size_t length) --{ -- struct cdn_dp_device *dp = data; -- u8 msg[2], reg[2], i; -- int ret; -- -- for (i = 0; i < 4; i++) { -- msg[0] = block / 2; -- msg[1] = block % 2; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_GET_EDID, -- sizeof(msg), msg); -- if (ret) -- continue; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_GET_EDID, -- sizeof(reg) + length); -- if (ret) -- continue; -- -- ret = cdn_dp_mailbox_read_receive(dp, reg, sizeof(reg)); -- if (ret) -- continue; -- -- ret = cdn_dp_mailbox_read_receive(dp, edid, length); -- if (ret) -- continue; -- -- if (reg[0] == length && reg[1] == block / 2) -- break; -- } -- -- if (ret) -- DRM_DEV_ERROR(dp->dev, "get block[%d] edid failed: %d\n", block, -- ret); -- -- return ret; --} -- --static int cdn_dp_training_start(struct cdn_dp_device *dp) --{ -- unsigned long timeout; -- u8 msg, event[2]; -- int ret; -- -- msg = LINK_TRAINING_RUN; -- -- /* start training */ -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_TRAINING_CONTROL, -- sizeof(msg), &msg); -- if (ret) -- goto err_training_start; -- -- timeout = jiffies + msecs_to_jiffies(LINK_TRAINING_TIMEOUT_MS); -- while (time_before(jiffies, timeout)) { -- msleep(LINK_TRAINING_RETRY_MS); -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, -- DPTX_READ_EVENT, 0, NULL); -- if (ret) -- goto err_training_start; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_READ_EVENT, -- sizeof(event)); -- if (ret) -- goto err_training_start; -- -- ret = cdn_dp_mailbox_read_receive(dp, event, sizeof(event)); -- if (ret) -- goto err_training_start; -- -- if (event[1] & EQ_PHASE_FINISHED) -- return 0; -- } -- -- ret = -ETIMEDOUT; -- --err_training_start: -- DRM_DEV_ERROR(dp->dev, "training failed: %d\n", ret); -- return ret; --} -- --static int cdn_dp_get_training_status(struct cdn_dp_device *dp) --{ -- u8 status[10]; -- int ret; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_READ_LINK_STAT, -- 0, NULL); -- if (ret) -- goto err_get_training_status; -- -- ret = cdn_dp_mailbox_validate_receive(dp, MB_MODULE_ID_DP_TX, -- DPTX_READ_LINK_STAT, -- sizeof(status)); -- if (ret) -- goto err_get_training_status; -- -- ret = cdn_dp_mailbox_read_receive(dp, status, sizeof(status)); -- if (ret) -- goto err_get_training_status; -- -- dp->max_rate = drm_dp_bw_code_to_link_rate(status[0]); -- dp->max_lanes = status[1]; -- --err_get_training_status: -- if (ret) -- DRM_DEV_ERROR(dp->dev, "get training status failed: %d\n", ret); -- return ret; --} -- --int cdn_dp_train_link(struct cdn_dp_device *dp) --{ -- int ret; -- -- ret = cdn_dp_training_start(dp); -- if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to start training %d\n", ret); -- return ret; -- } -- -- ret = cdn_dp_get_training_status(dp); -- if (ret) { -- DRM_DEV_ERROR(dp->dev, "Failed to get training stat %d\n", ret); -- return ret; -- } -- -- DRM_DEV_DEBUG_KMS(dp->dev, "rate:0x%x, lanes:%d\n", dp->max_rate, -- dp->max_lanes); -- return ret; --} -- --int cdn_dp_set_video_status(struct cdn_dp_device *dp, int active) --{ -- u8 msg; -- int ret; -- -- msg = !!active; -- -- ret = cdn_dp_mailbox_send(dp, MB_MODULE_ID_DP_TX, DPTX_SET_VIDEO, -- sizeof(msg), &msg); -- if (ret) -- DRM_DEV_ERROR(dp->dev, "set video status failed: %d\n", ret); -- -- return ret; --} -- --static int cdn_dp_get_msa_misc(struct video_info *video, -- struct drm_display_mode *mode) --{ -- u32 msa_misc; -- u8 val[2] = {0}; -- -- switch (video->color_fmt) { -- case PXL_RGB: -- case Y_ONLY: -- val[0] = 0; -- break; -- /* set YUV default color space conversion to BT601 */ -- case YCBCR_4_4_4: -- val[0] = 6 + BT_601 * 8; -- break; -- case YCBCR_4_2_2: -- val[0] = 5 + BT_601 * 8; -- break; -- case YCBCR_4_2_0: -- val[0] = 5; -- break; -- } -- -- switch (video->color_depth) { -- case 6: -- val[1] = 0; -- break; -- case 8: -- val[1] = 1; -- break; -- case 10: -- val[1] = 2; -- break; -- case 12: -- val[1] = 3; -- break; -- case 16: -- val[1] = 4; -- break; -- } -- -- msa_misc = 2 * val[0] + 32 * val[1] + -- ((video->color_fmt == Y_ONLY) ? (1 << 14) : 0); -- -- return msa_misc; --} -- --int cdn_dp_config_video(struct cdn_dp_device *dp) --{ -- struct video_info *video = &dp->video_info; -- struct drm_display_mode *mode = &dp->mode; -- u64 symbol; -- u32 val, link_rate, rem; -- u8 bit_per_pix, tu_size_reg = TU_SIZE; -- int ret; -- -- bit_per_pix = (video->color_fmt == YCBCR_4_2_2) ? -- (video->color_depth * 2) : (video->color_depth * 3); -- -- link_rate = dp->max_rate / 1000; -- -- ret = cdn_dp_reg_write(dp, BND_HSYNC2VSYNC, VIF_BYPASS_INTERLACE); -- if (ret) -- goto err_config_video; -- -- ret = cdn_dp_reg_write(dp, HSYNC2VSYNC_POL_CTRL, 0); -- if (ret) -- goto err_config_video; -- -- /* -- * get a best tu_size and valid symbol: -- * 1. chose Lclk freq(162Mhz, 270Mhz, 540Mhz), set TU to 32 -- * 2. calculate VS(valid symbol) = TU * Pclk * Bpp / (Lclk * Lanes) -- * 3. if VS > *.85 or VS < *.1 or VS < 2 or TU < VS + 4, then set -- * TU += 2 and repeat 2nd step. -- */ -- do { -- tu_size_reg += 2; -- symbol = (u64)tu_size_reg * mode->clock * bit_per_pix; -- do_div(symbol, dp->max_lanes * link_rate * 8); -- rem = do_div(symbol, 1000); -- if (tu_size_reg > 64) { -- ret = -EINVAL; -- DRM_DEV_ERROR(dp->dev, -- "tu error, clk:%d, lanes:%d, rate:%d\n", -- mode->clock, dp->max_lanes, link_rate); -- goto err_config_video; -- } -- } while ((symbol <= 1) || (tu_size_reg - symbol < 4) || -- (rem > 850) || (rem < 100)); -- -- val = symbol + (tu_size_reg << 8); -- val |= TU_CNT_RST_EN; -- ret = cdn_dp_reg_write(dp, DP_FRAMER_TU, val); -- if (ret) -- goto err_config_video; -- -- /* set the FIFO Buffer size */ -- val = div_u64(mode->clock * (symbol + 1), 1000) + link_rate; -- val /= (dp->max_lanes * link_rate); -- val = div_u64(8 * (symbol + 1), bit_per_pix) - val; -- val += 2; -- ret = cdn_dp_reg_write(dp, DP_VC_TABLE(15), val); -- -- switch (video->color_depth) { -- case 6: -- val = BCS_6; -- break; -- case 8: -- val = BCS_8; -- break; -- case 10: -- val = BCS_10; -- break; -- case 12: -- val = BCS_12; -- break; -- case 16: -- val = BCS_16; -- break; -- } -- -- val += video->color_fmt << 8; -- ret = cdn_dp_reg_write(dp, DP_FRAMER_PXL_REPR, val); -- if (ret) -- goto err_config_video; -- -- val = video->h_sync_polarity ? DP_FRAMER_SP_HSP : 0; -- val |= video->v_sync_polarity ? DP_FRAMER_SP_VSP : 0; -- ret = cdn_dp_reg_write(dp, DP_FRAMER_SP, val); -- if (ret) -- goto err_config_video; -- -- val = (mode->hsync_start - mode->hdisplay) << 16; -- val |= mode->htotal - mode->hsync_end; -- ret = cdn_dp_reg_write(dp, DP_FRONT_BACK_PORCH, val); -- if (ret) -- goto err_config_video; -- -- val = mode->hdisplay * bit_per_pix / 8; -- ret = cdn_dp_reg_write(dp, DP_BYTE_COUNT, val); -- if (ret) -- goto err_config_video; -- -- val = mode->htotal | ((mode->htotal - mode->hsync_start) << 16); -- ret = cdn_dp_reg_write(dp, MSA_HORIZONTAL_0, val); -- if (ret) -- goto err_config_video; -- -- val = mode->hsync_end - mode->hsync_start; -- val |= (mode->hdisplay << 16) | (video->h_sync_polarity << 15); -- ret = cdn_dp_reg_write(dp, MSA_HORIZONTAL_1, val); -- if (ret) -- goto err_config_video; -- -- val = mode->vtotal; -- val |= (mode->vtotal - mode->vsync_start) << 16; -- ret = cdn_dp_reg_write(dp, MSA_VERTICAL_0, val); -- if (ret) -- goto err_config_video; -- -- val = mode->vsync_end - mode->vsync_start; -- val |= (mode->vdisplay << 16) | (video->v_sync_polarity << 15); -- ret = cdn_dp_reg_write(dp, MSA_VERTICAL_1, val); -- if (ret) -- goto err_config_video; -- -- val = cdn_dp_get_msa_misc(video, mode); -- ret = cdn_dp_reg_write(dp, MSA_MISC, val); -- if (ret) -- goto err_config_video; -- -- ret = cdn_dp_reg_write(dp, STREAM_CONFIG, 1); -- if (ret) -- goto err_config_video; -- -- val = mode->hsync_end - mode->hsync_start; -- val |= mode->hdisplay << 16; -- ret = cdn_dp_reg_write(dp, DP_HORIZONTAL, val); -- if (ret) -- goto err_config_video; -- -- val = mode->vdisplay; -- val |= (mode->vtotal - mode->vsync_start) << 16; -- ret = cdn_dp_reg_write(dp, DP_VERTICAL_0, val); -- if (ret) -- goto err_config_video; -- -- val = mode->vtotal; -- ret = cdn_dp_reg_write(dp, DP_VERTICAL_1, val); -- if (ret) -- goto err_config_video; -- -- ret = cdn_dp_reg_write_bit(dp, DP_VB_ID, 2, 1, 0); -- --err_config_video: -- if (ret) -- DRM_DEV_ERROR(dp->dev, "config video failed: %d\n", ret); -- return ret; --} -- --int cdn_dp_audio_stop(struct cdn_dp_device *dp, struct audio_info *audio) --{ -- int ret; -- -- ret = cdn_dp_reg_write(dp, AUDIO_PACK_CONTROL, 0); -- if (ret) { -- DRM_DEV_ERROR(dp->dev, "audio stop failed: %d\n", ret); -- return ret; -- } -- -- writel(0, dp->regs + SPDIF_CTRL_ADDR); -- -- /* clearn the audio config and reset */ -- writel(0, dp->regs + AUDIO_SRC_CNTL); -- writel(0, dp->regs + AUDIO_SRC_CNFG); -- writel(AUDIO_SW_RST, dp->regs + AUDIO_SRC_CNTL); -- writel(0, dp->regs + AUDIO_SRC_CNTL); -- -- /* reset smpl2pckt component */ -- writel(0, dp->regs + SMPL2PKT_CNTL); -- writel(AUDIO_SW_RST, dp->regs + SMPL2PKT_CNTL); -- writel(0, dp->regs + SMPL2PKT_CNTL); -- -- /* reset FIFO */ -- writel(AUDIO_SW_RST, dp->regs + FIFO_CNTL); -- writel(0, dp->regs + FIFO_CNTL); -- -- if (audio->format == AFMT_SPDIF) -- clk_disable_unprepare(dp->spdif_clk); -- -- return 0; --} -- --int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable) --{ -- int ret; -- -- ret = cdn_dp_reg_write_bit(dp, DP_VB_ID, 4, 1, enable); -- if (ret) -- DRM_DEV_ERROR(dp->dev, "audio mute failed: %d\n", ret); -- -- return ret; --} -- --static void cdn_dp_audio_config_i2s(struct cdn_dp_device *dp, -- struct audio_info *audio) --{ -- int sub_pckt_num = 1, i2s_port_en_val = 0xf, i; -- u32 val; -- -- if (audio->channels == 2) { -- if (dp->max_lanes == 1) -- sub_pckt_num = 2; -- else -- sub_pckt_num = 4; -- -- i2s_port_en_val = 1; -- } else if (audio->channels == 4) { -- i2s_port_en_val = 3; -- } -- -- writel(0x0, dp->regs + SPDIF_CTRL_ADDR); -- -- writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL); -- -- val = MAX_NUM_CH(audio->channels); -- val |= NUM_OF_I2S_PORTS(audio->channels); -- val |= AUDIO_TYPE_LPCM; -- val |= CFG_SUB_PCKT_NUM(sub_pckt_num); -- writel(val, dp->regs + SMPL2PKT_CNFG); -- -- if (audio->sample_width == 16) -- val = 0; -- else if (audio->sample_width == 24) -- val = 1 << 9; -- else -- val = 2 << 9; -- -- val |= AUDIO_CH_NUM(audio->channels); -- val |= I2S_DEC_PORT_EN(i2s_port_en_val); -- val |= TRANS_SMPL_WIDTH_32; -- writel(val, dp->regs + AUDIO_SRC_CNFG); -- -- for (i = 0; i < (audio->channels + 1) / 2; i++) { -- if (audio->sample_width == 16) -- val = (0x02 << 8) | (0x02 << 20); -- else if (audio->sample_width == 24) -- val = (0x0b << 8) | (0x0b << 20); -- -- val |= ((2 * i) << 4) | ((2 * i + 1) << 16); -- writel(val, dp->regs + STTS_BIT_CH(i)); -- } -- -- switch (audio->sample_rate) { -- case 32000: -- val = SAMPLING_FREQ(3) | -- ORIGINAL_SAMP_FREQ(0xc); -- break; -- case 44100: -- val = SAMPLING_FREQ(0) | -- ORIGINAL_SAMP_FREQ(0xf); -- break; -- case 48000: -- val = SAMPLING_FREQ(2) | -- ORIGINAL_SAMP_FREQ(0xd); -- break; -- case 88200: -- val = SAMPLING_FREQ(8) | -- ORIGINAL_SAMP_FREQ(0x7); -- break; -- case 96000: -- val = SAMPLING_FREQ(0xa) | -- ORIGINAL_SAMP_FREQ(5); -- break; -- case 176400: -- val = SAMPLING_FREQ(0xc) | -- ORIGINAL_SAMP_FREQ(3); -- break; -- case 192000: -- val = SAMPLING_FREQ(0xe) | -- ORIGINAL_SAMP_FREQ(1); -- break; -- } -- val |= 4; -- writel(val, dp->regs + COM_CH_STTS_BITS); -- -- writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL); -- writel(I2S_DEC_START, dp->regs + AUDIO_SRC_CNTL); --} -- --static void cdn_dp_audio_config_spdif(struct cdn_dp_device *dp) --{ -- u32 val; -- -- writel(SYNC_WR_TO_CH_ZERO, dp->regs + FIFO_CNTL); -- -- val = MAX_NUM_CH(2) | AUDIO_TYPE_LPCM | CFG_SUB_PCKT_NUM(4); -- writel(val, dp->regs + SMPL2PKT_CNFG); -- writel(SMPL2PKT_EN, dp->regs + SMPL2PKT_CNTL); -- -- val = SPDIF_ENABLE | SPDIF_AVG_SEL | SPDIF_JITTER_BYPASS; -- writel(val, dp->regs + SPDIF_CTRL_ADDR); -- -- clk_prepare_enable(dp->spdif_clk); -- clk_set_rate(dp->spdif_clk, CDN_DP_SPDIF_CLK); --} -- --int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio) --{ -- int ret; -- -- /* reset the spdif clk before config */ -- if (audio->format == AFMT_SPDIF) { -- reset_control_assert(dp->spdif_rst); -- reset_control_deassert(dp->spdif_rst); -- } -- -- ret = cdn_dp_reg_write(dp, CM_LANE_CTRL, LANE_REF_CYC); -- if (ret) -- goto err_audio_config; -- -- ret = cdn_dp_reg_write(dp, CM_CTRL, 0); -- if (ret) -- goto err_audio_config; -- -- if (audio->format == AFMT_I2S) -- cdn_dp_audio_config_i2s(dp, audio); -- else if (audio->format == AFMT_SPDIF) -- cdn_dp_audio_config_spdif(dp); -- -- ret = cdn_dp_reg_write(dp, AUDIO_PACK_CONTROL, AUDIO_PACK_EN); -- --err_audio_config: -- if (ret) -- DRM_DEV_ERROR(dp->dev, "audio config failed: %d\n", ret); -- return ret; --} -diff --git a/drivers/gpu/drm/rockchip/cdn-dp-reg.h b/include/drm/bridge/cdns-mhdp.h -similarity index 53% -rename from drivers/gpu/drm/rockchip/cdn-dp-reg.h -rename to include/drm/bridge/cdns-mhdp.h -index 441248b7a79e..d76716d4edc6 100644 ---- a/drivers/gpu/drm/rockchip/cdn-dp-reg.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -1,16 +1,31 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ -+/* SPDX-License-Identifier: GPL-2.0 */ - /* - * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd - * Author: Chris Zhong -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. - */ - --#ifndef _CDN_DP_REG_H --#define _CDN_DP_REG_H -+#ifndef CDNS_MHDP_H_ -+#define CDNS_MHDP_H_ - -+#include -+#include -+#include -+#include -+#include - #include - - #define ADDR_IMEM 0x10000 - #define ADDR_DMEM 0x20000 -+#define ADDR_PHY_AFE 0x80000 - - /* APB CFG addr */ - #define APB_CTRL 0 -@@ -78,6 +93,10 @@ - #define SOURCE_PIF_SW_RESET 0x30834 - - /* bellow registers need access by mailbox */ -+/* source phy comp */ -+#define PHY_DATA_SEL 0x0818 -+#define LANES_CONFIG 0x0814 -+ - /* source car addr */ - #define SOURCE_HDTX_CAR 0x0900 - #define SOURCE_DPTX_CAR 0x0904 -@@ -89,6 +108,17 @@ - #define SOURCE_CIPHER_CAR 0x0920 - #define SOURCE_CRYPTO_CAR 0x0924 - -+/* mhdp tx_top_comp */ -+#define SCHEDULER_H_SIZE 0x1000 -+#define SCHEDULER_V_SIZE 0x1004 -+#define HDTX_SIGNAL_FRONT_WIDTH 0x100c -+#define HDTX_SIGNAL_SYNC_WIDTH 0x1010 -+#define HDTX_SIGNAL_BACK_WIDTH 0x1014 -+#define HDTX_CONTROLLER 0x1018 -+#define HDTX_HPD 0x1020 -+#define HDTX_CLOCK_REG_0 0x1024 -+#define HDTX_CLOCK_REG_1 0x1028 -+ - /* clock meters addr */ - #define CM_CTRL 0x0a00 - #define CM_I2S_CTRL 0x0a04 -@@ -308,18 +338,24 @@ - #define MB_SIZE_LSB_ID 3 - #define MB_DATA_ID 4 - --#define MB_MODULE_ID_DP_TX 0x01 -+#define MB_MODULE_ID_DP_TX 0x01 -+#define MB_MODULE_ID_HDMI_TX 0x03 - #define MB_MODULE_ID_HDCP_TX 0x07 - #define MB_MODULE_ID_HDCP_RX 0x08 - #define MB_MODULE_ID_HDCP_GENERAL 0x09 --#define MB_MODULE_ID_GENERAL 0x0a -+#define MB_MODULE_ID_GENERAL 0x0A - - /* general opcode */ - #define GENERAL_MAIN_CONTROL 0x01 - #define GENERAL_TEST_ECHO 0x02 - #define GENERAL_BUS_SETTINGS 0x03 - #define GENERAL_TEST_ACCESS 0x04 -+#define GENERAL_WRITE_REGISTER 0x05 -+#define GENERAL_WRITE_FIELD 0x06 -+#define GENERAL_READ_REGISTER 0x07 -+#define GENERAL_GET_HPD_STATE 0x11 - -+/* DPTX opcode */ - #define DPTX_SET_POWER_MNG 0x00 - #define DPTX_SET_HOST_CAPABILITIES 0x01 - #define DPTX_GET_EDID 0x02 -@@ -338,12 +374,24 @@ - #define DPTX_SET_LINK_BREAK_POINT 0x0f - #define DPTX_FORCE_LANES 0x10 - #define DPTX_HPD_STATE 0x11 -+#define DPTX_ADJUST_LT 0x12 -+ -+/* HDMI TX opcode */ -+#define HDMI_TX_READ 0x00 -+#define HDMI_TX_WRITE 0x01 -+#define HDMI_TX_UPDATE_READ 0x02 -+#define HDMI_TX_EDID 0x03 -+#define HDMI_TX_EVENTS 0x04 -+#define HDMI_TX_HPD_STATUS 0x05 -+#define HDMI_TX_DEBUG_ECHO 0xAA -+#define HDMI_TX_TEST 0xBB -+#define HDMI_TX_EDID_INTERNAL 0xF0 - - #define FW_STANDBY 0 - #define FW_ACTIVE 1 - --#define DPTX_EVENT_ENABLE_HPD BIT(0) --#define DPTX_EVENT_ENABLE_TRAINING BIT(1) -+#define MHDP_EVENT_ENABLE_HPD BIT(0) -+#define MHDP_EVENT_ENABLE_TRAINING BIT(1) - - #define LINK_TRAINING_NOT_ACTIVE 0 - #define LINK_TRAINING_RUN 1 -@@ -387,7 +435,35 @@ - #define HDCP_TX_IS_RECEIVER_ID_VALID_EVENT BIT(7) - - #define TU_SIZE 30 --#define CDN_DP_MAX_LINK_RATE DP_LINK_BW_5_4 -+#define CDNS_DP_MAX_LINK_RATE 540000 -+ -+#define F_HDMI_ENCODING(x) (((x) & ((1 << 2) - 1)) << 16) -+#define F_VIF_DATA_WIDTH(x) (((x) & ((1 << 2) - 1)) << 2) -+#define F_HDMI_MODE(x) (((x) & ((1 << 2) - 1)) << 0) -+#define F_GCP_EN(x) (((x) & ((1 << 1) - 1)) << 12) -+#define F_DATA_EN(x) (((x) & ((1 << 1) - 1)) << 15) -+#define F_HDMI2_PREAMBLE_EN(x) (((x) & ((1 << 1) - 1)) << 18) -+#define F_PIC_3D(x) (((x) & ((1 << 4) - 1)) << 7) -+#define F_BCH_EN(x) (((x) & ((1 << 1) - 1)) << 11) -+#define F_SOURCE_PHY_MHDP_SEL(x) (((x) & ((1 << 2) - 1)) << 3) -+#define F_HPD_VALID_WIDTH(x) (((x) & ((1 << 12) - 1)) << 0) -+#define F_HPD_GLITCH_WIDTH(x) (((x) & ((1 << 8) - 1)) << 12) -+#define F_HDMI2_CTRL_IL_MODE(x) (((x) & ((1 << 1) - 1)) << 19) -+#define F_SOURCE_PHY_LANE0_SWAP(x) (((x) & ((1 << 2) - 1)) << 0) -+#define F_SOURCE_PHY_LANE1_SWAP(x) (((x) & ((1 << 2) - 1)) << 2) -+#define F_SOURCE_PHY_LANE2_SWAP(x) (((x) & ((1 << 2) - 1)) << 4) -+#define F_SOURCE_PHY_LANE3_SWAP(x) (((x) & ((1 << 2) - 1)) << 6) -+#define F_SOURCE_PHY_COMB_BYPASS(x) (((x) & ((1 << 1) - 1)) << 21) -+#define F_SOURCE_PHY_20_10(x) (((x) & ((1 << 1) - 1)) << 22) -+#define F_PKT_ALLOC_ADDRESS(x) (((x) & ((1 << 4) - 1)) << 0) -+#define F_ACTIVE_IDLE_TYPE(x) (((x) & ((1 << 1) - 1)) << 17) -+#define F_FIFO1_FLUSH(x) (((x) & ((1 << 1) - 1)) << 0) -+#define F_PKT_ALLOC_WR_EN(x) (((x) & ((1 << 1) - 1)) << 0) -+#define F_DATA_WR(x) (x) -+#define F_WR_ADDR(x) (((x) & ((1 << 4) - 1)) << 0) -+#define F_HOST_WR(x) (((x) & ((1 << 1) - 1)) << 0) -+#define F_TYPE_VALID(x) (((x) & ((1 << 1) - 1)) << 16) -+#define F_PACKET_TYPE(x) (((x) & ((1 << 8) - 1)) << 8) - - /* audio */ - #define AUDIO_PACK_EN BIT(8) -@@ -416,6 +492,24 @@ - /* Reference cycles when using lane clock as reference */ - #define LANE_REF_CYC 0x8000 - -+#define HOTPLUG_DEBOUNCE_MS 200 -+ -+#define IRQ_IN 0 -+#define IRQ_OUT 1 -+#define IRQ_NUM 2 -+ -+#define cdns_mhdp_plat_call(mhdp, operation) \ -+ (!(mhdp) ? -ENODEV : (((mhdp)->plat_data && (mhdp)->plat_data->operation) ? \ -+ (mhdp)->plat_data->operation(mhdp) : ENOIOCTLCMD)) -+ -+/* bus access type */ -+enum { -+ BUS_TYPE_NORMAL_APB = 0, -+ BUS_TYPE_NORMAL_SAPB = 1, -+ BUS_TYPE_LOW4K_APB = 2, -+ BUS_TYPE_LOW4K_SAPB = 3, -+}; -+ - enum voltage_swing_level { - VOLTAGE_LEVEL_0, - VOLTAGE_LEVEL_1, -@@ -451,24 +545,261 @@ enum vic_bt_type { - BT_709 = 0x1, - }; - --void cdn_dp_clock_reset(struct cdn_dp_device *dp); -+enum audio_format { -+ AFMT_I2S = 0, -+ AFMT_SPDIF_INT = 1, -+ AFMT_SPDIF_EXT = 2, -+ AFMT_UNUSED, -+}; -+ -+enum { -+ MODE_DVI, -+ MODE_HDMI_1_4, -+ MODE_HDMI_2_0, -+}; -+ -+struct audio_info { -+ enum audio_format format; -+ int sample_rate; -+ int channels; -+ int sample_width; -+ int connector_type; -+}; -+ -+enum vic_pxl_encoding_format { -+ PXL_RGB = 0x1, -+ YCBCR_4_4_4 = 0x2, -+ YCBCR_4_2_2 = 0x4, -+ YCBCR_4_2_0 = 0x8, -+ Y_ONLY = 0x10, -+}; -+ -+struct video_info { -+ bool h_sync_polarity; -+ bool v_sync_polarity; -+ bool interlaced; -+ int color_depth; -+ enum vic_pxl_encoding_format color_fmt; -+}; -+ -+struct cdns_mhdp_host { -+ unsigned int link_rate; -+ u8 lanes_cnt; -+ u8 volt_swing; -+ u8 pre_emphasis; -+ u8 pattern_supp; -+ u8 fast_link; -+ u8 lane_mapping; -+ u8 enhanced; -+}; -+ -+struct cdns_mhdp_sink { -+ unsigned int link_rate; -+ u8 lanes_cnt; -+ u8 pattern_supp; -+ u8 fast_link; -+ u8 enhanced; -+}; -+ -+struct cdns_mhdp_bridge; -+struct cdns_mhdp_connector; -+ -+struct cdns_mhdp_bridge { -+ struct cdns_mhdp_device *mhdp; -+ struct drm_bridge base; -+ int pbn; -+ int8_t stream_id; -+ struct cdns_mhdp_connector *connector; -+ bool is_active; -+}; -+ -+struct cdns_mhdp_connector { -+ struct drm_connector base; -+ bool is_mst_connector; -+ struct drm_dp_mst_port *port; -+ struct cdns_mhdp_bridge *bridge; -+}; -+ -+struct cdns_mhdp_cec { -+ struct cec_adapter *adap; -+ struct device *dev; -+ struct mutex lock; -+ -+ struct cec_msg msg; -+ struct task_struct *cec_worker; -+}; -+ -+struct cdns_plat_data { -+ /* Vendor PHY support */ -+ int (*bind)(struct platform_device *pdev, -+ struct drm_encoder *encoder, -+ struct cdns_mhdp_device *mhdp); -+ void (*unbind)(struct device *dev); -+ -+ void (*plat_init)(struct cdns_mhdp_device *mhdp); -+ void (*plat_deinit)(struct cdns_mhdp_device *mhdp); -+ -+ int (*phy_set)(struct cdns_mhdp_device *mhdp); -+ bool (*phy_video_valid)(struct cdns_mhdp_device *mhdp); -+ int (*firmware_init)(struct cdns_mhdp_device *mhdp); -+ void (*pclk_rate)(struct cdns_mhdp_device *mhdp); -+ -+ int (*suspend)(struct cdns_mhdp_device *mhdp); -+ int (*resume)(struct cdns_mhdp_device *mhdp); -+ -+ int (*power_on)(struct cdns_mhdp_device *mhdp); -+ int (*power_off)(struct cdns_mhdp_device *mhdp); -+ -+ int bus_type; -+ int video_format; -+ char is_dp; -+ char *plat_name; -+}; -+ -+struct cdns_mhdp_device { -+ void __iomem *regs_base; -+ void __iomem *regs_sec; -+ -+ int bus_type; -+ -+ struct device *dev; -+ -+ struct cdns_mhdp_connector connector; -+ struct clk *spdif_clk; -+ struct reset_control *spdif_rst; -+ -+ struct platform_device *audio_pdev; -+ struct audio_info audio_info; -+ -+ struct cdns_mhdp_bridge bridge; -+ struct phy *phy; -+ -+ struct video_info video_info; -+ struct drm_display_mode mode; -+ const struct drm_display_mode *valid_mode; -+ unsigned int fw_version; -+ -+ struct drm_dp_mst_topology_mgr mst_mgr; -+ struct delayed_work hotplug_work; -+ -+ u32 lane_mapping; -+ bool link_up; -+ bool power_up; -+ bool plugged; -+ bool force_mode_set; -+ bool is_hpd; -+ bool is_ls1028a; -+ struct mutex lock; -+ struct mutex iolock; -+ -+ int irq[IRQ_NUM]; -+ -+ union { -+ struct _dp_data { -+ u8 dpcd[DP_RECEIVER_CAP_SIZE]; -+ u32 rate; -+ u8 num_lanes; -+ struct drm_dp_aux aux; -+ struct cdns_mhdp_host host; -+ struct cdns_mhdp_sink sink; -+ bool is_mst; -+ bool can_mst; -+ } dp; -+ struct _hdmi_data { -+ struct cdns_mhdp_cec cec; -+ u32 char_rate; -+ u32 hdmi_type; -+ } hdmi; -+ }; -+ const struct cdns_plat_data *plat_data; -+ -+}; -+ -+u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset); -+void cdns_mhdp_bus_write(u32 val, struct cdns_mhdp_device *mhdp, u32 offset); -+void cdns_mhdp_clock_reset(struct cdns_mhdp_device *mhdp); -+void cdns_mhdp_set_fw_clk(struct cdns_mhdp_device *mhdp, unsigned long clk); -+u32 cdns_mhdp_get_fw_clk(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp, const u32 *i_mem, -+ u32 i_size, const u32 *d_mem, u32 d_size); -+int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable); -+int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp, bool flip); -+int cdns_mhdp_event_config(struct cdns_mhdp_device *mhdp); -+u32 cdns_mhdp_get_event(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value); -+int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp, -+ u32 addr, u8 *data, u16 len); -+int cdns_mhdp_get_edid_block(void *mhdp, u8 *edid, -+ unsigned int block, size_t length); -+int cdns_mhdp_train_link(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_set_video_status(struct cdns_mhdp_device *mhdp, int active); -+int cdns_mhdp_config_video(struct cdns_mhdp_device *mhdp); -+ -+/* Audio */ -+int cdns_mhdp_audio_stop(struct cdns_mhdp_device *mhdp, -+ struct audio_info *audio); -+int cdns_mhdp_audio_mute(struct cdns_mhdp_device *mhdp, bool enable); -+int cdns_mhdp_audio_config(struct cdns_mhdp_device *mhdp, -+ struct audio_info *audio); -+int cdns_mhdp_register_audio_driver(struct device *dev); -+void cdns_mhdp_unregister_audio_driver(struct device *dev); -+ -+int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr); -+int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u32 addr, u32 val); -+int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr, -+ u8 start_bit, u8 bits_no, u32 val); -+int cdns_mhdp_adjust_lt(struct cdns_mhdp_device *mhdp, u8 nlanes, -+ u16 udelay, u8 *lanes_data, -+ u8 *dpcd); -+ -+int cdns_mhdp_read_hpd(struct cdns_mhdp_device *mhdp); -+u32 cdns_phy_reg_read(struct cdns_mhdp_device *mhdp, u32 addr); -+int cdns_phy_reg_write(struct cdns_mhdp_device *mhdp, u32 addr, u32 val); -+int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id, -+ u8 opcode, u16 size, u8 *message); -+int cdns_mhdp_mailbox_read_receive(struct cdns_mhdp_device *mhdp, -+ u8 *buff, u16 buff_size); -+int cdns_mhdp_mailbox_validate_receive(struct cdns_mhdp_device *mhdp, -+ u8 module_id, u8 opcode, -+ u16 req_size); -+int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp); -+ -+void cdns_mhdp_infoframe_set(struct cdns_mhdp_device *mhdp, -+ u8 entry_id, u8 packet_len, u8 *packet, u8 packet_type); -+int cdns_hdmi_get_edid_block(void *data, u8 *edid, u32 block, size_t length); -+int cdns_hdmi_scdc_read(struct cdns_mhdp_device *mhdp, u8 addr, u8 *data); -+int cdns_hdmi_scdc_write(struct cdns_mhdp_device *mhdp, u8 addr, u8 value); -+int cdns_hdmi_ctrl_init(struct cdns_mhdp_device *mhdp, int protocol, u32 char_rate); -+int cdns_hdmi_mode_config(struct cdns_mhdp_device *mhdp, struct drm_display_mode *mode, -+ struct video_info *video_info); -+int cdns_hdmi_disable_gcp(struct cdns_mhdp_device *mhdp); -+int cdns_hdmi_enable_gcp(struct cdns_mhdp_device *mhdp); -+ -+bool cdns_mhdp_check_alive(struct cdns_mhdp_device *mhdp); -+ -+/* HDMI */ -+int cdns_hdmi_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp); -+void cdns_hdmi_remove(struct platform_device *pdev); -+void cdns_hdmi_unbind(struct device *dev); -+int cdns_hdmi_bind(struct platform_device *pdev, -+ struct drm_encoder *encoder, struct cdns_mhdp_device *mhdp); -+void cdns_hdmi_set_sample_rate(struct cdns_mhdp_device *mhdp, unsigned int rate); -+void cdns_hdmi_audio_enable(struct cdns_mhdp_device *mhdp); -+void cdns_hdmi_audio_disable(struct cdns_mhdp_device *mhdp); -+ -+/* DP */ -+int cdns_dp_probe(struct platform_device *pdev, -+ struct cdns_mhdp_device *mhdp); -+void cdns_dp_remove(struct platform_device *pdev); -+void cdns_dp_unbind(struct device *dev); -+int cdns_dp_bind(struct platform_device *pdev, -+ struct drm_encoder *encoder, struct cdns_mhdp_device *mhdp); -+ -+/* CEC */ -+#ifdef CONFIG_DRM_CDNS_HDMI_CEC -+int cdns_mhdp_register_cec_driver(struct device *dev); -+int cdns_mhdp_unregister_cec_driver(struct device *dev); -+#endif - --void cdn_dp_set_fw_clk(struct cdn_dp_device *dp, unsigned long clk); --int cdn_dp_load_firmware(struct cdn_dp_device *dp, const u32 *i_mem, -- u32 i_size, const u32 *d_mem, u32 d_size); --int cdn_dp_set_firmware_active(struct cdn_dp_device *dp, bool enable); --int cdn_dp_set_host_cap(struct cdn_dp_device *dp, u8 lanes, bool flip); --int cdn_dp_event_config(struct cdn_dp_device *dp); --u32 cdn_dp_get_event(struct cdn_dp_device *dp); --int cdn_dp_get_hpd_status(struct cdn_dp_device *dp); --int cdn_dp_dpcd_write(struct cdn_dp_device *dp, u32 addr, u8 value); --int cdn_dp_dpcd_read(struct cdn_dp_device *dp, u32 addr, u8 *data, u16 len); --int cdn_dp_get_edid_block(void *dp, u8 *edid, -- unsigned int block, size_t length); --int cdn_dp_train_link(struct cdn_dp_device *dp); --int cdn_dp_set_video_status(struct cdn_dp_device *dp, int active); --int cdn_dp_config_video(struct cdn_dp_device *dp); --int cdn_dp_audio_stop(struct cdn_dp_device *dp, struct audio_info *audio); --int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable); --int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio); --#endif /* _CDN_DP_REG_H */ -+#endif /* CDNS_MHDP_H_ */ --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0002-MLK-24065-1-drm-bridge-cadence-fix-dp_aux_transfer-w.patch b/projects/NXP/devices/iMX8/patches/linux/0002-MLK-24065-1-drm-bridge-cadence-fix-dp_aux_transfer-w.patch deleted file mode 100644 index 1b560edf51..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0002-MLK-24065-1-drm-bridge-cadence-fix-dp_aux_transfer-w.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 55eb19200d650ead73139ee8444db9119718fd31 Mon Sep 17 00:00:00 2001 -From: Sergey Zhuravlevich -Date: Tue, 12 May 2020 14:23:15 +0200 -Subject: [PATCH 02/49] MLK-24065-1: drm: bridge: cadence: fix dp_aux_transfer - write return value - -After exiting the loop in DP_AUX_NATIVE_WRITE it was returning 0. It's supposed -to return the number of bytes transferred on success. - -Signed-off-by: Sergey Zhuravlevich -Acked-by: Sandor Yu -Tested-By: Sandor Yu ---- - drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -index acb5c860da73..aa92029f44e9 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -@@ -67,6 +67,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *aux, - - return ret; - } -+ msg->reply = DP_AUX_NATIVE_REPLY_ACK; -+ return msg->size; - } - - if (msg->request == DP_AUX_NATIVE_READ) { --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0002-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch b/projects/NXP/devices/iMX8/patches/linux/0002-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch new file mode 100644 index 0000000000..f8fc74e5fd --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0002-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch @@ -0,0 +1,71 @@ +From 5825e6107062b231f1c7449502e04e559f8266e8 Mon Sep 17 00:00:00 2001 +From: Lucas Stach +Date: Tue, 13 Feb 2018 12:47:09 +0100 +Subject: [PATCH 1/4] arm64: dts: fsl: imx8mq-evk: enable DCSS and HDMI + +Adapted for [PATCH v16] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ +Adapted for [PATCH v19] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ + +Signed-off-by: Lucas Stach +--- + arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 31 ++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +index 7507548cdb16..267e32895aa0 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +@@ -139,6 +139,17 @@ sound-hdmi-arc { + spdif-controller = <&spdif2>; + spdif-in; + }; ++ ++ hdmi_connector: connector { ++ compatible = "hdmi-connector"; ++ label = "X11"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ }; ++ }; ++ }; + }; + + &A53_0 { +@@ -226,6 +237,32 @@ wl-reg-on-hog { + }; + }; + ++&dcss { ++ status = "okay"; ++}; ++ ++&hdmi_connector { ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&mhdp_out>; ++ }; ++ }; ++}; ++ ++&mhdp { ++ status = "okay"; ++ ports { ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ data-lanes = <0 1 2 3>; ++ }; ++ }; ++ }; ++}; ++ + &i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; +-- +2.43.0 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0003-MLK-24065-3-drm-bridge-cadence-use-the-lane-mapping-.patch b/projects/NXP/devices/iMX8/patches/linux/0003-MLK-24065-3-drm-bridge-cadence-use-the-lane-mapping-.patch deleted file mode 100644 index 76aad36aeb..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0003-MLK-24065-3-drm-bridge-cadence-use-the-lane-mapping-.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 90e1a010995c0a87b0216706b1255ca5d0c36286 Mon Sep 17 00:00:00 2001 -From: Sergey Zhuravlevich -Date: Tue, 12 May 2020 14:23:15 +0200 -Subject: [PATCH 03/49] MLK-24065-3: drm: bridge: cadence: use the lane mapping - from dt when setting host capabilities - -Signed-off-by: Sergey Zhuravlevich -Acked-by: Sandor Yu -Tested-By: Sandor Yu ---- - drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 2 +- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c | 4 ++-- - include/drm/bridge/cdns-mhdp.h | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -index aa92029f44e9..c059d56b4f46 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -@@ -152,7 +152,7 @@ static void cdns_dp_mode_set(struct cdns_mhdp_device *mhdp) - cdns_mhdp_reg_write(mhdp, LANES_CONFIG, 0x00400000 | lane_mapping); - - /* Set DP host capability */ -- ret = cdns_mhdp_set_host_cap(mhdp, false); -+ ret = cdns_mhdp_set_host_cap(mhdp); - if (ret) { - DRM_DEV_ERROR(mhdp->dev, "Failed to set host cap %d\n", ret); - return; -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index 91d1cfd4b2af..9c0a2668e494 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -438,7 +438,7 @@ int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable) - } - EXPORT_SYMBOL(cdns_mhdp_set_firmware_active); - --int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp, bool flip) -+int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp) - { - u8 msg[8]; - int ret; -@@ -449,7 +449,7 @@ int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp, bool flip) - msg[3] = PRE_EMPHASIS_LEVEL_3; - msg[4] = PTS1 | PTS2 | PTS3 | PTS4; - msg[5] = FAST_LT_NOT_SUPPORT; -- msg[6] = flip ? LANE_MAPPING_FLIPPED : LANE_MAPPING_NORMAL; -+ msg[6] = mhdp->lane_mapping; - msg[7] = ENHANCED; - - ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, -diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h -index d76716d4edc6..4dc6e428b5f7 100644 ---- a/include/drm/bridge/cdns-mhdp.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -723,7 +723,7 @@ u32 cdns_mhdp_get_fw_clk(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp, const u32 *i_mem, - u32 i_size, const u32 *d_mem, u32 d_size); - int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable); --int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp, bool flip); -+int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_event_config(struct cdns_mhdp_device *mhdp); - u32 cdns_mhdp_get_event(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value); --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0003-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch b/projects/NXP/devices/iMX8/patches/linux/0003-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch new file mode 100644 index 0000000000..d9ef1cc2b0 --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0003-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch @@ -0,0 +1,62 @@ +From 6b9309988072e3b5b7b3900a1254507316eb72cf Mon Sep 17 00:00:00 2001 +From: Lukas Rusak +Date: Tue, 9 Mar 2021 10:47:27 -0800 +Subject: [PATCH 2/4] arm64: dts: fsl: imx8mq-pico-pi: enable DCSS and HDMI + +Adapted for [PATCH v16] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ +Adapted for [PATCH v19] Initial support Cadence MHDP8501(HDMI/DP) for i.MX8MQ +--- + .../boot/dts/freescale/imx8mq-pico-pi.dts | 31 +++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts +index 89cbec5c41b2..5e2b1a84a85e 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts +@@ -54,6 +54,43 @@ ethphy0: ethernet-phy@1 { + reg = <1>; + }; + }; ++ ++ hdmi_connector: connector { ++ compatible = "hdmi-connector"; ++ label = "X11"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ }; ++ }; ++ }; ++}; ++ ++&dcss { ++ status = "okay"; ++}; ++ ++&hdmi_connector { ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&mhdp_out>; ++ }; ++ }; ++}; ++ ++&mhdp { ++ status = "okay"; ++ ports { ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ data-lanes = <0 1 2 3>; ++ }; ++ }; ++ }; + }; + + &i2c1 { +-- +2.43.0 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0004-MLK-24065-2-drm-bridge-cadence-print-error-when-cloc.patch b/projects/NXP/devices/iMX8/patches/linux/0004-MLK-24065-2-drm-bridge-cadence-print-error-when-cloc.patch deleted file mode 100644 index 23aa13e191..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0004-MLK-24065-2-drm-bridge-cadence-print-error-when-cloc.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 62c1852bc0f94efb6884d34c2c27dcf1efa3b282 Mon Sep 17 00:00:00 2001 -From: Sergey Zhuravlevich -Date: Tue, 12 May 2020 14:23:15 +0200 -Subject: [PATCH 04/49] MLK-24065-2: drm: bridge: cadence: print error when - clock recovery fails - -Signed-off-by: Sergey Zhuravlevich -Acked-by: Sandor Yu -Tested-By: Sandor Yu ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c -index f025c39d12ea..a032e19765a4 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-dp.c -@@ -106,7 +106,9 @@ static int cdns_mhdp_training_start(struct cdns_mhdp_device *mhdp) - if (ret) - goto err_training_start; - -- if (event[1] & EQ_PHASE_FINISHED) -+ if (event[1] & CLK_RECOVERY_FAILED) -+ DRM_DEV_ERROR(mhdp->dev, "clock recovery failed\n"); -+ else if (event[1] & EQ_PHASE_FINISHED) - return 0; - } - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0004-arm64-dts-fsl-imx8mq-phanbell.dts-enable-DCSS-and-HD.patch b/projects/NXP/devices/iMX8/patches/linux/0004-arm64-dts-fsl-imx8mq-phanbell.dts-enable-DCSS-and-HD.patch new file mode 100644 index 0000000000..e7d4dfd905 --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0004-arm64-dts-fsl-imx8mq-phanbell.dts-enable-DCSS-and-HD.patch @@ -0,0 +1,68 @@ +From d7a46875e8cc330cc3f1082c054ecfb0c1b32727 Mon Sep 17 00:00:00 2001 +From: Rudi Heitbaum +Date: Sun, 29 Sep 2024 21:08:57 +1000 +Subject: [PATCH 3/4] arm64: dts: fsl: imx8mq-phanbell.dts: enable DCSS and + HDMI + +--- + .../boot/dts/freescale/imx8mq-phanbell.dts | 31 +++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +index a3b9d615a3b4..deba4a6f65d5 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +@@ -46,6 +46,17 @@ fan: gpio-fan { + pinctrl-0 = <&pinctrl_gpio_fan>; + status = "okay"; + }; ++ ++ hdmi_connector: connector { ++ compatible = "hdmi-connector"; ++ label = "X11"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ }; ++ }; ++ }; + }; + + &A53_0 { +@@ -111,6 +122,32 @@ map4 { + }; + }; + ++&dcss { ++ status = "okay"; ++}; ++ ++&hdmi_connector { ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&mhdp_out>; ++ }; ++ }; ++}; ++ ++&mhdp { ++ status = "okay"; ++ ports { ++ port@1 { ++ reg = <1>; ++ ++ mhdp_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ data-lanes = <0 1 2 3>; ++ }; ++ }; ++ }; ++}; ++ + &i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; +-- +2.43.0 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0005-LF-1511-drm-cdn-cec-replace-i-with-i-in-loop.patch b/projects/NXP/devices/iMX8/patches/linux/0005-LF-1511-drm-cdn-cec-replace-i-with-i-in-loop.patch deleted file mode 100644 index d3cbe09cb7..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0005-LF-1511-drm-cdn-cec-replace-i-with-i-in-loop.patch +++ /dev/null @@ -1,37 +0,0 @@ -From eb19fd99254d6a0aa97bb08c09b9f82ebff306c5 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Jun 2020 15:32:28 +0800 -Subject: [PATCH 05/49] LF-1511: drm: cdn-cec: replace ++i with i++ in loop - -replace ++i with i++ in loop to prevent Coverity issue. -Coverity ID 9000767 - -Signed-off-by: Sandor Yu -Reviewed-by: Fancy Fang ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -index 5717bb0bcb75..029ad761606a 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -@@ -163,13 +163,13 @@ static int mhdp_cec_set_logical_addr(struct cdns_mhdp_cec *cec, u32 la) - - if (la == CEC_LOG_ADDR_INVALID) - /* invalid all LA address */ -- for (i = 0; i < CEC_MAX_LOG_ADDRS; ++i) { -+ for (i = 0; i < CEC_MAX_LOG_ADDRS; i++) { - mhdp_cec_write(cec, LOGICAL_ADDRESS_LA0 + (i * REG_ADDR_OFF), 0); - return 0; - } - - /* In fact cdns mhdp cec could support max 5 La address */ -- for (i = 0; i < CEC_MAX_LOG_ADDRS; ++i) { -+ for (i = 0; i < CEC_MAX_LOG_ADDRS; i++) { - la_reg = mhdp_cec_read(cec, LOGICAL_ADDRESS_LA0 + (i * REG_ADDR_OFF)); - /* Check LA already used */ - if (la_reg & 0x10) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0006-LF-1512-drm-cdns-mhdp-avoid-potentially-overflowing.patch b/projects/NXP/devices/iMX8/patches/linux/0006-LF-1512-drm-cdns-mhdp-avoid-potentially-overflowing.patch deleted file mode 100644 index 9e78a7707e..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0006-LF-1512-drm-cdns-mhdp-avoid-potentially-overflowing.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 09dfa5b8ba1a38050e4e95faab1cf07c6a509dad Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Jun 2020 16:05:42 +0800 -Subject: [PATCH 06/49] LF-1512: drm: cdns mhdp: avoid potentially overflowing - -covert to unsigned 64 bits to avoid potentially overflowing. -Report by Coverity ID 6652952 6652952. - -Signed-off-by: Sandor Yu -Reviewed-by: Fancy Fang ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index 9c0a2668e494..890add9b7c67 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -657,7 +657,7 @@ int cdns_mhdp_config_video(struct cdns_mhdp_device *mhdp) - */ - do { - tu_size_reg += 2; -- symbol = tu_size_reg * mode->clock * bit_per_pix; -+ symbol = (u64) tu_size_reg * mode->clock * bit_per_pix; - do_div(symbol, mhdp->dp.num_lanes * link_rate * 8); - rem = do_div(symbol, 1000); - if (tu_size_reg > 64) { --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0007-MLK-24335-drm-bridge-cdns-hdmi-support-work-in-DVI-m.patch b/projects/NXP/devices/iMX8/patches/linux/0007-MLK-24335-drm-bridge-cdns-hdmi-support-work-in-DVI-m.patch deleted file mode 100644 index 32ae11b0e6..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0007-MLK-24335-drm-bridge-cdns-hdmi-support-work-in-DVI-m.patch +++ /dev/null @@ -1,41 +0,0 @@ -From a1b02ef19cbc24603e1e212f4f4258ca2c59aaad Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Thu, 18 Jun 2020 14:18:04 +0800 -Subject: [PATCH 07/49] MLK-24335: drm: bridge: cdns: hdmi support work in DVI - mode - -hdmi support work in DVI mode. - -Signed-off-by: Sandor Yu ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index da40f62617ef..5f2442fa761f 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -32,8 +32,9 @@ static void hdmi_sink_config(struct cdns_mhdp_device *mhdp) - struct drm_scdc *scdc = &mhdp->connector.base.display_info.hdmi.scdc; - u8 buff = 0; - -- /* Default work in HDMI1.4 */ -- mhdp->hdmi.hdmi_type = MODE_HDMI_1_4; -+ /* return if hdmi work in DVI mode */ -+ if (mhdp->hdmi.hdmi_type == MODE_DVI) -+ return; - - /* check sink support SCDC or not */ - if (scdc->supported != true) { -@@ -264,6 +265,8 @@ static int cdns_hdmi_connector_get_modes(struct drm_connector *connector) - edid->header[6], edid->header[7]); - drm_connector_update_edid_property(connector, edid); - num_modes = drm_add_edid_modes(connector, edid); -+ mhdp->hdmi.hdmi_type = drm_detect_hdmi_monitor(edid) ? -+ MODE_HDMI_1_4 : MODE_DVI; - kfree(edid); - } - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0008-LF-1762-21-gpu-drm-bridge-cadence-hdmi-update-API-.m.patch b/projects/NXP/devices/iMX8/patches/linux/0008-LF-1762-21-gpu-drm-bridge-cadence-hdmi-update-API-.m.patch deleted file mode 100644 index 114fa3184b..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0008-LF-1762-21-gpu-drm-bridge-cadence-hdmi-update-API-.m.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 83f932299b9969a1823b085d2269db677362f897 Mon Sep 17 00:00:00 2001 -From: Dong Aisheng -Date: Tue, 14 Jul 2020 19:18:25 +0800 -Subject: [PATCH 08/49] LF-1762-21 gpu: drm: bridge: cadence: hdmi: update API - .mode_valid() - -API changed since: -12c683e12cd8 ("drm: bridge: Pass drm_display_info to drm_bridge_funcs .mode_valid()") - -Signed-off-by: Dong Aisheng ---- - drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 1 + - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -index c059d56b4f46..cb4897c664f0 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -@@ -256,6 +256,7 @@ static int cdns_dp_bridge_attach(struct drm_bridge *bridge, - - static enum drm_mode_status - cdns_dp_bridge_mode_valid(struct drm_bridge *bridge, -+ const struct drm_display_info *info, - const struct drm_display_mode *mode) - { - enum drm_mode_status mode_status = MODE_OK; -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 5f2442fa761f..1e5130e295f7 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -359,6 +359,7 @@ static int cdns_hdmi_bridge_attach(struct drm_bridge *bridge, - - static enum drm_mode_status - cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, -+ const struct drm_display_info *info, - const struct drm_display_mode *mode) - { - struct cdns_mhdp_device *mhdp = bridge->driver_private; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0009-LF-2271-1-drm-bridge-cdns-Use-colorspace-connector-p.patch b/projects/NXP/devices/iMX8/patches/linux/0009-LF-2271-1-drm-bridge-cdns-Use-colorspace-connector-p.patch deleted file mode 100644 index 0c1a6a7166..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0009-LF-2271-1-drm-bridge-cdns-Use-colorspace-connector-p.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 150d291f3e5cb47a97790b89e79d8f1a5aa797dd Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Fri, 28 Aug 2020 10:26:31 +0300 -Subject: [PATCH 09/49] LF-2271-1: drm/bridge/cdns: Use colorspace connector - property for imx8mq - -This patch achieves 2 goals: - * Make use of colorspace property when setting up the color_depth and - color_fmt. The userspace can now choose which colorspace to use by changing - the colorspace property; - * Do not use drm_display_mode private_flags to signal CRTC which pixel encoding - is being used by connector. Upstream is getting rid of 'private_flags' usage - and the declaration will probably be removed in the next release; - -Signed-off-by: Laurentiu Palcu -Reviewed-by: Robert Chiras ---- - .../gpu/drm/bridge/cadence/cdns-hdmi-core.c | 58 ++++++++++++------- - 1 file changed, 36 insertions(+), 22 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 1e5130e295f7..2796252adf68 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -412,6 +412,7 @@ bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, - struct drm_display_mode *adjusted_mode) - { - struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_connector_state *conn_state = mhdp->connector.base.state; - struct drm_display_info *di = &mhdp->connector.base.display_info; - struct video_info *video = &mhdp->video_info; - int vic = drm_match_cea_mode(mode); -@@ -428,36 +429,49 @@ bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, - } - - /* imx8mq */ -- if (vic == 97 || vic == 96) { -- if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36) -- video->color_depth = 12; -- else if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30) -- video->color_depth = 10; -- -- if (drm_mode_is_420_only(di, mode) || -- (drm_mode_is_420_also(di, mode) && -- video->color_depth > 8)) { -+ if (conn_state->colorspace == DRM_MODE_COLORIMETRY_DEFAULT) -+ return !drm_mode_is_420_only(di, mode); -+ -+ if (conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_RGB) { -+ if (drm_mode_is_420_only(di, mode)) -+ return false; -+ -+ /* 10b RGB is not supported for following VICs */ -+ if (vic == 97 || vic == 96 || vic == 95 || vic == 93 || vic == 94) -+ return false; -+ -+ video->color_depth = 10; -+ -+ return true; -+ } -+ -+ if (conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_CYCC || -+ conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_YCC) { -+ if (drm_mode_is_420_only(di, mode)) { - video->color_fmt = YCBCR_4_2_0; - -- adjusted_mode->private_flags = 1; -+ if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_36) -+ video->color_depth = 12; -+ else if (di->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30) -+ video->color_depth = 10; -+ else -+ return false; -+ - return true; - } - -- video->color_depth = 8; -- return true; -- } -+ video->color_fmt = YCBCR_4_2_2; -+ -+ if (!(di->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36)) -+ return false; - -- /* Any defined maximum tmds clock limit we must not exceed*/ -- if ((di->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36) && -- (mode->clock * 3 / 2 <= di->max_tmds_clock)) - video->color_depth = 12; -- else if ((di->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) && -- (mode->clock * 5 / 4 <= di->max_tmds_clock)) -- video->color_depth = 10; - -- /* 10-bit color depth for the following modes is not supported */ -- if ((vic == 95 || vic == 94 || vic == 93) && video->color_depth == 10) -- video->color_depth = 8; -+ return true; -+ } -+ -+ video->color_fmt = drm_mode_is_420_only(di, mode) ? YCBCR_4_2_0 : YCBCR_4_4_4; -+ video->color_depth = 8; - - return true; - } --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0009-arm64-pci-add-ext_osc.patch b/projects/NXP/devices/iMX8/patches/linux/0009-arm64-pci-add-ext_osc.patch new file mode 100644 index 0000000000..7dfe3a4bdf --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0009-arm64-pci-add-ext_osc.patch @@ -0,0 +1,35 @@ +From 4e40d36940e9d5159ba8a72e4ad04580025d5b94 Mon Sep 17 00:00:00 2001 +From: Rudi Heitbaum +Date: Tue, 1 Oct 2024 14:28:57 +0000 +Subject: [PATCH] arm64: pci: add ext_osc + +ext_osc from https://lore.kernel.org/lkml/1552467452-538-2-git-send-email-hongxing.zhu@nxp.com/ +--- + drivers/pci/controller/dwc/pci-imx6.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c +index 74703362aeec..603ca50229ec 100644 +--- a/drivers/pci/controller/dwc/pci-imx6.c ++++ b/drivers/pci/controller/dwc/pci-imx6.c +@@ -90,6 +90,7 @@ struct imx_pcie { + u32 tx_deemph_gen2_6db; + u32 tx_swing_full; + u32 tx_swing_low; ++ u32 ext_osc; + struct regulator *vpcie; + struct regulator *vph; + void __iomem *phy_base; +@@ -1287,6 +1288,9 @@ static int imx_pcie_probe(struct platform_device *pdev) + if (IS_ERR(pci->dbi_base)) + return PTR_ERR(pci->dbi_base); + ++ if (of_property_read_u32(node, "ext_osc", &imx_pcie->ext_osc) < 0) ++ imx_pcie->ext_osc = 0; ++ + /* Fetch GPIOs */ + imx_pcie->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0); + imx_pcie->gpio_active_high = of_property_read_bool(node, +-- +2.43.0 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0010-MLK-24770-drm-mhdp-Sync-DPTX-capability-with-Cadence.patch b/projects/NXP/devices/iMX8/patches/linux/0010-MLK-24770-drm-mhdp-Sync-DPTX-capability-with-Cadence.patch deleted file mode 100644 index efc243e6f3..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0010-MLK-24770-drm-mhdp-Sync-DPTX-capability-with-Cadence.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 04a71f1da60e51f277d4979c698e52cacb028666 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Mon, 14 Sep 2020 15:06:35 +0800 -Subject: [PATCH 10/49] MLK-24770: drm: mhdp: Sync DPTX capability with Cadence - sample code - -Sync the max vswing and pre-emphasis setting with Cadence sample code. -The max vswing is VOLTAGE_LEVEL_3 and -the max pre-emphasis is PRE_EMPHASIS_LEVEL_2 now. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index 890add9b7c67..2043016f176b 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -445,8 +445,8 @@ int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp) - - msg[0] = drm_dp_link_rate_to_bw_code(mhdp->dp.rate); - msg[1] = mhdp->dp.num_lanes | SCRAMBLER_EN; -- msg[2] = VOLTAGE_LEVEL_2; -- msg[3] = PRE_EMPHASIS_LEVEL_3; -+ msg[2] = VOLTAGE_LEVEL_3; -+ msg[3] = PRE_EMPHASIS_LEVEL_2; - msg[4] = PTS1 | PTS2 | PTS3 | PTS4; - msg[5] = FAST_LT_NOT_SUPPORT; - msg[6] = mhdp->lane_mapping; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0011-MLK-24520-drm-bridge-cdns-increase-maximum-width-fro.patch b/projects/NXP/devices/iMX8/patches/linux/0011-MLK-24520-drm-bridge-cdns-increase-maximum-width-fro.patch deleted file mode 100644 index baf7c0f9dc..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0011-MLK-24520-drm-bridge-cdns-increase-maximum-width-fro.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 11b66e4bdb8ba6dc4e6981ecef69534c3d6d8df8 Mon Sep 17 00:00:00 2001 -From: "Oliver F. Brown" -Date: Thu, 23 Jul 2020 18:24:23 -0500 -Subject: [PATCH 11/49] MLK-24520: drm: bridge: cdns: increase maximum width - from 4096 to 5120. - -This patch increases the maximum width to 5120. - -Signed-off-by: Oliver F. Brown -Reviewed-by: Liu Ying ---- - drivers/gpu/drm/bridge/cadence/cdns-dp-core.c | 4 ++-- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -index cb4897c664f0..0f2a38d19a57 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-dp-core.c -@@ -270,8 +270,8 @@ cdns_dp_bridge_mode_valid(struct drm_bridge *bridge, - if (mode->clock > 594000) - return MODE_CLOCK_HIGH; - -- /* 4096x2160 is not supported now */ -- if (mode->hdisplay > 3840) -+ /* 5120 x 2160 is the maximum supported resulution */ -+ if (mode->hdisplay > 5120) - return MODE_BAD_HVALUE; - - if (mode->vdisplay > 2160) -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 2796252adf68..442df6284c49 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -375,8 +375,8 @@ cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, - if (mode->clock > 594000) - return MODE_CLOCK_HIGH; - -- /* 4096x2160 is not supported */ -- if (mode->hdisplay > 3840 || mode->vdisplay > 2160) -+ /* 5120 x 2160 is the maximum supported resolution */ -+ if (mode->hdisplay > 5120 || mode->vdisplay > 2160) - return MODE_BAD_HVALUE; - - mhdp->valid_mode = mode; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0011-imx8mq-phanbell.dts-Enable-Coral-specifics-e.g.-PCIE.patch b/projects/NXP/devices/iMX8/patches/linux/0011-imx8mq-phanbell.dts-Enable-Coral-specifics-e.g.-PCIE.patch new file mode 100644 index 0000000000..e582fb6e5e --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0011-imx8mq-phanbell.dts-Enable-Coral-specifics-e.g.-PCIE.patch @@ -0,0 +1,226 @@ +From 2806bcdfbe52eeba6d09d3a952e270bdba4b8f19 Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Tue, 7 Mar 2023 21:02:46 -0800 +Subject: [PATCH] imx8mq-phanbell.dts: Enable Coral specifics e.g. PCIE + +Signed-off-by: Khem Raj +--- + .../boot/dts/freescale/imx8mq-phanbell.dts | 155 +++++++++++++++++- + 1 file changed, 154 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +index a3b9d615a3b4..5ce4fc21443e 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +@@ -21,6 +21,10 @@ memory@40000000 { + reg = <0x00000000 0x40000000 0 0x40000000>; + }; + ++ busfreq { ++ status = "disabled"; ++ }; ++ + pmic_osc: clock-pmic { + compatible = "fixed-clock"; + #clock-cells = <0>; +@@ -46,6 +50,12 @@ fan: gpio-fan { + pinctrl-0 = <&pinctrl_gpio_fan>; + status = "okay"; + }; ++ ++ pcie1_refclk: pcie1-refclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <100000000>; ++ }; + }; + + &A53_0 { +@@ -111,6 +121,17 @@ map4 { + }; + }; + ++&gpio3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wifi_reset>; ++ ++ wl-reg-on { ++ gpio-hog; ++ gpios = <11 GPIO_ACTIVE_HIGH>; ++ output-high; ++ }; ++}; ++ + &i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; +@@ -126,7 +147,7 @@ pmic: pmic@4b { + clocks = <&pmic_osc>; + clock-output-names = "pmic_clk"; + interrupt-parent = <&gpio1>; +- interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ interrupts = <3 GPIO_ACTIVE_LOW>; + + regulators { + buck1: BUCK1 { +@@ -259,6 +280,70 @@ ldo7: LDO7 { + }; + }; + ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++}; ++ ++&pcie0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie0>; ++ reset-gpio = <&gpio3 10 GPIO_ACTIVE_LOW>; ++ clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>, ++ <&clk IMX8MQ_CLK_PCIE1_AUX>, ++ <&clk IMX8MQ_CLK_PCIE1_PHY>, ++ <&clk IMX8MQ_CLK_DUMMY>; ++ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; ++ fsl,max-link-speed = <1>; ++ ext_osc = <0>; ++ hard-wired = <1>; ++ status = "okay"; ++}; ++ ++&pcie1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie1>; ++ reset-gpio = <&gpio3 18 GPIO_ACTIVE_LOW>; ++ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, ++ <&clk IMX8MQ_CLK_PCIE2_AUX>, ++ <&clk IMX8MQ_CLK_PCIE2_PHY>, ++ <&pcie1_refclk>; ++ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; ++ ext_osc = <1>; ++ hard-wired = <1>; ++ status = "okay"; ++}; ++ ++&ecspi1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; ++ cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, ++ <&gpio3 2 GPIO_ACTIVE_HIGH>; ++ num-cs = <2>; ++ status = "okay"; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; ++ ++ spidev@1 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <1>; ++ }; ++}; ++ + &fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; +@@ -333,6 +418,54 @@ &wdog1 { + }; + + &iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ pinctrl_hog: hoggrp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x05 ++ MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 ++ MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 ++ MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 ++ MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 ++ MX8MQ_IOMUXC_NAND_DATA07_GPIO3_IO13 0x19 ++ MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 ++ MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17 0x19 ++ MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x19 ++ MX8MQ_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x19 ++ MX8MQ_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19 ++ >; ++ }; ++ ++ pinctrl_pcie0: pcie0grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x76 ++ MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x16 ++ >; ++ }; ++ ++ pinctrl_pcie1: pcie1grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_I2C4_SDA_PCIE2_CLKREQ_B 0x76 ++ MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18 0x19 ++ >; ++ }; ++ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 ++ MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 ++ MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 ++ >; ++ }; ++ ++ pinctrl_ecspi1_cs: ecspi1_cs_grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x82 ++ MX8MQ_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x82 ++ >; ++ }; ++ + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 +@@ -366,6 +499,20 @@ MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f + >; + }; + ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f ++ MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f ++ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f ++ >; ++ }; ++ + pinctrl_pmic: pmicirqgrp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 +@@ -478,4 +625,10 @@ pinctrl_wdog: wdoggrp { + MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; ++ ++ pinctrl_wifi_reset: wifiresetgrp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x16 ++ >; ++ }; + }; +-- +2.39.2 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0012-MLK-24521-drm-bridge-hdmi-Prevent-the-driver-from-re.patch b/projects/NXP/devices/iMX8/patches/linux/0012-MLK-24521-drm-bridge-hdmi-Prevent-the-driver-from-re.patch deleted file mode 100644 index 00199349fd..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0012-MLK-24521-drm-bridge-hdmi-Prevent-the-driver-from-re.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 4cb4fe3262fbbf6b31731b6b076698bcf951b9a1 Mon Sep 17 00:00:00 2001 -From: "Oliver F. Brown" -Date: Fri, 24 Jul 2020 14:28:05 -0500 -Subject: [PATCH 12/49] MLK-24521: drm: bridge: hdmi: Prevent the driver from - rejecting VIC 0 modes - -iMX8QM can support the non CEA modes, iMX8M cannot support non CEA modes. -So driver should allow non CEA modes for iMX8QM. - -Signed-off-by: Oliver F. Brown -Reviewed-by: Liu Ying ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 442df6284c49..a8fa559de9e9 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -364,6 +364,7 @@ cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, - { - struct cdns_mhdp_device *mhdp = bridge->driver_private; - enum drm_mode_status mode_status = MODE_OK; -+ u32 vic; - int ret; - - /* We don't support double-clocked and Interlaced modes */ -@@ -379,6 +380,13 @@ cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge, - if (mode->hdisplay > 5120 || mode->vdisplay > 2160) - return MODE_BAD_HVALUE; - -+ /* imx8mq-hdmi does not support non CEA modes */ -+ if (!strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) { -+ vic = drm_match_cea_mode(mode); -+ if (vic == 0) -+ return MODE_BAD; -+ } -+ - mhdp->valid_mode = mode; - ret = cdns_mhdp_plat_call(mhdp, phy_video_valid); - if (ret == false) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0013-MLK-23642-1-drm-bridge-cadence-support-HBR-and-6-cha.patch b/projects/NXP/devices/iMX8/patches/linux/0013-MLK-23642-1-drm-bridge-cadence-support-HBR-and-6-cha.patch deleted file mode 100644 index 7c97e9aabe..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0013-MLK-23642-1-drm-bridge-cadence-support-HBR-and-6-cha.patch +++ /dev/null @@ -1,116 +0,0 @@ -From cd7804fc3777e0b53d69d34058fee39accc72072 Mon Sep 17 00:00:00 2001 -From: Shengjiu Wang -Date: Wed, 29 Apr 2020 17:34:07 +0800 -Subject: [PATCH 13/49] MLK-23642-1: drm: bridge: cadence: support HBR and 6 - channel - -Support HBR and 6 channel. - -For HBR, it only support compressed bitstream, sample rate -is 192kHz, and 8 channels. - -Signed-off-by: Shengjiu Wang -Reviewed-by: Viorel Suman ---- - .../gpu/drm/bridge/cadence/cdns-mhdp-audio.c | 33 ++++++++++++++----- - include/drm/bridge/cdns-mhdp.h | 1 + - 2 files changed, 26 insertions(+), 8 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -index 86174fb633bc..fa1dcf781539 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -@@ -72,6 +72,8 @@ static void hdmi_audio_avi_set(struct cdns_mhdp_device *mhdp, - frame.channel_allocation = 0; - else if (channels == 4) - frame.channel_allocation = 0x3; -+ else if (channels == 6) -+ frame.channel_allocation = 0xB; - else if (channels == 8) - frame.channel_allocation = 0x13; - -@@ -143,26 +145,38 @@ static void cdns_mhdp_audio_config_i2s(struct cdns_mhdp_device *mhdp, - { - int sub_pckt_num = 1, i2s_port_en_val = 0xf, i; - int idx = select_N_index(mhdp->mode.clock); -+ int numofchannels = audio->channels; - u32 val, ncts; -+ u32 disable_port3 = 0; -+ u32 audio_type = 0x2; /* L-PCM */ -+ u32 transmission_type = 0; /* not required for L-PCM */ - -- if (audio->channels == 2) { -+ if (numofchannels == 2) { - if (mhdp->dp.num_lanes == 1) - sub_pckt_num = 2; - else - sub_pckt_num = 4; - - i2s_port_en_val = 1; -- } else if (audio->channels == 4) { -+ } else if (numofchannels == 4) { - i2s_port_en_val = 3; -+ } else if (numofchannels == 6) { -+ numofchannels = 8; -+ disable_port3 = 1; -+ } else if ((numofchannels == 8) && (audio->non_pcm)) { -+ audio_type = 0x9; /* HBR packet type */ -+ transmission_type = 0x9; /* HBR packet type */ - } - - cdns_mhdp_bus_write(0x0, mhdp, SPDIF_CTRL_ADDR); - -- cdns_mhdp_bus_write(SYNC_WR_TO_CH_ZERO, mhdp, FIFO_CNTL); -+ val = SYNC_WR_TO_CH_ZERO; -+ val |= disable_port3 << 4; -+ cdns_mhdp_bus_write(val, mhdp, FIFO_CNTL); - -- val = MAX_NUM_CH(audio->channels); -- val |= NUM_OF_I2S_PORTS(audio->channels); -- val |= AUDIO_TYPE_LPCM; -+ val = MAX_NUM_CH(numofchannels); -+ val |= NUM_OF_I2S_PORTS(numofchannels); -+ val |= audio_type << 7; - val |= CFG_SUB_PCKT_NUM(sub_pckt_num); - cdns_mhdp_bus_write(val, mhdp, SMPL2PKT_CNFG); - -@@ -173,12 +187,13 @@ static void cdns_mhdp_audio_config_i2s(struct cdns_mhdp_device *mhdp, - else - val = 2 << 9; - -- val |= AUDIO_CH_NUM(audio->channels); -+ val |= AUDIO_CH_NUM(numofchannels); - val |= I2S_DEC_PORT_EN(i2s_port_en_val); - val |= TRANS_SMPL_WIDTH_32; -+ val |= transmission_type << 13; - cdns_mhdp_bus_write(val, mhdp, AUDIO_SRC_CNFG); - -- for (i = 0; i < (audio->channels + 1) / 2; i++) { -+ for (i = 0; i < (numofchannels + 1) / 2; i++) { - if (audio->sample_width == 16) - val = (0x02 << 8) | (0x02 << 20); - else if (audio->sample_width == 24) -@@ -323,6 +338,8 @@ static int audio_hw_params(struct device *dev, void *data, - goto out; - } - -+ audio.non_pcm = params->iec.status[0] & IEC958_AES0_NONAUDIO; -+ - ret = cdns_mhdp_audio_config(mhdp, &audio); - if (!ret) - mhdp->audio_info = audio; -diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h -index 4dc6e428b5f7..1f8fd024cdfa 100644 ---- a/include/drm/bridge/cdns-mhdp.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -564,6 +564,7 @@ struct audio_info { - int channels; - int sample_width; - int connector_type; -+ bool non_pcm; - }; - - enum vic_pxl_encoding_format { --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0013-PCI-imx-Use-the-external-clock-as-REF_CLK-when-neede.patch b/projects/NXP/devices/iMX8/patches/linux/0013-PCI-imx-Use-the-external-clock-as-REF_CLK-when-neede.patch new file mode 100644 index 0000000000..e81679e278 --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0013-PCI-imx-Use-the-external-clock-as-REF_CLK-when-neede.patch @@ -0,0 +1,41 @@ +From dd3d8c2c0b77eb742b288cf83e4849f87c8db5c6 Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Tue, 7 Mar 2023 21:19:36 -0800 +Subject: [PATCH 3/4] PCI: imx: Use the external clock as REF_CLK when needed + for i.MX8MQ + +Do not use the external clock when the internal PLL is used as PCIe +REF_CLK. + +Signed-off-by: Ryosuke Saito +Signed-off-by: Khem Raj +--- + drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c +index 3a8350cad812..841af6f55c7d 100644 +--- a/drivers/pci/controller/dwc/pci-imx6.c ++++ b/drivers/pci/controller/dwc/pci-imx6.c +@@ -370,11 +370,13 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) + + static int imx8mq_pcie_init_phy(struct imx_pcie *imx_pcie) + { +- /* TODO: This code assumes external oscillator is being used */ +- regmap_update_bits(imx_pcie->iomuxc_gpr, +- imx_pcie_grp_offset(imx_pcie), +- IMX8MQ_GPR_PCIE_REF_USE_PAD, +- IMX8MQ_GPR_PCIE_REF_USE_PAD); ++ if (imx_pcie->ext_osc) { ++ /* Use the external oscillator as REF clock */ ++ regmap_update_bits(imx_pcie->iomuxc_gpr, ++ imx_pcie_grp_offset(imx_pcie), ++ IMX8MQ_GPR_PCIE_REF_USE_PAD, ++ IMX8MQ_GPR_PCIE_REF_USE_PAD); ++ } + /* + * Per the datasheet, the PCIE_VPH is suggested to be 1.8V. If the + * PCIE_VPH is supplied by 3.3V, the VREG_BYPASS should be cleared +-- +2.39.2 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0014-MLK-24611-2-drm-bridge-cdns-Add-callback-function-fo.patch b/projects/NXP/devices/iMX8/patches/linux/0014-MLK-24611-2-drm-bridge-cdns-Add-callback-function-fo.patch deleted file mode 100644 index 1b2c1413b0..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0014-MLK-24611-2-drm-bridge-cdns-Add-callback-function-fo.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 46bf1dc2ba34440e8f83b3f70e3e4d6b3f9e6183 Mon Sep 17 00:00:00 2001 -From: Shengjiu Wang -Date: Mon, 31 Aug 2020 14:50:29 +0800 -Subject: [PATCH 14/49] MLK-24611-2: drm: bridge: cdns: Add callback function - for plug/unplug event - -cdns-hdmi-core exports a function cdns_hdmi_set_plugged_cb so -platform device can register the callback - -implement hook_plugged_cb to register callback function for hdmi cable -plug/unplug event. - -Signed-off-by: Shengjiu Wang -Reviewed-by: Sandor Yu ---- - .../gpu/drm/bridge/cadence/cdns-hdmi-core.c | 41 +++++++++++++++++-- - .../gpu/drm/bridge/cadence/cdns-mhdp-audio.c | 10 +++++ - include/drm/bridge/cdns-mhdp.h | 6 +++ - 3 files changed, 54 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index a8fa559de9e9..5890da8aa1a1 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -225,11 +225,35 @@ void cdns_hdmi_mode_set(struct cdns_mhdp_device *mhdp) - } - } - -+static void handle_plugged_change(struct cdns_mhdp_device *mhdp, bool plugged) -+{ -+ if (mhdp->plugged_cb && mhdp->codec_dev) -+ mhdp->plugged_cb(mhdp->codec_dev, plugged); -+} -+ -+int cdns_hdmi_set_plugged_cb(struct cdns_mhdp_device *mhdp, -+ hdmi_codec_plugged_cb fn, -+ struct device *codec_dev) -+{ -+ bool plugged; -+ -+ mutex_lock(&mhdp->lock); -+ mhdp->plugged_cb = fn; -+ mhdp->codec_dev = codec_dev; -+ plugged = mhdp->last_connector_result == connector_status_connected; -+ handle_plugged_change(mhdp, plugged); -+ mutex_unlock(&mhdp->lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(cdns_hdmi_set_plugged_cb); -+ - static enum drm_connector_status - cdns_hdmi_connector_detect(struct drm_connector *connector, bool force) - { - struct cdns_mhdp_device *mhdp = - container_of(connector, struct cdns_mhdp_device, connector.base); -+ enum drm_connector_status result; - - u8 hpd = 0xf; - -@@ -237,15 +261,25 @@ cdns_hdmi_connector_detect(struct drm_connector *connector, bool force) - - if (hpd == 1) - /* Cable Connected */ -- return connector_status_connected; -+ result = connector_status_connected; - else if (hpd == 0) - /* Cable Disconnedted */ -- return connector_status_disconnected; -+ result = connector_status_disconnected; - else { - /* Cable status unknown */ - DRM_INFO("Unknow cable status, hdp=%u\n", hpd); -- return connector_status_unknown; -+ result = connector_status_unknown; -+ } -+ -+ mutex_lock(&mhdp->lock); -+ if (result != mhdp->last_connector_result) { -+ handle_plugged_change(mhdp, -+ result == connector_status_connected); -+ mhdp->last_connector_result = result; - } -+ mutex_unlock(&mhdp->lock); -+ -+ return result; - } - - static int cdns_hdmi_connector_get_modes(struct drm_connector *connector) -@@ -624,6 +658,7 @@ static int __cdns_hdmi_probe(struct platform_device *pdev, - #ifdef CONFIG_OF - mhdp->bridge.base.of_node = dev->of_node; - #endif -+ mhdp->last_connector_result = connector_status_disconnected; - - memset(&pdevinfo, 0, sizeof(pdevinfo)); - pdevinfo.parent = dev; -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -index fa1dcf781539..f4f3f9ca437c 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -@@ -380,11 +380,21 @@ static int audio_get_eld(struct device *dev, void *data, - return 0; - } - -+static int audio_hook_plugged_cb(struct device *dev, void *data, -+ hdmi_codec_plugged_cb fn, -+ struct device *codec_dev) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ return cdns_hdmi_set_plugged_cb(mhdp, fn, codec_dev); -+} -+ - static const struct hdmi_codec_ops audio_codec_ops = { - .hw_params = audio_hw_params, - .audio_shutdown = audio_shutdown, - .digital_mute = audio_digital_mute, - .get_eld = audio_get_eld, -+ .hook_plugged_cb = audio_hook_plugged_cb, - }; - - int cdns_mhdp_register_audio_driver(struct device *dev) -diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h -index 1f8fd024cdfa..6bfd82a3d9a2 100644 ---- a/include/drm/bridge/cdns-mhdp.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -22,6 +22,7 @@ - #include - #include - #include -+#include - - #define ADDR_IMEM 0x10000 - #define ADDR_DMEM 0x20000 -@@ -714,6 +715,9 @@ struct cdns_mhdp_device { - }; - const struct cdns_plat_data *plat_data; - -+ hdmi_codec_plugged_cb plugged_cb; -+ struct device *codec_dev; -+ enum drm_connector_status last_connector_result; - }; - - u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset); -@@ -796,6 +800,8 @@ void cdns_dp_remove(struct platform_device *pdev); - void cdns_dp_unbind(struct device *dev); - int cdns_dp_bind(struct platform_device *pdev, - struct drm_encoder *encoder, struct cdns_mhdp_device *mhdp); -+int cdns_hdmi_set_plugged_cb(struct cdns_mhdp_device *mhdp, hdmi_codec_plugged_cb fn, -+ struct device *codec_dev); - - /* CEC */ - #ifdef CONFIG_DRM_CDNS_HDMI_CEC --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0014-PCI-imx-Provide-a-clock-to-the-device-for-i.MX8MQ.patch b/projects/NXP/devices/iMX8/patches/linux/0014-PCI-imx-Provide-a-clock-to-the-device-for-i.MX8MQ.patch new file mode 100644 index 0000000000..a65dd7ae83 --- /dev/null +++ b/projects/NXP/devices/iMX8/patches/linux/0014-PCI-imx-Provide-a-clock-to-the-device-for-i.MX8MQ.patch @@ -0,0 +1,69 @@ +From 0845d9b5935ad8b3d450c2dfa62631c9c1df1bea Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Tue, 7 Mar 2023 21:21:57 -0800 +Subject: [PATCH 4/4] PCI: imx: Provide a clock to the device for i.MX8MQ + +When the internal PLL is configured as PCIe REF_CLK, we also have to +output a clock via CLK2_P/N pin to the connector/device to provide it. +Configure 100 MHz clock as its output. + +Signed-off-by: Ryosuke Saito +Signed-off-by: Khem Raj +--- + drivers/pci/controller/dwc/pci-imx6.c | 35 +++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c +index 841af6f55c7d..ac36c7035460 100644 +--- a/drivers/pci/controller/dwc/pci-imx6.c ++++ b/drivers/pci/controller/dwc/pci-imx6.c +@@ -43,6 +43,11 @@ struct imx6_pcie { + #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11) + #define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12) + #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8) ++#define IMX8MQ_ANA_PLLOUT_MONITOR_CFG_REG 0x74 ++#define IMX8MQ_ANA_PLLOUT_MONITOR_CLK_SEL_MASK GENMASK(3, 0) ++#define IMX8MQ_ANA_PLLOUT_MONITOR_CKE BIT(4) ++#define IMX8MQ_ANA_SCCG_PLLOUT_DIV_CFG_REG 0x7C ++#define IMX8MQ_ANA_SCCG_SYSPLLL1_DIV_MASK GENMASK(2, 0) + + #define IMX95_PCIE_PHY_GEN_CTRL 0x0 + #define IMX95_PCIE_REF_USE_PAD BIT(17) +@@ -370,6 +370,34 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) + imx_pcie_grp_offset(imx_pcie), + IMX8MQ_GPR_PCIE_REF_USE_PAD, + IMX8MQ_GPR_PCIE_REF_USE_PAD); ++ } else { ++ /* ++ * Use the internal PLL as REF clock and also ++ * provide a clock to the device. ++ */ ++ struct regmap *anatop = ++ syscon_regmap_lookup_by_compatible("fsl,imx8mq-anatop"); ++ ++ if (IS_ERR(anatop)) { ++ dev_err(imx_pcie->pci->dev, ++ "Couldn't configure the internal PLL as REF clock\n"); ++ } else { ++ /* Select SYSTEM_PLL1_CLK as the clock source */ ++ regmap_update_bits(anatop, IMX8MQ_ANA_PLLOUT_MONITOR_CFG_REG, ++ IMX8MQ_ANA_PLLOUT_MONITOR_CLK_SEL_MASK, 0xb); ++ ++ /* ++ * SYSTEM_PLL1_CLK is 800 MHz, so divided by 8 ++ * for generating 100 MHz as output. ++ */ ++ regmap_update_bits(anatop, IMX8MQ_ANA_SCCG_PLLOUT_DIV_CFG_REG, ++ IMX8MQ_ANA_SCCG_SYSPLLL1_DIV_MASK, 0x7); ++ ++ /* Enable CLK2_P/N clock to provide it to the device */ ++ regmap_update_bits(anatop, IMX8MQ_ANA_PLLOUT_MONITOR_CFG_REG, ++ IMX8MQ_ANA_PLLOUT_MONITOR_CKE, ++ IMX8MQ_ANA_PLLOUT_MONITOR_CKE); ++ } + } + /* + * Regarding the datasheet, the PCIE_VPH is suggested to be 1.8V. If the PCIE_VPH is +-- +2.39.2 + diff --git a/projects/NXP/devices/iMX8/patches/linux/0015-gpu-drm-dridge-hdp-audio-change-to-mute_stream.patch b/projects/NXP/devices/iMX8/patches/linux/0015-gpu-drm-dridge-hdp-audio-change-to-mute_stream.patch deleted file mode 100644 index 9745c16806..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0015-gpu-drm-dridge-hdp-audio-change-to-mute_stream.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 1b0a179061890c0a2f6748426f03e8cd2176d3e2 Mon Sep 17 00:00:00 2001 -From: Dong Aisheng -Date: Wed, 5 Aug 2020 21:31:04 +0800 -Subject: [PATCH 15/49] gpu: drm: dridge: hdp-audio: change to mute_stream - -To cope with upstream API change: -e2978c45e5ed ("ASoC: soc-dai: remove .digital_mute") - -Signed-off-by: Dong Aisheng ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -index f4f3f9ca437c..85f526175439 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-audio.c -@@ -358,8 +358,8 @@ static void audio_shutdown(struct device *dev, void *data) - mhdp->audio_info.format = AFMT_UNUSED; - } - --static int audio_digital_mute(struct device *dev, void *data, -- bool enable) -+static int audio_mute_stream(struct device *dev, void *data, -+ bool enable, int direction) - { - struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); - int ret; -@@ -392,9 +392,10 @@ static int audio_hook_plugged_cb(struct device *dev, void *data, - static const struct hdmi_codec_ops audio_codec_ops = { - .hw_params = audio_hw_params, - .audio_shutdown = audio_shutdown, -- .digital_mute = audio_digital_mute, -+ .mute_stream = audio_mute_stream, - .get_eld = audio_get_eld, - .hook_plugged_cb = audio_hook_plugged_cb, -+ .no_capture_mute = 1, - }; - - int cdns_mhdp_register_audio_driver(struct device *dev) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0016-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch b/projects/NXP/devices/iMX8/patches/linux/0016-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch deleted file mode 100644 index 6be40ad2f3..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0016-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 4a406e182a709718a769c37d33530ed2e6b23b39 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Tue, 17 Nov 2020 15:47:36 +0800 -Subject: [PATCH 16/49] LF-2744: drm: cdns: reset force_mode_set flag in - atomic_check - -Reset force_mode_set flag in atomic_check function -to avoid set mode_changed flag multi times when cable plugin. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 5890da8aa1a1..e796c2c0e895 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -1,7 +1,7 @@ - /* - * Cadence High-Definition Multimedia Interface (HDMI) driver - * -- * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2020 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -445,8 +445,6 @@ static void cdns_hdmi_bridge_mode_set(struct drm_bridge *bridge, - mutex_lock(&mhdp->lock); - cdns_hdmi_mode_set(mhdp); - mutex_unlock(&mhdp->lock); -- /* reset force mode set flag */ -- mhdp->force_mode_set = false; - } - - bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0017-MLK-24081-03-drm-bridge-cdns-cec-support-hdmi-rx-cec.patch b/projects/NXP/devices/iMX8/patches/linux/0017-MLK-24081-03-drm-bridge-cdns-cec-support-hdmi-rx-cec.patch deleted file mode 100644 index 69014b43b7..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0017-MLK-24081-03-drm-bridge-cdns-cec-support-hdmi-rx-cec.patch +++ /dev/null @@ -1,271 +0,0 @@ -From f7f5ec54b815df2c9a92f0fd6edea4f5d0700937 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Mon, 16 Nov 2020 10:56:44 +0800 -Subject: [PATCH 17/49] MLK-24081-03: drm: bridge: cdns-cec: support hdmi rx - cec - -Create struct cdns_mhdp_cec and cec specific bus_read/write function. -CEC driver could be reuse by hdmi rx. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/Kconfig | 1 - - .../gpu/drm/bridge/cadence/cdns-hdmi-core.c | 18 ++++- - .../gpu/drm/bridge/cadence/cdns-mhdp-cec.c | 66 +++++++++++++------ - .../gpu/drm/bridge/cadence/cdns-mhdp-common.c | 6 -- - include/drm/bridge/cdns-mhdp.h | 19 +++--- - 5 files changed, 72 insertions(+), 38 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig -index bb1865b15aca..c271ab24a99a 100644 ---- a/drivers/gpu/drm/bridge/cadence/Kconfig -+++ b/drivers/gpu/drm/bridge/cadence/Kconfig -@@ -45,6 +45,5 @@ config DRM_CDNS_AUDIO - - config DRM_CDNS_HDMI_CEC - tristate "Cadence MHDP HDMI CEC driver" -- depends on DRM_CDNS_HDMI - select CEC_CORE - select CEC_NOTIFIER -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index e796c2c0e895..84c175997740 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -569,6 +569,19 @@ static void cdns_hdmi_parse_dt(struct cdns_mhdp_device *mhdp) - dev_info(mhdp->dev, "lane-mapping 0x%02x\n", mhdp->lane_mapping); - } - -+#ifdef CONFIG_DRM_CDNS_HDMI_CEC -+static void cdns_mhdp_cec_init(struct cdns_mhdp_device *mhdp) -+{ -+ struct cdns_mhdp_cec *cec = &mhdp->hdmi.cec; -+ -+ cec->dev = mhdp->dev; -+ cec->iolock = &mhdp->iolock; -+ cec->regs_base = mhdp->regs_base; -+ cec->regs_sec = mhdp->regs_sec; -+ cec->bus_type = mhdp->bus_type; -+} -+#endif -+ - static int __cdns_hdmi_probe(struct platform_device *pdev, - struct cdns_mhdp_device *mhdp) - { -@@ -669,7 +682,8 @@ static int __cdns_hdmi_probe(struct platform_device *pdev, - - /* register cec driver */ - #ifdef CONFIG_DRM_CDNS_HDMI_CEC -- cdns_mhdp_register_cec_driver(dev); -+ cdns_mhdp_cec_init(mhdp); -+ cdns_mhdp_register_cec_driver(&mhdp->hdmi.cec); - #endif - - return 0; -@@ -679,7 +693,7 @@ static void __cdns_hdmi_remove(struct cdns_mhdp_device *mhdp) - { - /* unregister cec driver */ - #ifdef CONFIG_DRM_CDNS_HDMI_CEC -- cdns_mhdp_unregister_cec_driver(mhdp->dev); -+ cdns_mhdp_unregister_cec_driver(&mhdp->hdmi.cec); - #endif - cdns_mhdp_unregister_audio_driver(mhdp->dev); - } -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -index 029ad761606a..25cf9e91e64f 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -@@ -1,5 +1,5 @@ - /* -- * Copyright 2019 NXP -+ * Copyright 2019-2020 NXP - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License -@@ -74,16 +74,49 @@ enum { - - static u32 mhdp_cec_read(struct cdns_mhdp_cec *cec, u32 offset) - { -- struct cdns_mhdp_device *mhdp = -- container_of(cec, struct cdns_mhdp_device, hdmi.cec); -- return cdns_mhdp_bus_read(mhdp, offset); -+ u32 val; -+ -+ mutex_lock(cec->iolock); -+ -+ if (cec->bus_type == BUS_TYPE_LOW4K_HDMI_RX) { -+ /* Remap address to low 4K HDMI RX */ -+ writel(offset >> 12, cec->regs_sec + 4); -+ val = readl((offset & 0xfff) + cec->regs_base); -+ } else if (cec->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K memory */ -+ writel(offset >> 12, cec->regs_sec + 8); -+ val = readl((offset & 0xfff) + cec->regs_base); -+ } else -+ val = readl(cec->regs_base + offset); -+ -+ mutex_unlock(cec->iolock); -+ -+ return val; - } - - static void mhdp_cec_write(struct cdns_mhdp_cec *cec, u32 offset, u32 val) - { -- struct cdns_mhdp_device *mhdp = -- container_of(cec, struct cdns_mhdp_device, hdmi.cec); -- cdns_mhdp_bus_write(val, mhdp, offset); -+ mutex_lock(cec->iolock); -+ -+ if (cec->bus_type == BUS_TYPE_LOW4K_HDMI_RX) { -+ /* Remap address to low 4K SAPB bus */ -+ writel(offset >> 12, cec->regs_sec + 4); -+ writel(val, (offset & 0xfff) + cec->regs_base); -+ } else if (cec->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K memory */ -+ writel(offset >> 12, cec->regs_sec + 8); -+ writel(val, (offset & 0xfff) + cec->regs_base); -+ } else if (cec->bus_type == BUS_TYPE_NORMAL_SAPB) -+ writel(val, cec->regs_sec + offset); -+ else -+ writel(val, cec->regs_base + offset); -+ -+ mutex_unlock(cec->iolock); -+} -+ -+static u32 mhdp_get_fw_clk(struct cdns_mhdp_cec *cec) -+{ -+ return mhdp_cec_read(cec, SW_CLK_H); - } - - static void mhdp_cec_clear_rx_buffer(struct cdns_mhdp_cec *cec) -@@ -94,12 +127,10 @@ static void mhdp_cec_clear_rx_buffer(struct cdns_mhdp_cec *cec) - - static void mhdp_cec_set_divider(struct cdns_mhdp_cec *cec) - { -- struct cdns_mhdp_device *mhdp = -- container_of(cec, struct cdns_mhdp_device, hdmi.cec); - u32 clk_div; - - /* Set clock divider */ -- clk_div = cdns_mhdp_get_fw_clk(mhdp) * 10; -+ clk_div = mhdp_get_fw_clk(cec) * 10; - - mhdp_cec_write(cec, CLK_DIV_MSB, - (clk_div >> 8) & 0xFF); -@@ -291,10 +322,8 @@ static const struct cec_adap_ops cdns_mhdp_cec_adap_ops = { - .adap_transmit = mhdp_cec_adap_transmit, - }; - --int cdns_mhdp_register_cec_driver(struct device *dev) -+int cdns_mhdp_register_cec_driver(struct cdns_mhdp_cec *cec) - { -- struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -- struct cdns_mhdp_cec *cec = &mhdp->hdmi.cec; - int ret; - - cec->adap = cec_allocate_adapter(&cdns_mhdp_cec_adap_ops, cec, -@@ -305,29 +334,24 @@ int cdns_mhdp_register_cec_driver(struct device *dev) - ret = PTR_ERR_OR_ZERO(cec->adap); - if (ret) - return ret; -- ret = cec_register_adapter(cec->adap, dev); -+ ret = cec_register_adapter(cec->adap, cec->dev); - if (ret) { - cec_delete_adapter(cec->adap); - return ret; - } - -- cec->dev = dev; -- - cec->cec_worker = kthread_create(mhdp_cec_poll_worker, cec, "cdns-mhdp-cec"); - if (IS_ERR(cec->cec_worker)) - dev_err(cec->dev, "failed create hdp cec thread\n"); - - wake_up_process(cec->cec_worker); - -- dev_dbg(dev, "CEC successfuly probed\n"); -+ dev_dbg(cec->dev, "CEC successfuly probed\n"); - return 0; - } - --int cdns_mhdp_unregister_cec_driver(struct device *dev) -+int cdns_mhdp_unregister_cec_driver(struct cdns_mhdp_cec *cec) - { -- struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -- struct cdns_mhdp_cec *cec = &mhdp->hdmi.cec; -- - if (cec->cec_worker) { - kthread_stop(cec->cec_worker); - cec->cec_worker = NULL; -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index 2043016f176b..ff37cc4e57e6 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -99,12 +99,6 @@ void cdns_mhdp_bus_write(u32 val, struct cdns_mhdp_device *mhdp, u32 offset) - } - EXPORT_SYMBOL(cdns_mhdp_bus_write); - --u32 cdns_mhdp_get_fw_clk(struct cdns_mhdp_device *mhdp) --{ -- return cdns_mhdp_bus_read(mhdp, SW_CLK_H); --} --EXPORT_SYMBOL(cdns_mhdp_get_fw_clk); -- - void cdns_mhdp_set_fw_clk(struct cdns_mhdp_device *mhdp, unsigned long clk) - { - cdns_mhdp_bus_write(clk / 1000000, mhdp, SW_CLK_H); -diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h -index 6bfd82a3d9a2..338fa55b8bdf 100644 ---- a/include/drm/bridge/cdns-mhdp.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -509,6 +509,7 @@ enum { - BUS_TYPE_NORMAL_SAPB = 1, - BUS_TYPE_LOW4K_APB = 2, - BUS_TYPE_LOW4K_SAPB = 3, -+ BUS_TYPE_LOW4K_HDMI_RX = 4, - }; - - enum voltage_swing_level { -@@ -623,12 +624,15 @@ struct cdns_mhdp_connector { - }; - - struct cdns_mhdp_cec { -- struct cec_adapter *adap; -- struct device *dev; -- struct mutex lock; -+ struct cec_adapter *adap; -+ struct device *dev; -+ struct mutex *iolock; -+ void __iomem *regs_base; -+ void __iomem *regs_sec; -+ int bus_type; - -- struct cec_msg msg; -- struct task_struct *cec_worker; -+ struct cec_msg msg; -+ struct task_struct *cec_worker; - }; - - struct cdns_plat_data { -@@ -724,7 +728,6 @@ u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset); - void cdns_mhdp_bus_write(u32 val, struct cdns_mhdp_device *mhdp, u32 offset); - void cdns_mhdp_clock_reset(struct cdns_mhdp_device *mhdp); - void cdns_mhdp_set_fw_clk(struct cdns_mhdp_device *mhdp, unsigned long clk); --u32 cdns_mhdp_get_fw_clk(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp, const u32 *i_mem, - u32 i_size, const u32 *d_mem, u32 d_size); - int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable); -@@ -805,8 +808,8 @@ int cdns_hdmi_set_plugged_cb(struct cdns_mhdp_device *mhdp, hdmi_codec_plugged_c - - /* CEC */ - #ifdef CONFIG_DRM_CDNS_HDMI_CEC --int cdns_mhdp_register_cec_driver(struct device *dev); --int cdns_mhdp_unregister_cec_driver(struct device *dev); -+int cdns_mhdp_register_cec_driver(struct cdns_mhdp_cec *cec); -+int cdns_mhdp_unregister_cec_driver(struct cdns_mhdp_cec *cec); - #endif - - #endif /* CDNS_MHDP_H_ */ --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0018-MLK-25199-3-drm-bridge-mhdp_common-add-apb-config-fu.patch b/projects/NXP/devices/iMX8/patches/linux/0018-MLK-25199-3-drm-bridge-mhdp_common-add-apb-config-fu.patch deleted file mode 100644 index 100881ce2a..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0018-MLK-25199-3-drm-bridge-mhdp_common-add-apb-config-fu.patch +++ /dev/null @@ -1,143 +0,0 @@ -From 0021b4b1afc0d88c013e2484009004b19bc2ece4 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 30 Dec 2020 16:04:20 +0800 -Subject: [PATCH 18/49] MLK-25199-3: drm: bridge: mhdp_common: add apb config - function - -Add apb config function, move mhdp poll function -to mhdp head file, they will be used by hdcp driver. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - .../gpu/drm/bridge/cadence/cdns-mhdp-common.c | 54 ++++++++++--------- - drivers/gpu/drm/bridge/cadence/cdns-mhdp.h | 25 ++++++++- - 2 files changed, 54 insertions(+), 25 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index ff37cc4e57e6..2a8ab0872f25 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -27,31 +27,10 @@ - #include - #include - -+#include "cdns-mhdp.h" -+ - #define CDNS_DP_SPDIF_CLK 200000000 - #define FW_ALIVE_TIMEOUT_US 1000000 --#define MAILBOX_RETRY_US 1000 --#define MAILBOX_TIMEOUT_US 5000000 -- --#define mhdp_readx_poll_timeout(op, addr, offset, val, cond, sleep_us, timeout_us) \ --({ \ -- u64 __timeout_us = (timeout_us); \ -- unsigned long __sleep_us = (sleep_us); \ -- ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ -- might_sleep_if((__sleep_us) != 0); \ -- for (;;) { \ -- (val) = op(addr, offset); \ -- if (cond) \ -- break; \ -- if (__timeout_us && \ -- ktime_compare(ktime_get(), __timeout) > 0) { \ -- (val) = op(addr, offset); \ -- break; \ -- } \ -- if (__sleep_us) \ -- usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ -- } \ -- (cond) ? 0 : -ETIMEDOUT; \ --}) - - u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset) - { -@@ -174,7 +153,7 @@ bool cdns_mhdp_check_alive(struct cdns_mhdp_device *mhdp) - } - EXPORT_SYMBOL(cdns_mhdp_check_alive); - --static int mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) -+int mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) - { - int val, ret; - -@@ -432,6 +411,33 @@ int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable) - } - EXPORT_SYMBOL(cdns_mhdp_set_firmware_active); - -+int cdns_mhdp_apb_conf(struct cdns_mhdp_device *mhdp, u8 sel) -+{ -+ u8 status; -+ int ret; -+ -+ ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL, GENERAL_BUS_SETTINGS, -+ sizeof(sel), &sel); -+ if (ret) -+ goto err_apb_conf; -+ -+ ret = cdns_mhdp_mailbox_validate_receive(mhdp, MB_MODULE_ID_GENERAL, -+ GENERAL_BUS_SETTINGS, sizeof(status)); -+ if (ret) -+ goto err_apb_conf; -+ -+ ret = cdns_mhdp_mailbox_read_receive(mhdp, &status, sizeof(status)); -+ if (ret) -+ goto err_apb_conf; -+ -+ return status; -+ -+err_apb_conf: -+ DRM_ERROR("apb conf failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_apb_conf); -+ - int cdns_mhdp_set_host_cap(struct cdns_mhdp_device *mhdp) - { - u8 msg[8]; -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h -index 399c3f6f86ad..8ad99eb8f86e 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp.h -@@ -174,7 +174,6 @@ - #define CDNS_DP_MTPH_STATUS 0x226C - #define CDNS_DP_MTPH_ACT_STATUS BIT(0) - -- - #define CDNS_DPTX_GLOBAL 0x02300 - #define CDNS_DP_LANE_EN (CDNS_DPTX_GLOBAL + 0x00) - #define CDNS_DP_LANE_EN_LANES(x) GENMASK(x - 1, 0) -@@ -187,6 +186,30 @@ - - #define CDNS_MHDP_MAX_STREAMS 4 - -+#define MAILBOX_RETRY_US 1000 -+#define MAILBOX_TIMEOUT_US 5000000 -+ -+#define mhdp_readx_poll_timeout(op, addr, offset, val, cond, sleep_us, timeout_us) \ -+({ \ -+ u64 __timeout_us = (timeout_us); \ -+ unsigned long __sleep_us = (sleep_us); \ -+ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ -+ might_sleep_if((__sleep_us) != 0); \ -+ for (;;) { \ -+ (val) = op(addr, offset); \ -+ if (cond) \ -+ break; \ -+ if (__timeout_us && \ -+ ktime_compare(ktime_get(), __timeout) > 0) { \ -+ (val) = op(addr, offset); \ -+ break; \ -+ } \ -+ if (__sleep_us) \ -+ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ -+ } \ -+ (cond) ? 0 : -ETIMEDOUT; \ -+}) -+ - enum pixel_format { - PIXEL_FORMAT_RGB = 1, - PIXEL_FORMAT_YCBCR_444 = 2, --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0019-MLK-25199-4-drm-bridge-mhdp_hdmi-set-clear-avmute-bi.patch b/projects/NXP/devices/iMX8/patches/linux/0019-MLK-25199-4-drm-bridge-mhdp_hdmi-set-clear-avmute-bi.patch deleted file mode 100644 index 4da60d1acc..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0019-MLK-25199-4-drm-bridge-mhdp_hdmi-set-clear-avmute-bi.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 1793e95601a15f93e5d9e2846281f86eb19e8fe4 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 30 Dec 2020 16:05:29 +0800 -Subject: [PATCH 19/49] MLK-25199-4: drm: bridge: mhdp_hdmi: set clear avmute - bit - -Sync HDMI TX configuation with 4.14 hdmi driver. -Clear avmute bit must be set otherwise imx8qm hdcp not work. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c -index c37a7ac6af9b..3ff43f7fb0a6 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -205,7 +205,7 @@ int cdns_hdmi_ctrl_init(struct cdns_mhdp_device *mhdp, - - /* set hdmi mode and preemble mode data enable */ - val = F_HDMI_MODE(protocol) | F_HDMI2_PREAMBLE_EN(1) | F_DATA_EN(1) | -- F_HDMI2_CTRL_IL_MODE(1) | F_BCH_EN(1) | F_PIC_3D(0XF); -+ F_HDMI2_CTRL_IL_MODE(1) | F_BCH_EN(1) | F_PIC_3D(0XF) | F_CLEAR_AVMUTE(1); - ret = cdns_mhdp_reg_write(mhdp, HDTX_CONTROLLER, val); - - return ret; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0020-MLK-25199-5-drm-bridge-mhdp_hdcp-add-HDMI-TX-HDCP-dr.patch b/projects/NXP/devices/iMX8/patches/linux/0020-MLK-25199-5-drm-bridge-mhdp_hdcp-add-HDMI-TX-HDCP-dr.patch deleted file mode 100644 index 47c75be296..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0020-MLK-25199-5-drm-bridge-mhdp_hdcp-add-HDMI-TX-HDCP-dr.patch +++ /dev/null @@ -1,2007 +0,0 @@ -From 9d940175bbffc82b5ec70b195312c6f32b35f51f Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 30 Dec 2020 16:07:41 +0800 -Subject: [PATCH 20/49] MLK-25199-5: drm: bridge: mhdp_hdcp: add HDMI TX HDCP - driver - -This patch adds an initial HDMI TX HDCP driver -for Cadence MHDP HDMI TX hardware. - -Both HDCP2.2 and HDCP1.4 are supported. - -HDCP function could be enabled by command: -modetest -w CONNECTOR_ID:"Content Protection":1 - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/Kconfig | 4 + - drivers/gpu/drm/bridge/cadence/Makefile | 1 + - .../gpu/drm/bridge/cadence/cdns-hdmi-core.c | 190 ++- - .../gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c | 1167 +++++++++++++++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c | 300 +++++ - .../gpu/drm/bridge/cadence/cdns-mhdp-hdcp.h | 36 + - include/drm/bridge/cdns-mhdp.h | 92 +- - 7 files changed, 1776 insertions(+), 14 deletions(-) - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c - create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.h - -diff --git a/drivers/gpu/drm/bridge/cadence/Kconfig b/drivers/gpu/drm/bridge/cadence/Kconfig -index c271ab24a99a..4c27836eb367 100644 ---- a/drivers/gpu/drm/bridge/cadence/Kconfig -+++ b/drivers/gpu/drm/bridge/cadence/Kconfig -@@ -43,6 +43,11 @@ config DRM_CDNS_AUDIO - tristate "Cadence MHDP Audio driver" - depends on DRM_CDNS_MHDP - -+config DRM_CDNS_HDMI_HDCP -+ tristate "Cadence MHDP HDMI HDCP driver" -+ depends on DRM_CDNS_HDMI -+ select DRM_DISPLAY_HDCP_HELPER -+ - config DRM_CDNS_HDMI_CEC - tristate "Cadence MHDP HDMI CEC driver" - select CEC_CORE -diff --git a/drivers/gpu/drm/bridge/cadence/Makefile b/drivers/gpu/drm/bridge/cadence/Makefile -index 618290870ba5..1b824252ae76 100644 ---- a/drivers/gpu/drm/bridge/cadence/Makefile -+++ b/drivers/gpu/drm/bridge/cadence/Makefile -@@ -8,6 +8,7 @@ cdns_mhdp_drmcore-y := cdns-mhdp-common.o cdns-mhdp-dp.o cdns-mhdp-hdmi.o - cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_HDMI) += cdns-hdmi-core.o - cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_DP) += cdns-dp-core.o - cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_AUDIO) += cdns-mhdp-audio.o -+cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_HDMI_HDCP) += cdns-mhdp-hdcp.o cdns-hdmi-hdcp.o - cdns_mhdp_drmcore-$(CONFIG_DRM_CDNS_HDMI_CEC) += cdns-mhdp-cec.o - - obj-$(CONFIG_DRM_CDNS_MHDP) += cdns_mhdp_drmcore.o -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 84c175997740..dc393f6b75e7 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -1,7 +1,7 @@ - /* - * Cadence High-Definition Multimedia Interface (HDMI) driver - * -- * Copyright (C) 2019-2020 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -27,6 +28,131 @@ - #include - #include - -+#include "cdns-mhdp-hdcp.h" -+ -+static ssize_t HDCPTX_do_reauth_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count); -+static struct device_attribute HDCPTX_do_reauth = __ATTR_WO(HDCPTX_do_reauth); -+ -+static ssize_t HDCPTX_do_reauth_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count) -+{ -+ int value, ret; -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ ret = cdns_mhdp_hdcp_tx_reauth(mhdp, 1); -+ -+ sscanf(buf, "%d", &value); -+ -+ if (ret < 0) { -+ dev_err(dev, "%s cdns_mhdp_hdcp_tx_reauth failed\n", __func__); -+ return -1; -+ } -+ return count; -+} -+ -+static ssize_t HDCPTX_Version_show(struct device *dev, -+ struct device_attribute *attr, char *buf); -+static ssize_t HDCPTX_Version_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count); -+static struct device_attribute HDCPTX_Version = __ATTR_RW(HDCPTX_Version); -+ -+static ssize_t HDCPTX_Version_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ int value; -+ -+ sscanf(buf, "%d", &value); -+ if (value == 2) -+ mhdp->hdcp.config = 2; -+ else if (value == 1) -+ mhdp->hdcp.config = 1; -+ else if (value == 3) -+ mhdp->hdcp.config = 3; -+ else -+ mhdp->hdcp.config = 0; -+ -+ return count; -+} -+ -+ssize_t HDCPTX_Version_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ return sprintf(buf, "%d\n", mhdp->hdcp.config); -+} -+ -+static ssize_t HDCPTX_Status_show(struct device *dev, -+ struct device_attribute *attr, char *buf); -+static ssize_t HDCPTX_Status_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count); -+static struct device_attribute HDCPTX_Status = __ATTR_RW(HDCPTX_Status); -+ -+ssize_t HDCPTX_Status_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ -+ switch (mhdp->hdcp.state) { -+ case HDCP_STATE_NO_AKSV: -+ return sprintf(buf, "%d :HDCP_STATE_NO_AKSV \n", mhdp->hdcp.state); -+ case HDCP_STATE_INACTIVE: -+ return sprintf(buf, "%d :HDCP_STATE_INACTIVE \n", mhdp->hdcp.state); -+ case HDCP_STATE_ENABLING: -+ return sprintf(buf, "%d :HDCP_STATE_ENABLING \n", mhdp->hdcp.state); -+ case HDCP_STATE_AUTHENTICATING: -+ return sprintf(buf, "%d :HDCP_STATE_AUTHENTICATING \n", mhdp->hdcp.state); -+ case HDCP_STATE_AUTHENTICATED: -+ return sprintf(buf, "%d :HDCP_STATE_AUTHENTICATED \n", mhdp->hdcp.state); -+ case HDCP_STATE_DISABLING: -+ return sprintf(buf, "%d :HDCP_STATE_DISABLING \n", mhdp->hdcp.state); -+ case HDCP_STATE_AUTH_FAILED: -+ return sprintf(buf, "%d :HDCP_STATE_AUTH_FAILED \n", mhdp->hdcp.state); -+ default: -+ return sprintf(buf, "%d :HDCP_STATE don't exist \n", mhdp->hdcp.state); -+ } -+} -+ -+ssize_t HDCPTX_Status_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t count) -+{ -+ struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -+ int value; -+ -+ if (count == 2) { -+ sscanf(buf, "%d", &value); -+ if ((value >= HDCP_STATE_NO_AKSV) && (value <= HDCP_STATE_AUTH_FAILED)) { -+ mhdp->hdcp.state = value; -+ return count; -+ } else { -+ dev_err(dev, "%s &hdp->state invalid\n", __func__); -+ return -1; -+ } -+ } -+ -+ dev_info(dev, "%s &hdp->state desired %s count=%d\n ", __func__, buf, (int)count); -+ -+ if (strncmp(buf, "HDCP_STATE_NO_AKSV", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_NO_AKSV; -+ else if (strncmp(buf, "HDCP_STATE_INACTIVE", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_INACTIVE; -+ else if (strncmp(buf, "HDCP_STATE_ENABLING", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_ENABLING; -+ else if (strncmp(buf, "HDCP_STATE_AUTHENTICATING", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_AUTHENTICATING; -+ else if (strncmp(buf, "HDCP_STATE_AUTHENTICATED", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_AUTHENTICATED; -+ else if (strncmp(buf, "HDCP_STATE_DISABLING", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_DISABLING; -+ else if (strncmp(buf, "HDCP_STATE_AUTH_FAILED", count - 1) == 0) -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ else -+ dev_err(dev, "%s &hdp->state invalid\n", __func__); -+ return -1; -+ return count; -+} -+ - static void hdmi_sink_config(struct cdns_mhdp_device *mhdp) - { - struct drm_scdc *scdc = &mhdp->connector.base.display_info.hdmi.scdc; -@@ -319,6 +445,22 @@ static bool blob_equal(const struct drm_property_blob *a, - return !a == !b; - } - -+static void cdns_hdmi_bridge_disable(struct drm_bridge *bridge) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ -+ cdns_hdmi_hdcp_disable(mhdp); -+} -+ -+static void cdns_hdmi_bridge_enable(struct drm_bridge *bridge) -+{ -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ struct drm_connector_state *conn_state = mhdp->connector.base.state; -+ -+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_DESIRED) -+ cdns_hdmi_hdcp_enable(mhdp); -+} -+ - static int cdns_hdmi_connector_atomic_check(struct drm_connector *connector, - struct drm_atomic_state *state) - { -@@ -329,12 +471,17 @@ static int cdns_hdmi_connector_atomic_check(struct drm_connector *connector, - struct drm_crtc *crtc = new_con_state->crtc; - struct drm_crtc_state *new_crtc_state; - -+ cdns_hdmi_hdcp_atomic_check(connector, old_con_state, new_con_state); -+ if (!new_con_state->crtc) -+ return 0; -+ -+ new_crtc_state = drm_atomic_get_crtc_state(state, crtc); -+ if (IS_ERR(new_crtc_state)) -+ return PTR_ERR(new_crtc_state); -+ - if (!blob_equal(new_con_state->hdr_output_metadata, - old_con_state->hdr_output_metadata) || - new_con_state->colorspace != old_con_state->colorspace) { -- new_crtc_state = drm_atomic_get_crtc_state(state, crtc); -- if (IS_ERR(new_crtc_state)) -- return PTR_ERR(new_crtc_state); - - new_crtc_state->mode_changed = - !new_con_state->hdr_output_metadata || -@@ -342,6 +489,15 @@ static int cdns_hdmi_connector_atomic_check(struct drm_connector *connector, - new_con_state->colorspace != old_con_state->colorspace; - } - -+ /* -+ * These properties are handled by fastset, and might not end up in a -+ * modeset. -+ */ -+ if (new_con_state->picture_aspect_ratio != -+ old_con_state->picture_aspect_ratio || -+ new_con_state->content_type != old_con_state->content_type || -+ new_con_state->scaling_mode != old_con_state->scaling_mode) -+ new_crtc_state->mode_changed = true; - return 0; - } - -@@ -388,6 +544,7 @@ static int cdns_hdmi_bridge_attach(struct drm_bridge *bridge, - - drm_connector_attach_encoder(connector, encoder); - -+ drm_connector_attach_content_protection_property(connector, true); - return 0; - } - -@@ -439,7 +596,7 @@ static void cdns_hdmi_bridge_mode_set(struct drm_bridge *bridge, - video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC); - video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC); - -- DRM_INFO("Mode: %dx%dp%d\n", mode->hdisplay, mode->vdisplay, mode->clock); -+ DRM_INFO("Mode: %dx%dp%d\n", mode->hdisplay, mode->vdisplay, mode->clock); - memcpy(&mhdp->mode, mode, sizeof(struct drm_display_mode)); - - mutex_lock(&mhdp->lock); -@@ -518,6 +675,8 @@ bool cdns_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, - - static const struct drm_bridge_funcs cdns_hdmi_bridge_funcs = { - .attach = cdns_hdmi_bridge_attach, -+ .enable = cdns_hdmi_bridge_enable, -+ .disable = cdns_hdmi_bridge_disable, - .mode_set = cdns_hdmi_bridge_mode_set, - .mode_valid = cdns_hdmi_bridge_mode_valid, - .mode_fixup = cdns_hdmi_bridge_mode_fixup, -@@ -645,7 +804,7 @@ static int __cdns_hdmi_probe(struct platform_device *pdev, - mhdp->irq[IRQ_IN]); - return -EINVAL; - } -- -+ - irq_set_status_flags(mhdp->irq[IRQ_OUT], IRQ_NOAUTOEN); - ret = devm_request_threaded_irq(dev, mhdp->irq[IRQ_OUT], - NULL, cdns_hdmi_irq_thread, -@@ -659,6 +818,25 @@ static int __cdns_hdmi_probe(struct platform_device *pdev, - - cdns_hdmi_parse_dt(mhdp); - -+ ret = cdns_hdmi_hdcp_init(mhdp, pdev->dev.of_node); -+ if (ret < 0) -+ DRM_WARN("Failed to initialize HDCP\n"); -+ -+ if (device_create_file(mhdp->dev, &HDCPTX_do_reauth)) { -+ printk(KERN_ERR "Unable to create HDCPTX_do_reauth sysfs\n"); -+ device_remove_file(mhdp->dev, &HDCPTX_do_reauth); -+ } -+ -+ if (device_create_file(mhdp->dev, &HDCPTX_Version)) { -+ printk(KERN_ERR "Unable to create HDCPTX_Version sysfs\n"); -+ device_remove_file(mhdp->dev, &HDCPTX_Version); -+ } -+ -+ if (device_create_file(mhdp->dev, &HDCPTX_Status)) { -+ printk(KERN_ERR "Unable to create HDCPTX_Status sysfs\n"); -+ device_remove_file(mhdp->dev, &HDCPTX_Status); -+ } -+ - if (cdns_mhdp_read_hpd(mhdp)) - enable_irq(mhdp->irq[IRQ_OUT]); - else -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -new file mode 100644 -index 000000000000..e2a3bc7fb42b ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -@@ -0,0 +1,1167 @@ -+/* -+ * Cadence HDMI HDCP driver -+ * -+ * Copyright (C) 2021 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+#include -+#include -+ -+#include "cdns-mhdp-hdcp.h" -+ -+/* Default will be to use KM unless it has been explicitly */ -+#ifndef HDCP_USE_KMKEY -+ #define HDCP_USE_KMKEY 1 -+#endif -+ -+#define CDNS_HDCP_ACTIVATE (0x1 << 2) -+ -+#define IMX_FW_TIMEOUT_MS (64 * 1000) -+#define IMX_HDCP_PAIRING_FIRMWARE "imx/hdcp-pairing.bin" -+ -+#define GENERAL_BUS_SETTINGS_DPCD_BUS_BIT 0 -+#define GENERAL_BUS_SETTINGS_DPCD_BUS_LOCK_BIT 1 -+#define GENERAL_BUS_SETTINGS_HDCP_BUS_BIT 2 -+#define GENERAL_BUS_SETTINGS_HDCP_BUS_LOCK_BIT 3 -+#define GENERAL_BUS_SETTINGS_CAPB_OWNER_BIT 4 -+#define GENERAL_BUS_SETTINGS_CAPB_OWNER_LOCK_BIT 5 -+ -+#define GENERAL_BUS_SETTINGS_RESP_DPCD_BUS_BIT 0 -+#define GENERAL_BUS_SETTINGS_RESP_HDCP_BUS_BIT 1 -+#define GENERAL_BUS_SETTINGS_RESP_CAPB_OWNER_BIT 2 -+ -+/* HDCP TX ports working mode (HDCP 2.2 or 1.4) */ -+enum { -+ HDCP_TX_2, /* lock only with HDCP2 */ -+ HDCP_TX_1, /* lock only with HDCP1 */ -+ HDCP_TX_BOTH, /* lock on HDCP2 or 1 depend on other side */ -+}; -+ -+/* HDCP TX ports stream type (relevant if receiver is repeater) */ -+enum { -+ HDCP_CONTENT_TYPE_0, /* May be transmitted by -+ The HDCP Repeater to all HDCP Devices. */ -+ HDCP_CONTENT_TYPE_1, /* Must not be transmitted by the HDCP Repeater to -+ HDCP 1.x-compliant Devices and HDCP 2.0-compliant Repeaters */ -+}; -+ -+/* different error types for HDCP_TX_STATUS_CHANGE */ -+enum { -+ HDCP_TRAN_ERR_NO_ERROR, -+ HDCP_TRAN_ERR_HPD_IS_DOWN, -+ HDCP_TRAN_ERR_SRM_FAILURE, -+ HDCP_TRAN_ERR_SIGNATURE_VERIFICATION, -+ HDCP_TRAN_ERR_H_TAG_DIFF_H, -+ HDCP_TRAN_ERR_V_TAG_DIFF_V, -+ HDCP_TRAN_ERR_LOCALITY_CHECK, -+ HDCP_TRAN_ERR_DDC, -+ HDCP_TRAN_ERR_REAUTH_REQ, -+ HDCP_TRAN_ERR_TOPOLOGY, -+ HDCP_TRAN_ERR_HDCP_RSVD1, -+ HDCP_TRAN_ERR_HDMI_CAPABILITY, -+ HDCP_TRAN_ERR_RI, -+ HDCP_TRAN_ERR_WATCHDOG_EXPIRED, -+}; -+ -+static char const *g_last_error[16] = { -+ "No Error", -+ "HPD is down", -+ "SRM failure", -+ "Signature verification error", -+ "h tag != h", -+ "V tag diff v", -+ "Locality check", -+ "DDC error", -+ "REAUTH_REQ", -+ "Topology error", -+ "Verify receiver ID list failed", -+ "HDCP_RSVD1 was not 0,0,0", -+ "HDMI capability or mode", -+ "RI result was different than expected", -+ "WatchDog expired", -+ "Repeater integrity failed" -+}; -+ -+#define HDCP_MAX_RECEIVERS 32 -+#define HDCP_RECEIVER_ID_SIZE_BYTES 5 -+#define HPD_EVENT 1 -+#define HDCP_STATUS_SIZE 0x5 -+#define HDCP_PORT_STS_AUTH 0x1 -+#define HDCP_PORT_STS_REPEATER 0x2 -+#define HDCP_PORT_STS_TYPE_MASK 0xc -+#define HDCP_PORT_STS_TYPE_SHIFT 0x2 -+#define HDCP_PORT_STS_AUTH_STREAM_ID_SHIFT 0x4 -+#define HDCP_PORT_STS_AUTH_STREAM_ID_MASK 0x10 -+#define HDCP_PORT_STS_LAST_ERR_SHIFT 0x5 -+#define HDCP_PORT_STS_LAST_ERR_MASK (0x0F << 5) -+#define GET_HDCP_PORT_STS_LAST_ERR(__sts__) \ -+ (((__sts__) & HDCP_PORT_STS_LAST_ERR_MASK) >> \ -+ HDCP_PORT_STS_LAST_ERR_SHIFT) -+#define HDCP_PORT_STS_1_1_FEATURES 0x200 -+ -+#define HDCP_CONFIG_NONE ((u8) 0) -+#define HDCP_CONFIG_1_4 ((u8) 1) /* use HDCP 1.4 only */ -+#define HDCP_CONFIG_2_2 ((u8) 2) /* use HDCP 2.2 only */ -+ -+/* Default timeout to use for wait4event in milliseconds */ -+#define HDCP_EVENT_TO_DEF 800 -+/* Timeout value to use for repeater receiver ID check, spec says 3s */ -+#define HDCP_EVENT_TO_RPT 3500 -+ -+static int hdmi_hdcp_check_link(struct cdns_mhdp_device *mhdp); -+ -+static void print_port_status(u16 sts) -+{ -+ char const *rx_type[4] = { "Unknown", "HDCP 1", "HDCP 2", "Unknown" }; -+ -+ DRM_DEBUG_KMS("INFO: HDCP Port Status: 0x%04x\n", sts); -+ DRM_DEBUG_KMS(" Authenticated: %d\n", sts & HDCP_PORT_STS_AUTH); -+ DRM_DEBUG_KMS(" Receiver is repeater: %d\n", sts & HDCP_PORT_STS_REPEATER); -+ DRM_DEBUG_KMS(" RX Type: %s\n", -+ rx_type[(sts & HDCP_PORT_STS_TYPE_MASK) >> HDCP_PORT_STS_TYPE_SHIFT]); -+ DRM_DEBUG_KMS(" AuthStreamId: %d\n", sts & HDCP_PORT_STS_AUTH_STREAM_ID_MASK); -+ DRM_DEBUG_KMS(" Last Error: %s\n", -+ g_last_error[(sts & HDCP_PORT_STS_LAST_ERR_MASK) >> HDCP_PORT_STS_LAST_ERR_SHIFT]); -+ DRM_DEBUG_KMS(" Enable 1.1 Features: %d\n", sts & HDCP_PORT_STS_1_1_FEATURES); -+} -+ -+static void print_events(u8 events) -+{ -+ if (events & HDMI_TX_HPD_EVENT) -+ DRM_INFO("INFO: HDMI_TX_HPD_EVENT\n"); -+ if (events & HDCPTX_STATUS_EVENT) -+ DRM_INFO("INFO: HDCPTX_STATUS_EVENT\n"); -+ if (events & HDCPTX_IS_KM_STORED_EVENT) -+ DRM_INFO("INFO: HDCPTX_IS_KM_STORED_EVENT\n"); -+ if (events & HDCPTX_STORE_KM_EVENT) -+ DRM_INFO("INFO: HDCPTX_STORE_KM_EVENT\n"); -+ if (events & HDCPTX_IS_RECEIVER_ID_VALID_EVENT) -+ DRM_INFO("INFO: HDCPTX_IS_RECEIVER_ID_VALID_EVENT\n"); -+} -+ -+static u8 wait4event(struct cdns_mhdp_device *mhdp, u8 *events, -+ u32 event_to_wait, u32 timeout_ms) -+{ -+ u8 reg_events; -+ u8 returned_events; -+ u8 event_mask = event_to_wait | HDCPTX_STATUS_EVENT; -+ unsigned timeout; -+ -+ timeout = timeout_ms; -+ do { -+ if (timeout == 0) -+ goto timeout_err; -+ timeout--; -+ udelay(1000); -+ reg_events = cdns_mhdp_get_event(mhdp); -+ *events |= reg_events; -+ } while (((event_mask & *events) == 0) && (event_to_wait > HDMI_TX_HPD_EVENT)); -+ -+ returned_events = *events & event_mask; -+ if (*events != returned_events) { -+ u32 unexpected_events = ~event_mask & *events; -+ -+ DRM_INFO("INFO: %s() all 0x%08x expected 0x%08x unexpected 0x%08x", -+ __func__, *events, returned_events, unexpected_events); -+ DRM_INFO("INFO: %s() All events:\n", __func__); -+ print_events(*events); -+ -+ DRM_INFO("INFO: %s() expected events:\n", __func__); -+ print_events(returned_events); -+ -+ DRM_INFO("INFO: %s() unexpected events:\n", __func__); -+ print_events(unexpected_events); -+ } else -+ print_events(*events); -+ -+ *events &= ~event_mask; -+ -+ return returned_events; -+ -+timeout_err: -+ DRM_INFO("INFO: %s() Timed out with events:\n", __func__); -+ print_events(event_to_wait); -+ return 0; -+} -+ -+static u16 hdmi_hdcp_get_status(struct cdns_mhdp_device *mhdp) -+{ -+ u8 hdcp_status[HDCP_STATUS_SIZE]; -+ u16 hdcp_port_status; -+ -+ cdns_mhdp_hdcp_tx_status_req(mhdp, hdcp_status, HDCP_STATUS_SIZE); -+ hdcp_port_status = (hdcp_status[0] << 8) | hdcp_status[1]; -+ -+ return hdcp_port_status; -+} -+ -+static inline u8 check_event(u8 events, u8 tested) -+{ -+ if ((events & tested) == 0) -+ return 0; -+ return 1; -+} -+ -+/* Prints status. Returns error code (0 = no error) */ -+static u8 hdmi_hdcp_handle_status(u16 status) -+{ -+ print_port_status(status); -+ if (status & HDCP_PORT_STS_LAST_ERR_MASK) -+ DRM_ERROR("ERROR: HDCP error was set to %s\n", -+ g_last_error[((status & HDCP_PORT_STS_LAST_ERR_MASK) -+ >> HDCP_PORT_STS_LAST_ERR_SHIFT)]); -+ return GET_HDCP_PORT_STS_LAST_ERR(status); -+} -+ -+static int hdmi_hdcp_set_config(struct cdns_mhdp_device *mhdp, u8 hdcp_config) -+{ -+ u8 bus_config, retEvents; -+ u16 hdcp_port_status; -+ int ret; -+ -+ /* Clearing out existing events */ -+ wait4event(mhdp, &mhdp->hdcp.events, HDMI_TX_HPD_EVENT, HDCP_EVENT_TO_DEF); -+ mhdp->hdcp.events = 0; -+ -+ if (!strncmp("imx8mq-hdmi", mhdp->plat_data->plat_name, 11)) { -+ DRM_DEBUG_KMS("INFO: Switching HDCP Commands to SAPB.\n"); -+ bus_config = (1 << GENERAL_BUS_SETTINGS_HDCP_BUS_BIT); -+ ret = cdns_mhdp_apb_conf(mhdp, bus_config); -+ if (ret) { -+ DRM_ERROR("Failed to set APB configuration.\n"); -+ if (ret & (1 << GENERAL_BUS_SETTINGS_RESP_HDCP_BUS_BIT))/* 1 - locked */ -+ DRM_ERROR("Failed to switch HDCP to SAPB Mailbox\n"); -+ return -1; -+ } -+ DRM_DEBUG_KMS("INFO: HDCP switched to SAPB\n"); -+ } -+ -+ /* HDCP 2.2(and/or 1.4) | activate | km-key | 0 */ -+ hdcp_config |= CDNS_HDCP_ACTIVATE | (HDCP_USE_KMKEY << 4) | (HDCP_CONTENT_TYPE_0 << 3); -+ -+ DRM_DEBUG_KMS("INFO: Enabling HDCP...\n"); -+ ret = cdns_mhdp_hdcp_tx_config(mhdp, hdcp_config); -+ if (ret < 0) -+ DRM_DEBUG_KMS("cdns_mhdp_hdcp_tx_config failed\n"); -+ -+ /* Wait until HDCP_TX_STATUS EVENT appears */ -+ DRM_DEBUG_KMS("INFO: wait4event -> HDCPTX_STATUS_EVENT\n"); -+ retEvents = wait4event(mhdp, &mhdp->hdcp.events, HDCPTX_STATUS_EVENT, HDCP_EVENT_TO_DEF); -+ -+ /* Set TX STATUS REQUEST */ -+ DRM_DEBUG_KMS("INFO: Getting port status\n"); -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ if (hdmi_hdcp_handle_status(hdcp_port_status) != 0) -+ return -1; -+ -+ return 0; -+} -+ -+static int hdmi_hdcp_auth_check(struct cdns_mhdp_device *mhdp) -+{ -+ u16 hdcp_port_status; -+ int ret; -+ -+ DRM_DEBUG_KMS("INFO: wait4event -> HDCPTX_STATUS_EVENT\n"); -+ mhdp->hdcp.events = wait4event(mhdp, &mhdp->hdcp.events, HDCPTX_STATUS_EVENT, HDCP_EVENT_TO_DEF+HDCP_EVENT_TO_DEF); -+ if (mhdp->hdcp.events == 0) -+ return -1; -+ -+ DRM_DEBUG_KMS("HDCP: HDCPTX_STATUS_EVENT\n"); -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ ret = hdmi_hdcp_handle_status(hdcp_port_status); -+ if (ret != 0) { -+ if (ret == HDCP_TRAN_ERR_REAUTH_REQ) { -+ DRM_ERROR("HDCP_TRAN_ERR_REAUTH_REQ-->one more try!\n"); -+ return 1; -+ } else -+ return -1; -+ } -+ -+ if (hdcp_port_status & HDCP_PORT_STS_AUTH) { -+ DRM_INFO("Authentication completed successfully!\n"); -+ /* Dump hdmi and phy register */ -+ mhdp->hdcp.state = HDCP_STATE_AUTHENTICATED; -+ return 0; -+ } -+ -+ DRM_WARN("Authentication failed\n"); -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ return -1; -+} -+ -+inline void hdmi_hdcp_swap_id(u8 *in, u8 *out) -+{ -+ int i; -+ -+ for (i = 0; i < HDCP_RECEIVER_ID_SIZE_BYTES; i++) -+ out[HDCP_RECEIVER_ID_SIZE_BYTES - (i + 1)] = in[i]; -+} -+ -+inline void hdmi_hdcp_swap_list(u8 *list_in, u8 *list_out, int num_ids) -+{ -+ int i; -+ -+ for (i = 0; i < num_ids; i++) -+ hdmi_hdcp_swap_id(&list_in[i * HDCP_RECEIVER_ID_SIZE_BYTES], -+ &list_out[i * HDCP_RECEIVER_ID_SIZE_BYTES]); -+} -+ -+static int hdmi_hdcp_check_receviers(struct cdns_mhdp_device *mhdp) -+{ -+ u8 ret_events; -+ u8 hdcp_num_rec, i; -+ u8 hdcp_rec_id[HDCP_MAX_RECEIVERS][HDCP_RECEIVER_ID_SIZE_BYTES]; -+ u8 hdcp_rec_id_temp[HDCP_MAX_RECEIVERS][HDCP_RECEIVER_ID_SIZE_BYTES]; -+ u16 hdcp_port_status = 0; -+ int ret; -+ -+ DRM_INFO("INFO: Waiting for Receiver ID valid event\n"); -+ ret_events = 0; -+ do { -+ u8 events = 0; -+ u8 hdcp_last_error = 0; -+ events = check_event(ret_events, -+ HDCPTX_IS_RECEIVER_ID_VALID_EVENT); -+ DRM_DEBUG_KMS("INFO: Waiting HDCPTX_IS_RECEIVER_ID_VALID_EVENT\n"); -+ ret_events = wait4event(mhdp, &mhdp->hdcp.events, -+ HDCPTX_IS_RECEIVER_ID_VALID_EVENT, -+ (mhdp->hdcp.sink_is_repeater ? -+ HDCP_EVENT_TO_RPT : HDCP_EVENT_TO_DEF)); -+ if (ret_events == 0) { -+ /* time out occurred, return error */ -+ DRM_ERROR("HDCP error did not get receiver IDs\n"); -+ return -1; -+ } -+ if (check_event(ret_events, HDCPTX_STATUS_EVENT) != 0) { -+ /* There was a status update, could be due to HPD -+ going down or some other error, check if an error -+ was set, if so exit. -+ */ -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ hdcp_last_error = GET_HDCP_PORT_STS_LAST_ERR(hdcp_port_status); -+ if (hdmi_hdcp_handle_status(hdcp_port_status)) { -+ DRM_ERROR("HDCP error no: %u\n", hdcp_last_error); -+ return -1; -+ } else { -+ /* No error logged, keep going. -+ * If this somehow happened at same time, then need to -+ * put the HDCPTX_STATUS_EVENT back into the global -+ * events pool and checked later. */ -+ mhdp->hdcp.events |= HDCPTX_STATUS_EVENT; -+ -+ /* Special condition when connected to HDCP 1.4 repeater -+ * with no downstream devices attached, then will not -+ * get receiver ID list but instead will reach -+ * authenticated state. */ -+ if ((mhdp->hdcp.hdcp_version == HDCP_TX_1) && (mhdp->hdcp.sink_is_repeater == 1) && -+ ((hdcp_port_status & HDCP_PORT_STS_AUTH) == HDCP_PORT_STS_AUTH)) { -+ DRM_INFO("Connected to HDCP 1.4 repeater with no downstream devices!\n"); -+ return 0; -+ } -+ -+ msleep(20); -+ } -+ } -+ } while (check_event(ret_events, -+ HDCPTX_IS_RECEIVER_ID_VALID_EVENT) == 0); -+ -+ DRM_INFO("INFO: Requesting Receivers ID's\n"); -+ -+ hdcp_num_rec = 0; -+ memset(&hdcp_rec_id, 0, sizeof(hdcp_rec_id)); -+ -+ ret = cdns_mhdp_hdcp_tx_is_receiver_id_valid(mhdp, (u8 *)hdcp_rec_id, &hdcp_num_rec); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to hdcp tx receiver ID.\n"); -+ return -1; -+ } -+ -+ if (hdcp_num_rec == 0) { -+ DRM_DEBUG_KMS("WARN: Failed to get receiver list\n"); -+ /* Unknown problem, return error */ -+ return -1; -+ } -+ -+ DRM_INFO("INFO: Number of Receivers: %d\n", hdcp_num_rec); -+ -+ for (i = 0; i < hdcp_num_rec; ++i) { -+ DRM_INFO("\tReveiver ID%2d: %.2X%.2X%.2X%.2X%.2X\n", -+ i, -+ hdcp_rec_id[i][0], -+ hdcp_rec_id[i][1], -+ hdcp_rec_id[i][2], -+ hdcp_rec_id[i][3], -+ hdcp_rec_id[i][4] -+ ); -+ } -+ -+ /* swap ids byte order */ -+ hdmi_hdcp_swap_list(&hdcp_rec_id[0][0], -+ &hdcp_rec_id_temp[0][0], hdcp_num_rec); -+ -+ /* Check Receiver ID's against revocation list in SRM */ -+ if (drm_hdcp_check_ksvs_revoked(mhdp->drm_dev, (u8 *)hdcp_rec_id_temp, hdcp_num_rec)) { -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ DRM_ERROR("INFO: Receiver check fails\n"); -+ return -1; -+ } -+ -+ ret = cdns_mhdp_hdcp_tx_respond_receiver_id_valid(mhdp, 1); -+ DRM_INFO("INFO: Responding with Receiver ID's OK!, ret=%d\n", ret); -+ return ret; -+} -+ -+#ifdef STORE_PAIRING -+static int hdmi_hdcp_get_stored_pairing(struct cdns_mhdp_device *mhdp) -+{ -+ int ret = 0; -+ unsigned long timeout = jiffies + msecs_to_jiffies(IMX_FW_TIMEOUT_MS); -+ unsigned long sleep = 1000; -+ const struct firmware *fw; -+ -+ DRM_DEBUG_KMS("%s()\n", __func__); -+ -+ while (time_before(jiffies, timeout)) { -+ ret = request_firmware(&fw, hdmi_hdcp_PAIRING_FIRMWARE, mhdp->dev); -+ if (ret == -ENOENT) { -+ msleep(sleep); -+ sleep *= 2; -+ continue; -+ } else if (ret) { -+ DRM_DEV_INFO(mhdp->dev, "HDCP pairing data not found\n"); -+ goto out; -+ } -+ -+ mhdp->hdcp.num_paired = fw->size / -+ sizeof(struct hdcp_trans_pairing_data); -+ if (mhdp->hdcp.num_paired > MAX_STORED_KM) { -+ /* todo: handle dropping */ -+ mhdp->hdcp.num_paired = MAX_STORED_KM; -+ DRM_DEV_INFO(mhdp->dev, -+ "too many paired receivers - dropping older entries\n"); -+ } -+ memcpy(&mhdp->hdcp.pairing[0], fw->data, -+ sizeof(struct hdcp_trans_pairing_data) * mhdp->hdcp.num_paired); -+ release_firmware(fw); -+ goto out; -+ } -+ -+ DRM_DEV_ERROR(mhdp->dev, "Timed out trying to load firmware\n"); -+ ret = -ETIMEDOUT; -+ out: -+ return ret; -+} -+#endif -+ -+static int hdmi_hdcp_find_km_store(struct cdns_mhdp_device *mhdp, -+ u8 receiver[HDCP_PAIRING_R_ID]) -+{ -+ int i; -+ -+ DRM_DEBUG_KMS("%s()\n", __func__); -+ for (i = 0; i < mhdp->hdcp.num_paired; i++) { -+ if (memcmp(receiver, mhdp->hdcp.pairing[i].receiver_id, -+ HDCP_PAIRING_R_ID) == 0) { -+ DRM_INFO("HDCP: found receiver id: 0x%x%x%x%x%x\n", -+ receiver[0], receiver[1], receiver[2], receiver[3], receiver[4]); -+ return i; -+ } -+ } -+ DRM_INFO("HDCP: receiver id: 0x%x%x%x%x%x not stored\n", -+ receiver[0], receiver[1], receiver[2], receiver[3], receiver[4]); -+ return -1; -+} -+ -+static int hdmi_hdcp_store_km(struct cdns_mhdp_device *mhdp, -+ struct hdcp_trans_pairing_data *pairing, -+ int stored_km_index) -+{ -+ int i, temp_index; -+ struct hdcp_trans_pairing_data temp_pairing; -+ -+ DRM_DEBUG_KMS("%s()\n", __func__); -+ -+ if (stored_km_index < 0) { -+ /* drop one entry if array is full */ -+ if (mhdp->hdcp.num_paired == MAX_STORED_KM) -+ mhdp->hdcp.num_paired--; -+ -+ temp_index = mhdp->hdcp.num_paired; -+ mhdp->hdcp.num_paired++; -+ if (!pairing) { -+ DRM_ERROR("NULL HDCP pairing data!\n"); -+ return -1; -+ } else -+ /* save the new stored km */ -+ temp_pairing = *pairing; -+ } else { -+ /* save the current stored km */ -+ temp_index = stored_km_index; -+ temp_pairing = mhdp->hdcp.pairing[stored_km_index]; -+ } -+ -+ /* move entries one slot to the end */ -+ for (i = temp_index; i > 0; i--) -+ mhdp->hdcp.pairing[i] = mhdp->hdcp.pairing[i - 1]; -+ -+ /* save the current/new entry at the beginning */ -+ mhdp->hdcp.pairing[0] = temp_pairing; -+ -+ return 0; -+} -+ -+static inline int hdmi_hdcp_auth_22(struct cdns_mhdp_device *mhdp) -+{ -+ int km_idx = -1; -+ u8 retEvents; -+ u16 hdcp_port_status; -+ u8 resp[HDCP_STATUS_SIZE]; -+ struct hdcp_trans_pairing_data pairing; -+ int ret; -+ -+ DRM_DEBUG_KMS("HDCP: Start 2.2 Authentication\n"); -+ mhdp->hdcp.sink_is_repeater = 0; -+ -+ /* Wait until HDCP2_TX_IS_KM_STORED EVENT appears */ -+ retEvents = 0; -+ DRM_DEBUG_KMS("INFO: Wait until HDCP2_TX_IS_KM_STORED EVENT appears\n"); -+ while (check_event(retEvents, HDCPTX_IS_KM_STORED_EVENT) == 0) { -+ DRM_DEBUG_KMS("INFO: Waiting FOR _IS_KM_STORED EVENT\n"); -+ retEvents = wait4event(mhdp, &mhdp->hdcp.events, -+ HDCPTX_IS_KM_STORED_EVENT, HDCP_EVENT_TO_DEF); -+ if (retEvents == 0) -+ /* time out occurred, return error */ -+ return -1; -+ if (check_event(retEvents, HDCPTX_STATUS_EVENT) != 0) { -+ /* There was a status update, could be due to HPD -+ going down or some other error, check if an error -+ was set, if so exit. -+ */ -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ if (hdmi_hdcp_handle_status(hdcp_port_status) != 0) -+ return -1; -+ } -+ } -+ -+ DRM_DEBUG_KMS("HDCP: HDCPTX_IS_KM_STORED_EVENT\n"); -+ -+ /* Set HDCP2 TX KM STORED REQUEST */ -+ ret = cdns_mhdp_hdcp2_tx_is_km_stored_req(mhdp, resp, HDCP_STATUS_SIZE); -+ if (ret) { -+ DRM_DEV_ERROR(mhdp->dev, "Failed to hdcp2 tx km stored.\n"); -+ return -1; -+ } -+ -+ DRM_DEBUG_KMS("HDCP: CDN_API_HDCP2_TX_IS_KM_STORED_REQ_blocking\n"); -+ DRM_DEBUG_KMS("HDCP: Receiver ID: 0x%x%x%x%x%x\n", -+ resp[0], resp[1], resp[2], resp[3], resp[4]); -+ -+ km_idx = hdmi_hdcp_find_km_store(mhdp, resp); -+ -+ /* Check if KM is stored */ -+ if (km_idx >= 0) { -+ DRM_DEBUG_KMS("INFO: KM is stored\n"); -+ /* Set HDCP2 TX RESPOND KM with stored KM */ -+ ret = cdns_mhdp_hdcp2_tx_respond_km(mhdp, (u8 *)&mhdp->hdcp.pairing[km_idx], -+ sizeof(struct hdcp_trans_pairing_data)); -+ -+ DRM_DEBUG_KMS("HDCP: CDN_API_HDCP2_TX_RESPOND_KM_blocking, ret=%d\n", ret); -+ } else { /* KM is not stored */ -+ /* Set HDCP2 TX RESPOND KM with empty data */ -+ ret = cdns_mhdp_hdcp2_tx_respond_km(mhdp, NULL, 0); -+ DRM_DEBUG_KMS("INFO: KM is not stored ret=%d\n", ret); -+ } -+ -+ if (hdmi_hdcp_check_receviers(mhdp)) -+ return -1; -+ -+ /* Check if KM is not stored */ -+ if (km_idx < 0) { -+ int loop_cnt = 0; -+ -+ /* Wait until HDCP2_TX_STORE_KM EVENT appears */ -+ retEvents = 0; -+ DRM_DEBUG_KMS("INFO: wait4event -> HDCPTX_STORE_KM_EVENT\n"); -+ while (check_event(retEvents, HDCPTX_STORE_KM_EVENT) == 0) { -+ retEvents = wait4event(mhdp, &mhdp->hdcp.events, -+ HDCPTX_STORE_KM_EVENT, HDCP_EVENT_TO_DEF); -+ if (check_event(retEvents, HDCPTX_STATUS_EVENT) -+ != 0) { -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ if (hdmi_hdcp_handle_status(hdcp_port_status) -+ != 0) -+ return -1; -+ } -+ if (loop_cnt > 2) { -+ DRM_ERROR("Did not get event HDCPTX_STORE_KM_EVENT in time\n"); -+ return -1; -+ } else -+ loop_cnt++; -+ } -+ DRM_DEBUG_KMS("HDCP: HDCPTX_STORE_KM_EVENT\n"); -+ -+ /* Set HDCP2_TX_STORE_KM REQUEST */ -+ ret = cdns_mhdp_hdcp2_tx_store_km(mhdp, (u8 *)&pairing, sizeof(struct hdcp_trans_pairing_data)); -+ DRM_DEBUG_KMS("HDCP: CDN_API_HDCP2_TX_STORE_KM_REQ_blocking ret=%d\n", ret); -+ hdmi_hdcp_store_km(mhdp, &pairing, km_idx); -+ } else -+ hdmi_hdcp_store_km(mhdp, NULL, km_idx); -+ -+ /* Check if device was a repeater */ -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ -+ /* Exit if there was any errors logged at this point... */ -+ if (GET_HDCP_PORT_STS_LAST_ERR(hdcp_port_status) > 0) { -+ hdmi_hdcp_handle_status(hdcp_port_status); -+ return -1; -+ } -+ -+ if (hdcp_port_status & HDCP_PORT_STS_REPEATER) -+ mhdp->hdcp.sink_is_repeater = 1; -+ -+ /* If sink was a repeater, we will be getting additional IDs to validate... -+ * Note that this one may take some time since spec allows up to 3s... */ -+ if (mhdp->hdcp.sink_is_repeater) -+ if (hdmi_hdcp_check_receviers(mhdp)) -+ return -1; -+ -+ /* Slight delay to allow firmware to finish setting up authenticated state */ -+ msleep(300); -+ -+ DRM_INFO("Finished hdmi_hdcp_auth_22\n"); -+ return 0; -+} -+ -+static inline int hdmi_hdcp_auth_14(struct cdns_mhdp_device *mhdp) -+{ -+ u16 hdcp_port_status; -+ int ret = 0; -+ -+ DRM_DEBUG_KMS("HDCP: Starting 1.4 Authentication\n"); -+ mhdp->hdcp.sink_is_repeater = 0; -+ -+ ret = hdmi_hdcp_check_receviers(mhdp); -+ if (ret) -+ return -1; -+ -+ /* Check if device was a repeater */ -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ -+ /* Exit if there was any errors logged at this point... */ -+ if (GET_HDCP_PORT_STS_LAST_ERR(hdcp_port_status) > 0) { -+ hdmi_hdcp_handle_status(hdcp_port_status); -+ return -1; -+ } -+ -+ if (hdcp_port_status & HDCP_PORT_STS_REPEATER) { -+ DRM_INFO("Connected to a repeater\n"); -+ mhdp->hdcp.sink_is_repeater = 1; -+ } else -+ DRM_INFO("Connected to a normal sink\n"); -+ -+ /* If sink was a repeater, we will be getting additional IDs to validate... -+ * Note that this one may take some time since spec allows up to 3s... */ -+ if (mhdp->hdcp.sink_is_repeater) -+ ret = hdmi_hdcp_check_receviers(mhdp); -+ -+ /* Slight delay to allow firmware to finish setting up authenticated state */ -+ msleep(300); -+ -+ return ret; -+} -+ -+static int hdmi_hdcp_auth(struct cdns_mhdp_device *mhdp, u8 hdcp_config) -+{ -+ int ret = 0; -+ -+ DRM_DEBUG_KMS("HDCP: Start Authentication\n"); -+ -+ if (mhdp->hdcp.reauth_in_progress == 0) { -+ ret = hdmi_hdcp_set_config(mhdp, hdcp_config); -+ if (ret) { -+ DRM_ERROR("hdmi_hdcp_set_config failed\n"); -+ return -1; -+ } -+ } -+ -+ mhdp->hdcp.reauth_in_progress = 0; -+ mhdp->hdcp.sink_is_repeater = 0; -+ mhdp->hdcp.hdcp_version = hdcp_config; -+ -+ do { -+ if (mhdp->hdcp.cancel == 1) { -+ DRM_ERROR("mhdp->hdcp.cancel is TRUE\n"); -+ return -ECANCELED; -+ } -+ -+ if (hdcp_config == HDCP_TX_1) -+ ret = hdmi_hdcp_auth_14(mhdp); -+ else -+ ret = hdmi_hdcp_auth_22(mhdp); -+ if (ret) { -+ u16 hdcp_port_status; -+ DRM_ERROR("hdmi_hdcp_auth_%s failed\n", -+ (hdcp_config == HDCP_TX_1) ? "14" : "22"); -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ hdmi_hdcp_handle_status(hdcp_port_status); -+ return -1; -+ } -+ -+ ret = hdmi_hdcp_auth_check(mhdp); -+ } while (ret == 1); -+ -+ return ret; -+} -+ -+static int _hdmi_hdcp_disable(struct cdns_mhdp_device *mhdp) -+{ -+ int ret = 0; -+ u8 hdcp_cfg = (HDCP_USE_KMKEY << 4); -+ -+ DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n", -+ mhdp->connector.base.name, mhdp->connector.base.base.id); -+ DRM_DEBUG_KMS("INFO: Disabling HDCP...\n"); -+ -+ ret = cdns_mhdp_hdcp_tx_config(mhdp, hdcp_cfg); -+ if (ret < 0) -+ DRM_DEBUG_KMS("cdns_mhdp_hdcp_tx_config failed\n"); -+ -+ DRM_DEBUG_KMS("HDCP is disabled\n"); -+ -+ mhdp->hdcp.events = 0; -+ -+ return ret; -+} -+ -+static int _hdmi_hdcp_enable(struct cdns_mhdp_device *mhdp) -+{ -+ int i, ret = 0, tries = 9; -+ u8 hpd_sts; -+ -+ hpd_sts = cdns_mhdp_read_hpd(mhdp); -+ if (1 != hpd_sts) { -+ dev_info(mhdp->dev, "%s HDP detected low, set state to DISABLING\n", __func__); -+ mhdp->hdcp.state = HDCP_STATE_DISABLING; -+ return -1; -+ } -+ -+ DRM_DEBUG_KMS("[%s:%d] HDCP is being enabled...\n", -+ mhdp->connector.base.name, mhdp->connector.base.base.id); -+ -+ mhdp->hdcp.events = 0; -+ -+ /* Incase of authentication failures, HDCP spec expects reauth. */ -+ /* TBD should this actually try 2.2 n times then 1.4? */ -+ for (i = 0; i < tries; i++) { -+ if (mhdp->hdcp.config & HDCP_CONFIG_2_2) { -+ ret = hdmi_hdcp_auth(mhdp, HDCP_TX_2); -+ if (ret == 0) -+ return 0; -+ else if (ret == -ECANCELED) -+ return ret; -+ _hdmi_hdcp_disable(mhdp); -+ } -+ } -+ -+ for (i = 0; i < tries; i++) { -+ if (mhdp->hdcp.config & HDCP_CONFIG_1_4) { -+ ret = hdmi_hdcp_auth(mhdp, HDCP_TX_1); -+ if (ret == 0) -+ return 0; -+ else if (ret == -ECANCELED) -+ return ret; -+ _hdmi_hdcp_disable(mhdp); -+ } -+ DRM_DEBUG_KMS("HDCP Auth failure (%d)\n", ret); -+ } -+ -+ DRM_ERROR("HDCP authentication failed (%d tries/%d)\n", tries, ret); -+ return ret; -+} -+ -+static void hdmi_hdcp_check_work(struct work_struct *work) -+{ -+ struct cdns_mhdp_hdcp *hdcp = container_of(work, -+ struct cdns_mhdp_hdcp, check_work.work); -+ struct cdns_mhdp_device *mhdp = container_of(hdcp, -+ struct cdns_mhdp_device, hdcp); -+ -+ /* todo: maybe we don't need to always schedule */ -+ hdmi_hdcp_check_link(mhdp); -+ schedule_delayed_work(&hdcp->check_work, 50); -+} -+ -+static void hdmi_hdcp_prop_work(struct work_struct *work) -+{ -+ struct cdns_mhdp_hdcp *hdcp = container_of(work, -+ struct cdns_mhdp_hdcp, prop_work); -+ struct cdns_mhdp_device *mhdp = container_of(hdcp, -+ struct cdns_mhdp_device, hdcp); -+ -+ struct drm_device *dev = mhdp->drm_dev; -+ struct drm_connector_state *state; -+ -+ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); -+ mutex_lock(&mhdp->hdcp.mutex); -+ -+ /* -+ * This worker is only used to flip between ENABLED/DESIRED. Either of -+ * those to UNDESIRED is handled by core. If hdcp_value == UNDESIRED, -+ * we're running just after hdcp has been disabled, so just exit -+ */ -+ if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { -+ state = mhdp->connector.base.state; -+ state->content_protection = mhdp->hdcp.value; -+ } -+ -+ mutex_unlock(&mhdp->hdcp.mutex); -+ drm_modeset_unlock(&dev->mode_config.connection_mutex); -+} -+ -+static void show_hdcp_supported(struct cdns_mhdp_device *mhdp) -+{ -+ if ((mhdp->hdcp.config & (HDCP_CONFIG_1_4 | HDCP_CONFIG_2_2)) == -+ (HDCP_CONFIG_1_4 | HDCP_CONFIG_2_2)) -+ DRM_INFO("Both HDCP 1.4 and 2 2 are enabled\n"); -+ else if (mhdp->hdcp.config & HDCP_CONFIG_1_4) -+ DRM_INFO("Only HDCP 1.4 is enabled\n"); -+ else if (mhdp->hdcp.config & HDCP_CONFIG_2_2) -+ DRM_INFO("Only HDCP 2.2 is enabled\n"); -+ else -+ DRM_INFO("HDCP is disabled\n"); -+} -+ -+#ifdef DEBUG -+void hdmi_hdcp_show_pairing(struct cdns_mhdp_device *mhdp, struct hdcp_trans_pairing_data *p) -+{ -+ char s[80]; -+ int i, k; -+ -+ DRM_INFO("Reveiver ID: %.2X%.2X%.2X%.2X%.2X\n", -+ p->receiver_id[0], -+ p->receiver_id[1], -+ p->receiver_id[2], -+ p->receiver_id[3], -+ p->receiver_id[4]); -+ for (k = 0, i = 0; k < 16; k++) -+ i += snprintf(&s[i], sizeof(s), "%02x", p->m[k]); -+ -+ DRM_INFO("\tm: %s\n", s); -+ -+ for (k = 0, i = 0; k < 16; k++) -+ i += snprintf(&s[i], sizeof(s), "%02x", p->km[k]); -+ -+ DRM_INFO("\tkm: %s\n", s); -+ -+ for (k = 0, i = 0; k < 16; k++) -+ i += snprintf(&s[i], sizeof(s), "%02x", p->ekh[k]); -+ -+ DRM_INFO("\tekh: %s\n", s); -+} -+#endif -+ -+void hdmi_hdcp_dump_pairing(struct seq_file *s, void *data) -+{ -+ struct cdns_mhdp_device *mhdp = data; -+#ifdef DEBUG -+ int i; -+ for (i = 0; i < mhdp->hdcp.num_paired; i++) -+ hdmi_hdcp_show_pairing(mhdp, &mhdp->hdcp.pairing[i]); -+#endif -+ seq_write(s, &mhdp->hdcp.pairing[0], -+ mhdp->hdcp.num_paired * sizeof(struct hdcp_trans_pairing_data)); -+} -+ -+static int hdmi_hdcp_pairing_show(struct seq_file *s, void *data) -+{ -+ hdmi_hdcp_dump_pairing(s, s->private); -+ return 0; -+} -+ -+static int hdmi_hdcp_dump_pairing_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, hdmi_hdcp_pairing_show, inode->i_private); -+} -+ -+static const struct file_operations hdmi_hdcp_dump_fops = { -+ .open = hdmi_hdcp_dump_pairing_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static void hdmi_hdcp_debugfs_init(struct cdns_mhdp_device *mhdp) -+{ -+ struct dentry *d, *root; -+ -+ root = debugfs_create_dir("imx-hdcp", NULL); -+ if (IS_ERR(root) || !root) -+ goto err; -+ -+ d = debugfs_create_file("dump_pairing", 0444, root, mhdp, -+ &hdmi_hdcp_dump_fops); -+ if (!d) -+ goto err; -+ return; -+ -+err: -+ dev_err(mhdp->dev, "Unable to create debugfs entries\n"); -+} -+ -+int cdns_hdmi_hdcp_init(struct cdns_mhdp_device *mhdp, struct device_node *of_node) -+{ -+ const char *compat; -+ u32 temp; -+ int ret; -+ -+ ret = of_property_read_string(of_node, "compatible", &compat); -+ if (ret) { -+ DRM_ERROR("Failed to compatible dts string\n"); -+ return ret; -+ } -+ if (!strstr(compat, "hdmi")) -+ return -EPERM; -+ -+ ret = of_property_read_u32(of_node, "hdcp-config", &temp); -+ if (ret) { -+ /* using highest level by default */ -+ mhdp->hdcp.config = HDCP_CONFIG_2_2; -+ DRM_INFO("Failed to get HDCP config - using HDCP 2.2 only\n"); -+ } else { -+ mhdp->hdcp.config = temp; -+ show_hdcp_supported(mhdp); -+ } -+ -+ hdmi_hdcp_debugfs_init(mhdp); -+ -+#ifdef USE_DEBUG_KEYS /* reserve for hdcp test key */ -+ { -+ u8 hdcp_cfg; -+ hdcp_cfg = HDCP_TX_2 | (HDCP_USE_KMKEY << 4) | (HDCP_CONTENT_TYPE_0 << 3); -+ imx_hdmi_load_test_keys(mhdp, &hdcp_cfg); -+ } -+#endif -+ -+ mhdp->hdcp.state = HDCP_STATE_INACTIVE; -+ -+ mutex_init(&mhdp->hdcp.mutex); -+ INIT_DELAYED_WORK(&mhdp->hdcp.check_work, hdmi_hdcp_check_work); -+ INIT_WORK(&mhdp->hdcp.prop_work, hdmi_hdcp_prop_work); -+ -+ return 0; -+} -+ -+int cdns_hdmi_hdcp_enable(struct cdns_mhdp_device *mhdp) -+{ -+ int ret = 0; -+ -+ mhdp->hdcp.reauth_in_progress = 0; -+ -+#ifdef STORE_PAIRING -+ hdmi_hdcp_get_stored_pairing(mhdp); -+#endif -+ msleep(500); -+ -+ mutex_lock(&mhdp->hdcp.mutex); -+ -+ mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; -+ mhdp->hdcp.state = HDCP_STATE_ENABLING; -+ mhdp->hdcp.cancel = 0; -+ -+ schedule_work(&mhdp->hdcp.prop_work); -+ schedule_delayed_work(&mhdp->hdcp.check_work, 50); -+ -+ mutex_unlock(&mhdp->hdcp.mutex); -+ -+ return ret; -+} -+ -+int cdns_hdmi_hdcp_disable(struct cdns_mhdp_device *mhdp) -+{ -+ int ret = 0; -+ -+ mutex_lock(&mhdp->hdcp.mutex); -+ if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { -+ mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; -+ mhdp->hdcp.state = HDCP_STATE_DISABLING; -+ mhdp->hdcp.cancel = 1; -+ schedule_work(&mhdp->hdcp.prop_work); -+ } -+ -+ mutex_unlock(&mhdp->hdcp.mutex); -+ -+ cancel_delayed_work_sync(&mhdp->hdcp.check_work); -+ -+ return ret; -+} -+ -+void cdns_hdmi_hdcp_atomic_check(struct drm_connector *connector, -+ struct drm_connector_state *old_state, -+ struct drm_connector_state *new_state) -+{ -+ u64 old_cp = old_state->content_protection; -+ u64 new_cp = new_state->content_protection; -+ struct drm_crtc_state *crtc_state; -+ -+ if (!new_state->crtc) { -+ /* -+ * If the connector is being disabled with CP enabled, mark it -+ * desired so it's re-enabled when the connector is brought back -+ */ -+ if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED) -+ new_state->content_protection = -+ DRM_MODE_CONTENT_PROTECTION_DESIRED; -+ return; -+ } -+ -+ /* -+ * Nothing to do if the state didn't change, or HDCP was activated since -+ * the last commit -+ */ -+ if (old_cp == new_cp || -+ (old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED && -+ new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)) -+ return; -+ -+ crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc); -+ crtc_state->mode_changed = true; -+} -+ -+static int hdmi_hdcp_check_link(struct cdns_mhdp_device *mhdp) -+{ -+ u16 hdcp_port_status = 0; -+ u8 hdcp_last_error = 0; -+ u8 hpd_sts; -+ int ret = 0; -+ -+ mhdp->hdcp.reauth_in_progress = 0; -+ mutex_lock(&mhdp->lock); -+ -+ if ((mhdp->hdcp.state == HDCP_STATE_AUTHENTICATED) || -+ (mhdp->hdcp.state == HDCP_STATE_AUTHENTICATING) || -+ (mhdp->hdcp.state == HDCP_STATE_REAUTHENTICATING) || -+ (mhdp->hdcp.state == HDCP_STATE_ENABLING)) { -+ -+ /* In active states, check the HPD signal. Because of the IRQ -+ * debounce delay, the state might not reflect the disconnection. -+ * The FW could already have detected the HDP down and reported error */ -+ hpd_sts = cdns_mhdp_read_hpd(mhdp); -+ if (1 != hpd_sts) -+ mhdp->hdcp.state = HDCP_STATE_DISABLING; -+ } -+ -+ if (mhdp->hdcp.state == HDCP_STATE_INACTIVE) -+ goto out; -+ -+ if (mhdp->hdcp.state == HDCP_STATE_DISABLING) { -+ _hdmi_hdcp_disable(mhdp); -+ mhdp->hdcp.state = HDCP_STATE_INACTIVE; -+ goto out; -+ } -+ -+/* TODO items: -+ Need to make sure that any requests from the firmware are actually -+ processed so want to remove this first jump to 'out', i.e. process -+ reauthentication requests, cleanup errors and repeater receiver id -+ checks. -+*/ -+ if (mhdp->hdcp.state == HDCP_STATE_AUTHENTICATED) { -+ /* get port status */ -+ hdcp_port_status = hdmi_hdcp_get_status(mhdp); -+ hdcp_last_error = GET_HDCP_PORT_STS_LAST_ERR(hdcp_port_status); -+ if (hdcp_last_error == HDCP_TRAN_ERR_REAUTH_REQ) { -+ DRM_INFO("Sink requesting re-authentication\n"); -+ mhdp->hdcp.state = HDCP_STATE_REAUTHENTICATING; -+ } else if (hdcp_last_error) { -+ DRM_ERROR("HDCP error no: %u\n", hdcp_last_error); -+ -+ if (mhdp->hdcp.value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) -+ goto out; -+ if (hdcp_port_status & HDCP_PORT_STS_AUTH) { -+ if (mhdp->hdcp.value != -+ DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { -+ mhdp->hdcp.value = -+ DRM_MODE_CONTENT_PROTECTION_ENABLED; -+ schedule_work(&mhdp->hdcp.prop_work); -+ goto out; -+ } -+ } -+ -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ -+ } else if (mhdp->hdcp.sink_is_repeater) { -+ u8 new_events; -+ /* Check events... and process if HDCPTX_IS_RECEIVER_ID_VALID_EVENT. */ -+ new_events = cdns_mhdp_get_event(mhdp); -+ mhdp->hdcp.events |= new_events; -+ if (check_event(mhdp->hdcp.events, HDCPTX_IS_RECEIVER_ID_VALID_EVENT)) { -+ DRM_INFO("Sink repeater updating receiver ID list...\n"); -+ if (hdmi_hdcp_check_receviers(mhdp)) -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ } -+ } -+ } -+ -+ if (mhdp->hdcp.state == HDCP_STATE_REAUTHENTICATING) { -+ /* For now just deal with HDCP2.2 */ -+ if (mhdp->hdcp.hdcp_version == HDCP_TX_2) -+ mhdp->hdcp.reauth_in_progress = 1; -+ else -+ mhdp->hdcp.state = HDCP_STATE_AUTH_FAILED; -+ } -+ -+ if (mhdp->hdcp.state == HDCP_STATE_ENABLING) { -+ mhdp->hdcp.state = HDCP_STATE_AUTHENTICATING; -+ ret = _hdmi_hdcp_enable(mhdp); -+ if (ret == -ECANCELED) -+ goto out; -+ else if (ret) { -+ DRM_ERROR("Failed to enable hdcp (%d)\n", ret); -+ mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; -+ schedule_work(&mhdp->hdcp.prop_work); -+ goto out; -+ } -+ } -+ -+ if ((mhdp->hdcp.state == HDCP_STATE_AUTH_FAILED) || -+ (mhdp->hdcp.state == HDCP_STATE_REAUTHENTICATING)) { -+ -+ print_port_status(hdcp_port_status); -+ if (mhdp->hdcp.state == HDCP_STATE_AUTH_FAILED) { -+ DRM_DEBUG_KMS("[%s:%d] HDCP link failed, retrying authentication 0x%2x\n", -+ mhdp->connector.base.name, mhdp->connector.base.base.id, hdcp_port_status); -+ ret = _hdmi_hdcp_disable(mhdp); -+ if (ret) { -+ DRM_ERROR("Failed to disable hdcp (%d)\n", ret); -+ mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; -+ schedule_work(&mhdp->hdcp.prop_work); -+ goto out; -+ } -+ } else -+ DRM_DEBUG_KMS("[%s:%d] HDCP attempt reauthentication 0x%2x\n", -+ mhdp->connector.base.name, mhdp->connector.base.base.id, hdcp_port_status); -+ -+ ret = _hdmi_hdcp_enable(mhdp); -+ if (ret == -ECANCELED) -+ goto out; -+ else if (ret) { -+ DRM_ERROR("Failed to enable hdcp (%d)\n", ret); -+ mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; -+ schedule_work(&mhdp->hdcp.prop_work); -+ goto out; -+ } -+ } -+ -+out: -+ mutex_unlock(&mhdp->lock); -+ -+ return ret; -+} -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c -new file mode 100644 -index 000000000000..587c5f953489 ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c -@@ -0,0 +1,300 @@ -+/* -+ * Cadence HDCP API driver -+ * -+ * Copyright (C) 2021 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+ -+#include "cdns-mhdp.h" -+ -+static u32 mhdp_hdcp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset) -+{ -+ u32 val; -+ -+ mutex_lock(&mhdp->iolock); -+ -+ if (mhdp->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K APB bus */ -+ writel(offset >> 12, mhdp->regs_sec + 8); -+ val = readl((offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_NORMAL_APB) -+ val = readl(mhdp->regs_sec + offset); -+ -+ mutex_unlock(&mhdp->iolock); -+ -+ return val; -+} -+ -+static void mhdp_hdcp_bus_write(u32 val, struct cdns_mhdp_device *mhdp, u32 offset) -+{ -+ mutex_lock(&mhdp->iolock); -+ -+ if (mhdp->bus_type == BUS_TYPE_LOW4K_APB) { -+ /* Remap address to low 4K APB bus */ -+ writel(offset >> 12, mhdp->regs_sec + 8); -+ writel(val, (offset & 0xfff) + mhdp->regs_base); -+ } else if (mhdp->bus_type == BUS_TYPE_NORMAL_APB) -+ writel(val, mhdp->regs_sec + offset); -+ -+ mutex_unlock(&mhdp->iolock); -+} -+ -+static int mhdp_hdcp_mailbox_read(struct cdns_mhdp_device *mhdp) -+{ -+ int val, ret; -+ -+ ret = mhdp_readx_poll_timeout(mhdp_hdcp_bus_read, mhdp, MAILBOX_EMPTY_ADDR, -+ val, !val, MAILBOX_RETRY_US, -+ MAILBOX_TIMEOUT_US); -+ if (ret < 0) -+ return ret; -+ -+ return mhdp_hdcp_bus_read(mhdp, MAILBOX0_RD_DATA) & 0xff; -+} -+ -+static int mhdp_hdcp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val) -+{ -+ int ret, full; -+ -+ ret = mhdp_readx_poll_timeout(mhdp_hdcp_bus_read, mhdp, MAILBOX_FULL_ADDR, -+ full, !full, MAILBOX_RETRY_US, -+ MAILBOX_TIMEOUT_US); -+ if (ret < 0) -+ return ret; -+ -+ mhdp_hdcp_bus_write(val, mhdp, MAILBOX0_WR_DATA); -+ -+ return 0; -+} -+ -+static int mhdp_hdcp_mailbox_validate_receive(struct cdns_mhdp_device *mhdp, -+ u8 module_id, u8 opcode, u16 req_size) -+{ -+ u32 mbox_size, i; -+ u8 header[4]; -+ int ret; -+ -+ /* read the header of the message */ -+ for (i = 0; i < 4; i++) { -+ ret = mhdp_hdcp_mailbox_read(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ header[i] = ret; -+ } -+ -+ mbox_size = get_unaligned_be16(header + 2); -+ -+ if (opcode != header[0] || module_id != header[1] || -+ req_size != mbox_size) { -+ /* -+ * If the message in mailbox is not what we want, we need to -+ * clear the mailbox by reading its contents. -+ */ -+ for (i = 0; i < mbox_size; i++) -+ if (mhdp_hdcp_mailbox_read(mhdp) < 0) -+ break; -+ -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int mhdp_hdcp_mailbox_read_receive(struct cdns_mhdp_device *mhdp, -+ u8 *buff, u16 buff_size) -+{ -+ u32 i; -+ int ret; -+ -+ for (i = 0; i < buff_size; i++) { -+ ret = mhdp_hdcp_mailbox_read(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ buff[i] = ret; -+ } -+ -+ return 0; -+} -+ -+static int mhdp_hdcp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id, -+ u8 opcode, u16 size, u8 *message) -+{ -+ u8 header[4]; -+ int ret, i; -+ -+ header[0] = opcode; -+ header[1] = module_id; -+ put_unaligned_be16(size, header + 2); -+ -+ for (i = 0; i < 4; i++) { -+ ret = mhdp_hdcp_mailbox_write(mhdp, header[i]); -+ if (ret) -+ return ret; -+ } -+ -+ for (i = 0; i < size; i++) { -+ ret = mhdp_hdcp_mailbox_write(mhdp, message[i]); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+/* HDCP API */ -+int cdns_mhdp_hdcp_tx_config(struct cdns_mhdp_device *mhdp, u8 config) -+{ -+ return mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_CONFIGURATION, sizeof(config), &config); -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp_tx_config); -+ -+int cdns_mhdp_hdcp2_tx_respond_km(struct cdns_mhdp_device *mhdp, -+ u8 *msg, u16 len) -+{ -+ return mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP2_TX_RESPOND_KM, len, msg); -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp2_tx_respond_km); -+ -+int cdns_mhdp_hdcp_tx_status_req(struct cdns_mhdp_device *mhdp, -+ u8 *status, u16 len) -+{ -+ int ret; -+ -+ ret = mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_STATUS_CHANGE, 0, NULL); -+ if (ret) -+ goto err_tx_req; -+ -+ ret = mhdp_hdcp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_STATUS_CHANGE, len); -+ if (ret) -+ goto err_tx_req; -+ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, status, len); -+ if (ret) -+ goto err_tx_req; -+ -+err_tx_req: -+ if (ret) -+ DRM_ERROR("hdcp tx status req failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp_tx_status_req); -+ -+int cdns_mhdp_hdcp2_tx_is_km_stored_req(struct cdns_mhdp_device *mhdp, u8 *data, u16 len) -+{ -+ int ret; -+ -+ ret = mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP2_TX_IS_KM_STORED, 0, NULL); -+ if (ret) -+ goto err_is_km; -+ -+ ret = mhdp_hdcp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP2_TX_IS_KM_STORED, len); -+ if (ret) -+ goto err_is_km; -+ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, data, len); -+ -+err_is_km: -+ if (ret) -+ DRM_ERROR("hdcp2 tx is km stored req failed: %d\n", ret); -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp2_tx_is_km_stored_req); -+ -+int cdns_mhdp_hdcp2_tx_store_km(struct cdns_mhdp_device *mhdp, -+ u8 *resp, u16 len) -+{ -+ int ret; -+ -+ ret = mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP2_TX_STORE_KM, 0, NULL); -+ if (ret) -+ goto err_store_km; -+ -+ ret = mhdp_hdcp_mailbox_validate_receive(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP2_TX_STORE_KM, len); -+ if (ret) -+ goto err_store_km; -+ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, resp, len); -+ -+err_store_km: -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp2_tx_store_km); -+ -+int cdns_mhdp_hdcp_tx_is_receiver_id_valid(struct cdns_mhdp_device *mhdp, -+ u8 *rx_id, u8 *num) -+{ -+ u32 mbox_size, i; -+ u8 header[4]; -+ u8 temp; -+ int ret; -+ -+ ret = mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_IS_RECEIVER_ID_VALID, 0, NULL); -+ if (ret) -+ goto err_rx_id; -+ -+ /* read the header of the message */ -+ for (i = 0; i < 4; i++) { -+ ret = mhdp_hdcp_mailbox_read(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ header[i] = ret; -+ } -+ -+ mbox_size = get_unaligned_be16(header + 2); -+ -+ if (HDCP_TX_IS_RECEIVER_ID_VALID != header[0] || -+ MB_MODULE_ID_HDCP_TX != header[1]) -+ return -EINVAL; -+ -+ /* First get num of receivers */ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, num, 1); -+ if (ret) -+ goto err_rx_id; -+ -+ /* skip second data */ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, &temp, 1); -+ if (ret) -+ goto err_rx_id; -+ -+ /* get receivers ID */ -+ ret = mhdp_hdcp_mailbox_read_receive(mhdp, rx_id, mbox_size - 2); -+ -+err_rx_id: -+ return ret; -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp_tx_is_receiver_id_valid); -+ -+int cdns_mhdp_hdcp_tx_respond_receiver_id_valid( -+ struct cdns_mhdp_device *mhdp, u8 val) -+{ -+ return mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_RESPOND_RECEIVER_ID_VALID, sizeof(val), &val); -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp_tx_respond_receiver_id_valid); -+ -+int cdns_mhdp_hdcp_tx_reauth(struct cdns_mhdp_device *mhdp, u8 msg) -+{ -+ return mhdp_hdcp_mailbox_send(mhdp, MB_MODULE_ID_HDCP_TX, -+ HDCP_TX_DO_AUTH_REQ, sizeof(msg), &msg); -+} -+EXPORT_SYMBOL(cdns_mhdp_hdcp_tx_reauth); -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.h -new file mode 100644 -index 000000000000..4ce76dd1ee58 ---- /dev/null -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.h -@@ -0,0 +1,36 @@ -+/* -+ * Copyright (C) 2021 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+ -+#ifndef CDNS_HDMI_HDCP_H -+#define CDNS_HDMI_HDCP_H -+ -+int cdns_mhdp_hdcp2_tx_respond_km(struct cdns_mhdp_device *mhdp, -+ u8 *msg, u16 len); -+int cdns_mhdp_hdcp_tx_config(struct cdns_mhdp_device *mhdp, u8 config); -+int cdns_mhdp_hdcp_tx_status_req(struct cdns_mhdp_device *mhdp, -+ u8 *status, u16 len); -+int cdns_mhdp_hdcp2_tx_is_km_stored_req(struct cdns_mhdp_device *mhdp, u8 *data, u16 len); -+int cdns_mhdp_hdcp2_tx_store_km(struct cdns_mhdp_device *mhdp, -+ u8 *reg, u16 len); -+int cdns_mhdp_hdcp_tx_is_receiver_id_valid(struct cdns_mhdp_device *mhdp, -+ u8 *rx_id, u8 *num); -+int cdns_mhdp_hdcp_tx_respond_receiver_id_valid(struct cdns_mhdp_device *mhdp, -+ u8 val); -+int cdns_mhdp_hdcp_tx_test_keys(struct cdns_mhdp_device *mhdp, u8 type, u8 resp); -+int cdns_mhdp_hdcp_tx_reauth(struct cdns_mhdp_device *mhdp, u8 msg); -+ -+int cdns_hdmi_hdcp_init(struct cdns_mhdp_device *mhdp, struct device_node *of_node); -+int cdns_hdmi_hdcp_enable(struct cdns_mhdp_device *mhdp); -+int cdns_hdmi_hdcp_disable(struct cdns_mhdp_device *mhdp); -+void cdns_hdmi_hdcp_atomic_check(struct drm_connector *connector, -+ struct drm_connector_state *old_state, -+ struct drm_connector_state *new_state); -+ -+#endif /* CDNS_HDMI_HDCP_H */ -diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h -index 338fa55b8bdf..5752c47b1a16 100644 ---- a/include/drm/bridge/cdns-mhdp.h -+++ b/include/drm/bridge/cdns-mhdp.h -@@ -388,6 +388,27 @@ - #define HDMI_TX_TEST 0xBB - #define HDMI_TX_EDID_INTERNAL 0xF0 - -+/* HDCP General opcode */ -+#define HDCP_GENERAL_SET_LC_128 0x00 -+#define HDCP_GENERAL_SET_SEED 0x01 -+ -+/* HDCP TX opcode */ -+#define HDCP_TX_CONFIGURATION 0x00 -+#define HDCP2_TX_SET_PUBLIC_KEY_PARAMS 0x01 -+#define HDCP2_TX_SET_DEBUG_RANDOM_NUMBERS 0x02 -+#define HDCP2_TX_RESPOND_KM 0x03 -+#define HDCP1_TX_SEND_KEYS 0x04 -+#define HDCP1_TX_SEND_RANDOM_AN 0x05 -+#define HDCP_TX_STATUS_CHANGE 0x06 -+#define HDCP2_TX_IS_KM_STORED 0x07 -+#define HDCP2_TX_STORE_KM 0x08 -+#define HDCP_TX_IS_RECEIVER_ID_VALID 0x09 -+#define HDCP_TX_RESPOND_RECEIVER_ID_VALID 0x0A -+#define HDCP_TX_TEST_KEYS 0x0B -+#define HDCP2_TX_SET_KM_KEY_PARAMS 0x0C -+#define HDCP_TX_SET_CP_IRQ 0x0D -+#define HDCP_TX_DO_AUTH_REQ 0x0E -+ - #define FW_STANDBY 0 - #define FW_ACTIVE 1 - -@@ -428,12 +449,16 @@ - #define EQ_PHASE_FAILED BIT(6) - #define FASE_LT_FAILED BIT(7) - --#define DPTX_HPD_EVENT BIT(0) --#define DPTX_TRAINING_EVENT BIT(1) --#define HDCP_TX_STATUS_EVENT BIT(4) --#define HDCP2_TX_IS_KM_STORED_EVENT BIT(5) --#define HDCP2_TX_STORE_KM_EVENT BIT(6) --#define HDCP_TX_IS_RECEIVER_ID_VALID_EVENT BIT(7) -+#define DPTX_HPD_EVENT BIT(0) -+#define HDMI_TX_HPD_EVENT BIT(0) -+#define HDMI_RX_5V_EVENT BIT(0) -+#define DPTX_TRAINING_EVENT BIT(1) -+#define HDMI_RX_SCDC_CHANGE_EVENT BIT(1) -+#define HDCPTX_STATUS_EVENT BIT(4) -+#define HDCPRX_STATUS_EVENT BIT(4) -+#define HDCPTX_IS_KM_STORED_EVENT BIT(5) -+#define HDCPTX_STORE_KM_EVENT BIT(6) -+#define HDCPTX_IS_RECEIVER_ID_VALID_EVENT BIT(7) - - #define TU_SIZE 30 - #define CDNS_DP_MAX_LINK_RATE 540000 -@@ -442,6 +467,7 @@ - #define F_VIF_DATA_WIDTH(x) (((x) & ((1 << 2) - 1)) << 2) - #define F_HDMI_MODE(x) (((x) & ((1 << 2) - 1)) << 0) - #define F_GCP_EN(x) (((x) & ((1 << 1) - 1)) << 12) -+#define F_CLEAR_AVMUTE(x) (((x) & ((1 << 1) - 1)) << 14) - #define F_DATA_EN(x) (((x) & ((1 << 1) - 1)) << 15) - #define F_HDMI2_PREAMBLE_EN(x) (((x) & ((1 << 1) - 1)) << 18) - #define F_PIC_3D(x) (((x) & ((1 << 4) - 1)) << 7) -@@ -662,6 +688,55 @@ struct cdns_plat_data { - char *plat_name; - }; - -+/* HDCP */ -+#define MAX_STORED_KM 64 -+#define HDCP_PAIRING_M_LEN 16 -+#define HDCP_PAIRING_M_EKH 16 -+#define HDCP_PAIRING_R_ID 5 -+ -+/* HDCP2_TX_SET_DEBUG_RANDOM_NUMBERS */ -+#define DEBUG_RANDOM_NUMBERS_KM_LEN 16 -+#define DEBUG_RANDOM_NUMBERS_RN_LEN 8 -+#define DEBUG_RANDOM_NUMBERS_KS_LEN 16 -+#define DEBUG_RANDOM_NUMBERS_RIV_LEN 8 -+#define DEBUG_RANDOM_NUMBERS_RTX_LEN 8 -+ -+struct hdcp_trans_pairing_data { -+ u8 receiver_id[HDCP_PAIRING_R_ID]; -+ u8 m[HDCP_PAIRING_M_LEN]; -+ u8 km[DEBUG_RANDOM_NUMBERS_KM_LEN]; -+ u8 ekh[HDCP_PAIRING_M_EKH]; -+}; -+ -+enum hdmi_hdcp_state { -+ HDCP_STATE_NO_AKSV, -+ HDCP_STATE_INACTIVE, -+ HDCP_STATE_ENABLING, -+ HDCP_STATE_AUTHENTICATING, -+ HDCP_STATE_REAUTHENTICATING, -+ HDCP_STATE_AUTHENTICATED, -+ HDCP_STATE_DISABLING, -+ HDCP_STATE_AUTH_FAILED -+}; -+ -+struct cdns_mhdp_hdcp { -+ struct mutex mutex; -+ u64 value; /* protected by hdcp_mutex */ -+ struct delayed_work check_work; -+ struct work_struct prop_work; -+ u8 state; -+ u8 cancel; -+ u8 bus_type; -+ u8 config; -+ struct hdcp_trans_pairing_data pairing[MAX_STORED_KM]; -+ u8 num_paired; -+ -+ u8 events; -+ u8 sink_is_repeater; -+ u8 reauth_in_progress; -+ u8 hdcp_version; -+}; -+ - struct cdns_mhdp_device { - void __iomem *regs_base; - void __iomem *regs_sec; -@@ -669,6 +744,7 @@ struct cdns_mhdp_device { - int bus_type; - - struct device *dev; -+ struct drm_device *drm_dev; - - struct cdns_mhdp_connector connector; - struct clk *spdif_clk; -@@ -722,6 +798,7 @@ struct cdns_mhdp_device { - hdmi_codec_plugged_cb plugged_cb; - struct device *codec_dev; - enum drm_connector_status last_connector_result; -+ struct cdns_mhdp_hdcp hdcp; - }; - - u32 cdns_mhdp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset); -@@ -742,6 +819,7 @@ int cdns_mhdp_get_edid_block(void *mhdp, u8 *edid, - int cdns_mhdp_train_link(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_set_video_status(struct cdns_mhdp_device *mhdp, int active); - int cdns_mhdp_config_video(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_apb_conf(struct cdns_mhdp_device *mhdp, u8 sel); - - /* Audio */ - int cdns_mhdp_audio_stop(struct cdns_mhdp_device *mhdp, -@@ -770,8 +848,6 @@ int cdns_mhdp_mailbox_read_receive(struct cdns_mhdp_device *mhdp, - int cdns_mhdp_mailbox_validate_receive(struct cdns_mhdp_device *mhdp, - u8 module_id, u8 opcode, - u16 req_size); --int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp); -- - void cdns_mhdp_infoframe_set(struct cdns_mhdp_device *mhdp, - u8 entry_id, u8 packet_len, u8 *packet, u8 packet_type); - int cdns_hdmi_get_edid_block(void *data, u8 *edid, u32 block, size_t length); --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0021-LF-3272-drm-cdns_mhdp-fix-Coverity-Issue-11566406.patch b/projects/NXP/devices/iMX8/patches/linux/0021-LF-3272-drm-cdns_mhdp-fix-Coverity-Issue-11566406.patch deleted file mode 100644 index bf124e8f71..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0021-LF-3272-drm-cdns_mhdp-fix-Coverity-Issue-11566406.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 2a093769a29f03103195b34c269411ee21b646e2 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 Jan 2021 10:37:09 +0800 -Subject: [PATCH 21/49] LF-3272: drm: cdns_mhdp: fix Coverity Issue: 11566406 - -Add default access hdcp bus to fix -Coverity Issue: 11566406 Uninitialized scalar variable. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c -index 587c5f953489..b3c931382013 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdcp.c -@@ -27,6 +27,8 @@ static u32 mhdp_hdcp_bus_read(struct cdns_mhdp_device *mhdp, u32 offset) - val = readl((offset & 0xfff) + mhdp->regs_base); - } else if (mhdp->bus_type == BUS_TYPE_NORMAL_APB) - val = readl(mhdp->regs_sec + offset); -+ else -+ val = readl(mhdp->regs_base + offset); - - mutex_unlock(&mhdp->iolock); - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0022-LF-3271-drm-cdns-hdmi-fix-Coverity-Issue-11566407.patch b/projects/NXP/devices/iMX8/patches/linux/0022-LF-3271-drm-cdns-hdmi-fix-Coverity-Issue-11566407.patch deleted file mode 100644 index af85c51c9d..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0022-LF-3271-drm-cdns-hdmi-fix-Coverity-Issue-11566407.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 85ad1a878118a8dbaf9da5f85a2e088880d5ea01 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 Jan 2021 10:44:17 +0800 -Subject: [PATCH 22/49] LF-3271: drm: cdns-hdmi: fix Coverity Issue: 11566407 - -Delete dead code to fix Coverity Issue: 11566407. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index dc393f6b75e7..a89c8cba4788 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -150,7 +150,6 @@ ssize_t HDCPTX_Status_store(struct device *dev, - else - dev_err(dev, "%s &hdp->state invalid\n", __func__); - return -1; -- return count; - } - - static void hdmi_sink_config(struct cdns_mhdp_device *mhdp) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0023-LF-3270-drm-cdns-hdmi-fix-coverity-Issue-11566405.patch b/projects/NXP/devices/iMX8/patches/linux/0023-LF-3270-drm-cdns-hdmi-fix-coverity-Issue-11566405.patch deleted file mode 100644 index 2ece85029d..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0023-LF-3270-drm-cdns-hdmi-fix-coverity-Issue-11566405.patch +++ /dev/null @@ -1,40 +0,0 @@ -From ddfa5aeb97c12fb7a67e6507ef2ae051658f112b Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 Jan 2021 10:49:13 +0800 -Subject: [PATCH 23/49] LF-3270: drm: cdns-hdmi: fix coverity Issue: 11566405 - -Delete unused code to fix coverity Issue: 11566405. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index a89c8cba4788..2300c3d8a91d 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -37,17 +37,15 @@ static struct device_attribute HDCPTX_do_reauth = __ATTR_WO(HDCPTX_do_reauth); - static ssize_t HDCPTX_do_reauth_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) - { -- int value, ret; -+ int ret; - struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); - - ret = cdns_mhdp_hdcp_tx_reauth(mhdp, 1); -- -- sscanf(buf, "%d", &value); -- - if (ret < 0) { - dev_err(dev, "%s cdns_mhdp_hdcp_tx_reauth failed\n", __func__); - return -1; - } -+ - return count; - } - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0024-LF-3269-drm-cdns-hdmi-fix-coverity-Issue-11566404.patch b/projects/NXP/devices/iMX8/patches/linux/0024-LF-3269-drm-cdns-hdmi-fix-coverity-Issue-11566404.patch deleted file mode 100644 index 1395849b6f..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0024-LF-3269-drm-cdns-hdmi-fix-coverity-Issue-11566404.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 2812d071eb348d903620f7ebadaf848024b3c672 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 Jan 2021 11:04:41 +0800 -Subject: [PATCH 24/49] LF-3269: drm: cdns-hdmi: fix coverity Issue: 11566404 - -Check return value to fix coverity Issue: 11566404. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index 2300c3d8a91d..df8ac87b3a54 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -59,9 +59,12 @@ static ssize_t HDCPTX_Version_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) - { - struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -- int value; -+ int value, ret; -+ -+ ret = sscanf(buf, "%d", &value); -+ if (ret != 1) -+ return -EINVAL; - -- sscanf(buf, "%d", &value); - if (value == 2) - mhdp->hdcp.config = 2; - else if (value == 1) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0025-LF-3268-drm-cdns-hdmi-fix-Coverity-Issue-11566403.patch b/projects/NXP/devices/iMX8/patches/linux/0025-LF-3268-drm-cdns-hdmi-fix-Coverity-Issue-11566403.patch deleted file mode 100644 index 0a3c6444ab..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0025-LF-3268-drm-cdns-hdmi-fix-Coverity-Issue-11566403.patch +++ /dev/null @@ -1,36 +0,0 @@ -From cd49375db5c05acb824fa18ae9d19290073cda08 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 Jan 2021 11:07:32 +0800 -Subject: [PATCH 25/49] LF-3268: drm: cdns-hdmi: fix Coverity Issue: 11566403 - -Check return value to fix Coverity Issue: 11566403. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -index df8ac87b3a54..28193178140f 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c -@@ -119,10 +119,13 @@ ssize_t HDCPTX_Status_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) - { - struct cdns_mhdp_device *mhdp = dev_get_drvdata(dev); -- int value; -+ int value, ret; - - if (count == 2) { -- sscanf(buf, "%d", &value); -+ ret = sscanf(buf, "%d", &value); -+ if (ret != 1) -+ return -EINVAL; -+ - if ((value >= HDCP_STATE_NO_AKSV) && (value <= HDCP_STATE_AUTH_FAILED)) { - mhdp->hdcp.state = value; - return count; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0026-LF-3367-1-drm-cdns_hdmi-HDCP_STATE_DISABLING-may-mis.patch b/projects/NXP/devices/iMX8/patches/linux/0026-LF-3367-1-drm-cdns_hdmi-HDCP_STATE_DISABLING-may-mis.patch deleted file mode 100644 index 774398207e..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0026-LF-3367-1-drm-cdns_hdmi-HDCP_STATE_DISABLING-may-mis.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 54a5d4d3ba2de923fa4a4e5ef5e90151fb7f2fd8 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Thu, 18 Feb 2021 16:25:52 +0800 -Subject: [PATCH 26/49] LF-3367-1: drm: cdns_hdmi: HDCP_STATE_DISABLING may - missed by check link - -Polling thread check_work is designed to handle all hdcp state change. -In HDCP disable function, check_work thread will be stopped after -hdcp.state is set to HDCP_STATE_DISABLING. check_work thread may miss -the state change, call check link function make sure HDCP_STATE_DISABLING -state is properly handled. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai -Acked-by: Jason Liu ---- - drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -index e2a3bc7fb42b..9119f2063098 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -@@ -988,6 +988,8 @@ int cdns_hdmi_hdcp_disable(struct cdns_mhdp_device *mhdp) - { - int ret = 0; - -+ cancel_delayed_work_sync(&mhdp->hdcp.check_work); -+ - mutex_lock(&mhdp->hdcp.mutex); - if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { - mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; -@@ -998,7 +1000,8 @@ int cdns_hdmi_hdcp_disable(struct cdns_mhdp_device *mhdp) - - mutex_unlock(&mhdp->hdcp.mutex); - -- cancel_delayed_work_sync(&mhdp->hdcp.check_work); -+ /* Make sure HDCP_STATE_DISABLING state is handled */ -+ hdmi_hdcp_check_link(mhdp); - - return ret; - } --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0027-LF-3367-2-drm-mhdp-more-time-for-FW-alive-check.patch b/projects/NXP/devices/iMX8/patches/linux/0027-LF-3367-2-drm-mhdp-more-time-for-FW-alive-check.patch deleted file mode 100644 index 9c39cf8250..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0027-LF-3367-2-drm-mhdp-more-time-for-FW-alive-check.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 42394af5975326eb20901d65eac47963847006e2 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Feb 2021 16:41:31 +0800 -Subject: [PATCH 27/49] LF-3367-2: drm: mhdp: more time for FW alive check - -FW alive check function may return false in hdcp enable/disable stress test. -Add more time for FW alive check, make sure get correct state. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai -Acked-by: Jason Liu ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -index 2a8ab0872f25..3487a2fa335c 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-common.c -@@ -142,7 +142,7 @@ bool cdns_mhdp_check_alive(struct cdns_mhdp_device *mhdp) - alive = cdns_mhdp_bus_read(mhdp, KEEP_ALIVE); - - while (retries_left--) { -- udelay(2); -+ msleep(1); - - newalive = cdns_mhdp_bus_read(mhdp, KEEP_ALIVE); - if (alive == newalive) --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0028-LF-3367-3-drm-mhdp-hdcp-adjust-state-handle-priority.patch b/projects/NXP/devices/iMX8/patches/linux/0028-LF-3367-3-drm-mhdp-hdcp-adjust-state-handle-priority.patch deleted file mode 100644 index deeaae4375..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0028-LF-3367-3-drm-mhdp-hdcp-adjust-state-handle-priority.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 60f6b8c90766663303f6005468502798eb2b0f44 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Feb 2021 17:53:54 +0800 -Subject: [PATCH 28/49] LF-3367-3: drm: mhdp-hdcp: adjust state handle priority - -Handle HDCP_STATE_INACTIVE and HDCP_STATE_DISABLING state priority -to avoid unnecessary HPD state check, drm has check it when hdcp -enable/disable. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai -Acked-by: Jason Liu ---- - .../gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c | 24 ++++++++++--------- - 1 file changed, 13 insertions(+), 11 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -index 9119f2063098..5dfbd7943306 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c -@@ -1048,6 +1048,15 @@ static int hdmi_hdcp_check_link(struct cdns_mhdp_device *mhdp) - mhdp->hdcp.reauth_in_progress = 0; - mutex_lock(&mhdp->lock); - -+ if (mhdp->hdcp.state == HDCP_STATE_INACTIVE) -+ goto out; -+ -+ if (mhdp->hdcp.state == HDCP_STATE_DISABLING) { -+ _hdmi_hdcp_disable(mhdp); -+ mhdp->hdcp.state = HDCP_STATE_INACTIVE; -+ goto out; -+ } -+ - if ((mhdp->hdcp.state == HDCP_STATE_AUTHENTICATED) || - (mhdp->hdcp.state == HDCP_STATE_AUTHENTICATING) || - (mhdp->hdcp.state == HDCP_STATE_REAUTHENTICATING) || -@@ -1056,18 +1065,11 @@ static int hdmi_hdcp_check_link(struct cdns_mhdp_device *mhdp) - /* In active states, check the HPD signal. Because of the IRQ - * debounce delay, the state might not reflect the disconnection. - * The FW could already have detected the HDP down and reported error */ -- hpd_sts = cdns_mhdp_read_hpd(mhdp); -- if (1 != hpd_sts) -+ hpd_sts = cdns_mhdp_read_hpd(mhdp); -+ if (1 != hpd_sts) { - mhdp->hdcp.state = HDCP_STATE_DISABLING; -- } -- -- if (mhdp->hdcp.state == HDCP_STATE_INACTIVE) -- goto out; -- -- if (mhdp->hdcp.state == HDCP_STATE_DISABLING) { -- _hdmi_hdcp_disable(mhdp); -- mhdp->hdcp.state = HDCP_STATE_INACTIVE; -- goto out; -+ goto out; -+ } - } - - /* TODO items: --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0029-clk-imx8mq-add-27MHz-PHY-ref-clock.patch b/projects/NXP/devices/iMX8/patches/linux/0029-clk-imx8mq-add-27MHz-PHY-ref-clock.patch deleted file mode 100644 index 6175eb5148..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0029-clk-imx8mq-add-27MHz-PHY-ref-clock.patch +++ /dev/null @@ -1,42 +0,0 @@ -From afbe8e0ae318f407d64bbc48b784d93c782b6564 Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Thu, 5 Sep 2019 13:07:22 +0300 -Subject: [PATCH 29/49] clk: imx8mq: add 27MHz PHY ref clock - -This clock is a high precision clock on imx8mq-evk board that will be used by -HDMI phy. - -Signed-off-by: Laurentiu Palcu ---- - drivers/clk/imx/clk-imx8mq.c | 3 ++- - include/dt-bindings/clock/imx8mq-clock.h | 4 +++- - 2 files changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c -index 06292d4a98ff..6bd2fe0ae71d 100644 ---- a/drivers/clk/imx/clk-imx8mq.c -+++ b/drivers/clk/imx/clk-imx8mq.c -@@ -304,6 +304,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev) - hws[IMX8MQ_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2"); - hws[IMX8MQ_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3"); - hws[IMX8MQ_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4"); -+ hws[IMX8MQ_CLK_PHY_27MHZ] = imx_get_clk_hw_by_name(np, "hdmi_phy_27m"); - - np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop"); - base = of_iomap(np, 0); -diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h -index 9b8045d75b8b..2a81f96b7c74 100644 ---- a/include/dt-bindings/clock/imx8mq-clock.h -+++ b/include/dt-bindings/clock/imx8mq-clock.h -@@ -431,6 +431,7 @@ - #define IMX8MQ_CLK_MON_SEL 301 - #define IMX8MQ_CLK_MON_CLK2_OUT 302 -+#define IMX8MQ_CLK_PHY_27MHZ 303 - --#define IMX8MQ_CLK_END 303 -+#define IMX8MQ_CLK_END 304 - - #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */ --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0030-drm-imx-Add-mhdp-dp-hdmi-driver-for-imx8x-platform.patch b/projects/NXP/devices/iMX8/patches/linux/0030-drm-imx-Add-mhdp-dp-hdmi-driver-for-imx8x-platform.patch deleted file mode 100644 index 2e4a4acb31..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0030-drm-imx-Add-mhdp-dp-hdmi-driver-for-imx8x-platform.patch +++ /dev/null @@ -1,2656 +0,0 @@ -From 09102ec28d08ae95d476ee241ed016d2fe9da894 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Mon, 20 Apr 2020 22:47:36 +0800 -Subject: [PATCH 30/49] drm: imx: Add mhdp dp/hdmi driver for imx8x platform - -Added i.MX8MQ HDMI/DP driver. -Added i.MX8MQ HDMI/DP driver. -Added LS1028A DP driver. - -Signed-off-by: Sandor Yu ---- - drivers/gpu/drm/imx/Kconfig | 1 + - drivers/gpu/drm/imx/Makefile | 1 + - drivers/gpu/drm/imx/mhdp/Kconfig | 11 + - drivers/gpu/drm/imx/mhdp/Makefile | 5 + - drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c | 531 ++++++++++++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c | 764 ++++++++++++++++++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h | 75 ++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 638 +++++++++++++++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c | 257 ++++++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-ls1028a.c | 110 +++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h | 155 ++++ - 11 files changed, 2548 insertions(+) - create mode 100644 drivers/gpu/drm/imx/mhdp/Kconfig - create mode 100644 drivers/gpu/drm/imx/mhdp/Makefile - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-ls1028a.c - create mode 100644 drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h - -diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig -index 6231048aa5aa..4af2f575f04b 100644 ---- a/drivers/gpu/drm/imx/Kconfig -+++ b/drivers/gpu/drm/imx/Kconfig -@@ -2,3 +2,4 @@ config DRM_IMX_HDMI - source "drivers/gpu/drm/imx/dcss/Kconfig" - source "drivers/gpu/drm/imx/ipuv3/Kconfig" - source "drivers/gpu/drm/imx/lcdc/Kconfig" -+source "drivers/gpu/drm/imx/mhdp/Kconfig" -diff --git a/drivers/gpu/drm/imx/Makefile b/drivers/gpu/drm/imx/Makefile -index b644deffe948..0b46c46b19a8 100644 ---- a/drivers/gpu/drm/imx/Makefile -+++ b/drivers/gpu/drm/imx/Makefile -@@ -2,3 +2,4 @@ obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o - obj-$(CONFIG_DRM_IMX_DCSS) += dcss/ - obj-$(CONFIG_DRM_IMX) += ipuv3/ - obj-$(CONFIG_DRM_IMX_LCDC) += lcdc/ -+obj-$(CONFIG_DRM_IMX_CDNS_MHDP) += mhdp/ -diff --git a/drivers/gpu/drm/imx/mhdp/Kconfig b/drivers/gpu/drm/imx/mhdp/Kconfig -new file mode 100644 -index 000000000000..86950badb947 ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/Kconfig -@@ -0,0 +1,11 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config DRM_IMX_CDNS_MHDP -+ tristate "NXP i.MX MX8 DRM HDMI/DP" -+ select DRM_CDNS_MHDP -+ select DRM_CDNS_DP -+ select DRM_CDNS_HDMI -+ select DRM_CDNS_AUDIO -+ depends on DRM_IMX -+ help -+ Choose this if you want to use HDMI on i.MX8. -diff --git a/drivers/gpu/drm/imx/mhdp/Makefile b/drivers/gpu/drm/imx/mhdp/Makefile -new file mode 100644 -index 000000000000..235fa2d515e9 ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/Makefile -@@ -0,0 +1,5 @@ -+# SPDX-License-Identifier: GPL-2.0 -+ -+cdns_mhdp_imx-objs := cdns-mhdp-imxdrv.o cdns-mhdp-dp-phy.o \ -+ cdns-mhdp-hdmi-phy.o cdns-mhdp-imx8qm.o cdns-mhdp-ls1028a.o -+obj-$(CONFIG_DRM_IMX_CDNS_MHDP) += cdns_mhdp_imx.o -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -new file mode 100644 -index 000000000000..a6d03c94d196 ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -@@ -0,0 +1,531 @@ -+/* -+ * Cadence Display Port Interface (DP) PHY driver -+ * -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include "cdns-mhdp-phy.h" -+ -+enum dp_link_rate { -+ RATE_1_6 = 162000, -+ RATE_2_1 = 216000, -+ RATE_2_4 = 243000, -+ RATE_2_7 = 270000, -+ RATE_3_2 = 324000, -+ RATE_4_3 = 432000, -+ RATE_5_4 = 540000, -+ RATE_8_1 = 810000, -+}; -+ -+struct phy_pll_reg { -+ u16 val[7]; -+ u32 addr; -+}; -+ -+static const struct phy_pll_reg phy_pll_27m_cfg[] = { -+ /* 1.62 2.16 2.43 2.7 3.24 4.32 5.4 register address */ -+ {{ 0x010E, 0x010E, 0x010E, 0x010E, 0x010E, 0x010E, 0x010E }, CMN_PLL0_VCOCAL_INIT_TMR }, -+ {{ 0x001B, 0x001B, 0x001B, 0x001B, 0x001B, 0x001B, 0x001B }, CMN_PLL0_VCOCAL_ITER_TMR }, -+ {{ 0x30B9, 0x3087, 0x3096, 0x30B4, 0x30B9, 0x3087, 0x30B4 }, CMN_PLL0_VCOCAL_START }, -+ {{ 0x0077, 0x009F, 0x00B3, 0x00C7, 0x0077, 0x009F, 0x00C7 }, CMN_PLL0_INTDIV }, -+ {{ 0xF9DA, 0xF7CD, 0xF6C7, 0xF5C1, 0xF9DA, 0xF7CD, 0xF5C1 }, CMN_PLL0_FRACDIV }, -+ {{ 0x001E, 0x0028, 0x002D, 0x0032, 0x001E, 0x0028, 0x0032 }, CMN_PLL0_HIGH_THR }, -+ {{ 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020 }, CMN_PLL0_DSM_DIAG }, -+ {{ 0x0000, 0x1000, 0x1000, 0x1000, 0x0000, 0x1000, 0x1000 }, CMN_PLLSM0_USER_DEF_CTRL }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_OVRD }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBH_OVRD }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBL_OVRD }, -+ {{ 0x0006, 0x0007, 0x0007, 0x0007, 0x0006, 0x0007, 0x0007 }, CMN_DIAG_PLL0_V2I_TUNE }, -+ {{ 0x0043, 0x0043, 0x0043, 0x0042, 0x0043, 0x0043, 0x0042 }, CMN_DIAG_PLL0_CP_TUNE }, -+ {{ 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008 }, CMN_DIAG_PLL0_LF_PROG }, -+ {{ 0x0100, 0x0001, 0x0001, 0x0001, 0x0100, 0x0001, 0x0001 }, CMN_DIAG_PLL0_PTATIS_TUNE1 }, -+ {{ 0x0007, 0x0001, 0x0001, 0x0001, 0x0007, 0x0001, 0x0001 }, CMN_DIAG_PLL0_PTATIS_TUNE2 }, -+ {{ 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020 }, CMN_DIAG_PLL0_TEST_MODE}, -+ {{ 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016 }, CMN_PSM_CLK_CTRL } -+}; -+ -+static const struct phy_pll_reg phy_pll_24m_cfg[] = { -+ /* 1.62 2.16 2.43 2.7 3.24 4.32 5.4 register address */ -+ {{ 0x00F0, 0x00F0, 0x00F0, 0x00F0, 0x00F0, 0x00F0, 0x00F0 }, CMN_PLL0_VCOCAL_INIT_TMR }, -+ {{ 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018 }, CMN_PLL0_VCOCAL_ITER_TMR }, -+ {{ 0x3061, 0x3092, 0x30B3, 0x30D0, 0x3061, 0x3092, 0x30D0 }, CMN_PLL0_VCOCAL_START }, -+ {{ 0x0086, 0x00B3, 0x00CA, 0x00E0, 0x0086, 0x00B3, 0x00E0 }, CMN_PLL0_INTDIV }, -+ {{ 0xF917, 0xF6C7, 0x75A1, 0xF479, 0xF917, 0xF6C7, 0xF479 }, CMN_PLL0_FRACDIV }, -+ {{ 0x0022, 0x002D, 0x0033, 0x0038, 0x0022, 0x002D, 0x0038 }, CMN_PLL0_HIGH_THR }, -+ {{ 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, 0x0020 }, CMN_PLL0_DSM_DIAG }, -+ {{ 0x0000, 0x1000, 0x1000, 0x1000, 0x0000, 0x1000, 0x1000 }, CMN_PLLSM0_USER_DEF_CTRL }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_OVRD }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBH_OVRD }, -+ {{ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, CMN_DIAG_PLL0_FBL_OVRD }, -+ {{ 0x0006, 0x0007, 0x0007, 0x0007, 0x0006, 0x0007, 0x0007 }, CMN_DIAG_PLL0_V2I_TUNE }, -+ {{ 0x0026, 0x0029, 0x0029, 0x0029, 0x0026, 0x0029, 0x0029 }, CMN_DIAG_PLL0_CP_TUNE }, -+ {{ 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008, 0x0008 }, CMN_DIAG_PLL0_LF_PROG }, -+ {{ 0x008C, 0x008C, 0x008C, 0x008C, 0x008C, 0x008C, 0x008C }, CMN_DIAG_PLL0_PTATIS_TUNE1 }, -+ {{ 0x002E, 0x002E, 0x002E, 0x002E, 0x002E, 0x002E, 0x002E }, CMN_DIAG_PLL0_PTATIS_TUNE2 }, -+ {{ 0x0022, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022 }, CMN_DIAG_PLL0_TEST_MODE}, -+ {{ 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016, 0x0016 }, CMN_PSM_CLK_CTRL } -+}; -+ -+static int link_rate_index(u32 rate) -+{ -+ switch (rate) { -+ case RATE_1_6: -+ return 0; -+ case RATE_2_1: -+ return 1; -+ case RATE_2_4: -+ return 2; -+ case RATE_2_7: -+ return 3; -+ case RATE_3_2: -+ return 4; -+ case RATE_4_3: -+ return 5; -+ case RATE_5_4: -+ return 6; -+ default: -+ return -1; -+ } -+} -+ -+static void dp_aux_cfg(struct cdns_mhdp_device *mhdp) -+{ -+ /* Power up Aux */ -+ cdns_phy_reg_write(mhdp, TXDA_CYA_AUXDA_CYA, 1); -+ -+ cdns_phy_reg_write(mhdp, TX_DIG_CTRL_REG_1, 0x3); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_DIG_CTRL_REG_2, 36); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x0100); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x0300); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_3, 0x0000); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2008); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2018); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0xA018); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030C); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_5, 0x0000); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_4, 0x1001); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0xA098); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0xA198); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030d); -+ ndelay(150); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030f); -+} -+ -+/* PMA common configuration for 24MHz */ -+static void dp_phy_pma_cmn_cfg_24mhz(struct cdns_mhdp_device *mhdp) -+{ -+ int k; -+ u32 num_lanes = mhdp->dp.num_lanes; -+ u16 val; -+ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xFFF7; -+ val |= 0x0008; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ for (k = 0; k < num_lanes; k++) { -+ /* Transceiver control and diagnostic registers */ -+ cdns_phy_reg_write(mhdp, XCVR_DIAG_LANE_FCM_EN_MGN_TMR | (k << 9), 0x0090); -+ /* Transmitter receiver detect registers */ -+ cdns_phy_reg_write(mhdp, TX_RCVDET_EN_TMR | (k << 9), 0x0960); -+ cdns_phy_reg_write(mhdp, TX_RCVDET_ST_TMR | (k << 9), 0x0030); -+ } -+} -+ -+/* Valid for 24 MHz only */ -+static void dp_phy_pma_cmn_pll0_24mhz(struct cdns_mhdp_device *mhdp) -+{ -+ u32 num_lanes = mhdp->dp.num_lanes; -+ u32 link_rate = mhdp->dp.rate; -+ u16 val; -+ int index, i, k; -+ -+ /* -+ * PLL reference clock source select -+ * for single ended reference clock val |= 0x0030; -+ * for differential clock val |= 0x0000; -+ */ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val = val & 0xFF8F; -+ val = val | 0x0030; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ /* DP PLL data rate 0/1 clock divider value */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val &= 0x00FF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x2400; -+ else -+ val |= 0x1200; -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ -+ /* High speed clock 0/1 div */ -+ val = cdns_phy_reg_read(mhdp, CMN_DIAG_HSCLK_SEL); -+ val &= 0xFFCC; -+ if (link_rate <= RATE_2_7) -+ val |= 0x0011; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_HSCLK_SEL, val); -+ -+ for (k = 0; k < num_lanes; k = k + 1) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9))); -+ val &= 0xCFFF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x1000; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9)), val); -+ } -+ -+ /* DP PHY PLL 24MHz configuration */ -+ index = link_rate_index(link_rate); -+ for (i = 0; i < ARRAY_SIZE(phy_pll_24m_cfg); i++) -+ cdns_phy_reg_write(mhdp, phy_pll_24m_cfg[i].addr, phy_pll_24m_cfg[i].val[index]); -+ -+ /* Transceiver control and diagnostic registers */ -+ for (k = 0; k < num_lanes; k = k + 1) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9))); -+ val &= 0x8FFF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x2000; -+ else -+ val |= 0x1000; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9)), val); -+ } -+ -+ for (k = 0; k < num_lanes; k = k + 1) { -+ cdns_phy_reg_write(mhdp, (XCVR_PSM_RCTRL | (k << 9)), 0xBEFC); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A0 | (k << 9)), 0x6799); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A1 | (k << 9)), 0x6798); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A2 | (k << 9)), 0x0098); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A3 | (k << 9)), 0x0098); -+ } -+} -+ -+/* PMA common configuration for 27MHz */ -+static void dp_phy_pma_cmn_cfg_27mhz(struct cdns_mhdp_device *mhdp) -+{ -+ u32 num_lanes = mhdp->dp.num_lanes; -+ u16 val; -+ int k; -+ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xFFF7; -+ val |= 0x0008; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ /* Startup state machine registers */ -+ cdns_phy_reg_write(mhdp, CMN_SSM_BIAS_TMR, 0x0087); -+ cdns_phy_reg_write(mhdp, CMN_PLLSM0_PLLEN_TMR, 0x001B); -+ cdns_phy_reg_write(mhdp, CMN_PLLSM0_PLLPRE_TMR, 0x0036); -+ cdns_phy_reg_write(mhdp, CMN_PLLSM0_PLLVREF_TMR, 0x001B); -+ cdns_phy_reg_write(mhdp, CMN_PLLSM0_PLLLOCK_TMR, 0x006C); -+ -+ /* Current calibration registers */ -+ cdns_phy_reg_write(mhdp, CMN_ICAL_INIT_TMR, 0x0044); -+ cdns_phy_reg_write(mhdp, CMN_ICAL_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_ICAL_ADJ_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_ICAL_ADJ_ITER_TMR, 0x0006); -+ -+ /* Resistor calibration registers */ -+ cdns_phy_reg_write(mhdp, CMN_TXPUCAL_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_TXPUCAL_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_TXPU_ADJ_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_TXPU_ADJ_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_TXPDCAL_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_TXPDCAL_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_TXPD_ADJ_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_TXPD_ADJ_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_RXCAL_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_RXCAL_ITER_TMR, 0x0006); -+ cdns_phy_reg_write(mhdp, CMN_RX_ADJ_INIT_TMR, 0x0022); -+ cdns_phy_reg_write(mhdp, CMN_RX_ADJ_ITER_TMR, 0x0006); -+ -+ for (k = 0; k < num_lanes; k = k + 1) { -+ /* Power state machine registers */ -+ cdns_phy_reg_write(mhdp, XCVR_PSM_CAL_TMR | (k << 9), 0x016D); -+ cdns_phy_reg_write(mhdp, XCVR_PSM_A0IN_TMR | (k << 9), 0x016D); -+ /* Transceiver control and diagnostic registers */ -+ cdns_phy_reg_write(mhdp, XCVR_DIAG_LANE_FCM_EN_MGN_TMR | (k << 9), 0x00A2); -+ cdns_phy_reg_write(mhdp, TX_DIAG_BGREF_PREDRV_DELAY | (k << 9), 0x0097); -+ /* Transmitter receiver detect registers */ -+ cdns_phy_reg_write(mhdp, TX_RCVDET_EN_TMR | (k << 9), 0x0A8C); -+ cdns_phy_reg_write(mhdp, TX_RCVDET_ST_TMR | (k << 9), 0x0036); -+ } -+} -+ -+static void dp_phy_pma_cmn_pll0_27mhz(struct cdns_mhdp_device *mhdp) -+{ -+ u32 num_lanes = mhdp->dp.num_lanes; -+ u32 link_rate = mhdp->dp.rate; -+ u16 val; -+ int index, i, k; -+ -+ /* -+ * PLL reference clock source select -+ * for single ended reference clock val |= 0x0030; -+ * for differential clock val |= 0x0000; -+ */ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xFF8F; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ /* for differential clock on the refclk_p and refclk_m off chip pins: -+ * CMN_DIAG_ACYA[8]=1'b1 -+ */ -+ cdns_phy_reg_write(mhdp, CMN_DIAG_ACYA, 0x0100); -+ -+ /* DP PLL data rate 0/1 clock divider value */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val &= 0x00FF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x2400; -+ else -+ val |= 0x1200; -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ -+ /* High speed clock 0/1 div */ -+ val = cdns_phy_reg_read(mhdp, CMN_DIAG_HSCLK_SEL); -+ val &= 0xFFCC; -+ if (link_rate <= RATE_2_7) -+ val |= 0x0011; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_HSCLK_SEL, val); -+ -+ for (k = 0; k < num_lanes; k++) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9))); -+ val = val & 0xCFFF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x1000; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9)), val); -+ } -+ -+ /* DP PHY PLL 27MHz configuration */ -+ index = link_rate_index(link_rate); -+ for (i = 0; i < ARRAY_SIZE(phy_pll_27m_cfg); i++) -+ cdns_phy_reg_write(mhdp, phy_pll_27m_cfg[i].addr, phy_pll_27m_cfg[i].val[index]); -+ -+ /* Transceiver control and diagnostic registers */ -+ for (k = 0; k < num_lanes; k++) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9))); -+ val = val & 0x8FFF; -+ if (link_rate <= RATE_2_7) -+ val |= 0x2000; -+ else -+ val |= 0x1000; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9)), val); -+ } -+ -+ for (k = 0; k < num_lanes; k = k + 1) { -+ /* Power state machine registers */ -+ cdns_phy_reg_write(mhdp, (XCVR_PSM_RCTRL | (k << 9)), 0xBEFC); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A0 | (k << 9)), 0x6799); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A1 | (k << 9)), 0x6798); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A2 | (k << 9)), 0x0098); -+ cdns_phy_reg_write(mhdp, (TX_PSC_A3 | (k << 9)), 0x0098); -+ /* Receiver calibration power state definition register */ -+ val = cdns_phy_reg_read(mhdp, RX_PSC_CAL | (k << 9)); -+ val &= 0xFFBB; -+ cdns_phy_reg_write(mhdp, (RX_PSC_CAL | (k << 9)), val); -+ val = cdns_phy_reg_read(mhdp, RX_PSC_A0 | (k << 9)); -+ val &= 0xFFBB; -+ cdns_phy_reg_write(mhdp, (RX_PSC_A0 | (k << 9)), val); -+ } -+} -+ -+static void dp_phy_power_down(struct cdns_mhdp_device *mhdp) -+{ -+ u16 val; -+ int i; -+ -+ if (!mhdp->power_up) -+ return; -+ -+ /* Place the PHY lanes in the A3 power state. */ -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x8); -+ /* Wait for Power State A3 Ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ if (val & (1 << 7)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait A3 Ack failed\n"); -+ return; -+ } -+ -+ /* Disable HDP PLL’s data rate and full rate clocks out of PMA. */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val &= ~(1 << 2); -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ /* Wait for PLL clock gate ACK */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ if (!(val & (1 << 3))) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait PLL clock gate Ack failed\n"); -+ return; -+ } -+ -+ /* Disable HDP PLL’s for high speed clocks */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val &= ~(1 << 0); -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ /* Wait for PLL disable ACK */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ if (!(val & (1 << 1))) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait PLL disable Ack failed\n"); -+ return; -+ } -+} -+ -+static int dp_phy_power_up(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val, i; -+ -+ /* Enable HDP PLL’s for high speed clocks */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val |= (1 << 0); -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ /* Wait for PLL ready ACK */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ if (val & (1 << 1)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait PLL Ack failed\n"); -+ return -1; -+ } -+ -+ /* Enable HDP PLL’s data rate and full rate clocks out of PMA. */ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val |= (1 << 2); -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ /* Wait for PLL clock enable ACK */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ if (val & (1 << 3)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait PLL clock enable ACk failed\n"); -+ return -1; -+ } -+ -+ /* Configure PHY in A2 Mode */ -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0004); -+ /* Wait for Power State A2 Ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ if (val & (1 << 6)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait A2 Ack failed\n"); -+ return -1; -+ } -+ -+ /* Configure PHY in A0 mode (PHY must be in the A0 power -+ * state in order to transmit data) -+ */ -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0101); -+ -+ /* Wait for Power State A0 Ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ if (val & (1 << 4)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait A0 Ack failed\n"); -+ return -1; -+ } -+ -+ mhdp->power_up = true; -+ -+ return 0; -+} -+ -+int cdns_dp_phy_set_imx8mq(struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ /* Disable phy clock if PHY in power up state */ -+ dp_phy_power_down(mhdp); -+ -+ dp_phy_pma_cmn_cfg_27mhz(mhdp); -+ -+ dp_phy_pma_cmn_pll0_27mhz(mhdp); -+ -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_0, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_1, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_2, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_3, 1); -+ -+ /* PHY power up */ -+ ret = dp_phy_power_up(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ dp_aux_cfg(mhdp); -+ -+ return ret; -+} -+ -+int cdns_dp_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ int ret; -+ -+ /* Disable phy clock if PHY in power up state */ -+ dp_phy_power_down(mhdp); -+ -+ dp_phy_pma_cmn_cfg_24mhz(mhdp); -+ -+ dp_phy_pma_cmn_pll0_24mhz(mhdp); -+ -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_0, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_1, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_2, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_3, 1); -+ -+ /* PHY power up */ -+ ret = dp_phy_power_up(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ dp_aux_cfg(mhdp); -+ -+ return true; -+} -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -new file mode 100644 -index 000000000000..120300e6a2df ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -@@ -0,0 +1,764 @@ -+/* -+ * Cadence High-Definition Multimedia Interface (HDMI) driver -+ * -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include "cdns-mhdp-phy.h" -+ -+/* HDMI TX clock control settings */ -+struct hdmi_ctrl { -+ u32 pixel_clk_freq_min; -+ u32 pixel_clk_freq_max; -+ u32 feedback_factor; -+ u32 data_range_kbps_min; -+ u32 data_range_kbps_max; -+ u32 cmnda_pll0_ip_div; -+ u32 cmn_ref_clk_dig_div; -+ u32 ref_clk_divider_scaler; -+ u32 pll_fb_div_total; -+ u32 cmnda_pll0_fb_div_low; -+ u32 cmnda_pll0_fb_div_high; -+ u32 pixel_div_total; -+ u32 cmnda_pll0_pxdiv_low; -+ u32 cmnda_pll0_pxdiv_high; -+ u32 vco_freq_min; -+ u32 vco_freq_max; -+ u32 vco_ring_select; -+ u32 cmnda_hs_clk_0_sel; -+ u32 cmnda_hs_clk_1_sel; -+ u32 hsclk_div_at_xcvr; -+ u32 hsclk_div_tx_sub_rate; -+ u32 cmnda_pll0_hs_sym_div_sel; -+ u32 cmnda_pll0_clk_freq_min; -+ u32 cmnda_pll0_clk_freq_max; -+}; -+ -+/* HDMI TX clock control settings, pixel clock is output */ -+static const struct hdmi_ctrl imx8mq_ctrl_table[] = { -+/*Minclk Maxclk Fdbak DR_min DR_max ip_d dig DS Totl */ -+{ 27000, 27000, 1000, 270000, 270000, 0x03, 0x1, 0x1, 240, 0x0BC, 0x030, 80, 0x026, 0x026, 2160000, 2160000, 0, 2, 2, 2, 4, 0x3, 27000, 27000}, -+{ 27000, 27000, 1250, 337500, 337500, 0x03, 0x1, 0x1, 300, 0x0EC, 0x03C, 100, 0x030, 0x030, 2700000, 2700000, 0, 2, 2, 2, 4, 0x3, 33750, 33750}, -+{ 27000, 27000, 1500, 405000, 405000, 0x03, 0x1, 0x1, 360, 0x11C, 0x048, 120, 0x03A, 0x03A, 3240000, 3240000, 0, 2, 2, 2, 4, 0x3, 40500, 40500}, -+{ 27000, 27000, 2000, 540000, 540000, 0x03, 0x1, 0x1, 240, 0x0BC, 0x030, 80, 0x026, 0x026, 2160000, 2160000, 0, 2, 2, 2, 4, 0x2, 54000, 54000}, -+{ 54000, 54000, 1000, 540000, 540000, 0x03, 0x1, 0x1, 480, 0x17C, 0x060, 80, 0x026, 0x026, 4320000, 4320000, 1, 2, 2, 2, 4, 0x3, 54000, 54000}, -+{ 54000, 54000, 1250, 675000, 675000, 0x04, 0x1, 0x1, 400, 0x13C, 0x050, 50, 0x017, 0x017, 2700000, 2700000, 0, 1, 1, 2, 4, 0x2, 67500, 67500}, -+{ 54000, 54000, 1500, 810000, 810000, 0x04, 0x1, 0x1, 480, 0x17C, 0x060, 60, 0x01C, 0x01C, 3240000, 3240000, 0, 2, 2, 2, 2, 0x2, 81000, 81000}, -+{ 54000, 54000, 2000, 1080000, 1080000, 0x03, 0x1, 0x1, 240, 0x0BC, 0x030, 40, 0x012, 0x012, 2160000, 2160000, 0, 2, 2, 2, 1, 0x1, 108000, 108000}, -+{ 74250, 74250, 1000, 742500, 742500, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 80, 0x026, 0x026, 5940000, 5940000, 1, 2, 2, 2, 4, 0x3, 74250, 74250}, -+{ 74250, 74250, 1250, 928125, 928125, 0x04, 0x1, 0x1, 550, 0x1B4, 0x06E, 50, 0x017, 0x017, 3712500, 3712500, 1, 1, 1, 2, 4, 0x2, 92812, 92812}, -+{ 74250, 74250, 1500, 1113750, 1113750, 0x04, 0x1, 0x1, 660, 0x20C, 0x084, 60, 0x01C, 0x01C, 4455000, 4455000, 1, 2, 2, 2, 2, 0x2, 111375, 111375}, -+{ 74250, 74250, 2000, 1485000, 1485000, 0x03, 0x1, 0x1, 330, 0x104, 0x042, 40, 0x012, 0x012, 2970000, 2970000, 0, 2, 2, 2, 1, 0x1, 148500, 148500}, -+{ 99000, 99000, 1000, 990000, 990000, 0x03, 0x1, 0x1, 440, 0x15C, 0x058, 40, 0x012, 0x012, 3960000, 3960000, 1, 2, 2, 2, 2, 0x2, 99000, 99000}, -+{ 99000, 99000, 1250, 1237500, 1237500, 0x03, 0x1, 0x1, 275, 0x0D8, 0x037, 25, 0x00B, 0x00A, 2475000, 2475000, 0, 1, 1, 2, 2, 0x1, 123750, 123750}, -+{ 99000, 99000, 1500, 1485000, 1485000, 0x03, 0x1, 0x1, 330, 0x104, 0x042, 30, 0x00D, 0x00D, 2970000, 2970000, 0, 2, 2, 2, 1, 0x1, 148500, 148500}, -+{ 99000, 99000, 2000, 1980000, 1980000, 0x03, 0x1, 0x1, 440, 0x15C, 0x058, 40, 0x012, 0x012, 3960000, 3960000, 1, 2, 2, 2, 1, 0x1, 198000, 198000}, -+{148500, 148500, 1000, 1485000, 1485000, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 40, 0x012, 0x012, 5940000, 5940000, 1, 2, 2, 2, 2, 0x2, 148500, 148500}, -+{148500, 148500, 1250, 1856250, 1856250, 0x04, 0x1, 0x1, 550, 0x1B4, 0x06E, 25, 0x00B, 0x00A, 3712500, 3712500, 1, 1, 1, 2, 2, 0x1, 185625, 185625}, -+{148500, 148500, 1500, 2227500, 2227500, 0x03, 0x1, 0x1, 495, 0x188, 0x063, 30, 0x00D, 0x00D, 4455000, 4455000, 1, 1, 1, 2, 2, 0x1, 222750, 222750}, -+{148500, 148500, 2000, 2970000, 2970000, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 40, 0x012, 0x012, 5940000, 5940000, 1, 2, 2, 2, 1, 0x1, 297000, 297000}, -+{198000, 198000, 1000, 1980000, 1980000, 0x03, 0x1, 0x1, 220, 0x0AC, 0x02C, 10, 0x003, 0x003, 1980000, 1980000, 0, 1, 1, 2, 1, 0x0, 198000, 198000}, -+{198000, 198000, 1250, 2475000, 2475000, 0x03, 0x1, 0x1, 550, 0x1B4, 0x06E, 25, 0x00B, 0x00A, 4950000, 4950000, 1, 1, 1, 2, 2, 0x1, 247500, 247500}, -+{198000, 198000, 1500, 2970000, 2970000, 0x03, 0x1, 0x1, 330, 0x104, 0x042, 15, 0x006, 0x005, 2970000, 2970000, 0, 1, 1, 2, 1, 0x0, 297000, 297000}, -+{198000, 198000, 2000, 3960000, 3960000, 0x03, 0x1, 0x1, 440, 0x15C, 0x058, 20, 0x008, 0x008, 3960000, 3960000, 1, 1, 1, 2, 1, 0x0, 396000, 396000}, -+{297000, 297000, 1000, 2970000, 2970000, 0x03, 0x1, 0x1, 330, 0x104, 0x042, 10, 0x003, 0x003, 2970000, 2970000, 0, 1, 1, 2, 1, 0x0, 297000, 297000}, -+{297000, 297000, 1500, 4455000, 4455000, 0x03, 0x1, 0x1, 495, 0x188, 0x063, 15, 0x006, 0x005, 4455000, 4455000, 1, 1, 1, 2, 1, 0x0, 445500, 445500}, -+{297000, 297000, 2000, 5940000, 5940000, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 20, 0x008, 0x008, 5940000, 5940000, 1, 1, 1, 2, 1, 0x0, 594000, 594000}, -+{594000, 594000, 1000, 5940000, 5940000, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 10, 0x003, 0x003, 5940000, 5940000, 1, 1, 1, 2, 1, 0x0, 594000, 594000}, -+{594000, 594000, 750, 4455000, 4455000, 0x03, 0x1, 0x1, 495, 0x188, 0x063, 10, 0x003, 0x003, 4455000, 4455000, 1, 1, 1, 2, 1, 0x0, 445500, 445500}, -+{594000, 594000, 625, 3712500, 3712500, 0x04, 0x1, 0x1, 550, 0x1B4, 0x06E, 10, 0x003, 0x003, 3712500, 3712500, 1, 1, 1, 2, 1, 0x0, 371250, 371250}, -+{594000, 594000, 500, 2970000, 2970000, 0x03, 0x1, 0x1, 660, 0x20C, 0x084, 10, 0x003, 0x003, 5940000, 5940000, 1, 1, 1, 2, 2, 0x1, 297000, 297000}, -+}; -+ -+/* HDMI TX clock control settings, pixel clock is input */ -+static const struct hdmi_ctrl imx8qm_ctrl_table[] = { -+/*pclk_l pclk_h fd DRR_L DRR_H PLLD */ -+{ 25000, 42500, 1000, 250000, 425000, 0x05, 0x01, 0x01, 400, 0x182, 0x00A, 0, 0, 0, 2000000, 3400000, 0, 2, 2, 2, 4, 0x03, 25000, 42500}, -+{ 42500, 85000, 1000, 425000, 850000, 0x08, 0x03, 0x01, 320, 0x132, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 4, 0x02, 42500, 85000}, -+{ 85000, 170000, 1000, 850000, 1700000, 0x11, 0x00, 0x07, 340, 0x146, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, -+{170000, 340000, 1000, 1700000, 3400000, 0x22, 0x01, 0x07, 340, 0x146, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, -+{340000, 600000, 1000, 3400000, 6000000, 0x3C, 0x03, 0x06, 600, 0x24A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, -+{ 25000, 34000, 1205, 312500, 425000, 0x04, 0x01, 0x01, 400, 0x182, 0x00A, 0, 0, 0, 2500000, 3400000, 0, 2, 2, 2, 4, 0x03, 31250, 42500}, -+{ 34000, 68000, 1205, 425000, 850000, 0x06, 0x02, 0x01, 300, 0x11E, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 4, 0x02, 42500, 85000}, -+{ 68000, 136000, 1205, 850000, 1700000, 0x0D, 0x02, 0x02, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, -+{136000, 272000, 1205, 1700000, 3400000, 0x1A, 0x02, 0x04, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, -+{272000, 480000, 1205, 3400000, 6000000, 0x30, 0x03, 0x05, 600, 0x24A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, -+{ 25000, 28000, 1500, 375000, 420000, 0x03, 0x01, 0x01, 360, 0x15A, 0x00A, 0, 0, 0, 3000000, 3360000, 0, 2, 2, 2, 4, 0x03, 37500, 42000}, -+{ 28000, 56000, 1500, 420000, 840000, 0x06, 0x02, 0x01, 360, 0x15A, 0x00A, 0, 0, 0, 1680000, 3360000, 0, 1, 1, 2, 4, 0x02, 42000, 84000}, -+{ 56000, 113000, 1500, 840000, 1695000, 0x0B, 0x00, 0x05, 330, 0x13C, 0x00A, 0, 0, 0, 1680000, 3390000, 0, 1, 1, 2, 2, 0x01, 84000, 169500}, -+{113000, 226000, 1500, 1695000, 3390000, 0x16, 0x01, 0x05, 330, 0x13C, 0x00A, 0, 0, 0, 1695000, 3390000, 0, 1, 1, 2, 1, 0x00, 169500, 339000}, -+{226000, 400000, 1500, 3390000, 6000000, 0x28, 0x03, 0x04, 600, 0x24A, 0x00A, 0, 0, 0, 3390000, 6000000, 1, 1, 1, 2, 1, 0x00, 339000, 600000}, -+{ 25000, 42500, 2000, 500000, 850000, 0x05, 0x01, 0x01, 400, 0x182, 0x00A, 0, 0, 0, 2000000, 3400000, 0, 1, 1, 2, 4, 0x02, 50000, 85000}, -+{ 42500, 85000, 2000, 850000, 1700000, 0x08, 0x03, 0x01, 320, 0x132, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, -+{ 85000, 170000, 2000, 1700000, 3400000, 0x11, 0x00, 0x07, 340, 0x146, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, -+{170000, 300000, 2000, 3400000, 6000000, 0x22, 0x01, 0x06, 680, 0x29A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, -+{594000, 594000, 5000, 2970000, 2970000, 0x3C, 0x03, 0x06, 600, 0x24A, 0x00A, 0, 0, 0, 5940000, 5940000, 1, 1, 1, 2, 2, 0x01, 297000, 297000}, -+{594000, 594000, 6250, 3712500, 3712500, 0x3C, 0x03, 0x06, 375, 0x169, 0x00A, 0, 0, 0, 3712500, 3712500, 1, 1, 1, 2, 1, 0x00, 371250, 371250}, -+{594000, 594000, 7500, 4455000, 4455000, 0x3C, 0x03, 0x06, 450, 0x1B4, 0x00A, 0, 0, 0, 4455000, 4455000, 1, 1, 1, 2, 1, 0x00, 445500, 445500}, -+}; -+ -+/* HDMI TX PLL tuning settings */ -+struct hdmi_pll_tuning { -+ u32 vco_freq_bin; -+ u32 vco_freq_min; -+ u32 vco_freq_max; -+ u32 volt_to_current_coarse; -+ u32 volt_to_current; -+ u32 ndac_ctrl; -+ u32 pmos_ctrl; -+ u32 ptat_ndac_ctrl; -+ u32 feedback_div_total; -+ u32 charge_pump_gain; -+ u32 coarse_code; -+ u32 v2i_code; -+ u32 vco_cal_code; -+}; -+ -+/* HDMI TX PLL tuning settings, pixel clock is output */ -+static const struct hdmi_pll_tuning imx8mq_pll_table[] = { -+/* bin VCO_freq min/max coar cod NDAC PMOS PTAT div-T P-Gain Coa V2I CAL */ -+ { 1, 1980000, 1980000, 0x4, 0x3, 0x0, 0x09, 0x09, 220, 0x42, 160, 5, 183 }, -+ { 2, 2160000, 2160000, 0x4, 0x3, 0x0, 0x09, 0x09, 240, 0x42, 166, 6, 208 }, -+ { 3, 2475000, 2475000, 0x5, 0x3, 0x1, 0x00, 0x07, 275, 0x42, 167, 6, 209 }, -+ { 4, 2700000, 2700000, 0x5, 0x3, 0x1, 0x00, 0x07, 300, 0x42, 188, 6, 230 }, -+ { 4, 2700000, 2700000, 0x5, 0x3, 0x1, 0x00, 0x07, 400, 0x4C, 188, 6, 230 }, -+ { 5, 2970000, 2970000, 0x6, 0x3, 0x1, 0x00, 0x07, 330, 0x42, 183, 6, 225 }, -+ { 6, 3240000, 3240000, 0x6, 0x3, 0x1, 0x00, 0x07, 360, 0x42, 203, 7, 256 }, -+ { 6, 3240000, 3240000, 0x6, 0x3, 0x1, 0x00, 0x07, 480, 0x4C, 203, 7, 256 }, -+ { 7, 3712500, 3712500, 0x4, 0x3, 0x0, 0x07, 0x0F, 550, 0x4C, 212, 7, 257 }, -+ { 8, 3960000, 3960000, 0x5, 0x3, 0x0, 0x07, 0x0F, 440, 0x42, 184, 6, 226 }, -+ { 9, 4320000, 4320000, 0x5, 0x3, 0x1, 0x07, 0x0F, 480, 0x42, 205, 7, 258 }, -+ { 10, 4455000, 4455000, 0x5, 0x3, 0x0, 0x07, 0x0F, 495, 0x42, 219, 7, 272 }, -+ { 10, 4455000, 4455000, 0x5, 0x3, 0x0, 0x07, 0x0F, 660, 0x4C, 219, 7, 272 }, -+ { 11, 4950000, 4950000, 0x6, 0x3, 0x1, 0x00, 0x07, 550, 0x42, 213, 7, 258 }, -+ { 12, 5940000, 5940000, 0x7, 0x3, 0x1, 0x00, 0x07, 660, 0x42, 244, 8, 292 }, -+}; -+ -+/* HDMI TX PLL tuning settings, pixel clock is input */ -+static const struct hdmi_pll_tuning imx8qm_pll_table[] = { -+/* bin VCO_freq min/max coar cod NDAC PMOS PTAT div-T P-Gain pad only */ -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 300, 0x08D, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 320, 0x08E, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 325, 0x08E, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 330, 0x08E, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 340, 0x08F, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 360, 0x0A7, 0, 0, 0 }, -+ { 0, 1700000, 2000000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 400, 0x0C5, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 300, 0x086, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 320, 0x087, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 325, 0x087, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 330, 0x104, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 340, 0x08B, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 360, 0x08D, 0, 0, 0 }, -+ { 1, 2000000, 2400000, 0x3, 0x1, 0x0, 0x8C, 0x2E, 400, 0x0A6, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 300, 0x04E, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 320, 0x04F, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 325, 0x04F, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 330, 0x085, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 340, 0x085, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 360, 0x086, 0, 0, 0 }, -+ { 2, 2400000, 2800000, 0x3, 0x1, 0x0, 0x04, 0x0D, 400, 0x08B, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 300, 0x047, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 320, 0x04B, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 325, 0x04B, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 330, 0x04B, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 340, 0x04D, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 360, 0x04E, 0, 0, 0 }, -+ { 3, 2800000, 3400000, 0x3, 0x1, 0x0, 0x04, 0x0D, 400, 0x085, 0, 0, 0 }, -+ { 4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 375, 0x041, 0, 0, 0 }, -+ { 4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 600, 0x08D, 0, 0, 0 }, -+ { 4, 3400000, 3900000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 680, 0x0A6, 0, 0, 0 }, -+ { 5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 450, 0x041, 0, 0, 0 }, -+ { 5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 600, 0x087, 0, 0, 0 }, -+ { 5, 3900000, 4500000, 0x7, 0x1, 0x0, 0x8E, 0x2F, 680, 0x0A4, 0, 0, 0 }, -+ { 6, 4500000, 5200000, 0x7, 0x1, 0x0, 0x04, 0x0D, 600, 0x04F, 0, 0, 0 }, -+ { 6, 4500000, 5200000, 0x7, 0x1, 0x0, 0x04, 0x0D, 680, 0x086, 0, 0, 0 }, -+ { 7, 5200000, 6000000, 0x7, 0x1, 0x0, 0x04, 0x0D, 600, 0x04D, 0, 0, 0 }, -+ { 7, 5200000, 6000000, 0x7, 0x1, 0x0, 0x04, 0x0D, 680, 0x04F, 0, 0, 0 } -+}; -+ -+static void hdmi_arc_config(struct cdns_mhdp_device *mhdp) -+{ -+ u16 txpu_calib_code; -+ u16 txpd_calib_code; -+ u16 txpu_adj_calib_code; -+ u16 txpd_adj_calib_code; -+ u16 prev_calib_code; -+ u16 new_calib_code; -+ u16 rdata; -+ -+ /* Power ARC */ -+ cdns_phy_reg_write(mhdp, TXDA_CYA_AUXDA_CYA, 0x0001); -+ -+ prev_calib_code = cdns_phy_reg_read(mhdp, TX_DIG_CTRL_REG_2); -+ txpu_calib_code = cdns_phy_reg_read(mhdp, CMN_TXPUCAL_CTRL); -+ txpd_calib_code = cdns_phy_reg_read(mhdp, CMN_TXPDCAL_CTRL); -+ txpu_adj_calib_code = cdns_phy_reg_read(mhdp, CMN_TXPU_ADJ_CTRL); -+ txpd_adj_calib_code = cdns_phy_reg_read(mhdp, CMN_TXPD_ADJ_CTRL); -+ -+ new_calib_code = ((txpu_calib_code + txpd_calib_code) / 2) -+ + txpu_adj_calib_code + txpd_adj_calib_code; -+ -+ if (new_calib_code != prev_calib_code) { -+ rdata = cdns_phy_reg_read(mhdp, TX_ANA_CTRL_REG_1); -+ rdata &= 0xDFFF; -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, rdata); -+ cdns_phy_reg_write(mhdp, TX_DIG_CTRL_REG_2, new_calib_code); -+ mdelay(10); -+ rdata |= 0x2000; -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, rdata); -+ udelay(150); -+ } -+ -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x0100); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x0300); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_3, 0x0000); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2008); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2018); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2098); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030C); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_5, 0x0010); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_4, 0x4001); -+ mdelay(5); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_1, 0x2198); -+ mdelay(5); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030D); -+ udelay(100); -+ cdns_phy_reg_write(mhdp, TX_ANA_CTRL_REG_2, 0x030F); -+} -+ -+static void hdmi_phy_set_vswing(struct cdns_mhdp_device *mhdp) -+{ -+ const u32 num_lanes = 4; -+ u32 k; -+ -+ for (k = 0; k < num_lanes; k++) { -+ cdns_phy_reg_write(mhdp, (TX_DIAG_TX_DRV | (k << 9)), 0x7c0); -+ cdns_phy_reg_write(mhdp, (TX_TXCC_CPOST_MULT_00_0 | (k << 9)), 0x0); -+ cdns_phy_reg_write(mhdp, (TX_TXCC_CAL_SCLR_MULT_0 | (k << 9)), 0x120); -+ } -+} -+ -+static int hdmi_feedback_factor(struct cdns_mhdp_device *mhdp) -+{ -+ u32 feedback_factor; -+ -+ switch (mhdp->video_info.color_fmt) { -+ case YCBCR_4_2_2: -+ feedback_factor = 1000; -+ break; -+ case YCBCR_4_2_0: -+ switch (mhdp->video_info.color_depth) { -+ case 8: -+ feedback_factor = 500; -+ break; -+ case 10: -+ feedback_factor = 625; -+ break; -+ case 12: -+ feedback_factor = 750; -+ break; -+ case 16: -+ feedback_factor = 1000; -+ break; -+ default: -+ DRM_ERROR("Invalid ColorDepth\n"); -+ return 0; -+ } -+ break; -+ default: -+ /* Assume RGB/YUV444 */ -+ switch (mhdp->video_info.color_depth) { -+ case 10: -+ feedback_factor = 1250; -+ break; -+ case 12: -+ feedback_factor = 1500; -+ break; -+ case 16: -+ feedback_factor = 2000; -+ break; -+ default: -+ feedback_factor = 1000; -+ } -+ } -+ return feedback_factor; -+} -+ -+static int hdmi_phy_config(struct cdns_mhdp_device *mhdp, -+ const struct hdmi_ctrl *p_ctrl_table, -+ const struct hdmi_pll_tuning *p_pll_table, -+ char pclk_in) -+{ -+ const u32 num_lanes = 4; -+ u32 val, i, k; -+ -+ /* enable PHY isolation mode only for CMN */ -+ cdns_phy_reg_write(mhdp, PHY_PMA_ISOLATION_CTRL, 0xD000); -+ -+ /* set cmn_pll0_clk_datart1_div/cmn_pll0_clk_datart0_div dividers */ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_ISO_PLL_CTRL1); -+ val &= 0xFF00; -+ val |= 0x0012; -+ cdns_phy_reg_write(mhdp, PHY_PMA_ISO_PLL_CTRL1, val); -+ -+ /* assert PHY reset from isolation register */ -+ cdns_phy_reg_write(mhdp, PHY_ISO_CMN_CTRL, 0x0000); -+ /* assert PMA CMN reset */ -+ cdns_phy_reg_write(mhdp, PHY_PMA_ISO_CMN_CTRL, 0x0000); -+ -+ /* register XCVR_DIAG_BIDI_CTRL */ -+ for (k = 0; k < num_lanes; k++) -+ cdns_phy_reg_write(mhdp, XCVR_DIAG_BIDI_CTRL | (k << 9), 0x00FF); -+ -+ /* Describing Task phy_cfg_hdp */ -+ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xFFF7; -+ val |= 0x0008; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ /* PHY Registers */ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xCFFF; -+ val |= p_ctrl_table->cmn_ref_clk_dig_div << 12; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_CLK_CTL); -+ val &= 0x00FF; -+ val |= 0x1200; -+ cdns_phy_reg_write(mhdp, PHY_HDP_CLK_CTL, val); -+ -+ /* Common control module control and diagnostic registers */ -+ val = cdns_phy_reg_read(mhdp, CMN_CDIAG_REFCLK_CTRL); -+ val &= 0x8FFF; -+ val |= p_ctrl_table->ref_clk_divider_scaler << 12; -+ val |= 0x00C0; -+ cdns_phy_reg_write(mhdp, CMN_CDIAG_REFCLK_CTRL, val); -+ -+ /* High speed clock used */ -+ val = cdns_phy_reg_read(mhdp, CMN_DIAG_HSCLK_SEL); -+ val &= 0xFF00; -+ val |= (p_ctrl_table->cmnda_hs_clk_0_sel >> 1) << 0; -+ val |= (p_ctrl_table->cmnda_hs_clk_1_sel >> 1) << 4; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_HSCLK_SEL, val); -+ -+ for (k = 0; k < num_lanes; k++) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9))); -+ val &= 0xCFFF; -+ val |= (p_ctrl_table->cmnda_hs_clk_0_sel >> 1) << 12; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_HSCLK_SEL | (k << 9)), val); -+ } -+ -+ /* PLL 0 control state machine registers */ -+ val = p_ctrl_table->vco_ring_select << 12; -+ cdns_phy_reg_write(mhdp, CMN_PLLSM0_USER_DEF_CTRL, val); -+ -+ if (pclk_in == true) -+ val = 0x30A0; -+ else { -+ val = cdns_phy_reg_read(mhdp, CMN_PLL0_VCOCAL_START); -+ val &= 0xFE00; -+ val |= p_pll_table->vco_cal_code; -+ } -+ cdns_phy_reg_write(mhdp, CMN_PLL0_VCOCAL_START, val); -+ -+ cdns_phy_reg_write(mhdp, CMN_PLL0_VCOCAL_INIT_TMR, 0x0064); -+ cdns_phy_reg_write(mhdp, CMN_PLL0_VCOCAL_ITER_TMR, 0x000A); -+ -+ /* Common functions control and diagnostics registers */ -+ val = p_ctrl_table->cmnda_pll0_hs_sym_div_sel << 8; -+ val |= p_ctrl_table->cmnda_pll0_ip_div; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_INCLK_CTRL, val); -+ -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_OVRD, 0x0000); -+ -+ val = p_ctrl_table->cmnda_pll0_fb_div_high; -+ val |= (1 << 15); -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_FBH_OVRD, val); -+ -+ val = p_ctrl_table->cmnda_pll0_fb_div_low; -+ val |= (1 << 15); -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_FBL_OVRD, val); -+ -+ if (pclk_in == false) { -+ val = p_ctrl_table->cmnda_pll0_pxdiv_low; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_PXL_DIVL, val); -+ -+ val = p_ctrl_table->cmnda_pll0_pxdiv_high; -+ val |= (1 << 15); -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_PXL_DIVH, val); -+ } -+ -+ val = p_pll_table->volt_to_current_coarse; -+ val |= (p_pll_table->volt_to_current) << 4; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_V2I_TUNE, val); -+ -+ val = p_pll_table->charge_pump_gain; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_CP_TUNE, val); -+ -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_LF_PROG, 0x0008); -+ -+ val = p_pll_table->pmos_ctrl; -+ val |= (p_pll_table->ndac_ctrl) << 8; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_PTATIS_TUNE1, val); -+ -+ val = p_pll_table->ptat_ndac_ctrl; -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_PTATIS_TUNE2, val); -+ -+ if (pclk_in == true) -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_TEST_MODE, 0x0022); -+ else -+ cdns_phy_reg_write(mhdp, CMN_DIAG_PLL0_TEST_MODE, 0x0020); -+ cdns_phy_reg_write(mhdp, CMN_PSM_CLK_CTRL, 0x0016); -+ -+ /* Transceiver control and diagnostic registers */ -+ for (k = 0; k < num_lanes; k++) { -+ val = cdns_phy_reg_read(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9))); -+ val &= 0xBFFF; -+ cdns_phy_reg_write(mhdp, (XCVR_DIAG_PLLDRC_CTRL | (k << 9)), val); -+ } -+ -+ for (k = 0; k < num_lanes; k++) { -+ val = cdns_phy_reg_read(mhdp, (TX_DIAG_TX_CTRL | (k << 9))); -+ val &= 0xFF3F; -+ val |= (p_ctrl_table->hsclk_div_tx_sub_rate >> 1) << 6; -+ cdns_phy_reg_write(mhdp, (TX_DIAG_TX_CTRL | (k << 9)), val); -+ } -+ -+ /* -+ * for single ended reference clock val |= 0x0030; -+ * for differential clock val |= 0x0000; -+ */ -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ val &= 0xFF8F; -+ if (pclk_in == true) -+ val |= 0x0030; -+ cdns_phy_reg_write(mhdp, PHY_PMA_CMN_CTRL1, val); -+ -+ /* for differential clock on the refclk_p and -+ * refclk_m off chip pins: CMN_DIAG_ACYA[8]=1'b1 */ -+ cdns_phy_reg_write(mhdp, CMN_DIAG_ACYA, 0x0100); -+ -+ /* Deassert PHY reset */ -+ cdns_phy_reg_write(mhdp, PHY_ISO_CMN_CTRL, 0x0001); -+ cdns_phy_reg_write(mhdp, PHY_PMA_ISO_CMN_CTRL, 0x0003); -+ -+ /* Power state machine registers */ -+ for (k = 0; k < num_lanes; k++) -+ cdns_phy_reg_write(mhdp, XCVR_PSM_RCTRL | (k << 9), 0xFEFC); -+ -+ /* Assert cmn_macro_pwr_en */ -+ cdns_phy_reg_write(mhdp, PHY_PMA_ISO_CMN_CTRL, 0x0013); -+ -+ /* wait for cmn_macro_pwr_en_ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_ISO_CMN_CTRL); -+ if (val & (1 << 5)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ DRM_ERROR("PMA ouput macro power up failed\n"); -+ return false; -+ } -+ -+ /* wait for cmn_ready */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -+ if (val & (1 << 0)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ DRM_ERROR("PMA output ready failed\n"); -+ return false; -+ } -+ -+ for (k = 0; k < num_lanes; k++) { -+ cdns_phy_reg_write(mhdp, TX_PSC_A0 | (k << 9), 0x6791); -+ cdns_phy_reg_write(mhdp, TX_PSC_A1 | (k << 9), 0x6790); -+ cdns_phy_reg_write(mhdp, TX_PSC_A2 | (k << 9), 0x0090); -+ cdns_phy_reg_write(mhdp, TX_PSC_A3 | (k << 9), 0x0090); -+ -+ val = cdns_phy_reg_read(mhdp, RX_PSC_CAL | (k << 9)); -+ val &= 0xFFBB; -+ cdns_phy_reg_write(mhdp, RX_PSC_CAL | (k << 9), val); -+ -+ val = cdns_phy_reg_read(mhdp, RX_PSC_A0 | (k << 9)); -+ val &= 0xFFBB; -+ cdns_phy_reg_write(mhdp, RX_PSC_A0 | (k << 9), val); -+ } -+ return true; -+} -+ -+static int hdmi_phy_cfg_t28hpc(struct cdns_mhdp_device *mhdp, -+ struct drm_display_mode *mode) -+{ -+ const struct hdmi_ctrl *p_ctrl_table; -+ const struct hdmi_pll_tuning *p_pll_table; -+ const u32 refclk_freq_khz = 27000; -+ const u8 pclk_in = false; -+ u32 pixel_freq = mode->clock; -+ u32 vco_freq, char_freq; -+ u32 div_total, feedback_factor; -+ u32 i, ret; -+ -+ feedback_factor = hdmi_feedback_factor(mhdp); -+ -+ char_freq = pixel_freq * feedback_factor / 1000; -+ -+ DRM_INFO("Pixel clock: %d KHz, character clock: %d, bpc is %0d-bit.\n", -+ pixel_freq, char_freq, mhdp->video_info.color_depth); -+ -+ /* Get right row from the ctrl_table table. -+ * Check if 'pixel_freq_khz' value matches the PIXEL_CLK_FREQ column. -+ * Consider only the rows with FEEDBACK_FACTOR column matching feedback_factor. */ -+ for (i = 0; i < ARRAY_SIZE(imx8mq_ctrl_table); i++) { -+ if (feedback_factor == imx8mq_ctrl_table[i].feedback_factor && -+ pixel_freq == imx8mq_ctrl_table[i].pixel_clk_freq_min) { -+ p_ctrl_table = &imx8mq_ctrl_table[i]; -+ break; -+ } -+ } -+ if (i == ARRAY_SIZE(imx8mq_ctrl_table)) { -+ DRM_WARN("Pixel clk (%d KHz) not supported, color depth (%0d-bit)\n", -+ pixel_freq, mhdp->video_info.color_depth); -+ return 0; -+ } -+ -+ div_total = p_ctrl_table->pll_fb_div_total; -+ vco_freq = refclk_freq_khz * div_total / p_ctrl_table->cmnda_pll0_ip_div; -+ -+ /* Get right row from the imx8mq_pll_table table. -+ * Check if vco_freq_khz and feedback_div_total -+ * column matching with imx8mq_pll_table. */ -+ for (i = 0; i < ARRAY_SIZE(imx8mq_pll_table); i++) { -+ if (vco_freq == imx8mq_pll_table[i].vco_freq_min && -+ div_total == imx8mq_pll_table[i].feedback_div_total) { -+ p_pll_table = &imx8mq_pll_table[i]; -+ break; -+ } -+ } -+ if (i == ARRAY_SIZE(imx8mq_pll_table)) { -+ DRM_WARN("VCO (%d KHz) not supported\n", vco_freq); -+ return 0; -+ } -+ DRM_INFO("VCO frequency is %d KHz\n", vco_freq); -+ -+ ret = hdmi_phy_config(mhdp, p_ctrl_table, p_pll_table, pclk_in); -+ if (ret == false) -+ return 0; -+ -+ return char_freq; -+} -+ -+static int hdmi_phy_cfg_ss28fdsoi(struct cdns_mhdp_device *mhdp, -+ struct drm_display_mode *mode) -+{ -+ const struct hdmi_ctrl *p_ctrl_table; -+ const struct hdmi_pll_tuning *p_pll_table; -+ const u8 pclk_in = true; -+ u32 pixel_freq = mode->clock; -+ u32 vco_freq, char_freq; -+ u32 div_total, feedback_factor; -+ u32 ret, i; -+ -+ feedback_factor = hdmi_feedback_factor(mhdp); -+ -+ char_freq = pixel_freq * feedback_factor / 1000; -+ -+ DRM_INFO("Pixel clock: %d KHz, character clock: %d, bpc is %0d-bit.\n", -+ pixel_freq, char_freq, mhdp->video_info.color_depth); -+ -+ /* Get right row from the ctrl_table table. -+ * Check if 'pixel_freq_khz' value matches the PIXEL_CLK_FREQ column. -+ * Consider only the rows with FEEDBACK_FACTOR column matching feedback_factor. */ -+ for (i = 0; i < ARRAY_SIZE(imx8qm_ctrl_table); i++) { -+ if (feedback_factor == imx8qm_ctrl_table[i].feedback_factor && -+ pixel_freq >= imx8qm_ctrl_table[i].pixel_clk_freq_min && -+ pixel_freq <= imx8qm_ctrl_table[i].pixel_clk_freq_max) { -+ p_ctrl_table = &imx8qm_ctrl_table[i]; -+ break; -+ } -+ } -+ if (i == ARRAY_SIZE(imx8qm_ctrl_table)) { -+ DRM_WARN("Pixel clk (%d KHz) not supported, color depth (%0d-bit)\n", -+ pixel_freq, mhdp->video_info.color_depth); -+ return 0; -+ } -+ -+ div_total = p_ctrl_table->pll_fb_div_total; -+ vco_freq = pixel_freq * div_total / p_ctrl_table->cmnda_pll0_ip_div; -+ -+ /* Get right row from the imx8mq_pll_table table. -+ * Check if vco_freq_khz and feedback_div_total -+ * column matching with imx8mq_pll_table. */ -+ for (i = 0; i < ARRAY_SIZE(imx8qm_pll_table); i++) { -+ if (vco_freq >= imx8qm_pll_table[i].vco_freq_min && -+ vco_freq < imx8qm_pll_table[i].vco_freq_max && -+ div_total == imx8qm_pll_table[i].feedback_div_total) { -+ p_pll_table = &imx8qm_pll_table[i]; -+ break; -+ } -+ } -+ if (i == ARRAY_SIZE(imx8qm_pll_table)) { -+ DRM_WARN("VCO (%d KHz) not supported\n", vco_freq); -+ return 0; -+ } -+ DRM_INFO("VCO frequency is %d KHz\n", vco_freq); -+ -+ ret = hdmi_phy_config(mhdp, p_ctrl_table, p_pll_table, pclk_in); -+ if (ret == false) -+ return 0; -+ -+ return char_freq; -+} -+ -+static int hdmi_phy_power_up(struct cdns_mhdp_device *mhdp) -+{ -+ u32 val, i; -+ -+ /* set Power State to A2 */ -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0004); -+ -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_0, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_1, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_2, 1); -+ cdns_phy_reg_write(mhdp, TX_DIAG_ACYA_3, 1); -+ -+ /* Wait for Power State A2 Ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ if (val & (1 << 6)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait A2 Ack failed\n"); -+ return -1; -+ } -+ -+ /* Power up ARC */ -+ hdmi_arc_config(mhdp); -+ -+ /* Configure PHY in A0 mode (PHY must be in the A0 power -+ * state in order to transmit data) -+ */ -+ //cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0101); //imx8mq -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, 0x0001); -+ -+ /* Wait for Power State A0 Ack */ -+ for (i = 0; i < 10; i++) { -+ val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ if (val & (1 << 4)) -+ break; -+ msleep(20); -+ } -+ if (i == 10) { -+ dev_err(mhdp->dev, "Wait A0 Ack failed\n"); -+ return -1; -+ } -+ return 0; -+} -+ -+bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *mhdp) -+{ -+ u32 rate = mhdp->valid_mode->clock; -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(imx8mq_ctrl_table); i++) -+ if(rate == imx8mq_ctrl_table[i].pixel_clk_freq_min) -+ return true; -+ return false; -+} -+ -+int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_display_mode *mode = &mhdp->mode; -+ int ret; -+ -+ /* Check HDMI FW alive before HDMI PHY init */ -+ ret = cdns_mhdp_check_alive(mhdp); -+ if (ret == false) { -+ DRM_ERROR("NO HDMI FW running\n"); -+ return -ENXIO; -+ } -+ -+ /* Configure PHY */ -+ mhdp->hdmi.char_rate = hdmi_phy_cfg_t28hpc(mhdp, mode); -+ if (mhdp->hdmi.char_rate == 0) { -+ DRM_ERROR("failed to set phy pclock\n"); -+ return -EINVAL; -+ } -+ -+ ret = hdmi_phy_power_up(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ hdmi_phy_set_vswing(mhdp); -+ -+ return true; -+} -+ -+bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ u32 rate = mhdp->valid_mode->clock; -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(imx8qm_ctrl_table); i++) -+ if(rate >= imx8qm_ctrl_table[i].pixel_clk_freq_min && -+ rate <= imx8qm_ctrl_table[i].pixel_clk_freq_max) -+ return true; -+ return false; -+} -+ -+int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_display_mode *mode = &mhdp->mode; -+ int ret; -+ -+ /* Check HDMI FW alive before HDMI PHY init */ -+ ret = cdns_mhdp_check_alive(mhdp); -+ if (ret == false) { -+ DRM_ERROR("NO HDMI FW running\n"); -+ return -ENXIO; -+ } -+ -+ /* Configure PHY */ -+ mhdp->hdmi.char_rate = hdmi_phy_cfg_ss28fdsoi(mhdp, mode); -+ if (mhdp->hdmi.char_rate == 0) { -+ DRM_ERROR("failed to set phy pclock\n"); -+ return -EINVAL; -+ } -+ -+ ret = hdmi_phy_power_up(mhdp); -+ if (ret < 0) -+ return ret; -+ -+ hdmi_phy_set_vswing(mhdp); -+ -+ return true; -+} -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h -new file mode 100644 -index 000000000000..fc3247dada2d ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h -@@ -0,0 +1,75 @@ -+/* -+ * Cadence High-Definition Multimedia Interface (HDMI) driver -+ * -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ */ -+#ifndef CDNS_MHDP_IMX_H_ -+#define CDNS_MHDP_IMX_H_ -+ -+#include -+#include -+ -+ -+struct imx_mhdp_device; -+ -+struct imx_hdp_clks { -+ struct clk *av_pll; -+ struct clk *dig_pll; -+ struct clk *clk_ipg; -+ struct clk *clk_core; -+ struct clk *clk_pxl; -+ struct clk *clk_pxl_mux; -+ struct clk *clk_pxl_link; -+ -+ struct clk *lpcg_hdp; -+ struct clk *lpcg_msi; -+ struct clk *lpcg_pxl; -+ struct clk *lpcg_vif; -+ struct clk *lpcg_lis; -+ struct clk *lpcg_apb; -+ struct clk *lpcg_apb_csr; -+ struct clk *lpcg_apb_ctrl; -+ -+ struct clk *lpcg_i2s; -+ struct clk *clk_i2s_bypass; -+}; -+ -+struct imx_mhdp_device { -+ struct cdns_mhdp_device mhdp; -+ struct drm_encoder encoder; -+ -+ struct mutex audio_mutex; -+ spinlock_t audio_lock; -+ bool connected; -+ bool active; -+ bool suspended; -+ struct imx_hdp_clks clks; -+ const struct firmware *fw; -+ const char *firmware_name; -+ -+ int bus_type; -+ -+ struct device *pd_mhdp_dev; -+ struct device *pd_pll0_dev; -+ struct device *pd_pll1_dev; -+ struct device_link *pd_mhdp_link; -+ struct device_link *pd_pll0_link; -+ struct device_link *pd_pll1_link; -+}; -+ -+void cdns_mhdp_plat_init_imx8qm(struct cdns_mhdp_device *mhdp); -+void cdns_mhdp_plat_deinit_imx8qm(struct cdns_mhdp_device *mhdp); -+void cdns_mhdp_pclk_rate_imx8qm(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_resume_imx8qm(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_suspend_imx8qm(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp); -+int cdns_mhdp_power_on_ls1028a(struct cdns_mhdp_device *mhdp); -+void cdns_mhdp_pclk_rate_ls1028a(struct cdns_mhdp_device *mhdp); -+#endif /* CDNS_MHDP_IMX_H_ */ -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -new file mode 100644 -index 000000000000..a3ba3da4b05d ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -@@ -0,0 +1,638 @@ -+/* -+ * copyright (c) 2019 nxp semiconductor, inc. -+ * -+ * this program is free software; you can redistribute it and/or modify -+ * it under the terms of the gnu general public license version 2 as -+ * published by the free software foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "cdns-mhdp-imx.h" -+ -+#define FW_IRAM_OFFSET 0x2000 -+#define FW_IRAM_SIZE 0x10000 -+#define FW_DRAM_SIZE 0x8000 -+ -+#define PLL_800MHZ (800000000) -+ -+#define HDP_DUAL_MODE_MIN_PCLK_RATE 300000 /* KHz */ -+#define HDP_SINGLE_MODE_MAX_WIDTH 1920 -+ -+#define CSR_PIXEL_LINK_MUX_CTL 0x00 -+#define CSR_PIXEL_LINK_MUX_VCP_OFFSET 5 -+#define CSR_PIXEL_LINK_MUX_HCP_OFFSET 4 -+ -+static bool imx8qm_video_dual_mode(struct cdns_mhdp_device *mhdp) -+{ -+ struct drm_display_mode *mode = &mhdp->mode; -+ return (mode->clock > HDP_DUAL_MODE_MIN_PCLK_RATE || -+ mode->hdisplay > HDP_SINGLE_MODE_MAX_WIDTH) ? true : false; -+} -+ -+static void imx8qm_pixel_link_mux(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct drm_display_mode *mode = &imx_mhdp->mhdp.mode; -+ bool dual_mode; -+ u32 val; -+ -+ dual_mode = imx8qm_video_dual_mode(&imx_mhdp->mhdp); -+ -+ val = 0x4; /* RGB */ -+ if (dual_mode) -+ val |= 0x2; /* pixel link 0 and 1 are active */ -+ if (mode->flags & DRM_MODE_FLAG_PVSYNC) -+ val |= 1 << CSR_PIXEL_LINK_MUX_VCP_OFFSET; -+ if (mode->flags & DRM_MODE_FLAG_PHSYNC) -+ val |= 1 << CSR_PIXEL_LINK_MUX_HCP_OFFSET; -+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) -+ val |= 0x2; -+ -+ writel(val, imx_mhdp->mhdp.regs_sec); -+} -+ -+static void imx8qm_pixel_link_valid(u32 dual_mode) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_PXL_LINK_MST1_VLD, 1); -+ if (dual_mode) -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_PXL_LINK_MST2_VLD, 1); -+} -+ -+static void imx8qm_pixel_link_invalid(u32 dual_mode) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_PXL_LINK_MST1_VLD, 0); -+ if (dual_mode) -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_PXL_LINK_MST2_VLD, 0); -+} -+ -+static void imx8qm_pixel_link_sync_enable(u32 dual_mode) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ if (dual_mode) -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_SYNC_CTRL, 3); -+ else -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_SYNC_CTRL0, 1); -+} -+ -+static void imx8qm_pixel_link_sync_disable(u32 dual_mode) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ if (dual_mode) -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_SYNC_CTRL, 0); -+ else -+ imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_SYNC_CTRL0, 0); -+} -+ -+static void imx8qm_phy_reset(u8 reset) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ /* set the pixel link mode and pixel type */ -+ imx_sc_misc_set_control(handle, IMX_SC_R_HDMI, IMX_SC_C_PHY_RESET, reset); -+} -+ -+static void imx8qm_clk_mux(u8 is_dp) -+{ -+ struct imx_sc_ipc *handle; -+ -+ imx_scu_get_handle(&handle); -+ -+ if (is_dp) -+ /* Enable the 24MHz for HDP PHY */ -+ imx_sc_misc_set_control(handle, IMX_SC_R_HDMI, IMX_SC_C_MODE, 1); -+ else -+ imx_sc_misc_set_control(handle, IMX_SC_R_HDMI, IMX_SC_C_MODE, 0); -+} -+ -+int imx8qm_clocks_init(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct device *dev = imx_mhdp->mhdp.dev; -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ clks->dig_pll = devm_clk_get(dev, "dig_pll"); -+ if (IS_ERR(clks->dig_pll)) { -+ dev_warn(dev, "failed to get dig pll clk\n"); -+ return PTR_ERR(clks->dig_pll); -+ } -+ -+ clks->av_pll = devm_clk_get(dev, "av_pll"); -+ if (IS_ERR(clks->av_pll)) { -+ dev_warn(dev, "failed to get av pll clk\n"); -+ return PTR_ERR(clks->av_pll); -+ } -+ -+ clks->clk_ipg = devm_clk_get(dev, "clk_ipg"); -+ if (IS_ERR(clks->clk_ipg)) { -+ dev_warn(dev, "failed to get dp ipg clk\n"); -+ return PTR_ERR(clks->clk_ipg); -+ } -+ -+ clks->clk_core = devm_clk_get(dev, "clk_core"); -+ if (IS_ERR(clks->clk_core)) { -+ dev_warn(dev, "failed to get hdp core clk\n"); -+ return PTR_ERR(clks->clk_core); -+ } -+ -+ clks->clk_pxl = devm_clk_get(dev, "clk_pxl"); -+ if (IS_ERR(clks->clk_pxl)) { -+ dev_warn(dev, "failed to get pxl clk\n"); -+ return PTR_ERR(clks->clk_pxl); -+ } -+ -+ clks->clk_pxl_mux = devm_clk_get(dev, "clk_pxl_mux"); -+ if (IS_ERR(clks->clk_pxl_mux)) { -+ dev_warn(dev, "failed to get pxl mux clk\n"); -+ return PTR_ERR(clks->clk_pxl_mux); -+ } -+ -+ clks->clk_pxl_link = devm_clk_get(dev, "clk_pxl_link"); -+ if (IS_ERR(clks->clk_pxl_mux)) { -+ dev_warn(dev, "failed to get pxl link clk\n"); -+ return PTR_ERR(clks->clk_pxl_link); -+ } -+ -+ clks->lpcg_hdp = devm_clk_get(dev, "lpcg_hdp"); -+ if (IS_ERR(clks->lpcg_hdp)) { -+ dev_warn(dev, "failed to get lpcg hdp clk\n"); -+ return PTR_ERR(clks->lpcg_hdp); -+ } -+ -+ clks->lpcg_msi = devm_clk_get(dev, "lpcg_msi"); -+ if (IS_ERR(clks->lpcg_msi)) { -+ dev_warn(dev, "failed to get lpcg msi clk\n"); -+ return PTR_ERR(clks->lpcg_msi); -+ } -+ -+ clks->lpcg_pxl = devm_clk_get(dev, "lpcg_pxl"); -+ if (IS_ERR(clks->lpcg_pxl)) { -+ dev_warn(dev, "failed to get lpcg pxl clk\n"); -+ return PTR_ERR(clks->lpcg_pxl); -+ } -+ -+ clks->lpcg_vif = devm_clk_get(dev, "lpcg_vif"); -+ if (IS_ERR(clks->lpcg_vif)) { -+ dev_warn(dev, "failed to get lpcg vif clk\n"); -+ return PTR_ERR(clks->lpcg_vif); -+ } -+ -+ clks->lpcg_lis = devm_clk_get(dev, "lpcg_lis"); -+ if (IS_ERR(clks->lpcg_lis)) { -+ dev_warn(dev, "failed to get lpcg lis clk\n"); -+ return PTR_ERR(clks->lpcg_lis); -+ } -+ -+ clks->lpcg_apb = devm_clk_get(dev, "lpcg_apb"); -+ if (IS_ERR(clks->lpcg_apb)) { -+ dev_warn(dev, "failed to get lpcg apb clk\n"); -+ return PTR_ERR(clks->lpcg_apb); -+ } -+ -+ clks->lpcg_apb_csr = devm_clk_get(dev, "lpcg_apb_csr"); -+ if (IS_ERR(clks->lpcg_apb_csr)) { -+ dev_warn(dev, "failed to get apb csr clk\n"); -+ return PTR_ERR(clks->lpcg_apb_csr); -+ } -+ -+ clks->lpcg_apb_ctrl = devm_clk_get(dev, "lpcg_apb_ctrl"); -+ if (IS_ERR(clks->lpcg_apb_ctrl)) { -+ dev_warn(dev, "failed to get lpcg apb ctrl clk\n"); -+ return PTR_ERR(clks->lpcg_apb_ctrl); -+ } -+ -+ clks->clk_i2s_bypass = devm_clk_get(dev, "clk_i2s_bypass"); -+ if (IS_ERR(clks->clk_i2s_bypass)) { -+ dev_err(dev, "failed to get i2s bypass clk\n"); -+ return PTR_ERR(clks->clk_i2s_bypass); -+ } -+ -+ clks->lpcg_i2s = devm_clk_get(dev, "lpcg_i2s"); -+ if (IS_ERR(clks->lpcg_i2s)) { -+ dev_err(dev, "failed to get lpcg i2s clk\n"); -+ return PTR_ERR(clks->lpcg_i2s); -+ } -+ return true; -+} -+ -+static int imx8qm_pixel_clk_enable(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ struct device *dev = imx_mhdp->mhdp.dev; -+ int ret; -+ -+ ret = clk_prepare_enable(clks->av_pll); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre av pll error\n", __func__); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clks->clk_pxl); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk pxl error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->clk_pxl_mux); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk pxl mux error\n", __func__); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clks->clk_pxl_link); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk pxl link error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_vif); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk vif error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_pxl); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre lpcg pxl error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_hdp); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre lpcg hdp error\n", __func__); -+ return ret; -+ } -+ return ret; -+} -+ -+static void imx8qm_pixel_clk_disable(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ clk_disable_unprepare(clks->lpcg_pxl); -+ clk_disable_unprepare(clks->lpcg_hdp); -+ clk_disable_unprepare(clks->lpcg_vif); -+ clk_disable_unprepare(clks->clk_pxl); -+ clk_disable_unprepare(clks->clk_pxl_link); -+ clk_disable_unprepare(clks->clk_pxl_mux); -+ clk_disable_unprepare(clks->av_pll); -+} -+ -+static void imx8qm_pixel_clk_set_rate(struct imx_mhdp_device *imx_mhdp, u32 pclock) -+{ -+ bool dual_mode = imx8qm_video_dual_mode(&imx_mhdp->mhdp); -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ /* pixel clock for HDMI */ -+ clk_set_rate(clks->av_pll, pclock); -+ -+ if (dual_mode == true) { -+ clk_set_rate(clks->clk_pxl, pclock/2); -+ clk_set_rate(clks->clk_pxl_link, pclock/2); -+ } else { -+ clk_set_rate(clks->clk_pxl_link, pclock); -+ clk_set_rate(clks->clk_pxl, pclock); -+ } -+ clk_set_rate(clks->clk_pxl_mux, pclock); -+} -+ -+static int imx8qm_ipg_clk_enable(struct imx_mhdp_device *imx_mhdp) -+{ -+ int ret; -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ struct device *dev = imx_mhdp->mhdp.dev; -+ -+ ret = clk_prepare_enable(clks->dig_pll); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre dig pll error\n", __func__); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clks->clk_ipg); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk_ipg error\n", __func__); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clks->clk_core); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk core error\n", __func__); -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(clks->lpcg_apb); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk apb error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_lis); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk lis error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_msi); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk msierror\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_apb_csr); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk apb csr error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_apb_ctrl); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk apb ctrl error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->lpcg_i2s); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk i2s error\n", __func__); -+ return ret; -+ } -+ ret = clk_prepare_enable(clks->clk_i2s_bypass); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk i2s bypass error\n", __func__); -+ return ret; -+ } -+ return ret; -+} -+ -+static void imx8qm_ipg_clk_set_rate(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ /* ipg/core clock */ -+ clk_set_rate(clks->dig_pll, PLL_800MHZ); -+ clk_set_rate(clks->clk_core, PLL_800MHZ/4); -+ clk_set_rate(clks->clk_ipg, PLL_800MHZ/8); -+} -+ -+static void imx8qm_detach_pm_domains(struct imx_mhdp_device *imx_mhdp) -+{ -+ if (imx_mhdp->pd_pll1_link && !IS_ERR(imx_mhdp->pd_pll1_link)) -+ device_link_del(imx_mhdp->pd_pll1_link); -+ if (imx_mhdp->pd_pll1_dev && !IS_ERR(imx_mhdp->pd_pll1_dev)) -+ dev_pm_domain_detach(imx_mhdp->pd_pll1_dev, true); -+ -+ if (imx_mhdp->pd_pll0_link && !IS_ERR(imx_mhdp->pd_pll0_link)) -+ device_link_del(imx_mhdp->pd_pll0_link); -+ if (imx_mhdp->pd_pll0_dev && !IS_ERR(imx_mhdp->pd_pll0_dev)) -+ dev_pm_domain_detach(imx_mhdp->pd_pll0_dev, true); -+ -+ if (imx_mhdp->pd_mhdp_link && !IS_ERR(imx_mhdp->pd_mhdp_link)) -+ device_link_del(imx_mhdp->pd_mhdp_link); -+ if (imx_mhdp->pd_mhdp_dev && !IS_ERR(imx_mhdp->pd_mhdp_dev)) -+ dev_pm_domain_detach(imx_mhdp->pd_mhdp_dev, true); -+ -+ imx_mhdp->pd_mhdp_dev = NULL; -+ imx_mhdp->pd_mhdp_link = NULL; -+ imx_mhdp->pd_pll0_dev = NULL; -+ imx_mhdp->pd_pll0_link = NULL; -+ imx_mhdp->pd_pll1_dev = NULL; -+ imx_mhdp->pd_pll1_link = NULL; -+} -+ -+static int imx8qm_attach_pm_domains(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct device *dev = imx_mhdp->mhdp.dev; -+ u32 flags = DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE; -+ int ret = 0; -+ -+ imx_mhdp->pd_mhdp_dev = dev_pm_domain_attach_by_name(dev, "hdmi"); -+ if (IS_ERR(imx_mhdp->pd_mhdp_dev)) { -+ ret = PTR_ERR(imx_mhdp->pd_mhdp_dev); -+ dev_err(dev, "Failed to attach dc pd dev: %d\n", ret); -+ goto fail; -+ } -+ imx_mhdp->pd_mhdp_link = device_link_add(dev, imx_mhdp->pd_mhdp_dev, flags); -+ if (IS_ERR(imx_mhdp->pd_mhdp_link)) { -+ ret = PTR_ERR(imx_mhdp->pd_mhdp_link); -+ dev_err(dev, "Failed to add device link to dc pd dev: %d\n", -+ ret); -+ goto fail; -+ } -+ -+ imx_mhdp->pd_pll0_dev = dev_pm_domain_attach_by_name(dev, "pll0"); -+ if (IS_ERR(imx_mhdp->pd_pll0_dev)) { -+ ret = PTR_ERR(imx_mhdp->pd_pll0_dev); -+ dev_err(dev, "Failed to attach pll0 pd dev: %d\n", ret); -+ goto fail; -+ } -+ imx_mhdp->pd_pll0_link = device_link_add(dev, imx_mhdp->pd_pll0_dev, flags); -+ if (IS_ERR(imx_mhdp->pd_pll0_link)) { -+ ret = PTR_ERR(imx_mhdp->pd_pll0_link); -+ dev_err(dev, "Failed to add device link to pll0 pd dev: %d\n", -+ ret); -+ goto fail; -+ } -+ -+ imx_mhdp->pd_pll1_dev = dev_pm_domain_attach_by_name(dev, "pll1"); -+ if (IS_ERR(imx_mhdp->pd_pll1_dev)) { -+ ret = PTR_ERR(imx_mhdp->pd_pll1_dev); -+ dev_err(dev, "Failed to attach pll0 pd dev: %d\n", ret); -+ goto fail; -+ } -+ imx_mhdp->pd_pll1_link = device_link_add(dev, imx_mhdp->pd_pll1_dev, flags); -+ if (IS_ERR(imx_mhdp->pd_pll1_link)) { -+ ret = PTR_ERR(imx_mhdp->pd_pll1_link); -+ dev_err(dev, "Failed to add device link to pll1 pd dev: %d\n", -+ ret); -+ goto fail; -+ } -+fail: -+ imx8qm_detach_pm_domains(imx_mhdp); -+ return ret; -+} -+ -+int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ /* Power on PM Domains */ -+ -+ imx8qm_attach_pm_domains(imx_mhdp); -+ -+ /* clock init and rate set */ -+ imx8qm_clocks_init(imx_mhdp); -+ -+ imx8qm_ipg_clk_set_rate(imx_mhdp); -+ -+ /* Init pixel clock with 148.5MHz before FW init */ -+ imx8qm_pixel_clk_set_rate(imx_mhdp, 148500000); -+ -+ imx8qm_ipg_clk_enable(imx_mhdp); -+ -+ imx8qm_clk_mux(imx_mhdp->mhdp.plat_data->is_dp); -+ -+ imx8qm_pixel_clk_enable(imx_mhdp); -+ -+ imx8qm_phy_reset(1); -+ -+ return 0; -+} -+ -+void cdns_mhdp_plat_init_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ bool dual_mode = imx8qm_video_dual_mode(&imx_mhdp->mhdp); -+ -+ imx8qm_pixel_link_sync_disable(dual_mode); -+ imx8qm_pixel_link_invalid(dual_mode); -+} -+ -+void cdns_mhdp_plat_deinit_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ bool dual_mode = imx8qm_video_dual_mode(&imx_mhdp->mhdp); -+ -+ imx8qm_pixel_link_valid(dual_mode); -+ imx8qm_pixel_link_sync_enable(dual_mode); -+} -+ -+void cdns_mhdp_pclk_rate_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ -+ /* set pixel clock before video mode setup */ -+ imx8qm_pixel_clk_disable(imx_mhdp); -+ -+ imx8qm_pixel_clk_set_rate(imx_mhdp, imx_mhdp->mhdp.mode.clock * 1000); -+ -+ imx8qm_pixel_clk_enable(imx_mhdp); -+ -+ /* Config pixel link mux */ -+ imx8qm_pixel_link_mux(imx_mhdp); -+} -+ -+int cdns_mhdp_firmware_write_section(struct imx_mhdp_device *imx_mhdp, -+ const u8 *data, int size, int addr) -+{ -+ int i; -+ -+ for (i = 0; i < size; i += 4) { -+ u32 val = (unsigned int)data[i] << 0 | -+ (unsigned int)data[i + 1] << 8 | -+ (unsigned int)data[i + 2] << 16 | -+ (unsigned int)data[i + 3] << 24; -+ cdns_mhdp_bus_write(val, &imx_mhdp->mhdp, addr + i); -+ } -+ -+ return 0; -+} -+ -+static void cdns_mhdp_firmware_load_cont(const struct firmware *fw, void *context) -+{ -+ struct imx_mhdp_device *imx_mhdp = context; -+ -+ imx_mhdp->fw = fw; -+} -+ -+static int cdns_mhdp_firmware_load(struct imx_mhdp_device *imx_mhdp) -+{ -+ const u8 *iram; -+ const u8 *dram; -+ u32 rate; -+ int ret; -+ -+ /* configure HDMI/DP core clock */ -+ rate = clk_get_rate(imx_mhdp->clks.clk_core); -+ if (imx_mhdp->mhdp.is_ls1028a) -+ rate = rate / 4; -+ -+ cdns_mhdp_set_fw_clk(&imx_mhdp->mhdp, rate); -+ -+ /* skip fw loading if none is specified */ -+ if (!imx_mhdp->firmware_name) -+ goto out; -+ -+ if (!imx_mhdp->fw) { -+ ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_NOUEVENT, -+ imx_mhdp->firmware_name, -+ imx_mhdp->mhdp.dev, GFP_KERNEL, -+ imx_mhdp, -+ cdns_mhdp_firmware_load_cont); -+ if (ret < 0) { -+ DRM_ERROR("failed to load firmware\n"); -+ return -ENOENT; -+ } -+ } else { -+ iram = imx_mhdp->fw->data + FW_IRAM_OFFSET; -+ dram = iram + FW_IRAM_SIZE; -+ -+ cdns_mhdp_firmware_write_section(imx_mhdp, iram, FW_IRAM_SIZE, ADDR_IMEM); -+ cdns_mhdp_firmware_write_section(imx_mhdp, dram, FW_DRAM_SIZE, ADDR_DMEM); -+ } -+ -+out: -+ /* un-reset ucpu */ -+ cdns_mhdp_bus_write(0, &imx_mhdp->mhdp, APB_CTRL); -+ DRM_INFO("Started firmware!\n"); -+ -+ return 0; -+} -+ -+int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ int ret; -+ -+ /* load firmware */ -+ ret = cdns_mhdp_firmware_load(imx_mhdp); -+ if (ret) -+ return ret; -+ -+ ret = cdns_mhdp_check_alive(&imx_mhdp->mhdp); -+ if (ret == false) { -+ DRM_ERROR("NO HDMI FW running\n"); -+ return -ENXIO; -+ } -+ -+ /* turn on IP activity */ -+ cdns_mhdp_set_firmware_active(&imx_mhdp->mhdp, 1); -+ -+ DRM_INFO("HDP FW Version - ver %d verlib %d\n", -+ cdns_mhdp_bus_read(mhdp, VER_L) + (cdns_mhdp_bus_read(mhdp, VER_H) << 8), -+ cdns_mhdp_bus_read(mhdp, VER_LIB_H_ADDR) + (cdns_mhdp_bus_read(mhdp, VER_LIB_H_ADDR) << 8)); -+ -+ return 0; -+} -+ -+int cdns_mhdp_suspend_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ -+ imx8qm_pixel_clk_disable(imx_mhdp); -+ -+ return 0; -+} -+ -+int cdns_mhdp_resume_imx8qm(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = -+ container_of(mhdp, struct imx_mhdp_device, mhdp); -+ -+ imx8qm_pixel_clk_enable(imx_mhdp); -+ -+ return cdns_mhdp_firmware_init_imx8qm(mhdp); -+} -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -new file mode 100644 -index 000000000000..3acbdf575ee2 ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -@@ -0,0 +1,259 @@ -+/* -+ * copyright (c) 2019 nxp semiconductor, inc. -+ * -+ * this program is free software; you can redistribute it and/or modify -+ * it under the terms of the gnu general public license version 2 as -+ * published by the free software foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "cdns-mhdp-imx.h" -+#include "cdns-mhdp-phy.h" -+#include "../ipuv3/imx-drm.h" -+ -+static void cdns_mhdp_imx_encoder_disable(struct drm_encoder *encoder) -+{ -+ struct drm_bridge *bridge = drm_bridge_chain_get_first_bridge(encoder); -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ -+ cdns_mhdp_plat_call(mhdp, plat_init); -+} -+ -+static void cdns_mhdp_imx_encoder_enable(struct drm_encoder *encoder) -+{ -+ struct drm_bridge *bridge = drm_bridge_chain_get_first_bridge(encoder); -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ -+ cdns_mhdp_plat_call(mhdp, plat_deinit); -+} -+ -+static int cdns_mhdp_imx_encoder_atomic_check(struct drm_encoder *encoder, -+ struct drm_crtc_state *crtc_state, -+ struct drm_connector_state *conn_state) -+{ -+ struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state); -+ struct drm_bridge *bridge = drm_bridge_chain_get_first_bridge(encoder); -+ struct cdns_mhdp_device *mhdp = bridge->driver_private; -+ -+ if (mhdp->plat_data->video_format != 0) -+ imx_crtc_state->bus_format = mhdp->plat_data->video_format; -+ -+ if (mhdp->force_mode_set) -+ crtc_state->mode_changed = true; -+ -+ return 0; -+} -+ -+static const struct drm_encoder_helper_funcs cdns_mhdp_imx_encoder_helper_funcs = { -+ .enable = cdns_mhdp_imx_encoder_enable, -+ .disable = cdns_mhdp_imx_encoder_disable, -+ .atomic_check = cdns_mhdp_imx_encoder_atomic_check, -+}; -+ -+static const struct drm_encoder_funcs cdns_mhdp_imx_encoder_funcs = { -+ .destroy = drm_encoder_cleanup, -+}; -+ -+static struct cdns_plat_data imx8mq_hdmi_drv_data = { -+ .plat_name = "imx8mq-hdmi", -+ .bind = cdns_hdmi_bind, -+ .unbind = cdns_hdmi_unbind, -+ .phy_set = cdns_hdmi_phy_set_imx8mq, -+ .phy_video_valid = cdns_hdmi_phy_video_valid_imx8mq, -+ .bus_type = BUS_TYPE_NORMAL_APB, -+}; -+ -+static struct cdns_plat_data imx8mq_dp_drv_data = { -+ .plat_name = "imx8mq-dp", -+ .bind = cdns_dp_bind, -+ .unbind = cdns_dp_unbind, -+ .phy_set = cdns_dp_phy_set_imx8mq, -+ .bus_type = BUS_TYPE_NORMAL_APB, -+}; -+ -+static struct cdns_plat_data imx8qm_hdmi_drv_data = { -+ .plat_name = "imx8qm-hdmi", -+ .bind = cdns_hdmi_bind, -+ .unbind = cdns_hdmi_unbind, -+ .phy_set = cdns_hdmi_phy_set_imx8qm, -+ .phy_video_valid = cdns_hdmi_phy_video_valid_imx8qm, -+ .power_on = cdns_mhdp_power_on_imx8qm, -+ .firmware_init = cdns_mhdp_firmware_init_imx8qm, -+ .resume = cdns_mhdp_resume_imx8qm, -+ .suspend = cdns_mhdp_suspend_imx8qm, -+ .pclk_rate = cdns_mhdp_pclk_rate_imx8qm, -+ .plat_init = cdns_mhdp_plat_init_imx8qm, -+ .plat_deinit = cdns_mhdp_plat_deinit_imx8qm, -+ .bus_type = BUS_TYPE_LOW4K_APB, -+ .video_format = MEDIA_BUS_FMT_RGB101010_1X30, -+}; -+ -+static struct cdns_plat_data imx8qm_dp_drv_data = { -+ .plat_name = "imx8qm-dp", -+ .bind = cdns_dp_bind, -+ .unbind = cdns_dp_unbind, -+ .phy_set = cdns_dp_phy_set_imx8qm, -+ .power_on = cdns_mhdp_power_on_imx8qm, -+ .firmware_init = cdns_mhdp_firmware_init_imx8qm, -+ .pclk_rate = cdns_mhdp_pclk_rate_imx8qm, -+ .plat_init = cdns_mhdp_plat_init_imx8qm, -+ .plat_deinit = cdns_mhdp_plat_deinit_imx8qm, -+ .bus_type = BUS_TYPE_LOW4K_APB, -+ .video_format = MEDIA_BUS_FMT_RGB101010_1X30, -+ .is_dp = true, -+}; -+ -+static struct cdns_plat_data ls1028a_dp_drv_data = { -+ .bind = cdns_dp_bind, -+ .unbind = cdns_dp_unbind, -+ .phy_set = cdns_dp_phy_set_imx8mq, -+ .power_on = cdns_mhdp_power_on_ls1028a, -+ .firmware_init = cdns_mhdp_firmware_init_imx8qm, -+ .pclk_rate = cdns_mhdp_pclk_rate_ls1028a, -+ .bus_type = BUS_TYPE_NORMAL_APB, -+}; -+ -+static const struct of_device_id cdns_mhdp_imx_dt_ids[] = { -+ { .compatible = "cdn,imx8mq-hdmi", -+ .data = &imx8mq_hdmi_drv_data -+ }, -+ { .compatible = "cdn,imx8mq-dp", -+ .data = &imx8mq_dp_drv_data -+ }, -+ { .compatible = "cdn,imx8qm-hdmi", -+ .data = &imx8qm_hdmi_drv_data -+ }, -+ { .compatible = "cdn,imx8qm-dp", -+ .data = &imx8qm_dp_drv_data -+ }, -+ { .compatible = "cdn,ls1028a-dp", -+ .data = &ls1028a_dp_drv_data -+ }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, cdns_mhdp_imx_dt_ids); -+ -+static int cdns_mhdp_imx_bind(struct device *dev, struct device *master, -+ void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ const struct cdns_plat_data *plat_data; -+ const struct of_device_id *match; -+ struct drm_device *drm = data; -+ struct drm_encoder *encoder; -+ struct imx_mhdp_device *imx_mhdp; -+ int ret; -+ -+ if (!pdev->dev.of_node) -+ return -ENODEV; -+ -+ imx_mhdp = devm_kzalloc(&pdev->dev, sizeof(*imx_mhdp), GFP_KERNEL); -+ if (!imx_mhdp) -+ return -ENOMEM; -+ -+ match = of_match_node(cdns_mhdp_imx_dt_ids, pdev->dev.of_node); -+ plat_data = match->data; -+ encoder = &imx_mhdp->encoder; -+ -+ encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); -+ -+ ret = of_property_read_string(pdev->dev.of_node, "firmware-name", -+ &imx_mhdp->firmware_name); -+ /* -+ * If we failed to find the CRTC(s) which this encoder is -+ * supposed to be connected to, it's because the CRTC has -+ * not been registered yet. Defer probing, and hope that -+ * the required CRTC is added later. -+ */ -+ if (encoder->possible_crtcs == 0) -+ return -EPROBE_DEFER; -+ -+ drm_encoder_helper_add(encoder, &cdns_mhdp_imx_encoder_helper_funcs); -+ drm_encoder_init(drm, encoder, &cdns_mhdp_imx_encoder_funcs, -+ DRM_MODE_ENCODER_TMDS, NULL); -+ -+ -+ imx_mhdp->mhdp.plat_data = plat_data; -+ imx_mhdp->mhdp.dev = dev; -+ imx_mhdp->mhdp.bus_type = plat_data->bus_type; -+ ret = plat_data->bind(pdev, encoder, &imx_mhdp->mhdp); -+ /* -+ * If cdns_mhdp_bind() fails we'll never call cdns_mhdp_unbind(), -+ * which would have called the encoder cleanup. Do it manually. -+ */ -+ if (ret < 0) -+ drm_encoder_cleanup(encoder); -+ -+ return ret; -+} -+ -+static void cdns_mhdp_imx_unbind(struct device *dev, struct device *master, -+ void *data) -+{ -+ struct imx_mhdp_device *imx_mhdp = dev_get_drvdata(dev); -+ -+ imx_mhdp->mhdp.plat_data->unbind(dev); -+} -+ -+static const struct component_ops cdns_mhdp_imx_ops = { -+ .bind = cdns_mhdp_imx_bind, -+ .unbind = cdns_mhdp_imx_unbind, -+}; -+ -+static int cdns_mhdp_imx_suspend(struct device *dev) -+{ -+ struct imx_mhdp_device *imx_mhdp = dev_get_drvdata(dev); -+ -+ cdns_mhdp_plat_call(&imx_mhdp->mhdp, suspend); -+ -+ return 0; -+} -+ -+static int cdns_mhdp_imx_resume(struct device *dev) -+{ -+ struct imx_mhdp_device *imx_mhdp = dev_get_drvdata(dev); -+ -+ cdns_mhdp_plat_call(&imx_mhdp->mhdp, resume); -+ -+ return 0; -+} -+ -+static int cdns_mhdp_imx_probe(struct platform_device *pdev) -+{ -+ return component_add(&pdev->dev, &cdns_mhdp_imx_ops); -+} -+ -+static int cdns_mhdp_imx_remove(struct platform_device *pdev) -+{ -+ component_del(&pdev->dev, &cdns_mhdp_imx_ops); -+ -+ return 0; -+} -+ -+static const struct dev_pm_ops cdns_mhdp_imx_pm_ops = { -+ SET_LATE_SYSTEM_SLEEP_PM_OPS(cdns_mhdp_imx_suspend, cdns_mhdp_imx_resume) -+}; -+ -+static struct platform_driver cdns_mhdp_imx_platform_driver = { -+ .probe = cdns_mhdp_imx_probe, -+ .remove = cdns_mhdp_imx_remove, -+ .driver = { -+ .name = "cdns-mhdp-imx", -+ .of_match_table = cdns_mhdp_imx_dt_ids, -+ .pm = &cdns_mhdp_imx_pm_ops, -+ }, -+}; -+ -+module_platform_driver(cdns_mhdp_imx_platform_driver); -+ -+MODULE_AUTHOR("Sandor YU "); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:cdnhdmi-imx"); -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-ls1028a.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-ls1028a.c -new file mode 100644 -index 000000000000..4cc71301f5fe ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-ls1028a.c -@@ -0,0 +1,110 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 NXP -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+ -+#include "cdns-mhdp-imx.h" -+ -+static const struct of_device_id scfg_device_ids[] = { -+ { .compatible = "fsl,ls1028a-scfg", }, -+ {} -+}; -+ -+static void ls1028a_phy_reset(u8 reset) -+{ -+ struct device_node *scfg_node; -+ void __iomem *scfg_base = NULL; -+ -+ scfg_node = of_find_matching_node(NULL, scfg_device_ids); -+ if (scfg_node) -+ scfg_base = of_iomap(scfg_node, 0); -+ -+ iowrite32(reset, scfg_base + 0x230); -+} -+ -+int ls1028a_clocks_init(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct device *dev = imx_mhdp->mhdp.dev; -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ clks->clk_core = devm_clk_get(dev, "clk_core"); -+ if (IS_ERR(clks->clk_core)) { -+ dev_warn(dev, "failed to get hdp core clk\n"); -+ return PTR_ERR(clks->clk_core); -+ } -+ -+ clks->clk_pxl = devm_clk_get(dev, "clk_pxl"); -+ if (IS_ERR(clks->clk_pxl)) { -+ dev_warn(dev, "failed to get pxl clk\n"); -+ return PTR_ERR(clks->clk_pxl); -+ } -+ -+ return true; -+} -+ -+static int ls1028a_pixel_clk_enable(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ struct device *dev = imx_mhdp->mhdp.dev; -+ int ret; -+ -+ ret = clk_prepare_enable(clks->clk_pxl); -+ if (ret < 0) { -+ dev_err(dev, "%s, pre clk pxl error\n", __func__); -+ return ret; -+ } -+ -+ return ret; -+} -+ -+static void ls1028a_pixel_clk_disable(struct imx_mhdp_device *imx_mhdp) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ clk_disable_unprepare(clks->clk_pxl); -+} -+ -+static void ls1028a_pixel_clk_set_rate(struct imx_mhdp_device *imx_mhdp, -+ u32 pclock) -+{ -+ struct imx_hdp_clks *clks = &imx_mhdp->clks; -+ -+ clk_set_rate(clks->clk_pxl, pclock); -+} -+ -+int cdns_mhdp_power_on_ls1028a(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = container_of -+ (mhdp, struct imx_mhdp_device, mhdp); -+ -+ /* clock init and rate set */ -+ ls1028a_clocks_init(imx_mhdp); -+ -+ ls1028a_pixel_clk_enable(imx_mhdp); -+ -+ /* Init pixel clock with 148.5MHz before FW init */ -+ ls1028a_pixel_clk_set_rate(imx_mhdp, 148500000); -+ -+ ls1028a_phy_reset(1); -+ -+ return 0; -+} -+ -+void cdns_mhdp_pclk_rate_ls1028a(struct cdns_mhdp_device *mhdp) -+{ -+ struct imx_mhdp_device *imx_mhdp = container_of -+ (mhdp, struct imx_mhdp_device, mhdp); -+ -+ /* set pixel clock before video mode setup */ -+ ls1028a_pixel_clk_disable(imx_mhdp); -+ -+ ls1028a_pixel_clk_set_rate(imx_mhdp, imx_mhdp->mhdp.mode.clock * 1000); -+ -+ ls1028a_pixel_clk_enable(imx_mhdp); -+} -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h -new file mode 100644 -index 000000000000..5682b9fbc90f ---- /dev/null -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h -@@ -0,0 +1,155 @@ -+/* -+ * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef _CDN_DP_PHY_H -+#define _CDN_DP_PHY_H -+ -+#include -+ -+#define CMN_SSM_BIAS_TMR 0x0022 -+#define CMN_PLLSM0_PLLEN_TMR 0x0029 -+#define CMN_PLLSM0_PLLPRE_TMR 0x002A -+#define CMN_PLLSM0_PLLVREF_TMR 0x002B -+#define CMN_PLLSM0_PLLLOCK_TMR 0x002C -+#define CMN_PLLSM0_USER_DEF_CTRL 0x002F -+#define CMN_PSM_CLK_CTRL 0x0061 -+#define CMN_CDIAG_REFCLK_CTRL 0x0062 -+#define CMN_PLL0_VCOCAL_START 0x0081 -+#define CMN_PLL0_VCOCAL_INIT_TMR 0x0084 -+#define CMN_PLL0_VCOCAL_ITER_TMR 0x0085 -+#define CMN_PLL0_INTDIV 0x0094 -+#define CMN_PLL0_FRACDIV 0x0095 -+#define CMN_PLL0_HIGH_THR 0x0096 -+#define CMN_PLL0_DSM_DIAG 0x0097 -+#define CMN_PLL0_SS_CTRL1 0x0098 -+#define CMN_PLL0_SS_CTRL2 0x0099 -+#define CMN_ICAL_INIT_TMR 0x00C4 -+#define CMN_ICAL_ITER_TMR 0x00C5 -+#define CMN_RXCAL_INIT_TMR 0x00D4 -+#define CMN_RXCAL_ITER_TMR 0x00D5 -+#define CMN_TXPUCAL_CTRL 0x00E0 -+#define CMN_TXPUCAL_INIT_TMR 0x00E4 -+#define CMN_TXPUCAL_ITER_TMR 0x00E5 -+#define CMN_TXPDCAL_CTRL 0x00F0 -+#define CMN_TXPDCAL_INIT_TMR 0x00F4 -+#define CMN_TXPDCAL_ITER_TMR 0x00F5 -+#define CMN_ICAL_ADJ_INIT_TMR 0x0102 -+#define CMN_ICAL_ADJ_ITER_TMR 0x0103 -+#define CMN_RX_ADJ_INIT_TMR 0x0106 -+#define CMN_RX_ADJ_ITER_TMR 0x0107 -+#define CMN_TXPU_ADJ_CTRL 0x0108 -+#define CMN_TXPU_ADJ_INIT_TMR 0x010A -+#define CMN_TXPU_ADJ_ITER_TMR 0x010B -+#define CMN_TXPD_ADJ_CTRL 0x010c -+#define CMN_TXPD_ADJ_INIT_TMR 0x010E -+#define CMN_TXPD_ADJ_ITER_TMR 0x010F -+#define CMN_DIAG_PLL0_FBH_OVRD 0x01C0 -+#define CMN_DIAG_PLL0_FBL_OVRD 0x01C1 -+#define CMN_DIAG_PLL0_OVRD 0x01C2 -+#define CMN_DIAG_PLL0_TEST_MODE 0x01C4 -+#define CMN_DIAG_PLL0_V2I_TUNE 0x01C5 -+#define CMN_DIAG_PLL0_CP_TUNE 0x01C6 -+#define CMN_DIAG_PLL0_LF_PROG 0x01C7 -+#define CMN_DIAG_PLL0_PTATIS_TUNE1 0x01C8 -+#define CMN_DIAG_PLL0_PTATIS_TUNE2 0x01C9 -+#define CMN_DIAG_PLL0_INCLK_CTRL 0x01CA -+#define CMN_DIAG_PLL0_PXL_DIVH 0x01CB -+#define CMN_DIAG_PLL0_PXL_DIVL 0x01CC -+#define CMN_DIAG_HSCLK_SEL 0x01E0 -+#define CMN_DIAG_PER_CAL_ADJ 0x01EC -+#define CMN_DIAG_CAL_CTRL 0x01ED -+#define CMN_DIAG_ACYA 0x01FF -+#define XCVR_PSM_RCTRL 0x4001 -+#define XCVR_PSM_CAL_TMR 0x4002 -+#define XCVR_PSM_A0IN_TMR 0x4003 -+#define TX_TXCC_CAL_SCLR_MULT_0 0x4047 -+#define TX_TXCC_CPOST_MULT_00_0 0x404C -+#define TX_TXCC_MGNFS_MULT_000_0 0x4050 -+#define XCVR_DIAG_PLLDRC_CTRL 0x40E0 -+#define XCVR_DIAG_PLLDRC_CTRL 0x40E0 -+#define XCVR_DIAG_HSCLK_SEL 0x40E1 -+#define XCVR_DIAG_BIDI_CTRL 0x40E8 -+#define XCVR_DIAG_LANE_FCM_EN_MGN_TMR 0x40F2 -+#define XCVR_DIAG_LANE_FCM_EN_MGN 0x40F2 -+#define TX_PSC_A0 0x4100 -+#define TX_PSC_A1 0x4101 -+#define TX_PSC_A2 0x4102 -+#define TX_PSC_A3 0x4103 -+#define TX_RCVDET_CTRL 0x4120 -+#define TX_RCVDET_EN_TMR 0x4122 -+#define TX_RCVDET_EN_TMR 0x4122 -+#define TX_RCVDET_ST_TMR 0x4123 -+#define TX_RCVDET_ST_TMR 0x4123 -+#define TX_BIST_CTRL 0x4140 -+#define TX_BIST_UDDWR 0x4141 -+#define TX_DIAG_TX_CTRL 0x41E0 -+#define TX_DIAG_TX_DRV 0x41E1 -+#define TX_DIAG_BGREF_PREDRV_DELAY 0x41E7 -+#define TX_DIAG_BGREF_PREDRV_DELAY 0x41E7 -+#define XCVR_PSM_RCTRL_1 0x4201 -+#define TX_TXCC_CAL_SCLR_MULT_1 0x4247 -+#define TX_TXCC_CPOST_MULT_00_1 0x424C -+#define TX_TXCC_MGNFS_MULT_000_1 0x4250 -+#define XCVR_DIAG_PLLDRC_CTRL_1 0x42E0 -+#define XCVR_DIAG_HSCLK_SEL_1 0x42E1 -+#define XCVR_DIAG_LANE_FCM_EN_MGN_TMR_1 0x42F2 -+#define TX_RCVDET_EN_TMR_1 0x4322 -+#define TX_RCVDET_ST_TMR_1 0x4323 -+#define TX_DIAG_ACYA_0 0x41FF -+#define TX_DIAG_ACYA_1 0x43FF -+#define TX_DIAG_ACYA_2 0x45FF -+#define TX_DIAG_ACYA_3 0x47FF -+#define TX_ANA_CTRL_REG_1 0x5020 -+#define TX_ANA_CTRL_REG_2 0x5021 -+#define TXDA_COEFF_CALC 0x5022 -+#define TX_DIG_CTRL_REG_1 0x5023 -+#define TX_DIG_CTRL_REG_2 0x5024 -+#define TXDA_CYA_AUXDA_CYA 0x5025 -+#define TX_ANA_CTRL_REG_3 0x5026 -+#define TX_ANA_CTRL_REG_4 0x5027 -+#define TX_ANA_CTRL_REG_5 0x5029 -+#define RX_PSC_A0 0x8000 -+#define RX_PSC_CAL 0x8006 -+#define PMA_LANE_CFG 0xC000 -+#define PIPE_CMN_CTRL1 0xC001 -+#define PIPE_CMN_CTRL2 0xC002 -+#define PIPE_COM_LOCK_CFG1 0xC003 -+#define PIPE_COM_LOCK_CFG2 0xC004 -+#define PIPE_RCV_DET_INH 0xC005 -+#define PHY_HDP_MODE_CTRL 0xC008 -+#define PHY_HDP_CLK_CTL 0xC009 -+#define STS 0xC00F -+#define PHY_ISO_CMN_CTRL 0xC010 -+#define PHY_ISO_CMN_CTRL 0xC010 -+#define PHY_HDP_TX_CTL_L0 0xC408 -+#define PHY_DP_TX_CTL 0xC408 -+#define PHY_HDP_TX_CTL_L1 0xC448 -+#define PHY_HDP_TX_CTL_L2 0xC488 -+#define PHY_HDP_TX_CTL_L3 0xC4C8 -+#define PHY_PMA_CMN_CTRL1 0xC800 -+#define PMA_CMN_CTRL1 0xC800 -+#define PHY_PMA_ISO_CMN_CTRL 0xC810 -+#define PHY_PMA_ISO_PLL_CTRL1 0xC812 -+#define PHY_PMA_ISOLATION_CTRL 0xC81F -+#define PHY_ISOLATION_CTRL 0xC81F -+#define PHY_PMA_ISO_XCVR_CTRL 0xCC11 -+#define PHY_PMA_ISO_LINK_MODE 0xCC12 -+#define PHY_PMA_ISO_PWRST_CTRL 0xCC13 -+#define PHY_PMA_ISO_TX_DATA_LO 0xCC14 -+#define PHY_PMA_ISO_TX_DATA_HI 0xCC15 -+#define PHY_PMA_ISO_RX_DATA_LO 0xCC16 -+#define PHY_PMA_ISO_RX_DATA_HI 0xCC17 -+ -+int cdns_dp_phy_set_imx8mq(struct cdns_mhdp_device *hdp); -+int cdns_dp_phy_set_imx8qm(struct cdns_mhdp_device *hdp); -+bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *hdp); -+bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *hdp); -+int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *hdp); -+int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *hdp); -+#endif /* _CDNS_MHDP_PHY_H */ --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0031-LF-1514-drm-cdns-mhdp-check-link-rate-index.patch b/projects/NXP/devices/iMX8/patches/linux/0031-LF-1514-drm-cdns-mhdp-check-link-rate-index.patch deleted file mode 100644 index 180ec68d82..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0031-LF-1514-drm-cdns-mhdp-check-link-rate-index.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 8aa7d7baa5eb142261ddafc91b0ba884aa670421 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Jun 2020 16:17:55 +0800 -Subject: [PATCH 31/49] LF-1514: drm: cdns-mhdp: check link rate index - -Check link rate index to advoid negative array index read. -report by Coverity ID:6652950 6652949. - -Signed-off-by: Sandor Yu -Reviewed-by: Fancy Fang ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -index a6d03c94d196..5c75e7d40cc0 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -@@ -198,6 +198,10 @@ static void dp_phy_pma_cmn_pll0_24mhz(struct cdns_mhdp_device *mhdp) - - /* DP PHY PLL 24MHz configuration */ - index = link_rate_index(link_rate); -+ if (index < 0) { -+ dev_err(mhdp->dev, "wrong link rate index\n"); -+ return; -+ } - for (i = 0; i < ARRAY_SIZE(phy_pll_24m_cfg); i++) - cdns_phy_reg_write(mhdp, phy_pll_24m_cfg[i].addr, phy_pll_24m_cfg[i].val[index]); - -@@ -320,6 +324,10 @@ static void dp_phy_pma_cmn_pll0_27mhz(struct cdns_mhdp_device *mhdp) - - /* DP PHY PLL 27MHz configuration */ - index = link_rate_index(link_rate); -+ if (index < 0) { -+ dev_err(mhdp->dev, "wrong link rate index\n"); -+ return; -+ } - for (i = 0; i < ARRAY_SIZE(phy_pll_27m_cfg); i++) - cdns_phy_reg_write(mhdp, phy_pll_27m_cfg[i].addr, phy_pll_27m_cfg[i].val[index]); - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0032-LF-1516-drm-cdns-mhdp-fix-error-check-variable-name-.patch b/projects/NXP/devices/iMX8/patches/linux/0032-LF-1516-drm-cdns-mhdp-fix-error-check-variable-name-.patch deleted file mode 100644 index f42d867842..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0032-LF-1516-drm-cdns-mhdp-fix-error-check-variable-name-.patch +++ /dev/null @@ -1,31 +0,0 @@ -From b2ea44969c5e51a5809622384728859d7f3a2b8a Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 19 Jun 2020 16:25:51 +0800 -Subject: [PATCH 32/49] LF-1516: drm: cdns-mhdp: fix error check variable name - for clk_pxl_link - -fix error check variable name for clk_pxl_link. -Report by Coverity ID:6652947 - -Signed-off-by: Sandor Yu -Reviewed-by: Fancy Fang ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -index a3ba3da4b05d..2ee4e8748b77 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -@@ -167,7 +167,7 @@ int imx8qm_clocks_init(struct imx_mhdp_device *imx_mhdp) - } - - clks->clk_pxl_link = devm_clk_get(dev, "clk_pxl_link"); -- if (IS_ERR(clks->clk_pxl_mux)) { -+ if (IS_ERR(clks->clk_pxl_link)) { - dev_warn(dev, "failed to get pxl link clk\n"); - return PTR_ERR(clks->clk_pxl_link); - } --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0033-MLK-24601-drm-imx-mhdp-DP-PHY-support-1-2-lanes-mode.patch b/projects/NXP/devices/iMX8/patches/linux/0033-MLK-24601-drm-imx-mhdp-DP-PHY-support-1-2-lanes-mode.patch deleted file mode 100644 index f3076760c9..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0033-MLK-24601-drm-imx-mhdp-DP-PHY-support-1-2-lanes-mode.patch +++ /dev/null @@ -1,58 +0,0 @@ -From c789945d09e4c77eb30af1a8db1425cefab52080 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Fri, 28 Aug 2020 10:09:12 +0800 -Subject: [PATCH 33/49] MLK-24601: drm: imx: mhdp: DP PHY support 1/2 lanes - mode - -All four lanes should be configurated for 1/2/4 lanes modes in driver. -The DP FW will power down unused PHY lanes after negotiation. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -index 5c75e7d40cc0..3d17840b0941 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-dp-phy.c -@@ -137,7 +137,7 @@ static void dp_aux_cfg(struct cdns_mhdp_device *mhdp) - static void dp_phy_pma_cmn_cfg_24mhz(struct cdns_mhdp_device *mhdp) - { - int k; -- u32 num_lanes = mhdp->dp.num_lanes; -+ u32 num_lanes = 4; - u16 val; - - val = cdns_phy_reg_read(mhdp, PHY_PMA_CMN_CTRL1); -@@ -157,7 +157,7 @@ static void dp_phy_pma_cmn_cfg_24mhz(struct cdns_mhdp_device *mhdp) - /* Valid for 24 MHz only */ - static void dp_phy_pma_cmn_pll0_24mhz(struct cdns_mhdp_device *mhdp) - { -- u32 num_lanes = mhdp->dp.num_lanes; -+ u32 num_lanes = 4; - u32 link_rate = mhdp->dp.rate; - u16 val; - int index, i, k; -@@ -228,7 +228,7 @@ static void dp_phy_pma_cmn_pll0_24mhz(struct cdns_mhdp_device *mhdp) - /* PMA common configuration for 27MHz */ - static void dp_phy_pma_cmn_cfg_27mhz(struct cdns_mhdp_device *mhdp) - { -- u32 num_lanes = mhdp->dp.num_lanes; -+ u32 num_lanes = 4; - u16 val; - int k; - -@@ -279,7 +279,7 @@ static void dp_phy_pma_cmn_cfg_27mhz(struct cdns_mhdp_device *mhdp) - - static void dp_phy_pma_cmn_pll0_27mhz(struct cdns_mhdp_device *mhdp) - { -- u32 num_lanes = mhdp->dp.num_lanes; -+ u32 num_lanes = 4; - u32 link_rate = mhdp->dp.rate; - u16 val; - int index, i, k; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0034-MLK-24519-2-gpu-imx-Increase-maximum-single-pipe-wid.patch b/projects/NXP/devices/iMX8/patches/linux/0034-MLK-24519-2-gpu-imx-Increase-maximum-single-pipe-wid.patch deleted file mode 100644 index 799824c90b..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0034-MLK-24519-2-gpu-imx-Increase-maximum-single-pipe-wid.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 7772a57acd0e05353caead7eb7d064e36bcb92e6 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Sun, 20 Sep 2020 19:32:28 +0800 -Subject: [PATCH 34/49] MLK-24519-2 gpu: imx: Increase maximum single pipe - width to 2560 - -This patch increase the DPU single pipe maximum from 1920 to 2560 for HDMI/DP. - -Signed-off-by: Oliver F. Brown -Reviewed-by: Liu Ying ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -index 2ee4e8748b77..cda4d245bab8 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -@@ -22,7 +22,7 @@ - #define PLL_800MHZ (800000000) - - #define HDP_DUAL_MODE_MIN_PCLK_RATE 300000 /* KHz */ --#define HDP_SINGLE_MODE_MAX_WIDTH 1920 -+#define HDP_SINGLE_MODE_MAX_WIDTH 2560 - - #define CSR_PIXEL_LINK_MUX_CTL 0x00 - #define CSR_PIXEL_LINK_MUX_VCP_OFFSET 5 --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0035-MLK-24072-drm-imx8-correct-mhdp-files-copyright.patch b/projects/NXP/devices/iMX8/patches/linux/0035-MLK-24072-drm-imx8-correct-mhdp-files-copyright.patch deleted file mode 100644 index 987690f888..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0035-MLK-24072-drm-imx8-correct-mhdp-files-copyright.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 60077991d60b1ba96e52d5a6568ae65ae7143ee2 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 20 May 2020 10:56:53 +0800 -Subject: [PATCH 35/49] MLK-24072: drm: imx8: correct mhdp files copyright - -Correct mhdp files copyright. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 2 +- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -index cda4d245bab8..38f9defa42f8 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -@@ -1,5 +1,5 @@ - /* -- * copyright (c) 2019 nxp semiconductor, inc. -+ * Copyright (c) 2019 NXP semiconductor, inc. - * - * this program is free software; you can redistribute it and/or modify - * it under the terms of the gnu general public license version 2 as -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -index 3acbdf575ee2..cc429fe48abd 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -@@ -1,5 +1,5 @@ - /* -- * copyright (c) 2019 nxp semiconductor, inc. -+ * Copyright (c) 2019 NXP semiconductor, inc. - * - * this program is free software; you can redistribute it and/or modify - * it under the terms of the gnu general public license version 2 as --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0036-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch b/projects/NXP/devices/iMX8/patches/linux/0036-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch deleted file mode 100644 index 8586df89c8..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0036-LF-2744-drm-cdns-reset-force_mode_set-flag-in-atomic.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 93502b984119af556f8a204bf80a62bc1c21fbfd Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Tue, 17 Nov 2020 15:47:36 +0800 -Subject: [PATCH 36/49] LF-2744: drm: cdns: reset force_mode_set flag in - atomic_check - -Reset force_mode_set flag in atomic_check function -to avoid set mode_changed flag multi times when cable plugin. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -index cc429fe48abd..9fa0df74ad7c 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2019 NXP semiconductor, inc. -+ * Copyright (c) 2019-2020 NXP semiconductor, inc. - * - * this program is free software; you can redistribute it and/or modify - * it under the terms of the gnu general public license version 2 as -@@ -44,8 +44,11 @@ static int cdns_mhdp_imx_encoder_atomic_check(struct drm_encoder *encoder, - if (mhdp->plat_data->video_format != 0) - imx_crtc_state->bus_format = mhdp->plat_data->video_format; - -- if (mhdp->force_mode_set) -+ if (mhdp->force_mode_set) { - crtc_state->mode_changed = true; -+ /* reset force mode set flag */ -+ mhdp->force_mode_set = false; -+ } - - return 0; - } --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0037-MLK-25199-1-drm-mhdp-Add-hdmi-phy-reset-poweroff-fun.patch b/projects/NXP/devices/iMX8/patches/linux/0037-MLK-25199-1-drm-mhdp-Add-hdmi-phy-reset-poweroff-fun.patch deleted file mode 100644 index e70e44eb2e..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0037-MLK-25199-1-drm-mhdp-Add-hdmi-phy-reset-poweroff-fun.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 38f1f4ecd038628f4ce7a47114455123e5db3367 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Wed, 30 Dec 2020 16:02:52 +0800 -Subject: [PATCH 37/49] MLK-25199-1: drm: mhdp: Add hdmi phy reset/poweroff - function - -Add hdmi phy reset and power off function. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c | 28 ++++++++++++++++++- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h | 3 +- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 4 +-- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c | 2 ++ - drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h | 3 +- - 5 files changed, 35 insertions(+), 5 deletions(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -index 120300e6a2df..212f3f4f1e26 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -@@ -1,7 +1,7 @@ - /* - * Cadence High-Definition Multimedia Interface (HDMI) driver - * -- * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -21,6 +21,7 @@ - - #include - #include "cdns-mhdp-phy.h" -+#include "cdns-mhdp-imx.h" - - /* HDMI TX clock control settings */ - struct hdmi_ctrl { -@@ -746,6 +747,7 @@ int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) - DRM_ERROR("NO HDMI FW running\n"); - return -ENXIO; - } -+ imx8qm_phy_reset(0); - - /* Configure PHY */ - mhdp->hdmi.char_rate = hdmi_phy_cfg_ss28fdsoi(mhdp, mode); -@@ -753,6 +755,7 @@ int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) - DRM_ERROR("failed to set phy pclock\n"); - return -EINVAL; - } -+ imx8qm_phy_reset(1); - - ret = hdmi_phy_power_up(mhdp); - if (ret < 0) -@@ -762,3 +765,26 @@ int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp) - - return true; - } -+ -+int cdns_hdmi_phy_shutdown(struct cdns_mhdp_device *mhdp) -+{ -+ int timeout; -+ u32 reg_val; -+ -+ reg_val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ reg_val &= 0xfff0; -+ /* PHY_DP_MODE_CTL set to A3 power state*/ -+ cdns_phy_reg_write(mhdp, PHY_HDP_MODE_CTRL, reg_val | 0x8); -+ -+ /* PHY_DP_MODE_CTL */ -+ timeout = 0; -+ do { -+ reg_val = cdns_phy_reg_read(mhdp, PHY_HDP_MODE_CTRL); -+ DRM_INFO("Reg val is 0x%04x\n", reg_val); -+ timeout++; -+ msleep(100); -+ } while (!(reg_val & (0x8 << 4)) && (timeout < 10)); /* Wait for A3 acknowledge */ -+ -+ DRM_INFO("hdmi phy shutdown complete\n"); -+ return 0; -+} -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h -index fc3247dada2d..a12005ae4c53 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx.h -@@ -1,7 +1,7 @@ - /* - * Cadence High-Definition Multimedia Interface (HDMI) driver - * -- * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -72,4 +72,5 @@ int cdns_mhdp_suspend_imx8qm(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp); - int cdns_mhdp_power_on_ls1028a(struct cdns_mhdp_device *mhdp); - void cdns_mhdp_pclk_rate_ls1028a(struct cdns_mhdp_device *mhdp); -+void imx8qm_phy_reset(u8 reset); - #endif /* CDNS_MHDP_IMX_H_ */ -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -index 38f9defa42f8..46c0500da4c3 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2019 NXP semiconductor, inc. -+ * Copyright (c) 2019-2021 NXP semiconductor, inc. - * - * this program is free software; you can redistribute it and/or modify - * it under the terms of the gnu general public license version 2 as -@@ -102,7 +102,7 @@ static void imx8qm_pixel_link_sync_disable(u32 dual_mode) - imx_sc_misc_set_control(handle, IMX_SC_R_DC_0, IMX_SC_C_SYNC_CTRL0, 0); - } - --static void imx8qm_phy_reset(u8 reset) -+void imx8qm_phy_reset(u8 reset) - { - struct imx_sc_ipc *handle; - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -index 9fa0df74ad7c..4c4ce9d3c847 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c -@@ -22,6 +22,7 @@ static void cdns_mhdp_imx_encoder_disable(struct drm_encoder *encoder) - struct drm_bridge *bridge = drm_bridge_chain_get_first_bridge(encoder); - struct cdns_mhdp_device *mhdp = bridge->driver_private; - -+ cdns_hdmi_phy_shutdown(mhdp); - cdns_mhdp_plat_call(mhdp, plat_init); - } - -@@ -184,6 +185,7 @@ static int cdns_mhdp_imx_bind(struct device *dev, struct device *master, - - imx_mhdp->mhdp.plat_data = plat_data; - imx_mhdp->mhdp.dev = dev; -+ imx_mhdp->mhdp.drm_dev = drm; - imx_mhdp->mhdp.bus_type = plat_data->bus_type; - ret = plat_data->bind(pdev, encoder, &imx_mhdp->mhdp); - /* -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h -index 5682b9fbc90f..9035f1f71eee 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-phy.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2019 NXP Semiconductor, Inc. -+ * Copyright (C) 2019-2021 NXP Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -152,4 +152,5 @@ bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *hdp); - bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *hdp); - int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *hdp); - int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *hdp); -+int cdns_hdmi_phy_shutdown(struct cdns_mhdp_device *mhdp); - #endif /* _CDNS_MHDP_PHY_H */ --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0038-MLK-25199-2-drm-mhdp-Fix-typo-for-hdmi-phy-configura.patch b/projects/NXP/devices/iMX8/patches/linux/0038-MLK-25199-2-drm-mhdp-Fix-typo-for-hdmi-phy-configura.patch deleted file mode 100644 index 9fc25f46f8..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0038-MLK-25199-2-drm-mhdp-Fix-typo-for-hdmi-phy-configura.patch +++ /dev/null @@ -1,38 +0,0 @@ -From d77cbee9949eda85baba634bdf6c6c2afe0b64e4 Mon Sep 17 00:00:00 2001 -From: Sandor Yu -Date: Thu, 31 Dec 2020 10:13:55 +0800 -Subject: [PATCH 38/49] MLK-25199-2: drm: mhdp: Fix typo for hdmi phy - configuration table - -Fix typo for imx8qm hdmi phy configuration table. - -Signed-off-by: Sandor Yu -Reviewed-by: Robby Cai ---- - drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -index 212f3f4f1e26..f96b200885df 100644 ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-hdmi-phy.c -@@ -95,11 +95,11 @@ static const struct hdmi_ctrl imx8qm_ctrl_table[] = { - { 85000, 170000, 1000, 850000, 1700000, 0x11, 0x00, 0x07, 340, 0x146, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, - {170000, 340000, 1000, 1700000, 3400000, 0x22, 0x01, 0x07, 340, 0x146, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, - {340000, 600000, 1000, 3400000, 6000000, 0x3C, 0x03, 0x06, 600, 0x24A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, --{ 25000, 34000, 1205, 312500, 425000, 0x04, 0x01, 0x01, 400, 0x182, 0x00A, 0, 0, 0, 2500000, 3400000, 0, 2, 2, 2, 4, 0x03, 31250, 42500}, --{ 34000, 68000, 1205, 425000, 850000, 0x06, 0x02, 0x01, 300, 0x11E, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 4, 0x02, 42500, 85000}, --{ 68000, 136000, 1205, 850000, 1700000, 0x0D, 0x02, 0x02, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, --{136000, 272000, 1205, 1700000, 3400000, 0x1A, 0x02, 0x04, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, --{272000, 480000, 1205, 3400000, 6000000, 0x30, 0x03, 0x05, 600, 0x24A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, -+{ 25000, 34000, 1250, 312500, 425000, 0x04, 0x01, 0x01, 400, 0x182, 0x00A, 0, 0, 0, 2500000, 3400000, 0, 2, 2, 2, 4, 0x03, 31250, 42500}, -+{ 34000, 68000, 1250, 425000, 850000, 0x06, 0x02, 0x01, 300, 0x11E, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 4, 0x02, 42500, 85000}, -+{ 68000, 136000, 1250, 850000, 1700000, 0x0D, 0x02, 0x02, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 2, 0x01, 85000, 170000}, -+{136000, 272000, 1250, 1700000, 3400000, 0x1A, 0x02, 0x04, 325, 0x137, 0x00A, 0, 0, 0, 1700000, 3400000, 0, 1, 1, 2, 1, 0x00, 170000, 340000}, -+{272000, 480000, 1250, 3400000, 6000000, 0x30, 0x03, 0x05, 600, 0x24A, 0x00A, 0, 0, 0, 3400000, 6000000, 1, 1, 1, 2, 1, 0x00, 340000, 600000}, - { 25000, 28000, 1500, 375000, 420000, 0x03, 0x01, 0x01, 360, 0x15A, 0x00A, 0, 0, 0, 3000000, 3360000, 0, 2, 2, 2, 4, 0x03, 37500, 42000}, - { 28000, 56000, 1500, 420000, 840000, 0x06, 0x02, 0x01, 360, 0x15A, 0x00A, 0, 0, 0, 1680000, 3360000, 0, 1, 1, 2, 4, 0x02, 42000, 84000}, - { 56000, 113000, 1500, 840000, 1695000, 0x0B, 0x00, 0x05, 330, 0x13C, 0x00A, 0, 0, 0, 1680000, 3390000, 0, 1, 1, 2, 2, 0x01, 84000, 169500}, --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0040-drm-imx-dcss-use-the-external-27MHz-phy-clock.patch b/projects/NXP/devices/iMX8/patches/linux/0040-drm-imx-dcss-use-the-external-27MHz-phy-clock.patch deleted file mode 100644 index 2bd14ddf27..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0040-drm-imx-dcss-use-the-external-27MHz-phy-clock.patch +++ /dev/null @@ -1,108 +0,0 @@ -From c2af9b24bfa69ffb12e72153f89ed3bb3245fafb Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Fri, 22 Nov 2019 10:00:56 +0200 -Subject: [PATCH 40/49] drm/imx/dcss: use the external 27MHz phy clock - -The 27MHz external oscillator offers a high precision low jitter clock and -is suitable for high pixel clocks modes(ie 4K@60). - -Signed-off-by: Laurentiu Palcu ---- - drivers/gpu/drm/imx/dcss/dcss-dev.c | 25 +++++++++++++++++++------ - drivers/gpu/drm/imx/dcss/dcss-dtg.c | 11 +++++++++++ - 2 files changed, 30 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/imx/dcss/dcss-dev.c b/drivers/gpu/drm/imx/dcss/dcss-dev.c -index c849533ca83e..1977f6b058f8 100644 ---- a/drivers/gpu/drm/imx/dcss/dcss-dev.c -+++ b/drivers/gpu/drm/imx/dcss/dcss-dev.c -@@ -17,6 +17,11 @@ - - static void dcss_clocks_enable(struct dcss_dev *dcss) - { -+ if (dcss->hdmi_output) { -+ clk_prepare_enable(dcss->pll_phy_ref_clk); -+ clk_prepare_enable(dcss->pll_src_clk); -+ } -+ - clk_prepare_enable(dcss->axi_clk); - clk_prepare_enable(dcss->apb_clk); - clk_prepare_enable(dcss->rtrm_clk); -@@ -31,6 +36,11 @@ static void dcss_clocks_disable(struct dcss_dev *dcss) - clk_disable_unprepare(dcss->rtrm_clk); - clk_disable_unprepare(dcss->apb_clk); - clk_disable_unprepare(dcss->axi_clk); -+ -+ if (dcss->hdmi_output) { -+ clk_disable_unprepare(dcss->pll_src_clk); -+ clk_disable_unprepare(dcss->pll_phy_ref_clk); -+ } - } - - static void dcss_disable_dtg_and_ss_cb(void *data) -@@ -133,17 +143,20 @@ static int dcss_clks_init(struct dcss_dev *dcss) - struct { - const char *id; - struct clk **clk; -+ bool required; - } clks[] = { -- {"apb", &dcss->apb_clk}, -- {"axi", &dcss->axi_clk}, -- {"pix", &dcss->pix_clk}, -- {"rtrm", &dcss->rtrm_clk}, -- {"dtrc", &dcss->dtrc_clk}, -+ {"apb", &dcss->apb_clk, true}, -+ {"axi", &dcss->axi_clk, true}, -+ {"pix", &dcss->pix_clk, true}, -+ {"rtrm", &dcss->rtrm_clk, true}, -+ {"dtrc", &dcss->dtrc_clk, true}, -+ {"pll_src", &dcss->pll_src_clk, dcss->hdmi_output}, -+ {"pll_phy_ref", &dcss->pll_phy_ref_clk, dcss->hdmi_output}, - }; - - for (i = 0; i < ARRAY_SIZE(clks); i++) { - *clks[i].clk = devm_clk_get(dcss->dev, clks[i].id); -- if (IS_ERR(*clks[i].clk)) { -+ if (IS_ERR(*clks[i].clk) && clks[i].required) { - dev_err(dcss->dev, "failed to get %s clock\n", - clks[i].id); - return PTR_ERR(*clks[i].clk); -diff --git a/drivers/gpu/drm/imx/dcss/dcss-dtg.c b/drivers/gpu/drm/imx/dcss/dcss-dtg.c -index 30de00540f63..b70785d69ad9 100644 ---- a/drivers/gpu/drm/imx/dcss/dcss-dtg.c -+++ b/drivers/gpu/drm/imx/dcss/dcss-dtg.c -@@ -83,6 +83,7 @@ struct dcss_dtg { - u32 ctx_id; - - bool in_use; -+ bool hdmi_output; - - u32 dis_ulc_x; - u32 dis_ulc_y; -@@ -159,6 +160,7 @@ int dcss_dtg_init(struct dcss_dev *dcss, unsigned long dtg_base) - dcss->dtg = dtg; - dtg->dev = dcss->dev; - dtg->ctxld = dcss->ctxld; -+ dtg->hdmi_output = dcss->hdmi_output; - - dtg->base_reg = ioremap(dtg_base, SZ_4K); - if (!dtg->base_reg) { -@@ -221,6 +223,15 @@ void dcss_dtg_sync_set(struct dcss_dtg *dtg, struct videomode *vm) - vm->vactive - 1; - - clk_disable_unprepare(dcss->pix_clk); -+ if (dcss->hdmi_output) { -+ int err; -+ -+ clk_disable_unprepare(dcss->pll_src_clk); -+ err = clk_set_parent(dcss->pll_src_clk, dcss->pll_phy_ref_clk); -+ if (err < 0) -+ dev_warn(dcss->dev, "clk_set_parent() returned %d", err); -+ clk_prepare_enable(dcss->pll_src_clk); -+ } - clk_set_rate(dcss->pix_clk, vm->pixelclock); - clk_prepare_enable(dcss->pix_clk); - --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0041-drm-imx-dcss-add-component-framework-functionality.patch b/projects/NXP/devices/iMX8/patches/linux/0041-drm-imx-dcss-add-component-framework-functionality.patch deleted file mode 100644 index a1e33406f2..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0041-drm-imx-dcss-add-component-framework-functionality.patch +++ /dev/null @@ -1,230 +0,0 @@ -From ec59d2988d1ac50acea0fdaa63513f216ddf016d Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Thu, 9 Jul 2020 19:47:31 +0300 -Subject: [PATCH 41/49] drm/imx/dcss: add component framework functionality - -Component framework is needed by HDP driver. - -Signed-off-by: Laurentiu Palcu ---- - drivers/gpu/drm/imx/dcss/dcss-drv.c | 89 ++++++++++++++++++++++------- - drivers/gpu/drm/imx/dcss/dcss-kms.c | 23 +++++--- - drivers/gpu/drm/imx/dcss/dcss-kms.h | 4 +- - 3 files changed, 85 insertions(+), 31 deletions(-) - -diff --git a/drivers/gpu/drm/imx/dcss/dcss-drv.c b/drivers/gpu/drm/imx/dcss/dcss-drv.c -index 8dc2f85c514b..09d0ac28e28a 100644 ---- a/drivers/gpu/drm/imx/dcss/dcss-drv.c -+++ b/drivers/gpu/drm/imx/dcss/dcss-drv.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - - #include "dcss-dev.h" -@@ -14,6 +15,8 @@ - struct dcss_drv { - struct dcss_dev *dcss; - struct dcss_kms_dev *kms; -+ -+ bool is_componentized; - }; - - struct dcss_dev *dcss_drv_dev_to_dcss(struct device *dev) -@@ -30,30 +33,18 @@ struct drm_device *dcss_drv_dev_to_drm(struct device *dev) - return mdrv ? &mdrv->kms->base : NULL; - } - --static int dcss_drv_platform_probe(struct platform_device *pdev) -+static int dcss_drv_init(struct device *dev, bool componentized) - { -- struct device *dev = &pdev->dev; -- struct device_node *remote; - struct dcss_drv *mdrv; - int err = 0; -- bool hdmi_output = true; -- -- if (!dev->of_node) -- return -ENODEV; -- -- remote = of_graph_get_remote_node(dev->of_node, 0, 0); -- if (!remote) -- return -ENODEV; -- -- hdmi_output = !of_device_is_compatible(remote, "fsl,imx8mq-nwl-dsi"); -- -- of_node_put(remote); - - mdrv = kzalloc(sizeof(*mdrv), GFP_KERNEL); - if (!mdrv) - return -ENOMEM; - -- mdrv->dcss = dcss_dev_create(dev, hdmi_output); -+ mdrv->is_componentized = componentized; -+ -+ mdrv->dcss = dcss_dev_create(dev, componentized); - if (IS_ERR(mdrv->dcss)) { - err = PTR_ERR(mdrv->dcss); - goto err; -@@ -61,7 +52,7 @@ static int dcss_drv_platform_probe(struct platform_device *pdev) - - dev_set_drvdata(dev, mdrv); - -- mdrv->kms = dcss_kms_attach(mdrv->dcss); -+ mdrv->kms = dcss_kms_attach(mdrv->dcss, componentized); - if (IS_ERR(mdrv->kms)) { - err = PTR_ERR(mdrv->kms); - goto dcss_shutoff; -@@ -79,14 +70,68 @@ static int dcss_drv_platform_probe(struct platform_device *pdev) - return err; - } - --static int dcss_drv_platform_remove(struct platform_device *pdev) -+static void dcss_drv_deinit(struct device *dev, bool componentized) - { -- struct dcss_drv *mdrv = dev_get_drvdata(&pdev->dev); -+ struct dcss_drv *mdrv = dev_get_drvdata(dev); - -- dcss_kms_detach(mdrv->kms); -+ dcss_kms_detach(mdrv->kms, componentized); - dcss_dev_destroy(mdrv->dcss); - - kfree(mdrv); -+} -+ -+static int dcss_drv_bind(struct device *dev) -+{ -+ return dcss_drv_init(dev, true); -+} -+ -+static void dcss_drv_unbind(struct device *dev) -+{ -+ return dcss_drv_deinit(dev, true); -+} -+ -+static const struct component_master_ops dcss_master_ops = { -+ .bind = dcss_drv_bind, -+ .unbind = dcss_drv_unbind, -+}; -+ -+static int compare_of(struct device *dev, void *data) -+{ -+ return dev->of_node == data; -+} -+ -+static int dcss_drv_platform_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct component_match *match = NULL; -+ struct device_node *remote; -+ -+ if (!dev->of_node) -+ return -ENODEV; -+ -+ remote = of_graph_get_remote_node(dev->of_node, 0, 0); -+ if (!remote) -+ return -ENODEV; -+ -+ if (of_device_is_compatible(remote, "fsl,imx8mq-nwl-dsi")) { -+ of_node_put(remote); -+ return dcss_drv_init(dev, false); -+ } -+ -+ drm_of_component_match_add(dev, &match, compare_of, remote); -+ of_node_put(remote); -+ -+ return component_master_add_with_match(dev, &dcss_master_ops, match); -+} -+ -+static int dcss_drv_platform_remove(struct platform_device *pdev) -+{ -+ struct dcss_drv *mdrv = dev_get_drvdata(&pdev->dev); -+ -+ if (mdrv->is_componentized) -+ component_master_del(&pdev->dev, &dcss_master_ops); -+ else -+ dcss_drv_deinit(&pdev->dev, false); - - return 0; - } -diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.c b/drivers/gpu/drm/imx/dcss/dcss-kms.c -index 135a62366ab8..cafb09df6c75 100644 ---- a/drivers/gpu/drm/imx/dcss/dcss-kms.c -+++ b/drivers/gpu/drm/imx/dcss/dcss-kms.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - - #include "dcss-dev.h" - #include "dcss-kms.h" -@@ -123,7 +124,7 @@ static int dcss_kms_bridge_connector_init(struct dcss_kms_dev *kms) - return 0; - } - --struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) -+struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss, bool componentized) - { - struct dcss_kms_dev *kms; - struct drm_device *drm; -@@ -148,13 +149,16 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) - - goto cleanup_mode_config; - -- ret = dcss_kms_bridge_connector_init(kms); -+ ret = dcss_crtc_init(crtc, drm); - if (ret) - goto cleanup_mode_config; - -- ret = dcss_crtc_init(crtc, drm); -+ if (componentized) -+ ret = component_bind_all(dcss->dev, kms); -+ else -+ ret = dcss_kms_bridge_connector_init(kms); - if (ret) -- goto cleanup_mode_config; -+ goto cleanup_crtc; - - drm_mode_config_reset(drm); - -@@ -182,9 +188,10 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) - return ERR_PTR(ret); - } - --void dcss_kms_detach(struct dcss_kms_dev *kms) -+void dcss_kms_detach(struct dcss_kms_dev *kms, bool componentized) - { - struct drm_device *drm = &kms->base; -+ struct dcss_dev *dcss = drm->dev_private; - - drm_dev_unregister(drm); - drm_bridge_connector_disable_hpd(kms->connector); -@@ -194,5 +201,7 @@ void dcss_kms_detach(struct dcss_kms_dev *kms) - drm->irq_enabled = false; - drm_mode_config_cleanup(drm); - dcss_crtc_deinit(&kms->crtc, drm); -+ if (componentized) -+ component_unbind_all(dcss->dev, drm); - drm->dev_private = NULL; - } -diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.h b/drivers/gpu/drm/imx/dcss/dcss-kms.h -index dfe5dd99eea3..e98d9c587a43 100644 ---- a/drivers/gpu/drm/imx/dcss/dcss-kms.h -+++ b/drivers/gpu/drm/imx/dcss/dcss-kms.h -@@ -32,8 +32,8 @@ struct dcss_kms_dev { - struct drm_connector *connector; - }; - --struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss); --void dcss_kms_detach(struct dcss_kms_dev *kms); -+struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss, bool componentized); -+void dcss_kms_detach(struct dcss_kms_dev *kms, bool componentized); - int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm); - void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm); - struct dcss_plane *dcss_plane_init(struct drm_device *drm, --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0043-arm64-dts-imx8mq-add-DCSS-node.patch b/projects/NXP/devices/iMX8/patches/linux/0043-arm64-dts-imx8mq-add-DCSS-node.patch deleted file mode 100644 index 889d2bfe7a..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0043-arm64-dts-imx8mq-add-DCSS-node.patch +++ /dev/null @@ -1,49 +0,0 @@ -From bd9c83ea41380f584fdd8f2781112b530c84ebba Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Thu, 9 Jul 2020 19:47:33 +0300 -Subject: [PATCH 43/49] arm64: dts: imx8mq: add DCSS node - -This patch adds the node for iMX8MQ Display Controller Subsystem. - -Signed-off-by: Laurentiu Palcu ---- - arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -index 5e0e7d0f1bc4..5a617f9ed8b5 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi -+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -@@ -1103,6 +1103,29 @@ bus@32c00000 { /* AIPS4 */ - #size-cells = <1>; - ranges = <0x32c00000 0x32c00000 0x400000>; - -+ dcss: display-controller@32e00000 { -+ compatible = "nxp,imx8mq-dcss"; -+ reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; -+ interrupts = <6>, <8>, <9>; -+ interrupt-names = "ctxld", "ctxld_kick", "vblank"; -+ interrupt-parent = <&irqsteer>; -+ clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, -+ <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, -+ <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, -+ <&clk IMX8MQ_VIDEO2_PLL_OUT>, -+ <&clk IMX8MQ_CLK_DISP_DTRC>; -+ clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; -+ assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, -+ <&clk IMX8MQ_CLK_DISP_RTRM>, -+ <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; -+ assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, -+ <&clk IMX8MQ_SYS1_PLL_800M>, -+ <&clk IMX8MQ_CLK_27M>; -+ assigned-clock-rates = <800000000>, -+ <400000000>; -+ status = "disabled"; -+ }; -+ - irqsteer: interrupt-controller@32e2d000 { - compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; - reg = <0x32e2d000 0x1000>; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0044-arm64-dts-imx8mq-add-DCSS-external-oscillator-suppor.patch b/projects/NXP/devices/iMX8/patches/linux/0044-arm64-dts-imx8mq-add-DCSS-external-oscillator-suppor.patch deleted file mode 100644 index af0fe275a3..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0044-arm64-dts-imx8mq-add-DCSS-external-oscillator-suppor.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 8e5a885158f430de3ea36b1439dd8c0058ce95df Mon Sep 17 00:00:00 2001 -From: Laurentiu Palcu -Date: Fri, 22 Nov 2019 10:12:50 +0200 -Subject: [PATCH 44/49] arm64: dts: imx8mq: add DCSS external oscillator - support - -The external oscillator, which is high precision, will be used when DCSS output -goes to HDMI. - -Signed-off-by: Laurentiu Palcu ---- - arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -index 5a617f9ed8b5..b75252a65c44 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi -+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -@@ -1113,8 +1113,11 @@ dcss: display-controller@32e00000 { - <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, - <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, - <&clk IMX8MQ_VIDEO2_PLL_OUT>, -- <&clk IMX8MQ_CLK_DISP_DTRC>; -- clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; -+ <&clk IMX8MQ_CLK_DISP_DTRC>, -+ <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>, -+ <&clk IMX8MQ_CLK_PHY_27MHZ>; -+ clock-names = "apb", "axi", "rtrm", "pix", "dtrc", "pll_src", -+ "pll_phy_ref"; - assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, - <&clk IMX8MQ_CLK_DISP_RTRM>, - <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0045-arm64-dts-fsl-imx8mq-add-HDP-bridge-node.patch b/projects/NXP/devices/iMX8/patches/linux/0045-arm64-dts-fsl-imx8mq-add-HDP-bridge-node.patch deleted file mode 100644 index 7eab52d86c..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0045-arm64-dts-fsl-imx8mq-add-HDP-bridge-node.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 0327e9fc14269069711cd2d45d60130b318532fe Mon Sep 17 00:00:00 2001 -From: Lucas Stach -Date: Tue, 13 Feb 2018 12:30:58 +0100 -Subject: [PATCH 45/49] arm64: dts: fsl: imx8mq: add HDP bridge node - -Signed-off-by: Lucas Stach ---- - arch/arm64/boot/dts/freescale/imx8mq.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -index b75252a65c44..aad21d6f1da7 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi -+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi -@@ -1103,6 +1103,16 @@ bus@32c00000 { /* AIPS4 */ - #size-cells = <1>; - ranges = <0x32c00000 0x32c00000 0x400000>; - -+ hdmi: hdmi@32c00000 { -+ reg = <0x32c00000 0x33800>, /* HDP registers */ -+ <0x32e40000 0x40000>, /* HDP SEC register */ -+ <0x32e2f000 0x10>; /* RESET register */ -+ interrupts = , -+ ; -+ interrupt-names = "plug_in", "plug_out"; -+ status = "disabled"; -+ }; -+ - dcss: display-controller@32e00000 { - compatible = "nxp,imx8mq-dcss"; - reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0046-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch b/projects/NXP/devices/iMX8/patches/linux/0046-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch deleted file mode 100644 index 48d5c6da67..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0046-arm64-dts-fsl-imx8mq-evk-enable-DCSS-and-HDMI.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 96ab278661207096c013ad1b39ed36f5f9a35ffd Mon Sep 17 00:00:00 2001 -From: Lucas Stach -Date: Tue, 13 Feb 2018 12:47:09 +0100 -Subject: [PATCH 46/49] arm64: dts: fsl: imx8mq-evk: enable DCSS and HDMI - -Signed-off-by: Lucas Stach ---- - arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 22 ++++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts -index 2418cca00bc5..71eeda6de3d7 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts -@@ -132,6 +132,16 @@ opp-800M { - }; - }; - -+&dcss { -+ status = "okay"; -+ -+ port { -+ dcss_out: endpoint { -+ remote-endpoint = <&hdmi_in>; -+ }; -+ }; -+}; -+ - &dphy { - status = "okay"; - }; -@@ -168,6 +178,18 @@ wl-reg-on-hog { - }; - }; - -+&hdmi { -+ compatible = "cdn,imx8mq-hdmi"; -+ lane-mapping = <0xe4>; -+ status = "okay"; -+ -+ port { -+ hdmi_in: endpoint { -+ remote-endpoint = <&dcss_out>; -+ }; -+ }; -+}; -+ - &i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0047-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch b/projects/NXP/devices/iMX8/patches/linux/0047-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch deleted file mode 100644 index d9a5d06075..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0047-arm64-dts-fsl-imx8mq-pico-pi-enable-DCSS-and-HDMI.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 5a139d07d03076be7972db4b022558dffcfd685b Mon Sep 17 00:00:00 2001 -From: Lukas Rusak -Date: Tue, 9 Mar 2021 10:47:27 -0800 -Subject: [PATCH 47/49] arm64: dts: fsl: imx8mq-pico-pi: enable DCSS and HDMI - ---- - .../boot/dts/freescale/imx8mq-pico-pi.dts | 22 +++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts -index 89cbec5c41b2..03734145c50e 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts -@@ -37,6 +37,16 @@ reg_usb_otg_vbus: regulator-usb-otg-vbus { - }; - }; - -+&dcss { -+ status = "okay"; -+ -+ port { -+ dcss_out: endpoint { -+ remote-endpoint = <&hdmi_in>; -+ }; -+ }; -+}; -+ - &fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1 &pinctrl_enet_3v3>; -@@ -56,6 +66,18 @@ ethphy0: ethernet-phy@1 { - }; - }; - -+&hdmi { -+ compatible = "cdn,imx8mq-hdmi"; -+ lane-mapping = <0xe4>; -+ status = "okay"; -+ -+ port { -+ hdmi_in: endpoint { -+ remote-endpoint = <&dcss_out>; -+ }; -+ }; -+}; -+ - &i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0048-drm-imx-mhdp-don-t-depend-on-DRM_IMX.patch b/projects/NXP/devices/iMX8/patches/linux/0048-drm-imx-mhdp-don-t-depend-on-DRM_IMX.patch deleted file mode 100644 index c49bd36ee2..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0048-drm-imx-mhdp-don-t-depend-on-DRM_IMX.patch +++ /dev/null @@ -1,23 +0,0 @@ -From f94717816b9a39869219ede859fe74af3f2ecd19 Mon Sep 17 00:00:00 2001 -From: Lukas Rusak -Date: Wed, 24 Mar 2021 14:27:43 -0700 -Subject: [PATCH 48/49] drm: imx: mhdp: don't depend on DRM_IMX - ---- - drivers/gpu/drm/imx/mhdp/Kconfig | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/drivers/gpu/drm/imx/mhdp/Kconfig b/drivers/gpu/drm/imx/mhdp/Kconfig -index 86950badb947..cf7dfacdd434 100644 ---- a/drivers/gpu/drm/imx/mhdp/Kconfig -+++ b/drivers/gpu/drm/imx/mhdp/Kconfig -@@ -6,6 +6,5 @@ config DRM_IMX_CDNS_MHDP - select DRM_CDNS_DP - select DRM_CDNS_HDMI - select DRM_CDNS_AUDIO -- depends on DRM_IMX - help - Choose this if you want to use HDMI on i.MX8. --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0049-drm-cadence-shutup-cec-logging.patch b/projects/NXP/devices/iMX8/patches/linux/0049-drm-cadence-shutup-cec-logging.patch deleted file mode 100644 index 5589e19370..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0049-drm-cadence-shutup-cec-logging.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 3111faf58971c2c517457e62f84d138a3d62464e Mon Sep 17 00:00:00 2001 -From: Lukas Rusak -Date: Wed, 24 Mar 2021 15:14:57 -0700 -Subject: [PATCH 49/49] drm: cadence: shutup cec logging - ---- - drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -index 25cf9e91e64f..e91de13eae58 100644 ---- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp-cec.c -@@ -171,8 +171,8 @@ static u32 mhdp_cec_write_message(struct cdns_mhdp_cec *cec, struct cec_msg *msg - return -EINVAL; - } - -- for (i = 0; i < msg->len; ++i) -- printk("msg[%d]=0x%x\n",i, msg->msg[i]); -+ // for (i = 0; i < msg->len; ++i) -+ // printk("msg[%d]=0x%x\n",i, msg->msg[i]); - - /* Write Message to register */ - for (i = 0; i < msg->len; ++i) { --- -2.29.2 - diff --git a/projects/NXP/devices/iMX8/patches/linux/0050-drm-display-drm-hdmi-helper-h.patch b/projects/NXP/devices/iMX8/patches/linux/0050-drm-display-drm-hdmi-helper-h.patch deleted file mode 100644 index 9d4a322234..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0050-drm-display-drm-hdmi-helper-h.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c 2022-06-28 15:48:27.254022595 +0000 -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c 2022-06-28 15:46:14.919939083 +0000 -@@ -14,6 +14,8 @@ - #include - #include - #include -+#include -+#include - #include - #include - #include ---- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c 2022-06-28 15:53:59.618466556 +0000 -+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-hdcp.c 2022-06-28 15:56:01.987635836 +0000 -@@ -11,6 +11,7 @@ - */ - #include - #include -+#include - #include - #include - diff --git a/projects/NXP/devices/iMX8/patches/linux/0060-mhdp-dp-hdmi-add-missing-include-patch-for-6-3.patch b/projects/NXP/devices/iMX8/patches/linux/0060-mhdp-dp-hdmi-add-missing-include-patch-for-6-3.patch deleted file mode 100644 index 081fc3affa..0000000000 --- a/projects/NXP/devices/iMX8/patches/linux/0060-mhdp-dp-hdmi-add-missing-include-patch-for-6-3.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c 2023-04-24 10:04:54.095068512 +0000 -+++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imxdrv.c 2023-04-25 13:35:44.405261313 +0000 -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - - #include - diff --git a/projects/Qualcomm/devices/Dragonboard/linux/linux.aarch64.conf b/projects/Qualcomm/devices/Dragonboard/linux/linux.aarch64.conf index bcb6bff210..2b915a1f76 100644 --- a/projects/Qualcomm/devices/Dragonboard/linux/linux.aarch64.conf +++ b/projects/Qualcomm/devices/Dragonboard/linux/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.66 Kernel Configuration +# Linux/arm64 6.15.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -64,6 +68,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -116,7 +121,7 @@ CONFIG_PREEMPTION=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -136,6 +141,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -161,24 +167,29 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -219,16 +230,15 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -240,14 +250,14 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_SELFTEST is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # @@ -263,7 +273,6 @@ CONFIG_PROFILING=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y # CONFIG_KEXEC_FILE is not set @@ -272,10 +281,10 @@ CONFIG_KEXEC=y # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -302,12 +311,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -320,6 +331,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # CONFIG_ARCH_NXP is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set CONFIG_ARCH_QCOM=y # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -384,11 +396,13 @@ CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -398,6 +412,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -426,6 +441,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_TRANS_TABLE=y CONFIG_XEN_DOM0=y CONFIG_XEN=y @@ -489,6 +505,7 @@ CONFIG_AS_HAS_ARMV8_5=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y # CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # @@ -496,12 +513,28 @@ CONFIG_ARM64_AS_HAS_MTE=y # # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +CONFIG_ARM64_POE=y +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +CONFIG_ARM64_GCS=y +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -511,6 +544,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y CONFIG_CMDLINE="" CONFIG_EFI_STUB=y CONFIG_EFI=y +# CONFIG_COMPRESSED_INSTALL is not set CONFIG_DMI=y # end of Boot options @@ -580,10 +614,11 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ACPI_CPPC_CPUFREQ is not set CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_QCOM_CPUFREQ_HW=y +# CONFIG_ACPI_CPPC_CPUFREQ is not set # end of CPU Frequency scaling # end of CPU Power Management @@ -591,10 +626,11 @@ CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_GENERIC_GSI=y CONFIG_ACPI_CCA_REQUIRED=y +CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y # CONFIG_ACPI_FPDT is not set -# CONFIG_ACPI_EC_DEBUGFS is not set +# CONFIG_ACPI_EC is not set CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y @@ -613,7 +649,6 @@ CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_PCI_SLOT is not set CONFIG_ACPI_CONTAINER=y # CONFIG_ACPI_HED is not set -# CONFIG_ACPI_CUSTOM_METHOD is not set # CONFIG_ACPI_BGRT is not set CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y CONFIG_HAVE_ACPI_APEI=y @@ -627,15 +662,15 @@ CONFIG_ACPI_PPTT=y # CONFIG_ACPI_FFH is not set # CONFIG_PMIC_OPREGION is not set CONFIG_ACPI_PRMT=y -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_HAVE_KVM=y CONFIG_VIRTUALIZATION=y # CONFIG_KVM is not set CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options # +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -645,7 +680,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -663,6 +697,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -705,6 +740,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -712,13 +748,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -733,12 +773,17 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -752,10 +797,11 @@ CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -765,12 +811,10 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set @@ -779,10 +823,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -849,17 +892,18 @@ CONFIG_COREDUMP=y # CONFIG_SWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -867,15 +911,16 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -892,12 +937,18 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y # CONFIG_MEMORY_FAILURE is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 @@ -909,6 +960,8 @@ CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -921,9 +974,12 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y +CONFIG_ARCH_HAS_USER_SHADOW_STACK=y # # Data Access Monitoring @@ -938,6 +994,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -945,7 +1002,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -958,6 +1014,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -996,6 +1053,7 @@ CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y @@ -1101,13 +1159,14 @@ CONFIG_NF_TABLES=m # CONFIG_NFT_SYNPROXY is not set # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1189,7 +1248,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1243,6 +1319,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_TABLES_IPV4 is not set @@ -1272,11 +1349,13 @@ CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_TABLES_IPV6 is not set @@ -1309,8 +1388,8 @@ CONFIG_IP6_NF_TARGET_NPT=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_TABLES_BRIDGE is not set # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1468,6 +1547,7 @@ CONFIG_BT_QCA=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1488,6 +1568,7 @@ CONFIG_BT_HCIUART_BCSP=y # CONFIG_BT_MTKSDIO is not set CONFIG_BT_QCOMSMD=m # CONFIG_BT_VIRTIO is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1495,10 +1576,8 @@ CONFIG_BT_QCOMSMD=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1515,7 +1594,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1544,6 +1622,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1567,10 +1646,13 @@ CONFIG_PCI_QUIRKS=y # CONFIG_PCI_STUB is not set # CONFIG_PCI_PF_STUB is not set CONFIG_PCI_ATS=y +# CONFIG_PCI_DOE is not set CONFIG_PCI_ECAM=y CONFIG_PCI_IOV=y +# CONFIG_PCI_NPEM is not set # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set +# CONFIG_PCIE_TPH is not set CONFIG_PCI_LABEL=y CONFIG_PCI_DYNAMIC_OF_NODES=y CONFIG_VGA_ARB=y @@ -1586,7 +1668,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_PCI_FTPCI100 is not set CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y -# CONFIG_PCIE_MICROCHIP_HOST is not set CONFIG_PCI_XGENE=y CONFIG_PCI_XGENE_MSI=y # CONFIG_PCIE_XILINX is not set @@ -1595,19 +1676,21 @@ CONFIG_PCI_XGENE_MSI=y # Cadence-based PCIe controllers # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set -# CONFIG_PCI_J721E_HOST is not set # end of Cadence-based PCIe controllers # # DesignWare-based PCIe controllers # CONFIG_PCIE_DW=y +# CONFIG_PCIE_DW_DEBUGFS is not set CONFIG_PCIE_DW_HOST=y # CONFIG_PCIE_AL is not set +# CONFIG_PCIE_AMD_MDB is not set # CONFIG_PCI_MESON is not set CONFIG_PCI_HISI=y # CONFIG_PCIE_KIRIN is not set # CONFIG_PCIE_DW_PLAT_HOST is not set +CONFIG_PCIE_QCOM_COMMON=y CONFIG_PCIE_QCOM=y # end of DesignWare-based PCIe controllers @@ -1615,6 +1698,12 @@ CONFIG_PCIE_QCOM=y # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1629,6 +1718,8 @@ CONFIG_PCIE_QCOM=y # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +CONFIG_HAVE_PWRCTL=y +# CONFIG_PCI_PWRCTL_SLOT is not set # CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1636,6 +1727,7 @@ CONFIG_PCIE_QCOM=y # # Generic Driver Options # +CONFIG_AUXILIARY_BUS=y # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y @@ -1663,6 +1755,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1681,7 +1774,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_QCOM_EBI2 is not set # CONFIG_QCOM_SSC_BLOCK_BUS is not set @@ -1708,13 +1800,11 @@ CONFIG_VEXPRESS_CONFIG=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set CONFIG_DMIID=y # CONFIG_DMI_SYSFS is not set # CONFIG_ISCSI_IBFT is not set # CONFIG_FW_CFG_SYSFS is not set -CONFIG_QCOM_SCM=y -# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set # CONFIG_SYSFB_SIMPLEFB is not set # CONFIG_ARM_FFA_TRANSPORT is not set # CONFIG_GOOGLE_FIRMWARE is not set @@ -1741,6 +1831,17 @@ CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +CONFIG_QCOM_SCM=y +CONFIG_QCOM_TZMEM=y +CONFIG_QCOM_TZMEM_MODE_GENERIC=y +# CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE is not set +# CONFIG_QCOM_QSEECOM is not set +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1751,6 +1852,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1758,7 +1860,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1799,7 +1900,6 @@ CONFIG_MTD_CFI_I2=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1873,6 +1973,7 @@ CONFIG_PNPACPI=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set @@ -1901,6 +2002,7 @@ CONFIG_VIRTIO_BLK=y # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -1923,7 +2025,9 @@ CONFIG_SRAM=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -1931,22 +2035,14 @@ CONFIG_SRAM=y # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set -# CONFIG_EEPROM_93CX6 is not set +CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support # CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set # CONFIG_VMWARE_VMCI is not set @@ -1959,6 +2055,7 @@ CONFIG_SRAM=y # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -2186,6 +2283,7 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set # CONFIG_DM_AUDIT is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set @@ -2215,6 +2313,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -2223,6 +2322,7 @@ CONFIG_TUN=y CONFIG_VETH=m # CONFIG_VIRTIO_NET is not set CONFIG_NLMON=m +# CONFIG_NETKIT is not set # CONFIG_NET_VRF is not set # CONFIG_ARCNET is not set CONFIG_ETHERNET=y @@ -2291,7 +2391,6 @@ CONFIG_NET_VENDOR_DEC=y # CONFIG_NET_TULIP is not set CONFIG_NET_VENDOR_DLINK=y # CONFIG_DL2K is not set -# CONFIG_SUNDANCE is not set CONFIG_NET_VENDOR_EMULEX=y # CONFIG_BE2NET is not set # CONFIG_NET_VENDOR_ENGLEDER is not set @@ -2309,6 +2408,7 @@ CONFIG_HNS=y CONFIG_HNS_DSAF=y CONFIG_HNS_ENET=y # CONFIG_HNS3 is not set +# CONFIG_HIBMCGE is not set CONFIG_NET_VENDOR_HUAWEI=y # CONFIG_HINIC is not set CONFIG_NET_VENDOR_I825XX=y @@ -2325,6 +2425,7 @@ CONFIG_IGBVF=y # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set +# CONFIG_IDPF is not set # CONFIG_JME is not set # CONFIG_NET_VENDOR_ADI is not set # CONFIG_NET_VENDOR_LITEX is not set @@ -2336,12 +2437,14 @@ CONFIG_SKY2=y # CONFIG_OCTEONTX2_AF is not set # CONFIG_OCTEONTX2_PF is not set # CONFIG_OCTEON_EP is not set +# CONFIG_OCTEON_EP_VF is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLX4_EN is not set # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set # CONFIG_MLXBF_GIGE is not set +# CONFIG_NET_VENDOR_META is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -2351,6 +2454,7 @@ CONFIG_NET_VENDOR_MICROCHIP=y # CONFIG_ENC28J60 is not set # CONFIG_ENCX24J600 is not set # CONFIG_LAN743X is not set +# CONFIG_LAN865X is not set # CONFIG_VCAP is not set CONFIG_NET_VENDOR_MICROSEMI=y # CONFIG_NET_VENDOR_MICROSOFT is not set @@ -2394,6 +2498,7 @@ CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set # CONFIG_8139TOO is not set # CONFIG_R8169 is not set +# CONFIG_RTASE is not set CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_NET_VENDOR_SAMSUNG=y @@ -2433,6 +2538,7 @@ CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set +# CONFIG_TEHUTI_TN40 is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set # CONFIG_TLAN is not set @@ -2446,11 +2552,10 @@ CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5300 is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set +# CONFIG_QCOM_IPA is not set CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -2462,6 +2567,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2496,6 +2602,9 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=m # CONFIG_RENESAS_PHY is not set @@ -2509,6 +2618,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2609,11 +2719,8 @@ CONFIG_WCN36XX=m # CONFIG_ATH11K is not set # CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y -CONFIG_ATMEL=m -# CONFIG_PCI_ATMEL is not set CONFIG_AT76C50X_USB=m # CONFIG_WLAN_VENDOR_BROADCOM is not set -# CONFIG_WLAN_VENDOR_CISCO is not set # CONFIG_WLAN_VENDOR_INTEL is not set # CONFIG_WLAN_VENDOR_INTERSIL is not set # CONFIG_WLAN_VENDOR_MARVELL is not set @@ -2630,7 +2737,6 @@ CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WLAN_VENDOR_TI is not set # CONFIG_WLAN_VENDOR_ZYDAS is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2669,7 +2775,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=m CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2692,7 +2797,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2746,7 +2850,6 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set @@ -2756,6 +2859,8 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -2769,7 +2874,6 @@ CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set @@ -2890,7 +2994,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -2991,7 +3094,6 @@ CONFIG_DEVPORT=y CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -3036,6 +3138,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers @@ -3105,6 +3208,7 @@ CONFIG_SPI_MEM=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_HISI_KUNPENG is not set # CONFIG_SPI_HISI_SFC_V3XX is not set @@ -3115,8 +3219,8 @@ CONFIG_SPI_MEM=y # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_QCOM_QSPI is not set +# CONFIG_SPI_QPIC_SNAND is not set CONFIG_SPI_QUP=y # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set @@ -3154,10 +3258,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -3169,8 +3270,10 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # CONFIG_PTP_1588_CLOCK_KVM is not set +# CONFIG_PTP_1588_CLOCK_VMCLOCK is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_OCP is not set # end of PTP clock support @@ -3183,6 +3286,7 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set # CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set @@ -3194,11 +3298,13 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_MSM=y # CONFIG_PINCTRL_IPQ5018 is not set # CONFIG_PINCTRL_IPQ5332 is not set +# CONFIG_PINCTRL_IPQ5424 is not set CONFIG_PINCTRL_IPQ8074=y # CONFIG_PINCTRL_IPQ6018 is not set # CONFIG_PINCTRL_IPQ9574 is not set # CONFIG_PINCTRL_MDM9607 is not set CONFIG_PINCTRL_MSM8916=y +# CONFIG_PINCTRL_MSM8917 is not set # CONFIG_PINCTRL_MSM8953 is not set # CONFIG_PINCTRL_MSM8976 is not set CONFIG_PINCTRL_MSM8994=y @@ -3206,9 +3312,12 @@ CONFIG_PINCTRL_MSM8996=y # CONFIG_PINCTRL_MSM8998 is not set # CONFIG_PINCTRL_QCM2290 is not set # CONFIG_PINCTRL_QCS404 is not set +# CONFIG_PINCTRL_QCS615 is not set +# CONFIG_PINCTRL_QCS8300 is not set CONFIG_PINCTRL_QDF2XXX=y # CONFIG_PINCTRL_QDU1000 is not set # CONFIG_PINCTRL_SA8775P is not set +# CONFIG_PINCTRL_SAR2130P is not set # CONFIG_PINCTRL_SC7180 is not set # CONFIG_PINCTRL_SC7280 is not set # CONFIG_PINCTRL_SC8180X is not set @@ -3217,6 +3326,7 @@ CONFIG_PINCTRL_QDF2XXX=y # CONFIG_PINCTRL_SDM670 is not set # CONFIG_PINCTRL_SDM845 is not set # CONFIG_PINCTRL_SDX75 is not set +# CONFIG_PINCTRL_SM4450 is not set # CONFIG_PINCTRL_SM6115 is not set # CONFIG_PINCTRL_SM6125 is not set # CONFIG_PINCTRL_SM6350 is not set @@ -3227,6 +3337,9 @@ CONFIG_PINCTRL_QDF2XXX=y # CONFIG_PINCTRL_SM8350 is not set # CONFIG_PINCTRL_SM8450 is not set # CONFIG_PINCTRL_SM8550 is not set +# CONFIG_PINCTRL_SM8650 is not set +# CONFIG_PINCTRL_SM8750 is not set +# CONFIG_PINCTRL_X1E80100 is not set CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_PINCTRL_QCOM_SSBI_PMIC=y # CONFIG_PINCTRL_LPASS_LPI is not set @@ -3263,6 +3376,7 @@ CONFIG_GPIO_GENERIC_PLATFORM=y # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set CONFIG_GPIO_PL061=y +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set CONFIG_GPIO_XGENE=y @@ -3315,6 +3429,7 @@ CONFIG_GPIO_MAX77620=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -3327,9 +3442,14 @@ CONFIG_GPIO_MAX77620=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set CONFIG_POWER_RESET_MSM=y @@ -3343,6 +3463,7 @@ CONFIG_POWER_RESET_SYSCON=y # CONFIG_POWER_RESET_SYSCON_POWEROFF is not set # CONFIG_SYSCON_REBOOT_MODE is not set # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set # CONFIG_GENERIC_ADC_BATTERY is not set @@ -3362,6 +3483,7 @@ CONFIG_BATTERY_BQ27XXX_I2C=y # CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set @@ -3371,6 +3493,8 @@ CONFIG_BATTERY_BQ27XXX_I2C=y # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_MAX77976 is not set # CONFIG_CHARGER_QCOM_SMBB is not set +# CONFIG_BATTERY_PM8916_BMS_VM is not set +# CONFIG_CHARGER_PM8916_LBC is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24257 is not set @@ -3386,17 +3510,20 @@ CONFIG_BATTERY_BQ27XXX_I2C=y # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9467 is not set # CONFIG_CHARGER_RT9471 is not set +# CONFIG_FUEL_GAUGE_STC3117 is not set # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set # CONFIG_CHARGER_QCOM_SMB2 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set # CONFIG_HWMON is not set CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3407,6 +3534,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_CPU_THERMAL=y CONFIG_CPU_FREQ_THERMAL=y # CONFIG_DEVFREQ_THERMAL is not set +# CONFIG_PCIE_THERMAL is not set CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set @@ -3454,6 +3582,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_ALIM7101_WDT is not set # CONFIG_I6300ESB_WDT is not set # CONFIG_HP_WATCHDOG is not set +# CONFIG_NIC7018_WDT is not set # CONFIG_MEN_A21_WDT is not set # CONFIG_XEN_WDT is not set @@ -3476,6 +3605,7 @@ CONFIG_BCMA_POSSIBLE=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3512,12 +3642,14 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3534,7 +3666,6 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_QCOM_RPM is not set CONFIG_MFD_SPMI_PMIC=y # CONFIG_MFD_SY7636A is not set @@ -3590,10 +3721,13 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set CONFIG_MFD_VEXPRESS_SYSREG=y # CONFIG_MFD_INTEL_M10_BMC_SPI is not set # CONFIG_MFD_RSMU_I2C is not set @@ -3605,6 +3739,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3624,6 +3759,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set @@ -3642,6 +3778,7 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_MT6315 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3837,7 +3974,12 @@ CONFIG_VIDEOBUF2_VMALLOC=m # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3846,6 +3988,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3856,6 +3999,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -3882,6 +4026,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -3901,10 +4046,16 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3963,6 +4114,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set # CONFIG_VIDEO_ISL7998X is not set +# CONFIG_VIDEO_LT6911UXE is not set # CONFIG_VIDEO_KS0127 is not set # CONFIG_VIDEO_MAX9286 is not set # CONFIG_VIDEO_ML86V7667 is not set @@ -3974,6 +4126,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -4032,6 +4185,8 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4044,31 +4199,41 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_DP_AUX_BUS=y -CONFIG_DRM_DISPLAY_HELPER=y -CONFIG_DRM_DISPLAY_DP_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_SCHED=y +# CONFIG_DRM_PANIC is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y # -# I2C encoder or helper chips +# Supported DRM clients # -CONFIG_DRM_I2C_CH7006=m -CONFIG_DRM_I2C_SIL164=m -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_DSC_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y +CONFIG_DRM_EXEC=y +CONFIG_DRM_SCHED=y # # ARM devices @@ -4081,6 +4246,7 @@ CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set # CONFIG_DRM_VMWGFX is not set @@ -4116,32 +4282,40 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_DSI_CM is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_EDP=y +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_DSI_CM is not set +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set @@ -4150,8 +4324,8 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set @@ -4159,17 +4333,26 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set @@ -4184,20 +4367,26 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +CONFIG_DRM_PANEL_EDP=y +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SUMMIT is not set +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set +# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_AUX_BRIDGE=y # # Display Interface Bridges @@ -4205,6 +4394,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4229,6 +4420,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4243,7 +4435,6 @@ CONFIG_DRM_I2C_ADV7511_CEC=y # CONFIG_DRM_CDNS_MHDP8546 is not set # end of Display Interface Bridges -# CONFIG_DRM_LOONGSON is not set # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_HISI_HIBMC is not set # CONFIG_DRM_HISI_KIRIN is not set @@ -4261,16 +4452,18 @@ CONFIG_DRM_I2C_ADV7511_CEC=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_XEN_FRONTEND is not set # CONFIG_DRM_LIMA is not set # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -4279,7 +4472,6 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_FB=y # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set -CONFIG_FB_ARMCLCD=y # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set @@ -4319,16 +4511,12 @@ CONFIG_FB_CORE=y CONFIG_FB_NOTIFY=y # CONFIG_FIRMWARE_EDID is not set CONFIG_FB_DEVICE=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y -CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y @@ -4341,14 +4529,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4393,10 +4584,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4520,12 +4711,19 @@ CONFIG_SND_SOC=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_QCOM=y # CONFIG_SND_SOC_STORM is not set # CONFIG_SND_SOC_APQ8016_SBC is not set # CONFIG_SND_SOC_SC7180 is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4545,6 +4743,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4557,6 +4756,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=y +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4564,7 +4764,11 @@ CONFIG_SND_SOC_AK4613=y # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4585,6 +4789,7 @@ CONFIG_SND_SOC_AK4613=y # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4595,13 +4800,16 @@ CONFIG_SND_SOC_AK4613=y # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set @@ -4609,7 +4817,6 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -4637,17 +4844,19 @@ CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4686,6 +4895,7 @@ CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4715,6 +4925,7 @@ CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4723,6 +4934,8 @@ CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4777,11 +4990,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set # CONFIG_HID_KYE is not set +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4817,7 +5032,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set # CONFIG_HID_ORTEK is not set -CONFIG_HID_OUYA=y # CONFIG_HID_PANTHERLORD is not set # CONFIG_HID_PENMOUNT is not set # CONFIG_HID_PETALYNX is not set @@ -4852,6 +5066,7 @@ CONFIG_SONY_FF=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set @@ -4866,6 +5081,12 @@ CONFIG_SONY_FF=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_ACPI is not set +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4874,11 +5095,6 @@ CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_ACPI is not set -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4888,6 +5104,7 @@ CONFIG_USB_ULPI_BUS=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +# CONFIG_USB_PCI_AMD is not set # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -4902,6 +5119,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4940,11 +5158,7 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -5003,6 +5217,7 @@ CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -5085,6 +5300,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_QCOM_EUD is not set # CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LJCA is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -5099,7 +5315,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5237,6 +5453,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y # CONFIG_MMC_DW_PCI is not set # CONFIG_MMC_VUB300 is not set @@ -5283,6 +5500,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5307,6 +5525,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5319,11 +5538,14 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set @@ -5339,6 +5561,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_CPU=y # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5349,11 +5572,11 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5388,6 +5611,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set @@ -5405,6 +5629,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5412,6 +5637,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5497,6 +5723,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set CONFIG_QCOM_BAM_DMA=y # CONFIG_QCOM_GPI_DMA is not set CONFIG_QCOM_HIDMA_MGMT=y @@ -5533,14 +5760,16 @@ CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=y # CONFIG_VFIO_NOIOMMU is not set CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for PCI devices # CONFIG_VFIO_PCI_CORE=y -CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI=y +# CONFIG_VIRTIO_VFIO_PCI is not set +# CONFIG_NVGRACE_GPU_VFIO_PCI is not set # end of VFIO support for PCI devices # @@ -5550,6 +5779,7 @@ CONFIG_VFIO_PCI=y # CONFIG_VFIO_AMBA is not set # end of VFIO support for platform devices +CONFIG_IRQ_BYPASS_MANAGER=y # CONFIG_VIRT_DRIVERS is not set CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y @@ -5562,6 +5792,7 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set @@ -5599,17 +5830,65 @@ CONFIG_XEN_AUTO_XLATE=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set -# CONFIG_STAGING is not set +CONFIG_STAGING=y +# CONFIG_RTL8723BS is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16203 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7816 is not set +# end of Analog to digital converters + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set +# end of Analog digital bi-direction converters + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set +# end of Direct Digital Synthesis + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set +# end of Network Analyzer, Impedance Converters +# end of IIO staging drivers + +# CONFIG_FB_SM750 is not set +# CONFIG_STAGING_MEDIA is not set +# CONFIG_FB_TFT is not set +# CONFIG_XIL_AXIS_FIFO is not set +# CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y # CONFIG_CHROMEOS_ACPI is not set # CONFIG_CHROMEOS_TBMC is not set +# CONFIG_CHROMEOS_OF_HW_PROBER is not set # CONFIG_CROS_EC is not set # CONFIG_CROS_KBD_LED_BACKLIGHT is not set # CONFIG_CROS_HPS_I2C is not set # CONFIG_CHROMEOS_PRIVACY_SCREEN is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y +# CONFIG_EC_ACER_ASPIRE1 is not set +# CONFIG_EC_LENOVO_YOGA_C630 is not set CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -5645,19 +5924,28 @@ CONFIG_COMMON_CLK_XGENE=y # CONFIG_COMMON_CLK_VC7 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set CONFIG_QCOM_GDSC=y -CONFIG_QCOM_RPMCC=y CONFIG_COMMON_CLK_QCOM=y +# CONFIG_CLK_X1E80100_CAMCC is not set +# CONFIG_CLK_X1E80100_DISPCC is not set +# CONFIG_CLK_X1E80100_GCC is not set +# CONFIG_CLK_X1E80100_GPUCC is not set +# CONFIG_CLK_X1E80100_TCSRCC is not set +# CONFIG_CLK_X1P42100_GPUCC is not set +# CONFIG_CLK_QCM2290_GPUCC is not set CONFIG_QCOM_A53PLL=y # CONFIG_QCOM_A7PLL is not set # CONFIG_QCOM_CLK_APCC_MSM8996 is not set CONFIG_QCOM_CLK_SMD_RPM=y # CONFIG_IPQ_APSS_PLL is not set +# CONFIG_IPQ_CMN_PLL is not set CONFIG_IPQ_GCC_4019=y # CONFIG_IPQ_GCC_5018 is not set # CONFIG_IPQ_GCC_5332 is not set +# CONFIG_IPQ_GCC_5424 is not set # CONFIG_IPQ_GCC_6018 is not set CONFIG_IPQ_GCC_8074=y # CONFIG_IPQ_GCC_9574 is not set +# CONFIG_IPQ_NSSCC_QCA8K is not set CONFIG_MSM_GCC_8916=y # CONFIG_MSM_GCC_8917 is not set # CONFIG_MSM_GCC_8939 is not set @@ -5673,13 +5961,20 @@ CONFIG_MSM_MMCC_8996=y # CONFIG_QCM_GCC_2290 is not set # CONFIG_QCM_DISPCC_2290 is not set # CONFIG_QCS_GCC_404 is not set +# CONFIG_SA_CAMCC_8775P is not set +# CONFIG_QCS_GCC_8300 is not set +# CONFIG_QCS_GCC_615 is not set # CONFIG_SC_CAMCC_7180 is not set # CONFIG_SC_CAMCC_7280 is not set +# CONFIG_SC_CAMCC_8280XP is not set +# CONFIG_SA_DISPCC_8775P is not set # CONFIG_SC_DISPCC_7180 is not set # CONFIG_SC_DISPCC_7280 is not set # CONFIG_SC_DISPCC_8280XP is not set # CONFIG_SA_GCC_8775P is not set # CONFIG_SA_GPUCC_8775P is not set +# CONFIG_SAR_GCC_2130P is not set +# CONFIG_SAR_GPUCC_2130P is not set # CONFIG_SC_GCC_7180 is not set # CONFIG_SC_GCC_7280 is not set # CONFIG_SC_GCC_8180X is not set @@ -5691,7 +5986,6 @@ CONFIG_MSM_MMCC_8996=y # CONFIG_SC_LPASSCC_8280XP is not set # CONFIG_SC_LPASS_CORECC_7180 is not set # CONFIG_SC_LPASS_CORECC_7280 is not set -# CONFIG_SC_MSS_7180 is not set # CONFIG_SC_VIDEOCC_7180 is not set # CONFIG_SC_VIDEOCC_7280 is not set # CONFIG_SDM_CAMCC_845 is not set @@ -5701,15 +5995,22 @@ CONFIG_MSM_MMCC_8996=y # CONFIG_QCS_TURING_404 is not set # CONFIG_QCS_Q6SSTOP_404 is not set # CONFIG_QDU_GCC_1000 is not set +# CONFIG_QDU_ECPRICC_1000 is not set # CONFIG_SDM_GCC_845 is not set # CONFIG_SDM_GPUCC_845 is not set # CONFIG_SDM_VIDEOCC_845 is not set # CONFIG_SDM_DISPCC_845 is not set # CONFIG_SDM_LPASSCC_845 is not set # CONFIG_SDX_GCC_75 is not set +# CONFIG_SM_CAMCC_4450 is not set # CONFIG_SM_CAMCC_6350 is not set +# CONFIG_SM_CAMCC_7150 is not set +# CONFIG_SM_CAMCC_8150 is not set # CONFIG_SM_CAMCC_8250 is not set # CONFIG_SM_CAMCC_8450 is not set +# CONFIG_SM_CAMCC_8550 is not set +# CONFIG_SM_CAMCC_8650 is not set +# CONFIG_SM_GCC_4450 is not set # CONFIG_SM_GCC_6115 is not set # CONFIG_SM_GCC_6125 is not set # CONFIG_SM_GCC_6350 is not set @@ -5720,6 +6021,9 @@ CONFIG_MSM_MMCC_8996=y # CONFIG_SM_GCC_8350 is not set # CONFIG_SM_GCC_8450 is not set # CONFIG_SM_GCC_8550 is not set +# CONFIG_SM_GCC_8650 is not set +# CONFIG_SM_GCC_8750 is not set +# CONFIG_SM_GPUCC_4450 is not set # CONFIG_SM_GPUCC_6115 is not set # CONFIG_SM_GPUCC_6125 is not set # CONFIG_SM_GPUCC_6375 is not set @@ -5729,11 +6033,16 @@ CONFIG_MSM_MMCC_8996=y # CONFIG_SM_GPUCC_8350 is not set # CONFIG_SM_GPUCC_8450 is not set # CONFIG_SM_GPUCC_8550 is not set +# CONFIG_SM_GPUCC_8650 is not set +# CONFIG_SM_LPASSCC_6115 is not set # CONFIG_SM_TCSRCC_8550 is not set +# CONFIG_SM_TCSRCC_8650 is not set +# CONFIG_SM_TCSRCC_8750 is not set +# CONFIG_SA_VIDEOCC_8775P is not set +# CONFIG_SM_VIDEOCC_7150 is not set # CONFIG_SM_VIDEOCC_8150 is not set # CONFIG_SM_VIDEOCC_8250 is not set # CONFIG_SM_VIDEOCC_8350 is not set -# CONFIG_SM_VIDEOCC_8550 is not set # CONFIG_SPMI_PMIC_CLKDIV is not set # CONFIG_QCOM_HFPLL is not set # CONFIG_KPSS_XCC is not set @@ -5762,12 +6071,14 @@ CONFIG_ARM64_ERRATUM_858921=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_ARM_MHU_V2=m +CONFIG_ARM_MHU_V3=m # CONFIG_PLATFORM_MHU is not set # CONFIG_PL320_MBOX is not set # CONFIG_PCC is not set # CONFIG_ALTERA_MBOX is not set # CONFIG_MAILBOX_TEST is not set # CONFIG_QCOM_APCS_IPC is not set +# CONFIG_QCOM_CPUCP_MBOX is not set # CONFIG_QCOM_IPCC is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y @@ -5793,6 +6104,7 @@ CONFIG_IOMMU_DMA=y CONFIG_ARM_SMMU=y # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_MMU_500_CPRE_ERRATA=y CONFIG_ARM_SMMU_QCOM=y # CONFIG_ARM_SMMU_QCOM_DEBUG is not set # CONFIG_ARM_SMMU_V3 is not set @@ -5841,7 +6153,6 @@ CONFIG_RPMSG_QCOM_SMD=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -5875,17 +6186,18 @@ CONFIG_RPMSG_QCOM_SMD=y # # CONFIG_QCOM_AOSS_QMP is not set CONFIG_QCOM_COMMAND_DB=y -# CONFIG_QCOM_CPR is not set # CONFIG_QCOM_GENI_SE is not set # CONFIG_QCOM_GSBI is not set # CONFIG_QCOM_LLCC is not set CONFIG_QCOM_MDT_LOADER=y # CONFIG_QCOM_OCMEM is not set +CONFIG_QCOM_PD_MAPPER=m +CONFIG_QCOM_PDR_MSG=m +CONFIG_QCOM_QMI_HELPERS=m # CONFIG_QCOM_RAMP_CTRL is not set # CONFIG_QCOM_RMTFS_MEM is not set # CONFIG_QCOM_RPM_MASTER_STATS is not set # CONFIG_QCOM_RPMH is not set -# CONFIG_QCOM_RPMPD is not set CONFIG_QCOM_SMEM=y CONFIG_QCOM_SMD_RPM=y CONFIG_QCOM_SMEM_STATE=y @@ -5897,6 +6209,7 @@ CONFIG_QCOM_STATS=y CONFIG_QCOM_WCNSS_CTRL=y # CONFIG_QCOM_APR is not set # CONFIG_QCOM_ICC_BWMON is not set +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set @@ -5907,6 +6220,35 @@ CONFIG_QCOM_WCNSS_CTRL=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# CONFIG_QCOM_CPR is not set +# CONFIG_QCOM_RPMPD is not set +# end of Qualcomm PM Domains +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5930,6 +6272,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_QCOM_SPMI_MISC is not set @@ -5960,6 +6303,8 @@ CONFIG_IIO=y # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5996,34 +6341,46 @@ CONFIG_IIO=y # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -6035,11 +6392,15 @@ CONFIG_IIO=y # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_QCOM_SPMI_RRADC is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set @@ -6054,8 +6415,11 @@ CONFIG_IIO=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -6099,10 +6463,12 @@ CONFIG_IIO=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_SCD30_CORE is not set # CONFIG_SCD4X is not set @@ -6132,6 +6498,7 @@ CONFIG_IIO=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -6143,6 +6510,7 @@ CONFIG_IIO=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -6155,17 +6523,21 @@ CONFIG_IIO=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -6201,6 +6573,7 @@ CONFIG_IIO=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -6243,8 +6616,10 @@ CONFIG_IIO=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -6258,8 +6633,13 @@ CONFIG_IIO=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set @@ -6268,6 +6648,7 @@ CONFIG_IIO=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6278,11 +6659,15 @@ CONFIG_IIO=y # CONFIG_ACPI_ALS is not set # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6295,10 +6680,11 @@ CONFIG_IIO=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6307,6 +6693,7 @@ CONFIG_IIO=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6322,8 +6709,11 @@ CONFIG_IIO=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6331,9 +6721,11 @@ CONFIG_IIO=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6343,6 +6735,7 @@ CONFIG_IIO=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6390,10 +6783,12 @@ CONFIG_IIO=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6401,6 +6796,7 @@ CONFIG_IIO=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6416,6 +6812,7 @@ CONFIG_IIO=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6430,6 +6827,7 @@ CONFIG_IIO=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6437,6 +6835,7 @@ CONFIG_IIO=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6446,6 +6845,7 @@ CONFIG_IIO=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6454,16 +6854,17 @@ CONFIG_IIO=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set # CONFIG_PWM_XILINX is not set @@ -6476,7 +6877,7 @@ CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y @@ -6487,6 +6888,7 @@ CONFIG_PARTITION_PERCPU=y # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_QCOM_AOSS is not set # CONFIG_RESET_QCOM_PDC is not set # CONFIG_RESET_TI_SYSCON is not set @@ -6497,6 +6899,7 @@ CONFIG_RESET_CONTROLLER=y # CONFIG_GENERIC_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6511,7 +6914,6 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6531,6 +6933,7 @@ CONFIG_PHY_QCOM_QUSB2=y # CONFIG_PHY_QCOM_SNPS_EUSB2 is not set # CONFIG_PHY_QCOM_EUSB2_REPEATER is not set # CONFIG_PHY_QCOM_M31_USB is not set +# CONFIG_PHY_QCOM_UNIPHY_PCIE_28LP is not set CONFIG_PHY_QCOM_USB_HS=y # CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set CONFIG_PHY_QCOM_USB_HSIC=y @@ -6551,6 +6954,7 @@ CONFIG_PHY_SAMSUNG_USB2=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y CONFIG_ARM_PMU_ACPI=y # CONFIG_ARM_SMMU_V3_PMU is not set @@ -6564,7 +6968,10 @@ CONFIG_ARM_PMUV3=y # CONFIG_HISI_PMU is not set # CONFIG_HISI_PCIE_PMU is not set # CONFIG_HNS3_PMU is not set +# CONFIG_DWC_PCIE_PMU is not set CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m +# CONFIG_NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set +# CONFIG_AMPERE_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -6576,16 +6983,19 @@ CONFIG_RAS=y # CONFIG_ANDROID_BINDER_IPC is not set # end of Android +CONFIG_TRACE_GPU_MEM=y # CONFIG_LIBNVDIMM is not set # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_QCOM_QFPROM is not set @@ -6608,7 +7018,9 @@ CONFIG_NVMEM_U_BOOT_ENV=m CONFIG_PM_OPP=y # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set -# CONFIG_INTERCONNECT is not set +CONFIG_INTERCONNECT=y +# CONFIG_INTERCONNECT_QCOM is not set +CONFIG_INTERCONNECT_CLK=y # CONFIG_COUNTER is not set # CONFIG_MOST is not set # CONFIG_PECI is not set @@ -6622,6 +7034,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6636,20 +7049,20 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=y CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6671,6 +7084,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6682,7 +7097,6 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # # Caches # -# CONFIG_FSCACHE is not set # end of Caches # @@ -6703,11 +7117,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6769,7 +7183,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set CONFIG_UFS_FS=y # CONFIG_UFS_FS_WRITE is not set CONFIG_UFS_DEBUG=y @@ -6789,6 +7202,7 @@ CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -6879,12 +7293,12 @@ CONFIG_KEY_DH_OPERATIONS=y CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_FORCE_PTRACE is not set # CONFIG_PROC_MEM_NO_FORCE is not set +CONFIG_MSEAL_SYSTEM_MAPPINGS=y CONFIG_SECURITY=y +CONFIG_HAS_SECURITY_AUDIT=y CONFIG_SECURITYFS=y # CONFIG_SECURITY_NETWORK is not set # CONFIG_SECURITY_PATH is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set @@ -6894,6 +7308,7 @@ CONFIG_SECURITYFS=y # CONFIG_SECURITY_SAFESETID is not set # CONFIG_SECURITY_LOCKDOWN_LSM is not set # CONFIG_SECURITY_LANDLOCK is not set +# CONFIG_SECURITY_IPE is not set CONFIG_INTEGRITY=y # CONFIG_INTEGRITY_SIGNATURE is not set CONFIG_INTEGRITY_AUDIT=y @@ -6923,6 +7338,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6971,6 +7393,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=m # end of Crypto core or helper @@ -6985,7 +7408,6 @@ CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -7018,14 +7440,11 @@ CONFIG_CRYPTO_SM4=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set CONFIG_CRYPTO_NHPOLY1305=y @@ -7064,7 +7483,6 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=y @@ -7075,8 +7493,6 @@ CONFIG_CRYPTO_XXHASH=y # CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32 is not set -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y # end of CRCs (cyclic redundancy checks) # @@ -7100,7 +7516,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -7118,13 +7536,13 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y @@ -7145,7 +7563,6 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=y CONFIG_CRYPTO_AES_ARM64_CE_CCM=y # CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set # CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y # end of Accelerated Cryptographic Algorithms for CPU (arm64) CONFIG_CRYPTO_HW=y @@ -7157,6 +7574,7 @@ CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -7191,6 +7609,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -7208,7 +7627,6 @@ CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -7223,16 +7641,19 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y -CONFIG_CRYPTO_LIB_CURVE25519=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m +CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y -CONFIG_CRYPTO_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines @@ -7240,19 +7661,16 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y CONFIG_CRC_T10DIF=y -CONFIG_CRC64_ROCKSOFT=y +CONFIG_ARCH_HAS_CRC_T10DIF=y +CONFIG_CRC_T10DIF_ARCH=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC64=y -# CONFIG_CRC4 is not set CONFIG_CRC7=y -CONFIG_LIBCRC32C=y CONFIG_CRC8=y +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_GENERIC=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y @@ -7269,10 +7687,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -7288,20 +7707,21 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -7328,12 +7748,15 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7352,11 +7775,15 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_FIRMWARE_TABLE=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7385,7 +7812,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7395,7 +7822,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set @@ -7421,7 +7847,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7432,6 +7858,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7446,7 +7873,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7456,12 +7883,14 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y @@ -7487,6 +7916,7 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_DETECT_HUNG_TASK_BLOCKER=y # CONFIG_WQ_WATCHDOG is not set # CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set @@ -7495,12 +7925,10 @@ CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # # Scheduler Debugging # -CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set # CONFIG_DEBUG_PREEMPT is not set # @@ -7554,14 +7982,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7584,6 +8015,7 @@ CONFIG_CORESIGHT_SINK_ETBV10=y CONFIG_CORESIGHT_SOURCE_ETM4X=y # CONFIG_ETM4X_IMPDEF_FEATURE is not set # CONFIG_CORESIGHT_STM is not set +# CONFIG_CORESIGHT_CTCU is not set # CONFIG_CORESIGHT_CPU_DEBUG is not set # CONFIG_CORESIGHT_CTI is not set # CONFIG_CORESIGHT_TRBE is not set @@ -7607,6 +8039,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -7615,11 +8048,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -7629,9 +8058,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set @@ -7639,9 +8066,12 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_FPU is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage @@ -7651,3 +8081,5 @@ CONFIG_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf index 9129c7bbf5..1f677ed34b 100644 --- a/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf +++ b/projects/Rockchip/devices/RK3288/linux/default/linux.arm.conf @@ -1,23 +1,26 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.6.66 Kernel Configuration +# Linux/arm 6.15.0 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -116,7 +119,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -136,6 +139,7 @@ CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -158,23 +162,28 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -208,20 +217,20 @@ CONFIG_INITRAMFS_COMPRESSION_NONE=y CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y +CONFIG_SYSFS_SYSCALL=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -233,14 +242,13 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_SELFTEST is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y @@ -259,7 +267,6 @@ CONFIG_TRACEPOINTS=y # Kexec and crash features # # CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup @@ -301,6 +308,9 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_VIRT is not set # CONFIG_ARCH_AIROHA is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_SUNPLUS is not set +# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set @@ -336,7 +346,6 @@ CONFIG_ARCH_MULTI_V6_V7=y # end of TI OMAP/AM/DM/DRA Family # CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RDA is not set # CONFIG_ARCH_REALTEK is not set CONFIG_ARCH_ROCKCHIP=y # CONFIG_ARCH_S5PV210 is not set @@ -345,10 +354,8 @@ CONFIG_ARCH_ROCKCHIP=y # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_SUNPLUS is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VEXPRESS is not set @@ -452,7 +459,7 @@ CONFIG_VMSPLIT_3G=y CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_NR_CPUS=4 CONFIG_HOTPLUG_CPU=y -# CONFIG_ARM_PSCI is not set +CONFIG_ARM_PSCI=y CONFIG_HZ_FIXED=0 # CONFIG_HZ_100 is not set # CONFIG_HZ_200 is not set @@ -471,6 +478,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_PAN=y CONFIG_CPU_SW_DOMAIN_PAN=y CONFIG_HW_PERF_EVENTS=y # CONFIG_ARM_MODULE_PLTS is not set @@ -500,6 +508,7 @@ CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y CONFIG_CMDLINE="" CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_AUTO_ZRELADDR=y # CONFIG_EFI is not set # end of Boot options @@ -532,9 +541,9 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y # CONFIG_ARM_SCPI_CPUFREQ is not set -# CONFIG_ARM_SCMI_CPUFREQ is not set # end of CPU Frequency scaling # @@ -551,6 +560,8 @@ CONFIG_DT_IDLE_STATES=y # ARM CPU Idle Drivers # CONFIG_ARM_CPUIDLE=y +# CONFIG_ARM_PSCI_CPUIDLE is not set +# CONFIG_ARM_HIGHBANK_CPUIDLE is not set # end of ARM CPU Idle Drivers # end of CPU Idle # end of CPU Power Management @@ -594,8 +605,8 @@ CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y # end of Power management options -CONFIG_AS_VFP_VMRS_FPINST=y CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -637,10 +648,12 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y # CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y @@ -653,8 +666,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -683,10 +699,11 @@ CONFIG_HAVE_GCC_PLUGINS=y CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -696,12 +713,10 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set @@ -710,9 +725,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -745,6 +760,7 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_MQ_VIRTIO=y @@ -795,17 +811,18 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_COMPAT_BRK=y @@ -815,7 +832,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -826,13 +843,15 @@ CONFIG_BOUNCE=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_PAGE_MAPCOUNT=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CPU_CACHE_ALIASING=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set @@ -846,7 +865,10 @@ CONFIG_MEMFD_CREATE=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -860,6 +882,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -867,7 +890,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -882,6 +904,7 @@ CONFIG_XFRM_AH=m CONFIG_XFRM_ESP=y CONFIG_XFRM_IPCOMP=m # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -959,6 +982,7 @@ CONFIG_BRIDGE_NETFILTER=m # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_BPF_LINK=y # CONFIG_NETFILTER_NETLINK_ACCT is not set @@ -1001,6 +1025,7 @@ CONFIG_NETFILTER_XTABLES=m # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1008,6 +1033,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1019,11 +1045,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1078,7 +1106,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1131,6 +1176,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1152,13 +1198,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1180,7 +1228,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1188,8 +1236,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1224,6 +1272,7 @@ CONFIG_NET_DSA_TAG_BRCM_PREPEND=m # CONFIG_NET_DSA_TAG_LAN9303 is not set # CONFIG_NET_DSA_TAG_SJA1105 is not set # CONFIG_NET_DSA_TAG_TRAILER is not set +# CONFIG_NET_DSA_TAG_VSC73XX_8021Q is not set # CONFIG_NET_DSA_TAG_XRS700X is not set CONFIG_VLAN_8021Q=m # CONFIG_VLAN_8021Q_GVRP is not set @@ -1346,6 +1395,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1364,6 +1414,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -1383,10 +1434,8 @@ CONFIG_BT_HCIRSI=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1396,8 +1445,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1405,7 +1452,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1435,6 +1481,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set @@ -1467,8 +1514,10 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y @@ -1483,7 +1532,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_MHI_BUS is not set @@ -1504,22 +1552,24 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # ARM System Control and Management Interface Protocol # -CONFIG_ARM_SCMI_PROTOCOL=y -# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set -CONFIG_ARM_SCMI_HAVE_TRANSPORT=y -CONFIG_ARM_SCMI_HAVE_SHMEM=y -CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y -# CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set -CONFIG_ARM_SCMI_POWER_DOMAIN=m -# CONFIG_ARM_SCMI_POWER_CONTROL is not set +# CONFIG_ARM_SCMI_PROTOCOL is not set # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=m -CONFIG_ARM_SCPI_POWER_DOMAIN=m # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set # CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y +CONFIG_ARM_SMCCC_SOC_ID=y # # Tegra firmware driver @@ -1527,6 +1577,7 @@ CONFIG_HAVE_ARM_SMCCC=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1534,7 +1585,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1634,6 +1684,7 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_UBI_NVMEM is not set # CONFIG_MTD_HYPERBUS is not set CONFIG_DTC=y CONFIG_OF=y @@ -1681,6 +1732,7 @@ CONFIG_AD525X_DPOT=y CONFIG_AD525X_DPOT_I2C=y # CONFIG_AD525X_DPOT_SPI is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_RPMB is not set CONFIG_ICS932S401=y # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_HI6421V600_IRQ is not set @@ -1697,7 +1749,9 @@ CONFIG_ISL29003=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -1705,7 +1759,6 @@ CONFIG_ISL29003=y # CONFIG_EEPROM_AT24=y # CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set @@ -1713,12 +1766,6 @@ CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -1821,6 +1868,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1830,6 +1878,7 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=y CONFIG_NLMON=m +# CONFIG_NETKIT is not set # CONFIG_NET_VRF is not set # @@ -1886,6 +1935,7 @@ CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set @@ -1928,6 +1978,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -1964,8 +2015,12 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y CONFIG_SMSC_PHY=m @@ -1977,6 +2032,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2064,7 +2120,6 @@ CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m # CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -2089,9 +2144,11 @@ CONFIG_ATH10K_CE=y CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y # CONFIG_ATH10K_TRACING is not set CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y @@ -2120,10 +2177,8 @@ CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set CONFIG_P54_COMMON=m CONFIG_P54_USB=m # CONFIG_P54_SPI is not set @@ -2160,6 +2215,7 @@ CONFIG_MT7663U=m CONFIG_MT7663S=m # CONFIG_MT7921S is not set # CONFIG_MT7921U is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -2187,6 +2243,11 @@ CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2194,18 +2255,28 @@ CONFIG_RTW88_CORE=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m # CONFIG_RTW88_8822CS is not set CONFIG_RTW88_8822CU=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=m @@ -2224,11 +2295,9 @@ CONFIG_WLCORE=m # CONFIG_WLCORE_SPI is not set # CONFIG_WLCORE_SDIO is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2258,7 +2327,6 @@ CONFIG_INPUT_MATRIXKMAP=m # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2281,7 +2349,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2332,6 +2399,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y @@ -2406,7 +2474,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2482,6 +2549,8 @@ CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_OPTEE=m # CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m +# CONFIG_HW_RANDOM_ROCKCHIP is not set CONFIG_DEVMEM=y CONFIG_DEVPORT=y # CONFIG_TCG_TPM is not set @@ -2494,7 +2563,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2576,7 +2644,7 @@ CONFIG_SPI_MEM=y CONFIG_SPI_BITBANG=y CONFIG_SPI_CADENCE=y # CONFIG_SPI_CADENCE_QUADSPI is not set -# CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_GPIO=m # CONFIG_SPI_FSL_SPI is not set @@ -2620,10 +2688,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2634,8 +2699,10 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# CONFIG_PTP_1588_CLOCK_KVM is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support @@ -2646,6 +2713,7 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AS3722=y # CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -2686,6 +2754,7 @@ CONFIG_GPIO_DWAPB=y # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MPC8XXX is not set # CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set CONFIG_GPIO_ROCKCHIP=y # CONFIG_GPIO_SIFIVE is not set CONFIG_GPIO_SYSCON=y @@ -2713,6 +2782,7 @@ CONFIG_GPIO_PCF857X=y # # MFD GPIO expanders # +# CONFIG_GPIO_CROS_EC is not set # CONFIG_HTC_EGPIO is not set CONFIG_GPIO_PALMAS=y # CONFIG_GPIO_STMPE is not set @@ -2735,6 +2805,7 @@ CONFIG_GPIO_TPS65910=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2747,8 +2818,15 @@ CONFIG_GPIO_TPS65910=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set # CONFIG_POWER_RESET is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2770,6 +2848,7 @@ CONFIG_BATTERY_CPCAP=y # CONFIG_AXP20X_POWER is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -2806,6 +2885,7 @@ CONFIG_BATTERY_CPCAP=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2831,18 +2911,21 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set -CONFIG_SENSORS_ARM_SCMI=m CONFIG_SENSORS_ARM_SCPI=m # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set +# CONFIG_SENSORS_CROS_EC is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2850,15 +2933,19 @@ CONFIG_SENSORS_ARM_SCPI=m # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set CONFIG_SENSORS_IIO_HWMON=y +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2866,6 +2953,7 @@ CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -2909,14 +2997,17 @@ CONFIG_SENSORS_LM90=y # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -2944,6 +3035,7 @@ CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -2967,10 +3059,11 @@ CONFIG_SENSORS_INA2XX=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3002,6 +3095,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set +# CONFIG_CROS_EC_WATCHDOG is not set CONFIG_DA9063_WATCHDOG=m # CONFIG_GPIO_WATCHDOG is not set # CONFIG_XILINX_WATCHDOG is not set @@ -3037,6 +3131,7 @@ CONFIG_BCMA_BLOCKIO=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set CONFIG_MFD_ACT8945A=y CONFIG_MFD_AS3711=y # CONFIG_MFD_SMPRO is not set @@ -3072,12 +3167,14 @@ CONFIG_MFD_DA9063=m # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set CONFIG_MFD_MAX14577=y # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=m +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set CONFIG_MFD_MAX8907=y @@ -3094,7 +3191,6 @@ CONFIG_MFD_CPCAP=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set CONFIG_MFD_PM8XXX=y # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RT4831 is not set @@ -3156,13 +3252,17 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_KHADAS_MCU is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3172,11 +3272,11 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set CONFIG_REGULATOR_ACT8865=y CONFIG_REGULATOR_ACT8945A=y # CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_ARM_SCMI is not set CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_AS3722=y # CONFIG_REGULATOR_AW37503 is not set @@ -3201,6 +3301,7 @@ CONFIG_REGULATOR_LP872X=y # CONFIG_REGULATOR_LTC3676 is not set CONFIG_REGULATOR_MAX14577=m # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -3225,6 +3326,7 @@ CONFIG_REGULATOR_MAX77802=m # CONFIG_REGULATOR_MT6315 is not set CONFIG_REGULATOR_PALMAS=y # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3316,7 +3418,9 @@ CONFIG_CEC_NOTIFIER=y # CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set # CONFIG_CEC_CROS_EC is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -3349,6 +3453,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=m @@ -3361,7 +3466,6 @@ CONFIG_V4L2_ASYNC=y # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3602,6 +3706,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3614,6 +3722,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3635,6 +3748,7 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # # Sunxi media platform drivers # +# CONFIG_VIDEO_SYNOPSYS_HDMIRX is not set # # Texas Instruments drivers @@ -3644,6 +3758,7 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_HEVC_RFC=y CONFIG_VIDEO_HANTRO_ROCKCHIP=y # @@ -3691,7 +3806,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3700,6 +3820,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3710,6 +3831,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m @@ -3735,6 +3857,7 @@ CONFIG_VIDEO_OV2640=m # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -3753,10 +3876,16 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3801,6 +3930,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -3987,34 +4118,38 @@ CONFIG_DVB_SP2=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4031,7 +4166,9 @@ CONFIG_ROCKCHIP_VOP=y # CONFIG_ROCKCHIP_ANALOGIX_DP is not set # CONFIG_ROCKCHIP_CDN_DP is not set CONFIG_ROCKCHIP_DW_HDMI=y +# CONFIG_ROCKCHIP_DW_HDMI_QP is not set # CONFIG_ROCKCHIP_DW_MIPI_DSI is not set +# CONFIG_ROCKCHIP_DW_MIPI_DSI2 is not set # CONFIG_ROCKCHIP_INNO_HDMI is not set # CONFIG_ROCKCHIP_LVDS is not set # CONFIG_ROCKCHIP_RGB is not set @@ -4051,12 +4188,9 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set @@ -4064,17 +4198,21 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +CONFIG_DRM_PANEL_EDP=y +CONFIG_DRM_PANEL_SIMPLE=y # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set @@ -4091,6 +4229,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_CROS_EC_ANX7688 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4115,6 +4255,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4134,6 +4275,7 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_LOGICVC is not set +# CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_PANEL_MIPI_DBI is not set @@ -4145,24 +4287,24 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_TVE200 is not set # CONFIG_DRM_LIMA is not set CONFIG_DRM_PANFROST=y +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_MCDE is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_SMSCUFX is not set @@ -4180,10 +4322,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y @@ -4196,14 +4338,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=y # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_TPS65217 is not set CONFIG_BACKLIGHT_AS3711=y CONFIG_BACKLIGHT_GPIO=y @@ -4220,6 +4365,8 @@ CONFIG_HDMI=y # Console display driver support # CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=30 CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y @@ -4249,10 +4396,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4315,6 +4462,12 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_ROCKCHIP=y @@ -4326,6 +4479,7 @@ CONFIG_SND_SOC_ROCKCHIP_MAX98090=m CONFIG_SND_SOC_ROCKCHIP_RT5645=m CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m # CONFIG_SND_SOC_RK3399_GRU_SOUND is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4345,6 +4499,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4357,6 +4512,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set CONFIG_SND_SOC_AK4642=m # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4364,7 +4520,11 @@ CONFIG_SND_SOC_AK4642=m # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4387,6 +4547,7 @@ CONFIG_SND_SOC_CPCAP=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4397,13 +4558,16 @@ CONFIG_SND_SOC_CPCAP=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=m CONFIG_SND_SOC_ES8328_I2C=m @@ -4440,6 +4604,7 @@ CONFIG_SND_SOC_MAX98090=m # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set # CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RK817 is not set @@ -4450,10 +4615,12 @@ CONFIG_SND_SOC_RL6231=m CONFIG_SND_SOC_RT5645=m # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set CONFIG_SND_SOC_SGTL5000=m # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=m # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4492,6 +4659,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4521,6 +4689,7 @@ CONFIG_SND_SOC_WM8978=m # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4529,6 +4698,8 @@ CONFIG_SND_SOC_WM8978=m # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4557,6 +4728,8 @@ CONFIG_HID_A4TECH=y # CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=y # CONFIG_HID_APPLEIR is not set +# CONFIG_HID_APPLETB_BL is not set +# CONFIG_HID_APPLETB_KBD is not set CONFIG_HID_ASUS=y CONFIG_HID_AUREAL=y CONFIG_HID_BELKIN=y @@ -4585,12 +4758,14 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_HAMMER is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4604,7 +4779,6 @@ CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y # CONFIG_HID_LED is not set -CONFIG_HID_LENOVO=y # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y @@ -4626,7 +4800,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTI is not set # CONFIG_HID_NTRIG is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -4664,6 +4837,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -4678,6 +4852,11 @@ CONFIG_HID_ZYDACRON=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4686,10 +4865,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4712,6 +4887,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4720,7 +4896,6 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4747,11 +4922,7 @@ CONFIG_USB_ACM=y # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4818,6 +4989,7 @@ CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -4913,7 +5085,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5051,6 +5223,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set # CONFIG_MMC_DW_EXYNOS is not set # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3798MV200 is not set # CONFIG_MMC_DW_K3 is not set CONFIG_MMC_DW_ROCKCHIP=y # CONFIG_MMC_VUB300 is not set @@ -5078,6 +5251,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=y # CONFIG_LEDS_BCM6358 is not set CONFIG_LEDS_CPCAP=m # CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_CROS_EC is not set # CONFIG_LEDS_EL15203000 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set @@ -5090,6 +5264,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5116,6 +5291,7 @@ CONFIG_LEDS_MAX8997=m # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5128,11 +5304,14 @@ CONFIG_LEDS_MAX8997=m # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set @@ -5147,6 +5326,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5157,11 +5337,11 @@ CONFIG_LEDS_TRIGGER_CAMERA=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5201,6 +5381,7 @@ CONFIG_RTC_DRV_HYM8563=m CONFIG_RTC_DRV_MAX8907=y CONFIG_RTC_DRV_MAX8998=m CONFIG_RTC_DRV_MAX8997=m +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set CONFIG_RTC_DRV_RK808=y @@ -5223,6 +5404,7 @@ CONFIG_RTC_DRV_TPS65910=y CONFIG_RTC_DRV_S35390A=m # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set CONFIG_RTC_DRV_RX8581=m # CONFIG_RTC_DRV_RX8025 is not set CONFIG_RTC_DRV_EM3027=y @@ -5230,6 +5412,7 @@ CONFIG_RTC_DRV_EM3027=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=m +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5315,6 +5498,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y @@ -5352,6 +5536,7 @@ CONFIG_VIRTIO_MENU=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set @@ -5365,11 +5550,7 @@ CONFIG_VHOST_MENU=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5379,7 +5560,6 @@ CONFIG_RTL8723BS=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5406,31 +5586,26 @@ CONFIG_RTL8723BS=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers CONFIG_STAGING_MEDIA=y # CONFIG_VIDEO_MAX96712 is not set CONFIG_VIDEO_ROCKCHIP_VDEC=m + +# +# StarFive media platform drivers +# CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_OF_HW_PROBER is not set CONFIG_CROS_EC=m # CONFIG_CROS_EC_I2C is not set # CONFIG_CROS_EC_RPMSG is not set @@ -5461,7 +5636,6 @@ CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_MAX77686=y # CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_SCMI=m CONFIG_COMMON_CLK_SCPI=m # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -5571,7 +5745,6 @@ CONFIG_RPMSG_VIRTIO=m # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -5602,11 +5775,12 @@ CONFIG_RPMSG_VIRTIO=m # # Qualcomm SoC drivers # +# CONFIG_QCOM_PMIC_PDCHARGER_ULOG is not set +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_PM_DOMAINS=y # CONFIG_SOC_TI is not set # @@ -5615,6 +5789,35 @@ CONFIG_ROCKCHIP_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=m + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +CONFIG_ROCKCHIP_PM_DOMAINS=y +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5640,6 +5843,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX14577 is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_MAX77693 is not set @@ -5679,6 +5883,8 @@ CONFIG_IIO_SW_TRIGGER=y # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5715,37 +5921,49 @@ CONFIG_IIO_SW_TRIGGER=y # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set CONFIG_CPCAP_ADC=m # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5757,11 +5975,15 @@ CONFIG_CPCAP_ADC=m # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_PALMAS_GPADC is not set # CONFIG_QCOM_PM8XXX_XOADC is not set # CONFIG_QCOM_SPMI_IADC is not set @@ -5780,8 +6002,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5825,10 +6050,12 @@ CONFIG_VF610_ADC=m # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -5851,7 +6078,6 @@ CONFIG_VF610_ADC=m # # IIO SCMI Sensors # -# CONFIG_IIO_SCMI is not set # end of IIO SCMI Sensors # @@ -5863,6 +6089,7 @@ CONFIG_VF610_ADC=m # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5874,6 +6101,7 @@ CONFIG_VF610_ADC=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5886,17 +6114,21 @@ CONFIG_VF610_ADC=m # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -5931,6 +6163,7 @@ CONFIG_VF610_ADC=m # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV4420 is not set # CONFIG_ADRF6780 is not set @@ -5973,8 +6206,10 @@ CONFIG_MPU3050_I2C=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5988,8 +6223,13 @@ CONFIG_MPU3050_I2C=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -5999,6 +6239,7 @@ CONFIG_MPU3050_I2C=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6008,11 +6249,15 @@ CONFIG_MPU3050_I2C=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6025,10 +6270,11 @@ CONFIG_CM36651=m CONFIG_SENSORS_ISL29018=y CONFIG_SENSORS_ISL29028=y # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6037,6 +6283,7 @@ CONFIG_SENSORS_ISL29028=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6052,8 +6299,11 @@ CONFIG_SENSORS_ISL29028=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6061,9 +6311,11 @@ CONFIG_SENSORS_ISL29028=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set CONFIG_AK8975=y # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6073,6 +6325,7 @@ CONFIG_AK8975=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6129,10 +6382,12 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6140,6 +6395,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6156,6 +6412,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # Proximity and distance sensors # # CONFIG_CROS_EC_MKBP_PROXIMITY is not set +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6170,6 +6427,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6177,6 +6435,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6186,6 +6445,7 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6194,16 +6454,17 @@ CONFIG_IIO_HRTIMER_TRIGGER=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_HLCDC_PWM=m # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_CROS_EC is not set CONFIG_PWM_FSL_FTM=m +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y # CONFIG_PWM_STMPE is not set @@ -6222,7 +6483,7 @@ CONFIG_ARM_GIC_MAX_NR=1 # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y -CONFIG_RESET_SCMI=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6231,6 +6492,7 @@ CONFIG_RESET_SCMI=y # CONFIG_GENERIC_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6245,7 +6507,6 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6260,6 +6521,8 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=m # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set # CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set # CONFIG_PHY_ROCKCHIP_PCIE is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set # CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set # CONFIG_PHY_ROCKCHIP_TYPEC is not set CONFIG_PHY_ROCKCHIP_USB=y @@ -6276,6 +6539,7 @@ CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set CONFIG_ARM_PMU=y +CONFIG_ARM_V7_PMU=y CONFIG_ARM_PMUV3=y # end of Performance monitor support @@ -6290,12 +6554,14 @@ CONFIG_ARM_PMUV3=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RMEM is not set @@ -6331,6 +6597,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6343,7 +6610,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6362,10 +6628,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=y @@ -6376,6 +6642,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6386,6 +6653,7 @@ CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set CONFIG_QUOTA=y # CONFIG_QUOTA_NETLINK_INTERFACE is not set # CONFIG_QUOTA_DEBUG is not set @@ -6396,6 +6664,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6408,9 +6678,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -6434,10 +6704,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6500,7 +6770,6 @@ CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y # CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6547,6 +6816,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6614,6 +6884,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -6623,8 +6894,6 @@ CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_NO_FORCE is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="yama,loadpin,safesetid,integrity" @@ -6642,12 +6911,20 @@ CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_STACK_ALL_PATTERN is not set # CONFIG_INIT_STACK_ALL_ZERO is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6694,6 +6971,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_SIMD=y CONFIG_CRYPTO_ENGINE=m @@ -6709,7 +6987,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography @@ -6741,14 +7018,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set CONFIG_CRYPTO_NHPOLY1305=y @@ -6785,7 +7059,6 @@ CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6796,7 +7069,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -6820,7 +7092,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6834,7 +7108,6 @@ CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y -# CONFIG_CRYPTO_STATS is not set # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y @@ -6842,10 +7115,10 @@ CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (arm) # -CONFIG_CRYPTO_CURVE25519_NEON=y +CONFIG_CRYPTO_CURVE25519_NEON=m # CONFIG_CRYPTO_GHASH_ARM_CE is not set CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_POLY1305_ARM=y +CONFIG_CRYPTO_POLY1305_ARM=m CONFIG_CRYPTO_BLAKE2S_ARM=y CONFIG_CRYPTO_BLAKE2B_NEON=y CONFIG_CRYPTO_SHA1_ARM=y @@ -6857,8 +7130,7 @@ CONFIG_CRYPTO_SHA512_ARM=y CONFIG_CRYPTO_AES_ARM=y CONFIG_CRYPTO_AES_ARM_BS=y # CONFIG_CRYPTO_AES_ARM_CE is not set -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32_ARM_CE=y +CONFIG_CRYPTO_CHACHA20_NEON=m # end of Accelerated Cryptographic Algorithms for CPU (arm) CONFIG_CRYPTO_HW=y @@ -6889,6 +7161,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6906,7 +7179,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y # @@ -6918,14 +7190,17 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y @@ -6934,20 +7209,12 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y @@ -6961,10 +7228,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -6979,7 +7247,7 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_DMA_DECLARE_COHERENT=y @@ -6987,7 +7255,9 @@ CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_ARCH_HAS_DMA_ALLOC=y CONFIG_DMA_CMA=y # @@ -7010,11 +7280,13 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_32=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7033,10 +7305,13 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7065,7 +7340,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7075,7 +7350,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=1024 # CONFIG_STRIP_ASM_SYMS is not set @@ -7096,7 +7370,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7107,6 +7381,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7120,13 +7395,14 @@ CONFIG_SLUB_DEBUG=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set @@ -7134,6 +7410,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_KMAP_LOCAL is not set # CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -7163,13 +7440,10 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # @@ -7272,7 +7546,9 @@ CONFIG_PROBE_EVENTS=y # # arm Debugging # +CONFIG_ARM_PTDUMP_CORE=y # CONFIG_ARM_PTDUMP_DEBUGFS is not set +CONFIG_ARM_DEBUG_WX=y # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -7298,6 +7574,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -7306,11 +7583,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -7320,9 +7593,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set @@ -7330,9 +7601,11 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -7342,3 +7615,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Rockchip/devices/RK3288/options b/projects/Rockchip/devices/RK3288/options index ec837522bd..337cbcb225 100644 --- a/projects/Rockchip/devices/RK3288/options +++ b/projects/Rockchip/devices/RK3288/options @@ -25,7 +25,7 @@ GRAPHIC_DRIVERS="panfrost" # kernel serial console - EXTRA_CMDLINE="console=uart8250,mmio32,0xff690000 console=tty0 coherent_pool=2M cec.debounce_ms=5000" + EXTRA_CMDLINE="console=uart8250,mmio32,0xff690000 console=tty0 coherent_pool=2M cec.debounce_ms=5000 cma=384M" # set the addon project ADDON_PROJECT="ARMv7" diff --git a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf index 9f851b9810..906b32693c 100644 --- a/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3328/linux/default/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.66 Kernel Configuration +# Linux/arm64 6.15.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -63,6 +67,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -114,7 +119,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -133,6 +138,7 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -158,24 +164,29 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -216,16 +227,15 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -237,14 +247,14 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_SELFTEST is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # @@ -262,15 +272,14 @@ CONFIG_PROFILING=y # # CONFIG_KEXEC is not set # CONFIG_KEXEC_FILE is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -298,12 +307,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -316,6 +327,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # CONFIG_ARCH_NXP is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -380,11 +392,13 @@ CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -394,6 +408,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -422,6 +437,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y # CONFIG_XEN is not set CONFIG_ARCH_FORCE_MAX_ORDER=10 CONFIG_UNMAP_KERNEL_AT_EL0=y @@ -480,6 +496,7 @@ CONFIG_AS_HAS_ARMV8_5=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y # CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # @@ -487,12 +504,28 @@ CONFIG_ARM64_AS_HAS_MTE=y # # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +CONFIG_ARM64_POE=y +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +CONFIG_ARM64_GCS=y +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -500,6 +533,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y # CONFIG_CMDLINE="" # CONFIG_EFI is not set +# CONFIG_COMPRESSED_INSTALL is not set # end of Boot options # @@ -573,18 +607,19 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_SCPI_CPUFREQ=y # end of CPU Frequency scaling # end of CPU Power Management -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options # +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -594,7 +629,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -612,6 +646,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -654,6 +689,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -661,13 +697,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -681,12 +721,17 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -700,10 +745,11 @@ CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -711,15 +757,17 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set CONFIG_MODVERSIONS=y +CONFIG_GENKSYMS=y +# CONFIG_GENDWARFKSYMS is not set CONFIG_ASM_MODVERSIONS=y +# CONFIG_EXTENDED_MODVERSIONS is not set +CONFIG_BASIC_MODVERSIONS=y # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set @@ -728,9 +776,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -763,6 +811,7 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_MQ_VIRTIO=y @@ -865,17 +914,18 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -883,7 +933,7 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y @@ -891,8 +941,9 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -909,13 +960,19 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y # CONFIG_HWPOISON_INJECT is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 @@ -927,6 +984,8 @@ CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -939,9 +998,12 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y +CONFIG_ARCH_HAS_USER_SHADOW_STACK=y # # Data Access Monitoring @@ -956,6 +1018,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -963,7 +1026,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -976,6 +1038,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -1013,6 +1076,7 @@ CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -1028,7 +1092,8 @@ CONFIG_IPV6_SIT=m CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1048,6 +1113,7 @@ CONFIG_BRIDGE_NETFILTER=m # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_BPF_LINK=y # CONFIG_NETFILTER_NETLINK_ACCT is not set @@ -1084,13 +1150,14 @@ CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1098,6 +1165,7 @@ CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1109,11 +1177,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1168,7 +1238,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1221,6 +1308,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1242,14 +1330,16 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_SECURITY is not set # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1271,7 +1361,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m # CONFIG_IP6_NF_SECURITY is not set CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m @@ -1280,8 +1370,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1414,6 +1504,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1432,6 +1523,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m @@ -1451,10 +1543,8 @@ CONFIG_BT_HCIRSI=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1464,8 +1554,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1473,7 +1561,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1501,6 +1588,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set @@ -1533,6 +1621,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1550,7 +1639,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_MHI_BUS is not set @@ -1575,11 +1663,17 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_ARM_FFA_TRANSPORT is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1590,6 +1684,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1597,7 +1692,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1708,6 +1802,7 @@ CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set @@ -1732,6 +1827,7 @@ CONFIG_VIRTIO_BLK=y # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_RPMB is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_HI6421V600_IRQ is not set @@ -1748,7 +1844,9 @@ CONFIG_SRAM=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -1756,7 +1854,6 @@ CONFIG_SRAM=y # # CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -1764,12 +1861,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -1854,6 +1945,7 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y CONFIG_MII=y @@ -1873,6 +1965,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -1882,6 +1975,8 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=y CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_ALTERA_TSE is not set @@ -1907,6 +2002,7 @@ CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set @@ -1949,6 +2045,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -1984,8 +2081,12 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y CONFIG_SMSC_PHY=m @@ -1997,6 +2098,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2087,7 +2189,6 @@ CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m # CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -2111,8 +2212,10 @@ CONFIG_ATH10K_CE=y CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y @@ -2140,10 +2243,8 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set CONFIG_P54_COMMON=m CONFIG_P54_USB=m # CONFIG_P54_SPI is not set @@ -2180,6 +2281,7 @@ CONFIG_MT7663U=m CONFIG_MT7663S=m # CONFIG_MT7921S is not set # CONFIG_MT7921U is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -2207,6 +2309,11 @@ CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2214,18 +2321,28 @@ CONFIG_RTW88_CORE=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m # CONFIG_RTW88_8822CS is not set CONFIG_RTW88_8822CU=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=m @@ -2244,11 +2361,9 @@ CONFIG_WLCORE=m # CONFIG_WLCORE_SPI is not set # CONFIG_WLCORE_SDIO is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2278,7 +2393,6 @@ CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2301,7 +2415,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2349,6 +2462,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y @@ -2411,7 +2525,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2484,6 +2597,7 @@ CONFIG_HW_RANDOM_OPTEE=m # CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m +# CONFIG_HW_RANDOM_ROCKCHIP is not set CONFIG_DEVMEM=y CONFIG_DEVPORT=y # CONFIG_TCG_TPM is not set @@ -2496,7 +2610,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2578,6 +2691,7 @@ CONFIG_SPI_BITBANG=m # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_GPIO=m # CONFIG_SPI_FSL_SPI is not set @@ -2621,10 +2735,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -2638,6 +2749,7 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PTP_1588_CLOCK_KVM is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # end of PTP clock support @@ -2646,6 +2758,7 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set @@ -2686,6 +2799,7 @@ CONFIG_GPIO_DWAPB=y # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set CONFIG_GPIO_PL061=y +# CONFIG_GPIO_POLARFIRE_SOC is not set CONFIG_GPIO_ROCKCHIP=y # CONFIG_GPIO_SIFIVE is not set CONFIG_GPIO_SYSCON=y @@ -2730,6 +2844,7 @@ CONFIG_GPIO_MAX77620=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2742,9 +2857,14 @@ CONFIG_GPIO_MAX77620=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -2756,6 +2876,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2774,6 +2895,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -2802,6 +2924,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2827,9 +2950,11 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DS620 is not set @@ -2838,6 +2963,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2845,15 +2971,19 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2861,6 +2991,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -2905,14 +3036,17 @@ CONFIG_SENSORS_LM90=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -2940,6 +3074,7 @@ CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -2963,10 +3098,11 @@ CONFIG_SENSORS_INA2XX=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3034,6 +3170,7 @@ CONFIG_BCMA_BLOCKIO=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3067,12 +3204,14 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3089,7 +3228,6 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set @@ -3142,13 +3280,17 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_KHADAS_MCU is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3158,6 +3300,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3177,6 +3320,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77620 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set @@ -3195,6 +3339,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_MT6315 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3280,6 +3425,8 @@ CONFIG_CEC_NOTIFIER=y # CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -3312,6 +3459,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=m @@ -3324,7 +3472,6 @@ CONFIG_V4L2_ASYNC=y # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3515,6 +3662,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3527,6 +3678,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3548,6 +3704,7 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # # Sunxi media platform drivers # +# CONFIG_VIDEO_SYNOPSYS_HDMIRX is not set # # Texas Instruments drivers @@ -3557,6 +3714,7 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_HEVC_RFC=y CONFIG_VIDEO_HANTRO_ROCKCHIP=y # @@ -3603,7 +3761,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3612,6 +3775,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3622,6 +3786,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m @@ -3647,6 +3812,7 @@ CONFIG_VIDEO_OV2640=m # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -3665,10 +3831,16 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3713,6 +3885,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -3899,34 +4073,38 @@ CONFIG_DVB_SP2=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -3943,7 +4121,9 @@ CONFIG_ROCKCHIP_VOP=y # CONFIG_ROCKCHIP_ANALOGIX_DP is not set # CONFIG_ROCKCHIP_CDN_DP is not set CONFIG_ROCKCHIP_DW_HDMI=y +# CONFIG_ROCKCHIP_DW_HDMI_QP is not set # CONFIG_ROCKCHIP_DW_MIPI_DSI is not set +# CONFIG_ROCKCHIP_DW_MIPI_DSI2 is not set # CONFIG_ROCKCHIP_INNO_HDMI is not set # CONFIG_ROCKCHIP_LVDS is not set # CONFIG_ROCKCHIP_RGB is not set @@ -3959,12 +4139,9 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_LVDS is not set -# CONFIG_DRM_PANEL_SIMPLE is not set -CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set @@ -3972,17 +4149,21 @@ CONFIG_DRM_PANEL_EDP=y # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +CONFIG_DRM_PANEL_EDP=y +# CONFIG_DRM_PANEL_SIMPLE is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set @@ -3998,6 +4179,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4022,6 +4205,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4053,22 +4237,23 @@ CONFIG_DRM_DW_HDMI_CEC=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set CONFIG_DRM_LIMA=y # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_SMSCUFX is not set @@ -4086,10 +4271,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y @@ -4102,14 +4287,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4155,10 +4343,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4218,6 +4406,12 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_ROCKCHIP=y @@ -4229,6 +4423,7 @@ CONFIG_SND_SOC_ROCKCHIP_MAX98090=m CONFIG_SND_SOC_ROCKCHIP_RT5645=m CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m CONFIG_SND_SOC_RK3399_GRU_SOUND=m +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4248,6 +4443,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4260,6 +4456,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4267,7 +4464,11 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -4288,6 +4489,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -4298,6 +4500,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set CONFIG_SND_SOC_DA7219=m @@ -4305,7 +4508,9 @@ CONFIG_SND_SOC_DMIC=m CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=m CONFIG_SND_SOC_ES8328_I2C=m @@ -4342,7 +4547,9 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set +# CONFIG_SND_SOC_RK3308 is not set CONFIG_SND_SOC_RK3328=y # CONFIG_SND_SOC_RK817 is not set CONFIG_SND_SOC_RL6231=m @@ -4354,10 +4561,12 @@ CONFIG_SND_SOC_RT5514_SPI=m CONFIG_SND_SOC_RT5645=m # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4396,6 +4605,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4425,6 +4635,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4433,6 +4644,8 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4489,11 +4702,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4507,7 +4722,6 @@ CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y # CONFIG_HID_LED is not set -CONFIG_HID_LENOVO=y # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y @@ -4530,7 +4744,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -4568,6 +4781,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -4582,6 +4796,11 @@ CONFIG_HID_ZYDACRON=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4590,10 +4809,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4616,6 +4831,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4624,7 +4840,6 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4651,11 +4866,7 @@ CONFIG_USB_ACM=y # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4722,6 +4933,7 @@ CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -4817,7 +5029,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -4909,6 +5121,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set # CONFIG_MMC_DW_EXYNOS is not set # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y CONFIG_MMC_DW_ROCKCHIP=y # CONFIG_MMC_VUB300 is not set @@ -4947,6 +5160,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -4971,6 +5185,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -4982,11 +5197,14 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set @@ -5001,6 +5219,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5011,11 +5230,11 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_LEDS_TRIGGER_PANIC=y # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5023,6 +5242,9 @@ CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_SCRUB is not set +# CONFIG_EDAC_ECS is not set +# CONFIG_EDAC_MEM_REPAIR is not set # CONFIG_EDAC_XGENE is not set # CONFIG_EDAC_DMC520 is not set CONFIG_RTC_LIB=y @@ -5054,6 +5276,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set CONFIG_RTC_DRV_RK808=y @@ -5072,6 +5295,7 @@ CONFIG_RTC_DRV_RK808=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5079,6 +5303,7 @@ CONFIG_RTC_DRV_RK808=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5161,6 +5386,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set @@ -5193,6 +5419,7 @@ CONFIG_VFIO_GROUP=y CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=y # CONFIG_VFIO_NOIOMMU is not set +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for platform devices @@ -5209,6 +5436,7 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set @@ -5222,11 +5450,7 @@ CONFIG_VHOST_MENU=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -5236,7 +5460,6 @@ CONFIG_RTL8723BS=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -5263,35 +5486,31 @@ CONFIG_RTL8723BS=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers CONFIG_STAGING_MEDIA=y # CONFIG_VIDEO_MAX96712 is not set CONFIG_VIDEO_ROCKCHIP_VDEC=m + +# +# StarFive media platform drivers +# CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_OF_HW_PROBER is not set # CONFIG_CROS_EC is not set # CONFIG_CROS_HPS_I2C is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -5332,7 +5551,10 @@ CONFIG_COMMON_CLK_ROCKCHIP=y CONFIG_CLK_RK3328=y # CONFIG_CLK_RK3368 is not set # CONFIG_CLK_RK3399 is not set +# CONFIG_CLK_RK3528 is not set +# CONFIG_CLK_RK3562 is not set # CONFIG_CLK_RK3568 is not set +# CONFIG_CLK_RK3576 is not set # CONFIG_CLK_RK3588 is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set @@ -5357,6 +5579,7 @@ CONFIG_ARM64_ERRATUM_858921=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_ARM_MHU_V2=m +CONFIG_ARM_MHU_V3=m CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set CONFIG_ROCKCHIP_MBOX=y @@ -5387,6 +5610,7 @@ CONFIG_ROCKCHIP_IOMMU=y CONFIG_ARM_SMMU=y # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_MMU_500_CPRE_ERRATA=y CONFIG_ARM_SMMU_V3=y # CONFIG_ARM_SMMU_V3_SVA is not set # CONFIG_VIRTIO_IOMMU is not set @@ -5418,7 +5642,6 @@ CONFIG_ARM_SMMU_V3=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -5449,11 +5672,11 @@ CONFIG_ARM_SMMU_V3=y # # Qualcomm SoC drivers # +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_PM_DOMAINS=y # CONFIG_SOC_TI is not set # @@ -5462,6 +5685,35 @@ CONFIG_ROCKCHIP_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +CONFIG_ROCKCHIP_PM_DOMAINS=y +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5487,6 +5739,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -5523,6 +5776,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5559,34 +5814,46 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5598,11 +5865,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set @@ -5617,8 +5888,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5662,10 +5936,12 @@ CONFIG_ROCKCHIP_SARADC=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -5697,6 +5973,7 @@ CONFIG_ROCKCHIP_SARADC=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5708,6 +5985,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5720,17 +5998,21 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -5766,6 +6048,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -5808,8 +6091,10 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5823,8 +6108,13 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -5834,6 +6124,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -5843,11 +6134,15 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -5860,10 +6155,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -5872,6 +6168,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -5887,8 +6184,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -5896,9 +6196,11 @@ CONFIG_ROCKCHIP_SARADC=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -5908,6 +6210,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -5962,10 +6265,12 @@ CONFIG_ROCKCHIP_SARADC=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -5973,6 +6278,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -5988,6 +6294,7 @@ CONFIG_ROCKCHIP_SARADC=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6002,6 +6309,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6009,6 +6317,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6018,6 +6327,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6026,14 +6336,15 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y # CONFIG_PWM_XILINX is not set @@ -6046,6 +6357,7 @@ CONFIG_ARM_GIC=y CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y @@ -6054,6 +6366,7 @@ CONFIG_PARTITION_PERCPU=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6062,6 +6375,7 @@ CONFIG_RESET_CONTROLLER=y # CONFIG_GENERIC_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6076,7 +6390,6 @@ CONFIG_GENERIC_PHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6091,6 +6404,8 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set # CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set CONFIG_PHY_ROCKCHIP_PCIE=m +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set # CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y @@ -6107,6 +6422,7 @@ CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y # CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ARM_PMUV3=y @@ -6127,12 +6443,14 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RMEM is not set @@ -6181,6 +6499,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6193,7 +6512,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6212,10 +6530,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=y @@ -6226,6 +6544,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -6247,6 +6566,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -6260,9 +6581,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -6286,11 +6607,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -6357,7 +6678,6 @@ CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y # CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -6405,6 +6725,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -6472,6 +6793,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -6483,8 +6805,6 @@ CONFIG_SECURITY=y # CONFIG_SECURITYFS is not set # CONFIG_SECURITY_NETWORK is not set # CONFIG_SECURITY_PATH is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set @@ -6521,6 +6841,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6567,6 +6894,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=m # end of Crypto core or helper @@ -6581,7 +6909,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography @@ -6614,14 +6941,11 @@ CONFIG_CRYPTO_SM4=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_CHACHA20=m CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set CONFIG_CRYPTO_NHPOLY1305=y @@ -6660,7 +6984,6 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6671,7 +6994,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -6695,7 +7017,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6712,13 +7036,13 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y @@ -6771,6 +7095,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6788,7 +7113,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -6803,14 +7127,17 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y @@ -6819,20 +7146,13 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC7=y -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set @@ -6847,10 +7167,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -6866,20 +7187,21 @@ CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -6906,11 +7228,14 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -6929,11 +7254,14 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -6962,7 +7290,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -6972,7 +7300,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set @@ -6998,7 +7325,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7009,6 +7336,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7024,7 +7352,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7034,12 +7362,14 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y @@ -7071,13 +7401,10 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set CONFIG_SCHED_INFO=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # @@ -7129,14 +7456,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7172,3 +7502,5 @@ CONFIG_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf index ab293e229e..26a9648384 100644 --- a/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf +++ b/projects/Rockchip/devices/RK3399/linux/default/linux.aarch64.conf @@ -1,23 +1,27 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.66 Kernel Configuration +# Linux/arm64 6.15.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -63,6 +67,7 @@ CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y # end of IRQ subsystem CONFIG_GENERIC_TIME_VSYSCALL=y @@ -114,7 +119,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -133,6 +138,7 @@ CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -158,24 +164,29 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -216,16 +227,15 @@ CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -237,14 +247,14 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_SELFTEST is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # @@ -262,15 +272,14 @@ CONFIG_PROFILING=y # # CONFIG_KEXEC is not set # CONFIG_KEXEC_FILE is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -297,12 +306,14 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BLAIZE is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set @@ -315,6 +326,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # CONFIG_ARCH_NXP is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -380,11 +392,13 @@ CONFIG_ARM64_ERRATUM_1319367=y # CONFIG_CAVIUM_TX2_ERRATUM_219 is not set # CONFIG_FUJITSU_ERRATUM_010001 is not set # CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_HISILICON_ERRATUM_162100801 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set # CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set # CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set +# CONFIG_ROCKCHIP_ERRATUM_3568002 is not set # CONFIG_ROCKCHIP_ERRATUM_3588001 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set # end of ARM errata workarounds via the alternatives framework @@ -394,6 +408,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -422,6 +437,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y # CONFIG_XEN is not set CONFIG_ARCH_FORCE_MAX_ORDER=10 CONFIG_UNMAP_KERNEL_AT_EL0=y @@ -480,6 +496,7 @@ CONFIG_AS_HAS_ARMV8_5=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y # CONFIG_ARM64_E0PD is not set CONFIG_ARM64_AS_HAS_MTE=y +# CONFIG_ARM64_MTE is not set # end of ARMv8.5 architectural features # @@ -487,12 +504,28 @@ CONFIG_ARM64_AS_HAS_MTE=y # # end of ARMv8.7 architectural features +CONFIG_AS_HAS_MOPS=y + +# +# ARMv8.9 architectural features +# +CONFIG_ARM64_POE=y +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + +# +# v9.4 architectural features +# +CONFIG_ARM64_GCS=y +# end of v9.4 architectural features + CONFIG_ARM64_SVE=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -500,6 +533,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y # CONFIG_CMDLINE="" # CONFIG_EFI is not set +# CONFIG_COMPRESSED_INSTALL is not set # end of Boot options # @@ -573,18 +607,19 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_SCPI_CPUFREQ=y # end of CPU Frequency scaling # end of CPU Power Management -CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options # +CONFIG_HOTPLUG_SMT=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y # CONFIG_KPROBES is not set @@ -594,7 +629,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y @@ -612,6 +646,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -654,6 +689,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -661,13 +697,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -681,12 +721,17 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -700,10 +745,11 @@ CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -713,12 +759,10 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set @@ -727,9 +771,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_FC_APPID is not set @@ -763,6 +807,7 @@ CONFIG_LDM_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_MQ_PCI=y @@ -866,17 +911,18 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -884,7 +930,7 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y @@ -892,8 +938,9 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -910,13 +957,19 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y # CONFIG_HWPOISON_INJECT is not set CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_MM_ID=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +# CONFIG_NO_PAGE_MAPCOUNT is not set +CONFIG_PAGE_MAPCOUNT=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 @@ -928,6 +981,8 @@ CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y +CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_ARCH_HAS_PKEYS=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -940,9 +995,12 @@ CONFIG_SECRETMEM=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y +CONFIG_ARCH_HAS_USER_SHADOW_STACK=y # # Data Access Monitoring @@ -957,6 +1015,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -964,7 +1023,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -977,6 +1035,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_STATISTICS is not set CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -1014,6 +1073,7 @@ CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_AO is not set # CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y # CONFIG_IPV6_ROUTER_PREF is not set @@ -1029,7 +1089,8 @@ CONFIG_IPV6_SIT=m CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -1049,6 +1110,7 @@ CONFIG_BRIDGE_NETFILTER=m # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_BPF_LINK=y # CONFIG_NETFILTER_NETLINK_ACCT is not set @@ -1085,13 +1147,14 @@ CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y # CONFIG_NF_TABLES is not set CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XTABLES_COMPAT=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1099,6 +1162,7 @@ CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1110,11 +1174,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1169,7 +1235,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1222,6 +1305,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1243,14 +1327,16 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_SECURITY is not set # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1272,7 +1358,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m # CONFIG_IP6_NF_SECURITY is not set CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m @@ -1281,8 +1367,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1415,6 +1501,7 @@ CONFIG_BT_MTK=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1433,6 +1520,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m # CONFIG_BT_HCIBCM4377 is not set CONFIG_BT_HCIBPA10X=m @@ -1446,6 +1534,7 @@ CONFIG_BT_MTKUART=m CONFIG_BT_HCIRSI=m # CONFIG_BT_VIRTIO is not set # CONFIG_BT_NXPUART is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1453,10 +1542,8 @@ CONFIG_BT_HCIRSI=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1466,8 +1553,6 @@ CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y @@ -1475,7 +1560,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=m @@ -1503,6 +1587,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1518,9 +1603,12 @@ CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set +# CONFIG_PCI_DOE is not set # CONFIG_PCI_IOV is not set +# CONFIG_PCI_NPEM is not set # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set +# CONFIG_PCIE_TPH is not set CONFIG_PCI_DYNAMIC_OF_NODES=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 @@ -1534,7 +1622,6 @@ CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_PCI_HOST_THUNDER_ECAM is not set # CONFIG_PCI_FTPCI100 is not set # CONFIG_PCI_HOST_GENERIC is not set -# CONFIG_PCIE_MICROCHIP_HOST is not set CONFIG_PCIE_ROCKCHIP=y CONFIG_PCIE_ROCKCHIP_HOST=y # CONFIG_PCI_XGENE is not set @@ -1544,13 +1631,13 @@ CONFIG_PCIE_ROCKCHIP_HOST=y # Cadence-based PCIe controllers # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set -# CONFIG_PCI_J721E_HOST is not set # end of Cadence-based PCIe controllers # # DesignWare-based PCIe controllers # # CONFIG_PCIE_AL is not set +# CONFIG_PCIE_AMD_MDB is not set # CONFIG_PCI_MESON is not set # CONFIG_PCI_HISI is not set # CONFIG_PCIE_KIRIN is not set @@ -1562,6 +1649,12 @@ CONFIG_PCIE_ROCKCHIP_HOST=y # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1576,6 +1669,7 @@ CONFIG_PCIE_ROCKCHIP_HOST=y # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +# CONFIG_PCI_PWRCTL_SLOT is not set # CONFIG_CXL_BUS is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1609,6 +1703,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1626,7 +1721,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_MHI_BUS is not set @@ -1651,12 +1745,18 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_ARM_FFA_TRANSPORT is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1667,6 +1767,7 @@ CONFIG_ARM_SMCCC_SOC_ID=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set CONFIG_MTD=y # CONFIG_MTD_TESTS is not set @@ -1674,7 +1775,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1719,7 +1819,6 @@ CONFIG_MTD_CFI_I2=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1788,6 +1887,7 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set @@ -1810,8 +1910,9 @@ CONFIG_NVME_MULTIPATH=y CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m # CONFIG_NVME_TCP is not set -# CONFIG_NVME_AUTH is not set +# CONFIG_NVME_HOST_AUTH is not set CONFIG_NVME_TARGET=m +# CONFIG_NVME_TARGET_DEBUGFS is not set # CONFIG_NVME_TARGET_PASSTHRU is not set CONFIG_NVME_TARGET_LOOP=m CONFIG_NVME_TARGET_FC=m @@ -1826,6 +1927,7 @@ CONFIG_NVME_TARGET_FC=m # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -1846,7 +1948,10 @@ CONFIG_SRAM=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set +# CONFIG_MCHP_LAN966X_PCI is not set # CONFIG_C2PORT is not set # @@ -1854,22 +1959,14 @@ CONFIG_SRAM=y # # CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m +CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support # CONFIG_CB710_CORE is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set CONFIG_ALTERA_STAPL=m @@ -1883,6 +1980,7 @@ CONFIG_ALTERA_STAPL=m # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -2099,6 +2197,7 @@ CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set @@ -2128,6 +2227,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -2137,6 +2237,8 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=y CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set # CONFIG_ARCNET is not set CONFIG_ETHERNET=y CONFIG_NET_VENDOR_3COM=y @@ -2178,7 +2280,6 @@ CONFIG_NET_VENDOR_DEC=y # CONFIG_NET_TULIP is not set CONFIG_NET_VENDOR_DLINK=y # CONFIG_DL2K is not set -# CONFIG_SUNDANCE is not set CONFIG_NET_VENDOR_EMULEX=y # CONFIG_BE2NET is not set # CONFIG_NET_VENDOR_ENGLEDER is not set @@ -2194,6 +2295,7 @@ CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set @@ -2228,6 +2330,7 @@ CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set # CONFIG_8139TOO is not set # CONFIG_R8169 is not set +# CONFIG_RTASE is not set # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_SAMSUNG is not set @@ -2257,6 +2360,7 @@ CONFIG_NET_VENDOR_SUN=y # CONFIG_NET_VENDOR_SYNOPSYS is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set +# CONFIG_TEHUTI_TN40 is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set # CONFIG_TLAN is not set @@ -2278,6 +2382,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2313,8 +2418,12 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y # CONFIG_RENESAS_PHY is not set CONFIG_ROCKCHIP_PHY=y CONFIG_SMSC_PHY=m @@ -2326,6 +2435,7 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2421,7 +2531,6 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m CONFIG_ATH9K_PCI=y # CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -2449,10 +2558,12 @@ CONFIG_ATH10K_PCI=m CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set +# CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_ATMEL is not set CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=m @@ -2483,8 +2594,6 @@ CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y CONFIG_BRCMFMAC_PCIE=y # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -# CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set @@ -2502,6 +2611,7 @@ CONFIG_IWLWIFI=m CONFIG_IWLWIFI_LEDS=y CONFIG_IWLDVM=m CONFIG_IWLMVM=m +CONFIG_IWLMLD=m CONFIG_IWLWIFI_OPMODE_MODULAR=y # @@ -2511,8 +2621,6 @@ CONFIG_IWLWIFI_OPMODE_MODULAR=y # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set -# CONFIG_HERMES is not set CONFIG_P54_COMMON=m CONFIG_P54_USB=m # CONFIG_P54_PCI is not set @@ -2559,6 +2667,8 @@ CONFIG_MT7915E=m # CONFIG_MT7921S is not set # CONFIG_MT7921U is not set # CONFIG_MT7996E is not set +# CONFIG_MT7925E is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -2599,6 +2709,11 @@ CONFIG_RTL_CARDS=m # CONFIG_RTL8192EE is not set # CONFIG_RTL8821AE is not set # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -2607,8 +2722,13 @@ CONFIG_RTW88_PCI=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m CONFIG_RTW88_8822BE=m # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m @@ -2617,12 +2737,18 @@ CONFIG_RTW88_8822CE=m CONFIG_RTW88_8822CU=m CONFIG_RTW88_8723DE=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m CONFIG_RTW88_8821CE=m # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +# CONFIG_RTW88_8814AE is not set +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=m @@ -2641,12 +2767,10 @@ CONFIG_WLCORE=m # CONFIG_WLCORE_SPI is not set # CONFIG_WLCORE_SDIO is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y # CONFIG_QTNFMAC_PCIE is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2677,7 +2801,6 @@ CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2700,7 +2823,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2748,6 +2870,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y @@ -2813,7 +2936,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -2895,6 +3017,7 @@ CONFIG_HW_RANDOM_OPTEE=m # CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m # CONFIG_HW_RANDOM_CN10K is not set +# CONFIG_HW_RANDOM_ROCKCHIP is not set # CONFIG_APPLICOM is not set CONFIG_DEVMEM=y CONFIG_DEVPORT=y @@ -2908,7 +3031,6 @@ CONFIG_DEVPORT=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -3012,6 +3134,7 @@ CONFIG_SPI_BITBANG=m # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_GPIO=m # CONFIG_SPI_FSL_SPI is not set @@ -3020,7 +3143,6 @@ CONFIG_SPI_GPIO=m # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_PXA2XX is not set CONFIG_SPI_ROCKCHIP=m # CONFIG_SPI_ROCKCHIP_SFC is not set # CONFIG_SPI_SC18IS602 is not set @@ -3058,10 +3180,7 @@ CONFIG_PPS=y # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_GPIO is not set - -# -# PPS generators support -# +# CONFIG_PPS_GENERATOR is not set # # PTP clock support @@ -3075,6 +3194,7 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PTP_1588_CLOCK_KVM is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_OCP is not set # end of PTP clock support @@ -3084,6 +3204,7 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set @@ -3125,6 +3246,7 @@ CONFIG_GPIO_DWAPB=y # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set CONFIG_GPIO_PL061=y +# CONFIG_GPIO_POLARFIRE_SOC is not set CONFIG_GPIO_ROCKCHIP=y # CONFIG_GPIO_SIFIVE is not set CONFIG_GPIO_SYSCON=y @@ -3178,6 +3300,7 @@ CONFIG_GPIO_MAX77620=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -3190,9 +3313,14 @@ CONFIG_GPIO_MAX77620=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -3204,6 +3332,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -3222,6 +3351,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -3250,6 +3380,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3275,9 +3406,11 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DRIVETEMP is not set @@ -3288,6 +3421,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -3295,15 +3429,19 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -3311,6 +3449,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -3355,14 +3494,17 @@ CONFIG_SENSORS_LM90=m # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -3391,6 +3533,7 @@ CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3416,10 +3559,11 @@ CONFIG_SENSORS_INA2XX=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3505,6 +3649,7 @@ CONFIG_BCMA_DRIVER_PCI=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -3541,12 +3686,14 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3563,7 +3710,6 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set @@ -3618,13 +3764,17 @@ CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_KHADAS_MCU is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set +# CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # end of Multifunction device drivers @@ -3634,6 +3784,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -3653,6 +3804,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77620 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set @@ -3671,6 +3823,7 @@ CONFIG_REGULATOR_MP8859=y # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_MT6315 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3756,6 +3909,8 @@ CONFIG_CEC_NOTIFIER=y # CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -3788,6 +3943,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=m @@ -3800,7 +3956,6 @@ CONFIG_V4L2_ASYNC=y # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -3926,6 +4081,7 @@ CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # +# CONFIG_VIDEO_MGB4 is not set # CONFIG_VIDEO_SOLO6X10 is not set # CONFIG_VIDEO_TW5864 is not set # CONFIG_VIDEO_TW68 is not set @@ -4046,6 +4202,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -4058,6 +4218,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -4080,6 +4245,7 @@ CONFIG_VIDEO_ROCKCHIP_ISP1=m # # Sunxi media platform drivers # +# CONFIG_VIDEO_SYNOPSYS_HDMIRX is not set # # Texas Instruments drivers @@ -4089,6 +4255,7 @@ CONFIG_VIDEO_ROCKCHIP_ISP1=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_HEVC_RFC=y CONFIG_VIDEO_HANTRO_ROCKCHIP=y # @@ -4139,7 +4306,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=y CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -4148,6 +4320,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -4158,6 +4331,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m @@ -4183,6 +4357,7 @@ CONFIG_VIDEO_OV2640=m # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -4201,10 +4376,16 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -4250,6 +4431,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -4453,36 +4636,40 @@ CONFIG_DVB_SP2=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y CONFIG_DRM_MIPI_DBI=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_PANIC is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y + +# +# Supported DRM clients +# CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + CONFIG_DRM_LOAD_EDID_FIRMWARE=y -CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips - # # ARM devices # @@ -4494,15 +4681,18 @@ CONFIG_DRM_SCHED=y # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set CONFIG_DRM_ROCKCHIP=y CONFIG_ROCKCHIP_VOP=y # CONFIG_ROCKCHIP_VOP2 is not set # CONFIG_ROCKCHIP_ANALOGIX_DP is not set -# CONFIG_ROCKCHIP_CDN_DP is not set +CONFIG_ROCKCHIP_CDN_DP=y CONFIG_ROCKCHIP_DW_HDMI=y +# CONFIG_ROCKCHIP_DW_HDMI_QP is not set CONFIG_ROCKCHIP_DW_MIPI_DSI=y +# CONFIG_ROCKCHIP_DW_MIPI_DSI2 is not set # CONFIG_ROCKCHIP_INNO_HDMI is not set # CONFIG_ROCKCHIP_LVDS is not set # CONFIG_ROCKCHIP_RGB is not set @@ -4524,32 +4714,40 @@ CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=y CONFIG_DRM_PANEL_BOE_HIMAX8279D=y +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=y -CONFIG_DRM_PANEL_DSI_CM=y -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -# CONFIG_DRM_PANEL_EDP is not set +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set CONFIG_DRM_PANEL_EBBG_FT8719=y CONFIG_DRM_PANEL_ELIDA_KD35T133=y CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=y +CONFIG_DRM_PANEL_DSI_CM=y +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set CONFIG_DRM_PANEL_ILITEK_IL9322=y CONFIG_DRM_PANEL_ILITEK_ILI9341=y +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set CONFIG_DRM_PANEL_ILITEK_ILI9881C=y +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set CONFIG_DRM_PANEL_INNOLUX_EJ030NA=y CONFIG_DRM_PANEL_INNOLUX_P079ZCA=y # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set CONFIG_DRM_PANEL_JDI_LT070ME05000=y CONFIG_DRM_PANEL_JDI_R63452=y CONFIG_DRM_PANEL_KHADAS_TS050=y CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=y CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=y CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=y -CONFIG_DRM_PANEL_SAMSUNG_LD9040=y +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set CONFIG_DRM_PANEL_LG_LB035Q02=y CONFIG_DRM_PANEL_LG_LG4573=y +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=y CONFIG_DRM_PANEL_NEC_NL8048HL11=y # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set CONFIG_DRM_PANEL_NEWVISION_NV3052C=y @@ -4558,8 +4756,8 @@ CONFIG_DRM_PANEL_NOVATEK_NT35560=y CONFIG_DRM_PANEL_NOVATEK_NT35950=y # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set CONFIG_DRM_PANEL_NOVATEK_NT36672A=y +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set CONFIG_DRM_PANEL_NOVATEK_NT39016=y -CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=y CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=y # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set CONFIG_DRM_PANEL_ORISETECH_OTM8009A=y @@ -4567,19 +4765,28 @@ CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=y CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=y CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=y CONFIG_DRM_PANEL_RAYDIUM_RM67191=y +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set CONFIG_DRM_PANEL_RAYDIUM_RM68200=y +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set CONFIG_DRM_PANEL_RONBO_RB070D30=y +# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=y CONFIG_DRM_PANEL_SAMSUNG_DB7430=y +CONFIG_DRM_PANEL_SAMSUNG_LD9040=y +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=y +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI is not set CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y CONFIG_DRM_PANEL_SEIKO_43WVF1G=y @@ -4594,14 +4801,19 @@ CONFIG_DRM_PANEL_SONY_ACX565AKM=y # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=y # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +# CONFIG_DRM_PANEL_EDP is not set +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SUMMIT is not set +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set CONFIG_DRM_PANEL_TDO_TL070WSH30=y CONFIG_DRM_PANEL_TPO_TD028TTEC1=y CONFIG_DRM_PANEL_TPO_TD043MTEA1=y CONFIG_DRM_PANEL_TPO_TPG110=y CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=y -CONFIG_DRM_PANEL_VISIONOX_RM69299=y -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set +CONFIG_DRM_PANEL_VISIONOX_RM69299=y +# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set +# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y CONFIG_DRM_PANEL_XINPENG_XPP055C272=y # end of Display Panels @@ -4615,6 +4827,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -4639,6 +4853,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -4657,7 +4872,6 @@ CONFIG_DRM_DW_HDMI_CEC=y CONFIG_DRM_DW_MIPI_DSI=y # end of Display Interface Bridges -# CONFIG_DRM_LOONGSON is not set # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_HISI_HIBMC is not set # CONFIG_DRM_HISI_KIRIN is not set @@ -4675,15 +4889,17 @@ CONFIG_DRM_DW_MIPI_DSI=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_LIMA is not set CONFIG_DRM_PANFROST=y +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -4692,7 +4908,6 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_FB=y # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set @@ -4734,10 +4949,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y @@ -4750,14 +4965,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=y # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -4803,10 +5021,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -4931,6 +5149,12 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_ROCKCHIP=y @@ -4942,6 +5166,7 @@ CONFIG_SND_SOC_ROCKCHIP_MAX98090=m CONFIG_SND_SOC_ROCKCHIP_RT5645=m CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m CONFIG_SND_SOC_RK3399_GRU_SOUND=m +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -4961,6 +5186,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -4973,6 +5199,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -4980,7 +5207,11 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -5001,6 +5232,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -5011,6 +5243,7 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set CONFIG_SND_SOC_DA7219=m @@ -5018,7 +5251,9 @@ CONFIG_SND_SOC_DMIC=m CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set CONFIG_SND_SOC_ES8316=y +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set CONFIG_SND_SOC_ES8328=m CONFIG_SND_SOC_ES8328_I2C=m @@ -5055,7 +5290,9 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set +# CONFIG_SND_SOC_RK3308 is not set # CONFIG_SND_SOC_RK3328 is not set CONFIG_SND_SOC_RK817=m CONFIG_SND_SOC_RL6231=m @@ -5067,10 +5304,12 @@ CONFIG_SND_SOC_RT5514_SPI=m CONFIG_SND_SOC_RT5645=m # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -5109,6 +5348,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -5138,6 +5378,7 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -5146,6 +5387,8 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -5202,11 +5445,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set CONFIG_HID_KYE=y +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -5220,7 +5465,6 @@ CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y # CONFIG_HID_LED is not set -CONFIG_HID_LENOVO=y # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y @@ -5243,7 +5487,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set CONFIG_HID_ORTEK=y -CONFIG_HID_OUYA=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y @@ -5281,6 +5524,7 @@ CONFIG_HID_TOPSEED=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y # CONFIG_HID_ZEROPLUS is not set CONFIG_HID_ZYDACRON=y @@ -5295,6 +5539,11 @@ CONFIG_HID_ZYDACRON=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -5303,10 +5552,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -5316,6 +5561,7 @@ CONFIG_USB_ULPI_BUS=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +# CONFIG_USB_PCI_AMD is not set CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # @@ -5330,6 +5576,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -5369,11 +5616,7 @@ CONFIG_USB_ACM=y # CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -5443,6 +5686,7 @@ CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -5538,7 +5782,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -5621,7 +5865,12 @@ CONFIG_TYPEC_FUSB302=m # CONFIG_TYPEC_MUX_FSA4480 is not set # CONFIG_TYPEC_MUX_GPIO_SBU is not set # CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_MUX_IT5205 is not set # CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PS883X is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_TUSB1046 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # @@ -5629,6 +5878,7 @@ CONFIG_TYPEC_FUSB302=m # CONFIG_TYPEC_DP_ALTMODE=y # CONFIG_TYPEC_NVIDIA_ALTMODE is not set +# CONFIG_TYPEC_TBT_ALTMODE is not set # end of USB Type-C Alternate Mode drivers CONFIG_USB_ROLE_SWITCH=y @@ -5665,6 +5915,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set # CONFIG_MMC_DW_EXYNOS is not set # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y # CONFIG_MMC_DW_PCI is not set CONFIG_MMC_DW_ROCKCHIP=y @@ -5705,6 +5956,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -5729,6 +5981,7 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -5740,11 +5993,14 @@ CONFIG_LEDS_SYSCON=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # CONFIG_LEDS_QCOM_LPG is not set @@ -5760,6 +6016,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -5770,11 +6027,11 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_LEDS_TRIGGER_PANIC=y # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -5782,6 +6039,9 @@ CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_SCRUB is not set +# CONFIG_EDAC_ECS is not set +# CONFIG_EDAC_MEM_REPAIR is not set # CONFIG_EDAC_THUNDERX is not set # CONFIG_EDAC_XGENE is not set # CONFIG_EDAC_DMC520 is not set @@ -5814,6 +6074,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set CONFIG_RTC_DRV_RK808=y @@ -5832,6 +6093,7 @@ CONFIG_RTC_DRV_RK808=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5839,6 +6101,7 @@ CONFIG_RTC_DRV_RK808=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -5922,6 +6185,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set @@ -5956,11 +6220,13 @@ CONFIG_VFIO_GROUP=y CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=y # CONFIG_VFIO_NOIOMMU is not set +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for PCI devices # # CONFIG_VFIO_PCI is not set +# CONFIG_NVGRACE_GPU_VFIO_PCI is not set # end of VFIO support for PCI devices # @@ -5979,6 +6245,7 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set @@ -5992,14 +6259,7 @@ CONFIG_VHOST_MENU=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTL8192U is not set -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -# CONFIG_R8712U is not set -# CONFIG_RTS5208 is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set # # IIO staging drivers @@ -6009,7 +6269,6 @@ CONFIG_RTL8723BS=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -6036,12 +6295,6 @@ CONFIG_RTL8723BS=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set @@ -6052,24 +6305,24 @@ CONFIG_DVB_AV7110=m CONFIG_DVB_SP8870=m # CONFIG_VIDEO_MAX96712 is not set CONFIG_VIDEO_ROCKCHIP_VDEC=m + +# +# StarFive media platform drivers +# CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set -# CONFIG_QLGE is not set # CONFIG_VME_BUS is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_SURFACE_PLATFORMS is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -6110,7 +6363,10 @@ CONFIG_COMMON_CLK_ROCKCHIP=y # CONFIG_CLK_RK3328 is not set # CONFIG_CLK_RK3368 is not set CONFIG_CLK_RK3399=y +# CONFIG_CLK_RK3528 is not set +# CONFIG_CLK_RK3562 is not set # CONFIG_CLK_RK3568 is not set +# CONFIG_CLK_RK3576 is not set # CONFIG_CLK_RK3588 is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set @@ -6134,6 +6390,7 @@ CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_ARM_MHU_V2=m +CONFIG_ARM_MHU_V3=m CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set # CONFIG_ROCKCHIP_MBOX is not set @@ -6164,6 +6421,7 @@ CONFIG_ROCKCHIP_IOMMU=y CONFIG_ARM_SMMU=y # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_MMU_500_CPRE_ERRATA=y CONFIG_ARM_SMMU_V3=y # CONFIG_ARM_SMMU_V3_SVA is not set # CONFIG_VIRTIO_IOMMU is not set @@ -6195,7 +6453,6 @@ CONFIG_ARM_SMMU_V3=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -6226,11 +6483,11 @@ CONFIG_ARM_SMMU_V3=y # # Qualcomm SoC drivers # +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_PM_DOMAINS=y # CONFIG_SOC_TI is not set # @@ -6239,6 +6496,35 @@ CONFIG_ROCKCHIP_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +CONFIG_ROCKCHIP_PM_DOMAINS=y +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -6264,6 +6550,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_RT8973A is not set @@ -6301,6 +6588,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -6337,34 +6626,46 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -6376,11 +6677,15 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set @@ -6395,8 +6700,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -6440,10 +6748,12 @@ CONFIG_ROCKCHIP_SARADC=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -6475,6 +6785,7 @@ CONFIG_ROCKCHIP_SARADC=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -6486,6 +6797,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -6498,17 +6810,21 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -6544,6 +6860,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -6586,8 +6903,10 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -6601,8 +6920,13 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -6612,6 +6936,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -6621,11 +6946,15 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -6638,10 +6967,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -6650,6 +6980,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -6665,8 +6996,11 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -6674,9 +7008,11 @@ CONFIG_ROCKCHIP_SARADC=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -6686,6 +7022,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -6740,10 +7077,12 @@ CONFIG_ROCKCHIP_SARADC=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6751,6 +7090,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -6766,6 +7106,7 @@ CONFIG_ROCKCHIP_SARADC=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -6780,6 +7121,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -6787,6 +7129,7 @@ CONFIG_ROCKCHIP_SARADC=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -6796,6 +7139,7 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -6804,16 +7148,17 @@ CONFIG_ROCKCHIP_SARADC=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y # CONFIG_PWM_XILINX is not set @@ -6827,7 +7172,7 @@ CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y @@ -6836,6 +7181,7 @@ CONFIG_PARTITION_PERCPU=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set @@ -6845,6 +7191,7 @@ CONFIG_RESET_CONTROLLER=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -6859,7 +7206,6 @@ CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -6874,9 +7220,12 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set # CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set # CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y +# CONFIG_PHY_ROCKCHIP_USBDP is not set # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_TUSB1210 is not set # end of PHY Subsystem @@ -6890,6 +7239,7 @@ CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y # CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ARM_PMUV3=y @@ -6897,6 +7247,7 @@ CONFIG_ARM_PMUV3=y # CONFIG_ARM_SPE_PMU is not set # CONFIG_HISI_PCIE_PMU is not set # CONFIG_HNS3_PMU is not set +# CONFIG_DWC_PCIE_PMU is not set # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set # end of Performance monitor support @@ -6913,12 +7264,14 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types CONFIG_NVMEM_RMEM=m @@ -6968,6 +7321,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -6980,7 +7334,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -6999,10 +7352,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=y @@ -7013,6 +7366,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -7034,6 +7388,8 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -7047,9 +7403,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -7073,11 +7429,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -7144,7 +7500,6 @@ CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_RAM=y # CONFIG_PSTORE_BLK is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -7192,6 +7547,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -7259,6 +7615,7 @@ CONFIG_IO_WQ=y CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set CONFIG_KEY_DH_OPERATIONS=y @@ -7270,8 +7627,6 @@ CONFIG_SECURITY=y # CONFIG_SECURITYFS is not set # CONFIG_SECURITY_NETWORK is not set # CONFIG_SECURITY_PATH is not set -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set @@ -7308,6 +7663,13 @@ CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -7354,6 +7716,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_ENGINE=m # end of Crypto core or helper @@ -7368,7 +7731,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography @@ -7401,14 +7763,11 @@ CONFIG_CRYPTO_SM4=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_CHACHA20=m CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set # CONFIG_CRYPTO_XTS is not set CONFIG_CRYPTO_NHPOLY1305=y @@ -7447,7 +7806,6 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -7458,7 +7816,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -7482,7 +7839,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -7499,13 +7858,13 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=m # # Accelerated Cryptographic Algorithms for CPU (arm64) # CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_POLY1305_NEON=y +CONFIG_CRYPTO_POLY1305_NEON=m CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y @@ -7537,6 +7896,7 @@ CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -7567,6 +7927,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -7584,7 +7945,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -7599,14 +7959,17 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y @@ -7615,20 +7978,13 @@ CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y CONFIG_CRC7=y -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set @@ -7643,10 +7999,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -7663,20 +8020,21 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -7703,11 +8061,14 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -7726,11 +8087,14 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -7759,7 +8123,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7769,7 +8133,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set @@ -7795,7 +8158,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7806,6 +8169,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -7821,7 +8185,7 @@ CONFIG_SLUB_DEBUG=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set -CONFIG_GENERIC_PTDUMP=y +CONFIG_ARCH_HAS_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set @@ -7831,12 +8195,14 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y @@ -7868,13 +8234,10 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -# CONFIG_SCHED_DEBUG is not set CONFIG_SCHED_INFO=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set - # # Lock Debugging (spinlocks, mutexes, etc...) # @@ -7926,14 +8289,17 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y +CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y +CONFIG_HAVE_FTRACE_GRAPH_FUNC=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7969,3 +8335,5 @@ CONFIG_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch index 517eaf53c0..fbb292deb6 100644 --- a/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch +++ b/projects/Rockchip/patches/linux/default/linux-0002-rockchip-from-list.patch @@ -26,7 +26,7 @@ diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index ef53a2578824..d4c53074154a 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c -@@ -1358,6 +1358,14 @@ void mmc_power_off(struct mmc_host *host) +@@ -1368,6 +1368,14 @@ void mmc_power_off(struct mmc_host *host) if (host->ios.power_mode == MMC_POWER_OFF) return; @@ -42,90 +42,3 @@ index ef53a2578824..d4c53074154a 100644 host->ios.clock = 0; -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Alex Bee -Date: Wed, 23 Jun 2021 16:59:18 +0200 -Subject: [PATCH] arm64: dts: rockchip: Add sdmmc_ext for RK3328 - -RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some -boards have sdio wifi connected to it. In order to use it -one would have to add the pinctrls from sdmmc0ext group which -is done on board level. - -Signed-off-by: Alex Bee ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 49ae15708a0b..60348d517efb 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -993,6 +993,20 @@ usb_host0_ohci: usb@ff5d0000 { - status = "disabled"; - }; - -+ sdmmc_ext: mmc@ff5f0000 { -+ compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; -+ reg = <0x0 0xff5f0000 0x0 0x4000>; -+ interrupts = ; -+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, -+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; -+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; -+ fifo-depth = <0x100>; -+ max-frequency = <150000000>; -+ resets = <&cru SRST_SDMMCEXT>; -+ reset-names = "reset"; -+ status = "disabled"; -+ }; -+ - usbdrd3: usb@ff600000 { - compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; - reg = <0x0 0xff600000 0x0 0x100000>; - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Alex Bee -Date: Wed, 23 Jun 2021 17:02:08 +0200 -Subject: [PATCH] arm64: dts: rockchip: Add sdmmc/sdio/emmc reset controls for - RK3328 - -The DW MCI controller driver will use them to reset the IP block before -initialisation. - -Fixes: d717f7352ec6 ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs") -Signed-off-by: Alex Bee ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -index 60348d517efb..d7e44d174d7b 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -871,6 +871,8 @@ sdmmc: mmc@ff500000 { - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; -+ resets = <&cru SRST_MMC0>; -+ reset-names = "reset"; - status = "disabled"; - }; - -@@ -883,6 +885,8 @@ sdio: mmc@ff510000 { - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; -+ resets = <&cru SRST_SDIO>; -+ reset-names = "reset"; - status = "disabled"; - }; - -@@ -895,6 +899,8 @@ emmc: mmc@ff520000 { - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; -+ resets = <&cru SRST_EMMC>; -+ reset-names = "reset"; - status = "disabled"; - }; - diff --git a/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch b/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch deleted file mode 100644 index 2c8088f906..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-0020-drm-from-list.patch +++ /dev/null @@ -1,236 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 6 Jul 2020 22:30:13 +0000 -Subject: [PATCH] drm: drm_fourcc: add NV20 and NV30 YUV formats - -DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled -variant of NV15, a 10-bit 2-plane YUV format that has no padding between -components. Instead, luminance and chrominance samples are grouped into 4s -so that each group is packed into an integer number of bytes: - -YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes - -The '20' and '30' suffix refers to the optimum effective bits per pixel -which is achieved when the total number of luminance samples is a multiple -of 4. - -V2: Added NV30 format - -Signed-off-by: Jonas Karlman -Reviewed-by: Sandy Huang ---- - drivers/gpu/drm/drm_fourcc.c | 8 ++++++++ - include/uapi/drm/drm_fourcc.h | 2 ++ - 2 files changed, 10 insertions(+) - -diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c -index 07741b678798..5ec38456dc5d 100644 ---- a/drivers/gpu/drm/drm_fourcc.c -+++ b/drivers/gpu/drm/drm_fourcc.c -@@ -261,6 +261,14 @@ const struct drm_format_info *__drm_format_info(u32 format) - .num_planes = 2, .char_per_block = { 5, 5, 0 }, - .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, - .vsub = 2, .is_yuv = true }, -+ { .format = DRM_FORMAT_NV20, .depth = 0, -+ .num_planes = 2, .char_per_block = { 5, 5, 0 }, -+ .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2, -+ .vsub = 1, .is_yuv = true }, -+ { .format = DRM_FORMAT_NV30, .depth = 0, -+ .num_planes = 2, .char_per_block = { 5, 5, 0 }, -+ .block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 1, -+ .vsub = 1, .is_yuv = true }, - { .format = DRM_FORMAT_Q410, .depth = 0, - .num_planes = 3, .char_per_block = { 2, 2, 2 }, - .block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0, -diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h -index 0206f812c569..fa49ee98f275 100644 ---- a/include/uapi/drm/drm_fourcc.h -+++ b/include/uapi/drm/drm_fourcc.h -@@ -285,6 +285,8 @@ extern "C" { - * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian - */ - #define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */ -+#define DRM_FORMAT_NV20 fourcc_code('N', 'V', '2', '0') /* 2x1 subsampled Cr:Cb plane */ -+#define DRM_FORMAT_NV30 fourcc_code('N', 'V', '3', '0') /* non-subsampled Cr:Cb plane */ - - /* - * 2 plane YCbCr MSB aligned - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 6 Jul 2020 22:30:13 +0000 -Subject: [PATCH] drm: rockchip: add NV15, NV20 and NV30 support - -Add support for displaying 10-bit 4:2:0 and 4:2:2 formats produced by the -Rockchip Video Decoder on RK322X, RK3288, RK3328, RK3368 and RK3399. -Also add support for 10-bit 4:4:4 format while at it. - -V2: Added NV30 support - -Signed-off-by: Jonas Karlman -Reviewed-by: Sandy Huang ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 29 +++++++++++++++++-- - drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + - drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 32 +++++++++++++++++---- - 3 files changed, 54 insertions(+), 8 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index d32117633efe..9e71263ac770 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -280,6 +280,18 @@ static bool has_uv_swapped(uint32_t format) - } - } - -+static bool is_fmt_10(uint32_t format) -+{ -+ switch (format) { -+ case DRM_FORMAT_NV15: -+ case DRM_FORMAT_NV20: -+ case DRM_FORMAT_NV30: -+ return true; -+ default: -+ return false; -+ } -+} -+ - static enum vop_data_format vop_convert_format(uint32_t format) - { - switch (format) { -@@ -295,12 +307,15 @@ static enum vop_data_format vop_convert_format(uint32_t format) - case DRM_FORMAT_BGR565: - return VOP_FMT_RGB565; - case DRM_FORMAT_NV12: -+ case DRM_FORMAT_NV15: - case DRM_FORMAT_NV21: - return VOP_FMT_YUV420SP; - case DRM_FORMAT_NV16: -+ case DRM_FORMAT_NV20: - case DRM_FORMAT_NV61: - return VOP_FMT_YUV422SP; - case DRM_FORMAT_NV24: -+ case DRM_FORMAT_NV30: - case DRM_FORMAT_NV42: - return VOP_FMT_YUV444SP; - default: -@@ -954,7 +969,12 @@ static void vop_plane_atomic_update(struct drm_plane *plane, - dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; - dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff); - -- offset = (src->x1 >> 16) * fb->format->cpp[0]; -+ if (fb->format->block_w[0]) -+ offset = (src->x1 >> 16) * fb->format->char_per_block[0] / -+ fb->format->block_w[0]; -+ else -+ offset = (src->x1 >> 16) * fb->format->cpp[0]; -+ - offset += (src->y1 >> 16) * fb->pitches[0]; - dma_addr = rk_obj->dma_addr + offset + fb->offsets[0]; - -@@ -980,6 +1000,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, - } - - VOP_WIN_SET(vop, win, format, format); -+ VOP_WIN_SET(vop, win, fmt_10, is_fmt_10(fb->format->format)); - VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); - VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); - VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); -@@ -996,7 +1017,11 @@ static void vop_plane_atomic_update(struct drm_plane *plane, - uv_obj = fb->obj[1]; - rk_uv_obj = to_rockchip_obj(uv_obj); - -- offset = (src->x1 >> 16) * bpp / hsub; -+ if (fb->format->block_w[1]) -+ offset = (src->x1 >> 16) * bpp / -+ fb->format->block_w[1] / hsub; -+ else -+ offset = (src->x1 >> 16) * bpp / hsub; - offset += (src->y1 >> 16) * fb->pitches[1] / vsub; - - dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -index 8502849833d9..b6eea31109d5 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h -@@ -181,6 +181,7 @@ struct vop_win_phy { - struct vop_reg enable; - struct vop_reg gate; - struct vop_reg format; -+ struct vop_reg fmt_10; - struct vop_reg rb_swap; - struct vop_reg uv_swap; - struct vop_reg act_info; -diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -index 014f99e8928e..16e6aa01e400 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c -@@ -53,6 +53,23 @@ static const uint32_t formats_win_full[] = { - DRM_FORMAT_NV42, - }; - -+static const uint32_t formats_win_full_10[] = { -+ DRM_FORMAT_XRGB8888, -+ DRM_FORMAT_ARGB8888, -+ DRM_FORMAT_XBGR8888, -+ DRM_FORMAT_ABGR8888, -+ DRM_FORMAT_RGB888, -+ DRM_FORMAT_BGR888, -+ DRM_FORMAT_RGB565, -+ DRM_FORMAT_BGR565, -+ DRM_FORMAT_NV12, -+ DRM_FORMAT_NV16, -+ DRM_FORMAT_NV24, -+ DRM_FORMAT_NV15, -+ DRM_FORMAT_NV20, -+ DRM_FORMAT_NV30, -+}; -+ - static const uint64_t format_modifiers_win_full[] = { - DRM_FORMAT_MOD_LINEAR, - DRM_FORMAT_MOD_INVALID, -@@ -621,11 +638,12 @@ static const struct vop_scl_regs rk3288_win_full_scl = { - - static const struct vop_win_phy rk3288_win01_data = { - .scl = &rk3288_win_full_scl, -- .data_formats = formats_win_full, -- .nformats = ARRAY_SIZE(formats_win_full), -+ .data_formats = formats_win_full_10, -+ .nformats = ARRAY_SIZE(formats_win_full_10), - .format_modifiers = format_modifiers_win_full, - .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), -+ .fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4), - .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), - .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15), - .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), -@@ -756,11 +774,12 @@ static const struct vop_intr rk3368_vop_intr = { - - static const struct vop_win_phy rk3368_win01_data = { - .scl = &rk3288_win_full_scl, -- .data_formats = formats_win_full, -- .nformats = ARRAY_SIZE(formats_win_full), -+ .data_formats = formats_win_full_10, -+ .nformats = ARRAY_SIZE(formats_win_full_10), - .format_modifiers = format_modifiers_win_full, - .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1), -+ .fmt_10 = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 4), - .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12), - .uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15), - .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21), -@@ -924,11 +943,12 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = { - - static const struct vop_win_phy rk3399_win01_data = { - .scl = &rk3288_win_full_scl, -- .data_formats = formats_win_full, -- .nformats = ARRAY_SIZE(formats_win_full), -+ .data_formats = formats_win_full_10, -+ .nformats = ARRAY_SIZE(formats_win_full_10), - .format_modifiers = format_modifiers_win_full_afbc, - .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), -+ .fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4), - .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), - .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15), - .x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21), diff --git a/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch b/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch index 458ac6c54c..2b83b06913 100644 --- a/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch +++ b/projects/Rockchip/patches/linux/default/linux-1000-drm-rockchip.patch @@ -1,85 +1,3 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 3 May 2020 16:51:31 +0000 -Subject: [PATCH] drm/rockchip: vop: filter modes outside 0.5% pixel clock - tolerance - -Filter modes that require a pixel clock that differ more then 0.5% -from the requested pixel clock. - -This filter is only applied to tmds only connector and/or encoders. - -Signed-off-by: Jonas Karlman -Signed-off-by: Alex Bee ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 54 +++++++++++++++++++++ - 1 file changed, 54 insertions(+) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index dbe4d411b30f..fac23d370ee0 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1206,6 +1206,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) - spin_unlock_irqrestore(&vop->irq_lock, flags); - } - -+static bool vop_crtc_is_tmds(struct drm_crtc *crtc) -+{ -+ struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); -+ struct drm_encoder *encoder; -+ -+ switch (s->output_type) { -+ case DRM_MODE_CONNECTOR_LVDS: -+ case DRM_MODE_CONNECTOR_DSI: -+ return false; -+ case DRM_MODE_CONNECTOR_eDP: -+ case DRM_MODE_CONNECTOR_HDMIA: -+ case DRM_MODE_CONNECTOR_DisplayPort: -+ return true; -+ } -+ -+ drm_for_each_encoder_mask(encoder, crtc->dev, crtc->state->encoder_mask) -+ if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) -+ return true; -+ -+ return false; -+} -+ -+/* -+ * The VESA DMT standard specifies a 0.5% pixel clock frequency tolerance. -+ * The CVT spec reuses that tolerance in its examples. -+ */ -+#define CLOCK_TOLERANCE_PER_MILLE 5 -+ -+static enum drm_mode_status vop_crtc_mode_valid5(struct drm_crtc *crtc, -+ const struct drm_display_mode *mode) -+{ -+ struct vop *vop = to_vop(crtc); -+ long rounded_rate; -+ long lowest, highest; -+ -+ if (!vop_crtc_is_tmds(crtc)) -+ return MODE_OK; -+ -+ rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999); -+ if (rounded_rate < 0) -+ return MODE_NOCLOCK; -+ -+ lowest = mode->clock * (1000 - CLOCK_TOLERANCE_PER_MILLE); -+ if (rounded_rate < lowest) -+ return MODE_CLOCK_LOW; -+ -+ highest = mode->clock * (1000 + CLOCK_TOLERANCE_PER_MILLE); -+ if (rounded_rate > highest) -+ return MODE_CLOCK_HIGH; -+ -+ return MODE_OK; -+} -+ - static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) - From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 15:15:50 +0000 @@ -97,493 +15,16 @@ diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockc index fac23d370ee0..9f7326c5b1f5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1244,6 +1244,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, - if (!vop_crtc_is_tmds(crtc)) - return MODE_OK; +@@ -1245,6 +1245,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, + if (vop->data->max_output.width && mode->hdisplay > vop->data->max_output.width) + return MODE_BAD_HVALUE; + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + return MODE_NO_INTERLACE; + - rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999); - if (rounded_rate < 0) - return MODE_NOCLOCK; - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 20 Jul 2020 11:46:16 +0000 -Subject: [PATCH] drm/rockchip: vop: filter modes above max output supported - -Filter any mode with a resolution not supported by the VOP. - -Signed-off-by: Jonas Karlman -Signed-off-by: Alex Bee ---- - drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 48 +++++++++++++++------ - 1 file changed, 34 insertions(+), 14 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -index 9f7326c5b1f5..30e252ba7184 100644 ---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -1228,6 +1228,24 @@ static bool vop_crtc_is_tmds(struct drm_crtc *crtc) - return false; + return MODE_OK; } - -+static enum drm_mode_status vop_crtc_size_valid(struct drm_crtc *crtc, -+ const struct drm_display_mode *mode) -+{ -+ struct vop *vop = to_vop(crtc); -+ const struct vop_rect *max_output = &vop->data->max_output; -+ -+ if (max_output->width && max_output->height) { -+ /* only the size of the resulting rect matters */ -+ if(drm_mode_validate_size(mode, max_output->width, -+ max_output->height) != MODE_OK) { -+ return drm_mode_validate_size(mode, max_output->height, -+ max_output->width); -+ } -+ } -+ -+ return MODE_OK; -+} -+ - /* - * The VESA DMT standard specifies a 0.5% pixel clock frequency tolerance. - * The CVT spec reuses that tolerance in its examples. -@@ -1241,25 +1259,24 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc, - long rounded_rate; - long lowest, highest; - -- if (!vop_crtc_is_tmds(crtc)) -- return MODE_OK; -- - if (mode->flags & DRM_MODE_FLAG_INTERLACE) -- return MODE_NO_INTERLACE; -+ return MODE_NO_INTERLACE; - -- rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999); -- if (rounded_rate < 0) -- return MODE_NOCLOCK; -+ if (vop_crtc_is_tmds(crtc)) { -+ rounded_rate = clk_round_rate(vop->dclk, mode->clock * 1000 + 999); -+ if (rounded_rate < 0) -+ return MODE_NOCLOCK; - -- lowest = mode->clock * (1000 - CLOCK_TOLERANCE_PER_MILLE); -- if (rounded_rate < lowest) -- return MODE_CLOCK_LOW; -+ lowest = mode->clock * (1000 - CLOCK_TOLERANCE_PER_MILLE); -+ if (rounded_rate < lowest) -+ return MODE_CLOCK_LOW; - -- highest = mode->clock * (1000 + CLOCK_TOLERANCE_PER_MILLE); -- if (rounded_rate > highest) -- return MODE_CLOCK_HIGH; -+ highest = mode->clock * (1000 + CLOCK_TOLERANCE_PER_MILLE); -+ if (rounded_rate > highest) -+ return MODE_CLOCK_HIGH; -+ } - -- return MODE_OK; -+ return vop_crtc_size_valid(crtc, mode); - } - - static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, -@@ -1269,6 +1286,9 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, - struct vop *vop = to_vop(crtc); - unsigned long rate; - -+ if (vop_crtc_size_valid(crtc, adjusted_mode) != MODE_OK) -+ return false; -+ - /* - * Clock craziness. - * -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Yakir Yang -Date: Mon, 11 Jul 2016 19:05:39 +0800 -Subject: [PATCH] drm/rockchip: dw_hdmi: adjust cklvl & txlvl for RF/EMI - -Dut to the high HDMI signal voltage driver, Mickey have meet -a serious RF/EMI problem, so we decided to reduce HDMI signal -voltage to a proper value. - -The default params for phy is cklvl = 20 & txlvl = 13 (RF/EMI failed) - ck: lvl = 13, term=100, vlo = 2.71, vhi=3.14, vswing = 0.43 - tx: lvl = 20, term=100, vlo = 2.81, vhi=3.16, vswing = 0.35 - -1. We decided to reduce voltage value to lower, but VSwing still -keep high, RF/EMI have been improved but still failed. - ck: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50 - tx: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50 - -2. We try to keep voltage value and vswing both lower, then RF/EMI -test all passed ;) - ck: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40 - tx: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40 -When we back to run HDMI different test and single-end test, we see -different test passed, but signle-end test failed. The oscilloscope -show that simgle-end clock's VL value is 1.78v (which remind LowLimit -should not lower then 2.6v). - -3. That's to say there are some different between PHY document and -measure value. And according to experiment 2 results, we need to -higher clock voltage and lower data voltage, then we can keep RF/EMI -satisfied and single-end & differen test passed. - ck: lvl = 9, term=100, vlo = 2.65, vhi=3.12, vswing = 0.47 - tx: lvl = 16, term=100, vlo = 2.75, vhi=3.15, vswing = 0.39 - -Signed-off-by: Yakir Yang -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index c14f88893868..4411ca8fd7ed 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -193,7 +193,7 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = { - static const struct dw_hdmi_phy_config rockchip_phy_config[] = { - /*pixelclk symbol term vlev*/ - { 74250000, 0x8009, 0x0004, 0x0272}, -- { 148500000, 0x802b, 0x0004, 0x028d}, -+ { 165000000, 0x802b, 0x0004, 0x0209}, - { 297000000, 0x8039, 0x0005, 0x028d}, - { ~0UL, 0x0000, 0x0000, 0x0000} - }; - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Nickey Yang -Date: Mon, 13 Feb 2017 15:40:29 +0800 -Subject: [PATCH] drm/rockchip: dw_hdmi: add phy_config for 594Mhz pixel clock - -Add phy_config for 594Mhz pixel clock used for 4K@60hz - -Signed-off-by: Nickey Yang -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 4411ca8fd7ed..bec381cde0bc 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -195,6 +195,7 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = { - { 74250000, 0x8009, 0x0004, 0x0272}, - { 165000000, 0x802b, 0x0004, 0x0209}, - { 297000000, 0x8039, 0x0005, 0x028d}, -+ { 594000000, 0x8039, 0x0000, 0x019d}, - { ~0UL, 0x0000, 0x0000, 0x0000} - }; - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Douglas Anderson -Date: Mon, 11 Jul 2016 19:05:36 +0800 -Subject: [PATCH] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always - -Jitter was improved by lowering the MPLL bandwidth to account for high -frequency noise in the rk3288 PLL. In each case MPLL bandwidth was -lowered only enough to get us a comfortable margin. We believe that -lowering the bandwidth like this is safe given sufficient testing. - -Signed-off-by: Douglas Anderson -Signed-off-by: Yakir Yang -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++-------------- - 1 file changed, 2 insertions(+), 14 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index bec381cde0bc..72c1d65c7b75 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -172,20 +172,6 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { - static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = { - /* pixelclk bpp8 bpp10 bpp12 */ - { -- 40000000, { 0x0018, 0x0018, 0x0018 }, -- }, { -- 65000000, { 0x0028, 0x0028, 0x0028 }, -- }, { -- 66000000, { 0x0038, 0x0038, 0x0038 }, -- }, { -- 74250000, { 0x0028, 0x0038, 0x0038 }, -- }, { -- 83500000, { 0x0028, 0x0038, 0x0038 }, -- }, { -- 146250000, { 0x0038, 0x0038, 0x0038 }, -- }, { -- 148500000, { 0x0000, 0x0038, 0x0038 }, -- }, { - 600000000, { 0x0000, 0x0000, 0x0000 }, - }, { - ~0UL, { 0x0000, 0x0000, 0x0000}, - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Douglas Anderson -Date: Mon, 11 Jul 2016 19:05:42 +0800 -Subject: [PATCH] drm/rockchip: dw_hdmi: Use auto-generated tables - -The previous tables for mpll_cfg and curr_ctrl were created using the -20-pages of example settings provided by the PHY vendor. Those -example settings weren't particularly dense, so there were places -where we were guessing what the settings would be for 10-bit and -12-bit (not that we use those anyway). It was also always a lot of -extra work every time we wanted to add a new clock rate since we had -to cross-reference several tables. - -In I've gone through the work to figure -out how to generate this table automatically. Let's now use the -automatically generated table and then we'll never need to look at it -again. - -We only support 8-bit mode right now and only support a small number -of clock rates and and I've verified that the only 8-bit rate that was -affected was 148.5. That mode appears to have been wrong in the old -table. - -Signed-off-by: Douglas Anderson -Signed-off-by: Yakir Yang -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 130 +++++++++++--------- - 1 file changed, 69 insertions(+), 61 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 72c1d65c7b75..0370bb247fcb 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -95,86 +95,88 @@ - - static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = { - { -- 27000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 36000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 40000000, { -- { 0x00b3, 0x0000}, -- { 0x2153, 0x0000}, -- { 0x40f3, 0x0000} -- }, -- }, { -- 54000000, { -- { 0x0072, 0x0001}, -- { 0x2142, 0x0001}, -- { 0x40a2, 0x0001}, -- }, -- }, { -- 65000000, { -- { 0x0072, 0x0001}, -- { 0x2142, 0x0001}, -- { 0x40a2, 0x0001}, -- }, -- }, { -- 66000000, { -- { 0x013e, 0x0003}, -- { 0x217e, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 74250000, { -- { 0x0072, 0x0001}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 83500000, { -- { 0x0072, 0x0001}, -- }, -- }, { -- 108000000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 106500000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 146250000, { -- { 0x0051, 0x0002}, -- { 0x2145, 0x0002}, -- { 0x4061, 0x0002} -- }, -- }, { -- 148500000, { -- { 0x0051, 0x0003}, -- { 0x214c, 0x0003}, -- { 0x4064, 0x0003} -+ 30666000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2153, 0x0000 }, -+ { 0x40f3, 0x0000 }, -+ }, -+ }, { -+ 36800000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2153, 0x0000 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 46000000, { -+ { 0x00b3, 0x0000 }, -+ { 0x2142, 0x0001 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 61333000, { -+ { 0x0072, 0x0001 }, -+ { 0x2142, 0x0001 }, -+ { 0x40a2, 0x0001 }, -+ }, -+ }, { -+ 73600000, { -+ { 0x0072, 0x0001 }, -+ { 0x2142, 0x0001 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 92000000, { -+ { 0x0072, 0x0001 }, -+ { 0x2145, 0x0002 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 122666000, { -+ { 0x0051, 0x0002 }, -+ { 0x2145, 0x0002 }, -+ { 0x4061, 0x0002 }, -+ }, -+ }, { -+ 147200000, { -+ { 0x0051, 0x0002 }, -+ { 0x2145, 0x0002 }, -+ { 0x4064, 0x0003 }, -+ }, -+ }, { -+ 184000000, { -+ { 0x0051, 0x0002 }, -+ { 0x214c, 0x0003 }, -+ { 0x4064, 0x0003 }, - }, -- }, { -+ }, { -+ 226666000, { -+ { 0x0040, 0x0003 }, -+ { 0x214c, 0x0003 }, -+ { 0x4064, 0x0003 }, -+ }, -+ }, { -+ 272000000, { -+ { 0x0040, 0x0003 }, -+ { 0x214c, 0x0003 }, -+ { 0x5a64, 0x0003 }, -+ }, -+ }, { - 340000000, { - { 0x0040, 0x0003 }, - { 0x3b4c, 0x0003 }, - { 0x5a64, 0x0003 }, - }, -- }, { -+ }, { -+ 600000000, { -+ { 0x1a40, 0x0003 }, -+ { 0x3b4c, 0x0003 }, -+ { 0x5a64, 0x0003 }, -+ }, -+ }, { - ~0UL, { -- { 0x00a0, 0x000a }, -- { 0x2001, 0x000f }, -- { 0x4002, 0x000f }, -+ { 0x0000, 0x0000 }, -+ { 0x0000, 0x0000 }, -+ { 0x0000, 0x0000 }, - }, - } - }; - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 8 Jan 2020 21:07:49 +0000 -Subject: [PATCH] drm/rockchip: dw-hdmi: allow high tmds bit rates - -Prepare support for High TMDS Bit Rates used by HDMI2.0 display modes. - -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 55c0b8dddad5..15ecb257b902 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -327,6 +327,8 @@ static int dw_hdmi_rockchip_genphy_init(struct dw_hdmi *dw_hdmi, void *data, - { - struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; - -+ dw_hdmi_set_high_tmds_clock_ratio(dw_hdmi, display); -+ - return phy_power_on(hdmi->phy); - } - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 8 Jan 2020 21:07:52 +0000 -Subject: [PATCH] drm/rockchip: dw-hdmi: remove unused plat_data on - rk3228/rk3328 - -mpll_cfg/cur_ctr/phy_config is not used when phy_force_vendor is true, -lets remove them. - -Signed-off-by: Jonas Karlman ---- - drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 15ecb257b902..38dded2baaf7 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -417,9 +417,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = { - - static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = { - .mode_valid = dw_hdmi_rockchip_mode_valid, -- .mpll_cfg = rockchip_mpll_cfg, -- .cur_ctr = rockchip_cur_ctr, -- .phy_config = rockchip_phy_config, - .phy_data = &rk3228_chip_data, - .phy_ops = &rk3228_hdmi_phy_ops, - .phy_name = "inno_dw_hdmi_phy2", -@@ -454,9 +451,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = { - - static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { - .mode_valid = dw_hdmi_rockchip_mode_valid, -- .mpll_cfg = rockchip_mpll_cfg, -- .cur_ctr = rockchip_cur_ctr, -- .phy_config = rockchip_phy_config, - .phy_data = &rk3328_chip_data, - .phy_ops = &rk3328_hdmi_phy_ops, - .phy_name = "inno_dw_hdmi_phy2", From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jonas Karlman @@ -599,16 +40,16 @@ diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockc index 38dded2baaf7..9e460b7e14a4 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -@@ -558,7 +558,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, +@@ -592,7 +592,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, if (IS_ERR(hdmi->phy)) { ret = PTR_ERR(hdmi->phy); if (ret != -EPROBE_DEFER) -- DRM_DEV_ERROR(hdmi->dev, "failed to get phy\n"); -+ DRM_DEV_ERROR(hdmi->dev, "Failed to get phy: %d\n", ret); +- dev_err(hdmi->dev, "failed to get phy\n"); ++ dev_err(hdmi->dev, "failed to get phy: %d\n", ret); return ret; } -@@ -590,7 +590,12 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, +@@ -605,7 +605,12 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, } drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); @@ -622,14 +63,15 @@ index 38dded2baaf7..9e460b7e14a4 100644 platform_set_drvdata(pdev, hdmi); -@@ -609,6 +614,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, +@@ -624,7 +629,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, err_bind: drm_encoder_cleanup(encoder); +- +err_disable_clk: - clk_disable_unprepare(hdmi->ref_clk); - err_clk: - regulator_disable(hdmi->avdd_1v8); + return ret; + } + From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jonas Karlman @@ -1655,7 +1097,7 @@ Subject: [PATCH] HACK: dts: rockchip: do not use vopl for hdmi --- arch/arm/boot/dts/rockchip/rk3288.dtsi | 9 --------- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 9 --------- + arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 9 --------- 2 files changed, 18 deletions(-) diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi @@ -1685,11 +1127,11 @@ index d1ae42757242..7b2cde230b87 100644 }; }; -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi index 92c2207e686c..980b12cb0a49 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1728,11 +1728,6 @@ vopl_out_edp: endpoint@1 { +--- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi +@@ -1846,11 +1846,6 @@ vopl_out_edp: endpoint@1 { remote-endpoint = <&edp_in_vopl>; }; @@ -1701,7 +1143,7 @@ index 92c2207e686c..980b12cb0a49 100644 vopl_out_mipi1: endpoint@3 { reg = <3>; remote-endpoint = <&mipi1_in_vopl>; -@@ -1926,10 +1921,6 @@ hdmi_in_vopb: endpoint@0 { +@@ -2048,10 +2043,6 @@ hdmi_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_hdmi>; }; @@ -2115,9 +1557,9 @@ index 89424c5bc24a..05de2052d95d 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -68,6 +68,7 @@ struct rockchip_hdmi_chip_data { - int lcdsel_grf_reg; u32 lcdsel_big; u32 lcdsel_lit; + int max_tmds_clock; + bool ycbcr_444_allowed; }; @@ -2181,9 +1623,9 @@ index 89424c5bc24a..05de2052d95d 100644 input_fmt = kzalloc(sizeof(*input_fmt), GFP_KERNEL); @@ -604,6 +630,7 @@ static const struct dw_hdmi_phy_ops rk3328_hdmi_phy_ops = { - static struct rockchip_hdmi_chip_data rk3328_chip_data = { .lcdsel_grf_reg = -1, + .max_tmds_clock = 594000, + .ycbcr_444_allowed = true, }; @@ -2461,23 +1903,6 @@ index 47ad74ef1afb..94a615dca672 100644 struct vop_reg dsp_data_swap; struct vop_reg dsp_out_yuv; struct vop_reg dsp_background; -@@ -286,11 +287,12 @@ struct vop_data { - /* - * display output interface supported by rockchip lcdc - */ --#define ROCKCHIP_OUT_MODE_P888 0 --#define ROCKCHIP_OUT_MODE_P666 1 --#define ROCKCHIP_OUT_MODE_P565 2 -+#define ROCKCHIP_OUT_MODE_P888 0 -+#define ROCKCHIP_OUT_MODE_P666 1 -+#define ROCKCHIP_OUT_MODE_P565 2 -+#define ROCKCHIP_OUT_MODE_YUV420 14 - /* for use special outface */ --#define ROCKCHIP_OUT_MODE_AAAA 15 -+#define ROCKCHIP_OUT_MODE_AAAA 15 - - /* output flags */ - #define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b16a4c42773c..5463b04240f7 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -2514,9 +1939,9 @@ index cb201612199f..8627f6826bfe 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -616,6 +616,7 @@ static const struct dw_hdmi_phy_ops rk3228_hdmi_phy_ops = { - static struct rockchip_hdmi_chip_data rk3228_chip_data = { .lcdsel_grf_reg = -1, + .max_tmds_clock = 594000, + .ycbcr_444_allowed = true, }; @@ -2543,7 +1968,7 @@ diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockc index e50f71ad3ceb..ef0a078c22f4 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c -@@ -965,6 +965,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -958,6 +958,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, int format; int is_yuv = fb->format->is_yuv; int i; @@ -2551,7 +1976,7 @@ index e50f71ad3ceb..ef0a078c22f4 100644 /* * can't update plane when vop is disabled. -@@ -983,8 +984,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -976,8 +977,14 @@ static void vop_plane_atomic_update(struct drm_plane *plane, obj = fb->obj[0]; rk_obj = to_rockchip_obj(obj); @@ -2567,7 +1992,7 @@ index e50f71ad3ceb..ef0a078c22f4 100644 act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); dsp_info = (drm_rect_height(dest) - 1) << 16; -@@ -1026,7 +1033,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1019,7 +1026,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, format, format); VOP_WIN_SET(vop, win, fmt_10, is_fmt_10(fb->format->format)); @@ -2576,7 +2001,7 @@ index e50f71ad3ceb..ef0a078c22f4 100644 VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); VOP_WIN_SET(vop, win, y_mir_en, -@@ -1050,7 +1057,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, +@@ -1040,7 +1047,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, offset += (src->y1 >> 16) * fb->pitches[1] / vsub; dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; @@ -2776,9 +2201,9 @@ index b78df931aa74..ebbea63ea9de 100644 /* cec-core.c */ extern int cec_debug; +extern int cec_debounce_ms; - int cec_get_device(struct cec_devnode *devnode); - void cec_put_device(struct cec_devnode *devnode); + /* cec-adap.c */ + int cec_monitor_all_cnt_inc(struct cec_adapter *adap); diff --git a/include/media/cec.h b/include/media/cec.h index abee41ae02d0..544eedb5d671 100644 --- a/include/media/cec.h @@ -2915,3 +2340,4 @@ index 49619f794061..9915bf124374 100644 } port = of_get_child_by_name(dev->of_node, "port"); + diff --git a/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch b/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch index d705909546..631c4ea7ea 100644 --- a/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch +++ b/projects/Rockchip/patches/linux/default/linux-1001-v4l2-rockchip.patch @@ -289,7 +289,7 @@ index eaf2f133a264..f55abb7c377f 100644 } + -+ rkvdec->rstc = devm_reset_control_array_get(&pdev->dev, false, true); ++ rkvdec->rstc = devm_reset_control_array_get(&pdev->dev, RESET_CONTROL_OPTIONAL_EXCLUSIVE); + if (IS_ERR(rkvdec->rstc)) { + dev_err(&pdev->dev, + "get resets failed %ld\n", PTR_ERR(rkvdec->rstc)); @@ -349,13 +349,13 @@ Date: Tue, 18 Aug 2020 11:38:04 +0200 Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3399 --- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++++ + arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 5 +++++ 1 file changed, 5 insertions(+) -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi index 980b12cb0a49..6e3149e587c5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +--- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -1345,6 +1348,11 @@ vdec: video-codec@ff660000 { clock-names = "axi", "ahb", "cabac", "core"; iommus = <&vdec_mmu>; diff --git a/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch b/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch index 1eca997b4a..8a7de931e3 100644 --- a/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch +++ b/projects/Rockchip/patches/linux/default/linux-1002-for-libreelec.patch @@ -11,15 +11,15 @@ is running at the same time (voltage to high) Signed-off-by: Alex Bee --- - .../arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 4 +++ + .../arm64/boot/dts/rockchip/rk3328-roc.dtsi | 4 +++ .../arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 +++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 35 +++++++++++++++++++ 3 files changed, 43 insertions(+) -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi index aa22a0c22265..51c7723d6762 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi @@ -166,6 +166,10 @@ &gmac2io { status = "okay"; }; @@ -165,7 +165,7 @@ Subject: [PATCH] ARM/arm64: dts: rockchip: align sound card names Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 2 +- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- + arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi @@ -181,10 +181,10 @@ index 09618bb7d872..db9106a3dd22 100644 simple-audio-card,mclk-fs = <512>; simple-audio-card,codec { -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi index 093ebe070775..a10fe60b7680 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +--- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -1893,7 +1893,7 @@ hdmi_sound: hdmi-sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -254,13 +254,13 @@ Subject: [PATCH] arm64: dts: rockchip: Add ir-receiver node for RK3328 ROC CC Signed-off-by: Alex Bee --- - arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 14 ++++++++++++++ + arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi index 51c7723d6762..cf321302daec 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +--- a/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi @@ -88,6 +88,13 @@ vcc_phy: vcc-phy-regulator { regulator-boot-on; }; @@ -412,13 +412,13 @@ result in poor DMA controller performance Signed-off-by: Alex Bee --- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- + arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi index a10fe60b7680..dbe6a9cb98a5 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +--- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -1477,7 +1477,7 @@ cru: clock-controller@ff760000 { <1000000000>, <150000000>, <75000000>, diff --git a/projects/Rockchip/patches/linux/default/linux-1003-temp-dw_hdmi-rockchip.patch b/projects/Rockchip/patches/linux/default/linux-1003-temp-dw_hdmi-rockchip.patch deleted file mode 100644 index 649732ddbe..0000000000 --- a/projects/Rockchip/patches/linux/default/linux-1003-temp-dw_hdmi-rockchip.patch +++ /dev/null @@ -1,63 +0,0 @@ -diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index 0370bb247fcb..55c0b8dddad5 100644 ---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 2023-06-25 03:23:55.724209412 +0000 -+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c 2023-06-25 04:16:27.469899470 +0000 -@@ -254,35 +245,31 @@ - const struct drm_display_info *info, - const struct drm_display_mode *mode) - { -- struct rockchip_hdmi *hdmi = data; -- const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg; -- int pclk = mode->clock * 1000; -- bool exact_match = hdmi->plat_data->phy_force_vendor; -- int i; -- -- if (hdmi->ref_clk) { -- int rpclk = clk_round_rate(hdmi->ref_clk, pclk); -- -- if (abs(rpclk - pclk) > pclk / 1000) -- return MODE_NOCLOCK; -- } -- -- for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { -- /* -- * For vendor specific phys force an exact match of the pixelclock -- * to preserve the original behaviour of the driver. -- */ -- if (exact_match && pclk == mpll_cfg[i].mpixelclock) -- return MODE_OK; -- /* -- * The Synopsys phy can work with pixelclocks up to the value given -- * in the corresponding mpll_cfg entry. -- */ -- if (!exact_match && pclk <= mpll_cfg[i].mpixelclock) -- return MODE_OK; -+ struct dw_hdmi_plat_data *pdata = (struct dw_hdmi_plat_data *)data; -+ const struct dw_hdmi_mpll_config *mpll_cfg = pdata->mpll_cfg; -+ int clock = mode->clock; -+ unsigned int i = 0; -+ -+ if (pdata->ycbcr_420_allowed && drm_mode_is_420(info, mode) && -+ (info->color_formats & DRM_COLOR_FORMAT_YCBCR420)) { -+ clock /= 2; -+ mpll_cfg = pdata->mpll_cfg_420; -+ } -+ -+ if ((!mpll_cfg && clock > 340000) || -+ (info->max_tmds_clock && clock > info->max_tmds_clock)) -+ return MODE_CLOCK_HIGH; -+ -+ if (mpll_cfg) { -+ while ((clock * 1000) < mpll_cfg[i].mpixelclock && -+ mpll_cfg[i].mpixelclock != (~0UL)) -+ i++; -+ -+ if (mpll_cfg[i].mpixelclock == (~0UL)) -+ return MODE_CLOCK_HIGH; - } - -- return MODE_BAD; -+ return MODE_OK; - } - - static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder) diff --git a/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch b/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch index 533cf426f0..541c849376 100644 --- a/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch +++ b/projects/Rockchip/patches/linux/default/linux-2001-v4l2-wip-iep-driver.patch @@ -465,7 +465,7 @@ new file mode 100644 index 000000000000..f4b9320733be --- /dev/null +++ b/drivers/media/platform/rockchip/iep/iep.c -@@ -0,0 +1,1089 @@ +@@ -0,0 +1,1087 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Rockchip Image Enhancement Processor (IEP) driver @@ -925,7 +925,7 @@ index 000000000000..f4b9320733be + src_vq->io_modes = VB2_MMAP | VB2_DMABUF; + src_vq->drv_priv = ctx; + src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); -+ src_vq->min_buffers_needed = 1; ++ src_vq->min_queued_buffers = 1; + src_vq->ops = &iep_qops; + src_vq->mem_ops = &vb2_dma_contig_memops; + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; @@ -942,7 +942,7 @@ index 000000000000..f4b9320733be + dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; + dst_vq->drv_priv = ctx; + dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); -+ dst_vq->min_buffers_needed = 2; ++ dst_vq->min_queued_buffers = 2; + dst_vq->ops = &iep_qops; + dst_vq->mem_ops = &vb2_dma_contig_memops; + dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; @@ -1474,7 +1474,7 @@ index 000000000000..f4b9320733be +return ret; +} + -+static int iep_remove(struct platform_device *pdev) ++static void iep_remove(struct platform_device *pdev) +{ + struct rockchip_iep *iep = platform_get_drvdata(pdev); + @@ -1484,8 +1484,6 @@ index 000000000000..f4b9320733be + v4l2_m2m_release(iep->m2m_dev); + video_unregister_device(&iep->vfd); + v4l2_device_unregister(&iep->v4l2_dev); -+ -+ return 0; +} + +static int __maybe_unused iep_runtime_suspend(struct device *dev) @@ -1727,13 +1725,13 @@ Subject: [PATCH] ARM64: dts: rockchip: Add IEP node for RK3399 Signed-off-by: Alex Bee --- - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 13 ++++++++++++- + arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) -diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi index dbe6a9cb98a5..f0629b7a81c6 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi +--- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -1365,14 +1365,25 @@ vdec_mmu: iommu@ff660480 { #iommu-cells = <0>; }; diff --git a/projects/Rockchip/patches/linux/default/linux-9000-temp-rk3288-disable-vpu-iommu.patch b/projects/Rockchip/patches/linux/default/linux-9000-temp-rk3288-disable-vpu-iommu.patch new file mode 100644 index 0000000000..575db99f4d --- /dev/null +++ b/projects/Rockchip/patches/linux/default/linux-9000-temp-rk3288-disable-vpu-iommu.patch @@ -0,0 +1,12 @@ +diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi +index 9ff190ab1d..1d5a4a68f6 100644 +--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi ++++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi +@@ -1298,6 +1298,7 @@ vpu_mmu: iommu@ff9a0800 { + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + power-domains = <&power RK3288_PD_VIDEO>; ++ status = "disabled"; + }; + + hevc: hevc@ff9c0000 { diff --git a/projects/Samsung/linux/linux.arm.conf b/projects/Samsung/linux/linux.arm.conf index 972f17b659..26db8e8fe9 100644 --- a/projects/Samsung/linux/linux.arm.conf +++ b/projects/Samsung/linux/linux.arm.conf @@ -1,23 +1,26 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.6.71 Kernel Configuration +# Linux/arm 6.15.0 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-13.2.0 (GCC) 13.2.0" +CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-15.1.0 (GCC) 15.1.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130200 +CONFIG_GCC_VERSION=150100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=24100 +CONFIG_AS_VERSION=24400 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=24100 +CONFIG_LD_VERSION=24400 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=0 +CONFIG_RUSTC_LLVM_VERSION=0 CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y +CONFIG_CC_HAS_COUNTED_BY=y +CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y +CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_PAHOLE_VERSION=0 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y @@ -116,7 +119,7 @@ CONFIG_PREEMPTION=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_PSI is not set @@ -133,6 +136,7 @@ CONFIG_PREEMPT_RCU=y CONFIG_TREE_SRCU=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -154,23 +158,28 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y # CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y +# CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y @@ -210,20 +219,20 @@ CONFIG_INITRAMFS_COMPRESSION_NONE=y CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y +CONFIG_SYSFS_SYSCALL=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -235,14 +244,13 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_SELFTEST is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y @@ -261,7 +269,6 @@ CONFIG_TRACEPOINTS=y # Kexec and crash features # # CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup @@ -303,6 +310,9 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_VIRT is not set # CONFIG_ARCH_AIROHA is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_SUNPLUS is not set +# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set @@ -353,7 +363,6 @@ CONFIG_EXYNOS_CPU_SUSPEND=y # end of TI OMAP/AM/DM/DRA Family # CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RDA is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -362,10 +371,8 @@ CONFIG_EXYNOS_CPU_SUSPEND=y # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_SUNPLUS is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VEXPRESS is not set @@ -488,6 +495,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_PAN=y CONFIG_CPU_SW_DOMAIN_PAN=y CONFIG_HW_PERF_EVENTS=y CONFIG_ARM_MODULE_PLTS=y @@ -517,6 +525,7 @@ CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y CONFIG_CMDLINE="" CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_AUTO_ZRELADDR=y # CONFIG_EFI is not set # end of Boot options @@ -549,6 +558,7 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +# CONFIG_CPUFREQ_VIRT is not set CONFIG_CPUFREQ_DT_PLATDEV=y # end of CPU Frequency scaling @@ -614,8 +624,8 @@ CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y # end of Power management options -CONFIG_AS_VFP_VMRS_FPINST=y CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -657,10 +667,12 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y # CONFIG_SECCOMP_CACHE_DEBUG is not set +CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y @@ -673,8 +685,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -703,10 +718,11 @@ CONFIG_HAVE_GCC_PLUGINS=y CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_CC_HAS_MIN_FUNCTION_ALIGNMENT=y +CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -716,12 +732,10 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set @@ -730,9 +744,9 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set @@ -764,6 +778,7 @@ CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set +# CONFIG_OF_PARTITION is not set # end of Partition Types CONFIG_BLK_PM=y @@ -809,17 +824,18 @@ CONFIG_SWAP=y # CONFIG_ZSWAP is not set # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +CONFIG_KVFREE_RCU_BATCHED=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_BUCKETS=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_COMPAT_BRK=y @@ -829,7 +845,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set @@ -840,14 +856,17 @@ CONFIG_BOUNCE=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_PAGE_MAPCOUNT=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CPU_CACHE_ALIASING=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y +CONFIG_VMAP_PFN=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -860,7 +879,10 @@ CONFIG_MEMFD_CREATE=y CONFIG_LRU_GEN=y # CONFIG_LRU_GEN_ENABLED is not set # CONFIG_LRU_GEN_STATS is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -874,6 +896,7 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -881,7 +904,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -895,6 +917,7 @@ CONFIG_XFRM_USER=y CONFIG_XFRM_ESP=y CONFIG_NET_KEY=y # CONFIG_NET_KEY_MIGRATE is not set +# CONFIG_XFRM_IPTFS is not set # CONFIG_XDP_SOCKETS is not set CONFIG_NET_HANDSHAKE=y CONFIG_INET=y @@ -947,7 +970,8 @@ CONFIG_IPV6_SIT=y CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set CONFIG_IPV6_FOU=m -# CONFIG_IPV6_MULTIPLE_TABLES is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_SUBTREES is not set # CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set @@ -965,6 +989,7 @@ CONFIG_BRIDGE_NETFILTER=m # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_BPF_LINK=y # CONFIG_NETFILTER_NETLINK_ACCT is not set @@ -1007,6 +1032,7 @@ CONFIG_NETFILTER_XTABLES=m # CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_CONNMARK is not set +CONFIG_NETFILTER_XT_SET=m # # Xtables targets @@ -1014,6 +1040,7 @@ CONFIG_NETFILTER_XT_MARK=m # CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_CT is not set # CONFIG_NETFILTER_XT_TARGET_DSCP is not set # CONFIG_NETFILTER_XT_TARGET_HL is not set # CONFIG_NETFILTER_XT_TARGET_HMARK is not set @@ -1025,11 +1052,13 @@ CONFIG_NETFILTER_XT_NAT=m # CONFIG_NETFILTER_XT_TARGET_NETMAP is not set # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m # CONFIG_NETFILTER_XT_TARGET_TEE is not set # CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set @@ -1084,7 +1113,24 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # end of Core Netfilter Configuration -# CONFIG_IP_SET is not set +CONFIG_IP_SET=m +CONFIG_IP_SET_MAX=256 +# CONFIG_IP_SET_BITMAP_IP is not set +# CONFIG_IP_SET_BITMAP_IPMAC is not set +# CONFIG_IP_SET_BITMAP_PORT is not set +# CONFIG_IP_SET_HASH_IP is not set +# CONFIG_IP_SET_HASH_IPMARK is not set +# CONFIG_IP_SET_HASH_IPPORT is not set +# CONFIG_IP_SET_HASH_IPPORTIP is not set +# CONFIG_IP_SET_HASH_IPPORTNET is not set +# CONFIG_IP_SET_HASH_IPMAC is not set +# CONFIG_IP_SET_HASH_MAC is not set +# CONFIG_IP_SET_HASH_NETPORTNET is not set +CONFIG_IP_SET_HASH_NET=m +# CONFIG_IP_SET_HASH_NETNET is not set +# CONFIG_IP_SET_HASH_NETPORT is not set +# CONFIG_IP_SET_HASH_NETIFACE is not set +# CONFIG_IP_SET_LIST_SET is not set CONFIG_IP_VS=m # CONFIG_IP_VS_IPV6 is not set # CONFIG_IP_VS_DEBUG is not set @@ -1137,6 +1183,7 @@ CONFIG_IP_VS_NFCT=y # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1158,13 +1205,15 @@ CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_ECN is not set # CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_RAW=m # CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1186,7 +1235,7 @@ CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m # CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m # CONFIG_IP6_NF_TARGET_NPT is not set @@ -1194,8 +1243,8 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1331,6 +1380,7 @@ CONFIG_BT_RTL=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_POLL_SYNC=y +# CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y @@ -1356,10 +1406,8 @@ CONFIG_BT_ATH3K=m # CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set @@ -1376,7 +1424,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1405,6 +1452,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set @@ -1437,6 +1485,7 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1457,7 +1506,6 @@ CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_ARM_CCI=y CONFIG_ARM_CCI400_COMMON=y CONFIG_ARM_CCI400_PORT_CTRL=y -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_MHI_BUS is not set @@ -1484,6 +1532,12 @@ CONFIG_ARM_CCI400_PORT_CTRL=y # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set # CONFIG_GOOGLE_FIRMWARE is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y # @@ -1492,6 +1546,7 @@ CONFIG_HAVE_ARM_SMCCC=y # end of Tegra firmware driver # end of Firmware Drivers +# CONFIG_FWCTL is not set # CONFIG_GNSS is not set # CONFIG_MTD is not set CONFIG_DTC=y @@ -1537,6 +1592,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_RPMB is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_APDS9802ALS is not set @@ -1553,6 +1609,7 @@ CONFIG_SRAM_EXEC=y # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_C2PORT is not set @@ -1561,7 +1618,6 @@ CONFIG_SRAM_EXEC=y # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_AT25 is not set -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -1569,12 +1625,6 @@ CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# end of Texas Instruments shared transport line discipline - # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set @@ -1676,6 +1726,7 @@ CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set CONFIG_NETCONSOLE=y @@ -1687,6 +1738,8 @@ CONFIG_TUN=y # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set +# CONFIG_NET_VRF is not set CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_ALTERA_TSE is not set @@ -1713,6 +1766,7 @@ CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_LITEX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_META is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set @@ -1748,6 +1802,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -1783,6 +1838,9 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_REALTEK_PHY is not set # CONFIG_RENESAS_PHY is not set @@ -1796,6 +1854,7 @@ CONFIG_SMSC_PHY=y # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -1823,6 +1882,7 @@ CONFIG_MDIO_DEVRES=y # # PCS device drivers # +# CONFIG_PCS_XPCS is not set # end of PCS device drivers # CONFIG_PPP is not set @@ -1875,7 +1935,6 @@ CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m CONFIG_ATH9K_AHB=y -# CONFIG_ATH9K_DEBUGFS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set CONFIG_ATH9K_RFKILL=y @@ -1897,6 +1956,7 @@ CONFIG_AR5523=m # CONFIG_ATH10K is not set CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set +# CONFIG_ATH11K is not set # CONFIG_WLAN_VENDOR_ATMEL is not set CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=m @@ -1923,7 +1983,6 @@ CONFIG_BRCMFMAC=m # CONFIG_BRCMFMAC_USB is not set # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -# CONFIG_WLAN_VENDOR_CISCO is not set # CONFIG_WLAN_VENDOR_INTEL is not set # CONFIG_WLAN_VENDOR_INTERSIL is not set CONFIG_WLAN_VENDOR_MARVELL=y @@ -1949,6 +2008,7 @@ CONFIG_MT76x2U=m CONFIG_MT7921_COMMON=m # CONFIG_MT7921S is not set CONFIG_MT7921U=m +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -1976,6 +2036,11 @@ CONFIG_RTL8187=m CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=m # CONFIG_RTL8192CU is not set +CONFIG_RTL8192DU=m +CONFIG_RTLWIFI=m +CONFIG_RTLWIFI_USB=m +CONFIG_RTLWIFI_DEBUG=y +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8XXXU=m CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=m @@ -1983,18 +2048,28 @@ CONFIG_RTW88_CORE=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m +CONFIG_RTW88_88XXA=m +CONFIG_RTW88_8821A=m +CONFIG_RTW88_8812A=m +CONFIG_RTW88_8814A=m # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=m # CONFIG_RTW88_8822CS is not set CONFIG_RTW88_8822CU=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=m +CONFIG_RTW88_8821AU=m +CONFIG_RTW88_8812AU=m +CONFIG_RTW88_8814AU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set +CONFIG_RTW88_LEDS=y # CONFIG_RTW89 is not set # CONFIG_WLAN_VENDOR_RSI is not set # CONFIG_WLAN_VENDOR_SILABS is not set @@ -2002,7 +2077,6 @@ CONFIG_RTW88_8821CU=m # CONFIG_WLAN_VENDOR_TI is not set # CONFIG_WLAN_VENDOR_ZYDAS is not set # CONFIG_WLAN_VENDOR_QUANTENNA is not set -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -2032,7 +2106,6 @@ CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers @@ -2055,7 +2128,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2086,7 +2158,6 @@ CONFIG_TOUCHSCREEN_ADS7846=m # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set @@ -2096,6 +2167,8 @@ CONFIG_TOUCHSCREEN_EGALAX=m # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -2109,7 +2182,6 @@ CONFIG_TOUCHSCREEN_EGALAX=m # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set @@ -2208,7 +2280,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -2283,6 +2354,7 @@ CONFIG_HW_RANDOM_EXYNOS=y CONFIG_DEVMEM=y CONFIG_DEVPORT=y CONFIG_TCG_TPM=y +# CONFIG_TCG_TPM2_HMAC is not set CONFIG_HW_RANDOM_TPM=y # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set @@ -2304,7 +2376,6 @@ CONFIG_TCG_TIS_I2C_INFINEON=y # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y @@ -2334,7 +2405,7 @@ CONFIG_I2C_ALGOBIT=y # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_CORE is not set # CONFIG_I2C_EMEV2 is not set CONFIG_I2C_EXYNOS5=y CONFIG_I2C_GPIO=y @@ -2383,6 +2454,7 @@ CONFIG_SPI_MASTER=y CONFIG_SPI_BITBANG=y # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_GPIO=y # CONFIG_SPI_FSL_SPI is not set @@ -2430,6 +2502,7 @@ CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -2468,6 +2541,7 @@ CONFIG_GPIO_CDEV_V1=y # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MPC8XXX is not set # CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_XILINX is not set @@ -2511,6 +2585,7 @@ CONFIG_GPIO_WM8994=y # # USB GPIO expanders # +# CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # @@ -2522,10 +2597,15 @@ CONFIG_GPIO_WM8994=y # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_BRCMKONA is not set -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -2536,6 +2616,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y # CONFIG_SYSCON_REBOOT_MODE is not set # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -2554,6 +2635,7 @@ CONFIG_BATTERY_SBS=y # CONFIG_BATTERY_BQ27XXX is not set CONFIG_BATTERY_MAX17040=y CONFIG_BATTERY_MAX17042=y +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set @@ -2585,6 +2667,7 @@ CONFIG_CHARGER_TPS65090=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2610,8 +2693,10 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set # CONFIG_SENSORS_DS620 is not set @@ -2620,6 +2705,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -2627,15 +2713,19 @@ CONFIG_HWMON=y # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set +# CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -2643,6 +2733,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -2686,14 +2777,17 @@ CONFIG_SENSORS_LM90=y CONFIG_SENSORS_NTC_THERMISTOR=y # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775_I2C is not set +# CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=y # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SBRMI is not set @@ -2721,6 +2815,7 @@ CONFIG_SENSORS_PWM_FAN=y CONFIG_SENSORS_INA2XX=y # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -2744,10 +2839,11 @@ CONFIG_SENSORS_INA2XX=y CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -2820,6 +2916,7 @@ CONFIG_BCMA_BLOCKIO=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set @@ -2853,12 +2950,14 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set CONFIG_MFD_MAX14577=y # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=y +# CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -2875,7 +2974,6 @@ CONFIG_MFD_MAX8998=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RT4831 is not set @@ -2928,10 +3026,13 @@ CONFIG_MFD_WM8994=y # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set @@ -2942,6 +3043,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -2962,6 +3064,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3676 is not set CONFIG_REGULATOR_MAX14577=y # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set @@ -2983,6 +3086,7 @@ CONFIG_REGULATOR_MAX77802=y # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PCA9450 is not set +# CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3028,8 +3132,10 @@ CONFIG_REGULATOR_WM8994=y # CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_NXP_TDA9950 is not set # CONFIG_CEC_GPIO is not set # CONFIG_CEC_SAMSUNG_S5P is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set # CONFIG_USB_PULSE8_CEC is not set # CONFIG_USB_RAINSHADOW_CEC is not set # end of CEC support @@ -3199,6 +3305,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -3211,6 +3321,11 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# +# CONFIG_VIDEO_RP1_CFE is not set + # # Renesas media platform drivers # @@ -3264,7 +3379,12 @@ CONFIG_VIDEOBUF2_VMALLOC=m # Media ancillary drivers # CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -3273,6 +3393,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX219 is not set # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -3283,6 +3404,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -3308,6 +3430,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -3326,10 +3449,16 @@ CONFIG_VIDEO_CAMERA_SENSOR=y CONFIG_VIDEO_S5C73M3=m # CONFIG_VIDEO_S5K5BAF is not set CONFIG_VIDEO_S5K6A3=m -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -3399,6 +3528,7 @@ CONFIG_VIDEO_S5K6A3=m # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -3458,6 +3588,8 @@ CONFIG_VIDEO_S5K6A3=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -3470,32 +3602,36 @@ CONFIG_VIDEO_S5K6A3=m # # Graphics support # -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=100 -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_AUX_BUS=y -CONFIG_DRM_DISPLAY_HELPER=y -CONFIG_DRM_DISPLAY_DP_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set -CONFIG_DRM_GEM_SHMEM_HELPER=m -CONFIG_DRM_SCHED=m +# CONFIG_DRM_PANIC is not set +CONFIG_DRM_CLIENT=y +CONFIG_DRM_CLIENT_LIB=y +CONFIG_DRM_CLIENT_SELECTION=y +CONFIG_DRM_CLIENT_SETUP=y # -# I2C encoder or helper chips +# Supported DRM clients # -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set -# CONFIG_DRM_I2C_NXP_TDA9950 is not set -# end of I2C encoder or helper chips +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_CLIENT_LOG is not set +CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y +CONFIG_DRM_CLIENT_DEFAULT="fbdev" +# end of Supported DRM clients + +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_DISPLAY_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_HELPER=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=m +CONFIG_DRM_SCHED=m # # ARM devices @@ -3548,32 +3684,40 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set -# CONFIG_DRM_PANEL_DSI_CM is not set -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_EDP=y +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_DSI_CM is not set +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -CONFIG_DRM_PANEL_SAMSUNG_LD9040=y +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set @@ -3582,8 +3726,8 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set @@ -3591,17 +3735,26 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set +# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +CONFIG_DRM_PANEL_SAMSUNG_LD9040=y +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=y # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set @@ -3616,14 +3769,19 @@ CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +CONFIG_DRM_PANEL_EDP=y +CONFIG_DRM_PANEL_SIMPLE=y +# CONFIG_DRM_PANEL_SUMMIT is not set +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set -# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set +# CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set +# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels @@ -3637,6 +3795,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -3661,6 +3821,7 @@ CONFIG_DRM_TOSHIBA_TC358764=y # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set +# CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set @@ -3676,6 +3837,7 @@ CONFIG_DRM_ANALOGIX_DP=y # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_LOGICVC is not set +# CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_DRM_PANEL_MIPI_DBI is not set @@ -3687,24 +3849,24 @@ CONFIG_DRM_ANALOGIX_DP=y # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_SHARP_MEMORY is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set # CONFIG_DRM_TVE200 is not set # CONFIG_DRM_LIMA is not set CONFIG_DRM_PANFROST=m +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_MCDE is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_SMSCUFX is not set @@ -3722,10 +3884,9 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y -CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y # CONFIG_FB_MODE_HELPERS is not set @@ -3750,14 +3911,17 @@ CONFIG_LCD_CLASS_DEVICE=y # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=y # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -3772,6 +3936,8 @@ CONFIG_HDMI=y # Console display driver support # CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=30 CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y @@ -3802,10 +3968,10 @@ CONFIG_SND_PCM_TIMER=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set # CONFIG_SND_SEQUENCER is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set @@ -3864,6 +4030,12 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CHV3_I2S is not set # CONFIG_SND_I2S_HI6210_I2S is not set + +# +# SoC Audio for Loongson CPUs +# +# end of SoC Audio for Loongson CPUs + # CONFIG_SND_SOC_IMG is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_SAMSUNG=y @@ -3878,6 +4050,7 @@ CONFIG_SND_SOC_ODROID=y # CONFIG_SND_SOC_ARNDALE is not set # CONFIG_SND_SOC_SAMSUNG_ARIES_WM8994 is not set # CONFIG_SND_SOC_SAMSUNG_MIDAS_WM1811 is not set +CONFIG_SND_SOC_SDCA_OPTIONAL=y # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # @@ -3898,6 +4071,7 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set +# CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set @@ -3910,6 +4084,7 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -3917,7 +4092,11 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set +# CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW88081 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -3938,6 +4117,7 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set +# CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -3948,13 +4128,16 @@ CONFIG_SND_SOC_WM_HUBS=y # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set @@ -3962,7 +4145,6 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_MAX98357A is not set @@ -3989,17 +4171,19 @@ CONFIG_SND_SOC_MAX98090=y # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set # CONFIG_SND_SOC_RT5616 is not set CONFIG_SND_SOC_RT5631=y # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set +# CONFIG_SND_SOC_SMA1307 is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set @@ -4038,6 +4222,7 @@ CONFIG_SND_SOC_RT5631=y # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set @@ -4068,6 +4253,7 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set @@ -4076,6 +4262,8 @@ CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_NTP8918 is not set +# CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set @@ -4103,6 +4291,8 @@ CONFIG_HID_A4TECH=y # CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=y # CONFIG_HID_APPLEIR is not set +# CONFIG_HID_APPLETB_BL is not set +# CONFIG_HID_APPLETB_KBD is not set # CONFIG_HID_ASUS is not set # CONFIG_HID_AUREAL is not set CONFIG_HID_BELKIN=y @@ -4128,11 +4318,13 @@ CONFIG_HID_EZKEY=y # CONFIG_HID_GFRM is not set # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set # CONFIG_HID_GT683R is not set # CONFIG_HID_KEYTOUCH is not set # CONFIG_HID_KYE is not set +# CONFIG_HID_KYSONA is not set # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set @@ -4146,7 +4338,6 @@ CONFIG_HID_ITE=y CONFIG_HID_KENSINGTON=y # CONFIG_HID_LCPOWER is not set # CONFIG_HID_LED is not set -# CONFIG_HID_LENOVO is not set # CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=y # CONFIG_HID_LOGITECH_HIDPP is not set @@ -4168,7 +4359,6 @@ CONFIG_NINTENDO_FF=y # CONFIG_HID_NTRIG is not set # CONFIG_HID_NVIDIA_SHIELD is not set # CONFIG_HID_ORTEK is not set -# CONFIG_HID_OUYA is not set # CONFIG_HID_PANTHERLORD is not set # CONFIG_HID_PENMOUNT is not set # CONFIG_HID_PETALYNX is not set @@ -4202,6 +4392,7 @@ CONFIG_PLAYSTATION_FF=y # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set @@ -4216,6 +4407,11 @@ CONFIG_PLAYSTATION_FF=y # # end of HID-BPF support +CONFIG_I2C_HID=y +# CONFIG_I2C_HID_OF is not set +# CONFIG_I2C_HID_OF_ELAN is not set +# CONFIG_I2C_HID_OF_GOODIX is not set + # # USB HID support # @@ -4224,10 +4420,6 @@ CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # end of USB HID support -CONFIG_I2C_HID=y -# CONFIG_I2C_HID_OF is not set -# CONFIG_I2C_HID_OF_ELAN is not set -# CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y @@ -4248,6 +4440,7 @@ CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_OTG_PRODUCTLIST is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4256,7 +4449,6 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set -# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set @@ -4285,11 +4477,7 @@ CONFIG_USB_WDM=m CONFIG_USB_TMC=m # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set @@ -4429,7 +4617,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set # # USB Physical Layer drivers @@ -4522,6 +4710,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3798MV200 is not set # CONFIG_MMC_DW_K3 is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set @@ -4558,6 +4747,7 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set @@ -4583,6 +4773,7 @@ CONFIG_LEDS_MAX8997=y # CONFIG_LEDS_USER is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set +# CONFIG_LEDS_ST1202 is not set # # Flash and Torch LED drivers @@ -4595,11 +4786,14 @@ CONFIG_LEDS_MAX77693=y # CONFIG_LEDS_RT4505 is not set # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set +# CONFIG_LEDS_SY7802 is not set # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set # @@ -4612,6 +4806,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # @@ -4622,11 +4817,11 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # -# Simple LED drivers +# Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set @@ -4663,6 +4858,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_MAX8998=y CONFIG_RTC_DRV_MAX8997=y +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set @@ -4680,6 +4876,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -4687,6 +4884,7 @@ CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -4767,6 +4965,7 @@ CONFIG_PL330_DMA=y # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set # CONFIG_DW_DMAC is not set @@ -4808,11 +5007,7 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -CONFIG_R8712U=m -CONFIG_VT6656=m # # IIO staging drivers @@ -4822,7 +5017,6 @@ CONFIG_VT6656=m # Accelerometers # # CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # @@ -4849,22 +5043,12 @@ CONFIG_VT6656=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers # CONFIG_STAGING_MEDIA is not set -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set -# CONFIG_FIELDBUS_DEV is not set +# CONFIG_GPIB is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set @@ -4968,7 +5152,6 @@ CONFIG_EXYNOS_IOMMU=y # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -5007,7 +5190,6 @@ CONFIG_EXYNOS_CHIPID=y # CONFIG_EXYNOS_USI is not set CONFIG_EXYNOS_PMU=y CONFIG_EXYNOS_PMU_ARM_DRIVERS=y -CONFIG_EXYNOS_PM_DOMAINS=y # CONFIG_SOC_TI is not set # @@ -5016,6 +5198,33 @@ CONFIG_EXYNOS_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +CONFIG_EXYNOS_PM_DOMAINS=y +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -5042,6 +5251,7 @@ CONFIG_EXTCON=y # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_LC824206XA is not set CONFIG_EXTCON_MAX14577=y # CONFIG_EXTCON_MAX3355 is not set CONFIG_EXTCON_MAX77693=y @@ -5087,6 +5297,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set @@ -5123,34 +5335,46 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4030 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +# CONFIG_AD4851 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set +# CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7625 is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set +# CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set CONFIG_EXYNOS_ADC=y +# CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -5162,11 +5386,15 @@ CONFIG_EXYNOS_ADC=y # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set @@ -5177,8 +5405,11 @@ CONFIG_EXYNOS_ADC=y # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -5222,10 +5453,12 @@ CONFIG_EXYNOS_ADC=y # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_SCD30_CORE is not set # CONFIG_SCD4X is not set @@ -5255,6 +5488,7 @@ CONFIG_EXYNOS_ADC=y # # Digital to analog converters # +# CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set @@ -5266,6 +5500,7 @@ CONFIG_EXYNOS_ADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -5278,17 +5513,21 @@ CONFIG_EXYNOS_ADC=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set +# CONFIG_AD8460 is not set # CONFIG_AD8801 is not set +# CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -5323,6 +5562,7 @@ CONFIG_EXYNOS_ADC=y # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV4420 is not set # CONFIG_ADRF6780 is not set @@ -5364,8 +5604,10 @@ CONFIG_EXYNOS_ADC=y # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -5379,8 +5621,13 @@ CONFIG_EXYNOS_ADC=y # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set +# CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI270_I2C is not set +# CONFIG_BMI270_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set @@ -5389,6 +5636,7 @@ CONFIG_EXYNOS_ADC=y # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set +# CONFIG_SMI240 is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units @@ -5398,11 +5646,15 @@ CONFIG_EXYNOS_ADC=y # # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set +# CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set +# CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set @@ -5415,10 +5667,11 @@ CONFIG_CM36651=y # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set -# CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -5427,6 +5680,7 @@ CONFIG_CM36651=y # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set +# CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -5442,8 +5696,11 @@ CONFIG_CM36651=y # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set +# CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -5451,9 +5708,11 @@ CONFIG_CM36651=y # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set CONFIG_AK8975=y # CONFIG_AK09911 is not set +# CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set @@ -5463,6 +5722,7 @@ CONFIG_AK8975=y # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors @@ -5517,10 +5777,12 @@ CONFIG_AK8975=y # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -5528,6 +5790,7 @@ CONFIG_AK8975=y # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -5543,6 +5806,7 @@ CONFIG_AK8975=y # # Proximity and distance sensors # +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set @@ -5557,6 +5821,7 @@ CONFIG_AK8975=y # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -5564,6 +5829,7 @@ CONFIG_AK8975=y # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -5573,6 +5839,7 @@ CONFIG_AK8975=y # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -5581,14 +5848,15 @@ CONFIG_AK8975=y # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_SAMSUNG=y # CONFIG_PWM_XILINX is not set @@ -5613,6 +5881,7 @@ CONFIG_EXYNOS_IRQ_COMBINER=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set +# CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms @@ -5626,7 +5895,6 @@ CONFIG_GENERIC_PHY_MIPI_DPHY=y # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set -# CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set @@ -5648,6 +5916,7 @@ CONFIG_PHY_EXYNOS5_USBDRD=y # CONFIG_ARM_CCI_PMU is not set # CONFIG_ARM_CCN is not set CONFIG_ARM_PMU=y +CONFIG_ARM_V7_PMU=y CONFIG_ARM_PMUV3=y # end of Performance monitor support @@ -5662,12 +5931,14 @@ CONFIG_ARM_PMUV3=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RMEM is not set @@ -5698,6 +5969,7 @@ CONFIG_PM_OPP=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set @@ -5710,7 +5982,6 @@ CONFIG_EXT4_FS_SECURITY=y CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_SECURITY is not set @@ -5729,10 +6000,10 @@ CONFIG_XFS_SUPPORT_ASCII_CI=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_EXPERIMENTAL is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=y @@ -5743,6 +6014,7 @@ CONFIG_F2FS_CHECK_FS=y # CONFIG_F2FS_FS_COMPRESSION is not set CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -5753,11 +6025,14 @@ CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set # CONFIG_QUOTA is not set CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m # CONFIG_CUSE is not set # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y +CONFIG_FUSE_IO_URING=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -5770,9 +6045,9 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set CONFIG_FSCACHE=y # CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_DEBUG is not set # CONFIG_CACHEFILES is not set # end of Caches @@ -5796,10 +6071,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_LZX_XPRESS is not set # CONFIG_NTFS3_FS_POSIX_ACL is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -5854,7 +6129,6 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -5902,6 +6176,7 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y # CONFIG_CIFS_ROOT is not set +# CONFIG_CIFS_COMPRESSION is not set # CONFIG_SMB_SERVER is not set CONFIG_SMBFS=y # CONFIG_CODA_FS is not set @@ -5979,8 +6254,6 @@ CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_NO_FORCE is not set # CONFIG_SECURITY is not set CONFIG_SECURITYFS=y -# CONFIG_HARDENED_USERCOPY is not set -# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf" @@ -5998,12 +6271,20 @@ CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_STACK_ALL_PATTERN is not set # CONFIG_INIT_STACK_ALL_ZERO is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization +# +# Bounds checking +# +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_HARDENED_USERCOPY is not set +# end of Bounds checking + # # Hardening of kernel data structures # @@ -6050,6 +6331,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_KRB5ENC is not set CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=m # end of Crypto core or helper @@ -6064,7 +6346,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set # end of Public-key cryptography @@ -6096,14 +6377,11 @@ CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set -# CONFIG_CRYPTO_KEYWRAP is not set CONFIG_CRYPTO_LRW=m -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set CONFIG_CRYPTO_XTS=m # end of Length-preserving ciphers and modes @@ -6139,7 +6417,6 @@ CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_VMAC is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_XXHASH=m @@ -6150,7 +6427,6 @@ CONFIG_CRYPTO_XXHASH=m # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y -# CONFIG_CRYPTO_CRCT10DIF is not set # end of CRCs (cyclic redundancy checks) # @@ -6174,7 +6450,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -6188,7 +6466,6 @@ CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y -# CONFIG_CRYPTO_STATS is not set # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y @@ -6196,10 +6473,10 @@ CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (arm) # -CONFIG_CRYPTO_CURVE25519_NEON=y +CONFIG_CRYPTO_CURVE25519_NEON=m CONFIG_CRYPTO_GHASH_ARM_CE=m # CONFIG_CRYPTO_NHPOLY1305_NEON is not set -CONFIG_CRYPTO_POLY1305_ARM=y +CONFIG_CRYPTO_POLY1305_ARM=m CONFIG_CRYPTO_BLAKE2S_ARM=y CONFIG_CRYPTO_BLAKE2B_NEON=m CONFIG_CRYPTO_SHA1_ARM=m @@ -6211,8 +6488,7 @@ CONFIG_CRYPTO_SHA512_ARM=m CONFIG_CRYPTO_AES_ARM=m CONFIG_CRYPTO_AES_ARM_BS=m # CONFIG_CRYPTO_AES_ARM_CE is not set -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32_ARM_CE=m +CONFIG_CRYPTO_CHACHA20_NEON=m # end of Accelerated Cryptographic Algorithms for CPU (arm) CONFIG_CRYPTO_HW=y @@ -6242,6 +6518,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking +# CONFIG_CRYPTO_KRB5 is not set CONFIG_BINARY_PRINTF=y # @@ -6259,7 +6536,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y # @@ -6271,35 +6547,30 @@ CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_LIB_CHACHA=y +CONFIG_CRYPTO_LIB_CHACHA_INTERNAL=m +CONFIG_CRYPTO_LIB_CHACHA=m CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=y -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y -CONFIG_CRYPTO_LIB_CURVE25519=y +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519_INTERNAL=m +CONFIG_CRYPTO_LIB_CURVE25519=m CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9 CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_POLY1305=y -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y +CONFIG_CRYPTO_LIB_POLY1305_INTERNAL=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines -CONFIG_CRC_CCITT=y +CONFIG_CRC_CCITT=m CONFIG_CRC16=y -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC64_ROCKSOFT is not set +CONFIG_ARCH_HAS_CRC_T10DIF=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set -# CONFIG_CRC4 is not set -# CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=m -# CONFIG_CRC8 is not set +CONFIG_ARCH_HAS_CRC32=y +CONFIG_CRC32_ARCH=y +CONFIG_CRC_OPTIMIZATIONS=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y @@ -6314,10 +6585,11 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set @@ -6335,7 +6607,7 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_DMA_DECLARE_COHERENT=y @@ -6343,7 +6615,9 @@ CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_ARCH_HAS_DMA_ALLOC=y CONFIG_DMA_CMA=y # @@ -6366,11 +6640,13 @@ CONFIG_NLATTR=y CONFIG_CLZ_TAB=y # CONFIG_IRQ_POLL is not set CONFIG_MPILIB=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_32=y +CONFIG_GENERIC_VDSO_DATA_STORE=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y # CONFIG_FONT_8x8 is not set @@ -6389,10 +6665,13 @@ CONFIG_FONT_TER16x32=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_UNION_FIND=y # # Kernel hacking @@ -6421,7 +6700,7 @@ CONFIG_DEBUG_MISC=y # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -6431,7 +6710,6 @@ CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set -# CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=1024 # CONFIG_STRIP_ASM_SYMS is not set @@ -6455,7 +6733,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -6466,6 +6744,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # @@ -6479,13 +6758,14 @@ CONFIG_SLUB_DEBUG=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set @@ -6493,6 +6773,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_KMAP_LOCAL is not set # CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -6524,11 +6805,9 @@ CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # # Scheduler Debugging # -CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set CONFIG_DEBUG_PREEMPT=y # @@ -6557,7 +6836,6 @@ CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_SCF_TORTURE_TEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) -# CONFIG_TRACE_IRQFLAGS is not set # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set @@ -6576,7 +6854,6 @@ CONFIG_STACKTRACE=y # # RCU Debugging # -# CONFIG_PROVE_RCU is not set # CONFIG_RCU_SCALE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set @@ -6603,7 +6880,6 @@ CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y CONFIG_CONTEXT_SWITCH_TRACER=y -# CONFIG_PREEMPTIRQ_TRACEPOINTS is not set CONFIG_TRACING=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y @@ -6644,7 +6920,9 @@ CONFIG_PROBE_EVENTS=y # # arm Debugging # +CONFIG_ARM_PTDUMP_CORE=y # CONFIG_ARM_PTDUMP_DEBUGFS is not set +CONFIG_ARM_DEBUG_WX=y # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -6670,6 +6948,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set @@ -6678,11 +6957,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set @@ -6692,9 +6967,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set -# CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set @@ -6702,9 +6975,11 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set +# CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -6714,3 +6989,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +CONFIG_IO_URING_ZCRX=y diff --git a/projects/Samsung/patches/linux/samsung-0008-WIP-ARM-dma-mapping-implement-alloc_noncontiguous.patch b/projects/Samsung/patches/linux/samsung-0008-WIP-ARM-dma-mapping-implement-alloc_noncontiguous.patch deleted file mode 100644 index e88a4b3a65..0000000000 --- a/projects/Samsung/patches/linux/samsung-0008-WIP-ARM-dma-mapping-implement-alloc_noncontiguous.patch +++ /dev/null @@ -1,93 +0,0 @@ -From a3760f539508e81d47b21321aa42a09ce96555d3 Mon Sep 17 00:00:00 2001 -From: Pavel Golikov -Date: Fri, 24 Jun 2022 15:52:58 +0000 -Subject: [PATCH 08/21] WIP: ARM/dma-mapping: implement ->alloc_noncontiguous - -Implement support for allocating a non-contiguous DMA region. The -implementation is based on the ma-iommu driver. - -Signed-off-by: Pavel Golikov ---- - arch/arm/mm/dma-mapping.c | 59 +++++++++++++++++++++++++++++++++++++++ - 1 file changed, 59 insertions(+) - -diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c -index 059cce018570..8f867cb9fe75 100644 ---- a/arch/arm/mm/dma-mapping.c -+++ b/arch/arm/mm/dma-mapping.c -@@ -1759,6 +1759,63 @@ static void arm_iommu_unmap_sg(struct device *dev, - } - } - -+static struct sg_table *arm_iommu_alloc_noncontiguous(struct device *dev, -+ size_t size, enum dma_data_direction dir, gfp_t gfp, -+ unsigned long attrs) -+{ -+ struct dma_sgt_handle *sh; -+ int count; -+ -+ sh = kmalloc(sizeof(*sh), gfp); -+ if (!sh) -+ return NULL; -+ -+ size = PAGE_ALIGN(size); -+ count = size >> PAGE_SHIFT; -+ -+ /* -+ * Following is a work-around (a.k.a. hack) to prevent pages -+ * with __GFP_COMP being passed to split_page() which cannot -+ * handle them. The real problem is that this flag probably -+ * should be 0 on ARM as it is not supported on this -+ * platform; see CONFIG_HUGETLBFS. -+ */ -+ gfp &= ~(__GFP_COMP); -+ -+ sh->pages = __iommu_alloc_buffer(dev, size, gfp, attrs, false); -+ if (!sh->pages) -+ goto err_sh; -+ -+ if (sg_alloc_table_from_pages(&sh->sgt, sh->pages, count, 0, size, -+ GFP_KERNEL)) -+ goto err_buffer; -+ -+ if (arm_iommu_map_sg(dev, sh->sgt.sgl, sh->sgt.orig_nents, dir, attrs -+ ) < 1) -+ goto err_free_sg; -+ -+ return &sh->sgt; -+ -+err_free_sg: -+ sg_free_table(&sh->sgt); -+err_buffer: -+ __iommu_free_buffer(dev, sh->pages, size, attrs); -+err_sh: -+ kfree(sh); -+ return NULL; -+} -+ -+static void arm_iommu_free_noncontiguous(struct device *dev, size_t size, -+ struct sg_table *sgt, enum dma_data_direction dir) -+{ -+ struct dma_sgt_handle *sh = sgt_handle(sgt); -+ -+ arm_iommu_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir, 0); -+ __iommu_free_buffer(dev, sh->pages, PAGE_ALIGN(size), 0); -+ sg_free_table(&sh->sgt); -+ kfree(sh); -+} -+ - /** - * arm_iommu_sync_sg_for_cpu - * @dev: valid struct device pointer -@@ -1996,6 +2053,8 @@ static const struct dma_map_ops iommu_ops = { - - .map_page = arm_iommu_map_page, - .unmap_page = arm_iommu_unmap_page, -+ .alloc_noncontiguous = arm_iommu_alloc_noncontiguous, -+ .free_noncontiguous = arm_iommu_free_noncontiguous, - .sync_single_for_cpu = arm_iommu_sync_single_for_cpu, - .sync_single_for_device = arm_iommu_sync_single_for_device, - --- -2.17.1 - diff --git a/projects/Samsung/patches/linux/samsung-0012-MEMEKA-media-s5p-mfc-copy-timestamp-and-timecode-in-.patch b/projects/Samsung/patches/linux/samsung-0012-MEMEKA-media-s5p-mfc-copy-timestamp-and-timecode-in-.patch index acd6a896bc..acd39181ee 100644 --- a/projects/Samsung/patches/linux/samsung-0012-MEMEKA-media-s5p-mfc-copy-timestamp-and-timecode-in-.patch +++ b/projects/Samsung/patches/linux/samsung-0012-MEMEKA-media-s5p-mfc-copy-timestamp-and-timecode-in-.patch @@ -13,35 +13,35 @@ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/medi index b65e506665af..d445466046eb 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c -@@ -1214,6 +1214,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) +@@ -1231,6 +1231,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *mb_entry; + struct s5p_mfc_buf *dst_buf; - unsigned long enc_y_addr = 0, enc_c_addr = 0; - unsigned long mb_y_addr, mb_c_addr; + unsigned long enc_y_addr = 0, enc_c_addr = 0, enc_c_1_addr = 0; + unsigned long mb_y_addr, mb_c_addr, mb_c_1_addr; int slice_type; -@@ -1233,8 +1234,12 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) - &mb_entry->b->vb2_buf, 0); - mb_c_addr = vb2_dma_contig_plane_dma_addr( - &mb_entry->b->vb2_buf, 1); +@@ -1259,8 +1260,12 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) + (&mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + dst_buf = list_entry(ctx->dst_queue.next, + struct s5p_mfc_buf, list); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (enc_y_addr == mb_y_addr && enc_c_addr == mb_c_addr && enc_c_1_addr + == mb_c_1_addr) { + dst_buf->b->timecode = mb_entry->b->timecode; + dst_buf->b->vb2_buf.timestamp = mb_entry->b->vb2_buf.timestamp; list_del(&mb_entry->list); ctx->src_queue_cnt--; vb2_buffer_done(&mb_entry->b->vb2_buf, -@@ -1247,8 +1252,12 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) - &mb_entry->b->vb2_buf, 0); - mb_c_addr = vb2_dma_contig_plane_dma_addr( - &mb_entry->b->vb2_buf, 1); +@@ -1280,8 +1285,12 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) + mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + dst_buf = list_entry(ctx->dst_queue.next, + struct s5p_mfc_buf, list); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (enc_y_addr == mb_y_addr && enc_c_addr == mb_c_addr && enc_c_1_addr + == mb_c_1_addr) { + dst_buf->b->timecode = mb_entry->b->timecode; + dst_buf->b->vb2_buf.timestamp = mb_entry->b->vb2_buf.timestamp; list_del(&mb_entry->list); diff --git a/scripts/uboot_helper b/scripts/uboot_helper index be5c85cefd..e4f78d4c64 100755 --- a/scripts/uboot_helper +++ b/scripts/uboot_helper @@ -258,6 +258,10 @@ devices = \ 'dtb' : 'imx8mq-evk.dtb', 'config' : 'imx8mq_evk_defconfig' }, + 'phanbell' : { + 'dtb' : 'imx8mq-phanbell.dtb', + 'config' : 'imx8mq_phanbell_defconfig' + }, 'pico-mq' : { 'dtb' : 'imx8mq-pico-pi.dtb', 'config' : 'pico-imx8mq_defconfig'