mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
synced 2025-07-24 11:16:51 +00:00
Merge pull request #9955 from chewitt/amlogic-upstream
Amlogic: kernel/u-boot/ffmpeg updates
This commit is contained in:
commit
bdcd1d9a44
@ -16,11 +16,11 @@ PKG_PATCH_DIRS="${LINUX}"
|
||||
|
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case "${LINUX}" in
|
||||
amlogic)
|
||||
PKG_VERSION="5996393469d99560b7845d22c9eff00661de0724" # 6.12.9
|
||||
PKG_SHA256="1a140beb8b10ea52e4dd595c5ce4e00995e0176353f980be50aedca4c009c2b7"
|
||||
PKG_VERSION="9bc5c94e278f780af15b3f6e13ae08310aeae880" # 6.14.2
|
||||
PKG_SHA256="c031ffd2ce70ffe5f89e8893b9b385169d3f27103af60e2e6b1903c67d3c98cd"
|
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PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
|
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PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
|
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PKG_PATCH_DIRS="default rtlwifi/6.13 rtlwifi/6.14 rtlwifi/after-6.14"
|
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PKG_PATCH_DIRS="default rtlwifi/after-6.14"
|
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;;
|
||||
raspberrypi)
|
||||
PKG_VERSION="82ea1311dc3851e5b51d95f084689b6dbb7bf425" # 6.12.21
|
||||
@ -33,7 +33,7 @@ case "${LINUX}" in
|
||||
PKG_VERSION="6.12.20"
|
||||
PKG_SHA256="230e89b07b0ab82e74f07ecc1bee3105dca81d0ef4a97f900929c407249b6ac7"
|
||||
PKG_URL="https://www.kernel.org/pub/linux/kernel/v${PKG_VERSION/.*/}.x/${PKG_NAME}-${PKG_VERSION}.tar.xz"
|
||||
PKG_PATCH_DIRS="default rtlwifi/6.13 rtlwifi/6.14 rtlwifi/after-6.14"
|
||||
PKG_PATCH_DIRS="default default-before-6.14 rtlwifi/6.13 rtlwifi/6.14 rtlwifi/after-6.14"
|
||||
;;
|
||||
esac
|
||||
|
||||
|
@ -14,9 +14,9 @@ PKG_PATCH_DIRS="libreelec"
|
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|
||||
case "${PROJECT}" in
|
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Amlogic)
|
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PKG_VERSION="5f39f6c33638de22605b16ec8dc1898135b09bb0"
|
||||
PKG_FFMPEG_BRANCH="test/7.1/main"
|
||||
PKG_SHA256="f432ea06ef9414ba26cccb95287f00718e12b5ad27c9079fc0c0cefc4b4a2325"
|
||||
PKG_VERSION="6dbf87aefd7f491210abe1e043a1c228fa1439a0"
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PKG_FFMPEG_BRANCH="test/7.1.1/main"
|
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PKG_SHA256="66aead94c3884c9bc1ff2866f44d87f2f61d106bf203e1c723f83170b7e84297"
|
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PKG_URL="https://github.com/jc-kynesim/rpi-ffmpeg/archive/${PKG_VERSION}.tar.gz"
|
||||
;;
|
||||
RPi)
|
||||
|
@ -1,7 +1,7 @@
|
||||
From b2aa2cc114b511c8624470e1a294fd0544f7c7f4 Mon Sep 17 00:00:00 2001
|
||||
From 5bb8805228fcb342a09ae2093775d8ca9825eef7 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 13 Apr 2019 05:41:51 +0000
|
||||
Subject: [PATCH 01/58] LOCAL: set meson-gx cma pool to 896MB
|
||||
Subject: [PATCH 01/53] LOCAL: set meson-gx cma pool to 896MB
|
||||
|
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This change sets the CMA pool to a larger 896MB! value for vdec use
|
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|
||||
|
@ -1,7 +1,7 @@
|
||||
From 535e600d792af4d60acde764d2defff5c7521be3 Mon Sep 17 00:00:00 2001
|
||||
From 61ec51fc6355b44c6a67bd31dfae62d1ef49bde1 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
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Date: Wed, 14 Aug 2019 19:58:14 +0000
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Subject: [PATCH 02/58] LOCAL: set meson-g12 cma pool to 896MB
|
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Subject: [PATCH 02/53] LOCAL: set meson-g12 cma pool to 896MB
|
||||
|
||||
This change sets the CMA pool to a larger 896MB! value for vdec use
|
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|
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@ -11,7 +11,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index d08c97797010..0bc28eb2079b 100644
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index 49b51c54013f..2a7f91b2a7cb 100644
|
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
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@@ -117,7 +117,7 @@ secmon_reserved_bl32: secmon@5300000 {
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 6278379b84ca61605d0e86492caaba57b20644b6 Mon Sep 17 00:00:00 2001
|
||||
From 8ad1d87fdd6ef19e36698ed3196da4290d539327 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 13 Apr 2019 05:45:18 +0000
|
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Subject: [PATCH 03/58] LOCAL: arm64: fix Kodi sysinfo CPU information
|
||||
Subject: [PATCH 03/53] LOCAL: arm64: fix Kodi sysinfo CPU information
|
||||
|
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This allows the CPU information to show in the Kodi sysinfo screen, e.g.
|
||||
|
||||
@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
1 file changed, 1 insertion(+), 2 deletions(-)
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||||
|
||||
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
|
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index 44718d0482b3..1c6721d1b6b9 100644
|
||||
index 285d7d538342..117c83566fd7 100644
|
||||
--- a/arch/arm64/kernel/cpuinfo.c
|
||||
+++ b/arch/arm64/kernel/cpuinfo.c
|
||||
@@ -206,8 +206,7 @@ static int c_show(struct seq_file *m, void *v)
|
||||
@@ -222,8 +222,7 @@ static int c_show(struct seq_file *m, void *v)
|
||||
* "processor". Give glibc what it expects.
|
||||
*/
|
||||
seq_printf(m, "processor\t: %d\n", i);
|
||||
|
@ -1,7 +1,7 @@
|
||||
From d6b4aee953537ba901a65275045b6a0703770067 Mon Sep 17 00:00:00 2001
|
||||
From 541a3e64dce42c72d208016abcb91200ae6c893c Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Thu, 3 Nov 2016 15:29:23 +0100
|
||||
Subject: [PATCH 04/58] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
|
||||
Subject: [PATCH 04/53] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
|
||||
|
||||
The Amlogic Meson GX SoCs uses a non-standard argument to the
|
||||
PSCI CPU_SUSPEND call to enter system suspend.
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 1e4c25a0f363de1786a93af1276978001dffdb55 Mon Sep 17 00:00:00 2001
|
||||
From f0cd0ee46866bf5c51e5e9ae659bf65a00a52b17 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Thu, 3 Nov 2016 15:29:25 +0100
|
||||
Subject: [PATCH 05/58] LOCAL: arm64: dts: meson: add support for GX PM and
|
||||
Subject: [PATCH 05/53] LOCAL: arm64: dts: meson: add support for GX PM and
|
||||
Virtual RTC
|
||||
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
|
@ -1,7 +1,7 @@
|
||||
From ec690a25fe036fa171b745e0d69ec531894269c1 Mon Sep 17 00:00:00 2001
|
||||
From 11f6cc8d5b113befe40a069fcd3b4d14253440d1 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 21 Jan 2021 01:35:36 +0000
|
||||
Subject: [PATCH 06/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Subject: [PATCH 06/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Khadas VIM
|
||||
|
||||
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 4a3e41ffca965716f704a002158fa5a38d779637 Mon Sep 17 00:00:00 2001
|
||||
From faaef1d48296fd78ad60dc6f8d76a133ed67fb09 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 6 Nov 2021 13:01:08 +0000
|
||||
Subject: [PATCH 07/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Subject: [PATCH 07/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
|
||||
Khadas VIM2
|
||||
|
||||
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 15a29e760d0488ec170293db626c4edddc364e9c Mon Sep 17 00:00:00 2001
|
||||
From af394a3409915c1d7d022a779476f65cd6876c39 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 1 Feb 2021 19:27:40 +0000
|
||||
Subject: [PATCH 08/58] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
|
||||
Subject: [PATCH 08/53] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
|
||||
NEO U9-H
|
||||
|
||||
Add node aliases to prevent meson-vrtc from claiming /dev/rtc0
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 1de6319b774217b31404dfeac7303402670a58a9 Mon Sep 17 00:00:00 2001
|
||||
From 6169c8539c94c04523469ca0c9a0618881eb7163 Mon Sep 17 00:00:00 2001
|
||||
From: Anssi Hannula <anssi.hannula@iki.fi>
|
||||
Date: Sun, 17 Apr 2022 04:37:48 +0000
|
||||
Subject: [PATCH 09/58] LOCAL: ASoC: meson: assign internal PCM
|
||||
Subject: [PATCH 09/53] LOCAL: ASoC: meson: assign internal PCM
|
||||
chmap/ELD/IEC958 kctls to device 0
|
||||
|
||||
On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
|
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@ -24,7 +24,7 @@ Tested-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
2 files changed, 6 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
|
||||
index 6eaa950504cf..dbcf1f613fb4 100644
|
||||
index 6eaa950504cf..f2f05f1c4f98 100644
|
||||
--- a/sound/core/pcm_lib.c
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||||
+++ b/sound/core/pcm_lib.c
|
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@@ -2612,7 +2612,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream,
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@ -33,14 +33,14 @@ index 6eaa950504cf..dbcf1f613fb4 100644
|
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knew.name = "Capture Channel Map";
|
||||
- knew.device = pcm->device;
|
||||
+ if (pcm->internal && pcm->device)
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+ dev_info(pcm->card->dev, "workaround active: internal PCM chmap controls mapped to device 0\n");
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+ dev_info(pcm->card->dev, "workaround: internal PCM chmap controls mapped to device 0\n");
|
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+ else
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+ knew.device = pcm->device;
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knew.count = pcm->streams[stream].substream_count;
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knew.private_value = private_value;
|
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info->kctl = snd_ctl_new1(&knew, info);
|
||||
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
|
||||
index d9df29a26f4f..b39756f2e49b 100644
|
||||
index 69f98975e14a..16f2e8511727 100644
|
||||
--- a/sound/soc/codecs/hdmi-codec.c
|
||||
+++ b/sound/soc/codecs/hdmi-codec.c
|
||||
@@ -816,7 +816,8 @@ static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 528d75a3dfe9427f1d12af981a5dc9af7aad7174 Mon Sep 17 00:00:00 2001
|
||||
From b38f002a46b824e6da63514b82fe965af1272d44 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 5 Jan 2023 15:16:46 +0000
|
||||
Subject: [PATCH 10/58] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
|
||||
Subject: [PATCH 10/53] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
|
||||
decoding
|
||||
|
||||
The MPEG1/2 decoder is broken and nobody has volunteered to poke
|
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@ -11,11 +11,11 @@ hardware decoding for now.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../staging/media/meson/vdec/vdec_platform.c | 110 ------------------
|
||||
1 file changed, 110 deletions(-)
|
||||
.../staging/media/meson/vdec/vdec_platform.c | 132 ------------------
|
||||
1 file changed, 132 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
index 66bb307db85a..75d295fdb5f8 100644
|
||||
index 66bb307db85a..8a7e5b3f5d00 100644
|
||||
--- a/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
+++ b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
@@ -26,28 +26,6 @@ static const struct amvdec_format vdec_formats_gxbb[] = {
|
||||
@ -76,7 +76,7 @@ index 66bb307db85a..75d295fdb5f8 100644
|
||||
},
|
||||
};
|
||||
|
||||
@@ -164,28 +120,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
|
||||
@@ -114,28 +70,6 @@ static const struct amvdec_format vdec_formats_gxlx[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
@ -105,7 +105,7 @@ index 66bb307db85a..75d295fdb5f8 100644
|
||||
},
|
||||
};
|
||||
|
||||
@@ -214,28 +148,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
|
||||
@@ -164,28 +98,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
@ -134,7 +134,36 @@ index 66bb307db85a..75d295fdb5f8 100644
|
||||
},
|
||||
};
|
||||
|
||||
@@ -264,28 +176,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
|
||||
@@ -214,28 +126,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
- }, {
|
||||
- .pixfmt = V4L2_PIX_FMT_MPEG1,
|
||||
- .min_buffers = 8,
|
||||
- .max_buffers = 8,
|
||||
- .max_width = 1920,
|
||||
- .max_height = 1080,
|
||||
- .vdec_ops = &vdec_1_ops,
|
||||
- .codec_ops = &codec_mpeg12_ops,
|
||||
- .firmware_path = "meson/vdec/gxl_mpeg12.bin",
|
||||
- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
|
||||
- .flags = V4L2_FMT_FLAG_COMPRESSED,
|
||||
- }, {
|
||||
- .pixfmt = V4L2_PIX_FMT_MPEG2,
|
||||
- .min_buffers = 8,
|
||||
- .max_buffers = 8,
|
||||
- .max_width = 1920,
|
||||
- .max_height = 1080,
|
||||
- .vdec_ops = &vdec_1_ops,
|
||||
- .codec_ops = &codec_mpeg12_ops,
|
||||
- .firmware_path = "meson/vdec/gxl_mpeg12.bin",
|
||||
- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
|
||||
- .flags = V4L2_FMT_FLAG_COMPRESSED,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -264,28 +154,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
|
@ -1,110 +0,0 @@
|
||||
From 14311c2df4463e5ed541c8baa1087b9bec05fd7f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 3 Jan 2024 03:14:06 +0000
|
||||
Subject: [PATCH 11/58] FROMGIT(6.14): arm64: dts: meson: drop broadcom
|
||||
compatible from reference board SDIO nodes
|
||||
|
||||
Drop the Broadcom compatible and use a generic sdio identifier with the Amlogic
|
||||
reference boards. This allows a wider range of Android STB devices with QCA9377
|
||||
and RTL8189ES/FS chips to have working WiFi when booting from the reference dtb
|
||||
files. There is no observed impact on Broadcom devices.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts | 3 +--
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts | 3 +--
|
||||
6 files changed, 6 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
index 52d57773a77f..1736bd2e96e2 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
|
||||
@@ -178,9 +178,8 @@ &sd_emmc_a {
|
||||
vmmc-supply = <&vddao_3v3>;
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
index c1470416faad..7dffeb5931c9 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
|
||||
@@ -102,8 +102,7 @@ hdmi_tx_tmds_out: endpoint {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
index 92c425d0259c..ff9145d49090 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
|
||||
@@ -21,8 +21,7 @@ ðmac {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
index 7e7dc87ede2d..b52a830efcce 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
|
||||
@@ -134,9 +134,8 @@ &sd_emmc_a {
|
||||
vmmc-supply = <&vddao_3v3>;
|
||||
vqmmc-supply = <&vddio_boot>;
|
||||
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
index d4858afa0e9c..feb31207773f 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
|
||||
@@ -72,8 +72,7 @@ external_phy: ethernet-phy@0 {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
index d02b80d77378..6c8bec1853ac 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
|
||||
@@ -21,8 +21,7 @@ ðmac {
|
||||
};
|
||||
|
||||
&sd_emmc_a {
|
||||
- brcmf: wifi@1 {
|
||||
+ sdio: wifi@1 {
|
||||
reg = <1>;
|
||||
- compatible = "brcm,bcm4329-fmac";
|
||||
};
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 3b97b2884e6416ef0d723c93e381a59b829d1411 Mon Sep 17 00:00:00 2001
|
||||
From 125cefb6ba538033a69eb17870cf87e99e9a15e6 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Fri, 27 Dec 2024 22:25:12 +0100
|
||||
Subject: [PATCH 16/58] FROMGIT(6.14): arm64: dts: amlogic: gx: switch to the
|
||||
Subject: [PATCH 11/53] FROMGIT(6.15): arm64: dts: amlogic: gx: switch to the
|
||||
new PWM controller binding
|
||||
|
||||
Use the new PWM controller binding which now relies on passing all
|
@ -1,40 +0,0 @@
|
||||
From a4658eb9da3ee5555a82be9bbd838fa14f2a914e Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Fri, 13 Dec 2024 11:03:23 +0100
|
||||
Subject: [PATCH 12/58] FROMGIT(6.14): clk: amlogic: g12a: fix mmc A peripheral
|
||||
clock
|
||||
|
||||
The bit index of the peripheral clock for mmc A is wrong
|
||||
This was probably not a problem for mmc A as the peripheral is likely left
|
||||
enabled by the bootloader.
|
||||
|
||||
No issues has been reported so far but it could be a problem, most likely
|
||||
some form of conflict between the ethernet and mmc A clock, breaking
|
||||
ethernet on init.
|
||||
|
||||
Use the value provided by the documentation for mmc A before this
|
||||
becomes an actual problem.
|
||||
|
||||
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index 02dda57105b1..ff634d3a2f95 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -4317,7 +4317,7 @@ static MESON_GATE(g12a_spicc_1, HHI_GCLK_MPEG0, 14);
|
||||
static MESON_GATE(g12a_hiu_reg, HHI_GCLK_MPEG0, 19);
|
||||
static MESON_GATE(g12a_mipi_dsi_phy, HHI_GCLK_MPEG0, 20);
|
||||
static MESON_GATE(g12a_assist_misc, HHI_GCLK_MPEG0, 23);
|
||||
-static MESON_GATE(g12a_emmc_a, HHI_GCLK_MPEG0, 4);
|
||||
+static MESON_GATE(g12a_emmc_a, HHI_GCLK_MPEG0, 24);
|
||||
static MESON_GATE(g12a_emmc_b, HHI_GCLK_MPEG0, 25);
|
||||
static MESON_GATE(g12a_emmc_c, HHI_GCLK_MPEG0, 26);
|
||||
static MESON_GATE(g12a_audio_codec, HHI_GCLK_MPEG0, 28);
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From e6298e5601c435f4b847271bfcf33044a343ec6a Mon Sep 17 00:00:00 2001
|
||||
From 5ce556e64d2be8040826a7044089c10a817f3ced Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Fri, 27 Dec 2024 22:25:13 +0100
|
||||
Subject: [PATCH 17/58] FROMGIT(6.14): arm64: dts: amlogic: axg: switch to the
|
||||
Subject: [PATCH 12/53] FROMGIT(6.15): arm64: dts: amlogic: axg: switch to the
|
||||
new PWM controller binding
|
||||
|
||||
Use the new PWM controller binding which now relies on passing all
|
@ -1,99 +0,0 @@
|
||||
From 48432d3ed3b7011051afc3d422e50cd42ebf860b Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Fri, 13 Dec 2024 15:30:17 +0100
|
||||
Subject: [PATCH 13/58] FROMGIT(6.14): clk: amlogic: g12b: fix cluster A parent
|
||||
data
|
||||
|
||||
Several clocks used by both g12a and g12b use the g12a cpu A clock hw
|
||||
pointer as clock parent. This is incorrect on g12b since the parents of
|
||||
cluster A cpu clock are different. Also the hw clock provided as parent to
|
||||
these children is not even registered clock on g12b.
|
||||
|
||||
Fix the problem by reverting to the global namespace and let CCF pick
|
||||
the appropriate, as it is already done for other clocks, such as
|
||||
cpu_clk_trace_div.
|
||||
|
||||
Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------
|
||||
1 file changed, 24 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index ff634d3a2f95..4f92b83965d5 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -1139,8 +1139,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = {
|
||||
.hw.init = &(struct clk_init_data) {
|
||||
.name = "cpu_clk_div16_en",
|
||||
.ops = &clk_regmap_gate_ro_ops,
|
||||
- .parent_hws = (const struct clk_hw *[]) {
|
||||
- &g12a_cpu_clk.hw
|
||||
+ .parent_data = &(const struct clk_parent_data) {
|
||||
+ /*
|
||||
+ * Note:
|
||||
+ * G12A and G12B have different cpu clocks (with
|
||||
+ * different struct clk_hw). We fallback to the global
|
||||
+ * naming string mechanism so this clock picks
|
||||
+ * up the appropriate one. Same goes for the other
|
||||
+ * clock using cpu cluster A clock output and present
|
||||
+ * on both G12 variant.
|
||||
+ */
|
||||
+ .name = "cpu_clk",
|
||||
+ .index = -1,
|
||||
},
|
||||
.num_parents = 1,
|
||||
/*
|
||||
@@ -1205,7 +1215,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = {
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_apb_div",
|
||||
.ops = &clk_regmap_divider_ro_ops,
|
||||
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
|
||||
+ .parent_data = &(const struct clk_parent_data) {
|
||||
+ .name = "cpu_clk",
|
||||
+ .index = -1,
|
||||
+ },
|
||||
.num_parents = 1,
|
||||
},
|
||||
};
|
||||
@@ -1239,7 +1252,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = {
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_atb_div",
|
||||
.ops = &clk_regmap_divider_ro_ops,
|
||||
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
|
||||
+ .parent_data = &(const struct clk_parent_data) {
|
||||
+ .name = "cpu_clk",
|
||||
+ .index = -1,
|
||||
+ },
|
||||
.num_parents = 1,
|
||||
},
|
||||
};
|
||||
@@ -1273,7 +1289,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = {
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_axi_div",
|
||||
.ops = &clk_regmap_divider_ro_ops,
|
||||
- .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw },
|
||||
+ .parent_data = &(const struct clk_parent_data) {
|
||||
+ .name = "cpu_clk",
|
||||
+ .index = -1,
|
||||
+ },
|
||||
.num_parents = 1,
|
||||
},
|
||||
};
|
||||
@@ -1308,13 +1327,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = {
|
||||
.name = "cpu_clk_trace_div",
|
||||
.ops = &clk_regmap_divider_ro_ops,
|
||||
.parent_data = &(const struct clk_parent_data) {
|
||||
- /*
|
||||
- * Note:
|
||||
- * G12A and G12B have different cpu_clks (with
|
||||
- * different struct clk_hw). We fallback to the global
|
||||
- * naming string mechanism so cpu_clk_trace_div picks
|
||||
- * up the appropriate one.
|
||||
- */
|
||||
.name = "cpu_clk",
|
||||
.index = -1,
|
||||
},
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 3bd24f271e013ef166e88af74f7ab2931b4fb08c Mon Sep 17 00:00:00 2001
|
||||
From 4e19e8bc168c2345c7ad7321c49a5da0e0e85f08 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Fri, 27 Dec 2024 22:25:14 +0100
|
||||
Subject: [PATCH 18/58] FROMGIT(6.14): arm64: dts: amlogic: g12: switch to the
|
||||
Subject: [PATCH 13/53] FROMGIT(6.15): arm64: dts: amlogic: g12: switch to the
|
||||
new PWM controller binding
|
||||
|
||||
Use the new PWM controller binding which now relies on passing all
|
||||
@ -32,7 +32,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
19 files changed, 28 insertions(+), 79 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index 0bc28eb2079b..705c1c56112f 100644
|
||||
index 2a7f91b2a7cb..9b6593555912 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -2060,8 +2060,11 @@ cecb_AO: cec@280 {
|
@ -1,38 +0,0 @@
|
||||
From f04ec1d9f34c9310b944fc36c542f528044fba4c Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Fri, 20 Dec 2024 11:25:36 +0100
|
||||
Subject: [PATCH 14/58] FROMGIT(6.14): clk: amlogic: gxbb: drop incorrect flag
|
||||
on 32k clock
|
||||
|
||||
gxbb_32k_clk_div sets CLK_DIVIDER_ROUND_CLOSEST in the init_data flag which
|
||||
is incorrect. This is field is not where the divider flags belong.
|
||||
|
||||
Thankfully, CLK_DIVIDER_ROUND_CLOSEST maps to bit 4 which is an unused
|
||||
clock flag, so there is no unintended consequence to this error.
|
||||
|
||||
Effectively, the clock has been used without CLK_DIVIDER_ROUND_CLOSEST
|
||||
so far, so just drop it.
|
||||
|
||||
Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/gxbb.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
|
||||
index f071faad1ebb..738317b3e274 100644
|
||||
--- a/drivers/clk/meson/gxbb.c
|
||||
+++ b/drivers/clk/meson/gxbb.c
|
||||
@@ -1312,7 +1312,7 @@ static struct clk_regmap gxbb_32k_clk_div = {
|
||||
&gxbb_32k_clk_sel.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
- .flags = CLK_SET_RATE_PARENT | CLK_DIVIDER_ROUND_CLOSEST,
|
||||
+ .flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,70 @@
|
||||
From 272dfa2c3bac7e33de0ea9ed9f4aae955973c6ad Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:51 +0100
|
||||
Subject: [PATCH 14/53] FROMGIT(6.16): arm64: dts: amlogic: gxbb: enable UART
|
||||
RX and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
connected to another device (such as an USB UART adapter). This can
|
||||
be addressed by using a pull up resistor. Not all boards may provide
|
||||
such a pull up resistor on the PCB so enable the SoC's pull-up on the
|
||||
UART RX and TX pads by default. This matches the default (from u-boot
|
||||
or SoC hardware) state for the pinmux configuration on these pads.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 +++++-----
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
index 8ebce7114a60..c4a9f855e5de 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
|
||||
@@ -105,7 +105,7 @@ uart_ao_a_pins: uart_ao_a {
|
||||
mux {
|
||||
groups = "uart_tx_ao_a", "uart_rx_ao_a";
|
||||
function = "uart_ao";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -122,7 +122,7 @@ uart_ao_b_pins: uart_ao_b {
|
||||
mux {
|
||||
groups = "uart_tx_ao_b", "uart_rx_ao_b";
|
||||
function = "uart_ao_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -520,7 +520,7 @@ mux {
|
||||
groups = "uart_tx_a",
|
||||
"uart_rx_a";
|
||||
function = "uart_a";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -538,7 +538,7 @@ mux {
|
||||
groups = "uart_tx_b",
|
||||
"uart_rx_b";
|
||||
function = "uart_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -556,7 +556,7 @@ mux {
|
||||
groups = "uart_tx_c",
|
||||
"uart_rx_c";
|
||||
function = "uart_c";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,57 +0,0 @@
|
||||
From f248ceae106d48ff1b1a81a32fdd5d0f4ad9c40e Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Fri, 20 Dec 2024 11:25:37 +0100
|
||||
Subject: [PATCH 15/58] FROMGIT(6.14): clk: amlogic: gxbb: drop non existing
|
||||
32k clock parent
|
||||
|
||||
The 32k clock reference a parent 'cts_slow_oscin' with a fixme note saying
|
||||
that this clock should be provided by AO controller.
|
||||
|
||||
The HW probably has this clock but it does not exist at the moment in
|
||||
any controller implementation. Furthermore, referencing clock by the global
|
||||
name should be avoided whenever possible.
|
||||
|
||||
There is no reason to keep this hack around, at least for now.
|
||||
|
||||
Fixes: 14c735c8e308 ("clk: meson-gxbb: Add EE 32K Clock for CEC")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
---
|
||||
drivers/clk/meson/gxbb.c | 12 ++++++------
|
||||
1 file changed, 6 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
|
||||
index 738317b3e274..d9529de200ae 100644
|
||||
--- a/drivers/clk/meson/gxbb.c
|
||||
+++ b/drivers/clk/meson/gxbb.c
|
||||
@@ -1272,14 +1272,13 @@ static struct clk_regmap gxbb_cts_i958 = {
|
||||
},
|
||||
};
|
||||
|
||||
+/*
|
||||
+ * This table skips a clock named 'cts_slow_oscin' in the documentation
|
||||
+ * This clock does not exist yet in this controller or the AO one
|
||||
+ */
|
||||
+static u32 gxbb_32k_clk_parents_val_table[] = { 0, 2, 3 };
|
||||
static const struct clk_parent_data gxbb_32k_clk_parent_data[] = {
|
||||
{ .fw_name = "xtal", },
|
||||
- /*
|
||||
- * FIXME: This clock is provided by the ao clock controller but the
|
||||
- * clock is not yet part of the binding of this controller, so string
|
||||
- * name must be use to set this parent.
|
||||
- */
|
||||
- { .name = "cts_slow_oscin", .index = -1 },
|
||||
{ .hw = &gxbb_fclk_div3.hw },
|
||||
{ .hw = &gxbb_fclk_div5.hw },
|
||||
};
|
||||
@@ -1289,6 +1288,7 @@ static struct clk_regmap gxbb_32k_clk_sel = {
|
||||
.offset = HHI_32K_CLK_CNTL,
|
||||
.mask = 0x3,
|
||||
.shift = 16,
|
||||
+ .table = gxbb_32k_clk_parents_val_table,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "32k_clk_sel",
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,79 @@
|
||||
From 4b9863b988e55077859cf5bd399c3b44ec4cbc92 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:52 +0100
|
||||
Subject: [PATCH 15/53] FROMGIT(6.16): arm64: dts: amlogic: gxl: enable UART RX
|
||||
and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
connected to another device (such as an USB UART adapter). This can
|
||||
be addressed by using a pull up resistor. Not all boards may provide
|
||||
such a pull up resistor on the PCB so enable the SoC's pull-up on the
|
||||
UART RX and TX pads by default. This matches the default (from u-boot
|
||||
or SoC hardware) state for the pinmux configuration on these pads.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 12 ++++++------
|
||||
1 file changed, 6 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
index 2dc2fdaecf9f..460c46cfad6a 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
|
||||
@@ -163,7 +163,7 @@ uart_ao_a_pins: uart_ao_a {
|
||||
mux {
|
||||
groups = "uart_tx_ao_a", "uart_rx_ao_a";
|
||||
function = "uart_ao";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -180,7 +180,7 @@ uart_ao_b_pins: uart_ao_b {
|
||||
mux {
|
||||
groups = "uart_tx_ao_b", "uart_rx_ao_b";
|
||||
function = "uart_ao_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -188,7 +188,7 @@ uart_ao_b_0_1_pins: uart_ao_b_0_1 {
|
||||
mux {
|
||||
groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
|
||||
function = "uart_ao_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -522,7 +522,7 @@ mux {
|
||||
groups = "uart_tx_a",
|
||||
"uart_rx_a";
|
||||
function = "uart_a";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -540,7 +540,7 @@ mux {
|
||||
groups = "uart_tx_b",
|
||||
"uart_rx_b";
|
||||
function = "uart_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -558,7 +558,7 @@ mux {
|
||||
groups = "uart_tx_c",
|
||||
"uart_rx_c";
|
||||
function = "uart_c";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,70 @@
|
||||
From 4742b8a4579c54b61a6c55d4f936d9feada98a5f Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 19:58:53 +0100
|
||||
Subject: [PATCH 16/53] FROMGIT(6.16): arm64: dts: amlogic: g12: enable UART RX
|
||||
and TX pull up by default
|
||||
|
||||
Some boards have noise on the UART RX line when the UART pins are not
|
||||
connected to another device (such as an USB UART adapter). This can
|
||||
be addressed by using a pull up resistor. Not all boards may provide
|
||||
such a pull up resistor on the PCB so enable the SoC's pull-up on the
|
||||
UART RX and TX pads by default. This matches the default (from u-boot
|
||||
or SoC hardware) state for the pinmux configuration on these pads.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 10 +++++-----
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index 9b6593555912..f8ca2ecab179 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -1503,7 +1503,7 @@ mux {
|
||||
groups = "uart_a_tx",
|
||||
"uart_a_rx";
|
||||
function = "uart_a";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1521,7 +1521,7 @@ mux {
|
||||
groups = "uart_b_tx",
|
||||
"uart_b_rx";
|
||||
function = "uart_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1918,7 +1918,7 @@ mux {
|
||||
groups = "uart_ao_a_tx",
|
||||
"uart_ao_a_rx";
|
||||
function = "uart_ao_a";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1936,7 +1936,7 @@ mux {
|
||||
groups = "uart_ao_b_tx_2",
|
||||
"uart_ao_b_rx_3";
|
||||
function = "uart_ao_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1945,7 +1945,7 @@ mux {
|
||||
groups = "uart_ao_b_tx_8",
|
||||
"uart_ao_b_rx_9";
|
||||
function = "uart_ao_b";
|
||||
- bias-disable;
|
||||
+ bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,46 @@
|
||||
From 775eba531ae4c19de23f1b649d84a0bcb744dff7 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 29 Mar 2025 20:01:32 +0100
|
||||
Subject: [PATCH 17/53] FROMGIT(6.16): pinctrl: meson: define the pull up/down
|
||||
resistor value as 60 kOhm
|
||||
|
||||
The public datasheets of the following Amlogic SoCs describe a typical
|
||||
resistor value for the built-in pull up/down resistor:
|
||||
- Meson8/8b/8m2: not documented
|
||||
- GXBB (S905): 60 kOhm
|
||||
- GXL (S905X): 60 kOhm
|
||||
- GXM (S912): 60 kOhm
|
||||
- G12B (S922X): 60 kOhm
|
||||
- SM1 (S905D3): 60 kOhm
|
||||
|
||||
The public G12B and SM1 datasheets additionally state min and max
|
||||
values:
|
||||
- min value: 50 kOhm for both, pull-up and pull-down
|
||||
- max value for the pull-up: 70 kOhm
|
||||
- max value for the pull-down: 130 kOhm
|
||||
|
||||
Use 60 kOhm in the pinctrl-meson driver as well so it's shown in the
|
||||
debugfs output. It may not be accurate for Meson8/8b/8m2 but in reality
|
||||
60 kOhm is closer to the actual value than 1 Ohm.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/pinctrl/meson/pinctrl-meson.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
|
||||
index 253a0cc57e39..e5a32a0532ee 100644
|
||||
--- a/drivers/pinctrl/meson/pinctrl-meson.c
|
||||
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
|
||||
@@ -487,7 +487,7 @@ static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
case PIN_CONFIG_BIAS_PULL_UP:
|
||||
if (meson_pinconf_get_pull(pc, pin) == param)
|
||||
- arg = 1;
|
||||
+ arg = 60000;
|
||||
else
|
||||
return -EINVAL;
|
||||
break;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From d76a2842469fc900d6449b4aa07b196391a4c46a Mon Sep 17 00:00:00 2001
|
||||
From ef3a1eb8be168c22dec884b4686eede433903e8f Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Tue, 31 Dec 2024 20:42:06 +0100
|
||||
Subject: [PATCH 24/58] FROMLIST(v1): dt-bindings: iio: adc:
|
||||
Subject: [PATCH 18/53] FROMGIT(6.16): dt-bindings: iio: adc:
|
||||
amlogic,meson-saradc: Add GXLX SoC compatible
|
||||
|
||||
Add a compatible string for the GXLX SoC. It's very similar to GXL but
|
||||
@ -14,7 +14,7 @@ Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
index f748f3a60b35..26344eedef0b 100644
|
||||
index b0962a4583ac..bb9825e7346d 100644
|
||||
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml
|
||||
@@ -23,6 +23,7 @@ properties:
|
@ -1,66 +0,0 @@
|
||||
From a6281657db05969415768f451e0a00ea78d3ed4f Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 23 Mar 2024 20:04:49 +0100
|
||||
Subject: [PATCH 19/58] FROMGIT(6.14): iio: adc: meson: fix voltage reference
|
||||
selection field name typo
|
||||
|
||||
The field should be called "vref_voltage", without a typo in the word
|
||||
voltage. No functional changes intended.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/iio/adc/meson_saradc.c | 10 +++++-----
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
|
||||
index e16b0e28974e..4fe0688cb4d1 100644
|
||||
--- a/drivers/iio/adc/meson_saradc.c
|
||||
+++ b/drivers/iio/adc/meson_saradc.c
|
||||
@@ -327,7 +327,7 @@ struct meson_sar_adc_param {
|
||||
u8 vref_select;
|
||||
u8 cmv_select;
|
||||
u8 adc_eoc;
|
||||
- enum meson_sar_adc_vref_sel vref_volatge;
|
||||
+ enum meson_sar_adc_vref_sel vref_voltage;
|
||||
};
|
||||
|
||||
struct meson_sar_adc_data {
|
||||
@@ -989,7 +989,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
}
|
||||
|
||||
regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_VOLTAGE,
|
||||
- priv->param->vref_volatge);
|
||||
+ priv->param->vref_voltage);
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval);
|
||||
|
||||
@@ -1212,7 +1212,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 10,
|
||||
.has_reg11 = true,
|
||||
- .vref_volatge = 1,
|
||||
+ .vref_voltage = 1,
|
||||
.cmv_select = 1,
|
||||
};
|
||||
|
||||
@@ -1224,7 +1224,7 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
.has_reg11 = true,
|
||||
- .vref_volatge = 1,
|
||||
+ .vref_voltage = 1,
|
||||
.cmv_select = 1,
|
||||
};
|
||||
|
||||
@@ -1236,7 +1236,7 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
.has_reg11 = true,
|
||||
- .vref_volatge = 1,
|
||||
+ .vref_voltage = 1,
|
||||
.has_vref_select = true,
|
||||
.vref_select = VREF_VDDA,
|
||||
.cmv_select = 1,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,8 +1,8 @@
|
||||
From 4c158d6d73a74576fa56c603ebc6ed6758785f97 Mon Sep 17 00:00:00 2001
|
||||
From b307f9e14e29454c68869127ad7c6f98e0aa8730 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Wed, 1 Jan 2025 07:13:52 +0000
|
||||
Subject: [PATCH 25/58] FROMLIST(v1): iio: adc: meson: add support for the GXLX
|
||||
SoC
|
||||
Date: Sat, 23 Mar 2024 20:44:41 +0100
|
||||
Subject: [PATCH 19/53] FROMGIT(6.16): iio: adc: meson: add support for the
|
||||
GXLX SoC
|
||||
|
||||
The SARADC IP on the GXLX SoC itself is identical to the one found on
|
||||
GXL SoCs. However, GXLX SoCs require poking the first three bits in the
|
||||
@ -15,13 +15,14 @@ So clearly mark this as a workaround and add a warning so users are
|
||||
notified that this workaround can change (once we know what these bits
|
||||
actually do).
|
||||
|
||||
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/iio/adc/meson_saradc.c | 34 ++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 34 insertions(+)
|
||||
|
||||
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
|
||||
index ba63ec05d8c0..78db771ce602 100644
|
||||
index 997def4a4d2f..c0f2a2ef0c68 100644
|
||||
--- a/drivers/iio/adc/meson_saradc.c
|
||||
+++ b/drivers/iio/adc/meson_saradc.c
|
||||
@@ -160,6 +160,11 @@
|
||||
@ -36,22 +37,22 @@ index ba63ec05d8c0..78db771ce602 100644
|
||||
#define MESON_SAR_ADC_REG13 0x34
|
||||
#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8)
|
||||
|
||||
@@ -331,6 +336,7 @@ struct meson_sar_adc_param {
|
||||
bool adc_eoc;
|
||||
enum meson_sar_adc_vref_sel vref_select;
|
||||
enum meson_sar_adc_vref_voltage vref_voltage;
|
||||
@@ -326,6 +331,7 @@ struct meson_sar_adc_param {
|
||||
u8 cmv_select;
|
||||
u8 adc_eoc;
|
||||
enum meson_sar_adc_vref_sel vref_voltage;
|
||||
+ bool enable_mpll_clock_workaround;
|
||||
};
|
||||
|
||||
struct meson_sar_adc_data {
|
||||
@@ -1001,6 +1007,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
|
||||
@@ -995,6 +1001,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
priv->param->cmv_select);
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_CMV_SEL, regval);
|
||||
+
|
||||
+ if (priv->param->enable_mpll_clock_workaround) {
|
||||
+ dev_warn(dev,
|
||||
+ "Enabling unknown bits to make the MPLL clocks work\n");
|
||||
+ "Enabling unknown bits to make the MPLL clocks work. This may change so always update dtbs and kernel together\n");
|
||||
+ regmap_write(priv->regmap, MESON_SAR_ADC_REG12,
|
||||
+ MESON_SAR_ADC_REG12_MPLL0_UNKNOWN |
|
||||
+ MESON_SAR_ADC_REG12_MPLL1_UNKNOWN |
|
||||
@ -60,8 +61,8 @@ index ba63ec05d8c0..78db771ce602 100644
|
||||
}
|
||||
|
||||
ret = clk_set_parent(priv->adc_sel_clk, priv->clkin);
|
||||
@@ -1225,6 +1240,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.cmv_select = true,
|
||||
@@ -1219,6 +1234,17 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.cmv_select = 1,
|
||||
};
|
||||
|
||||
+static const struct meson_sar_adc_param meson_sar_adc_gxlx_param = {
|
||||
@ -70,7 +71,7 @@ index ba63ec05d8c0..78db771ce602 100644
|
||||
+ .regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
+ .resolution = 12,
|
||||
+ .disable_ring_counter = 1,
|
||||
+ .vref_voltage = VREF_VOLTAGE_1V8,
|
||||
+ .vref_voltage = 1,
|
||||
+ .cmv_select = true,
|
||||
+ .enable_mpll_clock_workaround = true,
|
||||
+};
|
||||
@ -78,7 +79,7 @@ index ba63ec05d8c0..78db771ce602 100644
|
||||
static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
.has_bl30_integration = true,
|
||||
.clock_rate = 1200000,
|
||||
@@ -1274,6 +1300,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
|
||||
@@ -1267,6 +1293,11 @@ static const struct meson_sar_adc_data meson_sar_adc_gxl_data = {
|
||||
.name = "meson-gxl-saradc",
|
||||
};
|
||||
|
||||
@ -90,7 +91,7 @@ index ba63ec05d8c0..78db771ce602 100644
|
||||
static const struct meson_sar_adc_data meson_sar_adc_gxm_data = {
|
||||
.param = &meson_sar_adc_gxl_param,
|
||||
.name = "meson-gxm-saradc",
|
||||
@@ -1305,6 +1336,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
|
||||
@@ -1298,6 +1329,9 @@ static const struct of_device_id meson_sar_adc_of_match[] = {
|
||||
}, {
|
||||
.compatible = "amlogic,meson-gxl-saradc",
|
||||
.data = &meson_sar_adc_gxl_data,
|
@ -1,142 +0,0 @@
|
||||
From e29ff40f91293fa328007a5619276acd9d3ed517 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 23 Mar 2024 20:30:02 +0100
|
||||
Subject: [PATCH 20/58] FROMGIT(6.14): iio: adc: consistently use bool and enum
|
||||
in struct meson_sar_adc_param
|
||||
|
||||
Consistently use bool for any register bit that enables/disables
|
||||
functionality and enum for register values where there's a choice
|
||||
between different settings. The aim is to make the code easier to read
|
||||
and understand by being more consistent. No functional changes intended.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/iio/adc/meson_saradc.c | 47 +++++++++++++++++++---------------
|
||||
1 file changed, 27 insertions(+), 20 deletions(-)
|
||||
|
||||
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
|
||||
index 4fe0688cb4d1..83849c2320e1 100644
|
||||
--- a/drivers/iio/adc/meson_saradc.c
|
||||
+++ b/drivers/iio/adc/meson_saradc.c
|
||||
@@ -156,9 +156,9 @@
|
||||
#define MESON_SAR_ADC_REG11 0x2c
|
||||
#define MESON_SAR_ADC_REG11_BANDGAP_EN BIT(13)
|
||||
#define MESON_SAR_ADC_REG11_CMV_SEL BIT(6)
|
||||
- #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5)
|
||||
- #define MESON_SAR_ADC_REG11_EOC BIT(1)
|
||||
- #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0)
|
||||
+ #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5)
|
||||
+ #define MESON_SAR_ADC_REG11_EOC BIT(1)
|
||||
+ #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0)
|
||||
|
||||
#define MESON_SAR_ADC_REG13 0x34
|
||||
#define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8)
|
||||
@@ -224,6 +224,11 @@ enum meson_sar_adc_vref_sel {
|
||||
VREF_VDDA = 1,
|
||||
};
|
||||
|
||||
+enum meson_sar_adc_vref_voltage {
|
||||
+ VREF_VOLTAGE_0V9 = 0,
|
||||
+ VREF_VOLTAGE_1V8 = 1,
|
||||
+};
|
||||
+
|
||||
enum meson_sar_adc_avg_mode {
|
||||
NO_AVERAGING = 0x0,
|
||||
MEAN_AVERAGING = 0x1,
|
||||
@@ -321,13 +326,13 @@ struct meson_sar_adc_param {
|
||||
u8 temperature_trimming_bits;
|
||||
unsigned int temperature_multiplier;
|
||||
unsigned int temperature_divider;
|
||||
- u8 disable_ring_counter;
|
||||
+ bool disable_ring_counter;
|
||||
bool has_reg11;
|
||||
bool has_vref_select;
|
||||
- u8 vref_select;
|
||||
- u8 cmv_select;
|
||||
- u8 adc_eoc;
|
||||
- enum meson_sar_adc_vref_sel vref_voltage;
|
||||
+ bool cmv_select;
|
||||
+ bool adc_eoc;
|
||||
+ enum meson_sar_adc_vref_sel vref_select;
|
||||
+ enum meson_sar_adc_vref_voltage vref_voltage;
|
||||
};
|
||||
|
||||
struct meson_sar_adc_data {
|
||||
@@ -970,14 +975,16 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
MESON_SAR_ADC_DELTA_10_TS_REVE0);
|
||||
}
|
||||
|
||||
- regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
|
||||
- priv->param->disable_ring_counter);
|
||||
+ if (priv->param->disable_ring_counter)
|
||||
+ regval = MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN;
|
||||
+ else
|
||||
+ regval = 0;
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
|
||||
MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
|
||||
regval);
|
||||
|
||||
if (priv->param->has_reg11) {
|
||||
- regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc);
|
||||
+ regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0;
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_EOC, regval);
|
||||
|
||||
@@ -993,8 +1000,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval);
|
||||
|
||||
- regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL,
|
||||
- priv->param->cmv_select);
|
||||
+ regval = priv->param->cmv_select ? MESON_SAR_ADC_REG11_CMV_SEL : 0;
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_CMV_SEL, regval);
|
||||
}
|
||||
@@ -1212,8 +1218,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 10,
|
||||
.has_reg11 = true,
|
||||
- .vref_voltage = 1,
|
||||
- .cmv_select = 1,
|
||||
+ .vref_voltage = VREF_VOLTAGE_1V8,
|
||||
+ .cmv_select = true,
|
||||
};
|
||||
|
||||
static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
@@ -1224,8 +1230,8 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
.has_reg11 = true,
|
||||
- .vref_voltage = 1,
|
||||
- .cmv_select = 1,
|
||||
+ .vref_voltage = VREF_VOLTAGE_1V8,
|
||||
+ .cmv_select = true,
|
||||
};
|
||||
|
||||
static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
@@ -1236,10 +1242,10 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
.has_reg11 = true,
|
||||
- .vref_voltage = 1,
|
||||
+ .vref_voltage = VREF_VOLTAGE_1V8,
|
||||
.has_vref_select = true,
|
||||
.vref_select = VREF_VDDA,
|
||||
- .cmv_select = 1,
|
||||
+ .cmv_select = true,
|
||||
};
|
||||
|
||||
static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
|
||||
@@ -1250,7 +1256,8 @@ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
.has_reg11 = true,
|
||||
- .adc_eoc = 1,
|
||||
+ .vref_voltage = VREF_VOLTAGE_0V9,
|
||||
+ .adc_eoc = true,
|
||||
.has_vref_select = true,
|
||||
.vref_select = VREF_VDDA,
|
||||
};
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,11 +1,12 @@
|
||||
From 60e960b84a37676eb06d7d045799d0d5eeb357d6 Mon Sep 17 00:00:00 2001
|
||||
From 09b587b581c62586964c4f2df134a9e9719ec2da Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 1 Jan 2025 07:16:49 +0000
|
||||
Subject: [PATCH 40/58] WIP: arm64: dts: amlogic: gxlx-s905l-p271: add saradc
|
||||
compatible
|
||||
Subject: [PATCH 20/53] FROMGIT(6.16): arm64: dts: amlogic: gxlx-s905l-p271:
|
||||
add saradc compatible
|
||||
|
||||
Support for the meson-gxlx-saradc compatible has been merged and can
|
||||
be added to the p271 (S905L) board to enable audio output.
|
||||
Add the saradac node using the meson-gxlx-saradc compatible to ensure
|
||||
MPLL clocks are poked and audio output is enabled on the p271 (S905L)
|
||||
board.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
@ -1,135 +0,0 @@
|
||||
From 57dd1613ffad9447ab060acf43c89e3fdb02f007 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 23 Mar 2024 20:35:58 +0100
|
||||
Subject: [PATCH 21/58] FROMGIT(6.14): iio: adc: meson: simplify
|
||||
MESON_SAR_ADC_REG11 register access
|
||||
|
||||
Simply check the max_register value to decide whether
|
||||
MESON_SAR_ADC_REG11 is present on the current IP revision. This allows
|
||||
dropping two additional bool fields from struct meson_sar_adc_param
|
||||
which previously had to be manually kept in sync. No functional changes
|
||||
intended.
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/iio/adc/meson_saradc.c | 29 ++++++++---------------------
|
||||
1 file changed, 8 insertions(+), 21 deletions(-)
|
||||
|
||||
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
|
||||
index 83849c2320e1..ba63ec05d8c0 100644
|
||||
--- a/drivers/iio/adc/meson_saradc.c
|
||||
+++ b/drivers/iio/adc/meson_saradc.c
|
||||
@@ -320,14 +320,12 @@ static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = {
|
||||
struct meson_sar_adc_param {
|
||||
bool has_bl30_integration;
|
||||
unsigned long clock_rate;
|
||||
- u32 bandgap_reg;
|
||||
unsigned int resolution;
|
||||
const struct regmap_config *regmap_config;
|
||||
u8 temperature_trimming_bits;
|
||||
unsigned int temperature_multiplier;
|
||||
unsigned int temperature_divider;
|
||||
bool disable_ring_counter;
|
||||
- bool has_reg11;
|
||||
bool has_vref_select;
|
||||
bool cmv_select;
|
||||
bool adc_eoc;
|
||||
@@ -983,7 +981,7 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN,
|
||||
regval);
|
||||
|
||||
- if (priv->param->has_reg11) {
|
||||
+ if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11) {
|
||||
regval = priv->param->adc_eoc ? MESON_SAR_ADC_REG11_EOC : 0;
|
||||
regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
MESON_SAR_ADC_REG11_EOC, regval);
|
||||
@@ -1019,16 +1017,15 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev)
|
||||
static void meson_sar_adc_set_bandgap(struct iio_dev *indio_dev, bool on_off)
|
||||
{
|
||||
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
|
||||
- const struct meson_sar_adc_param *param = priv->param;
|
||||
- u32 enable_mask;
|
||||
|
||||
- if (param->bandgap_reg == MESON_SAR_ADC_REG11)
|
||||
- enable_mask = MESON_SAR_ADC_REG11_BANDGAP_EN;
|
||||
+ if (priv->param->regmap_config->max_register >= MESON_SAR_ADC_REG11)
|
||||
+ regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11,
|
||||
+ MESON_SAR_ADC_REG11_BANDGAP_EN,
|
||||
+ on_off ? MESON_SAR_ADC_REG11_BANDGAP_EN : 0);
|
||||
else
|
||||
- enable_mask = MESON_SAR_ADC_DELTA_10_TS_VBG_EN;
|
||||
-
|
||||
- regmap_update_bits(priv->regmap, param->bandgap_reg, enable_mask,
|
||||
- on_off ? enable_mask : 0);
|
||||
+ regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,
|
||||
+ MESON_SAR_ADC_DELTA_10_TS_VBG_EN,
|
||||
+ on_off ? MESON_SAR_ADC_DELTA_10_TS_VBG_EN : 0);
|
||||
}
|
||||
|
||||
static int meson_sar_adc_hw_enable(struct iio_dev *indio_dev)
|
||||
@@ -1192,7 +1189,6 @@ static const struct iio_info meson_sar_adc_iio_info = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
|
||||
.has_bl30_integration = false,
|
||||
.clock_rate = 1150000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_DELTA_10,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_meson8,
|
||||
.resolution = 10,
|
||||
.temperature_trimming_bits = 4,
|
||||
@@ -1203,7 +1199,6 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8_param = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
|
||||
.has_bl30_integration = false,
|
||||
.clock_rate = 1150000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_DELTA_10,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_meson8,
|
||||
.resolution = 10,
|
||||
.temperature_trimming_bits = 5,
|
||||
@@ -1214,10 +1209,8 @@ static const struct meson_sar_adc_param meson_sar_adc_meson8b_param = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
|
||||
.has_bl30_integration = true,
|
||||
.clock_rate = 1200000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_REG11,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 10,
|
||||
- .has_reg11 = true,
|
||||
.vref_voltage = VREF_VOLTAGE_1V8,
|
||||
.cmv_select = true,
|
||||
};
|
||||
@@ -1225,11 +1218,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
.has_bl30_integration = true,
|
||||
.clock_rate = 1200000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_REG11,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
- .has_reg11 = true,
|
||||
.vref_voltage = VREF_VOLTAGE_1V8,
|
||||
.cmv_select = true,
|
||||
};
|
||||
@@ -1237,11 +1228,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
.has_bl30_integration = true,
|
||||
.clock_rate = 1200000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_REG11,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
- .has_reg11 = true,
|
||||
.vref_voltage = VREF_VOLTAGE_1V8,
|
||||
.has_vref_select = true,
|
||||
.vref_select = VREF_VDDA,
|
||||
@@ -1251,11 +1240,9 @@ static const struct meson_sar_adc_param meson_sar_adc_axg_param = {
|
||||
static const struct meson_sar_adc_param meson_sar_adc_g12a_param = {
|
||||
.has_bl30_integration = false,
|
||||
.clock_rate = 1200000,
|
||||
- .bandgap_reg = MESON_SAR_ADC_REG11,
|
||||
.regmap_config = &meson_sar_adc_regmap_config_gxbb,
|
||||
.resolution = 12,
|
||||
.disable_ring_counter = 1,
|
||||
- .has_reg11 = true,
|
||||
.vref_voltage = VREF_VOLTAGE_0V9,
|
||||
.adc_eoc = true,
|
||||
.has_vref_select = true,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,24 +1,25 @@
|
||||
From 0835f2e90254da80bc6aa91c8eff6632d654898a Mon Sep 17 00:00:00 2001
|
||||
From 3c4b397f63f9f3e5c8fef9376edd0bf555c2a51d Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Fri, 24 May 2024 15:17:37 +0000
|
||||
Subject: [PATCH 35/58] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
|
||||
Subject: [PATCH 21/53] FROMLIST(v2): net: mdio: mux-meson-gxl: set 28th bit in
|
||||
eth_reg2
|
||||
|
||||
This bit is necessary to enable packets on the interface. Without this
|
||||
bit set, ethernet behaves as if it is working but no activity occurs.
|
||||
bit set, ethernet behaves as if it is working, but no activity occurs.
|
||||
|
||||
The vendor SDK sets this bit along with the PHY_ID bits. u-boot will set
|
||||
this bit as well but if u-boot is not compiled with networking, the
|
||||
interface will not work.
|
||||
The vendor SDK sets this bit along with the PHY_ID bits. U-boot also
|
||||
sets this bit, but if u-boot is not compiled with networking support
|
||||
the interface will not work.
|
||||
|
||||
Fixes: 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support");
|
||||
Signed-off-by: Da Xue <da@libre.computer>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/net/mdio/mdio-mux-meson-gxl.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
index 89554021b5cc..b2bd57f54034 100644
|
||||
index 00c66240136b..fc5883387718 100644
|
||||
--- a/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
+++ b/drivers/net/mdio/mdio-mux-meson-gxl.c
|
||||
@@ -17,6 +17,7 @@
|
@ -1,12 +1,13 @@
|
||||
From dc482c50adb617ed078a0b8d6ed592ee366ba1f2 Mon Sep 17 00:00:00 2001
|
||||
From 90d4b883b6e8082b13f32a44be186460dd6ba36f Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Tue, 31 Dec 2024 20:17:17 +0100
|
||||
Subject: [PATCH 22/58] FROMLIST(v1): phy: amlogic: meson8b-usb2: Use
|
||||
Date: Sat, 29 Mar 2025 20:07:11 +0100
|
||||
Subject: [PATCH 22/53] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use
|
||||
FIELD_PREP instead of _SHIFT macros
|
||||
|
||||
This simplifies the code by re-using the FIELD_PREP helper. No
|
||||
functional changes inteded.
|
||||
|
||||
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/phy/amlogic/phy-meson8b-usb2.c | 7 +++----
|
@ -1,12 +1,13 @@
|
||||
From 7f60fb3bd884d9a369597f7d87ff50b51314890b Mon Sep 17 00:00:00 2001
|
||||
From 845c35b942345fc124d813a391db72ac744419d6 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Tue, 31 Dec 2024 20:17:18 +0100
|
||||
Subject: [PATCH 23/58] FROMLIST(v1): phy: amlogic: meson8b-usb2: Use the
|
||||
Date: Sat, 29 Mar 2025 20:07:12 +0100
|
||||
Subject: [PATCH 23/53] FROMLIST(v2): phy: amlogic: meson8b-usb2: Use the
|
||||
regmap_{clear,set}_bits helpers
|
||||
|
||||
These require less code, reduce the chance of typos and overall make the
|
||||
intent clearer. No functional changes.
|
||||
|
||||
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/phy/amlogic/phy-meson8b-usb2.c | 28 ++++++++++----------------
|
@ -1,7 +1,7 @@
|
||||
From 16fcf51c5694fa2ac6ae87b514c74603cd45da74 Mon Sep 17 00:00:00 2001
|
||||
From 9991b884224088ef2f192e2f9611bb9f007533e7 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
|
||||
Date: Sun, 20 Feb 2022 08:23:12 +0000
|
||||
Subject: [PATCH 26/58] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Subject: [PATCH 24/53] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
|
||||
Micro Electronics
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
index fbfce9b4ae6b..92fb517e3f94 100644
|
||||
index b5979832ddce..0b1df976f17e 100644
|
||||
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
|
||||
@@ -1500,6 +1500,8 @@ patternProperties:
|
||||
@@ -1526,6 +1526,8 @@ patternProperties:
|
||||
description: Texas Instruments
|
||||
"^tianma,.*":
|
||||
description: Tianma Micro-electronics Co., Ltd.
|
@ -1,7 +1,7 @@
|
||||
From 1d0270575e13458c4519572595f7b4ddae4cfd95 Mon Sep 17 00:00:00 2001
|
||||
From 22cd2782096126e9496eb97106d2d34cd2d752a9 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:24:47 +0000
|
||||
Subject: [PATCH 27/58] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Subject: [PATCH 25/53] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
|
||||
Electronics TM1628
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
@ -1,7 +1,7 @@
|
||||
From 569d8ef29673036cbd08a556ac9e0e8ec75d86f5 Mon Sep 17 00:00:00 2001
|
||||
From 7f379bd661917cdf3cc0be846a706c8df68dab19 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Sun, 20 Feb 2022 08:26:27 +0000
|
||||
Subject: [PATCH 28/58] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
Subject: [PATCH 26/53] FROMLIST(v5): docs: ABI: document tm1628 attribute
|
||||
display-text
|
||||
|
||||
Document the attribute for reading / writing the text to be displayed on
|
@ -1,7 +1,7 @@
|
||||
From ff2e2e672a2dbe994d12ad056adeace66238e008 Mon Sep 17 00:00:00 2001
|
||||
From 95b3984ca0cd5d0cfb6d0a829fa472591bca4c64 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:51:20 +0000
|
||||
Subject: [PATCH 29/58] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
Subject: [PATCH 27/53] FROMLIST(v5): auxdisplay: add support for Titanmec
|
||||
TM1628 7 segment display controller
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
@ -44,10 +44,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
create mode 100644 drivers/auxdisplay/tm1628.c
|
||||
|
||||
diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig
|
||||
index 21545ffba065..77646ea60e73 100644
|
||||
index bedc6133f970..deb510cc0120 100644
|
||||
--- a/drivers/auxdisplay/Kconfig
|
||||
+++ b/drivers/auxdisplay/Kconfig
|
||||
@@ -525,6 +525,17 @@ config SEG_LED_GPIO
|
||||
@@ -526,6 +526,17 @@ config SEG_LED_GPIO
|
||||
This driver can also be built as a module. If so, the module
|
||||
will be called seg-led-gpio.
|
||||
|
@ -1,7 +1,7 @@
|
||||
From cc2a2e7e870bd2f2a80151ad327e56786a098369 Mon Sep 17 00:00:00 2001
|
||||
From 4985271dd36e87078095c932dfd4feb429179491 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:52:34 +0000
|
||||
Subject: [PATCH 30/58] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
Subject: [PATCH 28/53] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
|
||||
support for the 7 segment display
|
||||
|
||||
This patch adds support for the 7 segment display of the device.
|
@ -1,7 +1,7 @@
|
||||
From 936d8c801b33826118dc4af1206a41a72426dc1a Mon Sep 17 00:00:00 2001
|
||||
From ac79a3571d08885f87788167d24cc802f36cc81c Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Mon, 4 Apr 2022 18:53:32 +0000
|
||||
Subject: [PATCH 31/58] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
Subject: [PATCH 29/53] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
|
||||
auxdisplay driver
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
@ -10,10 +10,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/MAINTAINERS b/MAINTAINERS
|
||||
index 6bb4ec0c162a..b5477689538a 100644
|
||||
index 00e94bec401e..fb9caa075ad2 100644
|
||||
--- a/MAINTAINERS
|
||||
+++ b/MAINTAINERS
|
||||
@@ -23342,6 +23342,13 @@ W: http://sourceforge.net/projects/tlan/
|
||||
@@ -23959,6 +23959,13 @@ W: http://sourceforge.net/projects/tlan/
|
||||
F: Documentation/networking/device_drivers/ethernet/ti/tlan.rst
|
||||
F: drivers/net/ethernet/ti/tlan.*
|
||||
|
@ -0,0 +1,69 @@
|
||||
From cd867a48c76f919098003d5c7a756005b98ae735 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 7 Feb 2025 04:29:08 +0000
|
||||
Subject: [PATCH 30/53] FROMLIST(v2): media: si2168: increase cmd execution
|
||||
timeout value
|
||||
|
||||
Testing with a MyGica T230C v2 USB device (0572:c68a) shows occasional
|
||||
cmd timeouts that cause Tvheadend services to fail:
|
||||
|
||||
Jan 28 12:23:46.788180 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms
|
||||
Jan 28 12:23:46.790799 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms
|
||||
Jan 28 12:23:46.878158 LibreELEC kernel: si2168 1-0060: cmd execution took 80 ms
|
||||
Jan 28 12:23:46.879158 LibreELEC kernel: si2168 1-0060: failed=-110
|
||||
Jan 28 12:23:46.879908 LibreELEC kernel: si2168 1-0060: failed=-110
|
||||
Jan 28 12:23:46.948234 LibreELEC kernel: si2168 1-0060: cmd execution took 60 ms
|
||||
Jan 28 12:23:46.949121 LibreELEC kernel: si2168 1-0060: cmd execution took 0 ms
|
||||
Jan 28 12:23:46.949940 LibreELEC kernel: si2168 1-0060: cmd execution took 10 ms
|
||||
..
|
||||
Jan 28 12:23:57.457216 LibreELEC tvheadend[3126]: subscription: 009B: service instance is bad, reason: No input detected
|
||||
Jan 28 12:23:57.457392 LibreELEC tvheadend[3126]: linuxdvb: Silicon Labs Si2168 #0 : DVB-T #0 - stopping 778MHz in DVB-T Network
|
||||
..
|
||||
Jan 28 12:23:57.457584 LibreELEC tvheadend[3126]: subscription: 009B: No input source available for subscription "127.0.0.1 [ | Kodi Media Center ]" to channel "XXXXXXX"
|
||||
|
||||
The original timeout of 50ms was extended to 70ms in commit 551c33e729f6
|
||||
("[media] Si2168: increase timeout to fix firmware loading") but testing
|
||||
shows there are other demux commands that take longer. The largest value
|
||||
observed from user reports/logs is 150ms so increase timeout to 200ms.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
|
||||
---
|
||||
drivers/media/dvb-frontends/si2168.c | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c
|
||||
index d6b6b8bc7d4e..843f1e01318e 100644
|
||||
--- a/drivers/media/dvb-frontends/si2168.c
|
||||
+++ b/drivers/media/dvb-frontends/si2168.c
|
||||
@@ -9,6 +9,8 @@
|
||||
|
||||
#include "si2168_priv.h"
|
||||
|
||||
+#define CMD_TIMEOUT 200
|
||||
+
|
||||
static const struct dvb_frontend_ops si2168_ops;
|
||||
|
||||
static void cmd_init(struct si2168_cmd *cmd, const u8 *buf, int wlen, int rlen)
|
||||
@@ -40,8 +42,7 @@ static int si2168_cmd_execute(struct i2c_client *client, struct si2168_cmd *cmd)
|
||||
|
||||
if (cmd->rlen) {
|
||||
/* wait cmd execution terminate */
|
||||
- #define TIMEOUT 70
|
||||
- timeout = jiffies + msecs_to_jiffies(TIMEOUT);
|
||||
+ timeout = jiffies + msecs_to_jiffies(CMD_TIMEOUT);
|
||||
while (!time_after(jiffies, timeout)) {
|
||||
ret = i2c_master_recv(client, cmd->args, cmd->rlen);
|
||||
if (ret < 0) {
|
||||
@@ -58,7 +59,7 @@ static int si2168_cmd_execute(struct i2c_client *client, struct si2168_cmd *cmd)
|
||||
|
||||
dev_dbg(&client->dev, "cmd execution took %d ms\n",
|
||||
jiffies_to_msecs(jiffies) -
|
||||
- (jiffies_to_msecs(timeout) - TIMEOUT));
|
||||
+ (jiffies_to_msecs(timeout) - CMD_TIMEOUT));
|
||||
|
||||
/* error bit set? */
|
||||
if ((cmd->args[0] >> 6) & 0x01) {
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From ef9cd2cdcba0395ea27a277159a4865ec5a81f07 Mon Sep 17 00:00:00 2001
|
||||
From 21069f953585bee3300f645785296b2dc457cdb3 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 22 Nov 2021 09:15:21 +0000
|
||||
Subject: [PATCH 32/58] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
Subject: [PATCH 31/53] FROMLIST(v1): media: meson: vdec: esparser: check
|
||||
parsing state with hardware write pointer
|
||||
|
||||
Also check the hardware write pointer to check if ES Parser has stalled.
|
@ -1,7 +1,7 @@
|
||||
From 4adad828c9424fa38e77d4d4db059005a801b137 Mon Sep 17 00:00:00 2001
|
||||
From 71b8f6ca86a34d894993b2aa3f4edaf53cea10b8 Mon Sep 17 00:00:00 2001
|
||||
From: Benjamin Roszak <benjamin545@gmail.com>
|
||||
Date: Mon, 23 Jan 2023 10:56:46 +0000
|
||||
Subject: [PATCH 33/58] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
Subject: [PATCH 32/53] FROMLIST(v2): media: meson: vdec: implement 10bit
|
||||
bitstream handling
|
||||
|
||||
In order to support 10bit bitstream decoding, buffers and MMU
|
@ -1,7 +1,7 @@
|
||||
From 17d64d5f1306f504ccb704b054c095b77e44ec14 Mon Sep 17 00:00:00 2001
|
||||
From 16e696992950b690a74ddea431ecd792a745d9fc Mon Sep 17 00:00:00 2001
|
||||
From: Maxime Jourdan <mjourdan@baylibre.com>
|
||||
Date: Mon, 23 Jan 2023 11:07:04 +0000
|
||||
Subject: [PATCH 34/58] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
Subject: [PATCH 33/53] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
|
||||
|
||||
Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
|
||||
the common "HEVC" decoder driver.
|
||||
@ -15,8 +15,8 @@ Signed-off-by: Benjamin Roszak <benjamin545@gmail.com>
|
||||
drivers/staging/media/meson/vdec/codec_hevc.h | 13 +
|
||||
drivers/staging/media/meson/vdec/esparser.c | 3 +-
|
||||
drivers/staging/media/meson/vdec/hevc_regs.h | 1 +
|
||||
.../staging/media/meson/vdec/vdec_platform.c | 37 +
|
||||
6 files changed, 1516 insertions(+), 2 deletions(-)
|
||||
.../staging/media/meson/vdec/vdec_platform.c | 49 +
|
||||
6 files changed, 1528 insertions(+), 2 deletions(-)
|
||||
create mode 100644 drivers/staging/media/meson/vdec/codec_hevc.c
|
||||
create mode 100644 drivers/staging/media/meson/vdec/codec_hevc.h
|
||||
|
||||
@ -1546,7 +1546,7 @@ index 0392f41a1eed..e7eabdd2b119 100644
|
||||
#define HEVC_SAO_MMU_VH1_ADDR 0xd8ec
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
index 75d295fdb5f8..ca0cb417d793 100644
|
||||
index 8a7e5b3f5d00..870e61dedd81 100644
|
||||
--- a/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
+++ b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
@@ -11,10 +11,23 @@
|
||||
@ -1592,7 +1592,26 @@ index 75d295fdb5f8..ca0cb417d793 100644
|
||||
}, {
|
||||
.pixfmt = V4L2_PIX_FMT_H264,
|
||||
.min_buffers = 2,
|
||||
@@ -108,6 +133,18 @@ static const struct amvdec_format vdec_formats_gxm[] = {
|
||||
@@ -59,6 +84,18 @@ static const struct amvdec_format vdec_formats_gxl[] = {
|
||||
|
||||
static const struct amvdec_format vdec_formats_gxlx[] = {
|
||||
{
|
||||
+ .pixfmt = V4L2_PIX_FMT_HEVC,
|
||||
+ .min_buffers = 4,
|
||||
+ .max_buffers = 24,
|
||||
+ .max_width = 3840,
|
||||
+ .max_height = 2160,
|
||||
+ .vdec_ops = &vdec_hevc_ops,
|
||||
+ .codec_ops = &codec_hevc_ops,
|
||||
+ .firmware_path = "meson/vdec/gxl_hevc.bin",
|
||||
+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
+ .flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
+ V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
+ }, {
|
||||
.pixfmt = V4L2_PIX_FMT_H264,
|
||||
.min_buffers = 2,
|
||||
.max_buffers = 24,
|
||||
@@ -86,6 +123,18 @@ static const struct amvdec_format vdec_formats_gxm[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
@ -1,7 +1,7 @@
|
||||
From 667dcccc4fdc1f37a4b79d6010cd1b07a4667416 Mon Sep 17 00:00:00 2001
|
||||
From e6631facd47ddeef3ddee7ddcdad50b4daf1ff08 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Date: Wed, 5 Jun 2024 11:15:11 +0200
|
||||
Subject: [PATCH 36/58] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
|
||||
Subject: [PATCH 34/53] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
|
||||
sub-nodes
|
||||
|
||||
Allow the '#address-cells', '#size-cells' and subnodes as defined in
|
||||
@ -17,7 +17,7 @@ Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml
|
||||
index a5f2e3442a0e..a1ef0b02e12e 100644
|
||||
index e83d30a91b88..a33cf3a14101 100644
|
||||
--- a/Documentation/devicetree/bindings/usb/dwc2.yaml
|
||||
+++ b/Documentation/devicetree/bindings/usb/dwc2.yaml
|
||||
@@ -177,6 +177,13 @@ properties:
|
@ -1,7 +1,7 @@
|
||||
From cc29170bb5e920caa4d4db264c703ad0cbca937c Mon Sep 17 00:00:00 2001
|
||||
From 5de8d70aea800ab286364e0e07fd82ac7969e88d Mon Sep 17 00:00:00 2001
|
||||
From: Zhang Kunbo <zhangkunbo@huawei.com>
|
||||
Date: Wed, 6 Nov 2024 02:45:48 +0000
|
||||
Subject: [PATCH 37/58] FROMLIST(v1): drm/meson: Avoid use-after-free issues
|
||||
Subject: [PATCH 35/53] FROMLIST(v1): drm/meson: Avoid use-after-free issues
|
||||
with crtc
|
||||
|
||||
It's dangerous to call drm_crtc_init_with_planes() whose second
|
@ -0,0 +1,138 @@
|
||||
From 6b6e71f868f03d004f27b96daf1b2ceb967fa4e4 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Wed, 9 Apr 2025 23:44:22 +0200
|
||||
Subject: [PATCH 36/53] FROMLIST(v1): drm/meson: fix resource cleanup in
|
||||
meson_drv_bind_master() on error
|
||||
|
||||
meson_drv_bind_master() does not free resources in the order they are
|
||||
allocated. This can lead to crashes such as:
|
||||
Unable to handle kernel NULL pointer dereference at virtual address 00000000000000c8
|
||||
[...]
|
||||
Hardware name: Beelink GT-King Pro (DT)
|
||||
pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
|
||||
pc : meson_dw_hdmi_unbind+0x10/0x24 [meson_dw_hdmi]
|
||||
lr : component_unbind+0x38/0x60
|
||||
[...]
|
||||
Call trace:
|
||||
meson_dw_hdmi_unbind+0x10/0x24 [meson_dw_hdmi]
|
||||
component_unbind+0x38/0x60
|
||||
component_unbind_all+0xb8/0xc4
|
||||
meson_drv_bind_master+0x1ec/0x514 [meson_drm]
|
||||
meson_drv_bind+0x14/0x20 [meson_drm]
|
||||
try_to_bring_up_aggregate_device+0xa8/0x160
|
||||
__component_add+0xb8/0x1a8
|
||||
component_add+0x14/0x20
|
||||
meson_dw_hdmi_probe+0x1c/0x28 [meson_dw_hdmi]
|
||||
platform_probe+0x68/0xdc
|
||||
really_probe+0xc0/0x39c
|
||||
__driver_probe_device+0x7c/0x14c
|
||||
driver_probe_device+0x3c/0x120
|
||||
__driver_attach+0xc4/0x200
|
||||
bus_for_each_dev+0x78/0xd8
|
||||
driver_attach+0x24/0x30
|
||||
bus_add_driver+0x110/0x240
|
||||
driver_register+0x68/0x124
|
||||
__platform_driver_register+0x24/0x30
|
||||
meson_dw_hdmi_platform_driver_init+0x20/0x1000 [meson_dw_hdmi]
|
||||
do_one_initcall+0x50/0x1bc
|
||||
do_init_module+0x54/0x1fc
|
||||
load_module+0x788/0x884
|
||||
init_module_from_file+0x88/0xd4
|
||||
__arm64_sys_finit_module+0x248/0x340
|
||||
invoke_syscall+0x48/0x104
|
||||
el0_svc_common.constprop.0+0x40/0xe0
|
||||
do_el0_svc+0x1c/0x28
|
||||
el0_svc+0x30/0xcc
|
||||
el0t_64_sync_handler+0x120/0x12c
|
||||
el0t_64_sync+0x190/0x194
|
||||
|
||||
Clean up resources in the error path in the same order and under the
|
||||
same conditions as they were allocated to fix this.
|
||||
|
||||
Reported-by: Furkan Kardame <f.kardame@manjaro.org>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_drv.c | 31 +++++++++++++++++--------------
|
||||
1 file changed, 17 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
|
||||
index 81d2ee37e773..031686fd4104 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.c
|
||||
@@ -314,35 +314,35 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
|
||||
dev_err(drm->dev, "Couldn't bind all components\n");
|
||||
/* Do not try to unbind */
|
||||
has_components = false;
|
||||
- goto exit_afbcd;
|
||||
+ goto cvbs_encoder_remove;
|
||||
}
|
||||
}
|
||||
|
||||
ret = meson_encoder_hdmi_probe(priv);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto unbind_components;
|
||||
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
||||
ret = meson_encoder_dsi_probe(priv);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto hdmi_encoder_remove;
|
||||
}
|
||||
|
||||
ret = meson_plane_create(priv);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto dsi_encoder_remove;
|
||||
|
||||
ret = meson_overlay_create(priv);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto dsi_encoder_remove;
|
||||
|
||||
ret = meson_crtc_create(priv);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto dsi_encoder_remove;
|
||||
|
||||
ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
|
||||
if (ret)
|
||||
- goto exit_afbcd;
|
||||
+ goto dsi_encoder_remove;
|
||||
|
||||
drm_mode_config_reset(drm);
|
||||
|
||||
@@ -360,6 +360,16 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
|
||||
|
||||
uninstall_irq:
|
||||
free_irq(priv->vsync_irq, drm);
|
||||
+dsi_encoder_remove:
|
||||
+ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
|
||||
+ meson_encoder_dsi_remove(priv);
|
||||
+hdmi_encoder_remove:
|
||||
+ meson_encoder_hdmi_remove(priv);
|
||||
+unbind_components:
|
||||
+ if (has_components)
|
||||
+ component_unbind_all(dev, drm);
|
||||
+cvbs_encoder_remove:
|
||||
+ meson_encoder_cvbs_remove(priv);
|
||||
exit_afbcd:
|
||||
if (priv->afbcd.ops)
|
||||
priv->afbcd.ops->exit(priv);
|
||||
@@ -374,13 +384,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
|
||||
free_drm:
|
||||
drm_dev_put(drm);
|
||||
|
||||
- meson_encoder_dsi_remove(priv);
|
||||
- meson_encoder_hdmi_remove(priv);
|
||||
- meson_encoder_cvbs_remove(priv);
|
||||
-
|
||||
- if (has_components)
|
||||
- component_unbind_all(dev, drm);
|
||||
-
|
||||
return ret;
|
||||
}
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,19 +1,27 @@
|
||||
From efab6d85acee1674025d985ad7334908d822279c Mon Sep 17 00:00:00 2001
|
||||
From 045135fc517b39872fca082639ee75a37bd53409 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 4 Jan 2025 23:45:46 +0000
|
||||
Subject: [PATCH 56/58] WIP: revert "drm/meson: vclk: fix calculation of 59.94
|
||||
fractional rates"
|
||||
Subject: [PATCH 37/53] FROMLIST(v1): Revert "drm/meson: vclk: fix calculation
|
||||
of 59.94 fractional rates"
|
||||
|
||||
This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.
|
||||
|
||||
The patch does permit the offending YUV420 @ 59.94 phy_freq and
|
||||
vclk_freq mode to match in calculations. It also results in all
|
||||
fractional rates being unavailable for use. This was unintended
|
||||
and requires the patch to be reverted.
|
||||
|
||||
Cc: <stable@vger.kernel.org>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index c7a98da6b1ce..eb4c251d79b7 100644
|
||||
index 2a942dc6a6dc..2a82119eb58e 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -804,13 +804,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
@@ -790,13 +790,13 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
FREQ_1000_1001(params[i].pixel_freq));
|
||||
DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
i, params[i].phy_freq,
|
||||
@ -29,7 +37,7 @@ index c7a98da6b1ce..eb4c251d79b7 100644
|
||||
vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
@@ -1088,7 +1088,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
@@ -1070,7 +1070,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
@ -1,79 +0,0 @@
|
||||
From 53a5f81522a4dd7c288f1861924a2c1eb98e7d14 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Mon, 6 Jan 2025 15:13:15 +0100
|
||||
Subject: [PATCH 38/58] FROMLIST(v1): ASoC: soc-dai: add snd_soc_dai_prepare()
|
||||
and use it internally
|
||||
|
||||
Add a new snd_soc_dai_prepare() which can be used (in an upcoming patch)
|
||||
by soc-dapm.c. Use this new function internally in
|
||||
snd_soc_pcm_dai_prepare() to avoid duplicating code.
|
||||
|
||||
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
include/sound/soc-dai.h | 3 +++
|
||||
sound/soc/soc-dai.c | 27 +++++++++++++++++++--------
|
||||
2 files changed, 22 insertions(+), 8 deletions(-)
|
||||
|
||||
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
|
||||
index 0d1b215f24f4..2680836ab28c 100644
|
||||
--- a/include/sound/soc-dai.h
|
||||
+++ b/include/sound/soc-dai.h
|
||||
@@ -193,6 +193,9 @@ int snd_soc_dai_set_channel_map(struct snd_soc_dai *dai,
|
||||
|
||||
int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate);
|
||||
|
||||
+int snd_soc_dai_prepare(struct snd_soc_dai *dai,
|
||||
+ struct snd_pcm_substream *substream);
|
||||
+
|
||||
/* Digital Audio Interface mute */
|
||||
int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute,
|
||||
int direction);
|
||||
diff --git a/sound/soc/soc-dai.c b/sound/soc/soc-dai.c
|
||||
index 4e08892d24c6..41328a8832ef 100644
|
||||
--- a/sound/soc/soc-dai.c
|
||||
+++ b/sound/soc/soc-dai.c
|
||||
@@ -360,6 +360,22 @@ int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(snd_soc_dai_set_tristate);
|
||||
|
||||
+int snd_soc_dai_prepare(struct snd_soc_dai *dai,
|
||||
+ struct snd_pcm_substream *substream)
|
||||
+{
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ if (!snd_soc_dai_stream_valid(dai, substream->stream))
|
||||
+ return 0;
|
||||
+
|
||||
+ if (dai->driver->ops &&
|
||||
+ dai->driver->ops->prepare)
|
||||
+ ret = dai->driver->ops->prepare(substream, dai);
|
||||
+
|
||||
+ return soc_dai_ret(dai, ret);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(snd_soc_dai_prepare);
|
||||
+
|
||||
/**
|
||||
* snd_soc_dai_digital_mute - configure DAI system or master clock.
|
||||
* @dai: DAI
|
||||
@@ -577,14 +593,9 @@ int snd_soc_pcm_dai_prepare(struct snd_pcm_substream *substream)
|
||||
int i, ret;
|
||||
|
||||
for_each_rtd_dais(rtd, i, dai) {
|
||||
- if (!snd_soc_dai_stream_valid(dai, substream->stream))
|
||||
- continue;
|
||||
- if (dai->driver->ops &&
|
||||
- dai->driver->ops->prepare) {
|
||||
- ret = dai->driver->ops->prepare(substream, dai);
|
||||
- if (ret < 0)
|
||||
- return soc_dai_ret(dai, ret);
|
||||
- }
|
||||
+ ret = snd_soc_dai_prepare(dai, substream);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,603 @@
|
||||
From 0b829ab99985c9326b81c97e19b9e36bc094b1e5 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Sat, 5 Apr 2025 04:13:19 +0000
|
||||
Subject: [PATCH 38/53] WIP: drm/meson: use unsigned long long for frequency
|
||||
types
|
||||
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_drv.c | 2 +-
|
||||
drivers/gpu/drm/meson/meson_drv.h | 2 +-
|
||||
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 29 +--
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 195 +++++++++++----------
|
||||
drivers/gpu/drm/meson/meson_vclk.h | 13 +-
|
||||
5 files changed, 126 insertions(+), 115 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
|
||||
index 031686fd4104..ea5bda297a74 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.c
|
||||
@@ -169,7 +169,7 @@ static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
|
||||
/* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
|
||||
{
|
||||
.limits = {
|
||||
- .max_hdmi_phy_freq = 1650000,
|
||||
+ .max_hdmi_phy_freq = 1650000000,
|
||||
},
|
||||
.attrs = (const struct soc_device_attribute []) {
|
||||
{ .soc_id = "GXL (S805*)", },
|
||||
diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
|
||||
index 3f9345c14f31..be4b0e4df6e1 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_drv.h
|
||||
+++ b/drivers/gpu/drm/meson/meson_drv.h
|
||||
@@ -37,7 +37,7 @@ struct meson_drm_match_data {
|
||||
};
|
||||
|
||||
struct meson_drm_soc_limits {
|
||||
- unsigned int max_hdmi_phy_freq;
|
||||
+ unsigned long long max_hdmi_phy_freq;
|
||||
};
|
||||
|
||||
struct meson_drm {
|
||||
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
index 0593a1cde906..ce8cea5d3a56 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
{
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = mode->clock * 1000;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
|
||||
@@ -107,7 +107,8 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
|
||||
+ dev_dbg(priv->dev,
|
||||
+ "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
|
||||
phy_freq, vclk_freq, venc_freq, hdmi_freq,
|
||||
priv->venc.hdmi_use_enci);
|
||||
|
||||
@@ -122,10 +123,11 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long clock = mode->clock * 1000;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
enum drm_mode_status status;
|
||||
|
||||
@@ -144,12 +146,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (status != MODE_OK)
|
||||
return status;
|
||||
|
||||
- return meson_vclk_dmt_supported_freq(priv, mode->clock);
|
||||
+ return meson_vclk_dmt_supported_freq(priv, clock);
|
||||
/* Check against supported VIC modes */
|
||||
} else if (!meson_venc_hdmi_supported_vic(vic))
|
||||
return MODE_BAD;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = clock;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (drm_mode_is_420_only(display_info, mode) ||
|
||||
@@ -179,7 +181,8 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
|
||||
+ dev_dbg(priv->dev,
|
||||
+ "%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n",
|
||||
__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
|
||||
|
||||
return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index 2a82119eb58e..3325580d885d 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -110,7 +110,10 @@
|
||||
#define HDMI_PLL_LOCK BIT(31)
|
||||
#define HDMI_PLL_LOCK_G12A (3 << 30)
|
||||
|
||||
-#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001)
|
||||
+#define PIXEL_FREQ_1000_1001(_freq) \
|
||||
+ DIV_ROUND_CLOSEST_ULL((_freq) * 1000ULL, 1001ULL)
|
||||
+#define PHY_FREQ_1000_1001(_freq) \
|
||||
+ (PIXEL_FREQ_1000_1001(DIV_ROUND_DOWN_ULL(_freq, 10ULL)) * 10)
|
||||
|
||||
/* VID PLL Dividers */
|
||||
enum {
|
||||
@@ -360,11 +363,11 @@ enum {
|
||||
};
|
||||
|
||||
struct meson_vclk_params {
|
||||
- unsigned int pll_freq;
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int pixel_freq;
|
||||
+ unsigned long long pll_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long pixel_freq;
|
||||
unsigned int pll_od1;
|
||||
unsigned int pll_od2;
|
||||
unsigned int pll_od3;
|
||||
@@ -372,11 +375,11 @@ struct meson_vclk_params {
|
||||
unsigned int vclk_div;
|
||||
} params[] = {
|
||||
[MESON_VCLK_HDMI_ENCI_54000] = {
|
||||
- .pll_freq = 4320000,
|
||||
- .phy_freq = 270000,
|
||||
- .vclk_freq = 54000,
|
||||
- .venc_freq = 54000,
|
||||
- .pixel_freq = 54000,
|
||||
+ .pll_freq = 4320000000,
|
||||
+ .phy_freq = 270000000,
|
||||
+ .vclk_freq = 54000000,
|
||||
+ .venc_freq = 54000000,
|
||||
+ .pixel_freq = 54000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -384,11 +387,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_54000] = {
|
||||
- .pll_freq = 4320000,
|
||||
- .phy_freq = 270000,
|
||||
- .vclk_freq = 54000,
|
||||
- .venc_freq = 54000,
|
||||
- .pixel_freq = 27000,
|
||||
+ .pll_freq = 4320000000,
|
||||
+ .phy_freq = 270000000,
|
||||
+ .vclk_freq = 54000000,
|
||||
+ .venc_freq = 54000000,
|
||||
+ .pixel_freq = 27000000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 4,
|
||||
.pll_od3 = 1,
|
||||
@@ -396,11 +399,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_DDR_148500] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 742500,
|
||||
- .vclk_freq = 148500,
|
||||
- .venc_freq = 148500,
|
||||
- .pixel_freq = 74250,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 742500000,
|
||||
+ .vclk_freq = 148500000,
|
||||
+ .venc_freq = 148500000,
|
||||
+ .pixel_freq = 74250000,
|
||||
.pll_od1 = 4,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -408,11 +411,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_74250] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 742500,
|
||||
- .vclk_freq = 74250,
|
||||
- .venc_freq = 74250,
|
||||
- .pixel_freq = 74250,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 742500000,
|
||||
+ .vclk_freq = 74250000,
|
||||
+ .venc_freq = 74250000,
|
||||
+ .pixel_freq = 74250000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -420,11 +423,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_148500] = {
|
||||
- .pll_freq = 2970000,
|
||||
- .phy_freq = 1485000,
|
||||
- .vclk_freq = 148500,
|
||||
- .venc_freq = 148500,
|
||||
- .pixel_freq = 148500,
|
||||
+ .pll_freq = 2970000000,
|
||||
+ .phy_freq = 1485000000,
|
||||
+ .vclk_freq = 148500000,
|
||||
+ .venc_freq = 148500000,
|
||||
+ .pixel_freq = 148500000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 2,
|
||||
.pll_od3 = 2,
|
||||
@@ -432,11 +435,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_297000] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 2970000,
|
||||
- .venc_freq = 297000,
|
||||
- .vclk_freq = 297000,
|
||||
- .pixel_freq = 297000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 2970000000,
|
||||
+ .venc_freq = 297000000,
|
||||
+ .vclk_freq = 297000000,
|
||||
+ .pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -444,11 +447,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 2,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 5940000,
|
||||
- .venc_freq = 594000,
|
||||
- .vclk_freq = 594000,
|
||||
- .pixel_freq = 594000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 5940000000,
|
||||
+ .venc_freq = 594000000,
|
||||
+ .vclk_freq = 594000000,
|
||||
+ .pixel_freq = 594000000,
|
||||
.pll_od1 = 1,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 2,
|
||||
@@ -456,11 +459,11 @@ struct meson_vclk_params {
|
||||
.vclk_div = 1,
|
||||
},
|
||||
[MESON_VCLK_HDMI_594000_YUV420] = {
|
||||
- .pll_freq = 5940000,
|
||||
- .phy_freq = 2970000,
|
||||
- .venc_freq = 594000,
|
||||
- .vclk_freq = 594000,
|
||||
- .pixel_freq = 297000,
|
||||
+ .pll_freq = 5940000000,
|
||||
+ .phy_freq = 2970000000,
|
||||
+ .venc_freq = 594000000,
|
||||
+ .vclk_freq = 594000000,
|
||||
+ .pixel_freq = 297000000,
|
||||
.pll_od1 = 2,
|
||||
.pll_od2 = 1,
|
||||
.pll_od3 = 1,
|
||||
@@ -617,16 +620,16 @@ static void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m,
|
||||
3 << 20, pll_od_to_reg(od3) << 20);
|
||||
}
|
||||
|
||||
-#define XTAL_FREQ 24000
|
||||
+#define XTAL_FREQ (24 * 1000 * 1000)
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
/* The GXBB PLL has a /2 pre-multiplier */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB))
|
||||
- pll_freq /= 2;
|
||||
+ pll_freq = DIV_ROUND_DOWN_ULL(pll_freq, 2);
|
||||
|
||||
- return pll_freq / XTAL_FREQ;
|
||||
+ return DIV_ROUND_DOWN_ULL(pll_freq, XTAL_FREQ);
|
||||
}
|
||||
|
||||
#define HDMI_FRAC_MAX_GXBB 4096
|
||||
@@ -635,12 +638,13 @@ static unsigned int meson_hdmi_pll_get_m(struct meson_drm *priv,
|
||||
|
||||
static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
unsigned int m,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
- unsigned int parent_freq = XTAL_FREQ;
|
||||
+ unsigned long long parent_freq = XTAL_FREQ;
|
||||
unsigned int frac_max = HDMI_FRAC_MAX_GXL;
|
||||
unsigned int frac_m;
|
||||
unsigned int frac;
|
||||
+ u32 remainder;
|
||||
|
||||
/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -652,11 +656,11 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
frac_max = HDMI_FRAC_MAX_G12A;
|
||||
|
||||
/* We can have a perfect match !*/
|
||||
- if (pll_freq / m == parent_freq &&
|
||||
- pll_freq % m == 0)
|
||||
+ if (div_u64_rem(pll_freq, m, &remainder) == parent_freq &&
|
||||
+ remainder == 0)
|
||||
return 0;
|
||||
|
||||
- frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq);
|
||||
+ frac = mul_u64_u64_div_u64(pll_freq, frac_max, parent_freq);
|
||||
frac_m = m * frac_max;
|
||||
if (frac_m > frac)
|
||||
return frac_max;
|
||||
@@ -666,7 +670,7 @@ static unsigned int meson_hdmi_pll_get_frac(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
- unsigned int m,
|
||||
+ unsigned long long m,
|
||||
unsigned int frac)
|
||||
{
|
||||
if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
@@ -694,7 +698,7 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv,
|
||||
}
|
||||
|
||||
static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
- unsigned int freq,
|
||||
+ unsigned long long freq,
|
||||
unsigned int *m,
|
||||
unsigned int *frac,
|
||||
unsigned int *od)
|
||||
@@ -706,7 +710,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
continue;
|
||||
*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);
|
||||
|
||||
- DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n",
|
||||
+ DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d\n",
|
||||
freq, *m, *frac, *od);
|
||||
|
||||
if (meson_hdmi_pll_validate_params(priv, *m, *frac))
|
||||
@@ -718,7 +722,7 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv,
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
enum drm_mode_status
|
||||
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq)
|
||||
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq)
|
||||
{
|
||||
unsigned int od, m, frac;
|
||||
|
||||
@@ -741,7 +745,7 @@ EXPORT_SYMBOL_GPL(meson_vclk_dmt_supported_freq);
|
||||
|
||||
/* pll_freq is the frequency after the OD dividers */
|
||||
static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
- unsigned int pll_freq)
|
||||
+ unsigned long long pll_freq)
|
||||
{
|
||||
unsigned int od, m, frac, od1, od2, od3;
|
||||
|
||||
@@ -756,7 +760,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
od1 = od / od2;
|
||||
}
|
||||
|
||||
- DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
+ DRM_DEBUG_DRIVER("PLL params for %lluHz: m=%x frac=%x od=%d/%d/%d\n",
|
||||
pll_freq, m, frac, od1, od2, od3);
|
||||
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
@@ -764,17 +768,18 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv,
|
||||
return;
|
||||
}
|
||||
|
||||
- DRM_ERROR("Fatal, unable to find parameters for PLL freq %d\n",
|
||||
+ DRM_ERROR("Fatal, unable to find parameters for PLL freq %lluHz\n",
|
||||
pll_freq);
|
||||
}
|
||||
|
||||
enum drm_mode_status
|
||||
-meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
- unsigned int vclk_freq)
|
||||
+meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
+ unsigned long long phy_freq,
|
||||
+ unsigned long long vclk_freq)
|
||||
{
|
||||
int i;
|
||||
|
||||
- DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n",
|
||||
+ DRM_DEBUG_DRIVER("phy_freq = %lluHz vclk_freq = %lluHz\n",
|
||||
phy_freq, vclk_freq);
|
||||
|
||||
/* Check against soc revision/package limits */
|
||||
@@ -785,19 +790,19 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
|
||||
for (i = 0 ; params[i].pixel_freq ; ++i) {
|
||||
- DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n",
|
||||
+ DRM_DEBUG_DRIVER("i = %d pixel_freq = %lluHz alt = %lluHz\n",
|
||||
i, params[i].pixel_freq,
|
||||
- FREQ_1000_1001(params[i].pixel_freq));
|
||||
- DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n",
|
||||
+ PIXEL_FREQ_1000_1001(params[i].pixel_freq));
|
||||
+ DRM_DEBUG_DRIVER("i = %d phy_freq = %lluHz alt = %lluHz\n",
|
||||
i, params[i].phy_freq,
|
||||
- FREQ_1000_1001(params[i].phy_freq/10)*10);
|
||||
+ PHY_FREQ_1000_1001(params[i].phy_freq));
|
||||
/* Match strict frequency */
|
||||
if (phy_freq == params[i].phy_freq &&
|
||||
vclk_freq == params[i].vclk_freq)
|
||||
return MODE_OK;
|
||||
/* Match 1000/1001 variant */
|
||||
- if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) &&
|
||||
- vclk_freq == FREQ_1000_1001(params[i].vclk_freq))
|
||||
+ if (phy_freq == PHY_FREQ_1000_1001(params[i].phy_freq) &&
|
||||
+ vclk_freq == PIXEL_FREQ_1000_1001(params[i].vclk_freq))
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
@@ -805,8 +810,9 @@ meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq);
|
||||
|
||||
-static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
- unsigned int od1, unsigned int od2, unsigned int od3,
|
||||
+static void meson_vclk_set(struct meson_drm *priv,
|
||||
+ unsigned long long pll_base_freq, unsigned int od1,
|
||||
+ unsigned int od2, unsigned int od3,
|
||||
unsigned int vid_pll_div, unsigned int vclk_div,
|
||||
unsigned int hdmi_tx_div, unsigned int venc_div,
|
||||
bool hdmi_use_enci, bool vic_alternate_clock)
|
||||
@@ -826,15 +832,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_generic_set(priv, pll_base_freq);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x3d;
|
||||
frac = vic_alternate_clock ? 0xd02 : 0xe00;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0x59 : 0x5a;
|
||||
frac = vic_alternate_clock ? 0xe8f : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0xa05 : 0xc00;
|
||||
break;
|
||||
@@ -844,15 +850,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
|
||||
meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x281 : 0x300;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x347 : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x102 : 0x200;
|
||||
break;
|
||||
@@ -861,15 +867,15 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3);
|
||||
} else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
|
||||
switch (pll_base_freq) {
|
||||
- case 2970000:
|
||||
+ case 2970000000:
|
||||
m = 0x7b;
|
||||
frac = vic_alternate_clock ? 0x140b4 : 0x18000;
|
||||
break;
|
||||
- case 4320000:
|
||||
+ case 4320000000:
|
||||
m = vic_alternate_clock ? 0xb3 : 0xb4;
|
||||
frac = vic_alternate_clock ? 0x1a3ee : 0;
|
||||
break;
|
||||
- case 5940000:
|
||||
+ case 5940000000:
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x8148 : 0x10000;
|
||||
break;
|
||||
@@ -1025,14 +1031,14 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
}
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
- unsigned int phy_freq, unsigned int vclk_freq,
|
||||
- unsigned int venc_freq, unsigned int dac_freq,
|
||||
+ unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
+ unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci)
|
||||
{
|
||||
bool vic_alternate_clock = false;
|
||||
- unsigned int freq;
|
||||
- unsigned int hdmi_tx_div;
|
||||
- unsigned int venc_div;
|
||||
+ unsigned long long freq;
|
||||
+ unsigned long long hdmi_tx_div;
|
||||
+ unsigned long long venc_div;
|
||||
|
||||
if (target == MESON_VCLK_TARGET_CVBS) {
|
||||
meson_venci_cvbs_clock_config(priv);
|
||||
@@ -1052,27 +1058,27 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
return;
|
||||
}
|
||||
|
||||
- hdmi_tx_div = vclk_freq / dac_freq;
|
||||
+ hdmi_tx_div = DIV_ROUND_DOWN_ULL(vclk_freq, dac_freq);
|
||||
|
||||
if (hdmi_tx_div == 0) {
|
||||
- pr_err("Fatal Error, invalid HDMI-TX freq %d\n",
|
||||
+ pr_err("Fatal Error, invalid HDMI-TX freq %lluHz\n",
|
||||
dac_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
- venc_div = vclk_freq / venc_freq;
|
||||
+ venc_div = DIV_ROUND_DOWN_ULL(vclk_freq, venc_freq);
|
||||
|
||||
if (venc_div == 0) {
|
||||
- pr_err("Fatal Error, invalid HDMI venc freq %d\n",
|
||||
+ pr_err("Fatal Error, invalid HDMI venc freq %lluHz\n",
|
||||
venc_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
+ phy_freq == PHY_FREQ_1000_1001(params[freq].phy_freq)) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
- vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
+ vclk_freq == PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
vic_alternate_clock = true;
|
||||
else
|
||||
@@ -1098,7 +1104,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
}
|
||||
|
||||
if (!params[freq].pixel_freq) {
|
||||
- pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq);
|
||||
+ pr_err("Fatal Error, invalid HDMI vclk freq %lluHz\n",
|
||||
+ vclk_freq);
|
||||
return;
|
||||
}
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h
|
||||
index 60617aaf18dd..7ac55744e574 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.h
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.h
|
||||
@@ -20,17 +20,18 @@ enum {
|
||||
};
|
||||
|
||||
/* 27MHz is the CVBS Pixel Clock */
|
||||
-#define MESON_VCLK_CVBS 27000
|
||||
+#define MESON_VCLK_CVBS (27 * 1000 * 1000)
|
||||
|
||||
enum drm_mode_status
|
||||
-meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq);
|
||||
+meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned long long freq);
|
||||
enum drm_mode_status
|
||||
-meson_vclk_vic_supported_freq(struct meson_drm *priv, unsigned int phy_freq,
|
||||
- unsigned int vclk_freq);
|
||||
+meson_vclk_vic_supported_freq(struct meson_drm *priv,
|
||||
+ unsigned long long phy_freq,
|
||||
+ unsigned long long vclk_freq);
|
||||
|
||||
void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
- unsigned int phy_freq, unsigned int vclk_freq,
|
||||
- unsigned int venc_freq, unsigned int dac_freq,
|
||||
+ unsigned long long phy_freq, unsigned long long vclk_freq,
|
||||
+ unsigned long long venc_freq, unsigned long long dac_freq,
|
||||
bool hdmi_use_enci);
|
||||
|
||||
#endif /* __MESON_VCLK_H */
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,52 +0,0 @@
|
||||
From b9e02af3bf8aac6fd3815255b46bcb36fe082911 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Date: Mon, 6 Jan 2025 15:13:16 +0100
|
||||
Subject: [PATCH 39/58] FROMLIST(v1): ASoC: dapm: add support for preparing
|
||||
streams
|
||||
|
||||
Codec driver can implement .hw_params and/or .prepare from struct
|
||||
snd_soc_dai_ops. For codec-to-codec links only the former (.hw_params)
|
||||
callback has been called.
|
||||
|
||||
On platforms like Amlogic Meson8/8b/8m2 the SoC's sound card
|
||||
(sound/soc/meson/gx-card.c) uses a codec-to-codec link for the HDMI
|
||||
codec output because further digital routing is required after the
|
||||
backend. The new DRM HDMI (audio) codec framework (which internally
|
||||
uses sound/soc/codecs/hdmi-codec.c) relies on the .prepare callback
|
||||
of the hdmi-codec to be called. Implement a call to
|
||||
snd_soc_dai_prepare() so the .prepare callback of the hdmi-codec is
|
||||
called on those platforms.
|
||||
|
||||
For platforms or sound cards without a codec-to-codec link with
|
||||
additional parameters (which applies to most hardware) this changes
|
||||
nothing as the .prepare callback is already called via
|
||||
snd_pcm_do_prepare() (as well as dpcm_fe_dai_prepare() and
|
||||
dpcm_be_dai_prepare()) on those.
|
||||
|
||||
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
---
|
||||
sound/soc/soc-dapm.c | 7 +++++++
|
||||
1 file changed, 7 insertions(+)
|
||||
|
||||
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c
|
||||
index 99521c784a9b..ac8eef217dc4 100644
|
||||
--- a/sound/soc/soc-dapm.c
|
||||
+++ b/sound/soc/soc-dapm.c
|
||||
@@ -4013,6 +4013,13 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w,
|
||||
break;
|
||||
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
+ snd_soc_dapm_widget_for_each_sink_path(w, path) {
|
||||
+ sink = path->sink->priv;
|
||||
+
|
||||
+ snd_soc_dai_prepare(sink, substream);
|
||||
+ ret = 0;
|
||||
+ }
|
||||
+
|
||||
snd_soc_dapm_widget_for_each_sink_path(w, path) {
|
||||
sink = path->sink->priv;
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 8cb4bd2f10a588f0ec6e191fca998fb803b00c9c Mon Sep 17 00:00:00 2001
|
||||
From 1af16e49bc86ed4f7f07b2219f80ec958c6c5914 Mon Sep 17 00:00:00 2001
|
||||
From: Andreas Baierl <ichgeh@imkreisrum.de>
|
||||
Date: Tue, 2 Apr 2024 14:22:52 +0000
|
||||
Subject: [PATCH 42/58] WIP: media: meson: vdec: reintroduce wiggle room
|
||||
Subject: [PATCH 39/53] WIP: media: meson: vdec: reintroduce wiggle room
|
||||
|
||||
Without the wiggle room, it happens that matching offsets can't be found.
|
||||
This results in non-matches and afterwards in frame drops in userspace apps.
|
@ -1,7 +1,7 @@
|
||||
From 50cd94397b46f73ad977477191d0e30b4830784f Mon Sep 17 00:00:00 2001
|
||||
From b23e2786837b9bd3680e4d5e74eb5c39e5fac331 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 14 Mar 2023 01:13:15 +0000
|
||||
Subject: [PATCH 43/58] WIP: media: meson: vdec: fix memory leak of 'new_frame'
|
||||
Subject: [PATCH 40/53] WIP: media: meson: vdec: fix memory leak of 'new_frame'
|
||||
|
||||
Reported-by: kernel test robot <lkp@intel.com>
|
||||
Reported-by: Dan Carpenter <error27@gmail.com>
|
@ -1,68 +0,0 @@
|
||||
From 640283d8c1bcdb8951b7b3282be1581668ff4d59 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 4 Jun 2024 10:49:58 +0000
|
||||
Subject: [PATCH 41/58] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
|
||||
from GXLX
|
||||
|
||||
This patch is required until GXLX support has been merged upstream.
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
.../staging/media/meson/vdec/vdec_platform.c | 34 +++++++------------
|
||||
1 file changed, 12 insertions(+), 22 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
index ca0cb417d793..870e61dedd81 100644
|
||||
--- a/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
+++ b/drivers/staging/media/meson/vdec/vdec_platform.c
|
||||
@@ -84,6 +84,18 @@ static const struct amvdec_format vdec_formats_gxl[] = {
|
||||
|
||||
static const struct amvdec_format vdec_formats_gxlx[] = {
|
||||
{
|
||||
+ .pixfmt = V4L2_PIX_FMT_HEVC,
|
||||
+ .min_buffers = 4,
|
||||
+ .max_buffers = 24,
|
||||
+ .max_width = 3840,
|
||||
+ .max_height = 2160,
|
||||
+ .vdec_ops = &vdec_hevc_ops,
|
||||
+ .codec_ops = &codec_hevc_ops,
|
||||
+ .firmware_path = "meson/vdec/gxl_hevc.bin",
|
||||
+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
+ .flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
+ V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
+ }, {
|
||||
.pixfmt = V4L2_PIX_FMT_H264,
|
||||
.min_buffers = 2,
|
||||
.max_buffers = 24,
|
||||
@@ -95,28 +107,6 @@ static const struct amvdec_format vdec_formats_gxlx[] = {
|
||||
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
|
||||
.flags = V4L2_FMT_FLAG_COMPRESSED |
|
||||
V4L2_FMT_FLAG_DYN_RESOLUTION,
|
||||
- }, {
|
||||
- .pixfmt = V4L2_PIX_FMT_MPEG1,
|
||||
- .min_buffers = 8,
|
||||
- .max_buffers = 8,
|
||||
- .max_width = 1920,
|
||||
- .max_height = 1080,
|
||||
- .vdec_ops = &vdec_1_ops,
|
||||
- .codec_ops = &codec_mpeg12_ops,
|
||||
- .firmware_path = "meson/vdec/gxl_mpeg12.bin",
|
||||
- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
|
||||
- .flags = V4L2_FMT_FLAG_COMPRESSED,
|
||||
- }, {
|
||||
- .pixfmt = V4L2_PIX_FMT_MPEG2,
|
||||
- .min_buffers = 8,
|
||||
- .max_buffers = 8,
|
||||
- .max_width = 1920,
|
||||
- .max_height = 1080,
|
||||
- .vdec_ops = &vdec_1_ops,
|
||||
- .codec_ops = &codec_mpeg12_ops,
|
||||
- .firmware_path = "meson/vdec/gxl_mpeg12.bin",
|
||||
- .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
|
||||
- .flags = V4L2_FMT_FLAG_COMPRESSED,
|
||||
},
|
||||
};
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
@ -0,0 +1,235 @@
|
||||
From c1017889ef5c1840da96add89cdc7ca489f675cf Mon Sep 17 00:00:00 2001
|
||||
From: Andreas Baierl <ichgeh@imkreisrum.de>
|
||||
Date: Thu, 20 Feb 2025 23:59:14 +0000
|
||||
Subject: [PATCH 41/53] WIP: media: meson: vdec: fix
|
||||
V4L2_BUF_FLAG_{KEY|P|B}FRAME
|
||||
|
||||
ffmpeg needs the keyframe flag to be set correctly, else
|
||||
AV_FRAME_FLAG_* can not be set. Fix that (only h264 atm).
|
||||
|
||||
Register values and bits were obtained from the vendor
|
||||
4.9 kernel source [0].
|
||||
|
||||
[0] https://github.com/hardkernel/linux/tree/odroidg12-4.9.y/drivers/amlogic/media_modules/frame_provider/decoder/h264
|
||||
|
||||
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
|
||||
---
|
||||
drivers/staging/media/meson/vdec/codec_h264.c | 19 +++++++++++++-
|
||||
drivers/staging/media/meson/vdec/codec_hevc.c | 4 +--
|
||||
.../staging/media/meson/vdec/codec_mpeg12.c | 2 +-
|
||||
drivers/staging/media/meson/vdec/codec_vp9.c | 4 +--
|
||||
.../staging/media/meson/vdec/vdec_helpers.c | 25 +++++++++++++------
|
||||
.../staging/media/meson/vdec/vdec_helpers.h | 6 ++---
|
||||
6 files changed, 43 insertions(+), 17 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/codec_h264.c b/drivers/staging/media/meson/vdec/codec_h264.c
|
||||
index d53c9a464bde..4edb4021c244 100644
|
||||
--- a/drivers/staging/media/meson/vdec/codec_h264.c
|
||||
+++ b/drivers/staging/media/meson/vdec/codec_h264.c
|
||||
@@ -35,6 +35,11 @@
|
||||
#define PIC_TOP_BOT 5
|
||||
#define PIC_BOT_TOP 6
|
||||
|
||||
+/* Slice type */
|
||||
+#define SLICE_TYPE_I 2
|
||||
+#define SLICE_TYPE_P 5
|
||||
+#define SLICE_TYPE_B 6
|
||||
+
|
||||
/* Size of Motion Vector per macroblock */
|
||||
#define MB_MV_SIZE 96
|
||||
|
||||
@@ -393,8 +398,11 @@ static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status)
|
||||
u32 buffer_index = frame_status & BUF_IDX_MASK;
|
||||
u32 pic_struct = (frame_status >> PIC_STRUCT_BIT) &
|
||||
PIC_STRUCT_MASK;
|
||||
+ u32 idr_flag = (frame_status & 0x400);
|
||||
u32 offset = (frame_status >> OFFSET_BIT) & OFFSET_MASK;
|
||||
u32 field = V4L2_FIELD_NONE;
|
||||
+ u32 slice_type = (amvdec_read_dos(core, AV_SCRATCH_H) >> (i * 4)) & 0xf;
|
||||
+ u32 type = 0;
|
||||
|
||||
/*
|
||||
* A buffer decode error means it was decoded,
|
||||
@@ -410,8 +418,17 @@ static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status)
|
||||
else if (pic_struct == PIC_BOT_TOP)
|
||||
field = V4L2_FIELD_INTERLACED_BT;
|
||||
|
||||
+ if (idr_flag)
|
||||
+ type = 4;
|
||||
+ else if (slice_type == SLICE_TYPE_I)
|
||||
+ type = 1;
|
||||
+ else if (slice_type == SLICE_TYPE_P)
|
||||
+ type = 2;
|
||||
+ else if (slice_type == SLICE_TYPE_B || slice_type == 8)
|
||||
+ type = 3;
|
||||
+
|
||||
offset |= get_offset_msb(core, i);
|
||||
- amvdec_dst_buf_done_idx(sess, buffer_index, offset, field);
|
||||
+ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field, type);
|
||||
}
|
||||
}
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/codec_hevc.c b/drivers/staging/media/meson/vdec/codec_hevc.c
|
||||
index b0d8623c3c7d..fe439770637c 100644
|
||||
--- a/drivers/staging/media/meson/vdec/codec_hevc.c
|
||||
+++ b/drivers/staging/media/meson/vdec/codec_hevc.c
|
||||
@@ -499,7 +499,7 @@ static void codec_hevc_show_frames(struct amvdec_session *sess)
|
||||
dev_dbg(sess->core->dev, "DONE frame poc %u; vbuf %u\n",
|
||||
tmp->poc, tmp->vbuf->vb2_buf.index);
|
||||
amvdec_dst_buf_done_offset(sess, tmp->vbuf, tmp->offset,
|
||||
- V4L2_FIELD_NONE, false);
|
||||
+ V4L2_FIELD_NONE, 0, false);
|
||||
|
||||
tmp->show = 0;
|
||||
hevc->frames_num--;
|
||||
@@ -667,7 +667,7 @@ static void codec_hevc_flush_output(struct amvdec_session *sess)
|
||||
struct hevc_frame *tmp, *n;
|
||||
|
||||
while ((tmp = codec_hevc_get_next_ready_frame(hevc))) {
|
||||
- amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE);
|
||||
+ amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE, 0);
|
||||
tmp->show = 0;
|
||||
hevc->frames_num--;
|
||||
}
|
||||
diff --git a/drivers/staging/media/meson/vdec/codec_mpeg12.c b/drivers/staging/media/meson/vdec/codec_mpeg12.c
|
||||
index 48869cc3d973..05c52766fe52 100644
|
||||
--- a/drivers/staging/media/meson/vdec/codec_mpeg12.c
|
||||
+++ b/drivers/staging/media/meson/vdec/codec_mpeg12.c
|
||||
@@ -187,7 +187,7 @@ static irqreturn_t codec_mpeg12_threaded_isr(struct amvdec_session *sess)
|
||||
codec_mpeg12_update_dar(sess);
|
||||
buffer_index = ((reg & 0xf) - 1) & 7;
|
||||
offset = amvdec_read_dos(core, MREG_FRAME_OFFSET);
|
||||
- amvdec_dst_buf_done_idx(sess, buffer_index, offset, field);
|
||||
+ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field, 0);
|
||||
|
||||
end:
|
||||
amvdec_write_dos(core, MREG_BUFFEROUT, 0);
|
||||
diff --git a/drivers/staging/media/meson/vdec/codec_vp9.c b/drivers/staging/media/meson/vdec/codec_vp9.c
|
||||
index 8e3bbf0db4b3..1b1f1797110a 100644
|
||||
--- a/drivers/staging/media/meson/vdec/codec_vp9.c
|
||||
+++ b/drivers/staging/media/meson/vdec/codec_vp9.c
|
||||
@@ -665,7 +665,7 @@ static void codec_vp9_flush_output(struct amvdec_session *sess)
|
||||
if (!tmp->done) {
|
||||
if (tmp->show)
|
||||
amvdec_dst_buf_done(sess, tmp->vbuf,
|
||||
- V4L2_FIELD_NONE);
|
||||
+ V4L2_FIELD_NONE, 0);
|
||||
else
|
||||
v4l2_m2m_buf_queue(sess->m2m_ctx, tmp->vbuf);
|
||||
|
||||
@@ -1427,7 +1427,7 @@ static void codec_vp9_show_frame(struct amvdec_session *sess)
|
||||
|
||||
if (!tmp->done) {
|
||||
pr_debug("Doning %u\n", tmp->index);
|
||||
- amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE);
|
||||
+ amvdec_dst_buf_done(sess, tmp->vbuf, V4L2_FIELD_NONE, 0);
|
||||
tmp->done = 1;
|
||||
vp9->frames_num--;
|
||||
}
|
||||
diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.c b/drivers/staging/media/meson/vdec/vdec_helpers.c
|
||||
index fbfdbf3ec19d..9a61dabd8ce9 100644
|
||||
--- a/drivers/staging/media/meson/vdec/vdec_helpers.c
|
||||
+++ b/drivers/staging/media/meson/vdec/vdec_helpers.c
|
||||
@@ -280,7 +280,7 @@ EXPORT_SYMBOL_GPL(amvdec_remove_ts);
|
||||
|
||||
static void dst_buf_done(struct amvdec_session *sess,
|
||||
struct vb2_v4l2_buffer *vbuf,
|
||||
- u32 field, u64 timestamp,
|
||||
+ u32 field, u32 type, u64 timestamp,
|
||||
struct v4l2_timecode timecode, u32 flags)
|
||||
{
|
||||
struct device *dev = sess->core->dev_dec;
|
||||
@@ -303,6 +303,15 @@ static void dst_buf_done(struct amvdec_session *sess,
|
||||
vbuf->flags = flags;
|
||||
vbuf->timecode = timecode;
|
||||
|
||||
+ if (type == 1)
|
||||
+ vbuf->flags |= V4L2_BUF_FLAG_KEYFRAME;
|
||||
+ else if (type == 2)
|
||||
+ vbuf->flags |= V4L2_BUF_FLAG_PFRAME;
|
||||
+ else if (type == 3)
|
||||
+ vbuf->flags |= V4L2_BUF_FLAG_BFRAME;
|
||||
+ else if (type == 4)
|
||||
+ vbuf->flags |= V4L2_BUF_FLAG_KEYFRAME;
|
||||
+
|
||||
if (sess->should_stop &&
|
||||
atomic_read(&sess->esparser_queued_bufs) <= 1) {
|
||||
const struct v4l2_event ev = { .type = V4L2_EVENT_EOS };
|
||||
@@ -329,7 +338,7 @@ static void dst_buf_done(struct amvdec_session *sess,
|
||||
}
|
||||
|
||||
void amvdec_dst_buf_done(struct amvdec_session *sess,
|
||||
- struct vb2_v4l2_buffer *vbuf, u32 field)
|
||||
+ struct vb2_v4l2_buffer *vbuf, u32 field, u32 type)
|
||||
{
|
||||
struct device *dev = sess->core->dev_dec;
|
||||
struct amvdec_timestamp *tmp;
|
||||
@@ -357,14 +366,14 @@ void amvdec_dst_buf_done(struct amvdec_session *sess,
|
||||
kfree(tmp);
|
||||
spin_unlock_irqrestore(&sess->ts_spinlock, flags);
|
||||
|
||||
- dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags);
|
||||
+ dst_buf_done(sess, vbuf, field, type, timestamp, timecode, vbuf_flags);
|
||||
atomic_dec(&sess->esparser_queued_bufs);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(amvdec_dst_buf_done);
|
||||
|
||||
void amvdec_dst_buf_done_offset(struct amvdec_session *sess,
|
||||
struct vb2_v4l2_buffer *vbuf,
|
||||
- u32 offset, u32 field, bool allow_drop)
|
||||
+ u32 offset, u32 field, u32 type, bool allow_drop)
|
||||
{
|
||||
struct device *dev = sess->core->dev_dec;
|
||||
struct amvdec_timestamp *match = NULL;
|
||||
@@ -411,14 +420,14 @@ void amvdec_dst_buf_done_offset(struct amvdec_session *sess,
|
||||
}
|
||||
spin_unlock_irqrestore(&sess->ts_spinlock, flags);
|
||||
|
||||
- dst_buf_done(sess, vbuf, field, timestamp, timecode, vbuf_flags);
|
||||
+ dst_buf_done(sess, vbuf, field, type, timestamp, timecode, vbuf_flags);
|
||||
if (match)
|
||||
atomic_dec(&sess->esparser_queued_bufs);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_offset);
|
||||
|
||||
void amvdec_dst_buf_done_idx(struct amvdec_session *sess,
|
||||
- u32 buf_idx, u32 offset, u32 field)
|
||||
+ u32 buf_idx, u32 offset, u32 field, u32 type)
|
||||
{
|
||||
struct vb2_v4l2_buffer *vbuf;
|
||||
struct device *dev = sess->core->dev_dec;
|
||||
@@ -434,9 +443,9 @@ void amvdec_dst_buf_done_idx(struct amvdec_session *sess,
|
||||
}
|
||||
|
||||
if (offset != -1)
|
||||
- amvdec_dst_buf_done_offset(sess, vbuf, offset, field, true);
|
||||
+ amvdec_dst_buf_done_offset(sess, vbuf, offset, field, type, true);
|
||||
else
|
||||
- amvdec_dst_buf_done(sess, vbuf, field);
|
||||
+ amvdec_dst_buf_done(sess, vbuf, field, type);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_idx);
|
||||
|
||||
diff --git a/drivers/staging/media/meson/vdec/vdec_helpers.h b/drivers/staging/media/meson/vdec/vdec_helpers.h
|
||||
index 1a711679d26a..e30edb935e37 100644
|
||||
--- a/drivers/staging/media/meson/vdec/vdec_helpers.h
|
||||
+++ b/drivers/staging/media/meson/vdec/vdec_helpers.h
|
||||
@@ -41,12 +41,12 @@ u32 amvdec_amfbc_size(u32 width, u32 height, u32 is_10bit, u32 use_mmu);
|
||||
* @field: V4L2 interlaced field
|
||||
*/
|
||||
void amvdec_dst_buf_done_idx(struct amvdec_session *sess, u32 buf_idx,
|
||||
- u32 offset, u32 field);
|
||||
+ u32 offset, u32 field, u32 type);
|
||||
void amvdec_dst_buf_done(struct amvdec_session *sess,
|
||||
- struct vb2_v4l2_buffer *vbuf, u32 field);
|
||||
+ struct vb2_v4l2_buffer *vbuf, u32 field, u32 type);
|
||||
void amvdec_dst_buf_done_offset(struct amvdec_session *sess,
|
||||
struct vb2_v4l2_buffer *vbuf,
|
||||
- u32 offset, u32 field, bool allow_drop);
|
||||
+ u32 offset, u32 field, u32 type, bool allow_drop);
|
||||
|
||||
/**
|
||||
* amvdec_add_ts() - Add a timestamp to the list
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From d9310ff07f390796ce2d7752c3de1695348b18f9 Mon Sep 17 00:00:00 2001
|
||||
From 69f53715337f45b98c8e257be114486b81770611 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sun, 26 May 2024 12:53:07 +0000
|
||||
Subject: [PATCH 44/58] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
|
||||
Subject: [PATCH 42/53] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
|
||||
boards
|
||||
|
||||
Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)
|
@ -1,7 +1,7 @@
|
||||
From 2610446cf4c76d44a74d94fa15381925711f5f97 Mon Sep 17 00:00:00 2001
|
||||
From 91ae28555ff89b9aecc14f821cff5744be225ff8 Mon Sep 17 00:00:00 2001
|
||||
From: Da Xue <da@libre.computer>
|
||||
Date: Tue, 8 Aug 2023 01:00:15 -0400
|
||||
Subject: [PATCH 46/58] WIP: net: phy: meson-gxl: implement
|
||||
Subject: [PATCH 43/53] WIP: net: phy: meson-gxl: implement
|
||||
meson_gxl_phy_resume()
|
||||
|
||||
While testing the suspend/resume functionality, we found the ethernet
|
||||
@ -25,7 +25,7 @@ Signed-off-by: Luke Lu <luke.lu@libre.computer>
|
||||
1 file changed, 16 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
|
||||
index bb9b33b6bce2..9ebe09b0cd8c 100644
|
||||
index 962ebbbc1348..55f281202fd4 100644
|
||||
--- a/drivers/net/phy/meson-gxl.c
|
||||
+++ b/drivers/net/phy/meson-gxl.c
|
||||
@@ -132,6 +132,21 @@ static int meson_gxl_config_init(struct phy_device *phydev)
|
@ -1,7 +1,7 @@
|
||||
From 61d4d8fc7505b56e6b6fff1da6867783c4147151 Mon Sep 17 00:00:00 2001
|
||||
From 538cca691167d4a225ebbbfbca11f7e4f5a3de4a Mon Sep 17 00:00:00 2001
|
||||
From: Dongjin Kim <tobetter@gmail.com>
|
||||
Date: Thu, 10 Sep 2020 11:01:33 +0900
|
||||
Subject: [PATCH 47/58] WIP: drm/meson: add support for 2560x1440 resolution
|
||||
Subject: [PATCH 44/53] WIP: drm/meson: add support for 2560x1440 resolution
|
||||
output
|
||||
|
||||
Add support for Quad HD (QHD) 2560x1440 resolution output. Timings
|
||||
@ -16,10 +16,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
2 files changed, 20 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index 2a942dc6a6dc..c7a98da6b1ce 100644
|
||||
index 3325580d885d..ce165c9587d7 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -357,6 +357,8 @@ enum {
|
||||
@@ -360,6 +360,8 @@ enum {
|
||||
MESON_VCLK_HDMI_594000,
|
||||
/* 2970 /1 /1 /1 /5 /1 => /1 /2 */
|
||||
MESON_VCLK_HDMI_594000_YUV420,
|
||||
@ -28,7 +28,7 @@ index 2a942dc6a6dc..c7a98da6b1ce 100644
|
||||
};
|
||||
|
||||
struct meson_vclk_params {
|
||||
@@ -467,6 +469,18 @@ struct meson_vclk_params {
|
||||
@@ -470,6 +472,18 @@ struct meson_vclk_params {
|
||||
.vid_pll_div = VID_PLL_DIV_5,
|
||||
.vclk_div = 1,
|
||||
},
|
||||
@ -47,7 +47,7 @@ index 2a942dc6a6dc..c7a98da6b1ce 100644
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
@@ -873,6 +887,10 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq,
|
||||
@@ -879,6 +893,10 @@ static void meson_vclk_set(struct meson_drm *priv,
|
||||
m = 0xf7;
|
||||
frac = vic_alternate_clock ? 0x8148 : 0x10000;
|
||||
break;
|
@ -1,7 +1,7 @@
|
||||
From e96a3e445695907574977ed7eabab53a617e0dd8 Mon Sep 17 00:00:00 2001
|
||||
From 93a7c586594e03c1cd45ce029586fdaf1088be8f Mon Sep 17 00:00:00 2001
|
||||
From: Luke Lu <luke.lu@libre.computer>
|
||||
Date: Mon, 21 Aug 2023 10:50:04 +0000
|
||||
Subject: [PATCH 48/58] WIP: drm/meson: do setup after resumption to fix hdmi
|
||||
Subject: [PATCH 45/53] WIP: drm/meson: do setup after resumption to fix hdmi
|
||||
output
|
||||
|
||||
Some HDMI displays connected to gxl-based boards go black after
|
||||
@ -18,7 +18,7 @@ Signed-off-by: Luke Lu <luke.lu@libre.computer>
|
||||
3 files changed, 9 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 0031f3c54882..189a9abe2035 100644
|
||||
index 996733ed2c00..7d6543fef353 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -2378,7 +2378,7 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
|
||||
@ -50,10 +50,10 @@ index 0031f3c54882..189a9abe2035 100644
|
||||
static void dw_hdmi_update_power(struct dw_hdmi *hdmi)
|
||||
{
|
||||
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
index 5565f7777529..eaee6e750550 100644
|
||||
index 0d7c68b29dff..8460c93d74cb 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
@@ -823,6 +823,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
|
||||
@@ -809,6 +809,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
|
||||
meson_dw_hdmi->data->top_write(meson_dw_hdmi,
|
||||
HDMITX_TOP_SW_RESET, 0);
|
||||
|
||||
@ -62,7 +62,7 @@ index 5565f7777529..eaee6e750550 100644
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -835,6 +837,7 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
|
||||
@@ -821,6 +823,7 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
|
||||
|
||||
meson_dw_hdmi_init(meson_dw_hdmi);
|
||||
|
@ -1,46 +0,0 @@
|
||||
From 71e505c40e0c57bf296d749666087d3d26305ef8 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Sun, 17 Feb 2019 22:14:38 +0000
|
||||
Subject: [PATCH 45/58] WIP: mmc: core: set initial signal voltage on power off
|
||||
|
||||
Some boards have SD card connectors where the power rail cannot be switched
|
||||
off by the driver. If the card has not been power cycled, it may still be
|
||||
using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling
|
||||
will fail to boot from a UHS card that continue to use 1.8V signaling.
|
||||
|
||||
Set initial signal voltage in mmc_power_off() to allow re-boot to function.
|
||||
|
||||
This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288),
|
||||
same issue have been seen on some Rockchip RK3399 boards.
|
||||
|
||||
I am sending this as a RFC because I have no insights into SD/MMC subsystem,
|
||||
this change fix a re-boot issue on my boards and does not break emmc/sdio.
|
||||
Is this an acceptable workaround? Any advice is appreciated.
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
---
|
||||
drivers/mmc/core/core.c | 8 ++++++++
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
|
||||
index 327029f5c59b..5ac10a847630 100644
|
||||
--- a/drivers/mmc/core/core.c
|
||||
+++ b/drivers/mmc/core/core.c
|
||||
@@ -1368,6 +1368,14 @@ void mmc_power_off(struct mmc_host *host)
|
||||
if (host->ios.power_mode == MMC_POWER_OFF)
|
||||
return;
|
||||
|
||||
+ mmc_set_initial_signal_voltage(host);
|
||||
+
|
||||
+ /*
|
||||
+ * This delay should be sufficient to allow the power supply
|
||||
+ * to reach the minimum voltage.
|
||||
+ */
|
||||
+ mmc_delay(host->ios.power_delay_ms);
|
||||
+
|
||||
mmc_pwrseq_power_off(host);
|
||||
|
||||
host->ios.clock = 0;
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,7 +1,7 @@
|
||||
From 8d9cb36fc74da909c1514a89b319c95b9253055c Mon Sep 17 00:00:00 2001
|
||||
From eeaee862f75804c9ce3784efc473e25ada398a0e Mon Sep 17 00:00:00 2001
|
||||
From: Luke Lu <luke.lu@libre.computer>
|
||||
Date: Wed, 13 Dec 2023 03:47:44 +0000
|
||||
Subject: [PATCH 49/58] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
|
||||
Subject: [PATCH 46/53] WIP: drm/meson: poweron/off dw_hdmi only if dw_hdmi
|
||||
enabled
|
||||
|
||||
dw_hdmi_poweron() assumes that hdmi->curr_conn is valid. Calling
|
||||
@ -19,10 +19,10 @@ dw_hdmi is enabled.
|
||||
3 files changed, 12 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 189a9abe2035..c4a60be40603 100644
|
||||
index 7d6543fef353..8e94de2fa532 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -3642,6 +3642,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi)
|
||||
@@ -3645,6 +3645,12 @@ void dw_hdmi_resume(struct dw_hdmi *hdmi)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(dw_hdmi_resume);
|
||||
|
||||
@ -36,10 +36,10 @@ index 189a9abe2035..c4a60be40603 100644
|
||||
MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
|
||||
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
|
||||
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
index eaee6e750550..a91cedbeed3d 100644
|
||||
index 8460c93d74cb..c44ed72a1155 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
|
||||
@@ -823,7 +823,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
|
||||
@@ -809,7 +809,8 @@ static int __maybe_unused meson_dw_hdmi_pm_suspend(struct device *dev)
|
||||
meson_dw_hdmi->data->top_write(meson_dw_hdmi,
|
||||
HDMITX_TOP_SW_RESET, 0);
|
||||
|
||||
@ -49,7 +49,7 @@ index eaee6e750550..a91cedbeed3d 100644
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -837,7 +838,9 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
|
||||
@@ -823,7 +824,9 @@ static int __maybe_unused meson_dw_hdmi_pm_resume(struct device *dev)
|
||||
|
||||
meson_dw_hdmi_init(meson_dw_hdmi);
|
||||
|
@ -1,7 +1,7 @@
|
||||
From c94221d0abeae2820c328dd90bdf58260b3db2de Mon Sep 17 00:00:00 2001
|
||||
From 5ccf7bfa59e8b0eb43282ae496648f25bb0220d1 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:09:12 +0000
|
||||
Subject: [PATCH 50/58] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
Subject: [PATCH 47/53] WIP: arm64: dts: meson: set p212/p23x/q20x SDIO to
|
||||
100MHz
|
||||
|
||||
Amlogic datasheets describe 50MHz max-frequency for SDIO on GXL/GXM but
|
@ -1,7 +1,7 @@
|
||||
From a3f4bebd2d4ea458ecb4ce61435ab100b7fa25b4 Mon Sep 17 00:00:00 2001
|
||||
From e79b340acba76cac9cc30d74f736934d67349657 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 18 Jan 2022 15:18:32 +0000
|
||||
Subject: [PATCH 51/58] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
Subject: [PATCH 48/53] WIP: arm64: dts: meson: remove SDIO node from Khadas
|
||||
VIM1
|
||||
|
||||
Now that SDIO 100MHz max-frequency is inherited from the p212 dtsi we
|
@ -1,7 +1,7 @@
|
||||
From e4f842f8844f4e1b936b304624d29dc3298de563 Mon Sep 17 00:00:00 2001
|
||||
From c7d8fd9b653f357b6c8fa10126bcd50a9c1a2504 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Wed, 19 Jan 2022 06:45:06 +0000
|
||||
Subject: [PATCH 52/58] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
Subject: [PATCH 49/53] WIP: arm64: dts: meson: add UHS SDIO capabilities to
|
||||
p212/p23x/q20x
|
||||
|
||||
Add UHS capabilities to the SDIO node to enable 100MHz speeds.
|
@ -1,7 +1,7 @@
|
||||
From d5b9ce9ddd25fb5c578f510730c03144a0e421e6 Mon Sep 17 00:00:00 2001
|
||||
From 5a279aa776957fd34c69b17102402f30db5f589f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 09:59:58 +0000
|
||||
Subject: [PATCH 53/58] WIP: dt-bindings: arm: amlogic: add support for Tanix
|
||||
Subject: [PATCH 50/53] WIP: dt-bindings: arm: amlogic: add support for Tanix
|
||||
TX9 Pro
|
||||
|
||||
The Oranth Tanix TX9 Pro is an Android STB using the Amlogic S912 chip
|
@ -1,7 +1,7 @@
|
||||
From fb49a89b26b637997b16b598365b62df33e2fa07 Mon Sep 17 00:00:00 2001
|
||||
From 2bf7b1b2ce42510ba84ba3b22a78cc0f72b4b033 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:01:14 +0000
|
||||
Subject: [PATCH 54/58] WIP: arm64: dts: meson: add initial device-tree for
|
||||
Subject: [PATCH 51/53] WIP: arm64: dts: meson: add initial device-tree for
|
||||
Tanix TX9 Pro
|
||||
|
||||
Oranth Tanix TX9 Pro is based on the Amlogic Q200 reference design with
|
@ -1,7 +1,7 @@
|
||||
From ef8df69654666b8cc1335ee609bc01c04f606eb9 Mon Sep 17 00:00:00 2001
|
||||
From ab3e08d71ff989e3b1369e5ce518834f2793d63a Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Thu, 9 Feb 2023 10:11:39 +0000
|
||||
Subject: [PATCH 55/58] WIP: arm64: dts: meson: add 7-segment display to Tanix
|
||||
Subject: [PATCH 52/53] WIP: arm64: dts: meson: add 7-segment display to Tanix
|
||||
TX9 Pro
|
||||
|
||||
Add support for the 7-segment VFD display of the device
|
@ -0,0 +1,52 @@
|
||||
From bcacd41042e57e3783771b19608519fae7c3a3bd Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Mon, 27 Jan 2025 17:52:10 +0000
|
||||
Subject: [PATCH 53/53] WIP: drm/panfrost: fix power transition timeout
|
||||
warnings (again)
|
||||
|
||||
*** THIS IS NOT PROVEN ***
|
||||
|
||||
Commit 2bd02f5a0bac ("drm/panfrost: fix power transition timeout warnings")
|
||||
increased the timeout value from 1000ms to 2000ms but in recent kernels the
|
||||
messages started to spam the system log again. Increasing timeout values to
|
||||
the arbitrary value of 3000ms stops the noise and hopefully adds a little
|
||||
headroom so further increases aren't required in the future.
|
||||
|
||||
[0] https://patchwork.kernel.org/project/dri-devel/patch/20240322164525.2617508-1-christianshewitt@gmail.com/
|
||||
|
||||
Fixes: 22aa1a209018 ("drm/panfrost: Really power off GPU cores in panfrost_gpu_power_off()")
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/panfrost/panfrost_gpu.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
index 174e190ba40f..eb99d0d5584e 100644
|
||||
--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
@@ -456,19 +456,19 @@ void panfrost_gpu_power_off(struct panfrost_device *pfdev)
|
||||
|
||||
gpu_write(pfdev, SHADER_PWROFF_LO, pfdev->features.shader_present);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_PWRTRANS_LO,
|
||||
- val, !val, 1, 2000);
|
||||
+ val, !val, 1, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "shader power transition timeout");
|
||||
|
||||
gpu_write(pfdev, TILER_PWROFF_LO, pfdev->features.tiler_present);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_PWRTRANS_LO,
|
||||
- val, !val, 1, 2000);
|
||||
+ val, !val, 1, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "tiler power transition timeout");
|
||||
|
||||
gpu_write(pfdev, L2_PWROFF_LO, pfdev->features.l2_present);
|
||||
ret = readl_poll_timeout(pfdev->iomem + L2_PWRTRANS_LO,
|
||||
- val, !val, 0, 2000);
|
||||
+ val, !val, 0, 3000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "l2 power transition timeout");
|
||||
}
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,127 +0,0 @@
|
||||
From 67f0f159e9a9393f783191bc7e23a5514bf0836f Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Sat, 4 Jan 2025 23:53:19 +0000
|
||||
Subject: [PATCH 57/58] WIP: drm/meson: vclk: fix precision in vclk
|
||||
calculations
|
||||
|
||||
Playing YUV420 @ 29.97 or 59.94 media causes HDMI output to
|
||||
lose sync with a fatal error reported:
|
||||
|
||||
[ 89.610280] Fatal Error, invalid HDMI vclk freq 593406
|
||||
|
||||
In meson_encoder_hdmi_set_vclk the initial vclk_freq value is
|
||||
593407 (correct) but YUV420 modes halve the value to 296703.5
|
||||
and this is stored as int which loses precision by rounding
|
||||
down to 296703. The rounded value is later doubled to 593406
|
||||
resulting in meson_encoder_hdmi_set_vclk setting an invalid
|
||||
value for vclk_freq and triggering the fatal error.
|
||||
|
||||
Correct the initial loss of precision by switching to unsigned
|
||||
long long instead of int. However, as other areas of code are
|
||||
still dependent on int calculations we need to fixup phy_freq
|
||||
when YUV420 @ 29.97 or 59.94 modes are used.
|
||||
|
||||
Fixes: e5fab2ec9ca4 ("drm/meson: vclk: add support for YUV420 setup")
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 46 ++++++++++++----------
|
||||
1 file changed, 26 insertions(+), 20 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
index 0593a1cde906..2046a71477fd 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
@@ -70,12 +70,12 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
{
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = mode->clock * 1000ULL;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
|
||||
@@ -85,8 +85,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
phy_freq = vclk_freq * 10;
|
||||
|
||||
if (!vic) {
|
||||
- meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
|
||||
- vclk_freq, vclk_freq, vclk_freq, false);
|
||||
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq / 1000ULL,
|
||||
+ vclk_freq / 1000ULL, vclk_freq / 1000ULL,
|
||||
+ vclk_freq / 1000ULL, false);
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -107,12 +108,15 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
|
||||
- phy_freq, vclk_freq, venc_freq, hdmi_freq,
|
||||
- priv->venc.hdmi_use_enci);
|
||||
+ /* Correct phy_freq for YUV420 @ 29.97 or 59.94 */
|
||||
+ /* FIXME find a better way to do this */
|
||||
+ if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
|
||||
+ phy_freq == 2967035000)
|
||||
+ phy_freq -= 5000ULL;
|
||||
|
||||
- meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
|
||||
- venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
|
||||
+ meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
|
||||
+ vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
|
||||
+ priv->venc.hdmi_use_enci);
|
||||
}
|
||||
|
||||
static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
|
||||
@@ -122,10 +126,10 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
|
||||
struct meson_drm *priv = encoder_hdmi->priv;
|
||||
bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
|
||||
- unsigned int phy_freq;
|
||||
- unsigned int vclk_freq;
|
||||
- unsigned int venc_freq;
|
||||
- unsigned int hdmi_freq;
|
||||
+ unsigned long long vclk_freq;
|
||||
+ unsigned long long phy_freq;
|
||||
+ unsigned long long venc_freq;
|
||||
+ unsigned long long hdmi_freq;
|
||||
int vic = drm_match_cea_mode(mode);
|
||||
enum drm_mode_status status;
|
||||
|
||||
@@ -149,7 +153,7 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
} else if (!meson_venc_hdmi_supported_vic(vic))
|
||||
return MODE_BAD;
|
||||
|
||||
- vclk_freq = mode->clock;
|
||||
+ vclk_freq = mode->clock * 1000ULL;
|
||||
|
||||
/* For 420, pixel clock is half unlike venc clock */
|
||||
if (drm_mode_is_420_only(display_info, mode) ||
|
||||
@@ -179,10 +183,12 @@ static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bri
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
||||
venc_freq /= 2;
|
||||
|
||||
- dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
|
||||
- __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
|
||||
+ dev_dbg(priv->dev, "%s: phy=%lld vclk=%lld venc=%lld hdmi=%lld\n",
|
||||
+ __func__, phy_freq / 1000ULL, vclk_freq / 1000ULL,
|
||||
+ venc_freq / 1000ULL, hdmi_freq / 1000ULL);
|
||||
|
||||
- return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
|
||||
+ return meson_vclk_vic_supported_freq(priv, phy_freq / 1000ULL,
|
||||
+ vclk_freq / 1000ULL);
|
||||
}
|
||||
|
||||
static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,45 +0,0 @@
|
||||
From 63d4c5e16a8c8c725d3c20b3b0d7710812307c17 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 10 Jan 2025 01:48:49 +0000
|
||||
Subject: [PATCH 58/58] fixup!
|
||||
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 6 +++---
|
||||
drivers/gpu/drm/meson/meson_vclk.c | 3 ++-
|
||||
2 files changed, 5 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/meson/meson_encoder_hdmi.c b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
index 2046a71477fd..40431f912a4a 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_encoder_hdmi.c
|
||||
@@ -110,9 +110,9 @@ static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
|
||||
|
||||
/* Correct phy_freq for YUV420 @ 29.97 or 59.94 */
|
||||
/* FIXME find a better way to do this */
|
||||
- if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
|
||||
- phy_freq == 2967035000)
|
||||
- phy_freq -= 5000ULL;
|
||||
+ //if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24 &&
|
||||
+ // phy_freq == 2967035000)
|
||||
+ // phy_freq -= 5000ULL;
|
||||
|
||||
meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq / 1000ULL,
|
||||
vclk_freq / 1000ULL, venc_freq / 1000ULL, hdmi_freq / 1000ULL,
|
||||
diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
index eb4c251d79b7..35884fd4ba1c 100644
|
||||
--- a/drivers/gpu/drm/meson/meson_vclk.c
|
||||
+++ b/drivers/gpu/drm/meson/meson_vclk.c
|
||||
@@ -1088,7 +1088,8 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target,
|
||||
|
||||
for (freq = 0 ; params[freq].pixel_freq ; ++freq) {
|
||||
if ((phy_freq == params[freq].phy_freq ||
|
||||
- phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10 ||
|
||||
+ ((phy_freq/10)*10) == FREQ_1000_1001(params[freq].phy_freq/10)*10) &&
|
||||
(vclk_freq == params[freq].vclk_freq ||
|
||||
vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) {
|
||||
if (vclk_freq != params[freq].vclk_freq)
|
||||
--
|
||||
2.34.1
|
||||
|
@ -1,15 +1,15 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# Linux/arm64 6.12.9 Kernel Configuration
|
||||
# Linux/arm64 6.14.2 Kernel Configuration
|
||||
#
|
||||
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
|
||||
CONFIG_CC_IS_GCC=y
|
||||
CONFIG_GCC_VERSION=140200
|
||||
CONFIG_CLANG_VERSION=0
|
||||
CONFIG_AS_IS_GNU=y
|
||||
CONFIG_AS_VERSION=24301
|
||||
CONFIG_AS_VERSION=24400
|
||||
CONFIG_LD_IS_BFD=y
|
||||
CONFIG_LD_VERSION=24301
|
||||
CONFIG_LD_VERSION=24400
|
||||
CONFIG_LLD_VERSION=0
|
||||
CONFIG_RUSTC_VERSION=0
|
||||
CONFIG_RUSTC_LLVM_VERSION=0
|
||||
@ -64,6 +64,7 @@ CONFIG_IRQ_MSI_IOMMU=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
# CONFIG_GENERIC_IRQ_DEBUGFS is not set
|
||||
CONFIG_GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD=y
|
||||
# end of IRQ subsystem
|
||||
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
@ -172,6 +173,7 @@ CONFIG_CFS_BANDWIDTH=y
|
||||
CONFIG_SCHED_MM_CID=y
|
||||
CONFIG_CGROUP_PIDS=y
|
||||
CONFIG_CGROUP_RDMA=y
|
||||
# CONFIG_CGROUP_DMEM is not set
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_CPUSETS=y
|
||||
# CONFIG_CPUSETS_V1 is not set
|
||||
@ -305,6 +307,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
|
||||
# CONFIG_ARCH_BCM is not set
|
||||
# CONFIG_ARCH_BERLIN is not set
|
||||
# CONFIG_ARCH_BITMAIN is not set
|
||||
# CONFIG_ARCH_BLAIZE is not set
|
||||
# CONFIG_ARCH_EXYNOS is not set
|
||||
# CONFIG_ARCH_SPARX5 is not set
|
||||
# CONFIG_ARCH_K3 is not set
|
||||
@ -499,13 +502,22 @@ CONFIG_ARM64_AS_HAS_MTE=y
|
||||
# CONFIG_ARM64_EPAN is not set
|
||||
# end of ARMv8.7 architectural features
|
||||
|
||||
CONFIG_AS_HAS_MOPS=y
|
||||
|
||||
#
|
||||
# ARMv8.9 architectural features
|
||||
#
|
||||
# CONFIG_ARM64_POE is not set
|
||||
CONFIG_ARCH_PKEY_BITS=3
|
||||
CONFIG_ARM64_HAFT=y
|
||||
# end of ARMv8.9 architectural features
|
||||
|
||||
#
|
||||
# v9.4 architectural features
|
||||
#
|
||||
# CONFIG_ARM64_GCS is not set
|
||||
# end of v9.4 architectural features
|
||||
|
||||
CONFIG_ARM64_SVE=y
|
||||
CONFIG_ARM64_PSEUDO_NMI=y
|
||||
# CONFIG_ARM64_DEBUG_PRIORITY_MASKING is not set
|
||||
@ -597,6 +609,7 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
# CPU frequency scaling drivers
|
||||
#
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
# CONFIG_CPUFREQ_VIRT is not set
|
||||
CONFIG_CPUFREQ_DT_PLATDEV=y
|
||||
CONFIG_ARM_SCPI_CPUFREQ=y
|
||||
# end of CPU Frequency scaling
|
||||
@ -617,7 +630,6 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_IOREMAP_PROT=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
|
||||
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
|
||||
CONFIG_HAVE_NMI=y
|
||||
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
||||
@ -713,6 +725,7 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
||||
CONFIG_ARCH_HAS_RELR=y
|
||||
CONFIG_RELR=y
|
||||
CONFIG_ARCH_HAS_MEM_ENCRYPT=y
|
||||
CONFIG_ARCH_HAS_CC_PLATFORM=y
|
||||
CONFIG_HAVE_PREEMPT_DYNAMIC=y
|
||||
CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y
|
||||
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
|
||||
@ -720,6 +733,7 @@ CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y
|
||||
CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y
|
||||
CONFIG_ARCH_HAS_HW_PTE_YOUNG=y
|
||||
CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y
|
||||
CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y
|
||||
|
||||
#
|
||||
@ -795,6 +809,7 @@ CONFIG_LDM_PARTITION=y
|
||||
CONFIG_EFI_PARTITION=y
|
||||
# CONFIG_SYSV68_PARTITION is not set
|
||||
# CONFIG_CMDLINE_PARTITION is not set
|
||||
# CONFIG_OF_PARTITION is not set
|
||||
# end of Partition Types
|
||||
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
@ -1017,6 +1032,7 @@ CONFIG_XFRM_USER=y
|
||||
# CONFIG_XFRM_STATISTICS is not set
|
||||
CONFIG_XFRM_ESP=y
|
||||
# CONFIG_NET_KEY is not set
|
||||
# CONFIG_XFRM_IPTFS is not set
|
||||
# CONFIG_XDP_SOCKETS is not set
|
||||
CONFIG_NET_HANDSHAKE=y
|
||||
CONFIG_INET=y
|
||||
@ -1326,6 +1342,7 @@ CONFIG_IP_NF_MANGLE=m
|
||||
# CONFIG_IP_NF_TARGET_ECN is not set
|
||||
# CONFIG_IP_NF_TARGET_TTL is not set
|
||||
CONFIG_IP_NF_RAW=m
|
||||
# CONFIG_IP_NF_ARPTABLES is not set
|
||||
# CONFIG_IP_NF_ARPFILTER is not set
|
||||
# end of IP: Netfilter Configuration
|
||||
|
||||
@ -1362,6 +1379,7 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m
|
||||
|
||||
CONFIG_NF_DEFRAG_IPV6=m
|
||||
# CONFIG_NF_CONNTRACK_BRIDGE is not set
|
||||
# CONFIG_BRIDGE_NF_EBTABLES_LEGACY is not set
|
||||
# CONFIG_BRIDGE_NF_EBTABLES is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
@ -1483,7 +1501,7 @@ CONFIG_BT_LE_L2CAP_ECRED=y
|
||||
# CONFIG_BT_LEDS is not set
|
||||
# CONFIG_BT_MSFTEXT is not set
|
||||
# CONFIG_BT_AOSPEXT is not set
|
||||
# CONFIG_BT_DEBUGFS is not set
|
||||
CONFIG_BT_DEBUGFS=y
|
||||
# CONFIG_BT_SELFTEST is not set
|
||||
|
||||
#
|
||||
@ -1515,7 +1533,7 @@ CONFIG_BT_HCIUART_RTL=y
|
||||
CONFIG_BT_HCIUART_QCA=y
|
||||
# CONFIG_BT_HCIUART_AG6XX is not set
|
||||
# CONFIG_BT_HCIUART_MRVL is not set
|
||||
# CONFIG_BT_HCIUART_AML is not set
|
||||
CONFIG_BT_HCIUART_AML=y
|
||||
# CONFIG_BT_HCIBCM203X is not set
|
||||
# CONFIG_BT_HCIBCM4377 is not set
|
||||
# CONFIG_BT_HCIBPA10X is not set
|
||||
@ -1535,10 +1553,8 @@ CONFIG_STREAM_PARSER=y
|
||||
# CONFIG_MCTP is not set
|
||||
CONFIG_FIB_RULES=y
|
||||
CONFIG_WIRELESS=y
|
||||
CONFIG_WIRELESS_EXT=y
|
||||
CONFIG_WEXT_CORE=y
|
||||
CONFIG_WEXT_PROC=y
|
||||
CONFIG_WEXT_PRIV=y
|
||||
CONFIG_CFG80211=m
|
||||
# CONFIG_NL80211_TESTMODE is not set
|
||||
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
|
||||
@ -1549,8 +1565,6 @@ CONFIG_CFG80211_DEFAULT_PS=y
|
||||
# CONFIG_CFG80211_DEBUGFS is not set
|
||||
# CONFIG_CFG80211_CRDA_SUPPORT is not set
|
||||
CONFIG_CFG80211_WEXT=y
|
||||
CONFIG_LIB80211=m
|
||||
# CONFIG_LIB80211_DEBUG is not set
|
||||
CONFIG_MAC80211=m
|
||||
CONFIG_MAC80211_HAS_RC=y
|
||||
CONFIG_MAC80211_RC_MINSTREL=y
|
||||
@ -1605,6 +1619,7 @@ CONFIG_PCI_QUIRKS=y
|
||||
# CONFIG_PCI_NPEM is not set
|
||||
# CONFIG_PCI_PRI is not set
|
||||
# CONFIG_PCI_PASID is not set
|
||||
# CONFIG_PCIE_TPH is not set
|
||||
# CONFIG_PCI_DYNAMIC_OF_NODES is not set
|
||||
# CONFIG_PCIE_BUS_TUNE_OFF is not set
|
||||
CONFIG_PCIE_BUS_DEFAULT=y
|
||||
@ -1675,6 +1690,7 @@ CONFIG_PCI_MESON=y
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_AUXILIARY_BUS=y
|
||||
# CONFIG_UEVENT_HELPER is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
@ -1746,7 +1762,6 @@ CONFIG_ARM_SCPI_PROTOCOL=y
|
||||
# CONFIG_FW_CFG_SYSFS is not set
|
||||
# CONFIG_ARM_FFA_TRANSPORT is not set
|
||||
# CONFIG_GOOGLE_FIRMWARE is not set
|
||||
# CONFIG_IMX_SCMI_MISC_DRV is not set
|
||||
CONFIG_MESON_SM=y
|
||||
CONFIG_MESON_GX_PM=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
@ -1935,7 +1950,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
# CONFIG_XILINX_SDFEC is not set
|
||||
# CONFIG_HISI_HIKEY_USB is not set
|
||||
# CONFIG_OPEN_DICE is not set
|
||||
# CONFIG_NTSYNC is not set
|
||||
# CONFIG_VCPU_STALL_DETECTOR is not set
|
||||
# CONFIG_MCHP_LAN966X_PCI is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
@ -1944,20 +1961,13 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_EEPROM_AT24=m
|
||||
# CONFIG_EEPROM_AT25 is not set
|
||||
# CONFIG_EEPROM_MAX6875 is not set
|
||||
CONFIG_EEPROM_93CX6=m
|
||||
CONFIG_EEPROM_93CX6=y
|
||||
# CONFIG_EEPROM_93XX46 is not set
|
||||
# CONFIG_EEPROM_IDT_89HPESX is not set
|
||||
# CONFIG_EEPROM_EE1004 is not set
|
||||
# end of EEPROM support
|
||||
|
||||
# CONFIG_CB710_CORE is not set
|
||||
|
||||
#
|
||||
# Texas Instruments shared transport line discipline
|
||||
#
|
||||
# CONFIG_TI_ST is not set
|
||||
# end of Texas Instruments shared transport line discipline
|
||||
|
||||
# CONFIG_SENSORS_LIS3_SPI is not set
|
||||
# CONFIG_SENSORS_LIS3_I2C is not set
|
||||
# CONFIG_ALTERA_STAPL is not set
|
||||
@ -2283,7 +2293,6 @@ CONFIG_NET_VENDOR_ASIX=y
|
||||
# CONFIG_NET_VENDOR_NVIDIA is not set
|
||||
# CONFIG_NET_VENDOR_OKI is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_OA_TC6 is not set
|
||||
# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
|
||||
# CONFIG_NET_VENDOR_PENSANDO is not set
|
||||
# CONFIG_NET_VENDOR_QLOGIC is not set
|
||||
@ -2377,6 +2386,7 @@ CONFIG_MICROSEMI_PHY=y
|
||||
# CONFIG_QCA807X_PHY is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_REALTEK_PHY_HWMON=y
|
||||
# CONFIG_RENESAS_PHY is not set
|
||||
# CONFIG_ROCKCHIP_PHY is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
@ -2681,6 +2691,7 @@ CONFIG_RTW88_8821AU=m
|
||||
CONFIG_RTW88_8812AU=m
|
||||
# CONFIG_RTW88_DEBUG is not set
|
||||
# CONFIG_RTW88_DEBUGFS is not set
|
||||
CONFIG_RTW88_LEDS=y
|
||||
# CONFIG_RTW89 is not set
|
||||
CONFIG_WLAN_VENDOR_RSI=y
|
||||
# CONFIG_RSI_91X is not set
|
||||
@ -2724,7 +2735,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_INPUT_JOYDEV=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
@ -2849,7 +2859,7 @@ CONFIG_RMI4_F11=y
|
||||
CONFIG_RMI4_F12=y
|
||||
CONFIG_RMI4_F30=y
|
||||
# CONFIG_RMI4_F34 is not set
|
||||
# CONFIG_RMI4_F3A is not set
|
||||
CONFIG_RMI4_F3A=y
|
||||
# CONFIG_RMI4_F54 is not set
|
||||
# CONFIG_RMI4_F55 is not set
|
||||
|
||||
@ -3129,10 +3139,7 @@ CONFIG_PPS=y
|
||||
# CONFIG_PPS_CLIENT_KTIMER is not set
|
||||
# CONFIG_PPS_CLIENT_LDISC is not set
|
||||
# CONFIG_PPS_CLIENT_GPIO is not set
|
||||
|
||||
#
|
||||
# PPS generators support
|
||||
#
|
||||
# CONFIG_PPS_GENERATOR is not set
|
||||
|
||||
#
|
||||
# PTP clock support
|
||||
@ -3201,6 +3208,7 @@ CONFIG_GPIO_GENERIC_PLATFORM=y
|
||||
# CONFIG_GPIO_LOGICVC is not set
|
||||
# CONFIG_GPIO_MB86S7X is not set
|
||||
# CONFIG_GPIO_PL061 is not set
|
||||
# CONFIG_GPIO_POLARFIRE_SOC is not set
|
||||
# CONFIG_GPIO_SIFIVE is not set
|
||||
# CONFIG_GPIO_SYSCON is not set
|
||||
# CONFIG_GPIO_XGENE is not set
|
||||
@ -3252,6 +3260,7 @@ CONFIG_GPIO_PCA953X=m
|
||||
#
|
||||
# USB GPIO expanders
|
||||
#
|
||||
# CONFIG_GPIO_MPSSE is not set
|
||||
# end of USB GPIO expanders
|
||||
|
||||
#
|
||||
@ -3380,6 +3389,7 @@ CONFIG_SENSORS_GPIO_FAN=m
|
||||
# CONFIG_SENSORS_HIH6130 is not set
|
||||
# CONFIG_SENSORS_HS3001 is not set
|
||||
# CONFIG_SENSORS_IIO_HWMON is not set
|
||||
# CONFIG_SENSORS_ISL28022 is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_JC42 is not set
|
||||
# CONFIG_SENSORS_POWERZ is not set
|
||||
@ -3442,6 +3452,7 @@ CONFIG_SENSORS_GPIO_FAN=m
|
||||
# CONFIG_SENSORS_NCT6683 is not set
|
||||
# CONFIG_SENSORS_NCT6775 is not set
|
||||
# CONFIG_SENSORS_NCT6775_I2C is not set
|
||||
# CONFIG_SENSORS_NCT7363 is not set
|
||||
# CONFIG_SENSORS_NCT7802 is not set
|
||||
# CONFIG_SENSORS_NCT7904 is not set
|
||||
# CONFIG_SENSORS_NPCM7XX is not set
|
||||
@ -3720,6 +3731,7 @@ CONFIG_MFD_KHADAS_MCU=m
|
||||
# CONFIG_MFD_CS40L50_SPI is not set
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
# CONFIG_MFD_INTEL_M10_BMC_SPI is not set
|
||||
# CONFIG_MFD_QNAP_MCU is not set
|
||||
# CONFIG_MFD_RSMU_I2C is not set
|
||||
# CONFIG_MFD_RSMU_SPI is not set
|
||||
# end of Multifunction device drivers
|
||||
@ -4094,6 +4106,7 @@ CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
|
||||
#
|
||||
# Raspberry Pi media platform drivers
|
||||
#
|
||||
# CONFIG_VIDEO_RP1_CFE is not set
|
||||
|
||||
#
|
||||
# Renesas media platform drivers
|
||||
@ -4553,14 +4566,28 @@ CONFIG_DRM_KMS_HELPER=y
|
||||
# CONFIG_DRM_PANIC is not set
|
||||
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
|
||||
CONFIG_DRM_DEBUG_MODESET_LOCK=y
|
||||
CONFIG_DRM_CLIENT=y
|
||||
CONFIG_DRM_CLIENT_LIB=y
|
||||
CONFIG_DRM_CLIENT_SELECTION=y
|
||||
CONFIG_DRM_CLIENT_SETUP=y
|
||||
|
||||
#
|
||||
# Supported DRM clients
|
||||
#
|
||||
CONFIG_DRM_FBDEV_EMULATION=y
|
||||
CONFIG_DRM_FBDEV_OVERALLOC=100
|
||||
# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
|
||||
# CONFIG_DRM_CLIENT_LOG is not set
|
||||
CONFIG_DRM_CLIENT_DEFAULT_FBDEV=y
|
||||
CONFIG_DRM_CLIENT_DEFAULT="fbdev"
|
||||
# end of Supported DRM clients
|
||||
|
||||
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
|
||||
CONFIG_DRM_DISPLAY_HELPER=y
|
||||
CONFIG_DRM_BRIDGE_CONNECTOR=y
|
||||
# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set
|
||||
# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set
|
||||
CONFIG_DRM_DISPLAY_HDMI_AUDIO_HELPER=y
|
||||
CONFIG_DRM_DISPLAY_HDMI_HELPER=y
|
||||
CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y
|
||||
CONFIG_DRM_EXEC=m
|
||||
@ -4663,6 +4690,9 @@ CONFIG_DRM_PANEL=y
|
||||
# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set
|
||||
# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set
|
||||
# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set
|
||||
@ -4672,6 +4702,7 @@ CONFIG_DRM_PANEL=y
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
|
||||
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
|
||||
@ -4712,6 +4743,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
|
||||
# CONFIG_DRM_CHIPONE_ICN6211 is not set
|
||||
# CONFIG_DRM_CHRONTEL_CH7033 is not set
|
||||
CONFIG_DRM_DISPLAY_CONNECTOR=y
|
||||
# CONFIG_DRM_ITE_IT6263 is not set
|
||||
# CONFIG_DRM_ITE_IT6505 is not set
|
||||
# CONFIG_DRM_LONTIUM_LT8912B is not set
|
||||
# CONFIG_DRM_LONTIUM_LT9211 is not set
|
||||
@ -4736,6 +4768,7 @@ CONFIG_DRM_DISPLAY_CONNECTOR=y
|
||||
# CONFIG_DRM_TOSHIBA_TC358768 is not set
|
||||
# CONFIG_DRM_TOSHIBA_TC358775 is not set
|
||||
# CONFIG_DRM_TI_DLPC3433 is not set
|
||||
# CONFIG_DRM_TI_TDP158 is not set
|
||||
# CONFIG_DRM_TI_TFP410 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI83 is not set
|
||||
# CONFIG_DRM_TI_SN65DSI86 is not set
|
||||
@ -4775,6 +4808,7 @@ CONFIG_DRM_MESON_DW_MIPI_DSI=y
|
||||
# CONFIG_TINYDRM_ILI9486 is not set
|
||||
# CONFIG_TINYDRM_MI0283QT is not set
|
||||
# CONFIG_TINYDRM_REPAPER is not set
|
||||
# CONFIG_TINYDRM_SHARP_MEMORY is not set
|
||||
# CONFIG_TINYDRM_ST7586 is not set
|
||||
# CONFIG_TINYDRM_ST7735R is not set
|
||||
# CONFIG_DRM_PL111 is not set
|
||||
@ -4971,6 +5005,12 @@ CONFIG_SND_SOC=y
|
||||
|
||||
# CONFIG_SND_SOC_CHV3_I2S is not set
|
||||
# CONFIG_SND_I2S_HI6210_I2S is not set
|
||||
|
||||
#
|
||||
# SoC Audio for Loongson CPUs
|
||||
#
|
||||
# end of SoC Audio for Loongson CPUs
|
||||
|
||||
# CONFIG_SND_SOC_IMG is not set
|
||||
# CONFIG_SND_SOC_MTK_BTCVSD is not set
|
||||
|
||||
@ -4997,6 +5037,7 @@ CONFIG_SND_MESON_G12A_TOHDMITX=y
|
||||
CONFIG_SND_SOC_MESON_T9015=y
|
||||
# end of ASoC support for Amlogic platforms
|
||||
|
||||
CONFIG_SND_SOC_SDCA_OPTIONAL=y
|
||||
# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
|
||||
|
||||
#
|
||||
@ -5016,6 +5057,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
# CONFIG_SND_SOC_AC97_CODEC is not set
|
||||
# CONFIG_SND_SOC_ADAU1372_I2C is not set
|
||||
# CONFIG_SND_SOC_ADAU1372_SPI is not set
|
||||
# CONFIG_SND_SOC_ADAU1373 is not set
|
||||
# CONFIG_SND_SOC_ADAU1701 is not set
|
||||
# CONFIG_SND_SOC_ADAU1761_I2C is not set
|
||||
# CONFIG_SND_SOC_ADAU1761_SPI is not set
|
||||
@ -5037,6 +5079,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
# CONFIG_SND_SOC_AW8738 is not set
|
||||
# CONFIG_SND_SOC_AW88395 is not set
|
||||
# CONFIG_SND_SOC_AW88261 is not set
|
||||
# CONFIG_SND_SOC_AW88081 is not set
|
||||
# CONFIG_SND_SOC_AW87390 is not set
|
||||
# CONFIG_SND_SOC_AW88399 is not set
|
||||
# CONFIG_SND_SOC_BD28623 is not set
|
||||
@ -5059,6 +5102,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
# CONFIG_SND_SOC_CS42L56 is not set
|
||||
# CONFIG_SND_SOC_CS42L73 is not set
|
||||
# CONFIG_SND_SOC_CS42L83 is not set
|
||||
# CONFIG_SND_SOC_CS42L84 is not set
|
||||
# CONFIG_SND_SOC_CS4234 is not set
|
||||
# CONFIG_SND_SOC_CS4265 is not set
|
||||
# CONFIG_SND_SOC_CS4270 is not set
|
||||
@ -5078,6 +5122,7 @@ CONFIG_SND_SOC_ES7134=y
|
||||
# CONFIG_SND_SOC_ES7241 is not set
|
||||
# CONFIG_SND_SOC_ES8311 is not set
|
||||
# CONFIG_SND_SOC_ES8316 is not set
|
||||
# CONFIG_SND_SOC_ES8323 is not set
|
||||
# CONFIG_SND_SOC_ES8326 is not set
|
||||
CONFIG_SND_SOC_ES8328=y
|
||||
CONFIG_SND_SOC_ES8328_I2C=y
|
||||
@ -5126,6 +5171,7 @@ CONFIG_SND_SOC_PCM512x_I2C=m
|
||||
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y
|
||||
# CONFIG_SND_SOC_SIMPLE_MUX is not set
|
||||
# CONFIG_SND_SOC_SMA1303 is not set
|
||||
# CONFIG_SND_SOC_SMA1307 is not set
|
||||
CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_SRC4XXX_I2C is not set
|
||||
# CONFIG_SND_SOC_SSM2305 is not set
|
||||
@ -5164,6 +5210,7 @@ CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_TSCS42XX is not set
|
||||
# CONFIG_SND_SOC_TSCS454 is not set
|
||||
# CONFIG_SND_SOC_UDA1334 is not set
|
||||
# CONFIG_SND_SOC_UDA1342 is not set
|
||||
# CONFIG_SND_SOC_WM8510 is not set
|
||||
# CONFIG_SND_SOC_WM8523 is not set
|
||||
# CONFIG_SND_SOC_WM8524 is not set
|
||||
@ -5202,6 +5249,8 @@ CONFIG_SND_SOC_SPDIF=y
|
||||
# CONFIG_SND_SOC_NAU8821 is not set
|
||||
# CONFIG_SND_SOC_NAU8822 is not set
|
||||
# CONFIG_SND_SOC_NAU8824 is not set
|
||||
# CONFIG_SND_SOC_NTP8918 is not set
|
||||
# CONFIG_SND_SOC_NTP8835 is not set
|
||||
# CONFIG_SND_SOC_TPA6130A2 is not set
|
||||
# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set
|
||||
# CONFIG_SND_SOC_LPASS_VA_MACRO is not set
|
||||
@ -5263,6 +5312,7 @@ CONFIG_HID_EZKEY=y
|
||||
# CONFIG_HID_GT683R is not set
|
||||
# CONFIG_HID_KEYTOUCH is not set
|
||||
CONFIG_HID_KYE=y
|
||||
# CONFIG_HID_KYSONA is not set
|
||||
# CONFIG_HID_UCLOGIC is not set
|
||||
# CONFIG_HID_WALTOP is not set
|
||||
# CONFIG_HID_VIEWSONIC is not set
|
||||
@ -5276,7 +5326,6 @@ CONFIG_HID_TWINHAN=y
|
||||
CONFIG_HID_KENSINGTON=y
|
||||
# CONFIG_HID_LCPOWER is not set
|
||||
# CONFIG_HID_LED is not set
|
||||
CONFIG_HID_LENOVO=y
|
||||
# CONFIG_HID_LETSKETCH is not set
|
||||
CONFIG_HID_LOGITECH=y
|
||||
CONFIG_HID_LOGITECH_DJ=y
|
||||
@ -5351,6 +5400,8 @@ CONFIG_HID_ZYDACRON=y
|
||||
#
|
||||
# end of HID-BPF support
|
||||
|
||||
# CONFIG_I2C_HID is not set
|
||||
|
||||
#
|
||||
# USB HID support
|
||||
#
|
||||
@ -5359,7 +5410,6 @@ CONFIG_USB_HID=y
|
||||
CONFIG_USB_HIDDEV=y
|
||||
# end of USB HID support
|
||||
|
||||
# CONFIG_I2C_HID is not set
|
||||
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_COMMON=y
|
||||
@ -5418,11 +5468,7 @@ CONFIG_USB_WDM=m
|
||||
# CONFIG_USB_TMC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
|
||||
#
|
||||
|
||||
#
|
||||
# also be needed; see USB_STORAGE Help for more info
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info
|
||||
#
|
||||
CONFIG_USB_STORAGE=y
|
||||
# CONFIG_USB_STORAGE_DEBUG is not set
|
||||
@ -5561,7 +5607,7 @@ CONFIG_USB_SERIAL_PL2303=m
|
||||
# CONFIG_USB_HSIC_USB4604 is not set
|
||||
# CONFIG_USB_LINK_LAYER_TEST is not set
|
||||
# CONFIG_USB_CHAOSKEY is not set
|
||||
# CONFIG_USB_ONBOARD_DEV is not set
|
||||
CONFIG_USB_ONBOARD_DEV=y
|
||||
|
||||
#
|
||||
# USB Physical Layer drivers
|
||||
@ -5646,6 +5692,7 @@ CONFIG_TYPEC_UCSI=m
|
||||
# CONFIG_TYPEC_MUX_IT5205 is not set
|
||||
# CONFIG_TYPEC_MUX_NB7VPQ904M is not set
|
||||
# CONFIG_TYPEC_MUX_PTN36502 is not set
|
||||
# CONFIG_TYPEC_MUX_TUSB1046 is not set
|
||||
# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set
|
||||
# end of USB Type-C Multiplexer/DeMultiplexer Switch support
|
||||
|
||||
@ -5653,6 +5700,7 @@ CONFIG_TYPEC_UCSI=m
|
||||
# USB Type-C Alternate Mode drivers
|
||||
#
|
||||
# CONFIG_TYPEC_DP_ALTMODE is not set
|
||||
# CONFIG_TYPEC_TBT_ALTMODE is not set
|
||||
# end of USB Type-C Alternate Mode drivers
|
||||
|
||||
CONFIG_USB_ROLE_SWITCH=y
|
||||
@ -5713,6 +5761,7 @@ CONFIG_LEDS_GPIO=y
|
||||
# CONFIG_LEDS_LP50XX is not set
|
||||
# CONFIG_LEDS_LP55XX_COMMON is not set
|
||||
# CONFIG_LEDS_LP8860 is not set
|
||||
# CONFIG_LEDS_LP8864 is not set
|
||||
# CONFIG_LEDS_PCA955X is not set
|
||||
# CONFIG_LEDS_PCA963X is not set
|
||||
# CONFIG_LEDS_PCA995X is not set
|
||||
@ -5737,6 +5786,7 @@ CONFIG_LEDS_SYSCON=y
|
||||
# CONFIG_LEDS_USER is not set
|
||||
# CONFIG_LEDS_SPI_BYTE is not set
|
||||
# CONFIG_LEDS_LM3697 is not set
|
||||
# CONFIG_LEDS_ST1202 is not set
|
||||
|
||||
#
|
||||
# Flash and Torch LED drivers
|
||||
@ -5909,6 +5959,7 @@ CONFIG_RTC_DRV_PL031=y
|
||||
# HID Sensor RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_GOLDFISH is not set
|
||||
CONFIG_RTC_DRV_AMLOGIC_A4=y
|
||||
# CONFIG_DMADEVICES is not set
|
||||
|
||||
#
|
||||
@ -5941,16 +5992,7 @@ CONFIG_DMABUF_HEAPS_CMA=y
|
||||
# CONFIG_GREYBUS is not set
|
||||
# CONFIG_COMEDI is not set
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_RTLLIB=m
|
||||
CONFIG_RTLLIB_CRYPTO_CCMP=m
|
||||
CONFIG_RTLLIB_CRYPTO_TKIP=m
|
||||
CONFIG_RTLLIB_CRYPTO_WEP=m
|
||||
# CONFIG_RTL8192E is not set
|
||||
CONFIG_RTL8723BS=m
|
||||
CONFIG_R8712U=m
|
||||
# CONFIG_RTS5208 is not set
|
||||
# CONFIG_VT6655 is not set
|
||||
# CONFIG_VT6656 is not set
|
||||
|
||||
#
|
||||
# IIO staging drivers
|
||||
@ -5999,14 +6041,12 @@ CONFIG_VIDEO_MESON_VDEC=m
|
||||
# StarFive media platform drivers
|
||||
#
|
||||
# CONFIG_STAGING_MEDIA_DEPRECATED is not set
|
||||
# CONFIG_LTE_GDM724X is not set
|
||||
# CONFIG_FB_TFT is not set
|
||||
# CONFIG_XIL_AXIS_FIFO is not set
|
||||
# CONFIG_FIELDBUS_DEV is not set
|
||||
# CONFIG_VME_BUS is not set
|
||||
# CONFIG_GPIB is not set
|
||||
# CONFIG_GOLDFISH is not set
|
||||
# CONFIG_CHROME_PLATFORMS is not set
|
||||
# CONFIG_CZNIC_PLATFORMS is not set
|
||||
# CONFIG_MELLANOX_PLATFORM is not set
|
||||
# CONFIG_SURFACE_PLATFORMS is not set
|
||||
CONFIG_ARM64_PLATFORM_DEVICES=y
|
||||
@ -6337,8 +6377,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_AD7476 is not set
|
||||
# CONFIG_AD7606_IFACE_PARALLEL is not set
|
||||
# CONFIG_AD7606_IFACE_SPI is not set
|
||||
# CONFIG_AD7625 is not set
|
||||
# CONFIG_AD7766 is not set
|
||||
# CONFIG_AD7768_1 is not set
|
||||
# CONFIG_AD7779 is not set
|
||||
# CONFIG_AD7780 is not set
|
||||
# CONFIG_AD7791 is not set
|
||||
# CONFIG_AD7793 is not set
|
||||
@ -6350,6 +6392,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
|
||||
# CONFIG_AD9467 is not set
|
||||
# CONFIG_CC10001_ADC is not set
|
||||
# CONFIG_ENVELOPE_DETECTOR is not set
|
||||
# CONFIG_GEHC_PMC_ADC is not set
|
||||
# CONFIG_HI8435 is not set
|
||||
# CONFIG_HX711 is not set
|
||||
# CONFIG_INA2XX_ADC is not set
|
||||
@ -6472,6 +6515,7 @@ CONFIG_MESON_SARADC=y
|
||||
#
|
||||
# Digital to analog converters
|
||||
#
|
||||
# CONFIG_AD3552R_HS is not set
|
||||
# CONFIG_AD3552R is not set
|
||||
# CONFIG_AD5064 is not set
|
||||
# CONFIG_AD5360 is not set
|
||||
@ -6496,7 +6540,9 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_AD5791 is not set
|
||||
# CONFIG_AD7293 is not set
|
||||
# CONFIG_AD7303 is not set
|
||||
# CONFIG_AD8460 is not set
|
||||
# CONFIG_AD8801 is not set
|
||||
# CONFIG_BD79703 is not set
|
||||
# CONFIG_DPOT_DAC is not set
|
||||
# CONFIG_DS4424 is not set
|
||||
# CONFIG_LTC1660 is not set
|
||||
@ -6606,6 +6652,8 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_ADIS16480 is not set
|
||||
# CONFIG_BMI160_I2C is not set
|
||||
# CONFIG_BMI160_SPI is not set
|
||||
# CONFIG_BMI270_I2C is not set
|
||||
# CONFIG_BMI270_SPI is not set
|
||||
# CONFIG_BMI323_I2C is not set
|
||||
# CONFIG_BMI323_SPI is not set
|
||||
# CONFIG_BOSCH_BNO055_SERIAL is not set
|
||||
@ -6617,6 +6665,7 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_INV_ICM42600_SPI is not set
|
||||
# CONFIG_INV_MPU6050_I2C is not set
|
||||
# CONFIG_INV_MPU6050_SPI is not set
|
||||
# CONFIG_SMI240 is not set
|
||||
# CONFIG_IIO_ST_LSM6DSX is not set
|
||||
# CONFIG_IIO_ST_LSM9DS0 is not set
|
||||
# end of Inertial measurement units
|
||||
@ -6647,7 +6696,6 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_ISL29125 is not set
|
||||
# CONFIG_ISL76682 is not set
|
||||
# CONFIG_JSA1212 is not set
|
||||
# CONFIG_ROHM_BU27008 is not set
|
||||
# CONFIG_ROHM_BU27034 is not set
|
||||
# CONFIG_RPR0521 is not set
|
||||
# CONFIG_LTR390 is not set
|
||||
@ -6659,6 +6707,7 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_NOA1305 is not set
|
||||
# CONFIG_OPT3001 is not set
|
||||
# CONFIG_OPT4001 is not set
|
||||
# CONFIG_OPT4060 is not set
|
||||
# CONFIG_PA12203001 is not set
|
||||
# CONFIG_SI1133 is not set
|
||||
# CONFIG_SI1145 is not set
|
||||
@ -6674,6 +6723,7 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_US5182D is not set
|
||||
# CONFIG_VCNL4000 is not set
|
||||
# CONFIG_VCNL4035 is not set
|
||||
# CONFIG_VEML3235 is not set
|
||||
# CONFIG_VEML6030 is not set
|
||||
# CONFIG_VEML6040 is not set
|
||||
# CONFIG_VEML6070 is not set
|
||||
@ -6689,6 +6739,7 @@ CONFIG_MESON_SARADC=y
|
||||
# CONFIG_AK8974 is not set
|
||||
# CONFIG_AK8975 is not set
|
||||
# CONFIG_AK09911 is not set
|
||||
# CONFIG_ALS31300 is not set
|
||||
# CONFIG_BMC150_MAGN_I2C is not set
|
||||
# CONFIG_BMC150_MAGN_SPI is not set
|
||||
# CONFIG_MAG3110 is not set
|
||||
@ -6849,7 +6900,6 @@ CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_IRQ_MSI_LIB=y
|
||||
# CONFIG_AL_FIC is not set
|
||||
# CONFIG_LAN966X_OIC is not set
|
||||
# CONFIG_XILINX_INTC is not set
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_MESON_IRQ_GPIO=y
|
||||
@ -6858,11 +6908,13 @@ CONFIG_MESON_IRQ_GPIO=y
|
||||
# CONFIG_IPACK_BUS is not set
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
# CONFIG_RESET_GPIO is not set
|
||||
CONFIG_RESET_MESON=y
|
||||
CONFIG_RESET_MESON_AUDIO_ARB=y
|
||||
# CONFIG_RESET_SIMPLE is not set
|
||||
# CONFIG_RESET_TI_SYSCON is not set
|
||||
# CONFIG_RESET_TI_TPS380X is not set
|
||||
CONFIG_RESET_MESON_COMMON=y
|
||||
CONFIG_RESET_MESON=y
|
||||
CONFIG_RESET_MESON_AUX=y
|
||||
CONFIG_RESET_MESON_AUDIO_ARB=y
|
||||
|
||||
#
|
||||
# PHY Subsystem
|
||||
@ -6870,6 +6922,7 @@ CONFIG_RESET_MESON_AUDIO_ARB=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PHY_MIPI_DPHY=y
|
||||
# CONFIG_PHY_CAN_TRANSCEIVER is not set
|
||||
# CONFIG_PHY_NXP_PTN3222 is not set
|
||||
CONFIG_PHY_MESON8B_USB2=y
|
||||
CONFIG_PHY_MESON_GXL_USB2=y
|
||||
CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG=y
|
||||
@ -7003,7 +7056,6 @@ CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_JBD2=y
|
||||
# CONFIG_JBD2_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
CONFIG_JFS_FS=m
|
||||
# CONFIG_JFS_POSIX_ACL is not set
|
||||
# CONFIG_JFS_SECURITY is not set
|
||||
@ -7025,6 +7077,7 @@ CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
|
||||
# CONFIG_BTRFS_DEBUG is not set
|
||||
# CONFIG_BTRFS_ASSERT is not set
|
||||
# CONFIG_BTRFS_EXPERIMENTAL is not set
|
||||
# CONFIG_BTRFS_FS_REF_VERIFY is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_F2FS_FS=m
|
||||
@ -7046,12 +7099,14 @@ CONFIG_FSNOTIFY=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
CONFIG_FANOTIFY=y
|
||||
# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
# CONFIG_CUSE is not set
|
||||
# CONFIG_VIRTIO_FS is not set
|
||||
CONFIG_FUSE_PASSTHROUGH=y
|
||||
CONFIG_FUSE_IO_URING=y
|
||||
CONFIG_OVERLAY_FS=m
|
||||
# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
|
||||
CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
|
||||
@ -7406,7 +7461,6 @@ CONFIG_CRYPTO_CTR=y
|
||||
CONFIG_CRYPTO_CTS=m
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
# CONFIG_CRYPTO_HCTR2 is not set
|
||||
# CONFIG_CRYPTO_KEYWRAP is not set
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
@ -7446,7 +7500,6 @@ CONFIG_CRYPTO_SHA3=y
|
||||
CONFIG_CRYPTO_SM3=y
|
||||
# CONFIG_CRYPTO_SM3_GENERIC is not set
|
||||
# CONFIG_CRYPTO_STREEBOG is not set
|
||||
# CONFIG_CRYPTO_VMAC is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
CONFIG_CRYPTO_XXHASH=y
|
||||
@ -7528,7 +7581,6 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=y
|
||||
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set
|
||||
# CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set
|
||||
CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y
|
||||
# end of Accelerated Cryptographic Algorithms for CPU (arm64)
|
||||
|
||||
CONFIG_CRYPTO_HW=y
|
||||
@ -7617,19 +7669,19 @@ CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRC_CCITT=m
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_ARCH_HAS_CRC_T10DIF=y
|
||||
CONFIG_CRC_T10DIF_ARCH=y
|
||||
CONFIG_CRC64_ROCKSOFT=y
|
||||
CONFIG_CRC_ITU_T=y
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_CRC32_SELFTEST is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
# CONFIG_CRC32_SLICEBY4 is not set
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
# CONFIG_CRC32_BIT is not set
|
||||
CONFIG_ARCH_HAS_CRC32=y
|
||||
CONFIG_CRC32_ARCH=y
|
||||
CONFIG_CRC64=y
|
||||
# CONFIG_CRC4 is not set
|
||||
CONFIG_CRC7=y
|
||||
CONFIG_LIBCRC32C=m
|
||||
# CONFIG_CRC8 is not set
|
||||
CONFIG_CRC_OPTIMIZATIONS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
# CONFIG_RANDOM32_SELFTEST is not set
|
||||
@ -7669,6 +7721,7 @@ CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
|
||||
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
|
||||
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
|
||||
CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y
|
||||
CONFIG_SWIOTLB=y
|
||||
# CONFIG_SWIOTLB_DYNAMIC is not set
|
||||
CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
|
||||
@ -7731,6 +7784,7 @@ CONFIG_SBITMAP=y
|
||||
|
||||
CONFIG_GENERIC_IOREMAP=y
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
CONFIG_UNION_FIND=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
@ -7802,6 +7856,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y
|
||||
# CONFIG_NET_DEV_REFCNT_TRACKER is not set
|
||||
# CONFIG_NET_NS_REFCNT_TRACKER is not set
|
||||
# CONFIG_DEBUG_NET is not set
|
||||
# CONFIG_DEBUG_NET_SMALL_RTNL is not set
|
||||
# end of Networking Debugging
|
||||
|
||||
#
|
||||
@ -7922,7 +7977,8 @@ CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
|
||||
CONFIG_USER_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y
|
||||
CONFIG_HAVE_FTRACE_GRAPH_FUNC=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
|
@ -1,4 +1,4 @@
|
||||
From 78eead46137ff5583414211fae5c983026310dda Mon Sep 17 00:00:00 2001
|
||||
From f9ed5a1383237e7f8142d24227b82d2e95abdd76 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Fri, 13 Nov 2020 02:09:36 +0000
|
||||
Subject: [PATCH 1/2] LOCAL: configs: meson64: prevent stdout/stderr on
|
||||
|
@ -1,11 +1,14 @@
|
||||
From 5778cfc64913abc8c80160bb709ec359362fc8ac Mon Sep 17 00:00:00 2001
|
||||
From c1ea5300b2ab0a1cdf5b89989971834555ee2302 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Date: Tue, 8 Oct 2024 06:48:13 +0000
|
||||
Subject: [PATCH 2/2] TESTING: test uart_ao_a_pins bias disable on Odroid C2
|
||||
and WeTek Hub
|
||||
Subject: [PATCH 2/2] LOCAL: test uart_ao_a_pins bias disable on Odroid C2 and
|
||||
WeTek Hub
|
||||
|
||||
This appears to resolve the reports of non-booting C2 boards. No feedback
|
||||
on WeTek Hub yet.
|
||||
This resolves reports of non-booting C2 boards. The long term fix
|
||||
is [0] which is merged for Linux 6.16 and will appear in u-boot
|
||||
with a future upstream device-tree sync.
|
||||
|
||||
[0] https://patchwork.kernel.org/project/linux-amlogic/cover/20250329185855.854186-1-martin.blumenstingl@googlemail.com/
|
||||
|
||||
Suggested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
|
Loading…
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Reference in New Issue
Block a user