linux: bump Amlogic 6.12.y kernel and patches

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>

packages/linux/package.mk

@@ -16,8 +16,8 @@ PKG_PATCH_DIRS="${LINUX}"
 
 case "${LINUX}" in
   amlogic)
-    PKG_VERSION="adc218676eef25575469234709c2d87185ca223a" # 6.12.0
+    PKG_VERSION="47edb26c8ed9dd1877f8623ee1cd3b998874ca65" # 6.12.3
-    PKG_SHA256="8787cc90ca7740ab7c955b6fad83010dc600f14a6d94511b548703e4f0f40caa"
+    PKG_SHA256="400f47b06a05798b215842950baf918439c0e2f026f71160bd5d547b6ac10edb"
     PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
     PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
     PKG_PATCH_DIRS="default rtlwifi/after-6.12"

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0001-LOCAL-set-meson-gx-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From ae45bee318f2e099ad18653f7fba72c68013823d Mon Sep 17 00:00:00 2001
+From 2d2fade84ccde0cd0675b66a1924a6196caea2ba Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:41:51 +0000
-Subject: [PATCH 01/36] LOCAL: set meson-gx cma pool to 896MB
+Subject: [PATCH 01/33] LOCAL: set meson-gx cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0002-LOCAL-set-meson-g12-cma-pool-to-896MB.patch

@@ -1,7 +1,7 @@
-From 289e538ffbb00ad95b8825ac42bc310809022a3f Mon Sep 17 00:00:00 2001
+From 9aa18b4f2b73b028999f2ce89728e294f2debc78 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Wed, 14 Aug 2019 19:58:14 +0000
-Subject: [PATCH 02/36] LOCAL: set meson-g12 cma pool to 896MB
+Subject: [PATCH 02/33] LOCAL: set meson-g12 cma pool to 896MB
 
 This change sets the CMA pool to a larger 896MB! value for vdec use
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0003-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch

@@ -1,7 +1,7 @@
-From d4874464291f301cadc008da9dd592c12395ea17 Mon Sep 17 00:00:00 2001
+From 8d06b6fbce75e0dba5467c8fd74ee90a07d4827e Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 13 Apr 2019 05:45:18 +0000
-Subject: [PATCH 03/36] LOCAL: arm64: fix Kodi sysinfo CPU information
+Subject: [PATCH 03/33] LOCAL: arm64: fix Kodi sysinfo CPU information
 
 This allows the CPU information to show in the Kodi sysinfo screen, e.g.
 

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0004-LOCAL-arm64-meson-add-Amlogic-Meson-GX-PM-Suspend.patch

@@ -1,7 +1,7 @@
-From 0c5d37a5f6ad2281f71c66a8acffef2c2a67b6c2 Mon Sep 17 00:00:00 2001
+From 8a00f12605bfd2696598a833fa1f9ae688a99393 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:23 +0100
-Subject: [PATCH 04/36] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
+Subject: [PATCH 04/33] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
 
 The Amlogic Meson GX SoCs uses a non-standard argument to the
 PSCI CPU_SUSPEND call to enter system suspend.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0005-LOCAL-arm64-dts-meson-add-support-for-GX-PM-and-Virt.patch

@@ -1,7 +1,7 @@
-From 86ffbbed967edf0974ca3c242faaa3c38ceed7c3 Mon Sep 17 00:00:00 2001
+From f506a68611749da1f4b1077d68c3fd70209f5860 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Thu, 3 Nov 2016 15:29:25 +0100
-Subject: [PATCH 05/36] LOCAL: arm64: dts: meson: add support for GX PM and
+Subject: [PATCH 05/33] LOCAL: arm64: dts: meson: add support for GX PM and
  Virtual RTC
 
 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0006-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From 7ae256c16de158201ec34e0ec7bacc24d713c7af Mon Sep 17 00:00:00 2001
+From f7b53f20f3a4e123abebb4ca1f18e80b50ae0243 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 21 Jan 2021 01:35:36 +0000
-Subject: [PATCH 06/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 06/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0007-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Khadas.patch

@@ -1,7 +1,7 @@
-From ba73f621cfb1ad3ce4cea6ecee4ed641bdb5e111 Mon Sep 17 00:00:00 2001
+From 624dc7572e32231bad189e0b79b5f54f6c977fc7 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sat, 6 Nov 2021 13:01:08 +0000
-Subject: [PATCH 07/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
+Subject: [PATCH 07/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
  Khadas VIM2
 
 Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0008-LOCAL-arm64-dts-meson-add-rtc-vrtc-aliases-to-Minix-.patch

@@ -1,7 +1,7 @@
-From 03f2673869392a11ec941acd4408a4bbcebff1db Mon Sep 17 00:00:00 2001
+From 44820e5d97f27b5a829766320e3d161d4a0db8fb Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Mon, 1 Feb 2021 19:27:40 +0000
-Subject: [PATCH 08/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
+Subject: [PATCH 08/33] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
  NEO U9-H
 
 Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0009-LOCAL-ASoC-meson-assign-internal-PCM-chmap-ELD-IEC95.patch

@@ -1,7 +1,7 @@
-From 9097390dd2de048a9060d8161e3e63c3ef6fa60f Mon Sep 17 00:00:00 2001
+From da0908efcb33f719f74e8571759de877fffa8520 Mon Sep 17 00:00:00 2001
 From: Anssi Hannula <anssi.hannula@iki.fi>
 Date: Sun, 17 Apr 2022 04:37:48 +0000
-Subject: [PATCH 09/36] LOCAL: ASoC: meson: assign internal PCM
+Subject: [PATCH 09/33] LOCAL: ASoC: meson: assign internal PCM
  chmap/ELD/IEC958 kctls to device 0
 
 On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0010-LOCAL-media-meson-vdec-disable-MPEG1-MPEG2-hardware-.patch

@@ -1,7 +1,7 @@
-From 918be36f2c344001714de256962c4b69a489056c Mon Sep 17 00:00:00 2001
+From f9a06dc2af551e9c54c60b47262f7edadeceb023 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Thu, 5 Jan 2023 15:16:46 +0000
-Subject: [PATCH 10/36] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
+Subject: [PATCH 10/33] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
  decoding
 
 The MPEG1/2 decoder is broken and nobody has volunteered to poke

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0011-FROMGIT-6.13-ASoC-hdmi-codec-reorder-channel-allocat.patch

@@ -1,7 +1,7 @@
-From 79ca58ba94a4aeee71f24fe055a573655e175899 Mon Sep 17 00:00:00 2001
+From 7678776ab7b19cac0b232082deb01cee5a86f180 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Sun, 23 Dec 2018 02:24:38 +0100
-Subject: [PATCH 17/36] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
+Subject: [PATCH 11/33] FROMGIT(6.13): ASoC: hdmi-codec: reorder channel
  allocation list
 
 Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0012-FROMLIST-v5-dt-bindings-vendor-prefixes-Add-Titan-Mi.patch

@@ -1,7 +1,7 @@
-From 58a6cec25fbb39f025c7e8cd975688e35112c607 Mon Sep 17 00:00:00 2001
+From 19e7465b242ecc0c8cfaede20164295b6f660d34 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
 Date: Sun, 20 Feb 2022 08:23:12 +0000
-Subject: [PATCH 11/36] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
+Subject: [PATCH 12/33] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
  Micro Electronics
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
@@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 2 insertions(+)
 
 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-index b320a39de7fe..71fb54284813 100644
+index fbfce9b4ae6b..92fb517e3f94 100644
 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
 +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-@@ -1498,6 +1498,8 @@ patternProperties:
+@@ -1500,6 +1500,8 @@ patternProperties:
      description: Texas Instruments
    "^tianma,.*":
      description: Tianma Micro-electronics Co., Ltd.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0013-FROMLIST-v5-dt-bindings-auxdisplay-Add-Titan-Micro-E.patch

@@ -1,7 +1,7 @@
-From 0fe489a2679ea71eb7859f99a94c273869ba09a0 Mon Sep 17 00:00:00 2001
+From e46deeed69482ec684815f3a531cb8ad251fe142 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:24:47 +0000
-Subject: [PATCH 12/36] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
+Subject: [PATCH 13/33] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
  Electronics TM1628
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0014-FROMLIST-v5-docs-ABI-document-tm1628-attribute-displ.patch

@@ -1,7 +1,7 @@
-From 9fc13ae236cc61c72f144259f3514ea192903e60 Mon Sep 17 00:00:00 2001
+From 2a4d5208903d3665578367b6f7865a19f4e3f986 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Sun, 20 Feb 2022 08:26:27 +0000
-Subject: [PATCH 13/36] FROMLIST(v5): docs: ABI: document tm1628 attribute
+Subject: [PATCH 14/33] FROMLIST(v5): docs: ABI: document tm1628 attribute
  display-text
 
 Document the attribute for reading / writing the text to be displayed on

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0015-FROMLIST-v5-auxdisplay-add-support-for-Titanmec-TM16.patch

@@ -1,7 +1,7 @@
-From dd7b8586cedf32119a3a4b4a52765b6191afd80c Mon Sep 17 00:00:00 2001
+From c1711421b2572675ce9d5daae6ea74b553240599 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:51:20 +0000
-Subject: [PATCH 14/36] FROMLIST(v5): auxdisplay: add support for Titanmec
+Subject: [PATCH 15/33] FROMLIST(v5): auxdisplay: add support for Titanmec
  TM1628 7 segment display controller
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0016-FROMLIST-v5-arm64-dts-meson-gxl-s905w-tx3-mini-add-s.patch

@@ -1,7 +1,7 @@
-From 35862164f4c63a36e883477213603bcfc87ba0b1 Mon Sep 17 00:00:00 2001
+From 02c3bfc2944b0e2d90390319c2da2a5ccfc30231 Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:52:34 +0000
-Subject: [PATCH 15/36] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
+Subject: [PATCH 16/33] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
  support for the 7 segment display
 
 This patch adds support for the 7 segment display of the device.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0017-FROMLIST-v5-MAINTAINERS-Add-entry-for-tm1628-auxdisp.patch

@@ -1,7 +1,7 @@
-From fbf9c7c1eac2bf9835e53c08083bdadd26fb88fe Mon Sep 17 00:00:00 2001
+From 6a54c2089e7c40e29bcf7f0a916a6ac7fc476f6b Mon Sep 17 00:00:00 2001
 From: Heiner Kallweit <hkallweit1@gmail.com>
 Date: Mon, 4 Apr 2022 18:53:32 +0000
-Subject: [PATCH 16/36] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
+Subject: [PATCH 17/33] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
  auxdisplay driver
 
 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
@@ -10,7 +10,7 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
  1 file changed, 7 insertions(+)
 
 diff --git a/MAINTAINERS b/MAINTAINERS
-index b878ddc99f94..f919e8b59031 100644
+index 6bb4ec0c162a..b5477689538a 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -23342,6 +23342,13 @@ W:	http://sourceforge.net/projects/tlan/

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0018-FROMLIST-v1-media-meson-vdec-esparser-check-parsing-.patch

@@ -1,7 +1,7 @@
-From f021d970c15f2788feaa671e8220244fee84e4ac Mon Sep 17 00:00:00 2001
+From cdb6e254eb68d10a44fc95b6540f2cfe6f3d9773 Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <narmstrong@baylibre.com>
 Date: Mon, 22 Nov 2021 09:15:21 +0000
-Subject: [PATCH 18/36] FROMLIST(v1): media: meson: vdec: esparser: check
+Subject: [PATCH 18/33] FROMLIST(v1): media: meson: vdec: esparser: check
  parsing state with hardware write pointer
 
 Also check the hardware write pointer to check if ES Parser has stalled.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0019-FROMLIST-v2-media-meson-vdec-implement-10bit-bitstre.patch

@@ -1,7 +1,7 @@
-From 3e13f0b82b6caf37a09f20415eaf8c11d66b2ab3 Mon Sep 17 00:00:00 2001
+From 8fb47151a82295fef3997194419d0b5eee5bbda2 Mon Sep 17 00:00:00 2001
 From: Benjamin Roszak <benjamin545@gmail.com>
 Date: Mon, 23 Jan 2023 10:56:46 +0000
-Subject: [PATCH 19/36] FROMLIST(v2): media: meson: vdec: implement 10bit
+Subject: [PATCH 19/33] FROMLIST(v2): media: meson: vdec: implement 10bit
  bitstream handling
 
 In order to support 10bit bitstream decoding, buffers and MMU

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0020-FROMLIST-v2-media-meson-vdec-add-HEVC-decode-codec.patch

@@ -1,7 +1,7 @@
-From 4ee3045dcb983ae8128160ab43aa8e91e0ec036e Mon Sep 17 00:00:00 2001
+From 3de3422522f8108586a64a6975035573aa25e854 Mon Sep 17 00:00:00 2001
 From: Maxime Jourdan <mjourdan@baylibre.com>
 Date: Mon, 23 Jan 2023 11:07:04 +0000
-Subject: [PATCH 20/36] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
+Subject: [PATCH 20/33] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
 
 Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
 the common "HEVC" decoder driver.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0021-FROMLIST-v1-iio-adc-meson-fix-voltage-reference-sele.patch

@@ -1,7 +1,7 @@
-From ee2125dfba99a2c318e18e5a543c161f1c28fbe2 Mon Sep 17 00:00:00 2001
+From 56e84bec23b10cabde822270d302894606e4b713 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 23 Mar 2024 20:04:49 +0100
-Subject: [PATCH 21/36] FROMLIST(v1): iio: adc: meson: fix voltage reference
+Subject: [PATCH 21/33] FROMLIST(v1): iio: adc: meson: fix voltage reference
  selection field name typo
 
 The field should be called "vref_voltage", without a typo in the word

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0022-FROMLIST-v1-iio-adc-consistently-use-bool-and-enum-i.patch

@@ -1,7 +1,7 @@
-From 09a6c2226f02620606512467a4bbe021a4b27056 Mon Sep 17 00:00:00 2001
+From c1aabff59ea22fa738468c6d6b27529486220a3f Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 23 Mar 2024 20:30:02 +0100
-Subject: [PATCH 22/36] FROMLIST(v1): iio: adc: consistently use bool and enum
+Subject: [PATCH 22/33] FROMLIST(v1): iio: adc: consistently use bool and enum
  in struct meson_sar_adc_param
 
 Consistently use bool for any register bit that enables/disables

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0023-FROMLIST-v1-iio-adc-meson-simplify-MESON_SAR_ADC_REG.patch

@@ -1,7 +1,7 @@
-From aae5755ab09bbd51bef50e01976151fb63e46e2b Mon Sep 17 00:00:00 2001
+From 606148e3e5f9dde444493b5e4ba08875606f938c Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 23 Mar 2024 20:35:58 +0100
-Subject: [PATCH 23/36] FROMLIST(v1): iio: adc: meson: simplify
+Subject: [PATCH 23/33] FROMLIST(v1): iio: adc: meson: simplify
  MESON_SAR_ADC_REG11 register access
 
 Simply check the max_register value to decide whether

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0024-FROMLIST-v1-net-mdio-meson-gxl-set-28th-bit-in-eth_r.patch

@@ -1,7 +1,7 @@
-From 9856dc8263e2a07c78f90b61383e1181d3c59fbd Mon Sep 17 00:00:00 2001
+From 5e3029b2cb9d6ab605542073be21fa9800155dd4 Mon Sep 17 00:00:00 2001
 From: Da Xue <da@libre.computer>
 Date: Fri, 24 May 2024 15:17:37 +0000
-Subject: [PATCH 24/36] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
+Subject: [PATCH 24/33] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
  eth_reg2
 
 This bit is necessary to enable packets on the interface. Without this

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0025-FROMLIST-v1-dt-bindings-iio-adc-amlogic-meson-saradc.patch

@@ -1,7 +1,7 @@
-From da28daf44c2634a1af3fc1d25ba0650a44944cea Mon Sep 17 00:00:00 2001
+From 2576e48d539b38b0bd7dcdde8d6fac41976d3162 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 23 Mar 2024 20:38:59 +0100
-Subject: [PATCH 25/36] FROMLIST(v1): dt-bindings: iio: adc:
+Subject: [PATCH 25/33] FROMLIST(v1): dt-bindings: iio: adc:
  amlogic,meson-saradc: add GXLX SoC compatible
 
 Add support for the GXLX SoC. GXLX is very similar to GXL but has three

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0026-FROMLIST-v1-iio-adc-meson-add-support-for-the-GXLX-S.patch

@@ -1,7 +1,7 @@
-From 6cc6cb159d9268ad5e6a8943a8c6a2d0e716bee3 Mon Sep 17 00:00:00 2001
+From 6533ea8356b2834ebeb5093cfd13110cb01e0609 Mon Sep 17 00:00:00 2001
 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
 Date: Sat, 23 Mar 2024 20:44:41 +0100
-Subject: [PATCH 26/36] FROMLIST(v1): iio: adc: meson: add support for the GXLX
+Subject: [PATCH 26/33] FROMLIST(v1): iio: adc: meson: add support for the GXLX
  SoC
 
 The SARADC IP on GXLX is identical to the one found on GXL SoCs: except

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0027-FROMLIST-v1-dt-bindings-usb-dwc2-allow-device-sub-no.patch

@@ -1,7 +1,7 @@
-From e6a63f84d1e20b9949aff6d497dc8ae20b437247 Mon Sep 17 00:00:00 2001
+From b3a3dbc7608b4e8c96879b2322889543951c0dfe Mon Sep 17 00:00:00 2001
 From: Neil Armstrong <neil.armstrong@linaro.org>
 Date: Wed, 5 Jun 2024 11:15:11 +0200
-Subject: [PATCH 27/36] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
+Subject: [PATCH 27/33] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
  sub-nodes
 
 Allow the '#address-cells', '#size-cells' and subnodes as defined in

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v1-arm64-dts-meson-drop-broadcom-compatible.patch

@@ -0,0 +1,110 @@
+From feec73f837332b144afb16d137b407192bf8b938 Mon Sep 17 00:00:00 2001
+From: Christian Hewitt <christianshewitt@gmail.com>
+Date: Wed, 3 Jan 2024 03:14:06 +0000
+Subject: [PATCH 28/33] FROMLIST(v1): arm64: dts: meson: drop broadcom
+ compatible from reference board SDIO nodes
+
+Drop the Broadcom compatible and use a generic sdio identifier with the Amlogic
+reference boards. This allows a wider range of Android STB devices with QCA9377
+and RTL8189ES/FS chips to have working WiFi when booting from the reference dtb
+files. There is no observed impact on Broadcom devices.
+
+Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
+---
+ arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi      | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts  | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts  | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts        | 3 +--
+ arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts        | 3 +--
+ 6 files changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+index 52d57773a77f..1736bd2e96e2 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+@@ -178,9 +178,8 @@ &sd_emmc_a {
+ 	vmmc-supply = <&vddao_3v3>;
+ 	vqmmc-supply = <&vddio_boot>;
+ 
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
+index c1470416faad..7dffeb5931c9 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
+@@ -102,8 +102,7 @@ hdmi_tx_tmds_out: endpoint {
+ };
+ 
+ &sd_emmc_a {
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
+index 92c425d0259c..ff9145d49090 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p231.dts
+@@ -21,8 +21,7 @@ &ethmac {
+ };
+ 
+ &sd_emmc_a {
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+index 7e7dc87ede2d..b52a830efcce 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
+@@ -134,9 +134,8 @@ &sd_emmc_a {
+ 	vmmc-supply = <&vddao_3v3>;
+ 	vqmmc-supply = <&vddio_boot>;
+ 
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+ 
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+index d4858afa0e9c..feb31207773f 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+@@ -72,8 +72,7 @@ external_phy: ethernet-phy@0 {
+ };
+ 
+ &sd_emmc_a {
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
+index d02b80d77378..6c8bec1853ac 100644
+--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q201.dts
+@@ -21,8 +21,7 @@ &ethmac {
+ };
+ 
+ &sd_emmc_a {
+-	brcmf: wifi@1 {
++	sdio: wifi@1 {
+ 		reg = <1>;
+-		compatible = "brcm,bcm4329-fmac";
+ 	};
+ };
+-- 
+2.34.1
+

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0028-FROMLIST-v2-clk-Fix-the-CLK_IGNORE_UNUSED-failure-is.patch

@@ -1,128 +0,0 @@
-From 93814374289368acf352b85a98abfa2cce7f94ca Mon Sep 17 00:00:00 2001
-From: Chuan Liu <chuan.liu@amlogic.com>
-Date: Mon, 11 Nov 2024 11:37:01 +0800
-Subject: [PATCH 28/36] FROMLIST(v2): clk: Fix the CLK_IGNORE_UNUSED failure
- issue
-
-When the clk_disable_unused_subtree() function disables an unused clock,
-if CLK_OPS_PARENT_ENABLE is configured on the clock,
-clk_core_prepare_enable() and clk_core_disable_unprepare() are called
-directly, and these two functions do not determine CLK_IGNORE_UNUSED,
-This causes the clock to be disabled even if CLK_IGNORE_UNUSED is
-configured when clk_core_disable_unprepare() is called.
-
-Two new functions clk_disable_unprepare_unused() and
-clk_prepare_enable_unused() are added to resolve the preceding
-situation. The CLK_IGNORE_UNUSED judgment logic is added to these two
-functions. To prevent clock configuration CLK_IGNORE_UNUSED from
-possible failure.
-
-Fixes: a4b3518d146f ("clk: core: support clocks which requires parents
-enable (part 1)")
-Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
----
- drivers/clk/clk.c | 67 +++++++++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 65 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
-index d02451f951cf..6def76c30ce6 100644
---- a/drivers/clk/clk.c
-+++ b/drivers/clk/clk.c
-@@ -94,6 +94,7 @@ struct clk_core {
- 	struct hlist_node	debug_node;
- #endif
- 	struct kref		ref;
-+	bool			ignore_enabled;
- };
- 
- #define CREATE_TRACE_POINTS
-@@ -1479,6 +1480,68 @@ static void __init clk_unprepare_unused_subtree(struct clk_core *core)
- 	}
- }
- 
-+static void __init clk_disable_unprepare_unused(struct clk_core *core)
-+{
-+	unsigned long flags;
-+
-+	lockdep_assert_held(&prepare_lock);
-+
-+	if (!core)
-+		return;
-+
-+	if ((core->enable_count == 0) && core->ops->disable &&
-+	    !core->ignore_enabled) {
-+		flags = clk_enable_lock();
-+		core->ops->disable(core->hw);
-+		clk_enable_unlock(flags);
-+	}
-+
-+	if ((core->prepare_count == 0) && core->ops->unprepare &&
-+	    !core->ignore_enabled)
-+		core->ops->unprepare(core->hw);
-+
-+	core->ignore_enabled = false;
-+
-+	clk_disable_unprepare_unused(core->parent);
-+}
-+
-+static int __init clk_prepare_enable_unused(struct clk_core *core)
-+{
-+	int ret = 0;
-+	unsigned long flags;
-+
-+	lockdep_assert_held(&prepare_lock);
-+
-+	if (!core)
-+		return 0;
-+
-+	ret = clk_prepare_enable_unused(core->parent);
-+	if (ret)
-+		return ret;
-+
-+	if ((core->flags & CLK_IGNORE_UNUSED) && clk_core_is_enabled(core))
-+		core->ignore_enabled = true;
-+
-+	if ((core->prepare_count == 0) && core->ops->prepare) {
-+		ret = core->ops->prepare(core->hw);
-+		if (ret)
-+			goto disable_unprepare;
-+	}
-+
-+	if ((core->enable_count == 0) && core->ops->enable) {
-+		flags = clk_enable_lock();
-+		ret = core->ops->enable(core->hw);
-+		clk_enable_unlock(flags);
-+		if (ret)
-+			goto disable_unprepare;
-+	}
-+
-+	return 0;
-+disable_unprepare:
-+	clk_disable_unprepare_unused(core->parent);
-+	return ret;
-+}
-+
- static void __init clk_disable_unused_subtree(struct clk_core *core)
- {
- 	struct clk_core *child;
-@@ -1490,7 +1553,7 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
- 		clk_disable_unused_subtree(child);
- 
- 	if (core->flags & CLK_OPS_PARENT_ENABLE)
--		clk_core_prepare_enable(core->parent);
-+		clk_prepare_enable_unused(core->parent);
- 
- 	flags = clk_enable_lock();
- 
-@@ -1517,7 +1580,7 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
- unlock_out:
- 	clk_enable_unlock(flags);
- 	if (core->flags & CLK_OPS_PARENT_ENABLE)
--		clk_core_disable_unprepare(core->parent);
-+		clk_disable_unprepare_unused(core->parent);
- }
- 
- static bool clk_ignore_unused __initdata;
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-FROMLIST-v2-clk-meson-Fix-failure-of-glitch-free-mux.patch

@@ -1,266 +0,0 @@
-From 8039e002c8740fe1af9e979ed49f7262b9a774f3 Mon Sep 17 00:00:00 2001
-From: Chuan Liu <chuan.liu@amlogic.com>
-Date: Mon, 11 Nov 2024 11:37:02 +0800
-Subject: [PATCH 29/36] FROMLIST(v2): clk: meson: Fix failure of glitch-free
- mux switching
-
-glitch-free mux has two clock channels (channel 0 and channel 1) with
-the same configuration.Channel 0 of glitch-free mux is not only the
-clock source for the mux, but also the working clock for glitch free
-mux. Therefore, when glitch-free mux switches, it is necessary to ensure
-that channel 0 has a clock input, otherwise glitch free mux will not
-work and cannot switch to the target channel. So adding flag
-CLK_OPS_PARENT_ENABLE ensures that both channels 0 and 1 are enabled
-when mux switches.
-
-In fact, we just need to make sure that channel 0 is enabled. The
-purpose of CLK_OPS_PARENT_ENABLE may not be to solve our situation, but
-adding this flag does solve our current problem.
-
-Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock
-controller driver")
-Fixes: 14ebb3154b8f ("clk: meson: axg: add Video Clocks")
-Fixes: f06ac3ed04e8 ("clk: meson: c3: add c3 clock peripherals controller
-driver")
-Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
-Fixes: fac9a55b66c9 ("clk: meson-gxbb: Add MALI clocks")
-Fixes: 74e1f2521f16 ("clk: meson: meson8b: add the GPU clock tree")
-Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC
-peripheral clock controller")
-Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
----
- drivers/clk/meson/a1-peripherals.c |  4 ++--
- drivers/clk/meson/axg.c            |  4 ++--
- drivers/clk/meson/c3-peripherals.c |  2 +-
- drivers/clk/meson/g12a.c           |  6 +++---
- drivers/clk/meson/gxbb.c           |  6 +++---
- drivers/clk/meson/meson8b.c        | 21 ++++++++++++++++++---
- drivers/clk/meson/s4-peripherals.c | 12 ++++++------
- 7 files changed, 35 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
-index 7aa6abb2eb1f..4b9686916b17 100644
---- a/drivers/clk/meson/a1-peripherals.c
-+++ b/drivers/clk/meson/a1-peripherals.c
-@@ -489,7 +489,7 @@ static struct clk_regmap dspa_sel = {
- 			&dspa_b.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -635,7 +635,7 @@ static struct clk_regmap dspb_sel = {
- 			&dspb_b.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
-index 757c7a28c53d..6eb7b7a3fbf9 100644
---- a/drivers/clk/meson/axg.c
-+++ b/drivers/clk/meson/axg.c
-@@ -1150,7 +1150,7 @@ static struct clk_regmap axg_vpu = {
- 			&axg_vpu_1.hw
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1266,7 +1266,7 @@ static struct clk_regmap axg_vapb_sel = {
- 			&axg_vapb_1.hw
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
-index 7dcbf4ebee07..4566c2aeeb19 100644
---- a/drivers/clk/meson/c3-peripherals.c
-+++ b/drivers/clk/meson/c3-peripherals.c
-@@ -1431,7 +1431,7 @@ static struct clk_regmap hcodec = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_data = hcodec_parent_data,
- 		.num_parents = ARRAY_SIZE(hcodec_parent_data),
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index 02dda57105b1..b156da5528bc 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -2818,7 +2818,7 @@ static struct clk_regmap g12a_vpu = {
- 			&g12a_vpu_1.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -3111,7 +3111,7 @@ static struct clk_regmap g12a_vapb_sel = {
- 			&g12a_vapb_1.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -4045,7 +4045,7 @@ static struct clk_regmap g12a_mali = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = g12a_mali_parent_hws,
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
-index f071faad1ebb..784cdb019140 100644
---- a/drivers/clk/meson/gxbb.c
-+++ b/drivers/clk/meson/gxbb.c
-@@ -1138,7 +1138,7 @@ static struct clk_regmap gxbb_mali = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = gxbb_mali_parent_hws,
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1619,7 +1619,7 @@ static struct clk_regmap gxbb_vpu = {
- 			&gxbb_vpu_1.hw
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1754,7 +1754,7 @@ static struct clk_regmap gxbb_vapb_sel = {
- 			&gxbb_vapb_1.hw
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_NO_REPARENT,
-+		.flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
-index b7417ac262d3..0a5b65e0247d 100644
---- a/drivers/clk/meson/meson8b.c
-+++ b/drivers/clk/meson/meson8b.c
-@@ -2002,7 +2002,22 @@ static struct clk_regmap meson8b_mali = {
- 			&meson8b_mali_1.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		/*
-+		 * glitch-free mux has two clock channels (channel 0 and
-+		 * channel 1) with the same configuration.Channel 0 of
-+		 * glitch-free mux is not only the clock source for the mux,
-+		 * but also the working clock for glitch free mux. Therefore,
-+		 * when glitch-free mux switches, it is necessary to ensure that
-+		 * channel 0 has a clock input, otherwise glitch free mux will
-+		 * not work and cannot switch to the target channel. So adding
-+		 * flag CLK_OPS_PARENT_ENABLE ensures that both channels 0 and 1
-+		 * are enabled when mux switches.
-+		 *
-+		 * In fact, we just need to make sure that channel 0 is enabled.
-+		 * The purpose of CLK_OPS_PARENT_ENABLE may not be to solve our
-+		 * situation, but adding this flag does solve our current problem.
-+		 */
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -2257,7 +2272,7 @@ static struct clk_regmap meson8b_vpu = {
- 			&meson8b_vpu_1.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -2369,7 +2384,7 @@ static struct clk_regmap meson8b_vdec_1 = {
- 			&meson8b_vdec_1_2.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
-index c930cf0614a0..79e0240d58e6 100644
---- a/drivers/clk/meson/s4-peripherals.c
-+++ b/drivers/clk/meson/s4-peripherals.c
-@@ -1404,7 +1404,7 @@ static struct clk_regmap s4_mali_mux = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = s4_mali_parent_hws,
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1536,7 +1536,7 @@ static struct clk_regmap s4_vdec_mux = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = s4_vdec_mux_parent_hws,
- 		.num_parents = ARRAY_SIZE(s4_vdec_mux_parent_hws),
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1656,7 +1656,7 @@ static struct clk_regmap s4_hevcf_mux = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = s4_hevcf_mux_parent_hws,
- 		.num_parents = ARRAY_SIZE(s4_hevcf_mux_parent_hws),
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1774,7 +1774,7 @@ static struct clk_regmap s4_vpu = {
- 			&s4_vpu_1.hw,
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -1989,7 +1989,7 @@ static struct clk_regmap s4_vpu_clkc_mux = {
- 		.ops = &clk_regmap_mux_ops,
- 		.parent_hws = s4_vpu_mux_parent_hws,
- 		.num_parents = ARRAY_SIZE(s4_vpu_mux_parent_hws),
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
-@@ -2115,7 +2115,7 @@ static struct clk_regmap s4_vapb = {
- 			&s4_vapb_1.hw
- 		},
- 		.num_parents = 2,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
- 	},
- };
- 
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0029-WIP-media-meson-vdec-add-HEVC-and-remove-MPEG1-2-fro.patch

@@ -1,7 +1,7 @@
-From bba724597d7df40df949cd4ebbdb59aa488cd908 Mon Sep 17 00:00:00 2001
+From 5f53272ee614cf73ecaf34a7e53ee3654cd7558e Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 4 Jun 2024 10:49:58 +0000
-Subject: [PATCH 32/36] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
+Subject: [PATCH 29/33] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
  from GXLX
 
 This patch is required until GXLX support has been merged upstream.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-FROMLIST-v2-clk-meson-Fix-glitch-occurs-when-setting.patch

@@ -1,323 +0,0 @@
-From 1262d9d4663eb3dd10cc47dab815d2e8bd1815c1 Mon Sep 17 00:00:00 2001
-From: Chuan Liu <chuan.liu@amlogic.com>
-Date: Mon, 11 Nov 2024 11:37:03 +0800
-Subject: [PATCH 30/36] FROMLIST(v2): clk: meson: Fix glitch occurs when
- setting up glitch-free mux
-
-glitch-free mux has two clock channels (channel 0 and channel 1) with
-the same configuration. When the frequency needs to be changed, the two
-channels ping-pong to ensure clock continuity and suppress glitch.
-
-The glitch-free mux configuration with CLK_SET_RATE_GATE enables the mux
-to perform ping-pong switching to suppress glitches.
-
-Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock
-controller driver")
-Fixes: 14ebb3154b8f ("clk: meson: axg: add Video Clocks")
-Fixes: f06ac3ed04e8 ("clk: meson: c3: add c3 clock peripherals controller
-driver")
-Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
-Fixes: fac9a55b66c9 ("clk: meson-gxbb: Add MALI clocks")
-Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC
-peripheral clock controller")
-Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
----
- drivers/clk/meson/a1-peripherals.c |  8 ++++----
- drivers/clk/meson/axg.c            | 12 ++++++++----
- drivers/clk/meson/c3-peripherals.c |  4 ++--
- drivers/clk/meson/g12a.c           | 12 ++++++++----
- drivers/clk/meson/gxbb.c           | 12 ++++++++----
- drivers/clk/meson/s4-peripherals.c | 20 ++++++++++----------
- 6 files changed, 40 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
-index 4b9686916b17..7f515e002adb 100644
---- a/drivers/clk/meson/a1-peripherals.c
-+++ b/drivers/clk/meson/a1-peripherals.c
-@@ -423,7 +423,7 @@ static struct clk_regmap dspa_a = {
- 			&dspa_a_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -471,7 +471,7 @@ static struct clk_regmap dspa_b = {
- 			&dspa_b_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -569,7 +569,7 @@ static struct clk_regmap dspb_a = {
- 			&dspb_a_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -617,7 +617,7 @@ static struct clk_regmap dspb_b = {
- 			&dspb_b_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
-index 6eb7b7a3fbf9..746a9b61a890 100644
---- a/drivers/clk/meson/axg.c
-+++ b/drivers/clk/meson/axg.c
-@@ -1083,7 +1083,8 @@ static struct clk_regmap axg_vpu_0 = {
- 		 * We want to avoid CCF to disable the VPU clock if
- 		 * display has been set by Bootloader
- 		 */
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1132,7 +1133,8 @@ static struct clk_regmap axg_vpu_1 = {
- 		 * We want to avoid CCF to disable the VPU clock if
- 		 * display has been set by Bootloader
- 		 */
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1200,7 +1202,8 @@ static struct clk_regmap axg_vapb_0 = {
- 			&axg_vapb_0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1248,7 +1251,8 @@ static struct clk_regmap axg_vapb_1 = {
- 			&axg_vapb_1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
-index 4566c2aeeb19..27343a73a521 100644
---- a/drivers/clk/meson/c3-peripherals.c
-+++ b/drivers/clk/meson/c3-peripherals.c
-@@ -1364,7 +1364,7 @@ static struct clk_regmap hcodec_0 = {
- 			&hcodec_0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1411,7 +1411,7 @@ static struct clk_regmap hcodec_1 = {
- 			&hcodec_1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index b156da5528bc..625d991d60e8 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -2752,7 +2752,8 @@ static struct clk_regmap g12a_vpu_0 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vpu_0_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -2796,7 +2797,8 @@ static struct clk_regmap g12a_vpu_1 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &g12a_vpu_1_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -3041,7 +3043,8 @@ static struct clk_regmap g12a_vapb_0 = {
- 			&g12a_vapb_0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -3089,7 +3092,8 @@ static struct clk_regmap g12a_vapb_1 = {
- 			&g12a_vapb_1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
-index 784cdb019140..21a5281b6233 100644
---- a/drivers/clk/meson/gxbb.c
-+++ b/drivers/clk/meson/gxbb.c
-@@ -1549,7 +1549,8 @@ static struct clk_regmap gxbb_vpu_0 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_0_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1597,7 +1598,8 @@ static struct clk_regmap gxbb_vpu_1 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_1_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1680,7 +1682,8 @@ static struct clk_regmap gxbb_vapb_0 = {
- 			&gxbb_vapb_0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1732,7 +1735,8 @@ static struct clk_regmap gxbb_vapb_1 = {
- 			&gxbb_vapb_1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
-+			 CLK_SET_RATE_GATE,
- 	},
- };
- 
-diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
-index 79e0240d58e6..cf10be40141d 100644
---- a/drivers/clk/meson/s4-peripherals.c
-+++ b/drivers/clk/meson/s4-peripherals.c
-@@ -1466,7 +1466,7 @@ static struct clk_regmap s4_vdec_p0 = {
- 			&s4_vdec_p0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1516,7 +1516,7 @@ static struct clk_regmap s4_vdec_p1 = {
- 			&s4_vdec_p1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1586,7 +1586,7 @@ static struct clk_regmap s4_hevcf_p0 = {
- 			&s4_hevcf_p0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1636,7 +1636,7 @@ static struct clk_regmap s4_hevcf_p1 = {
- 			&s4_hevcf_p1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1712,7 +1712,7 @@ static struct clk_regmap s4_vpu_0 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &s4_vpu_0_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1756,7 +1756,7 @@ static struct clk_regmap s4_vpu_1 = {
- 		.ops = &clk_regmap_gate_ops,
- 		.parent_hws = (const struct clk_hw *[]) { &s4_vpu_1_div.hw },
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1921,7 +1921,7 @@ static struct clk_regmap s4_vpu_clkc_p0 = {
- 			&s4_vpu_clkc_p0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -1969,7 +1969,7 @@ static struct clk_regmap s4_vpu_clkc_p1 = {
- 			&s4_vpu_clkc_p1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -2049,7 +2049,7 @@ static struct clk_regmap s4_vapb_0 = {
- 			&s4_vapb_0_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
-@@ -2097,7 +2097,7 @@ static struct clk_regmap s4_vapb_1 = {
- 			&s4_vapb_1_div.hw
- 		},
- 		.num_parents = 1,
--		.flags = CLK_SET_RATE_PARENT,
-+		.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
- 	},
- };
- 
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0030-WIP-media-meson-vdec-reintroduce-wiggle-room.patch

@@ -1,7 +1,7 @@
-From ad8f1bc66ac060d5a7061dc89d5df656f4d72d20 Mon Sep 17 00:00:00 2001
+From 4d2be4c79a07f34759419a82e5939300d3a07725 Mon Sep 17 00:00:00 2001
 From: Andreas Baierl <ichgeh@imkreisrum.de>
 Date: Tue, 2 Apr 2024 14:22:52 +0000
-Subject: [PATCH 33/36] WIP: media: meson: vdec: reintroduce wiggle room
+Subject: [PATCH 30/33] WIP: media: meson: vdec: reintroduce wiggle room
 
 Without the wiggle room, it happens that matching offsets can't be found.
 This results in non-matches and afterwards in frame drops in userspace apps.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-FROMLIST-v2-clk-meson-Fix-children-of-ro_clk-may-be-.patch

@@ -1,372 +0,0 @@
-From 42977c8edefd10406ccacb367c6a1ed0696579fe Mon Sep 17 00:00:00 2001
-From: Chuan Liu <chuan.liu@amlogic.com>
-Date: Mon, 11 Nov 2024 17:37:28 +0800
-Subject: [PATCH 31/36] FROMLIST(v2): clk: meson: Fix children of ro_clk may be
- tampered with
-
-When setting the rate of a clock using clk_regmap_divider_ro_ops, the
-rate of its children may be tampered with.
-
-Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock controller driver")
-Fixes: 87173557d2f6 ("clk: meson: clk-pll: remove od parameters")
-Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
-Fixes: 64aa7008e957 ("clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller")
-Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
-Fixes: e787c9c55eda ("clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver")
-Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
----
- drivers/clk/meson/a1-peripherals.c |  2 ++
- drivers/clk/meson/axg.c            |  5 +++--
- drivers/clk/meson/g12a.c           | 23 ++++++++++++++---------
- drivers/clk/meson/gxbb.c           | 18 ++++++++++--------
- drivers/clk/meson/meson8-ddr.c     |  2 +-
- drivers/clk/meson/meson8b.c        |  4 +++-
- drivers/clk/meson/s4-peripherals.c |  2 ++
- drivers/clk/meson/s4-pll.c         |  2 +-
- 8 files changed, 36 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
-index 7f515e002adb..3dfdeb4c579a 100644
---- a/drivers/clk/meson/a1-peripherals.c
-+++ b/drivers/clk/meson/a1-peripherals.c
-@@ -266,6 +266,7 @@ static struct clk_regmap sys_b_div = {
- 		.offset = SYS_CLK_CTRL0,
- 		.shift = 16,
- 		.width = 10,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sys_b_div",
-@@ -314,6 +315,7 @@ static struct clk_regmap sys_a_div = {
- 		.offset = SYS_CLK_CTRL0,
- 		.shift = 0,
- 		.width = 10,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sys_a_div",
-diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
-index 746a9b61a890..ce9605e93b44 100644
---- a/drivers/clk/meson/axg.c
-+++ b/drivers/clk/meson/axg.c
-@@ -73,7 +73,7 @@ static struct clk_regmap axg_fixed_pll = {
- 		.offset = HHI_MPLL_CNTL,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "fixed_pll",
-@@ -132,7 +132,7 @@ static struct clk_regmap axg_sys_pll = {
- 		.offset = HHI_SYS_PLL_CNTL,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sys_pll",
-@@ -473,6 +473,7 @@ static struct clk_regmap axg_mpll_prediv = {
- 		.offset = HHI_MPLL_CNTL5,
- 		.shift = 12,
- 		.width = 1,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mpll_prediv",
-diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
-index 625d991d60e8..5d03a02e7b79 100644
---- a/drivers/clk/meson/g12a.c
-+++ b/drivers/clk/meson/g12a.c
-@@ -78,7 +78,7 @@ static struct clk_regmap g12a_fixed_pll = {
- 		.offset = HHI_FIX_PLL_CNTL0,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "fixed_pll",
-@@ -445,6 +445,7 @@ static struct clk_regmap g12a_cpu_clk_mux1_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL0,
- 		.shift = 20,
- 		.width = 6,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpu_clk_dyn1_div",
-@@ -629,6 +630,7 @@ static struct clk_regmap g12b_cpub_clk_mux1_div = {
- 		.offset = HHI_SYS_CPUB_CLK_CNTL,
- 		.shift = 20,
- 		.width = 6,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpub_clk_dyn1_div",
-@@ -748,6 +750,7 @@ static struct clk_regmap sm1_dsu_clk_mux0_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL5,
- 		.shift = 4,
- 		.width = 6,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "dsu_clk_dyn0_div",
-@@ -783,6 +786,7 @@ static struct clk_regmap sm1_dsu_clk_mux1_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL5,
- 		.shift = 20,
- 		.width = 6,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "dsu_clk_dyn1_div",
-@@ -1200,7 +1204,7 @@ static struct clk_regmap g12a_cpu_clk_apb_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL1,
- 		.shift = 3,
- 		.width = 3,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpu_clk_apb_div",
-@@ -1234,7 +1238,7 @@ static struct clk_regmap g12a_cpu_clk_atb_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL1,
- 		.shift = 6,
- 		.width = 3,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpu_clk_atb_div",
-@@ -1268,7 +1272,7 @@ static struct clk_regmap g12a_cpu_clk_axi_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL1,
- 		.shift = 9,
- 		.width = 3,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpu_clk_axi_div",
-@@ -1302,7 +1306,7 @@ static struct clk_regmap g12a_cpu_clk_trace_div = {
- 		.offset = HHI_SYS_CPU_CLK_CNTL1,
- 		.shift = 20,
- 		.width = 3,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "cpu_clk_trace_div",
-@@ -1738,7 +1742,7 @@ static struct clk_regmap sm1_gp1_pll = {
- 		.shift = 16,
- 		.width = 3,
- 		.flags = (CLK_DIVIDER_POWER_OF_TWO |
--			  CLK_DIVIDER_ROUND_CLOSEST),
-+			  CLK_DIVIDER_ROUND_CLOSEST | CLK_DIVIDER_READ_ONLY),
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "gp1_pll",
-@@ -2001,7 +2005,7 @@ static struct clk_regmap g12a_hdmi_pll_od = {
- 		.offset = HHI_HDMI_PLL_CNTL0,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od",
-@@ -2019,7 +2023,7 @@ static struct clk_regmap g12a_hdmi_pll_od2 = {
- 		.offset = HHI_HDMI_PLL_CNTL0,
- 		.shift = 18,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od2",
-@@ -2037,7 +2041,7 @@ static struct clk_regmap g12a_hdmi_pll = {
- 		.offset = HHI_HDMI_PLL_CNTL0,
- 		.shift = 20,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll",
-@@ -4058,6 +4062,7 @@ static struct clk_regmap g12a_ts_div = {
- 		.offset = HHI_TS_CLK_CNTL,
- 		.shift = 0,
- 		.width = 8,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "ts_div",
-diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
-index 21a5281b6233..176123787ce1 100644
---- a/drivers/clk/meson/gxbb.c
-+++ b/drivers/clk/meson/gxbb.c
-@@ -133,7 +133,7 @@ static struct clk_regmap gxbb_fixed_pll = {
- 		.offset = HHI_MPLL_CNTL,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "fixed_pll",
-@@ -269,7 +269,7 @@ static struct clk_regmap gxbb_hdmi_pll_od = {
- 		.offset = HHI_HDMI_PLL_CNTL2,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od",
-@@ -287,7 +287,7 @@ static struct clk_regmap gxbb_hdmi_pll_od2 = {
- 		.offset = HHI_HDMI_PLL_CNTL2,
- 		.shift = 22,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od2",
-@@ -305,7 +305,7 @@ static struct clk_regmap gxbb_hdmi_pll = {
- 		.offset = HHI_HDMI_PLL_CNTL2,
- 		.shift = 18,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll",
-@@ -323,7 +323,7 @@ static struct clk_regmap gxl_hdmi_pll_od = {
- 		.offset = HHI_HDMI_PLL_CNTL + 8,
- 		.shift = 21,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od",
-@@ -341,7 +341,7 @@ static struct clk_regmap gxl_hdmi_pll_od2 = {
- 		.offset = HHI_HDMI_PLL_CNTL + 8,
- 		.shift = 23,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll_od2",
-@@ -359,7 +359,7 @@ static struct clk_regmap gxl_hdmi_pll = {
- 		.offset = HHI_HDMI_PLL_CNTL + 8,
- 		.shift = 19,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "hdmi_pll",
-@@ -415,7 +415,7 @@ static struct clk_regmap gxbb_sys_pll = {
- 		.offset = HHI_SYS_PLL_CNTL,
- 		.shift = 10,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sys_pll",
-@@ -705,6 +705,7 @@ static struct clk_regmap gxbb_mpll_prediv = {
- 		.offset = HHI_MPLL_CNTL5,
- 		.shift = 12,
- 		.width = 1,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mpll_prediv",
-@@ -917,6 +918,7 @@ static struct clk_regmap gxbb_mpeg_clk_div = {
- 		.offset = HHI_MPEG_CLK_CNTL,
- 		.shift = 0,
- 		.width = 7,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mpeg_clk_div",
-diff --git a/drivers/clk/meson/meson8-ddr.c b/drivers/clk/meson/meson8-ddr.c
-index 4b73ea244b63..950f323072fb 100644
---- a/drivers/clk/meson/meson8-ddr.c
-+++ b/drivers/clk/meson/meson8-ddr.c
-@@ -65,7 +65,7 @@ static struct clk_regmap meson8_ddr_pll = {
- 		.offset = AM_DDR_PLL_CNTL,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "ddr_pll",
-diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
-index 0a5b65e0247d..9c38b3911c0a 100644
---- a/drivers/clk/meson/meson8b.c
-+++ b/drivers/clk/meson/meson8b.c
-@@ -106,7 +106,7 @@ static struct clk_regmap meson8b_fixed_pll = {
- 		.offset = HHI_MPLL_CNTL,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "fixed_pll",
-@@ -459,6 +459,7 @@ static struct clk_regmap meson8b_mpll_prediv = {
- 		.offset = HHI_MPLL_CNTL5,
- 		.shift = 12,
- 		.width = 1,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mpll_prediv",
-@@ -640,6 +641,7 @@ static struct clk_regmap meson8b_mpeg_clk_div = {
- 		.offset = HHI_MPEG_CLK_CNTL,
- 		.shift = 0,
- 		.width = 7,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "mpeg_clk_div",
-diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
-index cf10be40141d..d194d448b343 100644
---- a/drivers/clk/meson/s4-peripherals.c
-+++ b/drivers/clk/meson/s4-peripherals.c
-@@ -175,6 +175,7 @@ static struct clk_regmap s4_sysclk_b_div = {
- 		.offset = CLKCTRL_SYS_CLK_CTRL0,
- 		.shift = 16,
- 		.width = 10,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sysclk_b_div",
-@@ -221,6 +222,7 @@ static struct clk_regmap s4_sysclk_a_div = {
- 		.offset = CLKCTRL_SYS_CLK_CTRL0,
- 		.shift = 0,
- 		.width = 10,
-+		.flags = CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "sysclk_a_div",
-diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
-index b0258933fb9d..bca5c92ea2c1 100644
---- a/drivers/clk/meson/s4-pll.c
-+++ b/drivers/clk/meson/s4-pll.c
-@@ -74,7 +74,7 @@ static struct clk_regmap s4_fixed_pll = {
- 		.offset = ANACTRL_FIXPLL_CTRL0,
- 		.shift = 16,
- 		.width = 2,
--		.flags = CLK_DIVIDER_POWER_OF_TWO,
-+		.flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
- 	},
- 	.hw.init = &(struct clk_init_data){
- 		.name = "fixed_pll",
--- 
-2.34.1
-

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0031-WIP-media-meson-vdec-fix-memory-leak-of-new_frame.patch

@@ -1,7 +1,7 @@
-From 87e7de5ee4abe0a0bc945332fb7648f807dc6f7c Mon Sep 17 00:00:00 2001
+From 1308444793f1952c583f1ccd3e8c22a88e1b04f4 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Tue, 14 Mar 2023 01:13:15 +0000
-Subject: [PATCH 34/36] WIP: media: meson: vdec: fix memory leak of 'new_frame'
+Subject: [PATCH 31/33] WIP: media: meson: vdec: fix memory leak of 'new_frame'
 
 Reported-by: kernel test robot <lkp@intel.com>
 Reported-by: Dan Carpenter <error27@gmail.com>

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0032-Revert-drm-meson-vclk-fix-calculation-of-59.94-fract.patch

@@ -1,7 +1,7 @@
-From f70aca0039b995753470bc49c6d76dc398c59cfa Mon Sep 17 00:00:00 2001
+From dc557b41ff1fb30b13ac3e5fd5db8cbee9b523f6 Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sun, 7 Jul 2024 03:16:12 +0000
-Subject: [PATCH 35/36] Revert "drm/meson: vclk: fix calculation of 59.94
+Subject: [PATCH 32/33] Revert "drm/meson: vclk: fix calculation of 59.94
  fractional rates"
 
 This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.

projects/Amlogic/devices/AMLGX/patches/linux/amlogic-0033-WIP-arm64-dts-meson-add-Odroid-C2-HiFi-Shield-boards.patch

@@ -1,7 +1,7 @@
-From 8b81159bdd6fd11c553b40f19d8446129af344b4 Mon Sep 17 00:00:00 2001
+From 0f870d373ada156952baab7390bdec859c43b98f Mon Sep 17 00:00:00 2001
 From: Christian Hewitt <christianshewitt@gmail.com>
 Date: Sun, 26 May 2024 12:53:07 +0000
-Subject: [PATCH 36/36] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
+Subject: [PATCH 33/33] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
  boards
 
 Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)

projects/Amlogic/linux/linux.aarch64.conf

@@ -1,6 +1,6 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# Linux/arm64 6.12.0 Kernel Configuration
+# Linux/arm64 6.12.3 Kernel Configuration
 #
 CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
 CONFIG_CC_IS_GCC=y
@@ -961,6 +961,7 @@ CONFIG_ARCH_HAS_PTE_DEVMAP=y
 CONFIG_ARCH_HAS_ZONE_DMA_SET=y
 CONFIG_ZONE_DMA=y
 CONFIG_ZONE_DMA32=y
+CONFIG_VMAP_PFN=y
 CONFIG_VM_EVENT_COUNTERS=y
 # CONFIG_PERCPU_STATS is not set
 # CONFIG_GUP_TEST is not set
@@ -1806,7 +1807,6 @@ CONFIG_BLK_DEV=y
 CONFIG_CDROM=y
 # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
 # CONFIG_ZRAM is not set
-CONFIG_ZRAM_DEF_COMP="unset-value"
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
 # CONFIG_BLK_DEV_DRBD is not set
@@ -5187,7 +5187,6 @@ CONFIG_NINTENDO_FF=y
 # CONFIG_HID_NTRIG is not set
 # CONFIG_HID_NVIDIA_SHIELD is not set
 CONFIG_HID_ORTEK=y
-CONFIG_HID_OUYA=y
 CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
 CONFIG_HID_PENMOUNT=y
@@ -5975,6 +5974,7 @@ CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
 CONFIG_FSL_ERRATUM_A008585=y
 # CONFIG_HISILICON_ERRATUM_161010101 is not set
 CONFIG_ARM64_ERRATUM_858921=y
+# CONFIG_ARM_TIMER_SP804 is not set
 # end of Clock Source drivers
 
 CONFIG_MAILBOX=y
@@ -7537,7 +7537,7 @@ CONFIG_XZ_DEC_ARM64=y
 # CONFIG_XZ_DEC_SPARC is not set
 # CONFIG_XZ_DEC_RISCV is not set
 # CONFIG_XZ_DEC_MICROLZMA is not set
-# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_XZ_DEC_BCJ=y
 # CONFIG_XZ_DEC_TEST is not set
 CONFIG_GENERIC_ALLOCATOR=y
 CONFIG_XARRAY_MULTI=y