From c035a54849650357061496cd2b2d6807d969faef Mon Sep 17 00:00:00 2001 From: MilhouseVH Date: Thu, 13 Jul 2017 18:53:26 +0100 Subject: [PATCH] linux (default): drop obsolete patches, fix incompatible patches --- ...lson-limit-depth-of-display-pipeline.patch | 60 ------------- ...5-fixes-and-diagnostics-for-braswell.patch | 86 ------------------- 2 files changed, 146 deletions(-) delete mode 100644 packages/linux/patches/default/linux-999-i915-chris-wilson-limit-depth-of-display-pipeline.patch diff --git a/packages/linux/patches/default/linux-999-i915-chris-wilson-limit-depth-of-display-pipeline.patch b/packages/linux/patches/default/linux-999-i915-chris-wilson-limit-depth-of-display-pipeline.patch deleted file mode 100644 index e484b89c2f..0000000000 --- a/packages/linux/patches/default/linux-999-i915-chris-wilson-limit-depth-of-display-pipeline.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 428ce1a022a0bc30cf2d09cde4c1352a88d70d0a Mon Sep 17 00:00:00 2001 -From: Chris Wilson -Date: Fri, 26 Aug 2016 19:26:01 +0100 -Subject: [PATCH] drm/i915: Limit the depth of the display pipeline to the - framebuffer - -There is little point in using higher bitdepth inside the pipeline if -the endpoints are of lower accuracy. Using the higher bitdepth requires -extra bandwidth, often to the point of failure - such as signal loss and -blank displays. - -Since commit 7a0baa623446 ("Revert "drm/i915: Disable 12bpc hdmi for -now"") we have had users reporting blank screens and rightfully -complaining about the regressions. Whilst these are using due to some -other underlying bug, they have lingered and still remain unresolved. So -let's try a different tact and avoid using higher bitdepths than -required. - -Signed-off-by: Chris Wilson ---- - drivers/gpu/drm/i915/intel_display.c | 11 ++++++++--- - 1 file changed, 8 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index af551a2c89ba..05ad77dae2e8 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -12695,9 +12695,11 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, - struct intel_crtc_state *pipe_config) - { - struct drm_device *dev = crtc->base.dev; -- struct drm_atomic_state *state; -+ struct drm_atomic_state *state = pipe_config->base.state; -+ - struct drm_connector *connector; - struct drm_connector_state *connector_state; -+ struct drm_plane_state *plane_state; - int bpp, i; - - if ((IS_G4X(dev) || IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))) -@@ -12707,11 +12709,14 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, - else - bpp = 8*3; - -+ plane_state = drm_atomic_get_plane_state(state, crtc->base.primary); -+ if (plane_state->fb->depth < bpp) -+ bpp = 8*3; - -+ DRM_DEBUG_KMS("initial pipeline bpp = %d (fb depth %d)\n", -+ bpp, plane_state->fb->depth); - pipe_config->pipe_bpp = bpp; - -- state = pipe_config->base.state; -- - /* Clamp display bpp to EDID value */ - for_each_connector_in_state(state, connector, connector_state, i) { - if (connector_state->crtc != &crtc->base) --- -2.9.3 - diff --git a/packages/linux/patches/default/linux-999-i915-fixes-and-diagnostics-for-braswell.patch b/packages/linux/patches/default/linux-999-i915-fixes-and-diagnostics-for-braswell.patch index f07daafe09..2f23642755 100644 --- a/packages/linux/patches/default/linux-999-i915-fixes-and-diagnostics-for-braswell.patch +++ b/packages/linux/patches/default/linux-999-i915-fixes-and-diagnostics-for-braswell.patch @@ -1,89 +1,3 @@ -From 0db9810b18ffc46709ad00831c426712d5489aea Mon Sep 17 00:00:00 2001 -From: Chris Wilson -Date: Sat, 13 Aug 2016 21:32:17 +0100 -Subject: [PATCH 1/2] drm/i915: Show RPS autotuning thresholds along waitboost - ---- - drivers/gpu/drm/i915/i915_debugfs.c | 62 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 62 insertions(+) - -diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c -index 1035468..2cff44a 100644 ---- a/drivers/gpu/drm/i915/i915_debugfs.c -+++ b/drivers/gpu/drm/i915/i915_debugfs.c -@@ -2434,6 +2434,68 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) - spin_unlock(&dev_priv->rps.client_lock); - mutex_unlock(&dev->filelist_mutex); - -+ if (INTEL_INFO(dev)->gen >= 6) { -+ u32 rpmodectl, rpinclimit, rpdeclimit; -+ u32 rpstat, cagf; -+ u32 rpupei, rpcurup, rpprevup; -+ u32 rpdownei, rpcurdown, rpprevdown; -+ -+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); -+ -+ rpmodectl = I915_READ(GEN6_RP_CONTROL); -+ rpinclimit = I915_READ(GEN6_RP_UP_THRESHOLD); -+ rpdeclimit = I915_READ(GEN6_RP_DOWN_THRESHOLD); -+ -+ rpstat = I915_READ(GEN6_RPSTAT1); -+ rpupei = I915_READ(GEN6_RP_CUR_UP_EI) & GEN6_CURICONT_MASK; -+ rpcurup = I915_READ(GEN6_RP_CUR_UP) & GEN6_CURBSYTAVG_MASK; -+ rpprevup = I915_READ(GEN6_RP_PREV_UP) & GEN6_CURBSYTAVG_MASK; -+ rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK; -+ rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK; -+ rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK; -+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); -+ -+ if (IS_GEN9(dev)) -+ cagf = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT; -+ else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) -+ cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT; -+ else -+ cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT; -+ cagf = intel_gpu_freq(dev_priv, cagf); -+ -+ -+ seq_printf(m, "RP CUR UP EI: %d (%dus)\n", -+ rpupei, GT_PM_INTERVAL_TO_US(dev_priv, rpupei)); -+ seq_printf(m, "RP CUR UP: %d (%dus)\n", -+ rpcurup, GT_PM_INTERVAL_TO_US(dev_priv, rpcurup)); -+ seq_printf(m, "RP PREV UP: %d (%dus)\n", -+ rpprevup, GT_PM_INTERVAL_TO_US(dev_priv, rpprevup)); -+ seq_printf(m, "Up threshold: %d%%\n", -+ dev_priv->rps.up_threshold); -+ -+ seq_printf(m, "RP CUR DOWN EI: %d (%dus)\n", -+ rpdownei, GT_PM_INTERVAL_TO_US(dev_priv, rpdownei)); -+ seq_printf(m, "RP CUR DOWN: %d (%dus)\n", -+ rpcurdown, GT_PM_INTERVAL_TO_US(dev_priv, rpcurdown)); -+ seq_printf(m, "RP PREV DOWN: %d (%dus)\n", -+ rpprevdown, GT_PM_INTERVAL_TO_US(dev_priv, rpprevdown)); -+ seq_printf(m, "Down threshold: %d%%\n", -+ dev_priv->rps.down_threshold); -+ -+ seq_printf(m, "Current freq: %d MHz\n", -+ intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq)); -+ seq_printf(m, "Actual freq: %d MHz\n", cagf); -+ seq_printf(m, "Idle freq: %d MHz\n", -+ intel_gpu_freq(dev_priv, dev_priv->rps.idle_freq)); -+ seq_printf(m, "Min freq: %d MHz\n", -+ intel_gpu_freq(dev_priv, dev_priv->rps.min_freq)); -+ seq_printf(m, "Max freq: %d MHz\n", -+ intel_gpu_freq(dev_priv, dev_priv->rps.max_freq)); -+ seq_printf(m, -+ "efficient (RPe) frequency: %d MHz\n", -+ intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq)); -+ } -+ - return 0; - } - --- -2.7.4 - - From d77c081cd5ea0d278b314ee2043556d2bd9aacaf Mon Sep 17 00:00:00 2001 From: fritsch Date: Sat, 13 Aug 2016 22:56:37 +0200