From b2fe5f8eb49014c4a664dff3bf53f904c3488df3 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 4 Apr 2020 11:20:41 +0200 Subject: [PATCH 1/3] Allwinner: Sort upstreamed patches --- .../devices/H6/patches/linux/07-opi3.patch | 35 - ...ts-allwinner-OrangePiOnePlus-updates.patch | 78 --- .../H6/patches/linux/15-RTC-workaround.patch | 41 -- .../linux/0001-backport-from-5.7.patch | 648 ++++++++++++++++++ 4 files changed, 648 insertions(+), 154 deletions(-) delete mode 100644 projects/Allwinner/devices/H6/patches/linux/08-arm64-dts-allwinner-OrangePiOnePlus-updates.patch delete mode 100644 projects/Allwinner/devices/H6/patches/linux/15-RTC-workaround.patch diff --git a/projects/Allwinner/devices/H6/patches/linux/07-opi3.patch b/projects/Allwinner/devices/H6/patches/linux/07-opi3.patch index 86438cb4b5..4d148ac677 100644 --- a/projects/Allwinner/devices/H6/patches/linux/07-opi3.patch +++ b/projects/Allwinner/devices/H6/patches/linux/07-opi3.patch @@ -1,38 +1,3 @@ -From beada897870d77ccbd4a14981d7f9a7f94d44ef4 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Wed, 15 Jan 2020 18:51:54 +0100 -Subject: [PATCH] arm64: dts: allwinner: h6: orangepi-3: Add eMMC node - -OrangePi 3 can optionally have 8 GiB eMMC (soldered on board). Add a -node for it. - -Signed-off-by: Jernej Skrabec ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index c311eee52a35..eda591be661e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -144,6 +144,14 @@ brcm: sdio-wifi@1 { - }; - }; - -+&mmc2 { -+ vmmc-supply = <®_cldo1>; -+ vqmmc-supply = <®_bldo2>; -+ cap-mmc-hw-reset; -+ bus-width = <8>; -+ status = "okay"; -+}; -+ - &ohci0 { - status = "okay"; - }; --- -2.24.1 - From 0b2bbc6708ef986e2f8d281f65e0c1ca3ff14562 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Wed, 27 Mar 2019 13:21:06 +0100 diff --git a/projects/Allwinner/devices/H6/patches/linux/08-arm64-dts-allwinner-OrangePiOnePlus-updates.patch b/projects/Allwinner/devices/H6/patches/linux/08-arm64-dts-allwinner-OrangePiOnePlus-updates.patch deleted file mode 100644 index 450e02d174..0000000000 --- a/projects/Allwinner/devices/H6/patches/linux/08-arm64-dts-allwinner-OrangePiOnePlus-updates.patch +++ /dev/null @@ -1,78 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts -index 12e17567ab56..fd9dcefcd223 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts -@@ -9,4 +9,73 @@ - / { - model = "OrangePi One Plus"; - compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6"; -+ -+ aliases { -+ ethernet0 = &emac; -+ }; -+ -+ connector { -+ compatible = "hdmi-connector"; -+ type = "a"; -+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ -+ -+ port { -+ hdmi_con_in: endpoint { -+ remote-endpoint = <&hdmi_out_con>; -+ }; -+ }; -+ }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ -+ vin-supply = <®_aldo2>; -+ }; -+ -+ reg_usb_vbus: vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb-vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ startup-delay-us = <100000>; -+ gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+}; -+ -+&de { -+ status = "okay"; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ext_rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-supply = <®_gmac_3v3>; -+ allwinner,rx-delay-ps = <200>; -+ allwinner,tx-delay-ps = <200>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ status = "okay"; -+}; -+ -+&hdmi_out { -+ hdmi_out_con: endpoint { -+ remote-endpoint = <&hdmi_con_in>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; diff --git a/projects/Allwinner/devices/H6/patches/linux/15-RTC-workaround.patch b/projects/Allwinner/devices/H6/patches/linux/15-RTC-workaround.patch deleted file mode 100644 index b4ff3f6fc4..0000000000 --- a/projects/Allwinner/devices/H6/patches/linux/15-RTC-workaround.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 7c8b4644df51ba7ecd68a6898bcb041ab669ddf9 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sun, 25 Aug 2019 00:02:06 +0200 -Subject: [PATCH] RTC workaround - -Signed-off-by: Jernej Skrabec ---- - drivers/rtc/rtc-sun6i.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c -index 4603a91c11be..d8a0817b96f4 100644 ---- a/drivers/rtc/rtc-sun6i.c -+++ b/drivers/rtc/rtc-sun6i.c -@@ -33,6 +33,7 @@ - #define SUN6I_LOSC_CTRL 0x0000 - #define SUN6I_LOSC_CTRL_KEY (0x16aa << 16) - #define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS BIT(15) -+#define SUN6I_LOSC_CTRL_AUTO_SWT_EN BIT(14) - #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9) - #define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8) - #define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7) -@@ -253,6 +254,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node, - - /* Switch to the external, more precise, oscillator */ - reg |= SUN6I_LOSC_CTRL_EXT_OSC; -+ reg |= SUN6I_LOSC_CTRL_AUTO_SWT_EN; - if (rtc->data->has_losc_en) - reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN; - writel(reg, rtc->base + SUN6I_LOSC_CTRL); -@@ -370,7 +372,6 @@ static const struct sun6i_rtc_clk_data sun50i_h6_rtc_data = { - .has_out_clk = 1, - .export_iosc = 1, - .has_losc_en = 1, -- .has_auto_swt = 1, - }; - - static void __init sun50i_h6_rtc_clk_init(struct device_node *node) --- -2.23.0 - diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.7.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.7.patch index 2c4e6eacf1..27d2b126d1 100644 --- a/projects/Allwinner/patches/linux/0001-backport-from-5.7.patch +++ b/projects/Allwinner/patches/linux/0001-backport-from-5.7.patch @@ -54,3 +54,651 @@ index c4f89c312f42..7d7aad18f078 100644 -- 2.25.1 +From 30bd02bd634f4a483e965fb41a076e47ea9681ef Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Thu, 16 Jan 2020 23:11:46 +0000 +Subject: [PATCH] arm64: dts: sun50i: H6: Add SPI controllers nodes and + pinmuxes + +The Allwinner H6 SoC contains two SPI controllers similar to the H3/A64, +but with the added capability of 3-wire and 4-wire operation modes. +For now the driver does not support those, but the SPI registers are +fully backwards-compatible, just adding bits and registers which were +formerly reserved. So we can use the existing driver in "legacy" SPI +modes, for instance to access the SPI NOR flash soldered on the PineH64 +board. +We use an H6 specific compatible string in addition to the existing H3 +string, so when the driver later gains QSPI support, it should work +automatically without any DT changes. + +Tested by accessing the SPI flash on a Pine H64 board (SPI0), also +connecting another SPI flash to the SPI1 header pins. + +Signed-off-by: Andre Przywara +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 55 ++++++++++++++++++++ + 1 file changed, 55 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index 3329283e38ab..41b58ffa8596 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -338,6 +338,31 @@ mmc2_pins: mmc2-pins { + bias-pull-up; + }; + ++ /omit-if-no-ref/ ++ spi0_pins: spi0-pins { ++ pins = "PC0", "PC2", "PC3"; ++ function = "spi0"; ++ }; ++ ++ /* pin shared with MMC2-CMD (eMMC) */ ++ /omit-if-no-ref/ ++ spi0_cs_pin: spi0-cs-pin { ++ pins = "PC5"; ++ function = "spi0"; ++ }; ++ ++ /omit-if-no-ref/ ++ spi1_pins: spi1-pins { ++ pins = "PH4", "PH5", "PH6"; ++ function = "spi1"; ++ }; ++ ++ /omit-if-no-ref/ ++ spi1_cs_pin: spi1-cs-pin { ++ pins = "PH3"; ++ function = "spi1"; ++ }; ++ + spdif_tx_pin: spdif-tx-pin { + pins = "PH7"; + function = "spdif"; +@@ -504,6 +529,36 @@ i2c2: i2c@5002800 { + #size-cells = <0>; + }; + ++ spi0: spi@5010000 { ++ compatible = "allwinner,sun50i-h6-spi", ++ "allwinner,sun8i-h3-spi"; ++ reg = <0x05010000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 22>, <&dma 22>; ++ dma-names = "rx", "tx"; ++ resets = <&ccu RST_BUS_SPI0>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ spi1: spi@5011000 { ++ compatible = "allwinner,sun50i-h6-spi", ++ "allwinner,sun8i-h3-spi"; ++ reg = <0x05011000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 23>, <&dma 23>; ++ dma-names = "rx", "tx"; ++ resets = <&ccu RST_BUS_SPI1>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ + emac: ethernet@5020000 { + compatible = "allwinner,sun50i-h6-emac", + "allwinner,sun50i-a64-emac"; +-- +2.26.0 + +From e757bdd01780d0ea3e6774247b735caf2d1a9e92 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Thu, 16 Jan 2020 23:11:47 +0000 +Subject: [PATCH] arm64: dts: allwinner: h6: Pine H64: Add SPI flash node + +The Pine H64 board comes with SPI flash soldered on the board, connected +to the SPI0 pins (so it can also boot from there). + +Add the required SPI flash DT node to describe this. + +Unfortunately the SPI CS0 pin collides with the eMMC CMD pin, so we can't +use both eMMC and SPI flash at the same time (the first to claim the pin +would win, the other's probe routine would then fail). + +To avoid losing the more useful eMMC device by chance, mark the SPI +device as "disabled" for now. A user or some U-Boot code could fix this +up if needed, for instance if no eMMC has been detected (it's socketed). + +Signed-off-by: Andre Przywara +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +index d1c2aa5b3a20..3c9dd0d69754 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +@@ -14,6 +14,7 @@ / { + aliases { + ethernet0 = &emac; + serial0 = &uart0; ++ spi0 = &spi0; + }; + + chosen { +@@ -278,6 +279,24 @@ &r_pio { + vcc-pm-supply = <®_aldo1>; + }; + ++/* ++ * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI ++ * flash and eMMC at the same time, as one of them would fail probing. ++ * Disable SPI0 in here, to prefer the more useful eMMC. U-Boot can ++ * fix this up in no eMMC is connected. ++ */ ++&spi0 { ++ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; ++ pinctrl-names = "default"; ++ status = "disabled"; ++ ++ flash@0 { ++ compatible = "winbond,w25q128", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <4000000>; ++ }; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; +-- +2.26.0 + +From ec98a87509f40324807dc179a7e3163d40709eba Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sun, 8 Mar 2020 14:58:48 +0100 +Subject: [PATCH] rtc: sun6i: Make external 32k oscillator optional + +Some boards, like OrangePi PC2 (H5), OrangePi Plus 2E (H3) and Tanix TX6 +(H6) don't have external 32kHz oscillator. Till H6, it didn't really +matter if external oscillator was enabled because HW detected error and +fall back to internal one. H6 has same functionality but it's the first +SoC which have "auto switch bypass" bit documented and always enabled in +driver. This prevents RTC to work correctly if external crystal is not +present on board. There are other side effects - all peripherals which +depends on this clock also don't work (HDMI CEC for example). + +Make clocks property optional. If it is present, select external +oscillator. If not, stay on internal. + +Signed-off-by: Jernej Skrabec +Acked-by: Maxime Ripard +Link: https://lore.kernel.org/r/20200308135849.106333-2-jernej.skrabec@siol.net +Signed-off-by: Alexandre Belloni +--- + drivers/rtc/rtc-sun6i.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c +index 852f5f3b3592..415a20a936e4 100644 +--- a/drivers/rtc/rtc-sun6i.c ++++ b/drivers/rtc/rtc-sun6i.c +@@ -250,19 +250,17 @@ static void __init sun6i_rtc_clk_init(struct device_node *node, + writel(reg, rtc->base + SUN6I_LOSC_CTRL); + } + +- /* Switch to the external, more precise, oscillator */ +- reg |= SUN6I_LOSC_CTRL_EXT_OSC; +- if (rtc->data->has_losc_en) +- reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN; ++ /* Switch to the external, more precise, oscillator, if present */ ++ if (of_get_property(node, "clocks", NULL)) { ++ reg |= SUN6I_LOSC_CTRL_EXT_OSC; ++ if (rtc->data->has_losc_en) ++ reg |= SUN6I_LOSC_CTRL_EXT_LOSC_EN; ++ } + writel(reg, rtc->base + SUN6I_LOSC_CTRL); + + /* Yes, I know, this is ugly. */ + sun6i_rtc = rtc; + +- /* Deal with old DTs */ +- if (!of_get_property(node, "clocks", NULL)) +- goto err; +- + /* Only read IOSC name from device tree if it is exported */ + if (rtc->data->export_iosc) + of_property_read_string_index(node, "clock-output-names", 2, +@@ -279,11 +277,13 @@ static void __init sun6i_rtc_clk_init(struct device_node *node, + } + + parents[0] = clk_hw_get_name(rtc->int_osc); ++ /* If there is no external oscillator, this will be NULL and ... */ + parents[1] = of_clk_get_parent_name(node, 0); + + rtc->hw.init = &init; + + init.parent_names = parents; ++ /* ... number of clock parents will be 1. */ + init.num_parents = of_clk_get_parent_count(node) + 1; + of_property_read_string_index(node, "clock-output-names", 0, + &init.name); +-- +2.26.0 + +From 32507b8681198c987fad8ac66e55ad4e15dfae4a Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sun, 8 Mar 2020 14:58:49 +0100 +Subject: [PATCH] arm64: dts: allwinner: h6: Move ext. oscillator to board DTs + +It turns out that not all H6 boards have external 32kHz oscillator. +Currently the only one known such H6 board is Tanix TX6. + +Move external oscillator node from common H6 dtsi to board specific dts +files where present. + +Signed-off-by: Jernej Skrabec +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 11 +++++++++++ + .../arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 11 +++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 11 +++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 11 +++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 -------- + 5 files changed, 44 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +index df6d872c34e2..8f09d209359b 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +@@ -32,6 +32,13 @@ hdmi_con_in: endpoint { + }; + }; + ++ ext_osc32k: ext_osc32k_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "ext_osc32k"; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -275,6 +282,10 @@ &r_pio { + vcc-pm-supply = <®_aldo1>; + }; + ++&rtc { ++ clocks = <&ext_osc32k>; ++}; ++ + &spdif { + status = "okay"; + }; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +index 1e0abd9d047f..47f579610dcc 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +@@ -32,6 +32,13 @@ hdmi_con_in: endpoint { + }; + }; + ++ ext_osc32k: ext_osc32k_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "ext_osc32k"; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -285,6 +292,10 @@ &r_ir { + status = "okay"; + }; + ++&rtc { ++ clocks = <&ext_osc32k>; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +index 37f4c57597d4..37fc3f3697f7 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +@@ -20,6 +20,13 @@ chosen { + stdout-path = "serial0:115200n8"; + }; + ++ ext_osc32k: ext_osc32k_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "ext_osc32k"; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -197,6 +204,10 @@ &r_ir { + status = "okay"; + }; + ++&rtc { ++ clocks = <&ext_osc32k>; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +index 3c9dd0d69754..b0642d841933 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +@@ -21,6 +21,13 @@ chosen { + stdout-path = "serial0:115200n8"; + }; + ++ ext_osc32k: ext_osc32k_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "ext_osc32k"; ++ }; ++ + hdmi_connector: connector { + compatible = "hdmi-connector"; + type = "a"; +@@ -279,6 +286,10 @@ &r_pio { + vcc-pm-supply = <®_aldo1>; + }; + ++&rtc { ++ clocks = <&ext_osc32k>; ++}; ++ + /* + * The CS pin is shared with the MMC2 CMD pin, so we cannot have the SPI + * flash and eMMC at the same time, as one of them would fail probing. +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index 967249e58811..b9ab7d8fa8af 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -62,13 +62,6 @@ osc24M: osc24M_clk { + clock-output-names = "osc24M"; + }; + +- ext_osc32k: ext_osc32k_clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <32768>; +- clock-output-names = "ext_osc32k"; +- }; +- + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , +@@ -854,7 +847,6 @@ rtc: rtc@7000000 { + interrupts = , + ; + clock-output-names = "osc32k", "osc32k-out", "iosc"; +- clocks = <&ext_osc32k>; + #clock-cells = <1>; + }; + +-- +2.26.0 + +From 221a690420fdad808eb0b39eebb19d4eda95568c Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 10 Feb 2020 18:40:07 +0100 +Subject: [PATCH] arm64: dts: allwinner: h6: orangepi-3: Add eMMC node + +OrangePi 3 can optionally have 8 GiB eMMC (soldered on board). Because +those pins are dedicated to eMMC exclusively, node can be added for both +variants (with and without eMMC). Kernel will then scan bus for presence +of eMMC and act accordingly. + +Signed-off-by: Jernej Skrabec +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +index c311eee52a35..1e0abd9d047f 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +@@ -144,6 +144,15 @@ brcm: sdio-wifi@1 { + }; + }; + ++&mmc2 { ++ vmmc-supply = <®_cldo1>; ++ vqmmc-supply = <®_bldo2>; ++ cap-mmc-hw-reset; ++ non-removable; ++ bus-width = <8>; ++ status = "okay"; ++}; ++ + &ohci0 { + status = "okay"; + }; +-- +2.26.0 + +From 7ee32a17e0d65fbaa55b032f3bb52232b09fb447 Mon Sep 17 00:00:00 2001 +From: Marcus Cooper +Date: Sun, 8 Mar 2020 17:48:39 +0100 +Subject: [PATCH] arm64: dts: allwinner: h6: orangepi-one-plus: Enable ethernet + +OrangePi One Plus has gigabit ethernet. Add nodes for it. + +Signed-off-by: Marcus Cooper +[patch split and commit message] +Signed-off-by: Jernej Skrabec +Reviewed-by: Christopher Obbard +Tested-by: Christopher Obbard +Signed-off-by: Maxime Ripard +--- + .../allwinner/sun50i-h6-orangepi-one-plus.dts | 33 +++++++++++++++++++ + 1 file changed, 33 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts +index 83aab7368889..fceb298bfd53 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts +@@ -7,4 +7,37 @@ + / { + model = "OrangePi One Plus"; + compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6"; ++ ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ ++ vin-supply = <®_aldo2>; ++ }; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ext_rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_gmac_3v3>; ++ allwinner,rx-delay-ps = <200>; ++ allwinner,tx-delay-ps = <200>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; + }; +-- +2.26.0 + +From 2345b744f4f911713dcada64ea16a614f5be9328 Mon Sep 17 00:00:00 2001 +From: Marcus Cooper +Date: Sun, 8 Mar 2020 17:48:40 +0100 +Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Enable HDMI + +Both, OrangePi One Plus and OrangePi Lite 2 have HDMI output. Enable it +in common DTSI. + +Signed-off-by: Marcus Cooper +[patch split and commit message] +Signed-off-by: Jernej Skrabec +Reviewed-by: Christopher Obbard +Tested-by: Christopher Obbard +Signed-off-by: Maxime Ripard +--- + .../dts/allwinner/sun50i-h6-orangepi.dtsi | 26 +++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +index 37fc3f3697f7..9287976c4a50 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +@@ -20,6 +20,18 @@ chosen { + stdout-path = "serial0:115200n8"; + }; + ++ connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ + ext_osc32k: ext_osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; +@@ -52,6 +64,10 @@ reg_vcc5v: vcc5v { + }; + }; + ++&de { ++ status = "okay"; ++}; ++ + &ehci0 { + status = "okay"; + }; +@@ -65,6 +81,16 @@ &gpu { + status = "okay"; + }; + ++&hdmi { ++ status = "okay"; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ + &mmc0 { + vmmc-supply = <®_cldo1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; +-- +2.26.0 + +From 7ad9f3d0cb2f2b886c068f99e791bd41ceb0677a Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Mon, 24 Feb 2020 17:54:46 +0100 +Subject: [PATCH] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This enables passive cooling by down-regulating CPU voltage +and frequency. + +For trip points, I used a slightly lowered values from the BSP +code. The critical temperature of 110°C from BSP code seemed +like a lot, so I rounded it off to 100°C. + +The critical trip point value is 30°C above the maximum recommended +ambient temperature (70°C) for the SoC from the datasheet, so there's +some headroom even at such a high ambient temperature. + +Signed-off-by: Ondrej Jirman +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sun8i-h3.dtsi | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index 20217e2ca4d3..e83aa6866e7e 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -41,6 +41,7 @@ + */ + + #include "sunxi-h3-h5.dtsi" ++#include + + / { + cpu0_opp_table: opp_table0 { +@@ -227,6 +228,30 @@ cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 0>; ++ ++ trips { ++ cpu_hot_trip: cpu-hot { ++ temperature = <80000>; ++ hysteresis = <2000>; ++ type = "passive"; ++ }; ++ ++ cpu_very_hot_trip: cpu-very-hot { ++ temperature = <100000>; ++ hysteresis = <0>; ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ cpu-hot-limit { ++ trip = <&cpu_hot_trip>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; + }; + }; + }; +-- +2.26.0 + From da749b7acf55053a268b12790a43374d350df65b Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 4 Apr 2020 21:22:14 +0200 Subject: [PATCH 2/3] Allwinner: Improve OrangePi Lite2 support --- .../linux/18-OrangePi-Lite2-support.patch | 230 ++++++++++++++++++ 1 file changed, 230 insertions(+) create mode 100644 projects/Allwinner/devices/H6/patches/linux/18-OrangePi-Lite2-support.patch diff --git a/projects/Allwinner/devices/H6/patches/linux/18-OrangePi-Lite2-support.patch b/projects/Allwinner/devices/H6/patches/linux/18-OrangePi-Lite2-support.patch new file mode 100644 index 0000000000..90ed61b4ca --- /dev/null +++ b/projects/Allwinner/devices/H6/patches/linux/18-OrangePi-Lite2-support.patch @@ -0,0 +1,230 @@ +From 9b743eadc7adb8a5ffe79742ea3925d2903788f2 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sat, 4 Apr 2020 20:42:41 +0200 +Subject: [PATCH 1/4] arm64: dts: allwinner: h6: orangepi: Add gpio power + supply + +OrangePi Lite2 and One Plus have GPIO ports powered by same power +supplies. Add them in common DT. + +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +index 9287976c4a50..f1be3dd558ca 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +@@ -106,6 +106,12 @@ &ohci3 { + status = "okay"; + }; + ++&pio { ++ vcc-pc-supply = <®_bldo2>; ++ vcc-pd-supply = <®_cldo1>; ++ vcc-pg-supply = <®_aldo1>; ++}; ++ + &r_i2c { + status = "okay"; + +@@ -230,6 +236,10 @@ &r_ir { + status = "okay"; + }; + ++&r_pio { ++ vcc-pm-supply = <®_bldo3>; ++}; ++ + &rtc { + clocks = <&ext_osc32k>; + }; +-- +2.26.0 + + +From d98355dc8de0a3075a49f6ecb103dd67e68ac0c8 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sat, 4 Apr 2020 20:55:52 +0200 +Subject: [PATCH 2/4] arm64: dts: allwinner: h6: orangepi: Disable OTG mode + +As can be seen from OrangePi Lite 2 and One Plus schematics, VBUS pin on +USB OTG port is directly connected to 5 V power supply. This mean that +OTG port can safely operate only in host mode, even though these two +boards have ID pin connected. + +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +index f1be3dd558ca..ebc120a9232f 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +@@ -251,7 +251,12 @@ &uart0 { + }; + + &usb2otg { +- dr_mode = "otg"; ++ /* ++ * OrangePi Lite 2 and One Plus, where this DT is used, don't ++ * have a controllable VBUS even though they do have an ID pin. ++ * Using it as anything but a USB host is unsafe. ++ */ ++ dr_mode = "host"; + status = "okay"; + }; + +-- +2.26.0 + + +From 0e4de8b92b2cab1e4dbeef5ef2913b745b25c39f Mon Sep 17 00:00:00 2001 +From: Sebastian Meyer +Date: Mon, 3 Feb 2020 21:06:07 +0100 +Subject: [PATCH 3/4] arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI + combo module + +OrangePi Lite2 has AP6255 BT+WIFI combo chip. Add support for it. + +Signed-off-by: Sebastian Meyer +[merged BT and WIFI patches and updated commit message] +Signed-off-by: Jernej Skrabec +--- + .../allwinner/sun50i-h6-orangepi-lite2.dts | 65 +++++++++++++++++++ + 1 file changed, 65 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +index e7ca75c0d0f7..e8770858b5d0 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +@@ -6,4 +6,69 @@ + / { + model = "OrangePi Lite2"; + compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; ++ ++ aliases { ++ serial1 = &uart1; /* BT-UART */ ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rtc 1>; ++ clock-names = "ext_clock"; ++ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_cldo2>; ++ vqmmc-supply = <®_bldo3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcm: sdio-wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&r_pio>; ++ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++®_cldo2 { ++ /* ++ * This regulator is connected with CLDO3. ++ * Before the kernel can support synchronized ++ * enable of coupled regulators, keep them ++ * both always on as a ugly hack. ++ */ ++ regulator-always-on; ++}; ++ ++®_cldo3 { ++ /* ++ * This regulator is connected with CLDO2. ++ * See the comments for CLDO2. ++ */ ++ regulator-always-on; ++}; ++ ++/* There's the BT part of the AP6255 connected to that UART */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rtc 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ ++ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ ++ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ ++ max-speed = <1500000>; ++ }; + }; +-- +2.26.0 + + +From e087c727b23ed0665136973e24a0292c14522723 Mon Sep 17 00:00:00 2001 +From: Sebastian Meyer +Date: Mon, 3 Feb 2020 21:27:47 +0100 +Subject: [PATCH 4/4] arm64: allwinner: h6: Enable USB3 for OrangePi Lite2 + +Signed-off-by: Sebastian Meyer +--- + .../allwinner/sun50i-h6-orangepi-lite2.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +index e8770858b5d0..6ca46b1cabb9 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +@@ -11,6 +11,16 @@ aliases { + serial1 = &uart1; /* BT-UART */ + }; + ++ reg_usb_vbus: vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ startup-delay-us = <100000>; ++ gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 USB0-DRVVBUS */ ++ enable-active-high; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; +@@ -20,6 +30,10 @@ wifi_pwrseq: wifi_pwrseq { + }; + }; + ++&dwc3 { ++ status = "okay"; ++}; ++ + &mmc1 { + vmmc-supply = <®_cldo2>; + vqmmc-supply = <®_bldo3>; +@@ -72,3 +86,8 @@ bluetooth { + max-speed = <1500000>; + }; + }; ++ ++&usb3phy { ++ phy-supply = <®_usb_vbus>; ++ status = "okay"; ++}; +-- +2.26.0 + From 7a86df990c7f0dc16b9579aad86f257bd6f13c71 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Sat, 4 Apr 2020 21:25:43 +0200 Subject: [PATCH 3/3] uboot_helper: H6: Add orangepi-lite2 board --- scripts/uboot_helper | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/uboot_helper b/scripts/uboot_helper index b9eaf4e9cd..0f4b594a83 100755 --- a/scripts/uboot_helper +++ b/scripts/uboot_helper @@ -122,6 +122,10 @@ devices = \ 'dtb': 'sun50i-h6-orangepi-3.dtb', 'config': 'orangepi_3_defconfig' }, + 'orangepi-lite2': { + 'dtb': 'sun50i-h6-orangepi-lite2.dtb', + 'config': 'orangepi_lite2_defconfig' + }, 'orangepi-one-plus': { 'dtb': 'sun50i-h6-orangepi-one-plus.dtb', 'config': 'orangepi_one_plus_defconfig'