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u-boot: add temp amlogic G12 support patches
This commit is contained in:
chewitt
parent
2cccc6c9bd
commit
c66f66395b
2536
packages/tools/u-boot/patches/u-boot-0001-amlogic-g12.patch
Normal file
2536
packages/tools/u-boot/patches/u-boot-0001-amlogic-g12.patch
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File diff suppressed because it is too large
Load Diff
536
packages/tools/u-boot/patches/u-boot-0002-amlogic-g12.patch
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536
packages/tools/u-boot/patches/u-boot-0002-amlogic-g12.patch
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@ -0,0 +1,536 @@
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From 0d84acb00a108d4664e52a156d0d6e80f1a6e6cd Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Mon, 22 Jul 2019 11:27:59 +0200
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Subject: [PATCH] ARM: dts: add support for Odroid-N2
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Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370
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("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC.
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Tested-by: Mark Kettenis <kettenis@openbsd.org>
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---
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arch/arm/dts/Makefile | 3 +-
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arch/arm/dts/meson-g12b-odroid-n2.dts | 386 ++++++++++++++++++
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arch/arm/dts/meson-g12b.dtsi | 82 ++++
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.../dt-bindings/sound/meson-g12a-tohdmitx.h | 13 +
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4 files changed, 483 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/dts/meson-g12b-odroid-n2.dts
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create mode 100644 arch/arm/dts/meson-g12b.dtsi
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create mode 100644 include/dt-bindings/sound/meson-g12a-tohdmitx.h
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index b437f7500c..70a9bc278c 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -135,7 +135,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
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meson-gxl-s905x-khadas-vim.dtb \
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meson-gxm-khadas-vim2.dtb \
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meson-axg-s400.dtb \
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- meson-g12a-u200.dtb
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+ meson-g12a-u200.dtb \
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+ meson-g12b-odroid-n2.dtb
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dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra20-medcom-wide.dtb \
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tegra20-paz00.dtb \
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diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts
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new file mode 100644
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index 0000000000..81780ffcc7
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--- /dev/null
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+++ b/arch/arm/dts/meson-g12b-odroid-n2.dts
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@@ -0,0 +1,386 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 BayLibre, SAS
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+ * Author: Neil Armstrong <narmstrong@baylibre.com>
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+ */
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+
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+/dts-v1/;
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+
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+#include "meson-g12b.dtsi"
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/meson-g12a-gpio.h>
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+#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
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+
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+/ {
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+ compatible = "hardkernel,odroid-n2", "amlogic,g12b";
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+ model = "Hardkernel ODROID-N2";
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+
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+ aliases {
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+ serial0 = &uart_AO;
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+ ethernet0 = ðmac;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x0 0x0 0x0 0x40000000>;
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+ };
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+
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+ emmc_pwrseq: emmc-pwrseq {
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+ compatible = "mmc-pwrseq-emmc";
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+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ blue {
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+ label = "n2:blue";
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+ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ tflash_vdd: regulator-tflash_vdd {
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+ compatible = "regulator-fixed";
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+
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+ regulator-name = "TFLASH_VDD";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ tf_io: gpio-regulator-tf_io {
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+ compatible = "regulator-gpio";
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+
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+ regulator-name = "TF_IO";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0>;
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+
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+ states = <3300000 0
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+ 1800000 1>;
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+ };
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+
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+ flash_1v8: regulator-flash_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "FLASH_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ main_12v: regulator-main_12v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "12V";
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_5v: regulator-vcc_5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ vin-supply = <&main_12v>;
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+ };
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+
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+ vcc_1v8: regulator-vcc_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_3v3: regulator-vcc_3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VCC_3V3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vddao_3v3>;
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+ regulator-always-on;
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+ /* FIXME: actually controlled by VDDCPU_B_EN */
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+ };
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+
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+ hub_5v: regulator-hub_5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "HUB_5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_5v>;
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+
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+ /* Connected to the Hub CHIPENABLE, LOW sets low power state */
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+ gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ usb_pwr_en: regulator-usb_pwr_en {
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+ compatible = "regulator-fixed";
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+ regulator-name = "USB_PWR_EN";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_5v>;
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+
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+ /* Connected to the microUSB port power enable */
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+ gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ vddao_1v8: regulator-vddao_1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDAO_1V8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vddao_3v3>;
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+ regulator-always-on;
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+ };
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+
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+ vddao_3v3: regulator-vddao_3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "VDDAO_3V3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&main_12v>;
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+ regulator-always-on;
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+ };
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+
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+ hdmi-connector {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_connector_in: endpoint {
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+ remote-endpoint = <&hdmi_tx_tmds_out>;
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+ };
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+ };
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+ };
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+
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+ sound {
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+ compatible = "amlogic,axg-sound-card";
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+ model = "G12A-ODROIDN2";
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+ audio-aux-devs = <&tdmout_b>;
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+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
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+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
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+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
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+ "TDM_B Playback", "TDMOUT_B OUT";
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+
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+ assigned-clocks = <&clkc CLKID_MPLL2>,
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+ <&clkc CLKID_MPLL0>,
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+ <&clkc CLKID_MPLL1>;
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+ assigned-clock-parents = <0>, <0>, <0>;
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+ assigned-clock-rates = <294912000>,
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+ <270950400>,
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+ <393216000>;
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+ status = "okay";
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+
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+ dai-link-0 {
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+ sound-dai = <&frddr_a>;
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+ };
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+
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+ dai-link-1 {
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+ sound-dai = <&frddr_b>;
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+ };
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+
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+ dai-link-2 {
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+ sound-dai = <&frddr_c>;
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+ };
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+
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+ /* 8ch hdmi interface */
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+ dai-link-3 {
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+ sound-dai = <&tdmif_b>;
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+ dai-format = "i2s";
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+ dai-tdm-slot-tx-mask-0 = <1 1>;
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+ dai-tdm-slot-tx-mask-1 = <1 1>;
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+ dai-tdm-slot-tx-mask-2 = <1 1>;
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+ dai-tdm-slot-tx-mask-3 = <1 1>;
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+ mclk-fs = <256>;
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+
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+ codec {
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+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
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+ };
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+ };
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+
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+ /* hdmi glue */
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+ dai-link-4 {
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+ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
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+
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+ codec {
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+ sound-dai = <&hdmi_tx>;
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+ };
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+ };
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+ };
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+};
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+
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+&arb {
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+ status = "okay";
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+};
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+
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+&cec_AO {
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+ pinctrl-0 = <&cec_ao_a_h_pins>;
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+ pinctrl-names = "default";
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+ status = "disabled";
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+ hdmi-phandle = <&hdmi_tx>;
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+};
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+
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+&cecb_AO {
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+ pinctrl-0 = <&cec_ao_b_h_pins>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+ hdmi-phandle = <&hdmi_tx>;
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+};
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+
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+&clkc_audio {
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+ status = "okay";
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+};
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+
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+&ext_mdio {
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+ external_phy: ethernet-phy@0 {
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+ /* Realtek RTL8211F (0x001cc916) */
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+ reg = <0>;
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+ max-speed = <1000>;
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+
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <30000>;
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+ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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+
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+ interrupt-parent = <&gpio_intc>;
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+ /* MAC_INTR on GPIOZ_14 */
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+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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+ };
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+};
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+
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+ðmac {
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+ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
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+ pinctrl-names = "default";
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+ status = "okay";
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+ phy-mode = "rgmii";
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+ phy-handle = <&external_phy>;
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+ amlogic,tx-delay-ns = <2>;
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+};
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+
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+&frddr_a {
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+ status = "okay";
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+};
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+
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+&frddr_b {
|
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+ status = "okay";
|
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+};
|
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+
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+&frddr_c {
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+ status = "okay";
|
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+};
|
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+
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+&gpio {
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+ /*
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+ * WARNING: The USB Hub on the Odroid-N2 needs a reset signal
|
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+ * to be turned high in order to be detected by the USB Controller
|
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+ * This signal should be handled by a USB specific power sequence
|
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+ * in order to reset the Hub when USB bus is powered down.
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+ */
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+ usb-hub {
|
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+ gpio-hog;
|
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+ gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
|
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+ output-high;
|
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+ line-name = "usb-hub-reset";
|
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+ };
|
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+};
|
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+
|
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+&hdmi_tx {
|
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+ status = "okay";
|
||||
+ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ hdmi-supply = <&vcc_5v>;
|
||||
+};
|
||||
+
|
||||
+&hdmi_tx_tmds_port {
|
||||
+ hdmi_tx_tmds_out: endpoint {
|
||||
+ remote-endpoint = <&hdmi_connector_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ir {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&remote_input_ao_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+/* SD card */
|
||||
+&sd_emmc_b {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&sdcard_c_pins>;
|
||||
+ pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ max-frequency = <50000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
+ vmmc-supply = <&tflash_vdd>;
|
||||
+ vqmmc-supply = <&tf_io>;
|
||||
+
|
||||
+};
|
||||
+
|
||||
+/* eMMC */
|
||||
+&sd_emmc_c {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
|
||||
+ pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
+ pinctrl-names = "default", "clk-gate";
|
||||
+
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ max-frequency = <200000000>;
|
||||
+ disable-wp;
|
||||
+
|
||||
+ mmc-pwrseq = <&emmc_pwrseq>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&flash_1v8>;
|
||||
+};
|
||||
+
|
||||
+&tdmif_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmout_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tohdmitx {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart_AO {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&uart_ao_a_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+};
|
||||
+
|
||||
+&usb {
|
||||
+ status = "okay";
|
||||
+ vbus-supply = <&usb_pwr_en>;
|
||||
+};
|
||||
+
|
||||
+&usb2_phy0 {
|
||||
+ phy-supply = <&vcc_5v>;
|
||||
+};
|
||||
+
|
||||
+&usb2_phy1 {
|
||||
+ /* Enable the hub which is connected to this port */
|
||||
+ phy-supply = <&hub_5v>;
|
||||
+};
|
||||
diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi
|
||||
new file mode 100644
|
||||
index 0000000000..9e88e513b2
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/meson-g12b.dtsi
|
||||
@@ -0,0 +1,82 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2019 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include "meson-g12a.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "amlogic,g12b";
|
||||
+
|
||||
+ cpus {
|
||||
+ cpu-map {
|
||||
+ cluster0 {
|
||||
+ core0 {
|
||||
+ cpu = <&cpu0>;
|
||||
+ };
|
||||
+
|
||||
+ core1 {
|
||||
+ cpu = <&cpu1>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ cluster1 {
|
||||
+ core0 {
|
||||
+ cpu = <&cpu100>;
|
||||
+ };
|
||||
+
|
||||
+ core1 {
|
||||
+ cpu = <&cpu101>;
|
||||
+ };
|
||||
+
|
||||
+ core2 {
|
||||
+ cpu = <&cpu102>;
|
||||
+ };
|
||||
+
|
||||
+ core3 {
|
||||
+ cpu = <&cpu103>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /delete-node/ cpu@2;
|
||||
+ /delete-node/ cpu@3;
|
||||
+
|
||||
+ cpu100: cpu@100 {
|
||||
+ device_type = "cpu";
|
||||
+ compatible = "arm,cortex-a73";
|
||||
+ reg = <0x0 0x100>;
|
||||
+ enable-method = "psci";
|
||||
+ next-level-cache = <&l2>;
|
||||
+ };
|
||||
+
|
||||
+ cpu101: cpu@101 {
|
||||
+ device_type = "cpu";
|
||||
+ compatible = "arm,cortex-a73";
|
||||
+ reg = <0x0 0x101>;
|
||||
+ enable-method = "psci";
|
||||
+ next-level-cache = <&l2>;
|
||||
+ };
|
||||
+
|
||||
+ cpu102: cpu@102 {
|
||||
+ device_type = "cpu";
|
||||
+ compatible = "arm,cortex-a73";
|
||||
+ reg = <0x0 0x102>;
|
||||
+ enable-method = "psci";
|
||||
+ next-level-cache = <&l2>;
|
||||
+ };
|
||||
+
|
||||
+ cpu103: cpu@103 {
|
||||
+ device_type = "cpu";
|
||||
+ compatible = "arm,cortex-a73";
|
||||
+ reg = <0x0 0x103>;
|
||||
+ enable-method = "psci";
|
||||
+ next-level-cache = <&l2>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&clkc {
|
||||
+ compatible = "amlogic,g12b-clkc";
|
||||
+};
|
||||
diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
|
||||
new file mode 100644
|
||||
index 0000000000..c5e1f48d30
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
|
||||
@@ -0,0 +1,13 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+#ifndef __DT_MESON_G12A_TOHDMITX_H
|
||||
+#define __DT_MESON_G12A_TOHDMITX_H
|
||||
+
|
||||
+#define TOHDMITX_I2S_IN_A 0
|
||||
+#define TOHDMITX_I2S_IN_B 1
|
||||
+#define TOHDMITX_I2S_IN_C 2
|
||||
+#define TOHDMITX_I2S_OUT 3
|
||||
+#define TOHDMITX_SPDIF_IN_A 4
|
||||
+#define TOHDMITX_SPDIF_IN_B 5
|
||||
+#define TOHDMITX_SPDIF_OUT 6
|
||||
+
|
||||
+#endif /* __DT_MESON_G12A_TOHDMITX_H */
|
||||
--
|
||||
2.21.0
|
||||
|
||||
63
packages/tools/u-boot/patches/u-boot-0003-amlogic-g12.patch
Normal file
63
packages/tools/u-boot/patches/u-boot-0003-amlogic-g12.patch
Normal file
@ -0,0 +1,63 @@
|
||||
From 5e5db096a323377cb59e5ce438b4581a7c664674 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 22 Jul 2019 11:32:50 +0200
|
||||
Subject: [PATCH] ARM: meson-g12a: Handle 4GiB DRAM size
|
||||
|
||||
When configured with 4GiB DRAM size, only 3.8GiB is available, the
|
||||
I/O beeing mapped in the last 256MiB of the first 4GiB physical memory/
|
||||
|
||||
First fixup the mm_region to handle the first 3.8GiB as memory and the
|
||||
last 256MiB as I/O.
|
||||
|
||||
Then limit the real memory reported by the firmware to the available
|
||||
physical space, 3.8GiB aligned with the mm_region memory zone size.
|
||||
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Tested-by: Mark Kettenis <kettenis@openbsd.org>
|
||||
---
|
||||
arch/arm/mach-meson/board-g12a.c | 13 +++++++------
|
||||
1 file changed, 7 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c
|
||||
index 1652970fbd..546b9f6039 100644
|
||||
--- a/arch/arm/mach-meson/board-g12a.c
|
||||
+++ b/arch/arm/mach-meson/board-g12a.c
|
||||
@@ -62,21 +62,21 @@ void meson_init_reserved_memory(void *fdt)
|
||||
phys_size_t get_effective_memsize(void)
|
||||
{
|
||||
/* Size is reported in MiB, convert it in bytes */
|
||||
- return ((readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_MEM_SIZE_MASK)
|
||||
- >> G12A_AO_MEM_SIZE_SHIFT) * SZ_1M;
|
||||
+ return min(((readl(G12A_AO_SEC_GP_CFG0) & G12A_AO_MEM_SIZE_MASK)
|
||||
+ >> G12A_AO_MEM_SIZE_SHIFT) * SZ_1M, 0xf5000000);
|
||||
}
|
||||
|
||||
static struct mm_region g12a_mem_map[] = {
|
||||
{
|
||||
.virt = 0x0UL,
|
||||
.phys = 0x0UL,
|
||||
- .size = 0x80000000UL,
|
||||
+ .size = 0xf5000000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE
|
||||
}, {
|
||||
- .virt = 0xf0000000UL,
|
||||
- .phys = 0xf0000000UL,
|
||||
- .size = 0x10000000UL,
|
||||
+ .virt = 0xf5000000UL,
|
||||
+ .phys = 0xf5000000UL,
|
||||
+ .size = 0x0b000000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
@@ -129,6 +129,7 @@ void meson_eth_init(phy_interface_t mode, unsigned int flags)
|
||||
G12A_ETH_REG_0_TX_RATIO(4) |
|
||||
G12A_ETH_REG_0_PHY_CLK_EN |
|
||||
G12A_ETH_REG_0_CLK_EN);
|
||||
+ g12a_enable_external_mdio();
|
||||
break;
|
||||
|
||||
case PHY_INTERFACE_MODE_RMII:
|
||||
--
|
||||
2.21.0
|
||||
|
||||
423
packages/tools/u-boot/patches/u-boot-0004-amlogic-g12.patch
Normal file
423
packages/tools/u-boot/patches/u-boot-0004-amlogic-g12.patch
Normal file
@ -0,0 +1,423 @@
|
||||
From b160fac9f7a9dc8021e2ad31e94a1460d1c51ff1 Mon Sep 17 00:00:00 2001
|
||||
From: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Date: Mon, 22 Jul 2019 11:36:14 +0200
|
||||
Subject: [PATCH] board: amlogic: add support for Odroid-N2
|
||||
|
||||
ODROID-N2 is a single board computer manufactured by Hardkernel Co. Ltd
|
||||
with the following specifications:
|
||||
|
||||
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
|
||||
- 4GB DDR4 SDRAM
|
||||
- Gigabit Ethernet
|
||||
- HDMI 2.1 4K/60Hz display
|
||||
- 40-pin GPIO header
|
||||
- 4 x USB 3.0 Host, 1 x USB OTG
|
||||
- eMMC, microSD
|
||||
- Infrared receiver
|
||||
|
||||
The board directory is W400, the name of the Amlogic Reference Design
|
||||
of Amlogic G12B with Gigabit boards, which will be used for similar
|
||||
boards.
|
||||
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
Tested-by: Mark Kettenis <kettenis@openbsd.org>
|
||||
---
|
||||
board/amlogic/w400/MAINTAINERS | 6 ++
|
||||
board/amlogic/w400/Makefile | 6 ++
|
||||
board/amlogic/w400/README.odroid-n2 | 130 ++++++++++++++++++++++++++++
|
||||
board/amlogic/w400/README.w400 | 130 ++++++++++++++++++++++++++++
|
||||
board/amlogic/w400/w400.c | 18 ++++
|
||||
configs/odroid-n2_defconfig | 56 ++++++++++++
|
||||
6 files changed, 346 insertions(+)
|
||||
create mode 100644 board/amlogic/w400/MAINTAINERS
|
||||
create mode 100644 board/amlogic/w400/Makefile
|
||||
create mode 100644 board/amlogic/w400/README.odroid-n2
|
||||
create mode 100644 board/amlogic/w400/README.w400
|
||||
create mode 100644 board/amlogic/w400/w400.c
|
||||
create mode 100644 configs/odroid-n2_defconfig
|
||||
|
||||
diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS
|
||||
new file mode 100644
|
||||
index 0000000000..6e68fa73f7
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/MAINTAINERS
|
||||
@@ -0,0 +1,6 @@
|
||||
+W400
|
||||
+M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+S: Maintained
|
||||
+L: u-boot-amlogic@groups.io
|
||||
+F: board/amlogic/w400/
|
||||
+F: configs/odroid-n2_defconfig
|
||||
diff --git a/board/amlogic/w400/Makefile b/board/amlogic/w400/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..fac4a73afa
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/Makefile
|
||||
@@ -0,0 +1,6 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+#
|
||||
+# (C) Copyright 2019 BayLibre, SAS
|
||||
+# Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+
|
||||
+obj-y := w400.o
|
||||
diff --git a/board/amlogic/w400/README.odroid-n2 b/board/amlogic/w400/README.odroid-n2
|
||||
new file mode 100644
|
||||
index 0000000000..a8f2c3d7da
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/README.odroid-n2
|
||||
@@ -0,0 +1,130 @@
|
||||
+U-Boot for ODROID-N2
|
||||
+====================
|
||||
+
|
||||
+ODROID-N2 is a single board computer manufactured by Hardkernel
|
||||
+Co. Ltd with the following specifications:
|
||||
+
|
||||
+ - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
|
||||
+ - 4GB DDR4 SDRAM
|
||||
+ - Gigabit Ethernet
|
||||
+ - HDMI 2.1 4K/60Hz display
|
||||
+ - 40-pin GPIO header
|
||||
+ - 4 x USB 3.0 Host, 1 x USB OTG
|
||||
+ - eMMC, microSD
|
||||
+ - Infrared receiver
|
||||
+
|
||||
+Schematics are available on the manufacturer website.
|
||||
+
|
||||
+Currently the u-boot port supports the following devices:
|
||||
+ - serial
|
||||
+ - eMMC, microSD
|
||||
+ - Ethernet
|
||||
+ - I2C
|
||||
+ - Regulators
|
||||
+ - Reset controller
|
||||
+ - Clock controller
|
||||
+ - ADC
|
||||
+
|
||||
+u-boot compilation
|
||||
+==================
|
||||
+
|
||||
+ > export ARCH=arm
|
||||
+ > export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ > make odroid-n2_defconfig
|
||||
+ > make
|
||||
+
|
||||
+Image creation
|
||||
+==============
|
||||
+
|
||||
+Amlogic doesn't provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image, so it is necessary to obtain them from
|
||||
+the git tree published by the board vendor:
|
||||
+
|
||||
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
|
||||
+
|
||||
+ > DIR=odroid-n2
|
||||
+ > git clone --depth 1 \
|
||||
+ https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 \
|
||||
+ $DIR
|
||||
+
|
||||
+ > cd odroid-n2
|
||||
+ > make odroidn2_defconfig
|
||||
+ > make
|
||||
+ > export UBOOTDIR=$PWD
|
||||
+
|
||||
+ Go back to mainline U-Boot source tree then :
|
||||
+ > mkdir fip
|
||||
+
|
||||
+ > wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
|
||||
+ > cp $UBOOTDIR/build/scp_task/bl301.bin fip/
|
||||
+ > cp $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/bl2.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/bl30.bin fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/bl31.img fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/piei.fw fip/
|
||||
+ > cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
|
||||
+ > cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl2.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/acs.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
|
||||
+ --output fip/bl30_new.bin.g12a.enc \
|
||||
+ --level v3
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
|
||||
+ --output fip/bl30_new.bin.enc \
|
||||
+ --level v3 --type bl30
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
|
||||
+ --output fip/bl31.img.enc \
|
||||
+ --level v3 --type bl31
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
|
||||
+ --output fip/bl33.bin.enc \
|
||||
+ --level v3 --type bl33 --compress lz4
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
|
||||
+ --output fip/bl2.n.bin.sig
|
||||
+ > $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc \
|
||||
+ --ddrfw1 fip/ddr4_1d.fw \
|
||||
+ --ddrfw2 fip/ddr4_2d.fw \
|
||||
+ --ddrfw3 fip/ddr3_1d.fw \
|
||||
+ --ddrfw4 fip/piei.fw \
|
||||
+ --ddrfw5 fip/lpddr4_1d.fw \
|
||||
+ --ddrfw6 fip/lpddr4_2d.fw \
|
||||
+ --ddrfw7 fip/diag_lpddr4.fw \
|
||||
+ --ddrfw8 fip/aml_ddr.fw \
|
||||
+ --level v3
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+ > DEV=/dev/your_sd_device
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
diff --git a/board/amlogic/w400/README.w400 b/board/amlogic/w400/README.w400
|
||||
new file mode 100644
|
||||
index 0000000000..25b786d817
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/README.w400
|
||||
@@ -0,0 +1,130 @@
|
||||
+U-Boot for Amlogic W400
|
||||
+=======================
|
||||
+
|
||||
+U200 is a reference board manufactured by Amlogic with the following
|
||||
+specifications:
|
||||
+
|
||||
+ - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
|
||||
+ - 2GB DDR4 SDRAM
|
||||
+ - 10/100 Ethernet (Internal PHY)
|
||||
+ - 1 x USB 3.0 Host
|
||||
+ - eMMC
|
||||
+ - SDcard
|
||||
+ - Infrared receiver
|
||||
+ - SDIO WiFi Module
|
||||
+ - MIPI DSI Connector
|
||||
+ - Audio HAT Connector
|
||||
+ - PCI-E M.2 Connector
|
||||
+
|
||||
+Schematics are available from Amlogic on demand.
|
||||
+
|
||||
+Currently the u-boot port supports the following devices:
|
||||
+ - serial
|
||||
+ - Ethernet
|
||||
+ - Regulators
|
||||
+ - Clock controller
|
||||
+
|
||||
+u-boot compilation
|
||||
+==================
|
||||
+
|
||||
+ > export ARCH=arm
|
||||
+ > export CROSS_COMPILE=aarch64-none-elf-
|
||||
+ > make w400_defconfig
|
||||
+ > make
|
||||
+
|
||||
+Image creation
|
||||
+==============
|
||||
+
|
||||
+Amlogic doesn't provide sources for the firmware and for tools needed
|
||||
+to create the bootloader image, so it is necessary to obtain them from
|
||||
+the git tree published by the board vendor:
|
||||
+
|
||||
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
|
||||
+ > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
|
||||
+ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
|
||||
+ > git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
|
||||
+ > cd amlogic-u-boot
|
||||
+ > make g12b_w400_v1_defconfig
|
||||
+ > make
|
||||
+ > export UBOOTDIR=$PWD
|
||||
+
|
||||
+Download the latest Amlogic Buildroot package, and extract it :
|
||||
+ > wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
|
||||
+ > tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
|
||||
+ > export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
|
||||
+ > export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
|
||||
+
|
||||
+Go back to mainline U-Boot source tree then :
|
||||
+ > mkdir fip
|
||||
+
|
||||
+ > wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
|
||||
+ > cp $UBOOTDIR/build/scp_task/bl301.bin fip/
|
||||
+ > cp $UBOOTDIR/build/board/amlogic/g12b_w400_v1/firmware/acs.bin fip/
|
||||
+ > cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12b/bl2.bin fip/
|
||||
+ > cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12b/bl30.bin fip/
|
||||
+ > cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12b/bl31.img fip/
|
||||
+ > cp $FIPDIR/g12b/ddr3_1d.fw fip/
|
||||
+ > cp $FIPDIR/g12b/ddr4_1d.fw fip/
|
||||
+ > cp $FIPDIR/g12b/ddr4_2d.fw fip/
|
||||
+ > cp $FIPDIR/g12b/diag_lpddr4.fw fip/
|
||||
+ > cp $FIPDIR/g12b/lpddr4_1d.fw fip/
|
||||
+ > cp $FIPDIR/g12b/lpddr4_2d.fw fip/
|
||||
+ > cp $FIPDIR/g12b/piei.fw fip/
|
||||
+ > cp $FIPDIR/g12b/aml_ddr.fw fip/
|
||||
+ > cp u-boot.bin fip/bl33.bin
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl30.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl30_zero.bin \
|
||||
+ fip/bl301.bin \
|
||||
+ fip/bl301_zero.bin \
|
||||
+ fip/bl30_new.bin \
|
||||
+ bl30
|
||||
+
|
||||
+ > sh fip/blx_fix.sh \
|
||||
+ fip/bl2.bin \
|
||||
+ fip/zero_tmp \
|
||||
+ fip/bl2_zero.bin \
|
||||
+ fip/acs.bin \
|
||||
+ fip/bl21_zero.bin \
|
||||
+ fip/bl2_new.bin \
|
||||
+ bl2
|
||||
+
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
|
||||
+ --output fip/bl30_new.bin.g12a.enc \
|
||||
+ --level v3
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
|
||||
+ --output fip/bl30_new.bin.enc \
|
||||
+ --level v3 --type bl30
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
|
||||
+ --output fip/bl31.img.enc \
|
||||
+ --level v3 --type bl31
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
|
||||
+ --output fip/bl33.bin.enc \
|
||||
+ --level v3 --type bl33
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
|
||||
+ --output fip/bl2.n.bin.sig
|
||||
+ > $FIPDIR/g12b/aml_encrypt_g12b --bootmk \
|
||||
+ --output fip/u-boot.bin \
|
||||
+ --bl2 fip/bl2.n.bin.sig \
|
||||
+ --bl30 fip/bl30_new.bin.enc \
|
||||
+ --bl31 fip/bl31.img.enc \
|
||||
+ --bl33 fip/bl33.bin.enc \
|
||||
+ --ddrfw1 fip/ddr4_1d.fw \
|
||||
+ --ddrfw2 fip/ddr4_2d.fw \
|
||||
+ --ddrfw3 fip/ddr3_1d.fw \
|
||||
+ --ddrfw4 fip/piei.fw \
|
||||
+ --ddrfw5 fip/lpddr4_1d.fw \
|
||||
+ --ddrfw6 fip/lpddr4_2d.fw \
|
||||
+ --ddrfw7 fip/diag_lpddr4.fw \
|
||||
+ --ddrfw8 fip/aml_ddr.fw \
|
||||
+ --level v3
|
||||
+
|
||||
+and then write the image to SD with:
|
||||
+
|
||||
+ > DEV=/dev/your_sd_device
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
+ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
|
||||
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
|
||||
new file mode 100644
|
||||
index 0000000000..4737865367
|
||||
--- /dev/null
|
||||
+++ b/board/amlogic/w400/w400.c
|
||||
@@ -0,0 +1,18 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * Copyright (C) 2016 BayLibre, SAS
|
||||
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <environment.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <asm/arch/eth.h>
|
||||
+
|
||||
+int misc_init_r(void)
|
||||
+{
|
||||
+ meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig
|
||||
new file mode 100644
|
||||
index 0000000000..38d1549375
|
||||
--- /dev/null
|
||||
+++ b/configs/odroid-n2_defconfig
|
||||
@@ -0,0 +1,56 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_MESON=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x01000000
|
||||
+CONFIG_MESON_G12A=y
|
||||
+CONFIG_SYS_BOARD="w400"
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_DEBUG_UART_BASE=0xff803000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_IDENT_STRING=" odroid-n2"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+# CONFIG_CMD_BDI is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+CONFIG_OF_CONTROL=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2"
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_DM_GPIO=y
|
||||
+CONFIG_DM_MMC=y
|
||||
+CONFIG_MMC_MESON_GX=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_PINCTRL_MESON_G12A=y
|
||||
+CONFIG_DM_REGULATOR=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_DEBUG_UART_MESON=y
|
||||
+CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
+CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
+CONFIG_MESON_SERIAL=y
|
||||
+CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_HOST=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_PHY=y
|
||||
+CONFIG_MESON_G12A_USB_PHY=y
|
||||
+CONFIG_DM_USB=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+CONFIG_USB_DWC3_MESON_G12A=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
|
||||
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
|
||||
--
|
||||
2.21.0
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user