Merge pull request #5365 from knaerzche/rk-update-20210510

Rockchip update / fixes
This commit is contained in:
CvH 2021-05-10 16:33:31 +02:00 committed by GitHub
commit c9cd62887b
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
17 changed files with 659 additions and 367 deletions

View File

@ -26,7 +26,7 @@ case "${PKG_SOC}" in
PKG_LOAD_ADDR="0x200000"
;;
rk3399)
PKG_DATAFILE="${PKG_RKBIN}/rk33/rk3399_ddr_800MHz_v1.17.bin"
PKG_DATAFILE="${PKG_RKBIN}/rk33/rk3399_ddr_800MHz_v1.24.bin"
PKG_LOADER="${PKG_RKBIN}/rk33/rk3399_miniloader_v1.24.bin"
PKG_BL31="${PKG_RKBIN}/rk33/rk3399_bl31_v1.31.elf"
PKG_BL31_ADDR="0x40000"

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.10.30 Kernel Configuration
# Linux/arm 5.10.35 Kernel Configuration
#
#
@ -5524,7 +5524,7 @@ CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_PNFS_FLEXFILE_LAYOUT=y
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
CONFIG_NFS_V4_1_MIGRATION=y
CONFIG_ROOT_NFS=y

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.10.32 Kernel Configuration
# Linux/arm64 5.10.35 Kernel Configuration
#
#
@ -666,7 +666,6 @@ CONFIG_HAVE_GCC_PLUGINS=y
CONFIG_GCC_PLUGINS=y
# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
# CONFIG_GCC_PLUGIN_RANDSTRUCT_PERFORMANCE is not set
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
@ -5541,7 +5540,7 @@ CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_PNFS_FLEXFILE_LAYOUT=y
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
CONFIG_NFS_V4_1_MIGRATION=y
CONFIG_NFS_V4_SECURITY_LABEL=y

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.10.32 Kernel Configuration
# Linux/arm64 5.10.35 Kernel Configuration
#
#
@ -6235,7 +6235,7 @@ CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_PNFS_FLEXFILE_LAYOUT=y
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
CONFIG_NFS_V4_1_MIGRATION=y
CONFIG_NFS_V4_SECURITY_LABEL=y

View File

@ -33,3 +33,6 @@
# set the addon project
ADDON_PROJECT="ARMv8"
# additional packages
ADDITIONAL_PACKAGES+=" pciutils"

View File

@ -1,4 +1,4 @@
From b4b584ce10d458e20051c766f795efdb13c14fc7 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Robin Murphy <robin.murphy@arm.com>
Date: Mon, 26 Oct 2020 11:17:20 +0000
Subject: [PATCH] clk: rockchip: Add appropriate arch dependencies
@ -98,7 +98,7 @@ index 47cd6c5de837..effd05032e85 100644
help
Build the driver for RK3399 Clock Driver.
From 6a9528bb32e07fac71965605c270f4d449d4aa95 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Xu Wang <vulab@iscas.ac.cn>
Date: Fri, 27 Nov 2020 09:05:51 +0000
Subject: [PATCH] clk: rockchip: Remove redundant null check before
@ -130,7 +130,7 @@ index b443169dd408..336481bc6cc7 100644
}
EXPORT_SYMBOL_GPL(rockchip_clk_protect_critical);
From 33f193b83873d8d570ac5e4e990fc254aaf6ed9c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Wed, 18 Nov 2020 14:58:16 +0100
Subject: [PATCH] clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a
@ -253,7 +253,7 @@ index 730020fcc7fe..db8c588139de 100644
RK2928_CLKGATE_CON(0), 12, GFLAGS,
&rk3066a_i2s2_fracmux),
From e027775aa51cbaaa2828abcfa0227736ffa1b663 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Wed, 18 Nov 2020 14:58:17 +0100
Subject: [PATCH] clk: rockchip: fix i2s gate bits on rk3066 and rk3188
@ -315,7 +315,7 @@ index db8c588139de..0b76ad34de00 100644
GATE(0, "hclk_imem1", "hclk_cpu", 0, RK2928_CLKGATE_CON(4), 15, GFLAGS),
From 22fa5e351f8d8f8b139e206e545e610173860ac8 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alexandru Stan <amstan@chromium.org>
Date: Wed, 21 Oct 2020 22:04:43 -0700
Subject: [PATCH] ARM: dts: rockchip: Remove 0 point from brightness-levels on
@ -385,7 +385,7 @@ index 069f0c2c1fdf..52a84cbe7a90 100644
};
From 79b3eebc9012ed02fe41819b1544d49c1330e79b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Mon, 16 Nov 2020 16:07:56 +0100
Subject: [PATCH] ARM: dts: rockchip: rename wdt nodename to watchdog on rv1108
@ -423,7 +423,7 @@ index a1a08cb9364e..e491964b1c3d 100644
reg = <0x10360000 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
From 584d663fe6d38f0be2cd41bb20b774934ec86ec3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 30 Nov 2020 14:28:14 +0100
Subject: [PATCH] ARM: dts: rockchip: Add rtc node for VMARC SOM
@ -481,7 +481,7 @@ index 4a373f5aa600..da80bfd5f2d5 100644
drive-strength = <8>;
};
From 7338ce1b96ce9c9f034ce135150b5ce7307b162e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Fri, 23 Oct 2020 23:48:14 +0530
Subject: [PATCH] ARM: dts: rockchip: Add SDIO0 node for VMARC SOM
@ -617,7 +617,7 @@ index 5d087be04af8..7257494d2831 100644
bus-width = <8>;
mmc-hs400-1_8v;
From d6ccdfe82b00db675ff2783b4b89a303ca15f8af Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:15 +0530
Subject: [PATCH] arm64: defconfig: Enable ROCKCHIP_LVDS
@ -647,7 +647,7 @@ index 5cfe3cf6f2ac..3ebba7dcb98f 100644
CONFIG_DRM_RCAR_DW_HDMI=m
CONFIG_DRM_SUN4I=m
From 96a2300cbc54a3985ae356540822f04cf1990047 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:16 +0530
Subject: [PATCH] arm64: defconfig: Enable PHY_ROCKCHIP_INNO_DSIDPHY
@ -678,7 +678,7 @@ index 3ebba7dcb98f..d50826dd7d68 100644
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_UNIPHIER_USB2=y
From 6d5ff472008e78e2e1e0f3de8a451a3ba29a5778 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:17 +0530
Subject: [PATCH] arm64: defconfig: Enable USB_SERIAL_CP210X
@ -710,7 +710,7 @@ index d50826dd7d68..41a2d489f0a2 100644
CONFIG_USB_HSIC_USB3503=y
CONFIG_NOP_USB_XCEIV=y
From a8b4abbfd284508abb7e8eb3d18111b76e32c794 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Fri, 23 Oct 2020 23:48:13 +0530
Subject: [PATCH] arm64: defconfig: Enable RTC_DRV_HYM8563
@ -740,7 +740,7 @@ index 41a2d489f0a2..699c204090b8 100644
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_PCF85363=m
From 53d92e22359d06623f2c409198689745c0bc12d1 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Lee Jones <lee.jones@linaro.org>
Date: Tue, 3 Nov 2020 15:28:18 +0000
Subject: [PATCH] soc: rockchip: io-domain: Remove incorrect and incomplete
@ -778,7 +778,7 @@ index b29e829e815e..cf8182fc3642 100644
int grf_offset;
const char *supply_names[MAX_SUPPLIES];
From 62e33371a6343e4b64eabac5af66f916628839e4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Wed, 14 Oct 2020 22:00:29 +0200
Subject: [PATCH] dt-bindings: vendor-prefixes: Add kobol prefix
@ -810,7 +810,7 @@ index 2735be1a8470..259faf1b382c 100644
description: Kaohsiung Opto-Electronics Inc.
"^kontron,.*":
From 90c206503d82a1824a574276d7d8c3b8257258e2 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Wed, 14 Oct 2020 22:00:30 +0200
Subject: [PATCH] arm64: dts: rockchip: Add basic support for Kobol's Helios64
@ -1230,7 +1230,7 @@ index 000000000000..2a561be724b2
+ status = "okay";
+};
From 101e24cc374b48db4f59ae10268d370aaa81081c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Mon, 2 Nov 2020 16:06:58 +0100
Subject: [PATCH] dt-bindings: arm: rockchip: Add Kobol Helios64
@ -1266,7 +1266,7 @@ index b621752aaa65..ad1dbf349c33 100644
items:
- const: mecer,xms6
From 4812e1f87c28f8b0281fd32c7c2f915ca9c8c5e3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Date: Sat, 4 Jul 2020 00:14:13 +0200
Subject: [PATCH] arm64: dts: rockchip: add adc joystick to Odroid Go Advance
@ -1316,7 +1316,7 @@ index 337681038519..97fb93e1cc00 100644
compatible = "pwm-backlight";
power-supply = <&vcc_bl>;
From 8ab3c3a51695225b53dd46fee046f44c69548b06 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:11 +0530
Subject: [PATCH] dt-bindings: arm: rockchip: Add Engicam PX30.Core EDIMM2.2
@ -1358,7 +1358,7 @@ index ad1dbf349c33..cef95eb26ca6 100644
items:
- enum:
From 0ea91553684644f7ec2105300b496693697821c3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:12 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam EDIMM2.2 Starter Kit
@ -1455,7 +1455,7 @@ index 000000000000..cb00988953e9
+
+#include "px30-engicam-common.dtsi"
From c12ee859634a1d34851b2c1f80f07a7b124b5006 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Michael Trimarchi <michael@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:13 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam PX30.Core SOM
@ -1725,7 +1725,7 @@ index 000000000000..db22f776c68f
+ status = "okay";
+};
From bc5016747913df8ad96175f3a5038c7331006d1f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:14 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam PX30.Core EDIMM2.2 Starter
@ -1789,7 +1789,7 @@ index 000000000000..e54d1e480daa
+ };
+};
From 5955bbcde3dbb12889de8dcf502fbe4fc026bb1f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:15 +0530
Subject: [PATCH] dt-bindings: arm: rockchip: Add Engicam PX30.Core C.TOUCH 2.0
@ -1830,7 +1830,7 @@ index cef95eb26ca6..37fd456170d2 100644
items:
- const: engicam,px30-core-edimm2.2
From ad2313ab08f6f49e4359f20c4ccd5d5b5e6ec63b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:16 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam C.TOUCH 2.0
@ -1876,7 +1876,7 @@ index 000000000000..58425b1e559f
+
+#include "px30-engicam-common.dtsi"
From 4558410f03ab777e4e413d25f6f317008c9af309 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 29 Sep 2020 14:02:17 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0
@ -1941,7 +1941,7 @@ index 000000000000..5a0ecb8faecf
+ };
+};
From 92e3be2defa5ca887abd0219e532062354314c16 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Thu, 26 Nov 2020 15:33:35 +0800
Subject: [PATCH] arm64: dts: rockchip: Enable HDMI audio on rk3328-roc-cc
@ -1986,7 +1986,7 @@ index b76282e704de..697fce709031 100644
status = "okay";
From f124c7ee4abd51988d6b4330087c91db04e8c58a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Thu, 26 Nov 2020 15:33:36 +0800
Subject: [PATCH] arm64: dts: rockchip: Enable analog audio on rk3328-roc-cc
@ -2036,7 +2036,7 @@ index 697fce709031..19959bfba451 100644
status = "okay";
From e144a0e75bf59398255eb5715dad961d9de0264d Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Mon, 16 Nov 2020 14:23:11 +0100
Subject: [PATCH] arm64: dts: rockchip: rename sdhci nodename to mmc on rk3399
@ -2061,7 +2061,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7a9a7aca86c6..865729ec867f 100644
index 7e69603fb41c..4d9a2ea3e6bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -331,7 +331,7 @@ sdmmc: mmc@fe320000 {
@ -2074,7 +2074,7 @@ index 7a9a7aca86c6..865729ec867f 100644
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
From a3c1dcd6f79ffbf29f14cf8d97a17d0c113b64c1 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:09 +0530
Subject: [PATCH] arm64: dts: rockchip: Enable USB Host, OTG on px30-enagicam
@ -2129,7 +2129,7 @@ index bd5bde989e8d..fbbdbb0a40af 100644
+ status = "okay";
+};
From 588353617f30d2a7ce1b9ba6b8daac2fd3c7f58f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:10 +0530
Subject: [PATCH] arm64: dts: rockchip: Enable LVDS panel on
@ -2248,7 +2248,7 @@ index db22f776c68f..cdacd3483600 100644
regulator-name = "vcc5v0_host";
regulator-always-on;
From fea98a305fea5b7359caf1c4a5a203c0170b697e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:11 +0530
Subject: [PATCH] dt-bindings: arm: rockchip: Add Engicam PX30.Core C.TOUCH 2.0
@ -2292,7 +2292,7 @@ index 37fd456170d2..ef4544ad6f82 100644
items:
- const: engicam,px30-core-edimm2.2
From a9fd5f2e8d3b27b5cd46014c563e09944e956047 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:12 +0530
Subject: [PATCH] arm64: dts: rockchip: Add Engicam PX30.Core C.TOUCH 2.0 10.1"
@ -2415,7 +2415,7 @@ index 000000000000..47aa30505a42
+ status = "okay";
+};
From c8dd7795b4781bcd100e263bd6bcea57cf4dccc4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Suniel Mahesh <sunil@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:13 +0530
Subject: [PATCH] arm64: dts: rockchip: Add WiFi support on px30-engicam
@ -2537,7 +2537,7 @@ index e54d1e480daa..913444548b59 100644
+ reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
+};
From 52ebf8f400b0eda0bda923fb06f2fc7c5d63ac46 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Suniel Mahesh <sunil@amarulasolutions.com>
Date: Mon, 9 Nov 2020 23:40:14 +0530
Subject: [PATCH] arm64: dts: rockchip: Add BT support on px30-engicam
@ -2636,7 +2636,7 @@ index 913444548b59..d759478e1c84 100644
+ enable-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
+};
From ae3d6a662eeb8259e23bee05648c94c5f97b2dc3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alexis Ballier <aballier@gentoo.org>
Date: Thu, 22 Oct 2020 13:35:32 +0200
Subject: [PATCH] arm64: dts: rockchip: Properly define the type C connector on
@ -2763,7 +2763,7 @@ index 6163ae8063a7..ad7c4d00888f 100644
&usbdrd3_1 {
From fedebdb66a4cfd3685831f83e55b6b562c36c668 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 20 Oct 2020 16:38:49 -0300
Subject: [PATCH] arm64: dts: rockchip: add isp0 node for rk3399
@ -2784,10 +2784,10 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 865729ec867f..f5dee5f447bb 100644
index 4d9a2ea3e6bf..2551b238b97c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1726,6 +1726,32 @@ vopb_mmu: iommu@ff903f00 {
@@ -1725,6 +1725,32 @@ vopb_mmu: iommu@ff903f00 {
status = "disabled";
};
@ -2821,7 +2821,7 @@ index 865729ec867f..f5dee5f447bb 100644
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
From 8f501e29cd0029de7da8548c0ab717709a01c8e4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Eddie Cai <eddie.cai.linux@gmail.com>
Date: Tue, 20 Oct 2020 16:38:50 -0300
Subject: [PATCH] arm64: dts: rockchip: add isp and sensors for Scarlet
@ -2939,7 +2939,7 @@ index 60cd1c18cd4e..beee5fbb3443 100644
status = "okay";
clock-master;
From ff8fd76e7482e5fd9695f505b9c6079bcc393404 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Vicente Bergas <vicencb@gmail.com>
Date: Tue, 1 Dec 2020 16:41:30 +0100
Subject: [PATCH] arm64: dts: rockchip: fix supplies on rk3399-rock-pi-4
@ -2996,7 +2996,7 @@ index 678a336010bf..06df2397bbb4 100644
regulator-off-in-suspend;
};
From d8bc550f8290ae4afcbb9eaa46aaa10867b1ca72 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Vicente Bergas <vicencb@gmail.com>
Date: Tue, 1 Dec 2020 16:41:31 +0100
Subject: [PATCH] arm64: dts: rockchip: fix I2S conflict on rk3399-rock-pi-4
@ -3031,7 +3031,7 @@ index 06df2397bbb4..63b029a543c1 100644
};
From 4be36380ae5fc643977959a10acba1f59f29c84f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Vicente Bergas <vicencb@gmail.com>
Date: Tue, 1 Dec 2020 16:41:32 +0100
Subject: [PATCH] arm64: dts: rockchip: use USB host by default on

View File

@ -1,4 +1,4 @@
From b24a3a7acba3235a5ea07101b3e819e9a176280b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Demetris Ierokipides <ierokipides.dem@gmail.com>
Date: Fri, 8 Jan 2021 17:10:35 +0200
Subject: [PATCH] ARM: dts: rockchip: add gpu node to rk3288-miqi
@ -29,7 +29,7 @@ index cf54d5ffff2f..713f55e143c6 100644
ddc-i2c-bus = <&i2c5>;
status = "okay";
From edcb4e7500aeb2e74556f50aec1446494b16404b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Sat, 19 Dec 2020 22:05:00 +0100
Subject: [PATCH] arm64: dts: rockchip: assign a fixed index to mmc devices on
@ -49,7 +49,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index db0d5c8e5f96..56b5ee7e54c4 100644
index 93c734d8a46c..17709faf651b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -27,6 +27,9 @@ aliases {
@ -63,7 +63,7 @@ index db0d5c8e5f96..56b5ee7e54c4 100644
ethernet1 = &gmac2phy;
};
From e67c9a39505071c77ba7f4b0adecf1cd19b96503 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com>
Date: Fri, 31 Jul 2020 21:33:24 +0530
Subject: [PATCH] arm64: defconfig: Enable REGULATOR_MP8859
@ -100,7 +100,7 @@ index 699c204090b8..9365213589bb 100644
CONFIG_REGULATOR_PFUZE100=y
CONFIG_REGULATOR_PWM=y
From 427c81cdb8154bd171e415cc0c44a70896c522d7 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Sun, 6 Dec 2020 11:37:08 +0100
Subject: [PATCH] ARM: dts: rockchip: add QoS register compatibles for
@ -177,7 +177,7 @@ index 859a7477909f..49bcdf46d03c 100644
};
From af4e1e298a705033088c36bd766d5b4ce7d81ace Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Sun, 6 Dec 2020 11:37:09 +0100
Subject: [PATCH] ARM: dts: rockchip: add QoS register compatibles for rk3288
@ -289,7 +289,7 @@ index 68d5a58cfe88..01ea1f170f77 100644
};
From 0fefb9cc8fa016a264d66110024916a6b8539cc4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Johan Jonker <jbx6244@gmail.com>
Date: Sun, 6 Dec 2020 11:37:11 +0100
Subject: [PATCH] arm64: dts: rockchip: add QoS register compatibles for px30
@ -437,7 +437,7 @@ index 64193292d26c..d8b673b486c9 100644
};
From 7609f6470180b9342abac469c299ab486c070f8c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Date: Mon, 3 Aug 2020 00:42:31 +0900
Subject: [PATCH] arm64: dts: rockchip: enable HDMI sound nodes for
@ -595,7 +595,7 @@ index 86cfb5c50a94..c984662043da 100644
&spi0 {
From 80b2c4090d255b4a8f6b7bdbf839876df337db8f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Date: Mon, 10 Aug 2020 18:16:19 +0900
Subject: [PATCH] arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64
@ -660,4 +660,3 @@ index 6e553ff47534..58097245994a 100644
&spi1 {
status = "okay";

View File

@ -1,4 +1,4 @@
From 4a40b9af1062466503462b3478cfc81dee430105 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:18 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: use correct vco_div_5 macro on
@ -31,7 +31,7 @@ index 9ca20c947283..b0ac1d3ee390 100644
val = RK3328_SPREAD_SPECTRUM_MOD_DISABLE;
From 93fd69bc11a0c66fce9a059a4fed130a0569c44a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Zheng Yang <zhengyang@rock-chips.com>
Date: Sat, 10 Oct 2020 15:32:18 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: round fractal pixclock in rk3328
@ -73,7 +73,7 @@ index b0ac1d3ee390..093d2334e8cd 100644
static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,
From 7105c460048cd6fa3c44e8bb1388586a303567a0 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:19 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: remove unused no_c from rk3328
@ -110,7 +110,7 @@ index 093d2334e8cd..06db69c8373e 100644
do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
From 24b062d263ec48f050a5f73812a910780f9f5cdb Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 15:32:19 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: do not power on rk3328 post pll on
@ -157,7 +157,7 @@ index 06db69c8373e..3a59a6da0440 100644
for (v = 0; v < 14; v++)
From 7349d485fab085341ce5f03700b859e911dc9919 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Huicong Xu <xhc@rock-chips.com>
Date: Sat, 10 Oct 2020 15:32:20 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: force set_rate on power_on
@ -245,123 +245,7 @@ index 3a59a6da0440..3719309ad0d0 100644
return 0;
}
From 0052cad55b3a5b7bdfe41f662bab90fad7f0b0f9 Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Sat, 10 Oct 2020 15:32:20 +0000
Subject: [PATCH] phy/rockchip: inno-hdmi: Support more pre-pll configuration
Adding the following freq cfg in 8-bit and 10-bit color depth:
{
40000000, 65000000, 71000000, 83500000, 85750000,
88750000, 108000000, 119000000, 162000000
}
New freq has been validated by quantumdata 980.
For some freq which can't be got by only using integer freq div,
frac freq div is needed, Such as 88.75Mhz 10-bit. But The actual
freq is different from the target freq, We must try to narrow
the gap between them. RK322X only support integer freq div.
The VCO of pre-PLL must be more than 2Ghz, otherwise PLL may be
unlocked.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 74 ++++++++++++-------
1 file changed, 49 insertions(+), 25 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 3719309ad0d0..bb8bdf5e3301 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -291,32 +291,56 @@ struct inno_hdmi_phy_drv_data {
const struct phy_config *phy_cfg_table;
};
+/*
+ * If only using integer freq div can't get frequency we want, frac
+ * freq div is needed. For example, pclk 88.75 Mhz and tmdsclk
+ * 110.9375 Mhz must use frac div 0xF00000. The actual frequency is different
+ * from the target frequency. Such as the tmds clock 110.9375 Mhz,
+ * the actual tmds clock we get is 110.93719 Mhz. It is important
+ * to note that RK322X platforms do not support frac div.
+ */
static const struct pre_pll_config pre_pll_cfg_table[] = {
- { 27000000, 27000000, 1, 90, 3, 2, 2, 10, 3, 3, 4, 0, 0},
- { 27000000, 33750000, 1, 90, 1, 3, 3, 10, 3, 3, 4, 0, 0},
- { 40000000, 40000000, 1, 80, 2, 2, 2, 12, 2, 2, 2, 0, 0},
- { 59341000, 59341000, 1, 98, 3, 1, 2, 1, 3, 3, 4, 0, 0xE6AE6B},
- { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0},
- { 59341000, 74176250, 1, 98, 0, 3, 3, 1, 3, 3, 4, 0, 0xE6AE6B},
- { 59400000, 74250000, 1, 99, 1, 2, 2, 1, 3, 3, 4, 0, 0},
- { 74176000, 74176000, 1, 98, 1, 2, 2, 1, 2, 3, 4, 0, 0xE6AE6B},
- { 74250000, 74250000, 1, 99, 1, 2, 2, 1, 2, 3, 4, 0, 0},
- { 74176000, 92720000, 4, 494, 1, 2, 2, 1, 3, 3, 4, 0, 0x816817},
- { 74250000, 92812500, 4, 495, 1, 2, 2, 1, 3, 3, 4, 0, 0},
- {148352000, 148352000, 1, 98, 1, 1, 1, 1, 2, 2, 2, 0, 0xE6AE6B},
- {148500000, 148500000, 1, 99, 1, 1, 1, 1, 2, 2, 2, 0, 0},
- {148352000, 185440000, 4, 494, 0, 2, 2, 1, 3, 2, 2, 0, 0x816817},
- {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0},
- {296703000, 296703000, 1, 98, 0, 1, 1, 1, 0, 2, 2, 0, 0xE6AE6B},
- {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0},
- {296703000, 370878750, 4, 494, 1, 2, 0, 1, 3, 1, 1, 0, 0x816817},
- {297000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 0, 0},
- {593407000, 296703500, 1, 98, 0, 1, 1, 1, 0, 2, 1, 0, 0xE6AE6B},
- {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 1, 0, 0},
- {593407000, 370879375, 4, 494, 1, 2, 0, 1, 3, 1, 1, 1, 0x816817},
- {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0},
- {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B},
- {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0},
+ { 27000000, 27000000, 1, 90, 3, 2, 2, 10, 3, 3, 4, 0, 0},
+ { 27000000, 33750000, 1, 90, 1, 3, 3, 10, 3, 3, 4, 0, 0},
+ { 40000000, 40000000, 1, 80, 2, 2, 2, 12, 2, 2, 2, 0, 0},
+ { 40000000, 50000000, 1, 100, 2, 2, 2, 1, 0, 0, 15, 0, 0},
+ { 59341000, 59341000, 1, 98, 3, 1, 2, 1, 3, 3, 4, 0, 0xE6AE6B},
+ { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0},
+ { 59341000, 74176250, 1, 98, 0, 3, 3, 1, 3, 3, 4, 0, 0xE6AE6B},
+ { 59400000, 74250000, 1, 99, 1, 2, 2, 1, 3, 3, 4, 0, 0},
+ { 65000000, 65000000, 1, 130, 2, 2, 2, 1, 0, 0, 12, 0, 0},
+ { 65000000, 81250000, 3, 325, 0, 3, 3, 1, 0, 0, 10, 0, 0},
+ { 71000000, 71000000, 3, 284, 0, 3, 3, 1, 0, 0, 8, 0, 0},
+ { 71000000, 88750000, 3, 355, 0, 3, 3, 1, 0, 0, 10, 0, 0},
+ { 74176000, 74176000, 1, 98, 1, 2, 2, 1, 2, 3, 4, 0, 0xE6AE6B},
+ { 74250000, 74250000, 1, 99, 1, 2, 2, 1, 2, 3, 4, 0, 0},
+ { 74176000, 92720000, 4, 494, 1, 2, 2, 1, 3, 3, 4, 0, 0x816817},
+ { 74250000, 92812500, 4, 495, 1, 2, 2, 1, 3, 3, 4, 0, 0},
+ { 83500000, 83500000, 2, 167, 2, 1, 1, 1, 0, 0, 6, 0, 0},
+ { 83500000, 104375000, 1, 104, 2, 1, 1, 1, 1, 0, 5, 0, 0x600000},
+ { 85750000, 85750000, 3, 343, 0, 3, 3, 1, 0, 0, 8, 0, 0},
+ { 88750000, 88750000, 3, 355, 0, 3, 3, 1, 0, 0, 8, 0, 0},
+ { 88750000, 110937500, 1, 110, 2, 1, 1, 1, 1, 0, 5, 0, 0xF00000},
+ {108000000, 108000000, 1, 90, 3, 0, 0, 1, 0, 0, 5, 0, 0},
+ {108000000, 135000000, 1, 90, 0, 2, 2, 1, 0, 0, 5, 0, 0},
+ {119000000, 119000000, 1, 119, 2, 1, 1, 1, 0, 0, 6, 0, 0},
+ {119000000, 148750000, 1, 99, 0, 2, 2, 1, 0, 0, 5, 0, 0x2AAAAA},
+ {148352000, 148352000, 1, 98, 1, 1, 1, 1, 2, 2, 2, 0, 0xE6AE6B},
+ {148500000, 148500000, 1, 99, 1, 1, 1, 1, 2, 2, 2, 0, 0},
+ {148352000, 185440000, 4, 494, 0, 2, 2, 1, 3, 2, 2, 0, 0x816817},
+ {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0},
+ {162000000, 162000000, 1, 108, 0, 2, 2, 1, 0, 0, 4, 0, 0},
+ {162000000, 202500000, 1, 135, 0, 2, 2, 1, 0, 0, 5, 0, 0},
+ {296703000, 296703000, 1, 98, 0, 1, 1, 1, 0, 2, 2, 0, 0xE6AE6B},
+ {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0},
+ {296703000, 370878750, 4, 494, 1, 2, 0, 1, 3, 1, 1, 0, 0x816817},
+ {297000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 0, 0},
+ {593407000, 296703500, 1, 98, 0, 1, 1, 1, 0, 2, 1, 0, 0xE6AE6B},
+ {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 1, 0, 0},
+ {593407000, 370879375, 4, 494, 1, 2, 0, 1, 3, 1, 1, 1, 0x816817},
+ {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0},
+ {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B},
+ {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0},
{ /* sentinel */ }
};
From 1e8f08c29a89a3c8ee2a4caef5743b7f9c6816bf Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Mon, 16 Nov 2020 15:17:33 +0000
Subject: [PATCH] phy: rockchip: add rockchip usb3 innosilicon phy driver
@ -857,7 +741,7 @@ index 000000000000..6e4aa2f0ba46
+MODULE_DESCRIPTION("Rockchip USB 3 PHY driver");
+MODULE_LICENSE("GPL v2");
From 5edc51fd7682f270c4e19d0277943bf41ca9a64a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Mon, 16 Nov 2020 15:17:34 +0000
Subject: [PATCH] usb: dwc3: add rockchip innosilicon usb3 glue layer
@ -1183,7 +1067,7 @@ index 000000000000..7007ddbcbdae
+MODULE_DESCRIPTION("DesignWare USB3 Rockchip Innosilicon Glue Layer");
+MODULE_AUTHOR("Peter Geis <pgwipeout@gmail.com>");
From 1f6ba30b63c739b6c9c76b2dbd68e83095e038a3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Mon, 16 Nov 2020 15:17:35 +0000
Subject: [PATCH] arm64: dts: rockchip: add rk3328 usb3 and usb3phy nodes
@ -1196,7 +1080,7 @@ Signed-off-by: Peter Geis <pgwipeout@gmail.com>
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 56b5ee7e54c4..72f34205fd20 100644
index 17709faf651b..d327fd300116 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -856,6 +856,40 @@ u2phy_host: host-port {
@ -1240,7 +1124,7 @@ index 56b5ee7e54c4..72f34205fd20 100644
sdmmc: mmc@ff500000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff500000 0x0 0x4000>;
@@ -986,6 +1020,37 @@ usb_host0_ohci: usb@ff5d0000 {
@@ -987,6 +1021,37 @@ usb_host0_ohci: usb@ff5d0000 {
status = "disabled";
};
@ -1279,7 +1163,7 @@ index 56b5ee7e54c4..72f34205fd20 100644
compatible = "arm,gic-400";
#interrupt-cells = <3>;
From 26c7d07e7537483905fe6a672232cf7790133916 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Peter Geis <pgwipeout@gmail.com>
Date: Mon, 16 Nov 2020 15:17:36 +0000
Subject: [PATCH] arm64: dts: rockchip: enable usb3 on rk3328-roc-cc board
@ -1324,7 +1208,7 @@ index 19959bfba451..3ac876c08d61 100644
status = "okay";
};
From 031a8498a8700bd8027d75df56f9d5af866d145b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 17 Feb 2019 22:14:38 +0000
Subject: [PATCH] mmc: core: set initial signal voltage on power off

View File

@ -1,4 +1,4 @@
From 8b65635fe4138a03f36cb9b909f6b4e81de61ba1 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:33 +0000
Subject: [PATCH] media: rkvdec: h264: Fix reference frame_num wrap for second
@ -33,7 +33,7 @@ index 7cc3b478a5f4..054d2e3eed67 100644
continue;
}
From 1e1fba94233ca5cd793bea80c075b7d4402a02e8 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:34 +0000
Subject: [PATCH] media: rkvdec: Ensure decoded resolution fit coded resolution
@ -60,7 +60,7 @@ index d25c4a37e2af..b3e067031c83 100644
&pix_mp->height,
&coded_desc->frmsize);
From e13033dcecad3af45820802c7138761a903e487d Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:34 +0000
Subject: [PATCH] media: rkvdec: h264: Validate and use pic width and height in
@ -128,7 +128,7 @@ index b3e067031c83..06fc58440cd3 100644
return 0;
}
From d100d0514c614e3dbb494db9cee495e8e4281a96 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: rkvdec: h264: Fix bit depth wrap in pps packet
@ -161,7 +161,7 @@ index d46424ba88e8..6536cf0d6054 100644
WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4);
WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES);
From de23966bda3f284d66c5f14e578c59b921ffc869 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: rkvdec: h264: Do not override output buffer sizeimage
@ -195,7 +195,7 @@ index 6536cf0d6054..bf632d45282b 100644
}
From 846786ba47353964d074b3d8cd4ced8630562e36 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:35 +0000
Subject: [PATCH] media: v4l2-common: Add helpers to calculate bytesperline and
@ -324,7 +324,7 @@ index 3dc17ebe14fa..4102c373b48a 100644
}
EXPORT_SYMBOL_GPL(v4l2_fill_pixfmt);
From 8edb607b6b0a3370fe28b1b5e35ecd01cd53aab6 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:36 +0000
Subject: [PATCH] media: v4l2: Add NV15 and NV20 pixel formats
@ -593,7 +593,7 @@ index 4102c373b48a..0caac755d303 100644
{ .format = V4L2_PIX_FMT_YVU410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
{ .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 },
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index eeff398fbdcc..80cb42450a1b 100644
index 9eda8b91d17a..1ff68c1bf14a 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1319,6 +1319,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
@ -620,7 +620,7 @@ index 534eaa4d39bc..f21eba15ceae 100644
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
From 6d70596d08bd5e83bfc7ec91ef2487eea16423c7 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:36 +0000
Subject: [PATCH] media: rkvdec: h264: Use bytesperline and buffer height to
@ -665,7 +665,7 @@ index bf632d45282b..6f2d41b2e076 100644
if (sps->chroma_format_idc == 0)
From fe986faea5db691dda6b63f3d681f17c772998d5 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: Extract rkvdec_fill_decoded_pixfmt helper
@ -736,7 +736,7 @@ index 06fc58440cd3..dc16bf8d57a9 100644
return 0;
}
From d12f5e85ce258df07965441d609c321a53fe6238 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: Lock capture pixel format in s_ctrl and s_fmt
@ -889,7 +889,7 @@ index 77a137cca88e..e95c52e3168a 100644
struct v4l2_ctrl_handler ctrl_hdl;
struct rkvdec_dev *dev;
From eb2ba0433b38541aa4a231f559915cd0f9986071 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:37 +0000
Subject: [PATCH] media: rkvdec: h264: Support High 10 and 4:2:2 profiles
@ -995,7 +995,7 @@ index 6b2a2f4164b2..bd8ec2915fe9 100644
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
From 68c5e697048b29149089aee45547362a80284eaf Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 21:54:38 +0000
Subject: [PATCH] media: rkvdec: h264: Support profile and level controls

View File

@ -1,4 +1,4 @@
From a65d599157434672923aa2100e38de9c3e5fdcf4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann <tzimmermann@suse.de>
Date: Wed, 23 Sep 2020 12:21:51 +0200
Subject: [PATCH] drm/rockchip: Convert to drm_gem_object_funcs
@ -82,7 +82,7 @@ index 62e5d0970525..1cf4631461c9 100644
*/
void rockchip_gem_free_object(struct drm_gem_object *obj)
From ef5187c01a38422facb8385a9fdb2bdca48b5063 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann <tzimmermann@suse.de>
Date: Mon, 28 Sep 2020 10:16:43 +0200
Subject: [PATCH] drm/rockchip: Include <drm/drm_gem_cma_helper> for
@ -125,7 +125,7 @@ index 1cf4631461c9..7d5ebb10323b 100644
#include <drm/drm_vma_manager.h>
From c0d3455e8abdb62b4088d6b0833f722bea8856c4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Qinglang Miao <miaoqinglang@huawei.com>
Date: Mon, 21 Sep 2020 21:10:19 +0800
Subject: [PATCH] drm/panfrost: simplify the return expression of
@ -169,7 +169,7 @@ index bf7c34cfb84c..a83b2ff5837a 100644
static void panfrost_reset_fini(struct panfrost_device *pfdev)
From 0c18323036a4a28bc7be740d247dc117228e80eb Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Qinglang Miao <miaoqinglang@huawei.com>
Date: Mon, 21 Sep 2020 21:10:21 +0800
Subject: [PATCH] drm/panfrost: simplify the return expression of
@ -211,7 +211,7 @@ index 8ab025d0035f..913eaa6d0bc6 100644
static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq)
From 730780b7c9d26a7dd5a103f17ceb3035d1f58264 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Date: Sun, 4 Oct 2020 22:06:53 +0200
Subject: [PATCH] drm: bridge: dw-hdmi: Constify dw_hdmi_i2s_ops
@ -242,7 +242,7 @@ index 9fef6413741d..feb04f127b55 100644
.audio_startup = dw_hdmi_i2s_audio_startup,
.audio_shutdown = dw_hdmi_i2s_audio_shutdown,
From 40ec605e1723e52775bbba80b36870d7dd7e7019 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Liu Shixin <liushixin2@huawei.com>
Date: Sat, 19 Sep 2020 18:08:50 +0800
Subject: [PATCH] drm/lima: simplify the return expression of
@ -282,7 +282,7 @@ index bbe02817721b..5914442936ed 100644
static void lima_devfreq_reset(struct lima_devfreq *devfreq)
From 6d6bd7b07ce09052d1b1d4116eb866d18c3cbb8a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Lee Jones <lee.jones@linaro.org>
Date: Fri, 13 Nov 2020 13:49:13 +0000
Subject: [PATCH] drm/lima/lima_drv: Demote kernel-doc formatting abuse
@ -317,7 +317,7 @@ index ab460121fd52..065c80c14d10 100644
*
* - 1.1.0 - add heap buffer support
From 9d003fb17fd9a2c55debe6c7a96003093f4c2429 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Lee Jones <lee.jones@linaro.org>
Date: Fri, 13 Nov 2020 13:49:21 +0000
Subject: [PATCH] drm/lima/lima_sched: Remove unused and unnecessary variable
@ -348,7 +348,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201113134938.4004947-24-le
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c
index dc6df9e9a40d..3f5075bd158f 100644
index f6e7a88a56f1..040ea27b28ce 100644
--- a/drivers/gpu/drm/lima/lima_sched.c
+++ b/drivers/gpu/drm/lima/lima_sched.c
@@ -223,7 +223,6 @@ static struct dma_fence *lima_sched_run_job(struct drm_sched_job *job)
@ -369,7 +369,7 @@ index dc6df9e9a40d..3f5075bd158f 100644
pipe->current_task = task;
From 4748c72bc711c423127ceb78220d696ee2a170a8 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Viresh Kumar <viresh.kumar@linaro.org>
Date: Wed, 28 Oct 2020 12:14:21 +0530
Subject: [PATCH] drm/lima: Unconditionally call dev_pm_opp_of_remove_table()
@ -425,7 +425,7 @@ index 5eed2975a375..2d9b3008ce77 100644
ktime_t busy_time;
ktime_t idle_time;
From d007ec94509b760c77f9509d9cc58921d1c2aa34 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Viresh Kumar <viresh.kumar@linaro.org>
Date: Fri, 6 Nov 2020 12:18:39 +0530
Subject: [PATCH] drm/lima: dev_pm_opp_put_*() accepts NULL argument
@ -463,4 +463,3 @@ index da7099d20bd5..5686ad4aaf7c 100644
}
int lima_devfreq_init(struct lima_device *ldev)

View File

@ -1,4 +1,4 @@
From 82ad763fb8892af550a264e731c372d5ce6e0df5 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 22:30:13 +0000
Subject: [PATCH] drm: drm_fourcc: add NV20 and NV30 YUV formats
@ -43,7 +43,7 @@ index 722c7ebe4e88..2daf8a304b53 100644
.num_planes = 3, .char_per_block = { 2, 2, 2 },
.block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 82f327801267..d8e6159213dc 100644
index 5498d7a6556a..5b5db0381729 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -242,6 +242,8 @@ extern "C" {
@ -56,7 +56,7 @@ index 82f327801267..d8e6159213dc 100644
/*
* 2 plane YCbCr MSB aligned
From 44971d433dab751aff9975c7b0a3d98d9f3cf702 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 6 Jul 2020 22:30:13 +0000
Subject: [PATCH] drm: rockchip: add NV15, NV20 and NV30 support
@ -148,10 +148,10 @@ index c80f7d9fd13f..eb663e25ad9e 100644
dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1];
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 4a2099cb582e..eab055d9b56d 100644
index 857d97cdc67c..b7169010622a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -154,6 +154,7 @@ struct vop_win_phy {
@@ -165,6 +165,7 @@ struct vop_win_phy {
struct vop_reg enable;
struct vop_reg gate;
struct vop_reg format;
@ -232,6 +232,7 @@ index 80053d91a301..2c55e1852c3d 100644
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
.y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Qinglang Miao <miaoqinglang@huawei.com>
Date: Tue, 1 Dec 2020 20:54:57 +0800

View File

@ -1,4 +1,4 @@
From b8c31533452c976e04d239bdbad7c2393f728391 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 15 Jul 2020 15:24:47 +0000
Subject: [PATCH] drm/rockchip: vop: fix crtc duplicate state
@ -13,7 +13,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index eb663e25ad9e..818195594705 100644
index c6c76e8ab66c..2f98a5e7dce1 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1554,7 +1554,11 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)
@ -30,7 +30,7 @@ index eb663e25ad9e..818195594705 100644
return NULL;
From 8d23aed38c07e128c8e97cb7a979ad3f510ab79c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 3 May 2020 16:51:31 +0000
Subject: [PATCH] drm/rockchip: vop: filter modes outside 0.5% pixel clock
@ -47,7 +47,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 54 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 818195594705..77ae88a94c55 100644
index 2f98a5e7dce1..defa314a8f96 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1167,6 +1167,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
@ -119,7 +119,7 @@ index 818195594705..77ae88a94c55 100644
.atomic_check = vop_crtc_atomic_check,
.atomic_begin = vop_crtc_atomic_begin,
From be33ac8e021f8d2bbbb7ac507a356cf0f54ef998 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 15:15:50 +0000
Subject: [PATCH] drm/rockchip: vop: filter interlaced modes
@ -133,7 +133,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 77ae88a94c55..e27314249691 100644
index defa314a8f96..a9e6e8bdc848 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1205,6 +1205,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
@ -147,7 +147,7 @@ index 77ae88a94c55..e27314249691 100644
if (rounded_rate < 0)
return MODE_NOCLOCK;
From 0d3b3e66b77697492f586dee7f1a636c8c3d2a97 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 14:57:30 +0000
Subject: [PATCH] drm/rockchip: vop: define max output resolution supported
@ -159,10 +159,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index eab055d9b56d..1b0618147a0e 100644
index b7169010622a..0b1984585082 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -186,6 +186,11 @@ struct vop_win_data {
@@ -197,6 +197,11 @@ struct vop_win_data {
enum drm_plane_type type;
};
@ -174,7 +174,7 @@ index eab055d9b56d..1b0618147a0e 100644
struct vop_data {
uint32_t version;
const struct vop_intr *intr;
@@ -198,6 +203,7 @@ struct vop_data {
@@ -209,6 +214,7 @@ struct vop_data {
const struct vop_win_data *win;
unsigned int win_size;
unsigned int lut_size;
@ -243,7 +243,7 @@ index 2c55e1852c3d..cf87361108a0 100644
.common = &rk3328_common,
.modeset = &rk3328_modeset,
From 2df1db483dbc4382afdd068c92d948c5894b86b9 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 11:46:16 +0000
Subject: [PATCH] drm/rockchip: vop: filter modes above max output supported
@ -256,7 +256,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index e27314249691..b15ee823039e 100644
index a9e6e8bdc848..bf44282409ab 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1199,6 +1199,7 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
@ -299,7 +299,7 @@ index e27314249691..b15ee823039e 100644
* Clock craziness.
*
From 2b982bc0980b1e07a16f95dad40dfbdb7efc8cdd Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Yakir Yang <ykk@rock-chips.com>
Date: Mon, 11 Jul 2016 19:05:39 +0800
Subject: [PATCH] drm/rockchip: dw_hdmi: adjust cklvl & txlvl for RF/EMI
@ -353,7 +353,7 @@ index 23de359a1dec..f78851e7ef16 100644
{ ~0UL, 0x0000, 0x0000, 0x0000}
};
From 742e3b1f32865fc47c1a9972ece0f674a2fe8711 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Nickey Yang <nickey.yang@rock-chips.com>
Date: Mon, 13 Feb 2017 15:40:29 +0800
Subject: [PATCH] drm/rockchip: dw_hdmi: add phy_config for 594Mhz pixel clock
@ -379,7 +379,7 @@ index f78851e7ef16..a308adb56d2f 100644
};
From 4797a1b5012f84c96a91bda162df85c15d8648f5 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Mon, 11 Jul 2016 19:05:36 +0800
Subject: [PATCH] drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
@ -424,7 +424,7 @@ index a308adb56d2f..5b273f26f177 100644
}
};
From affc6bdd078237e4985809510bbe48027e1893b3 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Douglas Anderson <dianders@chromium.org>
Date: Mon, 11 Jul 2016 19:05:42 +0800
Subject: [PATCH] drm/rockchip: dw_hdmi: Use auto-generated tables
@ -609,7 +609,7 @@ index 5b273f26f177..b5d2cdaa24fa 100644
}
};
From 138a8ff48453b90953ffcd33c7b9651e11d92b85 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 8 Jan 2020 21:07:52 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: limit tmds to 340mhz
@ -656,7 +656,7 @@ index b5d2cdaa24fa..5f7ab8e6bb72 100644
static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder)
From 57d8a618f0660c1f3ef7b58c4eef4a6eef615574 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 3 May 2020 22:36:23 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: limit resolution to 3840x2160
@ -680,7 +680,7 @@ index 5f7ab8e6bb72..0e7ca368314d 100644
static void dw_hdmi_rockchip_encoder_disable(struct drm_encoder *encoder)
From b6dc188ade16245c10b2014bd062158ce8313e81 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 8 Jan 2020 21:07:49 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: allow high tmds bit rates
@ -706,7 +706,7 @@ index 0e7ca368314d..6f7641fbe6cc 100644
}
From c0252b7948385d75ef282cef84b1effe18966486 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 8 Jan 2020 21:07:52 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: remove unused plat_data on
@ -745,7 +745,7 @@ index 6f7641fbe6cc..cc20a83fa9b8 100644
.phy_ops = &rk3328_hdmi_phy_ops,
.phy_name = "inno_dw_hdmi_phy2",
From b2050e98ffc8bf954f70a6728802c7f77e1a878e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 10:16:32 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: encoder error handling
@ -811,7 +811,7 @@ index cc20a83fa9b8..fd614c8a3486 100644
}
From 33bc9ea094d95e41270658a188f7a64585951d42 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 8 Jan 2020 21:07:50 +0000
Subject: [PATCH] clk: rockchip: set parent rate for DCLK_VOP clock on rk3228
@ -835,7 +835,7 @@ index 47d6482dda9d..a2b4d5487514 100644
FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
From 19587f6585259f32b32cb868269366bd6f873f33 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 14:32:21 +0000
Subject: [PATCH] drm/rockchip: vop: split rk3288 vop
@ -892,7 +892,7 @@ index cf87361108a0..05ade8ea962f 100644
.data = &rk3368_vop },
{ .compatible = "rockchip,rk3366-vop",
From d266116ccaa1810cbf0d528b6d6ac390bfc922dd Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 14:33:30 +0000
Subject: [PATCH] ARM: dts: rockchip: split rk3288 vop
@ -925,7 +925,7 @@ index 01ea1f170f77..3575dea1ee29 100644
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
From 3c30b7d610b8d68907f9874b6311d8c45410d02e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 18:00:44 +0000
Subject: [PATCH] drm/bridge: dw-hdmi: add mtmdsclock parameter to phy
@ -1003,7 +1003,7 @@ index ea34ca146b82..4f61ede6486d 100644
struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
From 1935f408ce2264ff9ab4be03d61ea7c86d9388f1 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 21:34:48 +0000
Subject: [PATCH] drm/bridge: dw-hdmi: support configuring phy for deep color
@ -1063,7 +1063,7 @@ index 50199329ad6f..2581789178c7 100644
dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
From aeeed2820e5c02d65c63e1a4d18b20f79561212a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 22:25:15 +0000
Subject: [PATCH] drm/bridge: dw-hdmi: add mpll_cfg_420 for ycbcr420 mode
@ -1102,7 +1102,7 @@ index 4f61ede6486d..0ebe01835d2a 100644
const struct dw_hdmi_phy_config *phy_config;
int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
From 2202e32e62d3dc8d7566887427e23675296eb50e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 15 Jul 2020 09:49:21 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: mode_valid: allow 420 clock rate
@ -1143,7 +1143,7 @@ index fd614c8a3486..c22add144cf4 100644
encoder = &hdmi->encoder;
From d56e609be90b7261040f94d0356c30adae68f7ab Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 20 Jul 2020 22:26:19 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: add YCbCr420 mpll cfg for rk3399
@ -1213,7 +1213,7 @@ index c22add144cf4..1e558af2c9b2 100644
.phy_config = rockchip_phy_config,
.phy_data = &rk3399_chip_data,
From 94976e92fdeef9d37a3f17dcf4d704c913b7ce19 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Shunqing Chen <csq@rock-chips.com>
Date: Wed, 15 Jul 2020 15:19:11 +0800
Subject: [PATCH] drm/rockchip: dw-hdmi: add YCbCr420 mpll cfg for rk3288w
@ -1284,7 +1284,7 @@ index 1e558af2c9b2..6dbd0e422ca1 100644
.phy_config = rockchip_phy_config,
.phy_data = &rk3288_chip_data,
From c15ee8f8d363e71a62afb95e5b7bdc59892a3caf Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 20 Dec 2019 08:12:42 +0000
Subject: [PATCH] drm/rockchip: dw-hdmi: add bridge and switch to
@ -1490,7 +1490,7 @@ index 6dbd0e422ca1..510ae5d5f133 100644
}
From 779712b530c4353b4b83c755108b86a9808309db Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 9 Oct 2020 15:24:53 +0000
Subject: [PATCH] drm/rockchip: vop: create planes in window order
@ -1501,7 +1501,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 4 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index b15ee823039e..def4c592b75f 100644
index bf44282409ab..25b89ddb446d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1854,19 +1854,10 @@ static int vop_create_crtc(struct vop *vop)
@ -1562,7 +1562,7 @@ index b15ee823039e..def4c592b75f 100644
port = of_get_child_by_name(dev->of_node, "port");
From 3f903a4d812066e582b6658573b16c1fc558f25a Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 9 Oct 2020 15:29:27 +0000
Subject: [PATCH] drm/rockchip: vop: add immutable zpos property
@ -1587,7 +1587,7 @@ index 3aa37e177667..a2b59faa9184 100644
dev->mode_config.helper_private = &rockchip_mode_config_helpers;
}
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index def4c592b75f..1dd8bf5ff4be 100644
index 25b89ddb446d..74d7e474bf89 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1831,7 +1831,7 @@ static irqreturn_t vop_isr(int irq, void *data)
@ -1618,7 +1618,7 @@ index def4c592b75f..1dd8bf5ff4be 100644
primary = plane;
else if (plane->type == DRM_PLANE_TYPE_CURSOR)
From c2fa8a49fbbcec290b1aa8c76125c254cca48844 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 10 Oct 2020 09:20:44 +0000
Subject: [PATCH] drm/rockchip: vop: add plane color properties
@ -1629,7 +1629,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 1dd8bf5ff4be..5f89b51ce891 100644
index 74d7e474bf89..d8e0c5a4df01 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1831,8 +1831,23 @@ static irqreturn_t vop_isr(int irq, void *data)
@ -1687,7 +1687,7 @@ index 1dd8bf5ff4be..5f89b51ce891 100644
primary = plane;
else if (plane->type == DRM_PLANE_TYPE_CURSOR)
From 2d0ecb95be7651cec64b039dac4db3bb2edb6f7c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Nickey Yang <nickey.yang@rock-chips.com>
Date: Mon, 17 Jul 2017 16:35:34 +0800
Subject: [PATCH] HACK: clk: rockchip: rk3288: dedicate npll for vopb and hdmi
@ -1738,7 +1738,7 @@ index 93c794695c46..db6c8bbb35f4 100644
RK3288_CLKGATE_CON(3), 1, GFLAGS),
COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
From ae753af7bed0ba40fba859f31084520460493ad2 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 4 Aug 2018 14:51:14 +0200
Subject: [PATCH] HACK: clk: rockchip: rk3288: use npll table to to improve
@ -1793,7 +1793,7 @@ index db6c8bbb35f4..426309f5dd44 100644
static struct clk_div_table div_hclk_cpu_t[] = {
From 4a8e8c055de03a50dadcfd979a99beaff947cddc Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 28 Oct 2018 21:43:01 +0100
Subject: [PATCH] HACK: clk: rockchip: rk3288: add more npll clocks
@ -1845,7 +1845,7 @@ index 426309f5dd44..b3247a3a7290 100644
};
From 76d67146a1eac8a188fe5646547fd0bc39e6b66e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 25 May 2020 20:36:45 +0000
Subject: [PATCH] HACK: clk: rockchip: rk3399: dedicate vpll for vopb and hdmi
@ -1936,7 +1936,7 @@ index 7df2f1e00347..d39d9ea39aca 100644
RK3399_CLKGATE_CON(10), 12, GFLAGS),
From 92d9cf4e6c2767c8c5aa8d97e684f2f77d950e7d Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 19 Jul 2020 16:35:11 +0000
Subject: [PATCH] HACK: dts: rockchip: do not use vopl for hdmi
@ -1974,10 +1974,10 @@ index 03e86d012edd..746acfac1e92 100644
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a855805649ef..418d16b0b648 100644
index 2551b238b97c..ea1ef6c7455a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1640,11 +1640,6 @@ vopl_out_edp: endpoint@1 {
@@ -1639,11 +1639,6 @@ vopl_out_edp: endpoint@1 {
remote-endpoint = <&edp_in_vopl>;
};
@ -1989,7 +1989,7 @@ index a855805649ef..418d16b0b648 100644
vopl_out_mipi1: endpoint@3 {
reg = <3>;
remote-endpoint = <&mipi1_in_vopl>;
@@ -1816,10 +1811,6 @@ hdmi_in_vopb: endpoint@0 {
@@ -1815,10 +1810,6 @@ hdmi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_hdmi>;
};
@ -2001,7 +2001,7 @@ index a855805649ef..418d16b0b648 100644
};
};
From 07203c89545ff7ec74cb8ccc87fb91810544e4a2 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 20 Dec 2019 08:12:43 +0000
Subject: [PATCH] WIP: drm/bridge: dw-hdmi: limit mode and bus format to
@ -2230,7 +2230,7 @@ index 6d319b95b992..c2425d7fc465 100644
mode_status = pdata->mode_valid(hdmi, pdata->priv_data, info,
mode);
From da41048fb13e41ca4caffef3584c543a0ce8c49d Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 20 Dec 2019 08:12:42 +0000
Subject: [PATCH] WIP: drm/rockchip: dw_hdmi: add 10-bit rgb bus format
@ -2348,7 +2348,7 @@ index e33c2dcd0d4b..03944e08b6c7 100644
#define to_rockchip_crtc_state(s) \
container_of(s, struct rockchip_crtc_state, base)
From 5a6355251e1b77b200291d48773f2b7693462f13 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 8 Dec 2019 23:42:44 +0000
Subject: [PATCH] WIP: drm: dw-hdmi: add content type connector property
@ -2399,7 +2399,7 @@ index c2425d7fc465..f86b8fa40ab6 100644
drm_object_attach_property(&connector->base,
connector->dev->mode_config.hdr_output_metadata_property, 0);
From e388bd5e64b5bb34bd50710b01a57f48df6f9ca7 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 20 Dec 2019 08:12:43 +0000
Subject: [PATCH] WIP: drm/rockchip: add yuv444 support
@ -2490,7 +2490,7 @@ index 43ad0278fad1..c8eaeb484672 100644
static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 5f89b51ce891..409734c4425b 100644
index d8e0c5a4df01..9fde1c27072b 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -325,6 +325,17 @@ static int vop_convert_afbc_format(uint32_t format)
@ -2551,10 +2551,10 @@ index 5f89b51ce891..409734c4425b 100644
val = hact_st << 16;
val |= hact_end;
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 1b0618147a0e..896b441e4a63 100644
index 0b1984585082..72dd670bf2a7 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -92,10 +92,16 @@ struct vop_common {
@@ -103,10 +103,16 @@ struct vop_common {
struct vop_reg mmu_en;
struct vop_reg out_mode;
struct vop_reg standby;
@ -2611,7 +2611,7 @@ index 05ade8ea962f..f276ef4b3f64 100644
static const struct vop_intr rk3328_vop_intr = {
From e9bebfae3a0d24b4d78ff4485ccad50c4dbe009c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 20 Dec 2019 08:12:43 +0000
Subject: [PATCH] WIP: drm/rockchip: add yuv420 support
@ -2688,7 +2688,7 @@ index c8eaeb484672..9fe690570e3d 100644
static struct rockchip_hdmi_chip_data rk3399_chip_data = {
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 409734c4425b..d5048c111b82 100644
index 9fde1c27072b..4d855724e1dd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -326,6 +326,19 @@ static int vop_convert_afbc_format(uint32_t format)
@ -2731,10 +2731,10 @@ index 409734c4425b..d5048c111b82 100644
VOP_REG_SET(vop, common, dsp_out_yuv, yuv_output);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 896b441e4a63..9f50e0e00127 100644
index 72dd670bf2a7..a997578e174a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -94,6 +94,7 @@ struct vop_common {
@@ -105,6 +105,7 @@ struct vop_common {
struct vop_reg standby;
struct vop_reg overlay_mode;
@ -2742,7 +2742,7 @@ index 896b441e4a63..9f50e0e00127 100644
struct vop_reg dsp_data_swap;
struct vop_reg dsp_out_yuv;
struct vop_reg dsp_background;
@@ -258,11 +259,12 @@ struct vop_data {
@@ -269,11 +270,12 @@ struct vop_data {
/*
* display output interface supported by rockchip lcdc
*/
@ -2780,7 +2780,7 @@ index f276ef4b3f64..8c99cc2a7eda 100644
.dsp_out_yuv = VOP_REG(RK3328_POST_SCL_CTRL, 0x1, 2),
.dsp_background = VOP_REG(RK3328_DSP_BG, 0xffffffff, 0),
From 782e7df70a432c1dfb7ce40f534b561485206c7f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 15 Aug 2020 23:20:34 +0200
Subject: [PATCH] drm/rockchip: enable ycbcr_420_allowed and ycbcr_444_allowed
@ -2811,7 +2811,7 @@ index 9fe690570e3d..bccdbb3e0a54 100644
static struct rockchip_hdmi_chip_data rk3288_chip_data = {
From 0cb659fa323784a258839d4b86d90e6ed920059e Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 4 Jan 2021 22:38:26 +0100
Subject: [PATCH] drm/rockchip: seperate mode clock validation
@ -2863,7 +2863,7 @@ index bccdbb3e0a54..a612bf3da9ee 100644
}
From b6c2c118e50f55b56036aab4dced57b8bd27d6ae Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 15 Aug 2020 21:11:08 +0200
Subject: [PATCH] !fixup drm/rockchip: rk3368's vop does not support 10-bit
@ -2889,7 +2889,7 @@ index 8c99cc2a7eda..9ca9fff0d359 100644
.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
From 918ce1031f86f53a017670e38d7da2986e0d05b5 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Oct 2020 16:42:05 +0100
Subject: [PATCH] drm/rockchip: split rk3328 vop for 10-bit support
@ -2944,7 +2944,7 @@ index 9ca9fff0d359..e34482c3d2be 100644
};
From b3928f654f3e4fb6a4266abc01afdb91bc6eb5a2 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 18 Nov 2017 11:09:39 +0100
Subject: [PATCH] rockchip: vop: force skip lines if image too big
@ -2954,7 +2954,7 @@ Subject: [PATCH] rockchip: vop: force skip lines if image too big
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d5048c111b82..c0245f5daeb6 100644
index 4d855724e1dd..5622ffd1b587 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -932,6 +932,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
@ -3000,7 +3000,7 @@ index d5048c111b82..c0245f5daeb6 100644
for (i = 0; i < NUM_YUV2YUV_COEFFICIENTS; i++) {
From 90d53e7362ee4b9d9ce13a643c491ee1177df526 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 8 Jan 2020 21:07:51 +0000
Subject: [PATCH] arm64: dts: rockchip: increase vop clock rate on rk3328
@ -3014,7 +3014,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 72f34205fd20..9358d302f5e4 100644
index d327fd300116..31c48c38c955 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -805,8 +805,8 @@ cru: clock-controller@ff440000 {
@ -3028,6 +3028,7 @@ index 72f34205fd20..9358d302f5e4 100644
<50000000>, <100000000>,
<100000000>, <100000000>,
<50000000>, <50000000>,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 20:31:15 +0100
@ -3057,6 +3058,7 @@ index b3247a3a7290..f5617529dbb5 100644
RK3066_PLL_RATE_NB(585000000, 6, 585, 4, 32),
RK3066_PLL_RATE_NB(432000000, 3, 216, 4, 32),
RK3066_PLL_RATE_NB(426000000, 3, 213, 4, 32),
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 10 Apr 2021 16:54:26 +0200
@ -3083,7 +3085,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 5716aabbaf50..508738edfac8 100644
index f86b8fa40ab6..3340aef73d8d 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -81,15 +81,15 @@ static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
@ -3109,4 +3111,313 @@ index 5716aabbaf50..508738edfac8 100644
static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 20 Mar 2021 11:12:07 +0100
Subject: [PATCH] clk: rockchip: RK3399: adapt VPLL rates
Rockchip PLLs are kown provide the least jitter for
vco rates between 800 MHz and 2 GHz. I converted the
rates for VPLL which are used for VOPs dclk and there-
fore HDMI phy in that manner and used the rates which
require the lowest frac divs.
Additionally I added some rates which are useful to
provide additional VESA and non-VESA rates for HDMI
output.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/clk/rockchip/clk-rk3399.c | 42 ++++++++++++++++++++-----------
1 file changed, 28 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index d39d9ea39aca..16b0bf173299 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -107,20 +107,34 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
static struct rockchip_pll_rate_table rk3399_vpll_rates[] = {
/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
- RK3036_PLL_RATE( 594000000, 1, 123, 5, 1, 0, 12582912), /* vco = 2970000000 */
- RK3036_PLL_RATE( 593406592, 1, 123, 5, 1, 0, 10508804), /* vco = 2967032965 */
- RK3036_PLL_RATE( 297000000, 1, 123, 5, 2, 0, 12582912), /* vco = 2970000000 */
- RK3036_PLL_RATE( 296703296, 1, 123, 5, 2, 0, 10508807), /* vco = 2967032970 */
- RK3036_PLL_RATE( 148500000, 1, 129, 7, 3, 0, 15728640), /* vco = 3118500000 */
- RK3036_PLL_RATE( 148351648, 1, 123, 5, 4, 0, 10508800), /* vco = 2967032960 */
- RK3036_PLL_RATE( 106500000, 1, 124, 7, 4, 0, 4194304), /* vco = 2982000000 */
- RK3036_PLL_RATE( 74250000, 1, 129, 7, 6, 0, 15728640), /* vco = 3118500000 */
- RK3036_PLL_RATE( 74175824, 1, 129, 7, 6, 0, 13550823), /* vco = 3115384608 */
- RK3036_PLL_RATE( 65000000, 1, 113, 7, 6, 0, 12582912), /* vco = 2730000000 */
- RK3036_PLL_RATE( 59340659, 1, 121, 7, 7, 0, 2581098), /* vco = 2907692291 */
- RK3036_PLL_RATE( 54000000, 1, 110, 7, 7, 0, 4194304), /* vco = 2646000000 */
- RK3036_PLL_RATE( 27000000, 1, 55, 7, 7, 0, 2097152), /* vco = 1323000000 */
- RK3036_PLL_RATE( 26973026, 1, 55, 7, 7, 0, 1173232), /* vco = 1321678323 */
+ RK3036_PLL_RATE( 594000000, 1, 74, 3, 1, 0, 4194304), /* vco = 1782000000 fout = 594000000 */
+ RK3036_PLL_RATE( 593406592, 1, 74, 3, 1, 0, 2949838), /* vco = 1780219777 fout = 593406592.36908 */
+ RK3036_PLL_RATE( 319750000, 1, 79, 6, 1, 0, 15728640), /* vco = 1918500000 fout = 319750000 */
+ RK3036_PLL_RATE( 297000000, 1, 74, 6, 1, 0, 4194304), /* vco = 1782000000 fout = 297000000 */
+ RK3036_PLL_RATE( 296703296, 1, 74, 6, 1, 0, 2949838), /* vco = 1780219777 fout = 296703296.18454 */
+ RK3036_PLL_RATE( 241500000, 1, 60, 6, 1, 0, 6291456), /* vco = 1449000000 fout = 241500000 */
+ RK3036_PLL_RATE( 162000000, 1, 67, 5, 2, 0, 8388608), /* vco = 1620000000 fout = 162000000 */
+ RK3036_PLL_RATE( 148500000, 1, 74, 6, 2, 0, 4194304), /* vco = 1782000000 fout = 148500000*/
+ RK3036_PLL_RATE( 148351648, 1, 74, 6, 2, 0, 2949838), /* vco = 1780219777 fout = 148351648.09227 */
+ RK3036_PLL_RATE( 136750000, 1, 68, 2, 6, 0, 6291456), /* vco = 1641000000 fout = 136750000 */
+ RK3036_PLL_RATE( 135000000, 1, 56, 5, 2, 0, 4194304), /* vco = 1350000000 fout = 135000000 */
+ RK3036_PLL_RATE( 119000000, 1, 59, 6, 2, 0, 8388608), /* vco = 1428000000 fout = 119000000 */
+ RK3036_PLL_RATE( 108000000, 1, 63, 7, 2, 1, 0), /* vco = 1512000000 fout = 108000000 */
+ RK3036_PLL_RATE( 106500000, 1, 62, 7, 2, 0, 2097152), /* vco = 1491000000 fout = 106500000 */
+ RK3036_PLL_RATE( 88750000, 1, 55, 5, 3, 0, 7864320), /* vco = 1331250000 fout = 88750000 */
+ RK3036_PLL_RATE( 85500000, 1, 57, 4, 4, 1, 0), /* vco = 1368000000 fout = 85500000 */
+ RK3036_PLL_RATE( 78750000, 1, 59, 6, 3, 0, 1048576), /* vco = 1417500000 fout = 78750000 */
+ RK3036_PLL_RATE( 74250000, 1, 74, 6, 4, 0, 4194304), /* vco = 1782000000 fout = 74250000 */
+ RK3036_PLL_RATE( 74175824, 1, 74, 6, 4, 0, 2949838), /* vco = 1780219777 fout = 74175824.046135 */
+ RK3036_PLL_RATE( 71000000, 1, 71, 6, 4, 1, 0), /* vco = 1704000000 fout = 71000000 */
+ RK3036_PLL_RATE( 65000000, 1, 65, 6, 4, 0, 0), /* vco = 1560000000 fout = 65000000 */
+ RK3036_PLL_RATE( 59340659, 1, 59, 6, 4, 0, 5715310), /* vco = 1424175816 fout = 59340659.022331 */
+ RK3036_PLL_RATE( 54000000, 1, 63, 7, 4, 1, 0), /* vco = 1512000000 fout = 54000000 */
+ RK3036_PLL_RATE( 49500000, 1, 72, 5, 7, 0, 3145728), /* vco = 1732500000 fout = 49500000 */
+ RK3036_PLL_RATE( 40000000, 1, 70, 7, 6, 1, 0), /* vco = 1680000000 fout = 40000000 */
+ RK3036_PLL_RATE( 31500000, 1, 55, 7, 6, 0, 2097152), /* vco = 1323000000 fout = 31500000 */
+ RK3036_PLL_RATE( 27000000, 1, 55, 7, 7, 0, 2097152), /* vco = 1323000000 fout = 27000000 */
+ RK3036_PLL_RATE( 26973026, 1, 55, 7, 7, 0, 1173214), /* vco = 1321678296 fout = 26973026.450799 */
{ /* sentinel */ },
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Tue, 23 Mar 2021 19:45:07 +0100
Subject: [PATCH] phy/rockchip: inno-hdmi: add more supported pre-pll rates
This adds a bunch of new pixel clock- and tmds rates to the pre-pll
table which are required to get more VESA and some DMT rates working.
It has been completly re-calculated to match the min- and max-vco of
(750 MHz - 3.2 GHz) requirements. If more than one configuration would
have been possible the lowest fbdiv and refdiv (and therefore lowest
vco rate) has been prefered.
It's important to note, that RK3228 version of the phy does not support
fractional dividers. In order to support the most possible rates for
this version also in both 8-bit and 10-bit variant, some rates are not
exact. The maximum deviation of the pixel clock is 0.26,
which perfectly fits into vesa DMT recommendation of 0.5%.
I tested all possible rates on serveral screens from different manufacturers
with both RK3228 and RK3328. Both pre- and post-PLL locking are slighlty
faster now.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 198 +++++++++++++++---
1 file changed, 173 insertions(+), 25 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 3719309ad0d0..00025dcd3bb9 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -292,31 +292,179 @@ struct inno_hdmi_phy_drv_data {
};
static const struct pre_pll_config pre_pll_cfg_table[] = {
- { 27000000, 27000000, 1, 90, 3, 2, 2, 10, 3, 3, 4, 0, 0},
- { 27000000, 33750000, 1, 90, 1, 3, 3, 10, 3, 3, 4, 0, 0},
- { 40000000, 40000000, 1, 80, 2, 2, 2, 12, 2, 2, 2, 0, 0},
- { 59341000, 59341000, 1, 98, 3, 1, 2, 1, 3, 3, 4, 0, 0xE6AE6B},
- { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0},
- { 59341000, 74176250, 1, 98, 0, 3, 3, 1, 3, 3, 4, 0, 0xE6AE6B},
- { 59400000, 74250000, 1, 99, 1, 2, 2, 1, 3, 3, 4, 0, 0},
- { 74176000, 74176000, 1, 98, 1, 2, 2, 1, 2, 3, 4, 0, 0xE6AE6B},
- { 74250000, 74250000, 1, 99, 1, 2, 2, 1, 2, 3, 4, 0, 0},
- { 74176000, 92720000, 4, 494, 1, 2, 2, 1, 3, 3, 4, 0, 0x816817},
- { 74250000, 92812500, 4, 495, 1, 2, 2, 1, 3, 3, 4, 0, 0},
- {148352000, 148352000, 1, 98, 1, 1, 1, 1, 2, 2, 2, 0, 0xE6AE6B},
- {148500000, 148500000, 1, 99, 1, 1, 1, 1, 2, 2, 2, 0, 0},
- {148352000, 185440000, 4, 494, 0, 2, 2, 1, 3, 2, 2, 0, 0x816817},
- {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0},
- {296703000, 296703000, 1, 98, 0, 1, 1, 1, 0, 2, 2, 0, 0xE6AE6B},
- {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0},
- {296703000, 370878750, 4, 494, 1, 2, 0, 1, 3, 1, 1, 0, 0x816817},
- {297000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 0, 0},
- {593407000, 296703500, 1, 98, 0, 1, 1, 1, 0, 2, 1, 0, 0xE6AE6B},
- {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 1, 0, 0},
- {593407000, 370879375, 4, 494, 1, 2, 0, 1, 3, 1, 1, 1, 0x816817},
- {594000000, 371250000, 4, 495, 1, 2, 0, 1, 3, 1, 1, 1, 0},
- {593407000, 593407000, 1, 98, 0, 2, 0, 1, 0, 1, 1, 0, 0xE6AE6B},
- {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0},
+ { 25175000, 25175000, 3, 125, 3, 1, 1, 1, 3, 3, 4, 0, 0xe00000},
+ { 25175000, 31468750, 1, 41, 0, 3, 3, 1, 3, 3, 4, 0, 0xf5554f},
+ { 27000000, 27000000, 1, 36, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 27000000, 33750000, 1, 45, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 31500000, 31500000, 1, 42, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 31500000, 39375000, 1, 105, 1, 3, 3, 10, 0, 3, 4, 0, 0x0},
+ { 33750000, 33750000, 1, 45, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 33750000, 42187500, 1, 169, 2, 3, 3, 15, 0, 3, 4, 0, 0x0},
+ { 35500000, 35500000, 1, 71, 2, 2, 2, 6, 0, 3, 4, 0, 0x0},
+ { 35500000, 44375000, 1, 74, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 36000000, 36000000, 1, 36, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 36000000, 45000000, 1, 45, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ { 40000000, 40000000, 1, 40, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 40000000, 50000000, 1, 50, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ { 49500000, 49500000, 1, 66, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 49500000, 61875000, 1, 165, 1, 3, 3, 10, 0, 3, 4, 0, 0x0},
+ { 50000000, 50000000, 1, 50, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 50000000, 62500000, 1, 125, 2, 2, 2, 15, 0, 2, 2, 0, 0x0},
+ { 54000000, 54000000, 1, 36, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 54000000, 67500000, 1, 45, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 56250000, 56250000, 1, 75, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 56250000, 70312500, 1, 117, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 59341000, 59341000, 1, 118, 2, 2, 2, 6, 0, 3, 4, 0, 0xae978d},
+ { 59341000, 74176250, 2, 148, 2, 1, 1, 15, 0, 1, 1, 0, 0x5a3d70},
+ { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0x0},
+ { 59400000, 74250000, 1, 99, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 65000000, 65000000, 1, 65, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 65000000, 81250000, 3, 325, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 68250000, 68250000, 1, 91, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 68250000, 85312500, 1, 142, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 71000000, 71000000, 1, 71, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 71000000, 88750000, 3, 355, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 72000000, 72000000, 1, 36, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ { 72000000, 90000000, 1, 60, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 73250000, 73250000, 3, 293, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 73250000, 91562500, 1, 61, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 74176000, 74176000, 1, 37, 2, 0, 0, 1, 1, 2, 2, 0, 0x16872b},
+ { 74176000, 92720000, 2, 185, 2, 1, 1, 15, 0, 1, 1, 0, 0x70a3d7},
+ { 74250000, 74250000, 1, 99, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 74250000, 92812500, 4, 495, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 75000000, 75000000, 1, 50, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 75000000, 93750000, 1, 125, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 78750000, 78750000, 1, 105, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 78750000, 98437500, 1, 164, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 79500000, 79500000, 1, 53, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 79500000, 99375000, 1, 199, 2, 2, 2, 15, 0, 2, 2, 0, 0x0},
+ { 83500000, 83500000, 2, 167, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 83500000, 104375000, 1, 104, 2, 1, 1, 15, 0, 1, 1, 0, 0x600000},
+ { 85500000, 85500000, 1, 57, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 85500000, 106875000, 1, 178, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 85750000, 85750000, 3, 343, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 85750000, 107187500, 1, 143, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 88750000, 88750000, 3, 355, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 88750000, 110937500, 1, 110, 2, 1, 1, 15, 0, 1, 1, 0, 0xf00000},
+ { 94500000, 94500000, 1, 63, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 94500000, 118125000, 1, 197, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ {101000000, 101000000, 1, 101, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {101000000, 126250000, 1, 42, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {102250000, 102250000, 4, 409, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {102250000, 127812500, 1, 128, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {106500000, 106500000, 1, 71, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {106500000, 133125000, 1, 133, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {108000000, 135000000, 1, 45, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {115500000, 115500000, 1, 77, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {115500000, 144375000, 1, 48, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {117500000, 117500000, 2, 235, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {117500000, 146875000, 1, 49, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {119000000, 119000000, 1, 119, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {119000000, 148750000, 3, 148, 0, 1, 1, 1, 3, 1, 1, 0, 0xc00000},
+ {121750000, 121750000, 4, 487, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {121750000, 152187500, 1, 203, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ {122500000, 122500000, 2, 245, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {122500000, 153125000, 1, 51, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {135000000, 168750000, 1, 169, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {136750000, 136750000, 1, 68, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {136750000, 170937500, 1, 113, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f},
+ {140250000, 140250000, 2, 187, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {140250000, 175312500, 1, 117, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {146250000, 146250000, 2, 195, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {146250000, 182812500, 1, 61, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {148250000, 148250000, 3, 222, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {148250000, 185312500, 1, 123, 0, 2, 2, 1, 3, 2, 2, 0, 0x8aaab0},
+ {148352000, 148352000, 2, 148, 2, 0, 0, 1, 1, 2, 2, 0, 0x5a1cac},
+ {148352000, 185440000, 3, 185, 0, 1, 1, 1, 3, 1, 1, 0, 0x70a3d7},
+ {148500000, 148500000, 1, 99, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {154000000, 154000000, 1, 77, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {154000000, 192500000, 1, 64, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {156000000, 195000000, 1, 65, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {156750000, 156750000, 2, 209, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {156750000, 195937500, 1, 196, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {157000000, 157000000, 2, 157, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {157000000, 196250000, 1, 131, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {157500000, 157500000, 1, 105, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {157500000, 196875000, 1, 197, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {162000000, 202500000, 2, 135, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {175500000, 175500000, 1, 117, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {175500000, 219375000, 1, 73, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {179500000, 179500000, 3, 359, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {179500000, 224375000, 1, 75, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {182750000, 182750000, 1, 91, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0},
+ {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0},
+ {187000000, 187000000, 2, 187, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {187000000, 233750000, 1, 39, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {187250000, 187250000, 3, 280, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000},
+ {187250000, 234062500, 1, 156, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0},
+ {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {189000000, 236250000, 1, 79, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {193250000, 193250000, 3, 289, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000},
+ {193250000, 241562500, 1, 161, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0},
+ {202500000, 202500000, 2, 135, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {202500000, 253125000, 1, 169, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {204750000, 204750000, 4, 273, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {204750000, 255937500, 1, 171, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {208000000, 208000000, 1, 104, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {208000000, 260000000, 1, 173, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {214750000, 214750000, 1, 107, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {214750000, 268437500, 1, 178, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f},
+ {218250000, 218250000, 4, 291, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {218250000, 272812500, 1, 91, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {229500000, 229500000, 2, 153, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {229500000, 286875000, 1, 191, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {234000000, 234000000, 1, 39, 0, 0, 0, 1, 0, 1, 1, 0, 0x0},
+ {234000000, 292500000, 1, 195, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {241500000, 241500000, 2, 161, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {241500000, 301875000, 1, 201, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {245250000, 245250000, 4, 327, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {245250000, 306562500, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {245500000, 245500000, 4, 491, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {245500000, 306875000, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {261000000, 326250000, 1, 109, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {268250000, 268250000, 9, 402, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000},
+ {268250000, 335312500, 1, 111, 0, 1, 1, 1, 3, 1, 1, 0, 0xc5554f},
+ {268500000, 268500000, 2, 179, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {268500000, 335625000, 1, 56, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {281250000, 281250000, 4, 375, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {281250000, 351562500, 1, 117, 0, 3, 1, 1, 3, 1, 1, 0, 0x0},
+ {288000000, 288000000, 1, 48, 0, 0, 0, 1, 0, 1, 1, 0, 0x0},
+ {288000000, 360000000, 1, 60, 0, 2, 0, 1, 3, 0, 0, 1, 0x0},
+ {296703000, 296703000, 1, 49, 0, 0, 0, 1, 0, 1, 1, 0, 0x7353f7},
+ {296703000, 370878750, 1, 123, 0, 3, 1, 1, 3, 1, 1, 0, 0xa051eb},
+ {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {297000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 1, 1, 0, 0x0},
+ {312250000, 312250000, 9, 468, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000},
+ {312250000, 390312500, 1, 130, 0, 3, 1, 1, 3, 1, 1, 0, 0x1aaab0},
+ {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {317000000, 396250000, 1, 66, 0, 2, 0, 1, 3, 0, 0, 1, 0x0},
+ {319750000, 319750000, 3, 159, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {319750000, 399687500, 3, 199, 0, 2, 0, 1, 3, 0, 0, 1, 0xd80000},
+ {333250000, 333250000, 9, 499, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {333250000, 416562500, 1, 138, 0, 3, 1, 1, 3, 1, 1, 0, 0xdaaab0},
+ {348500000, 348500000, 9, 522, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {348500000, 435625000, 1, 145, 0, 3, 1, 1, 3, 1, 1, 0, 0x35554f},
+ {356500000, 356500000, 9, 534, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {356500000, 445625000, 1, 148, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0},
+ {380500000, 380500000, 9, 570, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {380500000, 475625000, 1, 158, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0},
+ {443250000, 443250000, 1, 73, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {443250000, 554062500, 1, 92, 0, 2, 0, 1, 3, 0, 0, 1, 0x580000},
+ {505250000, 505250000, 9, 757, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {552750000, 552750000, 3, 276, 0, 2, 0, 1, 0, 1, 1, 0, 0x600000},
+ {593407000, 296703500, 3, 296, 0, 1, 1, 1, 0, 1, 1, 0, 0xb41893},
+ {593407000, 370879375, 4, 494, 0, 3, 1, 1, 3, 0, 0, 1, 0x817e4a},
+ {593407000, 593407000, 3, 296, 0, 2, 0, 1, 0, 1, 1, 0, 0xb41893},
+ {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 1, 1, 0, 0x0},
+ {594000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 0, 0, 1, 0x0},
+ {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0x0},
{ /* sentinel */ }
};

View File

@ -647,9 +647,9 @@ Subject: [PATCH] WIP: media: rkvdec: implement reset controls
---
.../bindings/media/rockchip,vdec.yaml | 19 +++++++
drivers/staging/media/rkvdec/rkvdec-regs.h | 5 ++
drivers/staging/media/rkvdec/rkvdec.c | 54 +++++++++++++++++++
drivers/staging/media/rkvdec/rkvdec.c | 53 +++++++++++++++++++
drivers/staging/media/rkvdec/rkvdec.h | 11 +++-
4 files changed, 88 insertions(+), 1 deletion(-)
4 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml
index 8d35c327018b..dfafdb671798 100644
@ -712,7 +712,7 @@ index 15b9bee92016..3acc914888f6 100644
#define RKVDEC_REG_SYSCTRL 0x008
#define RKVDEC_IN_ENDIAN BIT(0)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 8c2ff05e01f7..a0a1149ca1a8 100644
index 8c2ff05e01f7..bd0297239c6a 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -10,12 +10,15 @@
@ -743,7 +743,7 @@ index 8c2ff05e01f7..a0a1149ca1a8 100644
rkvdec_job_finish_no_pm(ctx, result);
}
@@ -762,6 +770,34 @@ static void rkvdec_device_run(void *priv)
@@ -762,6 +770,33 @@ static void rkvdec_device_run(void *priv)
if (WARN_ON(!desc))
return;
@ -760,7 +760,6 @@ index 8c2ff05e01f7..a0a1149ca1a8 100644
+ }
+
+ if (rkvdec->reset_mask & RESET_HARD) {
+ pm_runtime_suspend(rkvdec->dev);
+ rockchip_pmu_idle_request(rkvdec->dev, true);
+ ret = reset_control_assert(rkvdec->rstc);
+ if (!ret) {
@ -772,13 +771,13 @@ index 8c2ff05e01f7..a0a1149ca1a8 100644
+ dev_notice_ratelimited(rkvdec->dev,
+ "hardreset failed\n");
+ }
+
+ rkvdec->reset_mask = RESET_NONE;
+ pm_runtime_suspend(rkvdec->dev);
+ }
ret = pm_runtime_get_sync(rkvdec->dev);
if (ret < 0) {
@@ -1029,6 +1065,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
@@ -1029,6 +1064,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
if (cancel_delayed_work(&rkvdec->watchdog_work)) {
struct rkvdec_ctx *ctx;
@ -790,7 +789,7 @@ index 8c2ff05e01f7..a0a1149ca1a8 100644
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
rkvdec_job_finish(ctx, state);
}
@@ -1046,6 +1087,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
@@ -1046,6 +1086,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
if (ctx) {
dev_err(rkvdec->dev, "Frame processing timed out!\n");
@ -798,7 +797,7 @@ index 8c2ff05e01f7..a0a1149ca1a8 100644
writel(RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_IRQ_DIS,
rkvdec->regs + RKVDEC_REG_INTERRUPT);
writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL);
@@ -1125,6 +1167,18 @@ static int rkvdec_probe(struct platform_device *pdev)
@@ -1125,6 +1166,18 @@ static int rkvdec_probe(struct platform_device *pdev)
return ret;
}
@ -947,7 +946,7 @@ index dfafdb671798..360b750e5514 100644
reg:
maxItems: 1
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 31c48c38c955..dad09ad7e501 100644
index 31c48c38c955..bd0ec27cf49b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -326,6 +326,10 @@ pd_hevc@RK3328_PD_HEVC {
@ -972,7 +971,7 @@ index 31c48c38c955..dad09ad7e501 100644
+ interrupt-names = "vdpu";
+ assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
+ <&cru SCLK_VDEC_CORE>;
+ assigned-clock-rates = <500000000>, <300000000>, <250000000>;
+ assigned-clock-rates = <400000000>, <400000000>, <300000000>;
+ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
+ <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
+ clock-names = "axi", "ahb", "cabac", "core";
@ -997,3 +996,34 @@ index 31c48c38c955..dad09ad7e501 100644
};
vop: vop@ff370000 {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 3 May 2020 18:34:56 +0200
Subject: [PATCH] WIP: media/rkvdec: don't overclock IP
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
drivers/staging/media/rkvdec/rkvdec.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index bd0297239c6a..8aa946f8f7ad 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -1134,10 +1134,12 @@ static int rkvdec_probe(struct platform_device *pdev)
return ret;
/*
- * Bump ACLK to max. possible freq. (500 MHz) to improve performance
- * When 4k video playback.
+ * Don't bump ACLK to max. possible freq. (500 MHz) to improve performance,
+ * since it will lead to non-recoverable decoder lockups in case of decoding
+ * errors, instead put it to 400 MHz, which seems to have no drawbacks
+ * in decoding performance and doesn't result in those hangs.
*/
- clk_set_rate(rkvdec->clocks[0].clk, 500 * 1000 * 1000);
+ clk_set_rate(rkvdec->clocks[0].clk, 400 * 1000 * 1000);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rkvdec->regs = devm_ioremap_resource(&pdev->dev, res);

View File

@ -1,8 +1,7 @@
From e7cc7e8e0812ce96035ad1d286d79a37f3ea81d2 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 16 Jan 2021 12:24:58 +0000
Subject: [PATCH] ARM64: dts: rockchip: RK3328: enable USB3 for supported
boards
Subject: [PATCH] arm64: dts: rockchip: enable USB3 for supported RK3328 boards
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -74,15 +73,16 @@ index c984662043da..89fde87f7650 100644
&vop {
status = "okay";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 2 Sep 2020 19:52:02 +0200
Subject: [PATCH] arm64: dts: rockchip: add gpu powerdomain, gpu opp-table and
cooling cell
cooling cell for RK3328
Note: since the regulator that supplies the GPU usually also supplies
other SoC components, we have to make sure voltage is never lower then
1050 mV.
1075 mV.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -90,7 +90,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index b54ff9055e5f..2fae7fa6b000 100644
index bd0ec27cf49b..21e32ddb21a0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -321,6 +321,10 @@ power: power-controller {
@ -131,15 +131,15 @@ index b54ff9055e5f..2fae7fa6b000 100644
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <1050000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <1050000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1050000>;
+ opp-microvolt = <1075000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
@ -152,7 +152,7 @@ index b54ff9055e5f..2fae7fa6b000 100644
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 10 Feb 2020 19:22:41 +0100
Subject: [PATCH] ARM64: dts: rk3328 add sdmmc ext node
Subject: [PATCH] arm64: dts: rockchip: add sdmmc ext node for RK3328
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -160,10 +160,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 3d933d74c2b3..bd1e5edfbf95 100644
index 21e32ddb21a0..18d663aacd07 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1104,6 +1104,20 @@ usbdrd_dwc3: dwc3@ff600000 {
@@ -1109,6 +1109,20 @@ usbdrd_dwc3: dwc3@ff600000 {
};
};
@ -188,7 +188,7 @@ index 3d933d74c2b3..bd1e5edfbf95 100644
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Tue, 2 Feb 2021 17:22:21 +0200
Subject: [PATCH] arm: dts: rk3288 miqi add hdmi sound nodes
Subject: [PATCH] ARM: dts: RK3288 miqi add hdmi sound nodes
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -237,7 +237,7 @@ index 713f55e143c6..8d30c49f406e 100644
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 2 Apr 2021 17:54:22 +0200
Subject: [PATCH] ARM64/ARM: dts: align sound card names
Subject: [PATCH] ARM/arm64: dts: rockchip: align sound card names
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -440,11 +440,12 @@ index 403d4c6a49a8..7505c3eee4c1 100644
};
struct hdmi_codec_priv {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 17:41:48 +0100
Subject: [PATCH] ARM64: dts: rockchip: fix gpu register width and supplies
for RK3328
Subject: [PATCH] arm64: dts: rockchip: fix GPU register width and supplies for
RK3328
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -484,7 +485,7 @@ index 89fde87f7650..bd62349a9390 100644
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 2dc257098002..f86f10f7e64e 100644
index 18d663aacd07..0e5e492db9c7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -619,7 +619,7 @@ saradc: adc@ff280000 {
@ -496,33 +497,40 @@ index 2dc257098002..f86f10f7e64e 100644
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= <ayufan@ayufan.eu>
Date: Sun, 30 Dec 2018 13:32:47 +0100
Subject: [PATCH] ayufan: dts: rockpro64: change rx_delay for gmac
Change-Id: Ib3899f684188aa1ed1545717af004bba53fe0e07
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 2 May 2021 20:44:21 +0200
Subject: [PATCH] arm64: dts: rockchip: Fix gmac delays for rockpro64 board
Values are measured by RK's delayline tool in vendor kernel
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
index 58097245994a..0da80295f09f 100644
index 58097245994a..c7c515c6c5cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
@@ -248,7 +248,7 @@ &gmac {
@@ -247,8 +247,8 @@ &gmac {
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x28>;
- tx_delay = <0x28>;
- rx_delay = <0x11>;
+ rx_delay = <0x20>;
+ tx_delay = <0x23>;
+ rx_delay = <0x1e>;
status = "okay";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 17:52:02 +0100
Subject: [PATCH] ARM64: dts: rockchip: add SPDIF nodes for RK3328 A1/ROC CC
Subject: [PATCH] arm64: dts: rockchip: add SPDIF nodes for RK3328 A1/ROC CC
boards
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -612,10 +620,11 @@ index 8607514437f5..6ca08854aef3 100644
&tsadc {
status = "okay";
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sat, 27 Feb 2021 18:01:13 +0100
Subject: [PATCH] ARM64: dts: rockchip: Add ir-receiver node for RK3328 ROC CC
Subject: [PATCH] arm64: dts: rockchip: Add ir-receiver node for RK3328 ROC CC
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
@ -654,6 +663,7 @@ index 6ca08854aef3..fb21ad1324bc 100644
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 21:24:15 +0100
@ -664,7 +674,7 @@ Subject: [PATCH] ARM: dts: add cec pinctrl for RK3288 miqi board
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 2420d8e1c66f..55ec4a273f59 100644
index 8d30c49f406e..6d90db5a3b75 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -145,6 +145,8 @@ &gpu {
@ -680,7 +690,7 @@ index 2420d8e1c66f..55ec4a273f59 100644
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 1 Mar 2021 19:22:15 +0100
Subject: [PATCH] HACK: ARM64: dts: enable FE phy for Beelink A1 also
Subject: [PATCH] HACK: arm64: dts: enable FE phy for Beelink A1 also
---
arch/arm64/boot/dts/rockchip/rk3328-a1.dts | 8 ++++++++
@ -705,6 +715,7 @@ index 1bb3f4a6e496..99f28dac0791 100644
&gpu {
mali-supply = <&vdd_logic>;
};
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 26 Feb 2019 20:45:14 +0000
@ -715,7 +726,7 @@ Subject: [PATCH] WIP: dw-hdmi-cec: sleep 100ms on error
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
index 70ab4fbdc23e..4dbc370e538f 100644
index 70ab4fbdc23e..bf54bc70624f 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
@@ -4,6 +4,7 @@
@ -739,7 +750,7 @@ index 70ab4fbdc23e..4dbc370e538f 100644
+ * mitigate the issue with failed transmit attempts.
+ */
+ if ((stat & (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) == (CEC_STAT_DONE|CEC_STAT_ERROR_INIT)) {
+ pr_info("dw_hdmi_cec_hardirq: stat=%02x LOW_DRIVE\n", stat);
+ pr_debug("dw_hdmi_cec_hardirq: stat=%02x LOW_DRIVE\n", stat);
+ cec->tx_status = CEC_TX_STATUS_LOW_DRIVE;
cec->tx_done = true;
ret = IRQ_WAKE_THREAD;
@ -764,4 +775,56 @@ index 70ab4fbdc23e..4dbc370e538f 100644
cec_transmit_attempt_done(adap, cec->tx_status);
}
if (cec->rx_done) {
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 5 May 2021 19:11:12 +0200
Subject: [PATCH] arm64: boot: dts: Increase ACLK_PERILP0 clock rate for RK3399
As per vendor kernel. Leaving this clock at the lower rate will
result in poor DMA controller performance
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9c2ac03c154b..b1c7ee80d255 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1390,7 +1390,7 @@ cru: clock-controller@ff760000 {
<1000000000>,
<150000000>, <75000000>,
<37500000>,
- <100000000>, <100000000>,
+ <300000000>, <100000000>,
<50000000>, <600000000>,
<100000000>, <50000000>,
<400000000>, <400000000>,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 5 May 2021 22:09:44 +0200
Subject: [PATCH] arm64: dts: rockchip: limit emmc clockrate to 150 MHz for
Rock Pi4 board
as per https://github.com/radxa/kernel/commit/db9dfc2cdd25103c553845d24967e4cb31852b61
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index fb7599f07af4..155f22b53103 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -593,6 +593,7 @@ &sdmmc {
&sdhci {
bus-width = <8>;
+ max-frequency = <150000000>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;

View File

@ -1,4 +1,4 @@
From 5794039718ae101401655afcc8485fc15102389b Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ezequiel Garcia <ezequiel@collabora.com>
Date: Mon, 2 Nov 2020 21:05:49 +0200
Subject: [PATCH] media: rkvdec: Fix .buf_prepare
@ -15,10 +15,10 @@ Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com>
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 6bc766f88c13..8671dcea9884 100644
index 8aa946f8f7ad..6768fffe4d94 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -543,7 +543,15 @@ static int rkvdec_buf_prepare(struct vb2_buffer *vb)
@@ -546,7 +546,15 @@ static int rkvdec_buf_prepare(struct vb2_buffer *vb)
if (vb2_plane_size(vb, i) < sizeimage)
return -EINVAL;
}
@ -36,7 +36,7 @@ index 6bc766f88c13..8671dcea9884 100644
}
From e7d4c7c3de568d19163f93375c93922cc571140f Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Mon, 2 Nov 2020 21:05:50 +0200
Subject: [PATCH] media: uapi: Add VP9 stateless decoder controls
@ -637,7 +637,7 @@ index ce728c757eaf..456488f2b5ca 100644
\normalsize
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index bd7f330c941c..a88e962ac8a1 100644
index cfe422d9f439..1666a7ec873a 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -971,6 +971,11 @@ const char *v4l2_ctrl_get_name(u32 id)
@ -901,7 +901,7 @@ index bd7f330c941c..a88e962ac8a1 100644
case V4L2_CTRL_TYPE_HEVC_SPS:
p_hevc_sps = p;
@@ -2617,6 +2850,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
@@ -2618,6 +2851,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:
elem_size = sizeof(struct v4l2_ctrl_vp8_frame_header);
break;
@ -915,7 +915,7 @@ index bd7f330c941c..a88e962ac8a1 100644
elem_size = sizeof(struct v4l2_ctrl_hevc_sps);
break;
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 80cb42450a1b..9351c2635646 100644
index 1ff68c1bf14a..783733bef2da 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1429,6 +1429,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
@ -1449,7 +1449,7 @@ index 000000000000..a14fffb3ad61
+
+#endif /* _VP9_CTRLS_H_ */
From 155a82eef983c13e5bc9fcb6068e4d91d1aea16c Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Boris Brezillon <boris.brezillon@collabora.com>
Date: Mon, 2 Nov 2020 21:05:51 +0200
Subject: [PATCH] media: rkvdec: Add the VP9 backend
@ -3061,10 +3061,10 @@ index 000000000000..8b443ed511c9
+ .done = rkvdec_vp9_done,
+};
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 8671dcea9884..073a7b0fd7b0 100644
index 6768fffe4d94..f3cb15dc60ca 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -159,6 +159,40 @@ static const u32 rkvdec_h264_decoded_fmts[] = {
@@ -162,6 +162,40 @@ static const u32 rkvdec_h264_decoded_fmts[] = {
V4L2_PIX_FMT_NV20,
};
@ -3105,7 +3105,7 @@ index 8671dcea9884..073a7b0fd7b0 100644
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_H264_SLICE,
@@ -174,6 +208,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
@@ -177,6 +211,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
.ops = &rkvdec_h264_fmt_ops,
.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
.decoded_fmts = rkvdec_h264_decoded_fmts,
@ -3127,7 +3127,7 @@ index 8671dcea9884..073a7b0fd7b0 100644
}
};
@@ -373,7 +422,7 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
@@ -376,7 +425,7 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
const struct rkvdec_coded_fmt_desc *desc;
struct v4l2_format *cap_fmt;
@ -3136,7 +3136,7 @@ index 8671dcea9884..073a7b0fd7b0 100644
int ret;
/*
@@ -385,6 +434,15 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
@@ -388,6 +437,15 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
if (vb2_is_busy(peer_vq))
return -EBUSY;
@ -3153,10 +3153,10 @@ index 8671dcea9884..073a7b0fd7b0 100644
if (ret)
return ret;
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
index 2e42833d83e1..68d268f37c86 100644
index c14cd2571bfc..d760c3609e2c 100644
--- a/drivers/staging/media/rkvdec/rkvdec.h
+++ b/drivers/staging/media/rkvdec/rkvdec.h
@@ -51,6 +51,10 @@ struct rkvdec_vp9_decoded_buffer_info {
@@ -58,6 +58,10 @@ struct rkvdec_vp9_decoded_buffer_info {
struct rkvdec_decoded_buffer {
/* Must be the first field in this struct. */
struct v4l2_m2m_buffer base;
@ -3167,7 +3167,7 @@ index 2e42833d83e1..68d268f37c86 100644
};
static inline struct rkvdec_decoded_buffer *
@@ -120,4 +124,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
@@ -128,4 +132,6 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops;

View File

@ -2898,7 +2898,7 @@ index 3acc914888f6..4addfaefdfb4 100644
#define RKVDEC_MODE_VP9 2
#define RKVDEC_RPS_MODE BIT(24)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 7b4ac2292751..c005e2fba128 100644
index f3cb15dc60ca..fa53bbce95f2 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -162,6 +162,61 @@ static const u32 rkvdec_h264_decoded_fmts[] = {
@ -3038,7 +3038,7 @@ index 03ba848411c6..b8ad7fc2271c 100644
.stop = rkvdec_hevc_stop,
.run = rkvdec_hevc_run,
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index c005e2fba128..55a54a1f8496 100644
index fa53bbce95f2..8c8c075635a1 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -79,6 +79,26 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
@ -3098,7 +3098,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
index a6be4eebef74..8a94fc04980f 100644
index b8ad7fc2271c..943f3f4a644a 100644
--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -2164,9 +2164,9 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
@ -3113,6 +3113,7 @@ index a6be4eebef74..8a94fc04980f 100644
ROW_HEIGHT(0));
}
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Wed, 14 Apr 2021 17:26:43 +0200
@ -3124,7 +3125,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
index b8ad7fc2271c..7c6d46bc69e9 100644
index 943f3f4a644a..93b4e09e5bf1 100644
--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -2194,8 +2194,8 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
@ -3167,7 +3168,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
index 7c6d46bc69e9..a6be4eebef74 100644
index 93b4e09e5bf1..8a94fc04980f 100644
--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -2185,6 +2185,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
@ -3242,7 +3243,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
2 files changed, 84 insertions(+), 30 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 55a54a1f8496..2a056413e4b4 100644
index 8c8c075635a1..6c19b535f468 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -14,6 +14,7 @@
@ -3395,7 +3396,7 @@ index 55a54a1f8496..2a056413e4b4 100644
return -EINVAL;
f->pixelformat = rkvdec_coded_fmts[f->index].fourcc;
@@ -1041,14 +1066,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
@@ -1040,14 +1065,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
int ret;
for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++)
@ -3417,7 +3418,7 @@ index 55a54a1f8496..2a056413e4b4 100644
}
ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
@@ -1252,8 +1280,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
@@ -1251,8 +1279,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
}
}
@ -3436,7 +3437,7 @@ index 55a54a1f8496..2a056413e4b4 100644
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, of_rkvdec_match);
@@ -1266,6 +1303,7 @@ static int rkvdec_probe(struct platform_device *pdev)
@@ -1265,6 +1302,7 @@ static int rkvdec_probe(struct platform_device *pdev)
{
struct rkvdec_dev *rkvdec;
struct resource *res;
@ -3444,7 +3445,7 @@ index 55a54a1f8496..2a056413e4b4 100644
unsigned int i;
int ret, irq;
@@ -1291,6 +1329,12 @@ static int rkvdec_probe(struct platform_device *pdev)
@@ -1290,6 +1328,12 @@ static int rkvdec_probe(struct platform_device *pdev)
if (ret)
return ret;
@ -3455,8 +3456,8 @@ index 55a54a1f8496..2a056413e4b4 100644
+ rkvdec->capabilities = variant->capabilities;
+
/*
* Bump ACLK to max. possible freq. (500 MHz) to improve performance
* When 4k video playback.
* Don't bump ACLK to max. possible freq. (500 MHz) to improve performance,
* since it will lead to non-recoverable decoder lockups in case of decoding
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
index 975fe4b5dd68..cc505bc4a042 100644
--- a/drivers/staging/media/rkvdec/rkvdec.h
@ -3514,10 +3515,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 8 insertions(+)
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
index 2a056413e4b4..1c0e35f9d84f 100644
index 6c19b535f468..c3fbf9c94a11 100644
--- a/drivers/staging/media/rkvdec/rkvdec.c
+++ b/drivers/staging/media/rkvdec/rkvdec.c
@@ -1286,11 +1286,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
@@ -1285,11 +1285,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
RKVDEC_CAPABILITY_VP9
};

View File

@ -1676,12 +1676,14 @@ while at that also add the mmu required
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 +++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index bd1e5edfbf95..b91c0bbe5ad1 100644
@@ -767,6 +768,28 @@ vop_mmu: iommu@ff373f00 {
index 0e5e492db9c7..f014b87c48f0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -771,6 +771,28 @@ vop_mmu: iommu@ff373f00 {
status = "disabled";
};
@ -1722,10 +1724,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4d5004c9c778..7969aeec0bd0 100644
index b1c7ee80d255..be839c1a7692 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1297,6 +1297,17 @@ vdec_mmu: iommu@ff660480 {
@@ -1304,6 +1304,17 @@ vdec_mmu: iommu@ff660480 {
#iommu-cells = <0>;
};
@ -1743,7 +1745,7 @@ index 4d5004c9c778..7969aeec0bd0 100644
iep_mmu: iommu@ff670800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff670800 0x0 0x40>;
@@ -1304,8 +1315,8 @@ iep_mmu: iommu@ff670800 {
@@ -1311,8 +1322,8 @@ iep_mmu: iommu@ff670800 {
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
@ -1765,7 +1767,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ba43ee6b91e8..e9bd68cd926e 100644
index 32e141a3955b..6b1523b38e53 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1002,6 +1002,17 @@ crypto: cypto-controller@ff8a0000 {