diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index 60b0e6a27b..7728d82bb7 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -18,8 +18,8 @@ PKG_NEED_UNPACK="$PROJECT_DIR/$PROJECT/bootloader" case "$PROJECT" in Rockchip) - PKG_VERSION="5ecf0ee" - PKG_SHA256="fba1d26583d446a5bbb5713fe37848e05b546d125384c2c2d2883414d61b7cad" + PKG_VERSION="ac5a8f08e811581376e731c898c21e4f79177ec2" + PKG_SHA256="e3ca0d99fef24649c75c4fe7cb0c6de069f98424a7dbf9d397f65b79b8749866" PKG_URL="https://github.com/rockchip-linux/u-boot/archive/$PKG_VERSION.tar.gz" PKG_PATCH_DIRS="rockchip" PKG_DEPENDS_TARGET+=" rkbin" diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0001-dont-build-libfdt.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0001-dont-build-libfdt.patch index f555f5e2dc..4495459ed7 100644 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0001-dont-build-libfdt.patch +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0001-dont-build-libfdt.patch @@ -1,65 +1,37 @@ -From 85f5dd7511d2eaea04a6ba53dc60d1879060568b Mon Sep 17 00:00:00 2001 +From de094e01bb6876d7025e8c1b665828f6764e2c70 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 2 Dec 2017 11:47:07 +0100 Subject: [PATCH] dont build libfdt --- - Makefile | 2 +- - scripts/Makefile.spl | 4 ++-- - tools/Makefile | 4 ---- + scripts/Makefile.spl | 2 +- + scripts/dtc/Makefile | 2 +- tools/dtoc/fdt.py | 2 +- - 4 files changed, 4 insertions(+), 8 deletions(-) + 3 files changed, 3 insertions(+), 3 deletions(-) -diff --git a/Makefile b/Makefile -index 8086f3c93e..4796b488ae 100644 ---- a/Makefile -+++ b/Makefile -@@ -1379,7 +1379,7 @@ $(timestamp_h): $(srctree)/Makefile FORCE - $(call filechk,timestamp.h) - - checkbinman: tools -- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \ -+ @if ! ( echo 'from pylibfdt import libfdt' | ( python )); then \ - echo >&2; \ - echo >&2 '*** binman needs the Python libfdt library.'; \ - echo >&2 '*** Either install it on your system, or try:'; \ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl -index b86ea76bab..ea54f9098c 100644 +index e2f0741db6..9264103366 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl -@@ -246,7 +246,7 @@ quiet_cmd_fdtgrep = FDTGREP $@ - $(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE - $(call if_changed,fdtgrep) +@@ -249,7 +249,7 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN) + $(obj)/$(SPL_BIN).dtb: dts/dt-spl.dtb FORCE + $(call if_changed,copy) --pythonpath = PYTHONPATH=tools +-pythonpath = PYTHONPATH=scripts/dtc/pylibfdt +pythonpath = python quiet_cmd_dtocc = DTOC C $@ cmd_dtocc = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ platdata -@@ -370,7 +370,7 @@ ifneq ($(cmd_files),) - endif +diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile +index 90ef2db85c..077acd50d9 100644 +--- a/scripts/dtc/Makefile ++++ b/scripts/dtc/Makefile +@@ -31,4 +31,4 @@ $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h + clean-files := dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h - checkdtoc: tools -- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \ -+ @if ! ( echo 'from pylibfdt import libfdt' | ( python )); then \ - echo '*** dtoc needs the Python libfdt library. Either '; \ - echo '*** install it on your system, or try:'; \ - echo '***'; \ -diff --git a/tools/Makefile b/tools/Makefile -index 8e1009bf6c..459c71ef1f 100644 ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -232,10 +232,6 @@ clean-dirs := lib common - - always := $(hostprogs-y) - --# Build a libfdt Python module if swig is available --# Use 'sudo apt-get install swig libpython-dev' to enable this --always += $(if $(shell which swig 2> /dev/null),_libfdt.so) -- - # Generated LCD/video logo - LOGO_H = $(objtree)/include/bmp_logo.h - LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h + # Added for U-Boot +-subdir-$(CONFIG_PYLIBFDT) += pylibfdt ++#subdir-$(CONFIG_PYLIBFDT) += pylibfdt diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index dbc338653b..04f3c5935c 100644 --- a/tools/dtoc/fdt.py diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-board-save-cpuid-to-env.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-board-save-cpuid-to-env.patch new file mode 100644 index 0000000000..6903863e80 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-board-save-cpuid-to-env.patch @@ -0,0 +1,35 @@ +From dfdfa7fb1a50c21a784a67e5f99d8714ca853c07 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 20 Aug 2018 22:55:34 +0200 +Subject: [PATCH] rockchip: board: save cpuid to env + +--- + arch/arm/mach-rockchip/board.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c +index 233f0b6f9a..6c2021e32a 100644 +--- a/arch/arm/mach-rockchip/board.c ++++ b/arch/arm/mach-rockchip/board.c +@@ -44,6 +44,7 @@ DECLARE_GLOBAL_DATA_PTR; + static int rockchip_set_serialno(void) + { + char serialno_str[VENDOR_SN_MAX]; ++ char cpuid_str[CPUID_LEN * 2 + 1]; + int ret = 0, i; + u8 cpuid[CPUID_LEN] = {0}; + u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; +@@ -89,6 +90,13 @@ static int rockchip_set_serialno(void) + snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); + + env_set("serial#", serialno_str); ++ ++ memset(cpuid_str, 0, sizeof(cpuid_str)); ++ for (i = 0; i < CPUID_LEN; i++) { ++ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); ++ } ++ ++ env_set("cpuid#", cpuid_str); + #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION + } + #endif diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch deleted file mode 100644 index b6643568e5..0000000000 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 39dfedae58057500912a6f933fced3edb9376b3b Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 22 Oct 2017 12:48:24 +0200 -Subject: [PATCH] rockchip: tinker: enable rockchip video driver - ---- - configs/tinker-rk3288_defconfig | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig -index 00e2d81954..62cae4f21e 100644 ---- a/configs/tinker-rk3288_defconfig -+++ b/configs/tinker-rk3288_defconfig -@@ -80,6 +80,11 @@ CONFIG_G_DNL_PRODUCT_NUM=0x320a - CONFIG_USB_HOST_ETHER=y - CONFIG_USB_ETHER_ASIX=y - CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_DM_VIDEO=y -+CONFIG_DISPLAY=y -+CONFIG_VIDEO_ROCKCHIP=y -+CONFIG_DISPLAY_ROCKCHIP_HDMI=y -+CONFIG_CONSOLE_SCROLL_LINES=10 - CONFIG_USE_TINY_PRINTF=y - CONFIG_CMD_DHRYSTONE=y - CONFIG_ERRNO_STR=y diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch deleted file mode 100644 index c08df9079c..0000000000 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0003-Add-rk3328-efuse-support.patch +++ /dev/null @@ -1,126 +0,0 @@ -From dd6e1ab93a92e133c41a8665f6d8aca9450bdca8 Mon Sep 17 00:00:00 2001 -From: Kamil Trzcinski -Date: Sun, 20 Aug 2017 01:52:34 +0200 -Subject: [PATCH] Add rk3328-efuse support - ---- - arch/arm/dts/rk3328.dtsi | 25 ++++++++++++++++++++ - drivers/misc/rockchip-efuse.c | 55 +++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 80 insertions(+) - -diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi -index 2a4c4929d7..611a0d4b21 100644 ---- a/arch/arm/dts/rk3328.dtsi -+++ b/arch/arm/dts/rk3328.dtsi -@@ -342,6 +342,31 @@ - }; - }; - -+ efuse: efuse@ff260000 { -+ compatible = "rockchip,rk3328-efuse"; -+ reg = <0x0 0xff260000 0x0 0x50>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&cru SCLK_EFUSE>; -+ clock-names = "pclk_efuse"; -+ rockchip,efuse-size = <0x20>; -+ -+ /* Data cells */ -+ efuse_id: id@7 { -+ reg = <0x07 0x10>; -+ }; -+ cpu_leakage: cpu-leakage@17 { -+ reg = <0x17 0x1>; -+ }; -+ logic_leakage: logic-leakage@19 { -+ reg = <0x19 0x1>; -+ }; -+ efuse_cpu_version: cpu-version@1a { -+ reg = <0x1a 0x1>; -+ bits = <3 3>; -+ }; -+ }; -+ - saradc: saradc@ff280000 { - compatible = "rockchip,rk3328-saradc", "rockchip,saradc"; - reg = <0x0 0xff280000 0x0 0x100>; -diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c -index b4ad19cfe8..81b78f9b2c 100644 ---- a/drivers/misc/rockchip-efuse.c -+++ b/drivers/misc/rockchip-efuse.c -@@ -16,6 +16,14 @@ - #include - #include - -+#define RK3328_INT_CON 0x0014 -+#define RK3328_INT_STATUS 0x0018 -+#define RK3328_DOUT 0x0020 -+#define RK3328_AUTO_CTRL 0x0024 -+#define RK3328_INT_FINISH BIT(0) -+#define RK3328_AUTO_ENB BIT(0) -+#define RK3328_AUTO_RD BIT(1) -+ - #define RK3399_A_SHIFT 16 - #define RK3399_A_MASK 0x3ff - #define RK3399_NFUSES 32 -@@ -95,6 +103,49 @@ U_BOOT_CMD( - ); - #endif - -+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset, -+ void *buf, int size) -+{ -+ struct rockchip_efuse_platdata *plat = dev_get_platdata(dev); -+ -+ unsigned int addr_start, addr_end, addr_offset; -+ u32 out_value, status; -+ u8 bytes[RK3399_NFUSES * RK3399_BYTES_PER_FUSE]; -+ int i = 0; -+ u32 addr; -+ -+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ -+ offset += 96; -+ -+ addr_start = offset / RK3399_BYTES_PER_FUSE; -+ addr_offset = offset % RK3399_BYTES_PER_FUSE; -+ addr_end = DIV_ROUND_UP(offset + size, RK3399_BYTES_PER_FUSE); -+ -+ /* cap to the size of the efuse block */ -+ if (addr_end > RK3399_NFUSES) -+ addr_end = RK3399_NFUSES; -+ -+ for (addr = addr_start; addr < addr_end; addr++) { -+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | -+ ((addr & RK3399_A_MASK) << RK3399_A_SHIFT), -+ plat->base + RK3328_AUTO_CTRL); -+ udelay(10); -+ status = readl(plat->base + RK3328_INT_STATUS); -+ if (!(status & RK3328_INT_FINISH)) { -+ return -EIO; -+ } -+ out_value = readl(plat->base + RK3328_DOUT); -+ writel(RK3328_INT_FINISH, plat->base + RK3328_INT_STATUS); -+ -+ memcpy(&bytes[i], &out_value, RK3399_BYTES_PER_FUSE); -+ i += RK3399_BYTES_PER_FUSE; -+ } -+ -+ memcpy(buf, bytes + addr_offset, size); -+ -+ return 0; -+} -+ - static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset, - void *buf, int size) - { -@@ -223,6 +274,10 @@ static const struct udevice_id rockchip_efuse_ids[] = { - .compatible = "rockchip,rk322x-efuse", - .data = (ulong)&rockchip_rk3288_efuse_read, - }, -+ { -+ .compatible = "rockchip,rk3328-efuse", -+ .data = (ulong)rockchip_rk3328_efuse_read, -+ }, - { - .compatible = "rockchip,rk3399-efuse", - .data = (ulong)&rockchip_rk3399_efuse_read, diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0003-rockchip-rk3328-add-efuse-support.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0003-rockchip-rk3328-add-efuse-support.patch new file mode 100644 index 0000000000..45ec65f3a0 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0003-rockchip-rk3328-add-efuse-support.patch @@ -0,0 +1,48 @@ +From e44f2ddac6099a0947c4182a0f4296d8df2be4a8 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 18 Aug 2018 17:26:35 +0200 +Subject: [PATCH] rockchip: rk3328: add efuse support + +--- + arch/arm/dts/rk3328.dtsi | 14 ++++++++++++++ + configs/evb-rk3328_defconfig | 2 ++ + 2 files changed, 16 insertions(+) + +diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi +index 94d39b1b35..35db0ccf4d 100644 +--- a/arch/arm/dts/rk3328.dtsi ++++ b/arch/arm/dts/rk3328.dtsi +@@ -341,6 +341,20 @@ + }; + }; + ++ efuse: efuse@ff260000 { ++ compatible = "rockchip,rk3328-efuse"; ++ reg = <0x0 0xff260000 0x0 0x80>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ clocks = <&cru SCLK_EFUSE>; ++ clock-names = "pclk_efuse"; ++ ++ /* Data cells */ ++ cpu_id: cpu-id@7 { ++ reg = <0x07 0x10>; ++ }; ++ }; ++ + saradc: saradc@ff280000 { + compatible = "rockchip,rk3328-saradc", "rockchip,saradc"; + reg = <0x0 0xff280000 0x0 0x100>; +diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig +index 79535c760d..0897a28e1d 100644 +--- a/configs/evb-rk3328_defconfig ++++ b/configs/evb-rk3328_defconfig +@@ -52,6 +52,8 @@ CONFIG_SPL_CLK=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEY=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_PHY=y diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch deleted file mode 100644 index 42bd7f21c0..0000000000 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0004-Get-serial-and-ethaddr-from-efuse.patch +++ /dev/null @@ -1,184 +0,0 @@ -From 77349a847b0649e8ead1dba3a297607b2a674aaa Mon Sep 17 00:00:00 2001 -From: Kamil Trzcinski -Date: Sat, 19 Aug 2017 20:38:50 +0200 -Subject: [PATCH] Get serial and ethaddr from efuse - ---- - board/rockchip/evb_rk3328/evb-rk3328.c | 124 +++++++++++++++++++++++++++++++++ - configs/evb-rk3328_defconfig | 2 + - include/configs/rk3328_common.h | 2 + - 3 files changed, 128 insertions(+) - -diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c -index d6fc57cd8e..1d0f7e9c95 100644 ---- a/board/rockchip/evb_rk3328/evb-rk3328.c -+++ b/board/rockchip/evb_rk3328/evb-rk3328.c -@@ -7,14 +7,20 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include -+#include - - DECLARE_GLOBAL_DATA_PTR; - -+#define RK3328_CPUID_OFF 0x7 -+#define RK3328_CPUID_LEN 0x10 -+ - int board_init(void) - { - int ret; -@@ -80,3 +86,121 @@ int board_usb_cleanup(int index, enum usb_init_type init) - return 0; - } - #endif -+ -+static void setup_macaddr(void) -+{ -+#if CONFIG_IS_ENABLED(CMD_NET) -+ int ret; -+ const char *cpuid = env_get("cpuid#"); -+ u8 hash[SHA256_SUM_LEN]; -+ int size = sizeof(hash); -+ u8 mac_addr[6]; -+ -+ /* Only generate a MAC address, if none is set in the environment */ -+ if (env_get("ethaddr")) -+ return; -+ -+ if (!cpuid) { -+ debug("%s: could not retrieve 'cpuid#'\n", __func__); -+ return; -+ } -+ -+ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); -+ if (ret) { -+ debug("%s: failed to calculate SHA256\n", __func__); -+ return; -+ } -+ -+ /* Copy 6 bytes of the hash to base the MAC address on */ -+ memcpy(mac_addr, hash, 6); -+ -+ /* Make this a valid MAC address and set it */ -+ mac_addr[0] &= 0xfe; /* clear multicast bit */ -+ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ -+ eth_env_set_enetaddr("ethaddr", mac_addr); -+ -+ /* Make a valid MAC address for eth1 */ -+ mac_addr[5] += 0x20; -+ mac_addr[5] &= 0xff; -+ eth_env_set_enetaddr("eth1addr", mac_addr); -+#endif -+ -+ return; -+} -+ -+static void setup_serial(void) -+{ -+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) -+ struct udevice *dev; -+ int ret, i; -+ u8 cpuid[RK3328_CPUID_LEN]; -+ u8 low[RK3328_CPUID_LEN/2], high[RK3328_CPUID_LEN/2]; -+ char cpuid_str[RK3328_CPUID_LEN * 2 + 1]; -+ u64 serialno; -+ char serialno_str[16]; -+ -+ /* retrieve the device */ -+ ret = uclass_get_device_by_driver(UCLASS_MISC, -+ DM_GET_DRIVER(rockchip_efuse), &dev); -+ if (ret) { -+ debug("%s: could not find efuse device\n", __func__); -+ return; -+ } -+ -+ /* read the cpu_id range from the efuses */ -+ ret = misc_read(dev, RK3328_CPUID_OFF, &cpuid, sizeof(cpuid)); -+ if (ret) { -+ debug("%s: reading cpuid from the efuses failed\n", -+ __func__); -+ return; -+ } -+ -+ memset(cpuid_str, 0, sizeof(cpuid_str)); -+ for (i = 0; i < 16; i++) -+ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); -+ -+ debug("cpuid: %s\n", cpuid_str); -+ -+ /* -+ * Mix the cpuid bytes using the same rules as in -+ * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c -+ */ -+ for (i = 0; i < 8; i++) { -+ low[i] = cpuid[1 + (i << 1)]; -+ high[i] = cpuid[i << 1]; -+ } -+ -+ serialno = crc32_no_comp(0, low, 8); -+ serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; -+ snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); -+ -+ env_set("cpuid#", cpuid_str); -+ env_set("serial#", serialno_str); -+#endif -+ -+ return; -+} -+ -+int misc_init_r(void) -+{ -+ setup_serial(); -+ setup_macaddr(); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_SERIAL_TAG -+void get_board_serial(struct tag_serialnr *serialnr) -+{ -+ char *serial_string; -+ u64 serial = 0; -+ -+ serial_string = env_get("serial#"); -+ -+ if (serial_string) -+ serial = simple_strtoull(serial_string, NULL, 16); -+ -+ serialnr->high = (u32)(serial >> 32); -+ serialnr->low = (u32)(serial & 0xffffffff); -+} -+#endif -diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig -index d4a00718c5..9107c020b7 100644 ---- a/configs/evb-rk3328_defconfig -+++ b/configs/evb-rk3328_defconfig -@@ -55,6 +55,8 @@ CONFIG_SPL_CLK=y - CONFIG_ROCKCHIP_GPIO=y - CONFIG_SYS_I2C_ROCKCHIP=y - CONFIG_DM_KEY=y -+CONFIG_MISC=y -+CONFIG_ROCKCHIP_EFUSE=y - CONFIG_MMC_DW=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_PHY=y -diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h -index b7971782b5..a2af5a7989 100644 ---- a/include/configs/rk3328_common.h -+++ b/include/configs/rk3328_common.h -@@ -9,6 +9,8 @@ - - #include "rockchip-common.h" - -+#define CONFIG_MISC_INIT_R -+ - #define CONFIG_SYS_MALLOC_LEN (32 << 20) - #define CONFIG_SYS_CBSIZE 1024 - #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0004-rk3328-evb-get-ethaddr-from-efuse.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0004-rk3328-evb-get-ethaddr-from-efuse.patch new file mode 100644 index 0000000000..ed823d2bc5 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0004-rk3328-evb-get-ethaddr-from-efuse.patch @@ -0,0 +1,66 @@ +From c4068865306726939489b961fd8e04f9a2a7b1ce Mon Sep 17 00:00:00 2001 +From: Kamil Trzcinski +Date: Sat, 19 Aug 2017 20:38:50 +0200 +Subject: [PATCH] rk3328-evb: get ethaddr from efuse + +--- + board/rockchip/evb_rk3328/evb-rk3328.c | 49 ++++++++++++++++++++++++++ + 1 file changed, 49 insertions(+) + +diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c +index c8e7a3ad64..8829f50327 100644 +--- a/board/rockchip/evb_rk3328/evb-rk3328.c ++++ b/board/rockchip/evb_rk3328/evb-rk3328.c +@@ -3,3 +3,52 @@ + * + * SPDX-License-Identifier: GPL-2.0+ + */ ++ ++#include ++#include ++ ++static void setup_macaddr(void) ++{ ++#if CONFIG_IS_ENABLED(CMD_NET) ++ int ret; ++ const char *cpuid = env_get("cpuid#"); ++ u8 hash[SHA256_SUM_LEN]; ++ int size = sizeof(hash); ++ u8 mac_addr[6]; ++ ++ /* Only generate a MAC address, if none is set in the environment */ ++ if (env_get("ethaddr")) ++ return; ++ ++ if (!cpuid) { ++ debug("%s: could not retrieve 'cpuid#'\n", __func__); ++ return; ++ } ++ ++ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); ++ if (ret) { ++ debug("%s: failed to calculate SHA256\n", __func__); ++ return; ++ } ++ ++ /* Copy 6 bytes of the hash to base the MAC address on */ ++ memcpy(mac_addr, hash, 6); ++ ++ /* Make this a valid MAC address and set it */ ++ mac_addr[0] &= 0xfe; /* clear multicast bit */ ++ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++ ++ /* Make a valid MAC address for eth1 */ ++ mac_addr[5] += 0x20; ++ mac_addr[5] &= 0xff; ++ eth_env_set_enetaddr("eth1addr", mac_addr); ++#endif ++} ++ ++int rk_board_late_init(void) ++{ ++ setup_macaddr(); ++ ++ return 0; ++} diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch index 6c031af5d3..29804ac0ef 100644 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0005-rk3328-evb-add-sdmmc-vmmc-supply.patch @@ -1,17 +1,31 @@ -From b6c47bd9f6a8965ab538f168086d4fd99fcf3066 Mon Sep 17 00:00:00 2001 +From 46d72af5faa7f12a057294356eb353d38c56b5fe Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 10 Jan 2018 19:56:16 +0100 Subject: [PATCH] rk3328-evb: add sdmmc vmmc-supply --- - arch/arm/dts/rk3328-evb.dts | 1 + - 1 file changed, 1 insertion(+) + arch/arm/dts/rk3328-evb.dts | 7 +++++-- + arch/arm/dts/rk3328.dtsi | 10 ++++++---- + 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts -index 4b13a8da64..586c58659d 100644 +index aafafec649..497b040f56 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts -@@ -61,6 +61,7 @@ +@@ -28,8 +28,10 @@ + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; +- regulator-always-on; +- regulator-boot-on; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + }; + + vcc5v0_otg: vcc5v0-otg-drv { +@@ -75,6 +77,7 @@ num-slots = <1>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; @@ -19,3 +33,31 @@ index 4b13a8da64..586c58659d 100644 status = "okay"; }; +diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi +index 35db0ccf4d..231e66788d 100644 +--- a/arch/arm/dts/rk3328.dtsi ++++ b/arch/arm/dts/rk3328.dtsi +@@ -481,8 +481,9 @@ + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff500000 0x0 0x4000>; + max-frequency = <150000000>; +- clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; +- clock-names = "biu", "ciu"; ++ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, ++ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; +@@ -504,8 +505,9 @@ + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xff520000 0x0 0x4000>; + max-frequency = <150000000>; +- clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; +- clock-names = "biu", "ciu"; ++ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, ++ <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; ++ clock-names = "biu", "ciu", "ciu-drv", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + status = "disabled"; diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch deleted file mode 100644 index ef4ae984c0..0000000000 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0006-rk3399-evb-prefer-sdcard-boot.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 0f59425a214329eda9080f186bfa82780fce75e6 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 28 Jan 2018 15:42:23 +0100 -Subject: [PATCH] rk3399-evb: prefer sdcard boot - ---- - arch/arm/dts/rk3399-evb.dts | 2 +- - arch/arm/dts/rk3399.dtsi | 4 ++-- - 2 files changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts -index a0ea589015..ae28bded64 100644 ---- a/arch/arm/dts/rk3399-evb.dts -+++ b/arch/arm/dts/rk3399-evb.dts -@@ -17,7 +17,7 @@ - - chosen { - stdout-path = &uart2; -- u-boot,spl-boot-order = &sdhci, &sdmmc; -+ u-boot,spl-boot-order = &sdmmc, &sdhci; - }; - - vdd_center: vdd-center { -diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi -index 68221b47f7..cfb99c9e16 100644 ---- a/arch/arm/dts/rk3399.dtsi -+++ b/arch/arm/dts/rk3399.dtsi -@@ -35,8 +35,8 @@ - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; -- mmc0 = &sdhci; -- mmc1 = &sdmmc; -+ mmc0 = &sdmmc; -+ mmc1 = &sdhci; - }; - - cpus { diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0006-rockchip-rk3288-add-efuse-support.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0006-rockchip-rk3288-add-efuse-support.patch new file mode 100644 index 0000000000..d20992d267 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0006-rockchip-rk3288-add-efuse-support.patch @@ -0,0 +1,52 @@ +From 180c7b262f17a58de6865b7b7a5df609e1449ce8 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 5 Aug 2018 20:58:54 +0200 +Subject: [PATCH] rockchip: rk3288: add efuse support + +--- + arch/arm/dts/rk3288.dtsi | 5 ++--- + configs/miqi-rk3288_defconfig | 2 ++ + configs/tinker-rk3288_defconfig | 1 + + 3 files changed, 5 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi +index 20adb0dece..8b085ee6dc 100644 +--- a/arch/arm/dts/rk3288.dtsi ++++ b/arch/arm/dts/rk3288.dtsi +@@ -936,9 +936,8 @@ + }; + + efuse: efuse@ffb40000 { +- compatible = "rockchip,rk3288-efuse"; +- reg = <0xffb40000 0x10000>; +- status = "disabled"; ++ compatible = "rockchip,rockchip-efuse"; ++ reg = <0xffb40000 0x20>; + }; + + gic: interrupt-controller@ffc01000 { +diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig +index 09d5979dff..ffbe701cfd 100644 +--- a/configs/miqi-rk3288_defconfig ++++ b/configs/miqi-rk3288_defconfig +@@ -48,6 +48,8 @@ CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_DM_KEY=y + CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_DM_ETH=y +diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig +index 3abf7c1088..0afc0a35e1 100644 +--- a/configs/tinker-rk3288_defconfig ++++ b/configs/tinker-rk3288_defconfig +@@ -46,6 +46,7 @@ CONFIG_SPL_CLK=y + CONFIG_ROCKCHIP_GPIO=y + CONFIG_SYS_I2C_ROCKCHIP=y + CONFIG_MISC=y ++CONFIG_ROCKCHIP_EFUSE=y + CONFIG_I2C_EEPROM=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch deleted file mode 100644 index a5eae75712..0000000000 --- a/packages/tools/u-boot/patches/rockchip/u-boot-0007-board-add-support-for-odroid-n1.patch +++ /dev/null @@ -1,1069 +0,0 @@ -From 018af92e85f8526dbfc7b70d5cd1a7529b79d03e Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 16 Feb 2018 22:45:25 +0000 -Subject: [PATCH] board: add support for odroid-n1 - ---- - arch/arm/dts/rk3399-odroidn1.dts | 601 ++++++++++++++++++++++++++++++++++ - arch/arm/mach-rockchip/rk3399/Kconfig | 7 + - board/rockchip/odroidn1/Kconfig | 15 + - board/rockchip/odroidn1/MAINTAINERS | 6 + - board/rockchip/odroidn1/Makefile | 7 + - board/rockchip/odroidn1/odroidn1.c | 225 +++++++++++++ - configs/odroidn1_defconfig | 97 ++++++ - include/configs/odroidn1.h | 28 ++ - 8 files changed, 986 insertions(+) - create mode 100644 arch/arm/dts/rk3399-odroidn1.dts - create mode 100644 board/rockchip/odroidn1/Kconfig - create mode 100644 board/rockchip/odroidn1/MAINTAINERS - create mode 100644 board/rockchip/odroidn1/Makefile - create mode 100644 board/rockchip/odroidn1/odroidn1.c - create mode 100644 configs/odroidn1_defconfig - create mode 100644 include/configs/odroidn1.h - -diff --git a/arch/arm/dts/rk3399-odroidn1.dts b/arch/arm/dts/rk3399-odroidn1.dts -new file mode 100644 -index 0000000000..aa653d6fc6 ---- /dev/null -+++ b/arch/arm/dts/rk3399-odroidn1.dts -@@ -0,0 +1,601 @@ -+/* -+ * Copyright (c) 2017 Hardkernel Co., Ltd. -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+/dts-v1/; -+#include -+#include -+#include "rk3399.dtsi" -+#include "rk3399-sdram-ddr3-1600.dtsi" -+ -+/ { -+ model = "Hardkernel ODROID-N1"; -+ compatible = "hardkernel,odroid-n1", "rockchip,rk3399"; -+ -+ chosen { -+ stdout-path = &uart2; -+ u-boot,spl-boot-order = &sdmmc, &sdhci; -+ }; -+ -+ clkin_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "clkin_gmac"; -+ #clock-cells = <0>; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rk808 1>; -+ clock-names = "ext_clock"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_enable_h>; -+ -+ /* -+ * On the module itself this is one of these (depending -+ * on the actual card populated): -+ * - SDIO_RESET_L_WL_REG_ON -+ * - PDN (power down when low) -+ */ -+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; -+ }; -+ -+ vcc5v0_host31: vcc5v0-host31-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host31_vbus_drv>; -+ regulator-name = "vcc5v0_host31"; -+ }; -+ -+ vcc5v0_host32: vcc5v0-host32-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host32_vbus_drv>; -+ regulator-name = "vcc5v0_host32"; -+ }; -+ -+ vcc3v3_pcie: vcc3v3-pcie-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_drv>; -+ regulator-name = "vcc3v3_pcie"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc3v3_sys: vcc3v3-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vcc5v0_host: vcc5v0-host-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&host_vbus_drv>; -+ regulator-name = "vcc5v0_host"; -+ regulator-always-on; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ vcc_phy: vcc-phy-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_phy"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vdd_log: vdd-log { -+ compatible = "pwm-regulator"; -+ pwms = <&pwm2 0 25000 1>; -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <430000>; -+ regulator-max-microvolt = <1400000>; -+ regulator-init-microvolt = <950000>; -+ }; -+ -+ vccadc_ref: vccadc-ref { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc1v8_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_l>; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_b>; -+}; -+ -+&emmc_phy { -+ status = "okay"; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_RMII_SRC>; -+ assigned-clock-parents = <&clkin_gmac>; -+ clock_in_out = "input"; -+ phy-supply = <&vcc_phy>; -+ phy-mode = "rgmii"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 50000>; -+ tx_delay = <0x100>; -+ rx_delay = <0x11>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ i2c-scl-rising-time-ns = <168>; -+ i2c-scl-falling-time-ns = <4>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <23 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc3v3_sys>; -+ vcc2-supply = <&vcc3v3_sys>; -+ vcc3-supply = <&vcc3v3_sys>; -+ vcc4-supply = <&vcc3v3_sys>; -+ vcc6-supply = <&vcc3v3_sys>; -+ vcc7-supply = <&vcc3v3_sys>; -+ vcc8-supply = <&vcc3v3_sys>; -+ vcc9-supply = <&vcc3v3_sys>; -+ vcc10-supply = <&vcc3v3_sys>; -+ vcc11-supply = <&vcc3v3_sys>; -+ vcc12-supply = <&vcc3v3_sys>; -+ vddio-supply = <&vcc1v8_pmu>; -+ -+ regulators { -+ vdd_center: DCDC_REG1 { -+ regulator-name = "vdd_center"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_l: DCDC_REG2 { -+ regulator-name = "vdd_cpu_l"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-ramp-delay = <6001>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8: DCDC_REG4 { -+ regulator-name = "vcc_1v8"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc1v8_dvp: LDO_REG1 { -+ regulator-name = "vcc1v8_dvp"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v0_tp: LDO_REG2 { -+ regulator-name = "vcc3v0_tp"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc1v8_pmu: LDO_REG3 { -+ regulator-name = "vcc1v8_pmu"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc_sd: LDO_REG4 { -+ regulator-name = "vcc_sd"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcca3v0_codec: LDO_REG5 { -+ regulator-name = "vcca3v0_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v5: LDO_REG6 { -+ regulator-name = "vcc_1v5"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1500000>; -+ }; -+ }; -+ -+ vcca1v8_codec: LDO_REG7 { -+ regulator-name = "vcca1v8_codec"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v0: LDO_REG8 { -+ regulator-name = "vcc_3v0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3000000>; -+ }; -+ }; -+ -+ vcc3v3_s3: SWITCH_REG1 { -+ regulator-name = "vcc3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc3v3_s0: SWITCH_REG2 { -+ regulator-name = "vcc3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+ -+ vdd_cpu_b: regulator@40 { -+ compatible = "silergy,syr827"; -+ reg = <0x40>; -+ fcs,suspend-voltage-selector = <0>; -+ regulator-name = "vdd_cpu_b"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: regulator@41 { -+ compatible = "silergy,syr828"; -+ reg = <0x41>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_gpu"; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1500000>; -+ regulator-ramp-delay = <1000>; -+ regulator-always-on; -+ regulator-boot-on; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ i2c-scl-rising-time-ns = <300>; -+ i2c-scl-falling-time-ns = <15>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ i2c-scl-rising-time-ns = <450>; -+ i2c-scl-falling-time-ns = <15>; -+ status = "okay"; -+}; -+ -+&i2c4 { -+ i2c-scl-rising-time-ns = <600>; -+ i2c-scl-falling-time-ns = <20>; -+ status = "okay"; -+}; -+ -+&i2s0 { -+ rockchip,playback-channels = <8>; -+ rockchip,capture-channels = <8>; -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&i2s1 { -+ rockchip,playback-channels = <2>; -+ rockchip,capture-channels = <2>; -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&i2s2 { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ bt656-supply = <&vcc1v8_dvp>; -+ audio-supply = <&vcca1v8_codec>; -+ sdmmc-supply = <&vcc_sd>; -+ gpio1830-supply = <&vcc_3v0>; -+}; -+ -+&pcie_phy { -+ status = "okay"; -+}; -+ -+&pcie0 { -+ ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; -+ num-lanes = <4>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie_clkreqn>; -+ status = "okay"; -+}; -+ -+&pmu_io_domains { -+ pmu1830-supply = <&vcc_3v0>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ pcie { -+ pcie_drv: pcie-drv { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ vsel1_gpio: vsel1-gpio { -+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ vsel2_gpio: vsel2-gpio { -+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ sdio-pwrseq { -+ wifi_enable_h: wifi-enable-h { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ usb2 { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ host31_vbus_drv: host31-vbus-drv { -+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ host32_vbus_drv: host32-vbus-drv { -+ rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vccadc_ref>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ u-boot,dm-pre-reloc; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ keep-power-in-suspend; -+ mmc-hs400-1_8v; -+ mmc-hs400-enhanced-strobe; -+ non-removable; -+ status = "okay"; -+}; -+ -+&tsadc { -+ /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-mode = <1>; -+ /* tshut polarity 0:LOW 1:HIGH */ -+ rockchip,hw-tshut-polarity = <1>; -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+ -+ u2phy0_otg: otg-port { -+ phy-supply = <&vcc5v0_host31>; -+ status = "okay"; -+ }; -+ -+ u2phy0_host: host-port { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+ }; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+ -+ u2phy1_otg: otg-port { -+ phy-supply = <&vcc5v0_host32>; -+ status = "okay"; -+ }; -+ -+ u2phy1_host: host-port { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+ }; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&dwc3_typec0 { -+ status = "okay"; -+}; -+ -+&dwc3_typec1 { -+ status = "okay"; -+}; -diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig -index c4a6d46649..c17c839a6a 100644 ---- a/arch/arm/mach-rockchip/rk3399/Kconfig -+++ b/arch/arm/mach-rockchip/rk3399/Kconfig -@@ -11,6 +11,12 @@ config TARGET_EVB_RK3399 - with full function and phisical connectors support like type-C ports, - usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial... - -+config TARGET_ODROIDN1 -+ bool "Hardkernel ODROID-N1 board" -+ select BOARD_LATE_INIT -+ help -+ ODROID-N1 support -+ - config TARGET_PUMA_RK3399 - bool "Theobroma Systems RK3399-Q7 (Puma)" - help -@@ -38,6 +44,7 @@ config SYS_MALLOC_F_LEN - default 0x0800 - - source "board/rockchip/evb_rk3399/Kconfig" -+source "board/rockchip/odroidn1/Kconfig" - source "board/theobroma-systems/puma_rk3399/Kconfig" - - endif -diff --git a/board/rockchip/odroidn1/Kconfig b/board/rockchip/odroidn1/Kconfig -new file mode 100644 -index 0000000000..54744010d6 ---- /dev/null -+++ b/board/rockchip/odroidn1/Kconfig -@@ -0,0 +1,15 @@ -+if TARGET_ODROIDN1 -+ -+config SYS_BOARD -+ default "odroidn1" -+ -+config SYS_VENDOR -+ default "rockchip" -+ -+config SYS_CONFIG_NAME -+ default "odroidn1" -+ -+config BOARD_SPECIFIC_OPTIONS # dummy -+ def_bool y -+ -+endif -diff --git a/board/rockchip/odroidn1/MAINTAINERS b/board/rockchip/odroidn1/MAINTAINERS -new file mode 100644 -index 0000000000..a7f83c3283 ---- /dev/null -+++ b/board/rockchip/odroidn1/MAINTAINERS -@@ -0,0 +1,6 @@ -+ODROIDN1 -+M: Mauro Ribeiro -+S: Maintained -+F: board/rockchip/odroidn1 -+F: include/configs/odroidn1.h -+F: configs/odroidn1_defconfig -diff --git a/board/rockchip/odroidn1/Makefile b/board/rockchip/odroidn1/Makefile -new file mode 100644 -index 0000000000..bad5e036ac ---- /dev/null -+++ b/board/rockchip/odroidn1/Makefile -@@ -0,0 +1,7 @@ -+# -+# (C) Copyright 2017 Hardkernel Co., Ltd -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += odroidn1.o -diff --git a/board/rockchip/odroidn1/odroidn1.c b/board/rockchip/odroidn1/odroidn1.c -new file mode 100644 -index 0000000000..713d076824 ---- /dev/null -+++ b/board/rockchip/odroidn1/odroidn1.c -@@ -0,0 +1,225 @@ -+/* -+ * (C) Copyright 2017 Hardkernel Co., Ltd -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#define RK3399_CPUID_OFF 0x7 -+#define RK3399_CPUID_LEN 0x10 -+ -+int board_init(void) -+{ -+ struct udevice *pinctrl, *regulator; -+ int ret; -+ -+ /* -+ * The PWM do not have decicated interrupt number in dts and can -+ * not get periph_id by pinctrl framework, so let's init them here. -+ * The PWM2 and PWM3 are for pwm regulater. -+ */ -+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); -+ if (ret) { -+ debug("%s: Cannot find pinctrl device\n", __func__); -+ goto out; -+ } -+ -+ /* Enable pwm0 for panel backlight */ -+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0); -+ if (ret) { -+ debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret); -+ goto out; -+ } -+ -+ /* Enable pwm2 to control regulator vdd-log */ -+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); -+ if (ret) { -+ debug("%s PWM2 pinctrl init fail!\n", __func__); -+ goto out; -+ } -+ -+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM3); -+ if (ret) { -+ debug("%s PWM3 pinctrl init fail!\n", __func__); -+ goto out; -+ } -+ -+ ret = regulators_enable_boot_on(false); -+ if (ret) -+ debug("%s: Cannot enable boot on regulator\n", __func__); -+ -+ ret = regulator_get_by_platname("vcc5v0_host", ®ulator); -+ if (ret) { -+ debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); -+ goto out; -+ } -+ -+ ret = regulator_set_enable(regulator, true); -+ if (ret) { -+ debug("%s vcc5v0-host-en set fail!\n", __func__); -+ goto out; -+ } -+ -+ /* Enable regulator vdd_log to supply LOGIC_VDD on ODROID-N1 HW */ -+ ret = regulator_get_by_platname("vdd_log", ®ulator); -+ if (ret) { -+ printf("%s vdd_log init fail! ret %d\n", __func__, ret); -+ goto out; -+ } -+ -+ ret = regulator_set_enable(regulator, true); -+ if (ret) { -+ printf("%s vdd_log set fail!\n", __func__); -+ goto out; -+ } -+ -+out: -+ return 0; -+} -+ -+static void setup_macaddr(void) -+{ -+#if CONFIG_IS_ENABLED(CMD_NET) -+ int ret; -+ const char *cpuid = env_get("cpuid#"); -+ u8 hash[SHA256_SUM_LEN]; -+ int size = sizeof(hash); -+ u8 mac_addr[6]; -+ -+ /* Only generate a MAC address, if none is set in the environment */ -+ if (env_get("ethaddr")) -+ return; -+ -+ if (!cpuid) { -+ debug("%s: could not retrieve 'cpuid#'\n", __func__); -+ return; -+ } -+ -+ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); -+ if (ret) { -+ debug("%s: failed to calculate SHA256\n", __func__); -+ return; -+ } -+ -+ /* Copy 6 bytes of the hash to base the MAC address on */ -+ memcpy(mac_addr, hash, 6); -+ -+ /* Make this a valid MAC address and set it */ -+ mac_addr[0] &= 0xfe; /* clear multicast bit */ -+ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ -+ eth_env_set_enetaddr("ethaddr", mac_addr); -+#endif -+ -+ return; -+} -+ -+static void setup_serial(void) -+{ -+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) -+ struct udevice *dev; -+ int ret, i; -+ u8 cpuid[RK3399_CPUID_LEN]; -+ u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2]; -+ char cpuid_str[RK3399_CPUID_LEN * 2 + 1]; -+ u64 serialno; -+ char serialno_str[16]; -+ -+ /* retrieve the device */ -+ ret = uclass_get_device_by_driver(UCLASS_MISC, -+ DM_GET_DRIVER(rockchip_efuse), &dev); -+ if (ret) { -+ debug("%s: could not find efuse device\n", __func__); -+ return; -+ } -+ -+ /* read the cpu_id range from the efuses */ -+ ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid)); -+ if (ret) { -+ debug("%s: reading cpuid from the efuses failed\n", -+ __func__); -+ return; -+ } -+ -+ memset(cpuid_str, 0, sizeof(cpuid_str)); -+ for (i = 0; i < 16; i++) -+ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); -+ -+ debug("cpuid: %s\n", cpuid_str); -+ -+ /* -+ * Mix the cpuid bytes using the same rules as in -+ * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c -+ */ -+ for (i = 0; i < 8; i++) { -+ low[i] = cpuid[1 + (i << 1)]; -+ high[i] = cpuid[i << 1]; -+ } -+ -+ serialno = crc32_no_comp(0, low, 8); -+ serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; -+ snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); -+ -+ env_set("cpuid#", cpuid_str); -+ env_set("serial#", serialno_str); -+#endif -+ -+ return; -+} -+ -+int misc_init_r(void) -+{ -+ setup_serial(); -+ setup_macaddr(); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_SERIAL_TAG -+void get_board_serial(struct tag_serialnr *serialnr) -+{ -+ char *serial_string; -+ u64 serial = 0; -+ -+ serial_string = env_get("serial#"); -+ -+ if (serial_string) -+ serial = simple_strtoull(serial_string, NULL, 16); -+ -+ serialnr->high = (u32)(serial >> 32); -+ serialnr->low = (u32)(serial & 0xffffffff); -+} -+#endif -+ -+#ifdef CONFIG_USB_DWC3 -+static struct dwc3_device dwc3_device_data = { -+ .maximum_speed = USB_SPEED_HIGH, -+ .base = 0xfe800000, -+ .dr_mode = USB_DR_MODE_HOST, -+ .index = 0, -+ .dis_u2_susphy_quirk = 1, -+}; -+ -+int usb_gadget_handle_interrupts(void) -+{ -+ dwc3_uboot_handle_interrupt(0); -+ return 0; -+} -+ -+int board_usb_init(int index, enum usb_init_type init) -+{ -+ return dwc3_uboot_init(&dwc3_device_data); -+} -+#endif -diff --git a/configs/odroidn1_defconfig b/configs/odroidn1_defconfig -new file mode 100644 -index 0000000000..ee3a345181 ---- /dev/null -+++ b/configs/odroidn1_defconfig -@@ -0,0 +1,97 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_SYS_MALLOC_F_LEN=0x4000 -+CONFIG_ROCKCHIP_RK3399=y -+CONFIG_TARGET_ODROIDN1=y -+CONFIG_SPL_STACK_R_ADDR=0x80000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3399-odroidn1" -+CONFIG_DEBUG_UART=y -+CONFIG_FIT=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_ANDROID_BOOTLOADER=y -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -+CONFIG_SPL_ATF_SUPPORT=y -+CONFIG_FASTBOOT_BUF_ADDR=0x00800800 -+CONFIG_FASTBOOT_BUF_SIZE=0x08000000 -+CONFIG_FASTBOOT_FLASH=y -+CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -+CONFIG_CMD_BOOTZ=y -+# CONFIG_CMD_IMLS is not set -+CONFIG_CMD_GPT=y -+CONFIG_CMD_LOAD_ANDROID=y -+CONFIG_CMD_BOOT_ANDROID=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_SF=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MISC=y -+CONFIG_ROCKCHIP_EFUSE=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_DM_ETH=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_PINCTRL_ROCKCHIP_RK3399=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_BASE=0xFF1A0000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GADGET=y -+CONFIG_USB_STORAGE=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_G_DNL_MANUFACTURER="Rockchip" -+CONFIG_G_DNL_VENDOR_NUM=0x2207 -+CONFIG_G_DNL_PRODUCT_NUM=0x330a -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_ASIX=y -+CONFIG_USB_ETHER_ASIX88179=y -+CONFIG_USB_ETHER_MCS7830=y -+CONFIG_USB_ETHER_RTL8152=y -+CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_DM_VIDEO=y -+CONFIG_DISPLAY=y -+CONFIG_VIDEO_ROCKCHIP=y -+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200 -+CONFIG_DISPLAY_ROCKCHIP_HDMI=y -+CONFIG_USE_TINY_PRINTF=y -+CONFIG_ERRNO_STR=y -diff --git a/include/configs/odroidn1.h b/include/configs/odroidn1.h -new file mode 100644 -index 0000000000..d45b673349 ---- /dev/null -+++ b/include/configs/odroidn1.h -@@ -0,0 +1,28 @@ -+/* -+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __ODROIDN1_H -+#define __ODROIDN1_H -+ -+#include -+ -+#define CONFIG_MMC_SDHCI_SDMA -+#define CONFIG_SYS_MMC_ENV_DEV 0 -+ -+#define SDRAM_BANK_SIZE (2UL << 30) -+#define CONFIG_MISC_INIT_R -+#define CONFIG_SERIAL_TAG -+#define CONFIG_ENV_OVERWRITE -+ -+#define CONFIG_BMP_16BPP -+#define CONFIG_BMP_24BPP -+#define CONFIG_BMP_32BPP -+ -+#define ROCKCHIP_DEVICE_SETTINGS \ -+ "stdout=serial,vidconsole\0" \ -+ "stderr=serial,vidconsole\0" -+ -+#endif diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0007-rk3288-miqi-get-ethaddr-from-efuse.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0007-rk3288-miqi-get-ethaddr-from-efuse.patch new file mode 100644 index 0000000000..6710a3c7f4 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0007-rk3288-miqi-get-ethaddr-from-efuse.patch @@ -0,0 +1,73 @@ +From 99854fa357a70ce160f7db78c383642c119cbad7 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sun, 5 Aug 2018 20:58:54 +0200 +Subject: [PATCH] rk3288-miqi: get ethaddr from efuse + +--- + board/mqmaker/miqi_rk3288/miqi-rk3288.c | 43 +++++++++++++++++++++++++ + configs/miqi-rk3288_defconfig | 1 - + 2 files changed, 43 insertions(+), 1 deletion(-) + +diff --git a/board/mqmaker/miqi_rk3288/miqi-rk3288.c b/board/mqmaker/miqi_rk3288/miqi-rk3288.c +index 846deddb80..f719218eb6 100644 +--- a/board/mqmaker/miqi_rk3288/miqi-rk3288.c ++++ b/board/mqmaker/miqi_rk3288/miqi-rk3288.c +@@ -6,3 +6,46 @@ + + #include + #include ++#include ++#include ++ ++static void setup_macaddr(void) ++{ ++#if CONFIG_IS_ENABLED(CMD_NET) ++ int ret; ++ const char *cpuid = env_get("cpuid#"); ++ u8 hash[SHA256_SUM_LEN]; ++ int size = sizeof(hash); ++ u8 mac_addr[6]; ++ ++ /* Only generate a MAC address, if none is set in the environment */ ++ if (env_get("ethaddr")) ++ return; ++ ++ if (!cpuid) { ++ debug("%s: could not retrieve 'cpuid#'\n", __func__); ++ return; ++ } ++ ++ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); ++ if (ret) { ++ debug("%s: failed to calculate SHA256\n", __func__); ++ return; ++ } ++ ++ /* Copy 6 bytes of the hash to base the MAC address on */ ++ memcpy(mac_addr, hash, 6); ++ ++ /* Make this a valid MAC address and set it */ ++ mac_addr[0] &= 0xfe; /* clear multicast bit */ ++ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++#endif ++} ++ ++int rk3288_board_late_init(void) ++{ ++ setup_macaddr(); ++ ++ return 0; ++} +diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig +index ffbe701cfd..746d8035ee 100644 +--- a/configs/miqi-rk3288_defconfig ++++ b/configs/miqi-rk3288_defconfig +@@ -36,7 +36,6 @@ CONFIG_SPL_PARTITION_UUIDS=y + CONFIG_SPL_OF_CONTROL=y + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" + CONFIG_ENV_IS_IN_MMC=y +-CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_REGMAP=y + CONFIG_SPL_REGMAP=y + CONFIG_SYSCON=y diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0008-rk3399-evb-fixup-get-serial-and-ethaddr-from-efuse.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0008-rk3399-evb-fixup-get-serial-and-ethaddr-from-efuse.patch new file mode 100644 index 0000000000..575fe1fb3a --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0008-rk3399-evb-fixup-get-serial-and-ethaddr-from-efuse.patch @@ -0,0 +1,142 @@ +From ea235722e95630c3d5da5403e660a8bc20e2b8d0 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Mon, 20 Aug 2018 23:01:10 +0200 +Subject: [PATCH] rk3399-evb: fixup get serial and ethaddr from efuse + +--- + board/rockchip/evb_rk3399/evb-rk3399.c | 80 +------------------------- + include/configs/evb_rk3399.h | 3 - + 2 files changed, 2 insertions(+), 81 deletions(-) + +diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c +index b6f730852a..c0a38d5143 100644 +--- a/board/rockchip/evb_rk3399/evb-rk3399.c ++++ b/board/rockchip/evb_rk3399/evb-rk3399.c +@@ -6,13 +6,12 @@ + + #include + #include +-#include + #include + #include + #include +-#include + #include + #include ++#include + #include + #include + #include +@@ -20,9 +19,6 @@ + + DECLARE_GLOBAL_DATA_PTR; + +-#define RK3399_CPUID_OFF 0x7 +-#define RK3399_CPUID_LEN 0x10 +- + int rk_board_init(void) + { + struct udevice *pinctrl, *regulator; +@@ -106,87 +102,15 @@ static void setup_macaddr(void) + mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ + eth_env_set_enetaddr("ethaddr", mac_addr); + #endif +- +- return; + } + +-static void setup_serial(void) ++int rk_board_late_init(void) + { +-#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) +- struct udevice *dev; +- int ret, i; +- u8 cpuid[RK3399_CPUID_LEN]; +- u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2]; +- char cpuid_str[RK3399_CPUID_LEN * 2 + 1]; +- u64 serialno; +- char serialno_str[16]; +- +- /* retrieve the device */ +- ret = uclass_get_device_by_driver(UCLASS_MISC, +- DM_GET_DRIVER(rockchip_efuse), &dev); +- if (ret) { +- debug("%s: could not find efuse device\n", __func__); +- return; +- } +- +- /* read the cpu_id range from the efuses */ +- ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid)); +- if (ret) { +- debug("%s: reading cpuid from the efuses failed\n", +- __func__); +- return; +- } +- +- memset(cpuid_str, 0, sizeof(cpuid_str)); +- for (i = 0; i < 16; i++) +- sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); +- +- debug("cpuid: %s\n", cpuid_str); +- +- /* +- * Mix the cpuid bytes using the same rules as in +- * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c +- */ +- for (i = 0; i < 8; i++) { +- low[i] = cpuid[1 + (i << 1)]; +- high[i] = cpuid[i << 1]; +- } +- +- serialno = crc32_no_comp(0, low, 8); +- serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; +- snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); +- +- env_set("cpuid#", cpuid_str); +- env_set("serial#", serialno_str); +-#endif +- +- return; +-} +- +-int misc_init_r(void) +-{ +- setup_serial(); + setup_macaddr(); + + return 0; + } + +-#ifdef CONFIG_SERIAL_TAG +-void get_board_serial(struct tag_serialnr *serialnr) +-{ +- char *serial_string; +- u64 serial = 0; +- +- serial_string = env_get("serial#"); +- +- if (serial_string) +- serial = simple_strtoull(serial_string, NULL, 16); +- +- serialnr->high = (u32)(serial >> 32); +- serialnr->low = (u32)(serial & 0xffffffff); +-} +-#endif +- + #ifdef CONFIG_USB_DWC3 + static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, +diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h +index 5565c7ce53..840d63ff6d 100644 +--- a/include/configs/evb_rk3399.h ++++ b/include/configs/evb_rk3399.h +@@ -18,9 +18,6 @@ + #define CONFIG_SYS_MMC_ENV_DEV 0 + + #define SDRAM_BANK_SIZE (2UL << 30) +-#define CONFIG_MISC_INIT_R +-#define CONFIG_SERIAL_TAG +-#define CONFIG_ENV_OVERWRITE + + #define CONFIG_BMP_16BPP + #define CONFIG_BMP_24BPP diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0009-include-update-log2-header-from-the-Linux-kernel.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0009-include-update-log2-header-from-the-Linux-kernel.patch new file mode 100644 index 0000000000..89b448657c --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0009-include-update-log2-header-from-the-Linux-kernel.patch @@ -0,0 +1,175 @@ +From 37a07ad0222bb19c7fdc03d7679bae47d9875eed Mon Sep 17 00:00:00 2001 +From: Heinrich Schuchardt +Date: Mon, 7 May 2018 22:18:27 +0200 +Subject: [PATCH] include: update log2 header from the Linux kernel +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Without the patch gcc 8 produces: +warning: ignoring attribute ‘noreturn’ because it conflicts with +attribute ‘const’ [-Wattributes] + int ____ilog2_NaN(void); + +So let's update the include from Linux kernel v4.16. + +This removes static checks of ilog2() arguments. + +Signed-off-by: Heinrich Schuchardt +(cherry picked from commit 4a8e72954e11f2c2c37ee138b88a1d9362dba4da) +--- + include/linux/log2.h | 63 ++++++++++++++++++++++++++------------------ + 1 file changed, 37 insertions(+), 26 deletions(-) + +diff --git a/include/linux/log2.h b/include/linux/log2.h +index aa1de63090..b62c07b29f 100644 +--- a/include/linux/log2.h ++++ b/include/linux/log2.h +@@ -4,6 +4,11 @@ + * Written by David Howells (dhowells@redhat.com) + * + * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. + */ + + #ifndef _LINUX_LOG2_H +@@ -12,12 +17,6 @@ + #include + #include + +-/* +- * deal with unrepresentable constant logarithms +- */ +-extern __attribute__((const, noreturn)) +-int ____ilog2_NaN(void); +- + /* + * non-constant log of base 2 calculators + * - the arch may override these in asm/bitops.h if they can be implemented +@@ -40,19 +39,23 @@ int __ilog2_u64(u64 n) + } + #endif + +-/* +- * Determine whether some value is a power of two, where zero is ++/** ++ * is_power_of_2() - check if a value is a power of two ++ * @n: the value to check ++ * ++ * Determine whether some value is a power of two, where zero is + * *not* considered a power of two. ++ * Return: true if @n is a power of 2, otherwise false. + */ +- + static inline __attribute__((const)) + bool is_power_of_2(unsigned long n) + { + return (n != 0 && ((n & (n - 1)) == 0)); + } + +-/* +- * round up to nearest power of two ++/** ++ * __roundup_pow_of_two() - round up to nearest power of two ++ * @n: value to round up + */ + static inline __attribute__((const)) + unsigned long __roundup_pow_of_two(unsigned long n) +@@ -60,8 +63,9 @@ unsigned long __roundup_pow_of_two(unsigned long n) + return 1UL << fls_long(n - 1); + } + +-/* +- * round down to nearest power of two ++/** ++ * __rounddown_pow_of_two() - round down to nearest power of two ++ * @n: value to round down + */ + static inline __attribute__((const)) + unsigned long __rounddown_pow_of_two(unsigned long n) +@@ -70,19 +74,19 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + } + + /** +- * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value +- * @n - parameter ++ * ilog2 - log base 2 of 32-bit or a 64-bit unsigned value ++ * @n: parameter + * + * constant-capable log of base 2 calculation + * - this can be used to initialise global variables from constant data, hence +- * the massive ternary operator construction ++ * the massive ternary operator construction + * + * selects the appropriately-sized optimised version depending on sizeof(n) + */ + #define ilog2(n) \ + ( \ + __builtin_constant_p(n) ? ( \ +- (n) < 1 ? ____ilog2_NaN() : \ ++ (n) < 2 ? 0 : \ + (n) & (1ULL << 63) ? 63 : \ + (n) & (1ULL << 62) ? 62 : \ + (n) & (1ULL << 61) ? 61 : \ +@@ -145,10 +149,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + (n) & (1ULL << 4) ? 4 : \ + (n) & (1ULL << 3) ? 3 : \ + (n) & (1ULL << 2) ? 2 : \ +- (n) & (1ULL << 1) ? 1 : \ +- (n) & (1ULL << 0) ? 0 : \ +- ____ilog2_NaN() \ +- ) : \ ++ 1) : \ + (sizeof(n) <= 4) ? \ + __ilog2_u32(n) : \ + __ilog2_u64(n) \ +@@ -156,7 +157,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + + /** + * roundup_pow_of_two - round the given value up to nearest power of two +- * @n - parameter ++ * @n: parameter + * + * round the given value up to the nearest power of two + * - the result is undefined when n == 0 +@@ -173,7 +174,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + + /** + * rounddown_pow_of_two - round the given value down to nearest power of two +- * @n - parameter ++ * @n: parameter + * + * round the given value down to the nearest power of two + * - the result is undefined when n == 0 +@@ -186,6 +187,12 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + __rounddown_pow_of_two(n) \ + ) + ++static inline __attribute_const__ ++int __order_base_2(unsigned long n) ++{ ++ return n > 1 ? ilog2(n - 1) + 1 : 0; ++} ++ + /** + * order_base_2 - calculate the (rounded up) base 2 order of the argument + * @n: parameter +@@ -199,7 +206,11 @@ unsigned long __rounddown_pow_of_two(unsigned long n) + * ob2(5) = 3 + * ... and so on. + */ +- +-#define order_base_2(n) ilog2(roundup_pow_of_two(n)) +- ++#define order_base_2(n) \ ++( \ ++ __builtin_constant_p(n) ? ( \ ++ ((n) == 0 || (n) == 1) ? 0 : \ ++ ilog2((n) - 1) + 1) : \ ++ __order_base_2(n) \ ++) + #endif /* _LINUX_LOG2_H */ diff --git a/packages/tools/u-boot/patches/rockchip/u-boot-0010-rockchip-disable-android-boot-and-config.patch b/packages/tools/u-boot/patches/rockchip/u-boot-0010-rockchip-disable-android-boot-and-config.patch new file mode 100644 index 0000000000..711cf90459 --- /dev/null +++ b/packages/tools/u-boot/patches/rockchip/u-boot-0010-rockchip-disable-android-boot-and-config.patch @@ -0,0 +1,182 @@ +From 1ba76e3eb47e865d84e42a6b5484516ef4457bf7 Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Sat, 18 Aug 2018 17:27:32 +0200 +Subject: [PATCH] rockchip: disable android boot and config + +--- + arch/arm/mach-rockchip/boot_mode.c | 2 +- + configs/evb-rk3328_defconfig | 5 ++--- + configs/evb-rk3399_defconfig | 14 -------------- + configs/miqi-rk3288_defconfig | 12 +----------- + configs/tinker-rk3288_defconfig | 3 --- + include/configs/rockchip-common.h | 2 -- + 6 files changed, 4 insertions(+), 34 deletions(-) + +diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c +index 8a20a3a31e..9441c49477 100644 +--- a/arch/arm/mach-rockchip/boot_mode.c ++++ b/arch/arm/mach-rockchip/boot_mode.c +@@ -123,9 +123,9 @@ int setup_boot_mode(void) + int boot_mode = BOOT_MODE_NORMAL; + char env_preboot[256] = {0}; + ++#ifdef CONFIG_RKIMG_BOOTLOADER + devtype_num_envset(); + rockchip_dnl_mode_check(); +-#ifdef CONFIG_RKIMG_BOOTLOADER + boot_mode = rockchip_get_boot_mode(); + #endif + switch (boot_mode) { +diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig +index 0897a28e1d..85ee85741e 100644 +--- a/configs/evb-rk3328_defconfig ++++ b/configs/evb-rk3328_defconfig +@@ -39,8 +39,8 @@ CONFIG_TPL_OF_CONTROL=y + CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" + CONFIG_TPL_OF_PLATDATA=y + CONFIG_ENV_IS_IN_MMC=y +-CONFIG_TPL_DM=y + CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_TPL_DM=y + CONFIG_REGMAP=y + CONFIG_SPL_REGMAP=y + CONFIG_TPL_REGMAP=y +@@ -56,12 +56,11 @@ CONFIG_MISC=y + CONFIG_ROCKCHIP_EFUSE=y + CONFIG_MMC_DW=y + CONFIG_MMC_DW_ROCKCHIP=y +-CONFIG_PHY=y +-CONFIG_PHY_ROCKCHIP_INNO_USB2=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y + CONFIG_GMAC_ROCKCHIP=y + CONFIG_PHY=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y + CONFIG_PINCTRL=y + CONFIG_DM_PMIC=y + CONFIG_PMIC_RK8XX=y +diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig +index 305f0a405d..bd86db31af 100644 +--- a/configs/evb-rk3399_defconfig ++++ b/configs/evb-rk3399_defconfig +@@ -5,8 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y + CONFIG_SYS_MALLOC_F_LEN=0x4000 + CONFIG_ROCKCHIP_RK3399=y + CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +-CONFIG_RKIMG_BOOTLOADER=y +-# CONFIG_USING_KERNEL_DTB is not set + CONFIG_SPL_STACK_R_ADDR=0x80000 + CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" + CONFIG_DEBUG_UART=y +@@ -14,7 +12,6 @@ CONFIG_FIT=y + CONFIG_SPL_LOAD_FIT=y + CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" + # CONFIG_DISPLAY_CPUINFO is not set +-CONFIG_ANDROID_BOOTLOADER=y + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 + CONFIG_SPL_ATF=y +@@ -26,9 +23,6 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 + CONFIG_CMD_BOOTZ=y + # CONFIG_CMD_IMLS is not set + CONFIG_CMD_GPT=y +-CONFIG_CMD_LOAD_ANDROID=y +-CONFIG_CMD_BOOT_ANDROID=y +-CONFIG_CMD_BOOT_ROCKCHIP=y + CONFIG_CMD_MMC=y + CONFIG_CMD_SF=y + CONFIG_CMD_USB=y +@@ -94,13 +88,5 @@ CONFIG_USB_ETHER_ASIX88179=y + CONFIG_USB_ETHER_MCS7830=y + CONFIG_USB_ETHER_RTL8152=y + CONFIG_USB_ETHER_SMSC95XX=y +-CONFIG_DM_VIDEO=y +-CONFIG_DISPLAY=y +-CONFIG_DRM_ROCKCHIP=y +-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y +-CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y +-CONFIG_DRM_ROCKCHIP_LVDS=y +-CONFIG_DRM_ROCKCHIP_RGB=y +-CONFIG_LCD=y + CONFIG_USE_TINY_PRINTF=y + CONFIG_ERRNO_STR=y +diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig +index 746d8035ee..4826581bf7 100644 +--- a/configs/miqi-rk3288_defconfig ++++ b/configs/miqi-rk3288_defconfig +@@ -3,12 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ROCKCHIP_RK3288=y + CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +-CONFIG_RKIMG_BOOTLOADER=y + CONFIG_TARGET_MIQI_RK3288=y + CONFIG_SPL_STACK_R_ADDR=0x80000 + CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" + CONFIG_DEBUG_UART=y +-# CONFIG_SILENT_CONSOLE is not set ++# CONFIG_ANDROID_BOOT_IMAGE is not set + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_SPL_STACK_R=y + CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +@@ -16,10 +15,6 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 + CONFIG_CMD_GPIO=y + CONFIG_CMD_GPT=y + CONFIG_CMD_I2C=y +-CONFIG_ANDROID_BOOT_IMAGE=y +-CONFIG_ANDROID_BOOTLOADER=y +-CONFIG_CMD_BOOT_ANDROID=y +-CONFIG_CMD_BOOT_ROCKCHIP=y + CONFIG_CMD_MMC=y + CONFIG_CMD_SF=y + CONFIG_CMD_SPI=y +@@ -79,11 +74,6 @@ CONFIG_G_DNL_PRODUCT_NUM=0x320a + CONFIG_USB_HOST_ETHER=y + CONFIG_USB_ETHER_ASIX=y + CONFIG_USB_ETHER_SMSC95XX=y +-CONFIG_DM_VIDEO=y +-CONFIG_DISPLAY=y +-CONFIG_VIDEO_ROCKCHIP=y +-CONFIG_DISPLAY_ROCKCHIP_HDMI=y +-CONFIG_CONSOLE_SCROLL_LINES=10 + CONFIG_USE_TINY_PRINTF=y + CONFIG_CMD_DHRYSTONE=y + CONFIG_ERRNO_STR=y +diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig +index 0afc0a35e1..a6f8c0cb51 100644 +--- a/configs/tinker-rk3288_defconfig ++++ b/configs/tinker-rk3288_defconfig +@@ -3,13 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y + CONFIG_SYS_MALLOC_F_LEN=0x2000 + CONFIG_ROCKCHIP_RK3288=y + CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y +-CONFIG_RKIMG_BOOTLOADER=y + CONFIG_TARGET_TINKER_RK3288=y + CONFIG_SPL_STACK_R_ADDR=0x80000 + CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" + CONFIG_DEBUG_UART=y + # CONFIG_ANDROID_BOOT_IMAGE is not set +-# CONFIG_SILENT_CONSOLE is not set + CONFIG_CONSOLE_MUX=y + # CONFIG_DISPLAY_CPUINFO is not set + CONFIG_SPL_STACK_R=y +@@ -19,7 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y + CONFIG_CMD_GPIO=y + CONFIG_CMD_GPT=y + CONFIG_CMD_I2C=y +-CONFIG_CMD_BOOT_ROCKCHIP=y + CONFIG_CMD_MMC=y + CONFIG_CMD_SF=y + CONFIG_CMD_SPI=y +diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h +index 38ff08a57f..1e8f6c344e 100644 +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -99,8 +99,6 @@ + "fi; \0" + + #define RKIMG_BOOTCOMMAND \ +- "boot_android ${devtype} ${devnum};" \ +- "bootrkp;" \ + "run distro_bootcmd;" + + #endif