diff --git a/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch b/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch deleted file mode 100644 index a15ea04d88..0000000000 --- a/projects/Allwinner/devices/H3/patches/linux/18-h3-increase-mali-frequency.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 553421da73a5762107818f6e91771b54d80ff88e Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 4 Apr 2020 11:31:29 +0200 -Subject: [PATCH 3/3] ARM: dts: sun8i-h3: increase mali frequency - -Signed-off-by: Jernej Skrabec ---- - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index e83aa6866e7e..808769cb6665 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -207,7 +207,7 @@ mali: gpu@1c40000 { - resets = <&ccu RST_BUS_GPU>; - - assigned-clocks = <&ccu CLK_GPU>; -- assigned-clock-rates = <384000000>; -+ assigned-clock-rates = <576000000>; - }; - - ths: thermal-sensor@1c25000 { --- -2.26.0 - diff --git a/projects/Allwinner/linux/linux.aarch64.conf b/projects/Allwinner/linux/linux.aarch64.conf index 7b452b22f5..ebf0a9b901 100644 --- a/projects/Allwinner/linux/linux.aarch64.conf +++ b/projects/Allwinner/linux/linux.aarch64.conf @@ -1,16 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.7.0 Kernel Configuration -# - -# -# Compiler: aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025 +# Linux/arm64 5.8.0 Kernel Configuration # +CONFIG_CC_VERSION_TEXT="aarch64-none-linux-gnu-gcc.real (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=90201 CONFIG_LD_VERSION=233010000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -25,12 +23,14 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set CONFIG_AUDIT=y @@ -109,6 +109,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU_GENERIC=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y @@ -137,7 +138,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -330,12 +330,12 @@ CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_1024718=y CONFIG_ARM64_ERRATUM_1418040=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_VHE=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT_NVHE=y CONFIG_ARM64_ERRATUM_1319367=y +CONFIG_ARM64_ERRATUM_1530923=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y CONFIG_CAVIUM_ERRATUM_22375=y @@ -344,14 +344,13 @@ CONFIG_CAVIUM_ERRATUM_23154=y CONFIG_CAVIUM_ERRATUM_27456=y CONFIG_CAVIUM_ERRATUM_30115=y CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y CONFIG_QCOM_FALKOR_ERRATUM_1009=y CONFIG_QCOM_QDF2400_ERRATUM_0065=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y -CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y # end of ARM errata workarounds via the alternatives framework CONFIG_ARM64_4K_PAGES=y @@ -447,6 +446,8 @@ CONFIG_ARM64_AMU_EXTN=y # # ARMv8.5 architectural features # +CONFIG_ARM64_BTI=y +CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y CONFIG_ARCH_RANDOM=y # end of ARMv8.5 architectural features @@ -454,6 +455,7 @@ CONFIG_ARCH_RANDOM=y CONFIG_ARM64_SVE=y CONFIG_ARM64_MODULE_PLTS=y # CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y @@ -476,6 +478,7 @@ CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -544,7 +547,6 @@ CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y CONFIG_ARM_SCPI_CPUFREQ=y -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # end of CPU Power Management @@ -555,11 +557,12 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_PSCI_CHECKER is not set # CONFIG_GOOGLE_FIRMWARE is not set CONFIG_EFI_EARLYCON=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -615,7 +618,6 @@ CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -663,6 +665,7 @@ CONFIG_HAVE_ARCH_COMPILER_H=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set +CONFIG_ARCH_HAS_RELR=y # # GCOV-based kernel profiling @@ -705,6 +708,7 @@ CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -744,6 +748,9 @@ CONFIG_FREEZER=y # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_HAVE_ELF_PROT=y +CONFIG_ARCH_USE_GNU_PROPERTY=y CONFIG_ELFCORE=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_SCRIPT=y @@ -762,7 +769,6 @@ CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_FAST_GUP=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y @@ -823,6 +829,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=y # CONFIG_NET_KEY is not set # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y @@ -1135,6 +1142,7 @@ CONFIG_MRP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m @@ -1215,6 +1223,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1247,8 +1256,10 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HS is not set CONFIG_BT_LE=y CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set # # Bluetooth device drivers @@ -1535,7 +1546,6 @@ CONFIG_BLK_DEV_NBD=m # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y -CONFIG_VEXPRESS_SYSCFG=y # CONFIG_XILINX_SDFEC is not set # CONFIG_PVPANIC is not set # CONFIG_C2PORT is not set @@ -1677,6 +1687,7 @@ CONFIG_DM_PERSISTENT_DATA=m CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_CACHE is not set # CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set # CONFIG_DM_MIRROR is not set @@ -1806,7 +1817,6 @@ CONFIG_DWMAC_SUN8I=m CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_RHINE is not set # CONFIG_VIA_VELOCITY is not set CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set @@ -1822,6 +1832,7 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=y # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_GPIO is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1845,6 +1856,7 @@ CONFIG_AC200_PHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1994,6 +2006,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -2135,6 +2149,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set @@ -2194,9 +2209,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -2216,6 +2229,7 @@ CONFIG_INPUT_UINPUT=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2238,7 +2252,7 @@ CONFIG_RMI4_F30=y # Hardware I/O ports # CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_SERPORT=m CONFIG_SERIO_AMBAKMI=y CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set @@ -2331,6 +2345,7 @@ CONFIG_SERIAL_DEV_CTRL_TTYPORT=y # CONFIG_IPMB_DEVICE_INTERFACE is not set CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_CCTRNG is not set CONFIG_DEVMEM=y # CONFIG_RAW_DRIVER is not set CONFIG_TCG_TPM=y @@ -2385,8 +2400,8 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_CADENCE is not set # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_SLAVE is not set +CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set CONFIG_I2C_MV64XXX=y @@ -2446,6 +2461,7 @@ CONFIG_SPI_ROCKCHIP=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2495,7 +2511,6 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_SINGLE=y # CONFIG_PINCTRL_SX150X is not set @@ -2523,7 +2538,6 @@ CONFIG_PINCTRL_SUN50I_A64_R=y CONFIG_PINCTRL_SUN50I_H5=y CONFIG_PINCTRL_SUN50I_H6=y CONFIG_PINCTRL_SUN50I_H6_R=y -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y @@ -2590,6 +2604,7 @@ CONFIG_GPIO_MAX77620=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set CONFIG_POWER_AVS=y @@ -2614,6 +2629,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2644,6 +2660,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2806,7 +2823,6 @@ CONFIG_CPU_FREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y # CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_SUN8I_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y @@ -2835,6 +2851,7 @@ CONFIG_ARM_SP805_WATCHDOG=y CONFIG_SUNXI_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2874,8 +2891,10 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set CONFIG_MFD_HI6421_PMIC=y # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2894,6 +2913,7 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2985,6 +3005,7 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -3011,9 +3032,6 @@ CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_TPS6524X is not set CONFIG_REGULATOR_VCTRL=m # CONFIG_REGULATOR_VEXPRESS is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y -CONFIG_CEC_PIN=y CONFIG_RC_CORE=y CONFIG_RC_MAP=y CONFIG_LIRC=y @@ -3050,26 +3068,41 @@ CONFIG_IR_SUNXI=y # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set CONFIG_RC_XBOX_DVD=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_CEC_PIN=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_CEC_PIN_ERROR_INJ is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_GPIO is not set +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y # CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_CEC_PIN_ERROR_INJ is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +# CONFIG_MEDIA_TEST_SUPPORT is not set +# end of Media device types + CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=y CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m @@ -3077,18 +3110,38 @@ CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_DVB_CORE=y +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # + +# +# Drivers filtered as selected at 'Filter media drivers' +# +CONFIG_TTPCI_EEPROM=m CONFIG_MEDIA_USB_SUPPORT=y # @@ -3191,25 +3244,6 @@ CONFIG_VIDEO_EM28XX_V4L2=m CONFIG_VIDEO_EM28XX_ALSA=m CONFIG_VIDEO_EM28XX_DVB=m CONFIG_VIDEO_EM28XX_RC=m - -# -# USB HDMI CEC adapters -# -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# CONFIG_V4L_TEST_DRIVERS is not set -CONFIG_DVB_PLATFORM_DRIVERS=y -CONFIG_CEC_PLATFORM_DRIVERS=y -# CONFIG_CEC_GPIO is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_TEA575X=m CONFIG_RADIO_SI470X=m @@ -3230,12 +3264,6 @@ CONFIG_RADIO_TEA5764=m CONFIG_RADIO_SAA7706H=m CONFIG_RADIO_TEF6862=m CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -# end of Texas Instruments WL128x FM driver (ST based) - CONFIG_MEDIA_COMMON_OPTIONS=y # @@ -3252,35 +3280,39 @@ CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_SUN8I_DEINTERLACE=m +CONFIG_VIDEO_SUN8I_ROTATE=m +CONFIG_DVB_PLATFORM_DRIVERS=y # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# MMC/SDIO DVB adapters # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +# CONFIG_SMS_SDIO_DRV is not set +# end of Media drivers + CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y + +# +# Media ancillary drivers +# CONFIG_MEDIA_ATTACH=y + +# +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' +# CONFIG_VIDEO_IR_I2C=y # -# I2C drivers hidden by 'Autoselect ancillary drivers' -# - -# -# Audio decoders, processors and mixers +# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_CS53L32A=m CONFIG_VIDEO_UDA1342=m CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_SONY_BTF_MPX=m - -# -# RDS decoders -# - -# -# Video decoders -# CONFIG_VIDEO_SAA711X=m CONFIG_VIDEO_TVP5150=m CONFIG_VIDEO_TW2804=m @@ -3292,43 +3324,80 @@ CONFIG_VIDEO_TW9906=m # CONFIG_VIDEO_CX25840=m -# -# Video encoders -# - # # Camera sensor devices # +# CONFIG_VIDEO_HI556 is not set +# CONFIG_VIDEO_IMX214 is not set +# CONFIG_VIDEO_IMX219 is not set +# CONFIG_VIDEO_IMX258 is not set +# CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX290 is not set +# CONFIG_VIDEO_IMX319 is not set +# CONFIG_VIDEO_IMX355 is not set CONFIG_VIDEO_OV2640=m +# CONFIG_VIDEO_OV2659 is not set +# CONFIG_VIDEO_OV2680 is not set +# CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set +# CONFIG_VIDEO_OV5640 is not set +# CONFIG_VIDEO_OV5645 is not set +# CONFIG_VIDEO_OV5647 is not set +# CONFIG_VIDEO_OV6650 is not set +# CONFIG_VIDEO_OV5670 is not set +# CONFIG_VIDEO_OV5675 is not set +# CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV7251 is not set +# CONFIG_VIDEO_OV772X is not set CONFIG_VIDEO_OV7640=m +# CONFIG_VIDEO_OV7670 is not set +# CONFIG_VIDEO_OV7740 is not set +# CONFIG_VIDEO_OV8856 is not set +# CONFIG_VIDEO_OV9640 is not set +# CONFIG_VIDEO_OV9650 is not set +# CONFIG_VIDEO_OV13858 is not set +# CONFIG_VIDEO_VS6624 is not set +# CONFIG_VIDEO_MT9M001 is not set +# CONFIG_VIDEO_MT9M032 is not set +# CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9P031 is not set +# CONFIG_VIDEO_MT9T001 is not set +# CONFIG_VIDEO_MT9T112 is not set CONFIG_VIDEO_MT9V011=m +# CONFIG_VIDEO_MT9V032 is not set +# CONFIG_VIDEO_MT9V111 is not set +# CONFIG_VIDEO_SR030PC30 is not set +# CONFIG_VIDEO_NOON010PC30 is not set +# CONFIG_VIDEO_M5MOLS is not set +# CONFIG_VIDEO_RJ54N1 is not set +# CONFIG_VIDEO_S5K6AA is not set +# CONFIG_VIDEO_S5K6A3 is not set +# CONFIG_VIDEO_S5K4ECGX is not set +# CONFIG_VIDEO_S5K5BAF is not set +# CONFIG_VIDEO_SMIAPP is not set +# CONFIG_VIDEO_ET8EK8 is not set +# CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers # +# CONFIG_VIDEO_AD5820 is not set +# CONFIG_VIDEO_AK7375 is not set +# CONFIG_VIDEO_DW9714 is not set +# CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices # +# CONFIG_VIDEO_ADP1653 is not set +# CONFIG_VIDEO_LM3560 is not set +# CONFIG_VIDEO_LM3646 is not set +# end of Flash devices # -# Video improvement chips -# - -# -# Audio/Video compression chips -# - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# - -# -# SPI drivers hidden by 'Autoselect ancillary drivers' +# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -3340,7 +3409,7 @@ CONFIG_CXD2880_SPI_DRV=m CONFIG_MEDIA_TUNER=y # -# Tuner drivers hidden by 'Autoselect ancillary drivers' +# Tuner drivers auto-selected by 'Autoselect ancillary drivers' # CONFIG_MEDIA_TUNER_SIMPLE=y CONFIG_MEDIA_TUNER_TDA18250=m @@ -3376,7 +3445,7 @@ CONFIG_MEDIA_TUNER_R820T=m CONFIG_MEDIA_TUNER_QM1D1C0042=m # -# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' +# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' # # @@ -3504,10 +3573,7 @@ CONFIG_DVB_AF9033=m # Common Interface (EN50221) controller drivers # CONFIG_DVB_SP2=m - -# -# Tools to develop new frontends -# +# end of Media ancillary drivers # # Graphics support @@ -3592,9 +3658,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=y # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3880,6 +3948,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set @@ -3951,6 +4020,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -4124,6 +4194,7 @@ CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set +# CONFIG_USB_XHCI_PCI_RENESAS is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y @@ -4143,7 +4214,7 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y # # USB Device Class drivers # -# CONFIG_USB_ACM is not set +CONFIG_USB_ACM=m # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set @@ -4214,9 +4285,12 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_OF=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_IMX=y +CONFIG_USB_CHIPIDEA_GENERIC=y +CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y @@ -4377,6 +4451,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -4612,7 +4687,6 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VDPA is not set -CONFIG_VHOST_DPN=y # CONFIG_VHOST_MENU is not set # @@ -4730,15 +4804,10 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_COMMON_CLK_VERSATILE is not set -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX77686 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_RK808 is not set @@ -4766,8 +4835,6 @@ CONFIG_SUN50I_H6_R_CCU=y CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_DE2_CCU=y CONFIG_SUN8I_R_CCU=y -# end of Common Clock Framework - CONFIG_HWSPINLOCK=y # @@ -4775,7 +4842,6 @@ CONFIG_HWSPINLOCK=y # CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y -CONFIG_CLKSRC_MMIO=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y @@ -4783,7 +4849,6 @@ CONFIG_FSL_ERRATUM_A008585=y CONFIG_HISILICON_ERRATUM_161010101=y CONFIG_ARM64_ERRATUM_858921=y CONFIG_SUN50I_ERRATUM_UNKNOWN1=y -CONFIG_CLKSRC_VERSATILE=y # CONFIG_MICROCHIP_PIT64B is not set # end of Clock Source drivers @@ -4811,6 +4876,7 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y +# CONFIG_SUN50I_IOMMU is not set # CONFIG_ARM_SMMU is not set # CONFIG_ARM_SMMU_V3 is not set @@ -4825,7 +4891,7 @@ CONFIG_IOMMU_DMA=y # CONFIG_RPMSG=y # CONFIG_RPMSG_CHAR is not set -CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK=y CONFIG_RPMSG_QCOM_GLINK_RPM=y # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers @@ -4977,6 +5043,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -4991,6 +5059,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -5032,6 +5101,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -5160,6 +5230,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -5316,8 +5387,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -5383,6 +5456,7 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -5394,7 +5468,6 @@ CONFIG_PHY_QCOM_USB_HS=y # CONFIG_PHY_QCOM_USB_HSIC is not set CONFIG_PHY_SAMSUNG_USB2=y # CONFIG_PHY_TUSB1210 is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5488,6 +5561,7 @@ CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_FS_LZORLE=y # CONFIG_FS_DAX is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y @@ -5617,6 +5691,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_RAM is not set +# CONFIG_PSTORE_BLK is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5811,10 +5886,10 @@ CONFIG_CRYPTO_ECDH=m # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GCM=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set # CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=y # @@ -5822,7 +5897,7 @@ CONFIG_CRYPTO_ECHAINIV=y # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTR=y # CONFIG_CRYPTO_CTS is not set CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_LRW is not set @@ -5850,7 +5925,7 @@ CONFIG_CRYPTO_XXHASH=m CONFIG_CRYPTO_BLAKE2B=m # CONFIG_CRYPTO_BLAKE2S is not set CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_GHASH=y # CONFIG_CRYPTO_POLY1305 is not set CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y @@ -5972,6 +6047,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5979,10 +6055,12 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_USE_SYM_ANNOTATIONS=y CONFIG_INDIRECT_PIO=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y @@ -6038,6 +6116,7 @@ CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_REMAP=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_CMA=y @@ -6088,6 +6167,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options @@ -6097,6 +6177,7 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_COMPRESSED is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set @@ -6138,6 +6219,8 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_ARCH_HAS_DEBUG_WX=y +# CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set @@ -6147,7 +6230,9 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y @@ -6155,6 +6240,7 @@ CONFIG_DEBUG_MEMORY_INIT=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -6251,8 +6337,6 @@ CONFIG_STRICT_DEVMEM=y # arm64 Debugging # # CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -# CONFIG_DEBUG_WX is not set # CONFIG_ARM64_RELOC_TEST is not set # CONFIG_CORESIGHT is not set # end of arm64 Debugging @@ -6291,6 +6375,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set diff --git a/projects/Allwinner/linux/linux.arm.conf b/projects/Allwinner/linux/linux.arm.conf index 67510ce2b9..0c5d476f6d 100644 --- a/projects/Allwinner/linux/linux.arm.conf +++ b/projects/Allwinner/linux/linux.arm.conf @@ -1,16 +1,14 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 5.7.0 Kernel Configuration -# - -# -# Compiler: armv7ve-libreelec-linux-gnueabihf-gcc-9.3.0 (GCC) 9.3.0 +# Linux/arm 5.8.0 Kernel Configuration # +CONFIG_CC_VERSION_TEXT="armv7ve-libreelec-linux-gnueabihf-gcc-10.2.0 (GCC) 10.2.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=90300 +CONFIG_GCC_VERSION=100200 CONFIG_LD_VERSION=234000000 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_IRQ_WORK=y @@ -34,12 +32,14 @@ CONFIG_HAVE_KERNEL_LZ4=y # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set CONFIG_KERNEL_LZ4=y +CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="@DISTRONAME@" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y # CONFIG_USELIB is not set # CONFIG_AUDIT is not set @@ -128,7 +128,6 @@ CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -316,6 +315,7 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_SIRF is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -447,6 +447,9 @@ CONFIG_SCHED_HRTICK=y CONFIG_ARM_PATCH_IDIV=y CONFIG_AEABI=y # CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y @@ -512,7 +515,6 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y # CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set -# CONFIG_QORIQ_CPUFREQ is not set # end of CPU Frequency scaling # @@ -575,10 +577,11 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y # CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set -CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set -# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y # # Tegra firmware driver @@ -617,7 +620,6 @@ CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y @@ -692,6 +694,7 @@ CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set +# CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types @@ -760,6 +763,9 @@ CONFIG_COREDUMP=y # # Memory Management options # +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_ARCH_KEEP_MEMBLOCK=y @@ -809,6 +815,7 @@ CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set # CONFIG_XFRM_STATISTICS is not set +CONFIG_XFRM_ESP=m # CONFIG_NET_KEY is not set # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y @@ -1085,6 +1092,7 @@ CONFIG_STP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y # CONFIG_BRIDGE_VLAN_FILTERING is not set +# CONFIG_BRIDGE_MRP is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m @@ -1165,6 +1173,7 @@ CONFIG_DNS_RESOLVER=y # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y @@ -1246,8 +1255,10 @@ CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_LEDS=y -# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_MSFTEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set +# CONFIG_BT_FEATURE_DEBUG is not set # # Bluetooth device drivers @@ -1582,6 +1593,7 @@ CONFIG_DM_PERSISTENT_DATA=m CONFIG_DM_THIN_PROVISIONING=m # CONFIG_DM_CACHE is not set # CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_EBS is not set # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set # CONFIG_DM_MIRROR is not set @@ -1704,6 +1716,7 @@ CONFIG_MDIO_BUS_MUX=y # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_MVUSB is not set @@ -1726,6 +1739,7 @@ CONFIG_SWPHY=y # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_BROADCOM_PHY is not set +# CONFIG_BCM54140_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set @@ -1895,6 +1909,8 @@ CONFIG_MT76x0_COMMON=m CONFIG_MT76x0U=m CONFIG_MT76x2_COMMON=m CONFIG_MT76x2U=m +CONFIG_MT7615_COMMON=m +CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=m CONFIG_RT2500USB=m @@ -2029,9 +2045,7 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MSM_VIBRATOR is not set # CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set @@ -2050,6 +2064,7 @@ CONFIG_INPUT_UINPUT=y # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set @@ -2259,6 +2274,7 @@ CONFIG_SPI_SUN6I=y # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set +# CONFIG_SPI_AMD is not set # # SPI Multiplexer support @@ -2306,7 +2322,6 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AXP209=y -# CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SINGLE is not set # CONFIG_PINCTRL_SX150X is not set @@ -2332,7 +2347,6 @@ CONFIG_PINCTRL_SUN9I_A80_R=y # CONFIG_PINCTRL_SUN50I_H5 is not set # CONFIG_PINCTRL_SUN50I_H6 is not set # CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_EQUILIBRIUM is not set CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 @@ -2397,6 +2411,7 @@ CONFIG_GPIO_SYSFS=y # # end of USB GPIO expanders +# CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set @@ -2408,6 +2423,7 @@ CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set @@ -2438,6 +2454,7 @@ CONFIG_AXP20X_POWER=y # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_UCS1002 is not set +# CONFIG_CHARGER_BD99954 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2597,7 +2614,6 @@ CONFIG_CLOCK_THERMAL=y CONFIG_DEVFREQ_THERMAL=y # CONFIG_THERMAL_EMULATION is not set # CONFIG_THERMAL_MMIO is not set -# CONFIG_QORIQ_THERMAL is not set CONFIG_SUN8I_THERMAL=y CONFIG_GENERIC_ADC_THERMAL=y CONFIG_WATCHDOG=y @@ -2624,6 +2640,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_DW_WATCHDOG is not set CONFIG_SUNXI_WATCHDOG=y # CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ARM_SMC_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # @@ -2673,8 +2690,10 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_MP2629 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set @@ -2693,6 +2712,7 @@ CONFIG_MFD_AXP20X_RSB=y # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6360 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set @@ -2735,7 +2755,7 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set +CONFIG_MFD_WL1273_CORE=m # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_T7L66XB is not set @@ -2784,6 +2804,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set @@ -2805,9 +2826,6 @@ CONFIG_REGULATOR_SY8106A=y # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set -CONFIG_CEC_CORE=y -CONFIG_CEC_NOTIFIER=y -CONFIG_CEC_PIN=y CONFIG_RC_CORE=y CONFIG_RC_MAP=y CONFIG_LIRC=y @@ -2844,26 +2862,44 @@ CONFIG_IR_SUNXI=y # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set CONFIG_RC_XBOX_DVD=y +CONFIG_CEC_CORE=y +CONFIG_CEC_NOTIFIER=y +CONFIG_CEC_PIN=y +# CONFIG_MEDIA_CEC_RC is not set +# CONFIG_CEC_PIN_ERROR_INJ is not set +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m CONFIG_MEDIA_SUPPORT=y +# CONFIG_MEDIA_SUPPORT_FILTER is not set +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # -# Multimedia core support +# Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -# CONFIG_MEDIA_RADIO_SUPPORT is not set -# CONFIG_MEDIA_SDR_SUPPORT is not set -CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -# CONFIG_CEC_PIN_ERROR_INJ is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +# end of Media device types + +# +# Media core support +# CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_DVB_CORE=y +# end of Media core support + +# +# Video4Linux options +# CONFIG_VIDEO_V4L2=y CONFIG_VIDEO_V4L2_I2C=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m @@ -2871,18 +2907,34 @@ CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_DVB_CORE=y +# end of Video4Linux options + +# +# Media controller options +# +CONFIG_MEDIA_CONTROLLER_DVB=y +CONFIG_MEDIA_CONTROLLER_REQUEST_API=y + +# +# Please notice that the enabled Media controller Request API is EXPERIMENTAL +# +# end of Media controller options + +# +# Digital TV options +# # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set +# end of Digital TV options # # Media drivers # +CONFIG_TTPCI_EEPROM=m CONFIG_MEDIA_USB_SUPPORT=y # @@ -2980,22 +3032,31 @@ CONFIG_DVB_AS102=m # CONFIG_VIDEO_EM28XX is not set # -# USB HDMI CEC adapters +# Software defined radio USB devices # -# CONFIG_V4L_PLATFORM_DRIVERS is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_VIDEO_SUN8I_DEINTERLACE=m -CONFIG_VIDEO_SUN8I_ROTATE=m -# CONFIG_V4L_TEST_DRIVERS is not set -# CONFIG_DVB_PLATFORM_DRIVERS is not set -# CONFIG_CEC_PLATFORM_DRIVERS is not set - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_USB_AIRSPY is not set +# CONFIG_USB_HACKRF is not set +# CONFIG_USB_MSI2500 is not set +CONFIG_RADIO_ADAPTERS=y +CONFIG_RADIO_TEA575X=m +CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_RADIO_SI4713=m +CONFIG_USB_SI4713=m +CONFIG_PLATFORM_SI4713=m +CONFIG_I2C_SI4713=m +CONFIG_USB_MR800=m +CONFIG_USB_DSBR=m +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +CONFIG_USB_KEENE=m +CONFIG_USB_RAREMONO=m +CONFIG_USB_MA901=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m CONFIG_MEDIA_COMMON_OPTIONS=y # @@ -3012,17 +3073,30 @@ CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y +# CONFIG_V4L_PLATFORM_DRIVERS is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_SUN8I_DEINTERLACE=m +CONFIG_VIDEO_SUN8I_ROTATE=m +# CONFIG_DVB_PLATFORM_DRIVERS is not set +# CONFIG_SDR_PLATFORM_DRIVERS is not set # -# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# MMC/SDIO DVB adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# end of Media drivers + +# +# Media ancillary drivers # -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y CONFIG_MEDIA_ATTACH=y -CONFIG_VIDEO_IR_I2C=y # -# I2C Encoders, decoders, sensors and other helper chips +# IR I2C driver auto-selected by 'Autoselect ancillary drivers' # +CONFIG_VIDEO_IR_I2C=y # # Audio decoders, processors and mixers @@ -3043,11 +3117,13 @@ CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_WM8739=m CONFIG_VIDEO_VP27SMPX=m CONFIG_VIDEO_SONY_BTF_MPX=m +# end of Audio decoders, processors and mixers # # RDS decoders # CONFIG_VIDEO_SAA6588=m +# end of RDS decoders # # Video decoders @@ -3082,6 +3158,7 @@ CONFIG_VIDEO_VPX3220=m # CONFIG_VIDEO_SAA717X=m CONFIG_VIDEO_CX25840=m +# end of Video decoders # # Video encoders @@ -3097,6 +3174,35 @@ CONFIG_VIDEO_ADV7511_CEC=y CONFIG_VIDEO_AD9389B=m CONFIG_VIDEO_AK881X=m CONFIG_VIDEO_THS8200=m +# end of Video encoders + +# +# Video improvement chips +# +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +# end of Video improvement chips + +# +# Audio/Video compression chips +# +CONFIG_VIDEO_SAA6752HS=m +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +CONFIG_SDR_MAX2175=m +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +CONFIG_VIDEO_THS7303=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_I2C=m +CONFIG_VIDEO_ST_MIPID02=m +# end of Miscellaneous helper chips # # Camera sensor devices @@ -3113,6 +3219,7 @@ CONFIG_VIDEO_THS8200=m # CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2680 is not set # CONFIG_VIDEO_OV2685 is not set +# CONFIG_VIDEO_OV2740 is not set # CONFIG_VIDEO_OV5640 is not set # CONFIG_VIDEO_OV5645 is not set # CONFIG_VIDEO_OV5647 is not set @@ -3150,6 +3257,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_SMIAPP is not set # CONFIG_VIDEO_ET8EK8 is not set # CONFIG_VIDEO_S5C73M3 is not set +# end of Camera sensor devices # # Lens drivers @@ -3158,6 +3266,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_AK7375 is not set # CONFIG_VIDEO_DW9714 is not set # CONFIG_VIDEO_DW9807_VCM is not set +# end of Lens drivers # # Flash devices @@ -3165,30 +3274,7 @@ CONFIG_VIDEO_OV7640=m # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set - -# -# Video improvement chips -# -CONFIG_VIDEO_UPD64031A=m -CONFIG_VIDEO_UPD64083=m - -# -# Audio/Video compression chips -# -CONFIG_VIDEO_SAA6752HS=m - -# -# SDR tuner chips -# - -# -# Miscellaneous helper chips -# -CONFIG_VIDEO_THS7303=m -CONFIG_VIDEO_M52790=m -CONFIG_VIDEO_I2C=m -CONFIG_VIDEO_ST_MIPID02=m -# end of I2C Encoders, decoders, sensors and other helper chips +# end of Flash devices # # SPI helper chips @@ -3213,8 +3299,8 @@ CONFIG_MEDIA_TUNER_TDA8290=y CONFIG_MEDIA_TUNER_TDA827X=y CONFIG_MEDIA_TUNER_TDA18271=y CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=m -CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y CONFIG_MEDIA_TUNER_MSI001=m CONFIG_MEDIA_TUNER_MT20XX=y CONFIG_MEDIA_TUNER_MT2060=m @@ -3329,6 +3415,7 @@ CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m +CONFIG_DVB_RTL2832_SDR=m CONFIG_DVB_SI2168=m CONFIG_DVB_AS102_FE=m CONFIG_DVB_ZD1301_DEMOD=m @@ -3408,12 +3495,13 @@ CONFIG_DVB_HELENE=m # CONFIG_DVB_CXD2099=m CONFIG_DVB_SP2=m +# end of Customise DVB Frontends # # Tools to develop new frontends # # CONFIG_DVB_DUMMY_FE is not set -# end of Customise DVB Frontends +# end of Media ancillary drivers # # Graphics support @@ -3492,6 +3580,7 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y @@ -3501,9 +3590,11 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set @@ -3762,6 +3853,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set @@ -3833,6 +3925,7 @@ CONFIG_SND_SOC_SPDIF=y # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set @@ -4023,7 +4116,7 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y # # USB Device Class drivers # -# CONFIG_USB_ACM is not set +CONFIG_USB_ACM=m # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set @@ -4260,6 +4353,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set @@ -4483,7 +4577,6 @@ CONFIG_DMABUF_HEAPS_CMA=y # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VDPA is not set -CONFIG_VHOST_DPN=y # CONFIG_VHOST_MENU is not set # @@ -4601,14 +4694,10 @@ CONFIG_VIDEO_USBVISION=m # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set +CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_CLK_HSDK is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -4637,8 +4726,6 @@ CONFIG_SUN8I_H3_CCU=y CONFIG_SUN8I_DE2_CCU=y # CONFIG_SUN8I_R40_CCU is not set CONFIG_SUN8I_R_CCU=y -# end of Common Clock Framework - # CONFIG_HWSPINLOCK is not set # @@ -4814,6 +4901,8 @@ CONFIG_IIO_SW_TRIGGER=y # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set +# CONFIG_ADI_AXI_ADC is not set CONFIG_AXP20X_ADC=y # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -4828,6 +4917,7 @@ CONFIG_AXP20X_ADC=y # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set @@ -4870,6 +4960,7 @@ CONFIG_SUN4I_GPADC=y # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set @@ -4998,6 +5089,7 @@ CONFIG_SUN4I_GPADC=y # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set +# CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -5147,8 +5239,10 @@ CONFIG_SUN4I_GPADC=y # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set +# CONFIG_SX9310 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors @@ -5211,6 +5305,7 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_FSL_IMX8MQ_USB is not set # CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -5218,7 +5313,6 @@ CONFIG_PHY_SUN50I_USB3=y # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set -# CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set @@ -5316,6 +5410,7 @@ CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_ZSTD=y +CONFIG_F2FS_FS_LZORLE=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -5750,6 +5845,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y +CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -5757,6 +5853,7 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m +# CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y @@ -5855,6 +5952,7 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set +# CONFIG_DYNAMIC_DEBUG_CORE is not set CONFIG_SYMBOLIC_ERRNAME=y # CONFIG_DEBUG_BUGVERBOSE is not set # end of printk and dmesg options @@ -5897,6 +5995,7 @@ CONFIG_DEBUG_MISC=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_WX is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set @@ -5911,6 +6010,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_HIGHMEM is not set CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y CONFIG_KASAN_STACK=1 # end of Memory Debugging @@ -6002,7 +6102,6 @@ CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # arm Debugging # # CONFIG_ARM_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_WX is not set # CONFIG_UNWINDER_FRAME_POINTER is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y @@ -6048,6 +6147,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set +# CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set diff --git a/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch b/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch deleted file mode 100644 index 28c294e667..0000000000 --- a/projects/Allwinner/patches/linux/0001-backport-from-5.8.patch +++ /dev/null @@ -1,1244 +0,0 @@ -From b928fd4674fe339374aa0aead9a82d9d6e476f88 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 13 Apr 2020 08:24:31 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Add gpio power supply - -OrangePi Lite2 and One Plus have GPIO ports powered by same power -supplies. Add them in common DT. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index 9287976c4a50..f1be3dd558ca 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -106,6 +106,12 @@ &ohci3 { - status = "okay"; - }; - -+&pio { -+ vcc-pc-supply = <®_bldo2>; -+ vcc-pd-supply = <®_cldo1>; -+ vcc-pg-supply = <®_aldo1>; -+}; -+ - &r_i2c { - status = "okay"; - -@@ -230,6 +236,10 @@ &r_ir { - status = "okay"; - }; - -+&r_pio { -+ vcc-pm-supply = <®_bldo3>; -+}; -+ - &rtc { - clocks = <&ext_osc32k>; - }; --- -2.26.2 - -From 27c9f2a0c5125727f0a9f7a19366d044b841e873 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Mon, 13 Apr 2020 08:24:32 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: orangepi: Disable OTG mode - -As can be seen from OrangePi Lite 2 and One Plus schematics, VBUS pin on -USB OTG port is directly connected to 5 V power supply. This mean that -OTG port can safely operate only in host mode, even though these two -boards have ID pin connected. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index f1be3dd558ca..ebc120a9232f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -251,7 +251,12 @@ &uart0 { - }; - - &usb2otg { -- dr_mode = "otg"; -+ /* -+ * OrangePi Lite 2 and One Plus, where this DT is used, don't -+ * have a controllable VBUS even though they do have an ID pin. -+ * Using it as anything but a USB host is unsafe. -+ */ -+ dr_mode = "host"; - status = "okay"; - }; - --- -2.26.2 - -From 3d478d211b8e40deb609594f0676be205e8d89c1 Mon Sep 17 00:00:00 2001 -From: Sebastian Meyer -Date: Mon, 13 Apr 2020 08:24:33 +0200 -Subject: [PATCH] arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo - module - -OrangePi Lite2 has AP6255 BT+WIFI combo chip. Add support for it. - -Signed-off-by: Sebastian Meyer -[merged BT and WIFI patches and updated commit message] -Signed-off-by: Jernej Skrabec -Signed-off-by: Maxime Ripard ---- - .../allwinner/sun50i-h6-orangepi-lite2.dts | 65 +++++++++++++++++++ - 1 file changed, 65 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -index e7ca75c0d0f7..e8770858b5d0 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -@@ -6,4 +6,69 @@ - / { - model = "OrangePi Lite2"; - compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; -+ -+ aliases { -+ serial1 = &uart1; /* BT-UART */ -+ }; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_cldo2>; -+ vqmmc-supply = <®_bldo3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ brcm: sdio-wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; -+}; -+ -+®_cldo2 { -+ /* -+ * This regulator is connected with CLDO3. -+ * Before the kernel can support synchronized -+ * enable of coupled regulators, keep them -+ * both always on as a ugly hack. -+ */ -+ regulator-always-on; -+}; -+ -+®_cldo3 { -+ /* -+ * This regulator is connected with CLDO2. -+ * See the comments for CLDO2. -+ */ -+ regulator-always-on; -+}; -+ -+/* There's the BT part of the AP6255 connected to that UART */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4345c5"; -+ clocks = <&rtc 1>; -+ clock-names = "lpo"; -+ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ -+ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ -+ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ -+ max-speed = <1500000>; -+ }; - }; --- -2.26.2 - -From 8a3a9535189d908f7e325238c9f09069d4fe9b8f Mon Sep 17 00:00:00 2001 -From: Yangtao Li -Date: Mon, 20 Apr 2020 15:00:13 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add clock to CPU cores -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The ARM CPU cores are fed by the CPU clock from the CCU. Add a -reference to the clock for each CPU core, along with the clock -transition latency. - -Signed-off-by: Yangtao Li -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index a5ee68388bd3..370e77b86fe1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -25,6 +25,8 @@ cpu0: cpu@0 { - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu1: cpu@1 { -@@ -32,6 +34,8 @@ cpu1: cpu@1 { - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu2: cpu@2 { -@@ -39,6 +43,8 @@ cpu2: cpu@2 { - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - - cpu3: cpu@3 { -@@ -46,6 +52,8 @@ cpu3: cpu@3 { - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; -+ clocks = <&ccu CLK_CPUX>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ - }; - }; - --- -2.26.2 - -From 9f8a93b742e99dd93ca888161909e7245f1c7269 Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Mon, 20 Apr 2020 15:00:14 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add thermal trip points/cooling - map -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This enables passive cooling by down-regulating CPU voltage -and frequency. - -Signed-off-by: Ondrej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 28 ++++++++++++++++++++ - 1 file changed, 28 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 370e77b86fe1..7cd10e4a5e2e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -27,6 +27,7 @@ cpu0: cpu@0 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu1: cpu@1 { -@@ -36,6 +37,7 @@ cpu1: cpu@1 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu2: cpu@2 { -@@ -45,6 +47,7 @@ cpu2: cpu@2 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - - cpu3: cpu@3 { -@@ -54,6 +57,7 @@ cpu3: cpu@3 { - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ -+ #cooling-cells = <2>; - }; - }; - -@@ -964,6 +968,30 @@ cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&ths 0>; -+ -+ trips { -+ cpu_alert: cpu-alert { -+ temperature = <85000>; -+ hysteresis = <2000>; -+ type = "passive"; -+ }; -+ -+ cpu-crit { -+ temperature = <100000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ map0 { -+ trip = <&cpu_alert>; -+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, -+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; -+ }; -+ }; - }; - - gpu-thermal { --- -2.26.2 - -From 905434e0b544ee220bcce6da16a6857c0274b8ba Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Mon, 20 Apr 2020 15:00:15 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Add CPU Operating Performance - Points table -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add an Operating Performance Points table for the CPU cores to -enable Dynamic Voltage & Frequency Scaling on the H6. - -Signed-off-by: Ondrej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 117 ++++++++++++++++++ - arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 + - 2 files changed, 121 insertions(+) - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -new file mode 100644 -index 000000000000..dcb789519797 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -@@ -0,0 +1,117 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (C) 2020 Ondrej Jirman -+// Copyright (C) 2020 Clément Péron -+ -+/ { -+ cpu_opp_table: cpu-opp-table { -+ compatible = "allwinner,sun50i-h6-operating-points"; -+ nvmem-cells = <&cpu_speed_grade>; -+ opp-shared; -+ -+ opp@480000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <480000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@720000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <720000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@816000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <816000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@888000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <888000000>; -+ -+ opp-microvolt-speed0 = <880000>; -+ opp-microvolt-speed1 = <820000>; -+ opp-microvolt-speed2 = <820000>; -+ }; -+ -+ opp@1080000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1080000000>; -+ -+ opp-microvolt-speed0 = <940000>; -+ opp-microvolt-speed1 = <880000>; -+ opp-microvolt-speed2 = <880000>; -+ }; -+ -+ opp@1320000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1320000000>; -+ -+ opp-microvolt-speed0 = <1000000>; -+ opp-microvolt-speed1 = <940000>; -+ opp-microvolt-speed2 = <940000>; -+ }; -+ -+ opp@1488000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1488000000>; -+ -+ opp-microvolt-speed0 = <1060000>; -+ opp-microvolt-speed1 = <1000000>; -+ opp-microvolt-speed2 = <1000000>; -+ }; -+ -+ opp@1608000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1608000000>; -+ -+ opp-microvolt-speed0 = <1090000>; -+ opp-microvolt-speed1 = <1030000>; -+ opp-microvolt-speed2 = <1030000>; -+ }; -+ -+ opp@1704000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1704000000>; -+ -+ opp-microvolt-speed0 = <1120000>; -+ opp-microvolt-speed1 = <1060000>; -+ opp-microvolt-speed2 = <1060000>; -+ }; -+ -+ opp@1800000000 { -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ opp-hz = /bits/ 64 <1800000000>; -+ -+ opp-microvolt-speed0 = <1160000>; -+ opp-microvolt-speed1 = <1100000>; -+ opp-microvolt-speed2 = <1100000>; -+ }; -+ }; -+}; -+ -+&cpu0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&cpu3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 7cd10e4a5e2e..2e31632c6ca8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -262,6 +262,10 @@ sid: efuse@3006000 { - ths_calibration: thermal-sensor-calibration@14 { - reg = <0x14 0x8>; - }; -+ -+ cpu_speed_grade: cpu-speed-grade@1c { -+ reg = <0x1c 0x4>; -+ }; - }; - - watchdog: watchdog@30090a0 { --- -2.26.2 - -From 67533f873ad7e2a4af1a1ed47f03f501d6c770df Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:17 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink - GS1 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Beelink GS1. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -index 8f09d209359b..3f7ceeb1a767 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -77,6 +78,10 @@ spdif_out: spdif-out { - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &de { - status = "okay"; - }; -@@ -234,7 +239,8 @@ reg_cldo3: cldo3 { - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -242,6 +248,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From ebae33c3f6cee978f60ad48371258a03f9440691 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:18 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Orange - Pi 3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Orange Pi 3. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index 47f579610dcc..15c9dd8c4479 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -257,6 +258,7 @@ reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -264,6 +266,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From d8e2b7e11b50c332e03fae05a68d40a48d4646ed Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:20 +0200 -Subject: [PATCH] arm64: dts: allwinner: Sort Pine H64 device-tree nodes -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Pine H64 device-tree have some nodes not properly sorted. - -Fix this. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 34 +++++++++---------- - 1 file changed, 17 insertions(+), 17 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -index b0642d841933..63a785b534e1 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -@@ -80,6 +80,18 @@ reg_usb_vbus: vbus { - }; - }; - -+&de { -+ status = "okay"; -+}; -+ -+&ehci0 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ - &emac { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; -@@ -91,17 +103,6 @@ &emac { - status = "okay"; - }; - --&mdio { -- ext_rgmii_phy: ethernet-phy@1 { -- compatible = "ethernet-phy-ieee802.3-c22"; -- reg = <1>; -- }; --}; -- --&de { -- status = "okay"; --}; -- - &gpu { - mali-supply = <®_dcdcc>; - status = "okay"; -@@ -117,12 +118,11 @@ hdmi_out_con: endpoint { - }; - }; - --&ehci0 { -- status = "okay"; --}; -- --&ehci3 { -- status = "okay"; -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - - &mmc0 { --- -2.26.2 - -From fe79ea577be81e1e71642826ab00e676dc59c194 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Mon, 20 Apr 2020 15:00:21 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU and GPU opp tables for Pine H64. - -This needs to change the CPU regulator max voltage to fit -the OPP table. - -Also add the ramp-delay information to avoid any out of spec -running as the regulator is slower at reaching the voltage -requested compare to the PLL reaching the frequency. - -There is no such information for AXP805 but similar PMIC (AXP813) -has a DVM (Dynamic Voltage scaling Management) ramp rate equal -to 2500uV/us. - -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -index 63a785b534e1..af85b2074867 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -80,6 +81,10 @@ reg_usb_vbus: vbus { - }; - }; - -+&cpu0 { -+ cpu-supply = <®_dcdca>; -+}; -+ - &de { - status = "okay"; - }; -@@ -238,7 +243,8 @@ reg_cldo3: cldo3 { - reg_dcdca: dcdca { - regulator-always-on; - regulator-min-microvolt = <810000>; -- regulator-max-microvolt = <1080000>; -+ regulator-max-microvolt = <1160000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-cpu"; - }; - -@@ -246,6 +252,7 @@ reg_dcdcc: dcdcc { - regulator-enable-ramp-delay = <32000>; - regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; -+ regulator-ramp-delay = <2500>; - regulator-name = "vdd-gpu"; - }; - --- -2.26.2 - -From c83e24e7bf1cfa7486165f066f2bc1335703e1fd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Fri, 8 May 2020 21:10:34 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: add voltage range to OPP table -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Some boards have a fixed regulator and can't reach the voltage set -by the OPP table. - -Add a range where the minimal voltage is the target and the maximal -voltage is 1.2V. - -Suggested-by: Ondřej Jirman -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 60 +++++++++---------- - 1 file changed, 30 insertions(+), 30 deletions(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -index dcb789519797..1a5eddc5a40f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi -@@ -12,90 +12,90 @@ opp@480000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <480000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@720000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <720000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@816000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <816000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@888000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <888000000>; - -- opp-microvolt-speed0 = <880000>; -- opp-microvolt-speed1 = <820000>; -- opp-microvolt-speed2 = <820000>; -+ opp-microvolt-speed0 = <880000 880000 1200000>; -+ opp-microvolt-speed1 = <820000 820000 1200000>; -+ opp-microvolt-speed2 = <820000 820000 1200000>; - }; - - opp@1080000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1080000000>; - -- opp-microvolt-speed0 = <940000>; -- opp-microvolt-speed1 = <880000>; -- opp-microvolt-speed2 = <880000>; -+ opp-microvolt-speed0 = <940000 940000 1200000>; -+ opp-microvolt-speed1 = <880000 880000 1200000>; -+ opp-microvolt-speed2 = <880000 880000 1200000>; - }; - - opp@1320000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1320000000>; - -- opp-microvolt-speed0 = <1000000>; -- opp-microvolt-speed1 = <940000>; -- opp-microvolt-speed2 = <940000>; -+ opp-microvolt-speed0 = <1000000 1000000 1200000>; -+ opp-microvolt-speed1 = <940000 940000 1200000>; -+ opp-microvolt-speed2 = <940000 940000 1200000>; - }; - - opp@1488000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1488000000>; - -- opp-microvolt-speed0 = <1060000>; -- opp-microvolt-speed1 = <1000000>; -- opp-microvolt-speed2 = <1000000>; -+ opp-microvolt-speed0 = <1060000 1060000 1200000>; -+ opp-microvolt-speed1 = <1000000 1000000 1200000>; -+ opp-microvolt-speed2 = <1000000 1000000 1200000>; - }; - - opp@1608000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1608000000>; - -- opp-microvolt-speed0 = <1090000>; -- opp-microvolt-speed1 = <1030000>; -- opp-microvolt-speed2 = <1030000>; -+ opp-microvolt-speed0 = <1090000 1090000 1200000>; -+ opp-microvolt-speed1 = <1030000 1030000 1200000>; -+ opp-microvolt-speed2 = <1030000 1030000 1200000>; - }; - - opp@1704000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1704000000>; - -- opp-microvolt-speed0 = <1120000>; -- opp-microvolt-speed1 = <1060000>; -- opp-microvolt-speed2 = <1060000>; -+ opp-microvolt-speed0 = <1120000 1120000 1200000>; -+ opp-microvolt-speed1 = <1060000 1060000 1200000>; -+ opp-microvolt-speed2 = <1060000 1060000 1200000>; - }; - - opp@1800000000 { - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-hz = /bits/ 64 <1800000000>; - -- opp-microvolt-speed0 = <1160000>; -- opp-microvolt-speed1 = <1100000>; -- opp-microvolt-speed2 = <1100000>; -+ opp-microvolt-speed0 = <1160000 1160000 1200000>; -+ opp-microvolt-speed1 = <1100000 1100000 1200000>; -+ opp-microvolt-speed2 = <1100000 1100000 1200000>; - }; - }; - }; --- -2.26.2 - -From 5961bdf2dfe5d7fa9e9e6cc3cc67d02f122a46bd Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= -Date: Fri, 8 May 2020 21:10:35 +0200 -Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix - TX6 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Enable CPU opp tables for Tanix TX6. - -Also add the fixed regulator that provided vdd-cpu-gpu required for -CPU opp tables. - -This voltage has been found using a voltmeter and could be wrong. - -Tested-by: Jernej Škrabec -Signed-off-by: Clément Péron -Signed-off-by: Maxime Ripard ---- - .../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -index 83e6cb0e59ce..be81330db14f 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts -@@ -4,6 +4,7 @@ - /dts-v1/; - - #include "sun50i-h6.dtsi" -+#include "sun50i-h6-cpu-opp.dtsi" - - #include - -@@ -37,6 +38,17 @@ reg_vcc3v3: vcc3v3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -+ -+ reg_vdd_cpu_gpu: vdd-cpu-gpu { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd-cpu-gpu"; -+ regulator-min-microvolt = <1135000>; -+ regulator-max-microvolt = <1135000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <®_vdd_cpu_gpu>; - }; - - &de { -@@ -56,6 +68,7 @@ &ehci3 { - }; - - &gpu { -+ mali-supply = <®_vdd_cpu_gpu>; - status = "okay"; - }; - --- -2.26.2 - -From 6b633e3efbb45b574bdd803ebdddc8e010758a95 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Thu, 5 Mar 2020 00:25:10 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: do not force "none" scan mode - -Setting scan mode to "none" confuses some TVs like LG B8, which randomly -change overscan percentage over time. Digital outputs like HDMI and DVI, -handled by this controller, don't really need overscan, so we can always -set scan mode to underscan. Actually, this is exactly what -drm_hdmi_avi_infoframe_from_display_mode() already does, so we can just -remove offending line. - -Reviewed-by: Neil Armstrong -Acked-by: Laurent Pinchart -Signed-off-by: Jonas Karlman -[updated commit message] -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-3-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index f85c15ad8486..6e95bcbb2413 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1648,8 +1648,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - break; - } - -- frame.scan_mode = HDMI_SCAN_MODE_NONE; -- - /* - * The Designware IP uses a different byte format from standard - * AVI info frames, though generally the bits are in the correct --- -2.26.2 - -From 86af379ebca2ef0b01d998a49e531cd495dcf9a3 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:11 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: Add support for RGB limited range - -CEA 861 standard requestis that RGB quantization range is "limited" for -CEA modes. Support that by adding CSC matrix which downscales values. - -This allows proper color reproduction on TV and PC monitor at the same -time. In future, override property can be added, like "Broadcast RGB" -in i915 driver. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-4-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 +++++++++++++++++------ - 1 file changed, 46 insertions(+), 17 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 6e95bcbb2413..43c763ee8307 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -92,6 +92,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = { - { 0x6756, 0x78ab, 0x2000, 0x0200 } - }; - -+static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = { -+ { 0x1b7c, 0x0000, 0x0000, 0x0020 }, -+ { 0x0000, 0x1b7c, 0x0000, 0x0020 }, -+ { 0x0000, 0x0000, 0x1b7c, 0x0020 } -+}; -+ - struct hdmi_vmode { - bool mdataenablepolarity; - -@@ -109,6 +115,7 @@ struct hdmi_data_info { - unsigned int pix_repet_factor; - unsigned int hdcp_enable; - struct hdmi_vmode video_mode; -+ bool rgb_limited_range; - }; - - struct dw_hdmi_i2c { -@@ -956,7 +963,11 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return hdmi->hdmi_data.enc_in_bus_format != hdmi->hdmi_data.enc_out_bus_format; -+ return (hdmi->hdmi_data.enc_in_bus_format != -+ hdmi->hdmi_data.enc_out_bus_format) || -+ (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -+ hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -+ hdmi->hdmi_data.rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -986,25 +997,27 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -+ bool is_input_rgb, is_output_rgb; - unsigned i; - u32 csc_scale = 1; - -- if (is_color_space_conversion(hdmi)) { -- if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_out_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_out_eitu709; -- } else if (hdmi_bus_fmt_is_rgb( -- hdmi->hdmi_data.enc_in_bus_format)) { -- if (hdmi->hdmi_data.enc_out_encoding == -- V4L2_YCBCR_ENC_601) -- csc_coeff = &csc_coeff_rgb_in_eitu601; -- else -- csc_coeff = &csc_coeff_rgb_in_eitu709; -- csc_scale = 0; -- } -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format); -+ -+ if (!is_input_rgb && is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_out_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_out_eitu709; -+ } else if (is_input_rgb && !is_output_rgb) { -+ if (hdmi->hdmi_data.enc_out_encoding == V4L2_YCBCR_ENC_601) -+ csc_coeff = &csc_coeff_rgb_in_eitu601; -+ else -+ csc_coeff = &csc_coeff_rgb_in_eitu709; -+ csc_scale = 0; -+ } else if (is_input_rgb && is_output_rgb && -+ hdmi->hdmi_data.rgb_limited_range) { -+ csc_coeff = &csc_coeff_rgb_full_to_rgb_limited; - } - - /* The CSC registers are sequential, alternating MSB then LSB */ -@@ -1614,6 +1627,18 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - drm_hdmi_avi_infoframe_from_display_mode(&frame, - &hdmi->connector, mode); - -+ if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) { -+ drm_hdmi_avi_infoframe_quant_range(&frame, &hdmi->connector, -+ mode, -+ hdmi->hdmi_data.rgb_limited_range ? -+ HDMI_QUANTIZATION_RANGE_LIMITED : -+ HDMI_QUANTIZATION_RANGE_FULL); -+ } else { -+ frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; -+ frame.ycc_quantization_range = -+ HDMI_YCC_QUANTIZATION_RANGE_LIMITED; -+ } -+ - if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) - frame.colorspace = HDMI_COLORSPACE_YUV444; - else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) -@@ -2111,6 +2136,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - if (hdmi->hdmi_data.enc_out_bus_format == MEDIA_BUS_FMT_FIXED) - hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - -+ hdmi->hdmi_data.rgb_limited_range = hdmi->sink_is_hdmi && -+ drm_default_rgb_quant_range(mode) == -+ HDMI_QUANTIZATION_RANGE_LIMITED; -+ - hdmi->hdmi_data.pix_repet_factor = 0; - hdmi->hdmi_data.hdcp_enable = 0; - hdmi->hdmi_data.video_mode.mdataenablepolarity = true; --- -2.26.2 - -From 0e8003076aca7b29c868e923e73f332cca12ed8b Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Thu, 5 Mar 2020 00:25:12 +0100 -Subject: [PATCH] drm/bridge: dw-hdmi: rework csc related functions - -is_color_space_conversion() is a misnomer. It checks not only if color -space conversion is needed, but also if format conversion is needed. -This is actually desired behaviour because result of this function -determines if CSC block should be enabled or not (CSC block can also do -format conversion). - -In order to clear misunderstandings, let's rework -is_color_space_conversion() to do exactly what is supposed to do and add -another function which will determine if CSC block must be enabled or -not. - -Reviewed-by: Laurent Pinchart -Signed-off-by: Jernej Skrabec -Link: https://patchwork.freedesktop.org/patch/msgid/20200304232512.51616-5-jernej.skrabec@siol.net ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 31 +++++++++++++++-------- - 1 file changed, 21 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 43c763ee8307..ec3b06433d98 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -963,11 +963,14 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi) - - static int is_color_space_conversion(struct dw_hdmi *hdmi) - { -- return (hdmi->hdmi_data.enc_in_bus_format != -- hdmi->hdmi_data.enc_out_bus_format) || -- (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) && -- hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) && -- hdmi->hdmi_data.rgb_limited_range); -+ struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data; -+ bool is_input_rgb, is_output_rgb; -+ -+ is_input_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_in_bus_format); -+ is_output_rgb = hdmi_bus_fmt_is_rgb(hdmi_data->enc_out_bus_format); -+ -+ return (is_input_rgb != is_output_rgb) || -+ (is_input_rgb && is_output_rgb && hdmi_data->rgb_limited_range); - } - - static int is_color_space_decimation(struct dw_hdmi *hdmi) -@@ -994,6 +997,13 @@ static int is_color_space_interpolation(struct dw_hdmi *hdmi) - return 0; - } - -+static bool is_csc_needed(struct dw_hdmi *hdmi) -+{ -+ return is_color_space_conversion(hdmi) || -+ is_color_space_decimation(hdmi) || -+ is_color_space_interpolation(hdmi); -+} -+ - static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) - { - const u16 (*csc_coeff)[3][4] = &csc_coeff_default; -@@ -2027,18 +2037,19 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); - - /* Enable csc path */ -- if (is_color_space_conversion(hdmi)) { -+ if (is_csc_needed(hdmi)) { - hdmi->mc_clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE; - hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -- } - -- /* Enable color space conversion if needed */ -- if (is_color_space_conversion(hdmi)) - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH, - HDMI_MC_FLOWCTRL); -- else -+ } else { -+ hdmi->mc_clkdis |= HDMI_MC_CLKDIS_CSCCLK_DISABLE; -+ hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS); -+ - hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS, - HDMI_MC_FLOWCTRL); -+ } - } - - /* Workaround to clear the overflow condition */ --- -2.26.2 - diff --git a/projects/Allwinner/patches/linux/0002-backport-from-next.patch b/projects/Allwinner/patches/linux/0002-backport-from-next.patch deleted file mode 100644 index 664cdfa2ca..0000000000 --- a/projects/Allwinner/patches/linux/0002-backport-from-next.patch +++ /dev/null @@ -1,269 +0,0 @@ -From d5aecd289babf3adcf5a837b067a5efddb097d99 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Sat, 9 May 2020 22:06:43 +0200 -Subject: [PATCH] media: cedrus: Implement runtime PM - -This allows the VE clocks and PLL_VE to be disabled most of the time. -A runtime PM reference is held while streaming. - -Signed-off-by: Jernej Skrabec -Signed-off-by: Samuel Holland -Reviewed-by: Ezequiel Garcia -Signed-off-by: Hans Verkuil -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/staging/media/sunxi/cedrus/cedrus.c | 7 ++ - .../staging/media/sunxi/cedrus/cedrus_hw.c | 106 ++++++++++++------ - .../staging/media/sunxi/cedrus/cedrus_hw.h | 3 + - .../staging/media/sunxi/cedrus/cedrus_video.c | 33 ++++-- - 4 files changed, 104 insertions(+), 45 deletions(-) - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c -index 05a85517ff60..bc27f9430eeb 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -551,12 +552,18 @@ static const struct of_device_id cedrus_dt_match[] = { - }; - MODULE_DEVICE_TABLE(of, cedrus_dt_match); - -+static const struct dev_pm_ops cedrus_dev_pm_ops = { -+ SET_RUNTIME_PM_OPS(cedrus_hw_suspend, -+ cedrus_hw_resume, NULL) -+}; -+ - static struct platform_driver cedrus_driver = { - .probe = cedrus_probe, - .remove = cedrus_remove, - .driver = { - .name = CEDRUS_NAME, - .of_match_table = of_match_ptr(cedrus_dt_match), -+ .pm = &cedrus_dev_pm_ops, - }, - }; - module_platform_driver(cedrus_driver); -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -index daf5f244f93b..1744e6fcc999 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -140,6 +141,64 @@ static irqreturn_t cedrus_irq(int irq, void *data) - return IRQ_HANDLED; - } - -+int cedrus_hw_suspend(struct device *device) -+{ -+ struct cedrus_dev *dev = dev_get_drvdata(device); -+ -+ reset_control_assert(dev->rstc); -+ -+ clk_disable_unprepare(dev->ram_clk); -+ clk_disable_unprepare(dev->mod_clk); -+ clk_disable_unprepare(dev->ahb_clk); -+ -+ return 0; -+} -+ -+int cedrus_hw_resume(struct device *device) -+{ -+ struct cedrus_dev *dev = dev_get_drvdata(device); -+ int ret; -+ -+ ret = clk_prepare_enable(dev->ahb_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable AHB clock\n"); -+ -+ return ret; -+ } -+ -+ ret = clk_prepare_enable(dev->mod_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable MOD clock\n"); -+ -+ goto err_ahb_clk; -+ } -+ -+ ret = clk_prepare_enable(dev->ram_clk); -+ if (ret) { -+ dev_err(dev->dev, "Failed to enable RAM clock\n"); -+ -+ goto err_mod_clk; -+ } -+ -+ ret = reset_control_reset(dev->rstc); -+ if (ret) { -+ dev_err(dev->dev, "Failed to apply reset\n"); -+ -+ goto err_ram_clk; -+ } -+ -+ return 0; -+ -+err_ram_clk: -+ clk_disable_unprepare(dev->ram_clk); -+err_mod_clk: -+ clk_disable_unprepare(dev->mod_clk); -+err_ahb_clk: -+ clk_disable_unprepare(dev->ahb_clk); -+ -+ return ret; -+} -+ - int cedrus_hw_probe(struct cedrus_dev *dev) - { - const struct cedrus_variant *variant; -@@ -236,42 +295,17 @@ int cedrus_hw_probe(struct cedrus_dev *dev) - goto err_sram; - } - -- ret = clk_prepare_enable(dev->ahb_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable AHB clock\n"); -- -- goto err_sram; -- } -- -- ret = clk_prepare_enable(dev->mod_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable MOD clock\n"); -- -- goto err_ahb_clk; -- } -- -- ret = clk_prepare_enable(dev->ram_clk); -- if (ret) { -- dev_err(dev->dev, "Failed to enable RAM clock\n"); -- -- goto err_mod_clk; -- } -- -- ret = reset_control_reset(dev->rstc); -- if (ret) { -- dev_err(dev->dev, "Failed to apply reset\n"); -- -- goto err_ram_clk; -+ pm_runtime_enable(dev->dev); -+ if (!pm_runtime_enabled(dev->dev)) { -+ ret = cedrus_hw_resume(dev->dev); -+ if (ret) -+ goto err_pm; - } - - return 0; - --err_ram_clk: -- clk_disable_unprepare(dev->ram_clk); --err_mod_clk: -- clk_disable_unprepare(dev->mod_clk); --err_ahb_clk: -- clk_disable_unprepare(dev->ahb_clk); -+err_pm: -+ pm_runtime_disable(dev->dev); - err_sram: - sunxi_sram_release(dev->dev); - err_mem: -@@ -282,11 +316,9 @@ int cedrus_hw_probe(struct cedrus_dev *dev) - - void cedrus_hw_remove(struct cedrus_dev *dev) - { -- reset_control_assert(dev->rstc); -- -- clk_disable_unprepare(dev->ram_clk); -- clk_disable_unprepare(dev->mod_clk); -- clk_disable_unprepare(dev->ahb_clk); -+ pm_runtime_disable(dev->dev); -+ if (!pm_runtime_status_suspended(dev->dev)) -+ cedrus_hw_suspend(dev->dev); - - sunxi_sram_release(dev->dev); - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -index 604ff932fbf5..45f641f0bfa2 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.h -@@ -22,6 +22,9 @@ void cedrus_engine_disable(struct cedrus_dev *dev); - void cedrus_dst_format_set(struct cedrus_dev *dev, - struct v4l2_pix_format *fmt); - -+int cedrus_hw_suspend(struct device *device); -+int cedrus_hw_resume(struct device *device); -+ - int cedrus_hw_probe(struct cedrus_dev *dev); - void cedrus_hw_remove(struct cedrus_dev *dev); - -diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -index ed3f511f066f..16d82309e7b6 100644 ---- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c -+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c -@@ -13,6 +13,8 @@ - * Marek Szyprowski, - */ - -+#include -+ - #include - #include - #include -@@ -450,12 +452,24 @@ static int cedrus_start_streaming(struct vb2_queue *vq, unsigned int count) - return -EINVAL; - } - -- if (V4L2_TYPE_IS_OUTPUT(vq->type) && -- dev->dec_ops[ctx->current_codec]->start) -- ret = dev->dec_ops[ctx->current_codec]->start(ctx); -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) { -+ ret = pm_runtime_get_sync(dev->dev); -+ if (ret < 0) -+ goto err_cleanup; - -- if (ret) -- cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); -+ if (dev->dec_ops[ctx->current_codec]->start) { -+ ret = dev->dec_ops[ctx->current_codec]->start(ctx); -+ if (ret) -+ goto err_pm; -+ } -+ } -+ -+ return 0; -+ -+err_pm: -+ pm_runtime_put(dev->dev); -+err_cleanup: -+ cedrus_queue_cleanup(vq, VB2_BUF_STATE_QUEUED); - - return ret; - } -@@ -465,9 +479,12 @@ static void cedrus_stop_streaming(struct vb2_queue *vq) - struct cedrus_ctx *ctx = vb2_get_drv_priv(vq); - struct cedrus_dev *dev = ctx->dev; - -- if (V4L2_TYPE_IS_OUTPUT(vq->type) && -- dev->dec_ops[ctx->current_codec]->stop) -- dev->dec_ops[ctx->current_codec]->stop(ctx); -+ if (V4L2_TYPE_IS_OUTPUT(vq->type)) { -+ if (dev->dec_ops[ctx->current_codec]->stop) -+ dev->dec_ops[ctx->current_codec]->stop(ctx); -+ -+ pm_runtime_put(dev->dev); -+ } - - cedrus_queue_cleanup(vq, VB2_BUF_STATE_ERROR); - } --- -2.27.0 - diff --git a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch index e7293229e3..4f84e60dc2 100644 --- a/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch +++ b/projects/Allwinner/patches/linux/0005-cedrus-improvements.patch @@ -13,70 +13,6 @@ Signed-off-by: Jernej Skrabec include/media/hevc-ctrls.h | 11 +++++ 4 files changed, 63 insertions(+) -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index d4fc5f25aa14..e8e707642336 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -4196,6 +4196,47 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``padding[6]`` - - Applications and drivers must set this to zero. - -+``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX (struct)`` -+ Specifies the scaling matrix (as extracted from the bitstream) for -+ the associated HEVC slice data. The bitstream parameters are -+ defined according to :ref:`hevc`, section 7.4.5 "Scaling list -+ data semantics". For further documentation, refer to the above -+ specification, unless there is an explicit comment stating -+ otherwise. -+ -+ .. note:: -+ -+ This compound control is not yet part of the public kernel API and -+ it is expected to change. -+ -+.. c:type:: v4l2_ctrl_hevc_scaling_matrix -+ -+.. cssclass:: longtable -+ -+.. flat-table:: struct v4l2_ctrl_hevc_scaling_matrix -+ :header-rows: 0 -+ :stub-columns: 0 -+ :widths: 1 1 2 -+ -+ * - __u8 -+ - ``scaling_list_4x4[6][16]`` -+ - -+ * - __u8 -+ - ``scaling_list_8x8[6][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_16x16[6][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_32x32[2][64]`` -+ - -+ * - __u8 -+ - ``scaling_list_dc_coef_16x16[6]`` -+ - -+ * - __u8 -+ - ``scaling_list_dc_coef_32x32[2]`` -+ - -+ - ``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE (enum)`` - Specifies the decoding mode to use. Currently exposes slice-based and - frame-based decoding but new modes might be added later on. -diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst -index 561bda112809..3aabc322daa4 100644 ---- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst -+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst -@@ -207,6 +207,7 @@ Compressed Formats - * ``V4L2_CID_MPEG_VIDEO_HEVC_SPS`` - * ``V4L2_CID_MPEG_VIDEO_HEVC_PPS`` - * ``V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS`` -+ * ``V4L2_CID_MPEG_VIDEO_HEVC_SCALING_MATRIX`` - See the :ref:`associated Codec Control IDs `. - Buffers associated with this pixel format must contain the appropriate - number of macroblocks to decode a full corresponding frame. diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index 93d33d1db4e8..94c3e64ffb8b 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c @@ -337,29 +273,6 @@ Signed-off-by: Jernej Skrabec include/media/hevc-ctrls.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -index e8e707642336..0d85a3ec0a45 100644 ---- a/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -+++ b/Documentation/media/uapi/v4l/ext-ctrls-codec.rst -@@ -3991,6 +3991,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. -+ * - __u32 -+ - ``slice_segment_addr`` -+ - - * - __u8 - - ``nal_unit_type`` - - -@@ -4068,7 +4071,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - - ``num_rps_poc_lt_curr`` - - The number of reference pictures in the long-term set. - * - __u8 -- - ``padding[7]`` -+ - ``padding[5]`` - - Applications and drivers must set this to zero. - * - struct :c:type:`v4l2_hevc_dpb_entry` - - ``dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX]`` diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 1592e52c3614..3e2e32098312 100644 --- a/include/media/hevc-ctrls.h diff --git a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch index 8bc2106a74..23c6f2f95c 100644 --- a/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch +++ b/projects/Allwinner/patches/linux/0006-wip-cec-improvements.patch @@ -177,7 +177,7 @@ index 43643ad31730..d840bc07cba6 100644 } +#ifdef CONFIG_DRM_SUN8I_DW_HDMI_CEC -+static bool sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap) ++static int sun8i_hdmi_phy_cec_pin_read(struct cec_adapter *adap) +{ + struct sun8i_hdmi_phy *phy = cec_get_drvdata(adap); + unsigned int val;