diff --git a/packages/lang/gcc/patches/gcc-GCC61801.patch b/packages/lang/gcc/patches/gcc-GCC61801.patch
new file mode 100644
index 0000000000..8458024ce4
--- /dev/null
+++ b/packages/lang/gcc/patches/gcc-GCC61801.patch
@@ -0,0 +1,12 @@
+--- trunk/gcc/sched-deps.c	2014/07/17 07:27:38	212737
++++ trunk/gcc/sched-deps.c	2014/07/17 07:47:19	212738
+@@ -2750,7 +2750,8 @@
+ 	   Consider for instance a volatile asm that changes the fpu rounding
+ 	   mode.  An insn should not be moved across this even if it only uses
+ 	   pseudo-regs because it might give an incorrectly rounded result.  */
+-	if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
++	if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
++	    && !DEBUG_INSN_P (insn))
+ 	  reg_pending_barrier = TRUE_BARRIER;
+ 
+ 	/* For all ASM_OPERANDS, we must traverse the vector of input operands.