diff --git a/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch b/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch new file mode 100644 index 0000000000..b7c5e57993 --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0001-rockchip-efuse-add-support-for-RK322x-non-secure-efu.patch @@ -0,0 +1,150 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Francis Fan +Date: Tue, 7 Nov 2017 17:50:11 +0800 +Subject: [PATCH 1/6] rockchip: efuse: add support for RK322x non-secure efuse + block + +Signed-off-by: Francis Fan +Signed-off-by: Cody Xie +--- + drivers/misc/rockchip-efuse.c | 96 +++++++++++++++++++++++++++++++++-- + 1 file changed, 92 insertions(+), 4 deletions(-) + +diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c +index 083ee65e0a..4c9239f7ba 100644 +--- a/drivers/misc/rockchip-efuse.c ++++ b/drivers/misc/rockchip-efuse.c +@@ -27,6 +27,17 @@ + #define RK3399_STROBE BIT(1) + #define RK3399_CSB BIT(0) + ++#define RK3288_A_SHIFT 6 ++#define RK3288_A_MASK 0x3ff ++#define RK3288_NFUSES 32 ++#define RK3288_BYTES_PER_FUSE 1 ++#define RK3288_PGENB BIT(3) ++#define RK3288_LOAD BIT(2) ++#define RK3288_STROBE BIT(1) ++#define RK3288_CSB BIT(0) ++ ++typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); ++ + struct rockchip_efuse_regs { + u32 ctrl; /* 0x00 efuse control register */ + u32 dout; /* 0x04 efuse data out register */ +@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, + */ + + struct udevice *dev; +- u8 fuses[128]; ++ u8 fuses[128] = {0}; + int ret; + + /* retrieve the device */ +@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, + } + + U_BOOT_CMD( +- rk3399_dump_efuses, 1, 1, dump_efuses, ++ rockchip_dump_efuses, 1, 1, dump_efuses, + "Dump the content of the efuses", + "" + ); +@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset, + return 0; + } + ++static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, ++ void *buf, int size) ++{ ++ struct rockchip_efuse_plat *plat = dev_get_plat(dev); ++ struct rockchip_efuse_regs *efuse = ++ (struct rockchip_efuse_regs *)plat->base; ++ u8 *buffer = buf; ++ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE; ++ ++ if (size > (max_size - offset)) ++ size = max_size - offset; ++ ++ /* Switch to read mode */ ++ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl); ++ udelay(1); ++ ++ while (size--) { ++ writel(readl(&efuse->ctrl) & ++ (~(RK3288_A_MASK << RK3288_A_SHIFT)), ++ &efuse->ctrl); ++ /* set addr */ ++ writel(readl(&efuse->ctrl) | ++ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT), ++ &efuse->ctrl); ++ udelay(1); ++ /* strobe low to high */ ++ writel(readl(&efuse->ctrl) | ++ RK3288_STROBE, &efuse->ctrl); ++ ndelay(60); ++ /* read data */ ++ *buffer++ = readl(&efuse->dout); ++ /* reset strobe to low */ ++ writel(readl(&efuse->ctrl) & ++ (~RK3288_STROBE), &efuse->ctrl); ++ udelay(1); ++ } ++ ++ /* Switch to standby mode */ ++ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl); ++ ++ return 0; ++} ++ + static int rockchip_efuse_read(struct udevice *dev, int offset, + void *buf, int size) + { +- return rockchip_rk3399_efuse_read(dev, offset, buf, size); ++ EFUSE_READ efuse_read = NULL; ++ ++ efuse_read = (EFUSE_READ)dev_get_driver_data(dev); ++ if (!efuse_read) ++ return -ENOSYS; ++ ++ return (*efuse_read)(dev, offset, buf, size); + } + + static const struct misc_ops rockchip_efuse_ops = { +@@ -146,7 +206,35 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev) + } + + static const struct udevice_id rockchip_efuse_ids[] = { +- { .compatible = "rockchip,rk3399-efuse" }, ++ /* deprecated but kept around for dts binding compatibility */ ++ { ++ .compatible = "rockchip,rockchip-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3066a-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3188-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3228-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3288-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3368-efuse", ++ .data = (ulong)&rockchip_rk3288_efuse_read, ++ }, ++ { ++ .compatible = "rockchip,rk3399-efuse", ++ .data = (ulong)&rockchip_rk3399_efuse_read, ++ }, + {} + }; + diff --git a/projects/Rockchip/patches/u-boot/0001-u-boot-add-efuse-drivers-for-RK3288-and-RK3328.patch b/projects/Rockchip/patches/u-boot/0001-u-boot-add-efuse-drivers-for-RK3288-and-RK3328.patch deleted file mode 100644 index c76d11da0d..0000000000 --- a/projects/Rockchip/patches/u-boot/0001-u-boot-add-efuse-drivers-for-RK3288-and-RK3328.patch +++ /dev/null @@ -1,292 +0,0 @@ -From ae3121ae4a50702c8e52078ed52bd279d339b68b Mon Sep 17 00:00:00 2001 -From: Francis Fan -Date: Tue, 7 Nov 2017 17:50:11 +0800 -Subject: [PATCH] rockchip: efuse: add support for RK322x non-secure efuse - block - -Signed-off-by: Francis Fan -Signed-off-by: Cody Xie ---- - drivers/misc/rockchip-efuse.c | 96 +++++++++++++++++++++++++++++++++-- - 1 file changed, 92 insertions(+), 4 deletions(-) - -diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c -index 083ee65e0a..85a9384581 100644 ---- a/drivers/misc/rockchip-efuse.c -+++ b/drivers/misc/rockchip-efuse.c -@@ -27,6 +27,17 @@ - #define RK3399_STROBE BIT(1) - #define RK3399_CSB BIT(0) - -+#define RK3288_A_SHIFT 6 -+#define RK3288_A_MASK 0x3ff -+#define RK3288_NFUSES 32 -+#define RK3288_BYTES_PER_FUSE 1 -+#define RK3288_PGENB BIT(3) -+#define RK3288_LOAD BIT(2) -+#define RK3288_STROBE BIT(1) -+#define RK3288_CSB BIT(0) -+ -+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); -+ - struct rockchip_efuse_regs { - u32 ctrl; /* 0x00 efuse control register */ - u32 dout; /* 0x04 efuse data out register */ -@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, - */ - - struct udevice *dev; -- u8 fuses[128]; -+ u8 fuses[128] = {0}; - int ret; - - /* retrieve the device */ -@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag, - } - - U_BOOT_CMD( -- rk3399_dump_efuses, 1, 1, dump_efuses, -+ rockchip_dump_efuses, 1, 1, dump_efuses, - "Dump the content of the efuses", - "" - ); -@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset, - return 0; - } - -+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, -+ void *buf, int size) -+{ -+ struct rockchip_efuse_plat *plat = dev_get_plat(dev); -+ struct rockchip_efuse_regs *efuse = -+ (struct rockchip_efuse_regs *)plat->base; -+ u8 *buffer = buf; -+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE; -+ -+ if (size > (max_size - offset)) -+ size = max_size - offset; -+ -+ /* Switch to read mode */ -+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl); -+ udelay(1); -+ -+ while (size--) { -+ writel(readl(&efuse->ctrl) & -+ (~(RK3288_A_MASK << RK3288_A_SHIFT)), -+ &efuse->ctrl); -+ /* set addr */ -+ writel(readl(&efuse->ctrl) | -+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT), -+ &efuse->ctrl); -+ udelay(1); -+ /* strobe low to high */ -+ writel(readl(&efuse->ctrl) | -+ RK3288_STROBE, &efuse->ctrl); -+ ndelay(60); -+ /* read data */ -+ *buffer++ = readl(&efuse->dout); -+ /* reset strobe to low */ -+ writel(readl(&efuse->ctrl) & -+ (~RK3288_STROBE), &efuse->ctrl); -+ udelay(1); -+ } -+ -+ /* Switch to standby mode */ -+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl); -+ -+ return 0; -+} -+ - static int rockchip_efuse_read(struct udevice *dev, int offset, - void *buf, int size) - { -- return rockchip_rk3399_efuse_read(dev, offset, buf, size); -+ EFUSE_READ efuse_read = NULL; -+ -+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev); -+ if (!efuse_read) -+ return -ENOSYS; -+ -+ return (*efuse_read)(dev, offset, buf, size); - } - - static const struct misc_ops rockchip_efuse_ops = { -@@ -146,7 +206,35 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev) - } - - static const struct udevice_id rockchip_efuse_ids[] = { -- { .compatible = "rockchip,rk3399-efuse" }, -+ /* deprecated but kept around for dts binding compatibility */ -+ { -+ .compatible = "rockchip,rockchip-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3066a-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3188-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3228-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3288-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3368-efuse", -+ .data = (ulong)&rockchip_rk3288_efuse_read, -+ }, -+ { -+ .compatible = "rockchip,rk3399-efuse", -+ .data = (ulong)&rockchip_rk3399_efuse_read, -+ }, - {} - }; - - -From 8b1ce76598895a8979c98cdf27a408b19727d708 Mon Sep 17 00:00:00 2001 -From: Joseph Chen -Date: Thu, 2 Aug 2018 20:33:16 +0800 -Subject: [PATCH] rockchip: efuse: add support for RK3328 non-secure efuse - block - -Signed-off-by: Joseph Chen ---- - drivers/misc/rockchip-efuse.c | 67 +++++++++++++++++++++++++++++++++++ - 1 file changed, 67 insertions(+) - -diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c -index 85a9384581..1b0e81f4ad 100644 ---- a/drivers/misc/rockchip-efuse.c -+++ b/drivers/misc/rockchip-efuse.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - - #define RK3399_A_SHIFT 16 -@@ -36,6 +37,13 @@ - #define RK3288_STROBE BIT(1) - #define RK3288_CSB BIT(0) - -+#define RK3328_INT_STATUS 0x0018 -+#define RK3328_DOUT 0x0020 -+#define RK3328_AUTO_CTRL 0x0024 -+#define RK3328_INT_FINISH BIT(0) -+#define RK3328_AUTO_ENB BIT(0) -+#define RK3328_AUTO_RD BIT(1) -+ - typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); - - struct rockchip_efuse_regs { -@@ -46,6 +54,10 @@ struct rockchip_efuse_regs { - u32 jtag_pass; /* 0x10 JTAG password */ - u32 strobe_finish_ctrl; - /* 0x14 efuse strobe finish control register */ -+ u32 int_status;/* 0x18 */ -+ u32 reserved; /* 0x1c */ -+ u32 dout2; /* 0x20 */ -+ u32 auto_ctrl; /* 0x24 */ - }; - - struct rockchip_efuse_plat { -@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, - return 0; - } - -+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset, -+ void *buf, int size) -+{ -+ struct rockchip_efuse_plat *plat = dev_get_plat(dev); -+ struct rockchip_efuse_regs *efuse = -+ (struct rockchip_efuse_regs *)plat->base; -+ unsigned int addr_start, addr_end, addr_offset, addr_len; -+ u32 out_value, status; -+ u8 *buffer; -+ int ret = 0, i = 0, j = 0; -+ -+ /* Max non-secure Byte */ -+ if (size > 32) -+ size = 32; -+ -+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ -+ offset += 96; -+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) / -+ RK3399_BYTES_PER_FUSE; -+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) / -+ RK3399_BYTES_PER_FUSE; -+ addr_offset = offset % RK3399_BYTES_PER_FUSE; -+ addr_len = addr_end - addr_start; -+ -+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE); -+ if (!buffer) -+ return -ENOMEM; -+ -+ for (j = 0; j < addr_len; j++) { -+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | -+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT), -+ &efuse->auto_ctrl); -+ udelay(5); -+ status = readl(&efuse->int_status); -+ if (!(status & RK3328_INT_FINISH)) { -+ ret = -EIO; -+ goto err; -+ } -+ out_value = readl(&efuse->dout2); -+ writel(RK3328_INT_FINISH, &efuse->int_status); -+ -+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE); -+ i += RK3399_BYTES_PER_FUSE; -+ } -+ memcpy(buf, buffer + addr_offset, size); -+err: -+ free(buffer); -+ -+ return ret; -+} -+ - static int rockchip_efuse_read(struct udevice *dev, int offset, - void *buf, int size) - { -@@ -231,6 +294,10 @@ static const struct udevice_id rockchip_efuse_ids[] = { - .compatible = "rockchip,rk3368-efuse", - .data = (ulong)&rockchip_rk3288_efuse_read, - }, -+ { -+ .compatible = "rockchip,rk3328-efuse", -+ .data = (ulong)&rockchip_rk3328_efuse_read, -+ }, - { - .compatible = "rockchip,rk3399-efuse", - .data = (ulong)&rockchip_rk3399_efuse_read, - -From add1c5f168cdf625813e5a159af1057e6a9f96e2 Mon Sep 17 00:00:00 2001 -From: Alex Bee -Date: Sun, 11 Sep 2022 10:56:43 +0200 -Subject: [PATCH] arm: dts: enable efuse for RK3288 - ---- - arch/arm/dts/rk3288.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi -index 9fb6d86bc1..4d0a7190f0 100644 ---- a/arch/arm/dts/rk3288.dtsi -+++ b/arch/arm/dts/rk3288.dtsi -@@ -866,8 +866,7 @@ - - efuse: efuse@ffb40000 { - compatible = "rockchip,rk3288-efuse"; -- reg = <0xffb40000 0x10000>; -- status = "disabled"; -+ reg = <0xffb40000 0x20>; - }; - - gic: interrupt-controller@ffc01000 { diff --git a/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch b/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch new file mode 100644 index 0000000000..62d190d8ce --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0002-rockchip-efuse-add-support-for-RK3328-non-secure-efu.patch @@ -0,0 +1,117 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Joseph Chen +Date: Thu, 2 Aug 2018 20:33:16 +0800 +Subject: [PATCH 2/6] rockchip: efuse: add support for RK3328 non-secure efuse + block + +Signed-off-by: Joseph Chen +--- + drivers/misc/rockchip-efuse.c | 67 +++++++++++++++++++++++++++++++++++ + 1 file changed, 67 insertions(+) + +diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c +index 4c9239f7ba..c75405bfcf 100644 +--- a/drivers/misc/rockchip-efuse.c ++++ b/drivers/misc/rockchip-efuse.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + + #define RK3399_A_SHIFT 16 +@@ -36,6 +37,13 @@ + #define RK3288_STROBE BIT(1) + #define RK3288_CSB BIT(0) + ++#define RK3328_INT_STATUS 0x0018 ++#define RK3328_DOUT 0x0020 ++#define RK3328_AUTO_CTRL 0x0024 ++#define RK3328_INT_FINISH BIT(0) ++#define RK3328_AUTO_ENB BIT(0) ++#define RK3328_AUTO_RD BIT(1) ++ + typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size); + + struct rockchip_efuse_regs { +@@ -46,6 +54,10 @@ struct rockchip_efuse_regs { + u32 jtag_pass; /* 0x10 JTAG password */ + u32 strobe_finish_ctrl; + /* 0x14 efuse strobe finish control register */ ++ u32 int_status;/* 0x18 */ ++ u32 reserved; /* 0x1c */ ++ u32 dout2; /* 0x20 */ ++ u32 auto_ctrl; /* 0x24 */ + }; + + struct rockchip_efuse_plat { +@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset, + return 0; + } + ++static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset, ++ void *buf, int size) ++{ ++ struct rockchip_efuse_plat *plat = dev_get_plat(dev); ++ struct rockchip_efuse_regs *efuse = ++ (struct rockchip_efuse_regs *)plat->base; ++ unsigned int addr_start, addr_end, addr_offset, addr_len; ++ u32 out_value, status; ++ u8 *buffer; ++ int ret = 0, i = 0, j = 0; ++ ++ /* Max non-secure Byte */ ++ if (size > 32) ++ size = 32; ++ ++ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ ++ offset += 96; ++ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) / ++ RK3399_BYTES_PER_FUSE; ++ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) / ++ RK3399_BYTES_PER_FUSE; ++ addr_offset = offset % RK3399_BYTES_PER_FUSE; ++ addr_len = addr_end - addr_start; ++ ++ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE); ++ if (!buffer) ++ return -ENOMEM; ++ ++ for (j = 0; j < addr_len; j++) { ++ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | ++ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT), ++ &efuse->auto_ctrl); ++ udelay(5); ++ status = readl(&efuse->int_status); ++ if (!(status & RK3328_INT_FINISH)) { ++ ret = -EIO; ++ goto err; ++ } ++ out_value = readl(&efuse->dout2); ++ writel(RK3328_INT_FINISH, &efuse->int_status); ++ ++ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE); ++ i += RK3399_BYTES_PER_FUSE; ++ } ++ memcpy(buf, buffer + addr_offset, size); ++err: ++ free(buffer); ++ ++ return ret; ++} ++ + static int rockchip_efuse_read(struct udevice *dev, int offset, + void *buf, int size) + { +@@ -231,6 +294,10 @@ static const struct udevice_id rockchip_efuse_ids[] = { + .compatible = "rockchip,rk3368-efuse", + .data = (ulong)&rockchip_rk3288_efuse_read, + }, ++ { ++ .compatible = "rockchip,rk3328-efuse", ++ .data = (ulong)&rockchip_rk3328_efuse_read, ++ }, + { + .compatible = "rockchip,rk3399-efuse", + .data = (ulong)&rockchip_rk3399_efuse_read, diff --git a/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch b/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch new file mode 100644 index 0000000000..00e5d0dbdc --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0003-arm-dts-enable-efuse-for-RK3288.patch @@ -0,0 +1,23 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Sun, 11 Sep 2022 10:56:43 +0200 +Subject: [PATCH 3/6] arm: dts: enable efuse for RK3288 + +--- + arch/arm/dts/rk3288.dtsi | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi +index 53ee760b98..f923630f63 100644 +--- a/arch/arm/dts/rk3288.dtsi ++++ b/arch/arm/dts/rk3288.dtsi +@@ -866,8 +866,7 @@ + + efuse: efuse@ffb40000 { + compatible = "rockchip,rk3288-efuse"; +- reg = <0xffb40000 0x10000>; +- status = "disabled"; ++ reg = <0xffb40000 0x20>; + }; + + gic: interrupt-controller@ffc01000 { diff --git a/projects/Rockchip/patches/u-boot/0003-u-boot-rockchip-rk3288-switch-bootorder.patch b/projects/Rockchip/patches/u-boot/0003-u-boot-rockchip-rk3288-switch-bootorder.patch deleted file mode 100644 index 7af66965e4..0000000000 --- a/projects/Rockchip/patches/u-boot/0003-u-boot-rockchip-rk3288-switch-bootorder.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi -index 9eb696b141..3f3c77ca64 100644 ---- a/arch/arm/dts/rk3288-u-boot.dtsi -+++ b/arch/arm/dts/rk3288-u-boot.dtsi -@@ -25,7 +25,7 @@ - - chosen { - u-boot,spl-boot-order = \ -- "same-as-spl", &emmc, &sdmmc; -+ "same-as-spl", &sdmmc, &emmc; - }; - - dmc: dmc@ff610000 { diff --git a/projects/Rockchip/patches/u-boot/0002-u-boot-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch b/projects/Rockchip/patches/u-boot/0004-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch similarity index 90% rename from projects/Rockchip/patches/u-boot/0002-u-boot-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch rename to projects/Rockchip/patches/u-boot/0004-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch index c912f09bca..7aa2d3f8bd 100644 --- a/projects/Rockchip/patches/u-boot/0002-u-boot-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch +++ b/projects/Rockchip/patches/u-boot/0004-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch @@ -1,7 +1,7 @@ -From 16bcb2e9a7e187d76d0f627668ad2babf66126e4 Mon Sep 17 00:00:00 2001 +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Sat, 23 Jul 2022 13:23:19 +0200 -Subject: [PATCH] rockchip: rk3328: Set VOP QoS to high priority +Subject: [PATCH 4/6] rockchip: rk3328: Set VOP QoS to high priority The default priority for the quality of service for the video output results in unsightly glitches on the output whenever there diff --git a/projects/Rockchip/patches/u-boot/0005-rockchip-rk3288-Pick-SD-card-as-first-boot-device.patch b/projects/Rockchip/patches/u-boot/0005-rockchip-rk3288-Pick-SD-card-as-first-boot-device.patch new file mode 100644 index 0000000000..9ca11334db --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0005-rockchip-rk3288-Pick-SD-card-as-first-boot-device.patch @@ -0,0 +1,26 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Mon, 31 Oct 2022 17:13:47 +0100 +Subject: [PATCH 5/6] rockchip: rk3288: Pick SD card as first boot device + +In order to be able to boot from SD card at SPL level, always check this first +and any other mmc device later. + +Signed-off-by: Alex Bee +--- + arch/arm/dts/rk3288-u-boot.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi +index e411445ed6..17f2dd4d12 100644 +--- a/arch/arm/dts/rk3288-u-boot.dtsi ++++ b/arch/arm/dts/rk3288-u-boot.dtsi +@@ -25,7 +25,7 @@ + + chosen { + u-boot,spl-boot-order = \ +- "same-as-spl", &emmc, &sdmmc; ++ "same-as-spl", &sdmmc, &emmc; + }; + + dmc: dmc@ff610000 { diff --git a/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch b/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch new file mode 100644 index 0000000000..baa200a7aa --- /dev/null +++ b/projects/Rockchip/patches/u-boot/0006-Rockchip-rk3399-evb-Don-t-initalize-i2c-bus-in-SPL.patch @@ -0,0 +1,37 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Alex Bee +Date: Mon, 31 Oct 2022 17:16:07 +0100 +Subject: [PATCH 6/6] Rockchip: rk3399-evb: Don't initalize i2c bus in SPL + +Since we are using this device as fallback for boards which are not supported +by mainline u-boot in combination with vendor TPL/SPL, we need to make sure +that i2c is initalized in BL33 because vendor bootchain doesn't do that in +an earlier level. +--- + arch/arm/dts/rk3399-evb-u-boot.dtsi | 10 +--------- + 1 file changed, 1 insertion(+), 9 deletions(-) + +diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi +index 5e39b1493d..18733da7f9 100644 +--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi +@@ -9,18 +9,10 @@ + / { + chosen { + stdout-path = "serial2:1500000n8"; +- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; + }; + }; + +-&i2c0 { +- u-boot,dm-pre-reloc; +-}; +- +-&rk808 { +- u-boot,dm-pre-reloc; +-}; +- + &tcphy1 { + status = "okay"; + };