diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index ee34e34926..a6eadbde04 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -22,12 +22,6 @@ PKG_NEED_UNPACK="${PROJECT_DIR}/${PROJECT}/bootloader" [ -n "${DEVICE}" ] && PKG_NEED_UNPACK+=" ${PROJECT_DIR}/${PROJECT}/devices/${DEVICE}/bootloader" case "${PROJECT}" in - Amlogic) - PKG_VERSION="807482107a6d426dbcd6457d9ccf8b3ce6ca887b" # 2021.04-rc2 custodians/u-boot-amlogic-test - PKG_SHA256="a10430d2c1a1d9e83e66bed342433ddfe4f3d6f16d9fa8b4d4c034b600baffd3" - PKG_URL="https://github.com/chewitt/u-boot/archive/${PKG_VERSION}.tar.gz" - PKG_PATCH_DIRS="amlogic" - ;; Rockchip) PKG_VERSION="8659d08d2b589693d121c1298484e861b7dafc4f" PKG_SHA256="3f9f2bbd0c28be6d7d6eb909823fee5728da023aca0ce37aef3c8f67d1179ec1" diff --git a/projects/Amlogic/patches/u-boot/u-boot-0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoc.patch b/projects/Amlogic/patches/u-boot/u-boot-0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoc.patch index 55c4237d87..6202c7a7c9 100644 --- a/projects/Amlogic/patches/u-boot/u-boot-0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoc.patch +++ b/projects/Amlogic/patches/u-boot/u-boot-0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoc.patch @@ -1,7 +1,7 @@ -From 91f485c24fb55a7e0fcaa627fe71bb2ebd9033d5 Mon Sep 17 00:00:00 2001 +From 66b8aff5a485dd2c77974992b031d4298ddfee13 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Fri, 13 Nov 2020 02:09:36 +0000 -Subject: [PATCH 01/10] HACK: configs: meson64: prevent stdout/stderr on +Subject: [PATCH 01/30] HACK: configs: meson64: prevent stdout/stderr on videoconsole Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr @@ -14,7 +14,7 @@ Signed-off-by: Christian Hewitt 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/meson64.h b/include/configs/meson64.h -index 52cc01f73d..54f995e6fe 100644 +index f9bb0240d2..d31314412c 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -18,7 +18,7 @@ diff --git a/projects/Amlogic/patches/u-boot/u-boot-0002-HACK-configs-meson64-remove-amlogic-so-fdtdir-finds-.patch b/projects/Amlogic/patches/u-boot/u-boot-0002-HACK-configs-meson64-remove-amlogic-so-fdtdir-finds-.patch new file mode 100644 index 0000000000..712d01d435 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0002-HACK-configs-meson64-remove-amlogic-so-fdtdir-finds-.patch @@ -0,0 +1,26 @@ +From d6bd0e0edae9093f43bc566daac7586aa807b6ac Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 22 Apr 2021 06:52:50 +0000 +Subject: [PATCH 02/30] HACK: configs: meson64: remove /amlogic so fdtdir finds + LE boot files + +--- + include/configs/meson64.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index d31314412c..f909dbe079 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -93,7 +93,7 @@ + "pxefile_addr_r=0x01080000\0" \ + "fdtoverlay_addr_r=0x01000000\0" \ + "ramdisk_addr_r=0x13000000\0" \ +- "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ ++ "fdtfile=/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + BOOTENV + #endif + +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0003-HACK-board-amlogic-odroid-n2-remove-amlogic-prefix-f.patch b/projects/Amlogic/patches/u-boot/u-boot-0003-HACK-board-amlogic-odroid-n2-remove-amlogic-prefix-f.patch new file mode 100644 index 0000000000..59bb069ae6 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0003-HACK-board-amlogic-odroid-n2-remove-amlogic-prefix-f.patch @@ -0,0 +1,29 @@ +From 7a6e8626ca82952d6c6b38a1a91841c1a0fe1e7f Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 3 Aug 2021 18:42:55 +0000 +Subject: [PATCH 03/30] HACK: board: amlogic: odroid-n2: remove /amlogic/ + prefix for dtb path + +Remove the /amlogic/ prefix to align with current LE dtb locations. + +Signed-off-by: Christian Hewitt +--- + board/amlogic/odroid-n2/odroid-n2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c +index 2135457edd..ec1f4efc11 100644 +--- a/board/amlogic/odroid-n2/odroid-n2.c ++++ b/board/amlogic/odroid-n2/odroid-n2.c +@@ -63,7 +63,7 @@ static void odroid_set_fdtfile(char *soc, char *variant) + { + char s[128]; + +- snprintf(s, sizeof(s), "amlogic/meson-%s-odroid-%s.dtb", soc, variant); ++ snprintf(s, sizeof(s), "meson-%s-odroid-%s.dtb", soc, variant); + env_set("fdtfile", s); + } + +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-ARM-meson-Add-S905Y2-SOC-ID.patch b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-ARM-meson-Add-S905Y2-SOC-ID.patch new file mode 100644 index 0000000000..db73dbc38f --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-ARM-meson-Add-S905Y2-SOC-ID.patch @@ -0,0 +1,31 @@ +From ad67f25d0d0fad4f0432336ade9374762a1ff279 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 20 Aug 2021 01:11:52 +0000 +Subject: [PATCH 04/30] FROMGIT: ARM: meson: Add S905Y2 SOC ID + +Add the SOC ID for the S905Y2 to board info, see below for before/after +tested with a Radxa Zero board: + +SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) +SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) + +Signed-off-by: Christian Hewitt +--- + arch/arm/mach-meson/board-info.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c +index d16d3f194d..2421acd817 100644 +--- a/arch/arm/mach-meson/board-info.c ++++ b/arch/arm/mach-meson/board-info.c +@@ -64,6 +64,7 @@ static const struct meson_gx_package_id { + { "A113X", 0x25, 0x37, 0xff }, + { "A113D", 0x25, 0x22, 0xff }, + { "S905D2", 0x28, 0x10, 0xf0 }, ++ { "S905Y2", 0x28, 0x30, 0xf0 }, + { "S905X2", 0x28, 0x40, 0xf0 }, + { "A311D", 0x29, 0x10, 0xf0 }, + { "S922X", 0x29, 0x40, 0xf0 }, +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-pci-pcie_dw_meson-fix-usb-fail-when-pci-link.patch b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-pci-pcie_dw_meson-fix-usb-fail-when-pci-link.patch new file mode 100644 index 0000000000..53df64f978 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-pci-pcie_dw_meson-fix-usb-fail-when-pci-link.patch @@ -0,0 +1,43 @@ +From 24bc1b456ce4879b58b8cbdf45e4d36d8feb69c4 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 8 Sep 2021 14:32:12 +0200 +Subject: [PATCH 05/30] FROMGIT: pci: pcie_dw_meson: fix usb fail when pci link + fails to go up + +On Amlogic A311D, when the PCIe link fails disabling the related clocks +makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC. + +Mimic the Linux behavior by not considering a link failure a probe failure, +and continue even if the PCIe link is down. + +Reported-by: Art Nikpal +Signed-off-by: Neil Armstrong +Reviewed-by: Bin Meng +--- + drivers/pci/pcie_dw_meson.c | 8 +------- + 1 file changed, 1 insertion(+), 7 deletions(-) + +diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c +index 0525ecbea6..07da9fa533 100644 +--- a/drivers/pci/pcie_dw_meson.c ++++ b/drivers/pci/pcie_dw_meson.c +@@ -319,15 +319,9 @@ static int meson_pcie_init_port(struct udevice *dev) + + pcie_dw_setup_host(&priv->dw); + +- ret = meson_pcie_link_up(priv, LINK_SPEED_GEN_2); +- if (ret < 0) +- goto err_link_up; ++ meson_pcie_link_up(priv, LINK_SPEED_GEN_2); + + return 0; +-err_link_up: +- clk_disable(&priv->clk_port); +- clk_disable(&priv->clk_general); +- clk_disable(&priv->clk_pclk); + err_deassert_bulk: + reset_assert_bulk(&priv->rsts); + err_power_off_phy: +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-ARM-meson-Sync-Amlogic-DT-from-Linux-5.14.patch b/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-ARM-meson-Sync-Amlogic-DT-from-Linux-5.14.patch new file mode 100644 index 0000000000..a958961a59 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-ARM-meson-Sync-Amlogic-DT-from-Linux-5.14.patch @@ -0,0 +1,3474 @@ +From 2f8c4f67793016b54c5ef0b58abd4c90ff10db42 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:00 +0200 +Subject: [PATCH 06/30] FROMGIT: ARM: meson: Sync Amlogic DT from Linux 5.14 + +Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"), +dt-bindings clock changes and new meson-g12b-gsking-x.dts, +meson-sm1-bananapi-m5 & odroid-hc4 boards. + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 3 + + arch/arm/dts/meson-axg-s400.dts | 16 + + arch/arm/dts/meson-axg.dtsi | 181 +++++ + arch/arm/dts/meson-g12-common.dtsi | 31 +- + arch/arm/dts/meson-g12a-sei510.dts | 2 +- + arch/arm/dts/meson-g12b-gsking-x.dts | 133 ++++ + arch/arm/dts/meson-g12b-gtking-pro.dts | 23 +- + arch/arm/dts/meson-g12b-gtking.dts | 22 +- + arch/arm/dts/meson-g12b-odroid-n2-plus.dts | 2 +- + arch/arm/dts/meson-g12b-odroid-n2.dtsi | 74 +- + arch/arm/dts/meson-g12b-w400.dtsi | 2 +- + arch/arm/dts/meson-g12b.dtsi | 4 + + arch/arm/dts/meson-gx-libretech-pc.dtsi | 2 +- + arch/arm/dts/meson-gx-p23x-q20x.dtsi | 2 +- + arch/arm/dts/meson-gx.dtsi | 7 + + arch/arm/dts/meson-gxbb-nanopi-k2.dts | 42 +- + arch/arm/dts/meson-gxbb-odroidc2.dts | 44 +- + arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 2 +- + arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 50 +- + .../dts/meson-gxl-s905x-libretech-cc-v2.dts | 6 +- + arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 2 +- + arch/arm/dts/meson-gxm-khadas-vim2.dts | 55 +- + arch/arm/dts/meson-gxm-wetek-core2.dts | 2 +- + arch/arm/dts/meson-gxm.dtsi | 20 + + arch/arm/dts/meson-khadas-vim3.dtsi | 73 +- + arch/arm/dts/meson-sm1-bananapi-m5.dts | 646 ++++++++++++++++++ + arch/arm/dts/meson-sm1-khadas-vim3l.dts | 20 +- + arch/arm/dts/meson-sm1-odroid-c4.dts | 448 +----------- + arch/arm/dts/meson-sm1-odroid-hc4.dts | 140 ++++ + arch/arm/dts/meson-sm1-odroid.dtsi | 449 ++++++++++++ + arch/arm/dts/meson-sm1-sei610.dts | 10 +- + arch/arm/dts/meson-sm1.dtsi | 12 +- + include/dt-bindings/clock/axg-clkc.h | 26 +- + include/dt-bindings/clock/g12a-clkc.h | 2 + + 34 files changed, 2030 insertions(+), 523 deletions(-) + create mode 100644 arch/arm/dts/meson-g12b-gsking-x.dts + create mode 100644 arch/arm/dts/meson-sm1-bananapi-m5.dts + create mode 100644 arch/arm/dts/meson-sm1-odroid-hc4.dts + create mode 100644 arch/arm/dts/meson-sm1-odroid.dtsi + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index fc16a57e60..f0160d2dc0 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -177,11 +177,14 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-g12a-sei510.dtb \ + meson-g12b-gtking.dtb \ + meson-g12b-gtking-pro.dtb \ ++ meson-g12b-gsking-x.dtb \ + meson-g12b-odroid-n2.dtb \ + meson-g12b-odroid-n2-plus.dtb \ + meson-g12b-a311d-khadas-vim3.dtb \ ++ meson-sm1-bananapi-m5.dtb \ + meson-sm1-khadas-vim3l.dtb \ + meson-sm1-odroid-c4.dtb \ ++ meson-sm1-odroid-hc4.dtb \ + meson-sm1-sei610.dtb + dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-medcom-wide.dtb \ +diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts +index cb1360ae12..359589d1df 100644 +--- a/arch/arm/dts/meson-axg-s400.dts ++++ b/arch/arm/dts/meson-axg-s400.dts +@@ -441,6 +441,16 @@ + status = "okay"; + }; + ++&pcieA { ++ reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pcieB { ++ reset-gpios = <&gpio GPIOZ_10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ status = "okay"; ++}; ++ + &pwm_ab { + status = "okay"; + pinctrl-0 = <&pwm_a_x20_pins>; +@@ -584,3 +594,9 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb { ++ status = "okay"; ++ dr_mode = "otg"; ++ vbus-supply = <&usb_pwr>; ++}; +diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi +index b9efc84692..3f5254eeb4 100644 +--- a/arch/arm/dts/meson-axg.dtsi ++++ b/arch/arm/dts/meson-axg.dtsi +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + + / { + compatible = "amlogic,meson-axg"; +@@ -171,6 +172,98 @@ + #size-cells = <2>; + ranges; + ++ pcieA: pcie@f9800000 { ++ compatible = "amlogic,axg-pcie", "snps,dw-pcie"; ++ reg = <0x0 0xf9800000 0x0 0x400000>, ++ <0x0 0xff646000 0x0 0x2000>, ++ <0x0 0xf9f00000 0x0 0x100000>; ++ reg-names = "elbi", "cfg", "config"; ++ interrupts = ; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0>; ++ interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>; ++ bus-range = <0x0 0xff>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>; ++ clock-names = "general", "pclk", "port"; ++ resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>; ++ reset-names = "port", "apb"; ++ num-lanes = <1>; ++ phys = <&pcie_phy>; ++ phy-names = "pcie"; ++ status = "disabled"; ++ }; ++ ++ pcieB: pcie@fa000000 { ++ compatible = "amlogic,axg-pcie", "snps,dw-pcie"; ++ reg = <0x0 0xfa000000 0x0 0x400000>, ++ <0x0 0xff648000 0x0 0x2000>, ++ <0x0 0xfa400000 0x0 0x100000>; ++ reg-names = "elbi", "cfg", "config"; ++ interrupts = ; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0>; ++ interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; ++ bus-range = <0x0 0xff>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>; ++ clock-names = "general", "pclk", "port"; ++ resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>; ++ reset-names = "port", "apb"; ++ num-lanes = <1>; ++ phys = <&pcie_phy>; ++ phy-names = "pcie"; ++ status = "disabled"; ++ }; ++ ++ usb: usb@ffe09080 { ++ compatible = "amlogic,meson-axg-usb-ctrl"; ++ reg = <0x0 0xffe09080 0x0 0x20>; ++ interrupts = ; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; ++ clock-names = "usb_ctrl", "ddr"; ++ resets = <&reset RESET_USB_OTG>; ++ ++ dr_mode = "otg"; ++ ++ phys = <&usb2_phy1>; ++ phy-names = "usb2-phy1"; ++ ++ dwc2: usb@ff400000 { ++ compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; ++ reg = <0x0 0xff400000 0x0 0x40000>; ++ interrupts = ; ++ clocks = <&clkc CLKID_USB1>; ++ clock-names = "otg"; ++ phys = <&usb2_phy1>; ++ dr_mode = "peripheral"; ++ g-rx-fifo-size = <192>; ++ g-np-tx-fifo-size = <128>; ++ g-tx-fifo-size = <128 128 16 16 16>; ++ }; ++ ++ dwc3: usb@ff500000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0xff500000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "host"; ++ maximum-speed = "high-speed"; ++ snps,dis_u2_susphy_quirk; ++ }; ++ }; ++ + ethmac: ethernet@ff3f0000 { + compatible = "amlogic,meson-axg-dwmac", + "snps,dwmac-3.70a", +@@ -187,9 +280,19 @@ + "timing-adjustment"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; ++ power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; + status = "disabled"; + }; + ++ pcie_phy: phy@ff644000 { ++ compatible = "amlogic,axg-pcie-phy"; ++ reg = <0x0 0xff644000 0x0 0x1c>; ++ resets = <&reset RESET_PCIE_PHY>; ++ phys = <&mipi_pcie_analog_dphy>; ++ phy-names = "analog"; ++ #phy-cells = <0>; ++ }; ++ + pdm: audio-controller@ff632000 { + compatible = "amlogic,axg-pdm"; + reg = <0x0 0xff632000 0x0 0x34>; +@@ -1117,6 +1220,52 @@ + clocks = <&xtal>; + clock-names = "xtal"; + }; ++ ++ pwrc: power-controller { ++ compatible = "amlogic,meson-axg-pwrc"; ++ #power-domain-cells = <1>; ++ amlogic,ao-sysctrl = <&sysctrl_AO>; ++ resets = <&reset RESET_VIU>, ++ <&reset RESET_VENC>, ++ <&reset RESET_VCBUS>, ++ <&reset RESET_VENCL>, ++ <&reset RESET_VID_LOCK>; ++ reset-names = "viu", "venc", "vcbus", ++ "vencl", "vid_lock"; ++ clocks = <&clkc CLKID_VPU>, ++ <&clkc CLKID_VAPB>; ++ clock-names = "vpu", "vapb"; ++ /* ++ * VPU clocking is provided by two identical clock paths ++ * VPU_0 and VPU_1 muxed to a single clock by a glitch ++ * free mux to safely change frequency while running. ++ * Same for VAPB but with a final gate after the glitch free mux. ++ */ ++ assigned-clocks = <&clkc CLKID_VPU_0_SEL>, ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_VPU>, /* Glitch free mux */ ++ <&clkc CLKID_VAPB_0_SEL>, ++ <&clkc CLKID_VAPB_0>, ++ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ ++ assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VAPB_0>; ++ assigned-clock-rates = <0>, /* Do Nothing */ ++ <250000000>, ++ <0>, /* Do Nothing */ ++ <0>, /* Do Nothing */ ++ <250000000>, ++ <0>; /* Do Nothing */ ++ }; ++ ++ mipi_pcie_analog_dphy: phy { ++ compatible = "amlogic,axg-mipi-pcie-analog-phy"; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; + }; + }; + +@@ -1129,6 +1278,19 @@ + #mbox-cells = <1>; + }; + ++ mipi_dphy: phy@ff640000 { ++ compatible = "amlogic,axg-mipi-dphy"; ++ reg = <0x0 0xff640000 0x0 0x100>; ++ clocks = <&clkc CLKID_MIPI_DSI_PHY>; ++ clock-names = "pclk"; ++ resets = <&reset RESET_MIPI_PHY>; ++ reset-names = "phy"; ++ phys = <&mipi_pcie_analog_dphy>; ++ phy-names = "analog"; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ + audio: bus@ff642000 { + compatible = "simple-bus"; + reg = <0x0 0xff642000 0x0 0x2000>; +@@ -1563,6 +1725,14 @@ + }; + }; + ++ ge2d: ge2d@ff940000 { ++ compatible = "amlogic,axg-ge2d"; ++ reg = <0x0 0xff940000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clkc CLKID_VAPB>; ++ resets = <&reset RESET_GE2D>; ++ }; ++ + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, +@@ -1701,6 +1871,7 @@ + status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; ++ fifo-size = <128>; + }; + }; + +@@ -1734,6 +1905,16 @@ + clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_C>; + }; ++ ++ usb2_phy1: phy@9020 { ++ compatible = "amlogic,meson-gxl-usb2-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x9020 0x0 0x20>; ++ clocks = <&clkc CLKID_USB>; ++ clock-names = "phy"; ++ resets = <&reset RESET_USB_OTG>; ++ reset-names = "phy"; ++ }; + }; + + sram: sram@fffc0000 { +diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi +index 1e83ec5b8c..00c6f53290 100644 +--- a/arch/arm/dts/meson-g12-common.dtsi ++++ b/arch/arm/dts/meson-g12-common.dtsi +@@ -17,6 +17,12 @@ + #address-cells = <2>; + #size-cells = <2>; + ++ aliases { ++ mmc0 = &sd_emmc_b; /* SD card */ ++ mmc1 = &sd_emmc_c; /* eMMC */ ++ mmc2 = &sd_emmc_a; /* SDIO */ ++ }; ++ + chosen { + #address-cells = <2>; + #size-cells = <2>; +@@ -122,9 +128,9 @@ + + pcie: pcie@fc000000 { + compatible = "amlogic,g12a-pcie", "snps,dw-pcie"; +- reg = <0x0 0xfc000000 0x0 0x400000 +- 0x0 0xff648000 0x0 0x2000 +- 0x0 0xfc400000 0x0 0x200000>; ++ reg = <0x0 0xfc000000 0x0 0x400000>, ++ <0x0 0xff648000 0x0 0x2000>, ++ <0x0 0xfc400000 0x0 0x200000>; + reg-names = "elbi", "cfg", "config"; + interrupts = ; + #interrupt-cells = <1>; +@@ -134,8 +140,8 @@ + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; +- ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000 +- 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; ++ ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>, ++ <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; + + clocks = <&clkc CLKID_PCIE_PHY + &clkc CLKID_PCIE_COMB +@@ -209,7 +215,7 @@ + }; + + ethmac: ethernet@ff3f0000 { +- compatible = "amlogic,meson-axg-dwmac", ++ compatible = "amlogic,meson-g12a-dwmac", + "snps,dwmac-3.70a", + "snps,dwmac"; + reg = <0x0 0xff3f0000 0x0 0x10000>, +@@ -282,6 +288,8 @@ + hwrng: rng@218 { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x218 0x0 0x4>; ++ clocks = <&clkc CLKID_RNG0>; ++ clock-names = "core"; + }; + }; + +@@ -2001,7 +2009,7 @@ + }; + }; + +- vrtc: rtc@0a8 { ++ vrtc: rtc@a8 { + compatible = "amlogic,meson-vrtc"; + reg = <0x0 0x000a8 0x0 0x4>; + }; +@@ -2179,6 +2187,12 @@ + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; + }; + ++ watchdog: watchdog@f0d0 { ++ compatible = "amlogic,meson-gxbb-wdt"; ++ reg = <0x0 0xf0d0 0x0 0x10>; ++ clocks = <&xtal>; ++ }; ++ + spicc0: spi@13000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x13000 0x0 0x44>; +@@ -2303,6 +2317,7 @@ + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; ++ fifo-size = <128>; + }; + }; + +@@ -2380,7 +2395,7 @@ + interrupts = ; + dr_mode = "host"; + snps,dis_u2_susphy_quirk; +- snps,quirk-frame-length-adjustment; ++ snps,quirk-frame-length-adjustment = <0x20>; + snps,parkmode-disable-ss-quirk; + }; + }; +diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts +index b00d0468c7..81269ccc24 100644 +--- a/arch/arm/dts/meson-g12a-sei510.dts ++++ b/arch/arm/dts/meson-g12a-sei510.dts +@@ -181,7 +181,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12A-SEI510"; ++ model = "SEI510"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, + <&tdmin_a>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", +diff --git a/arch/arm/dts/meson-g12b-gsking-x.dts b/arch/arm/dts/meson-g12b-gsking-x.dts +new file mode 100644 +index 0000000000..6c7bfacbad +--- /dev/null ++++ b/arch/arm/dts/meson-g12b-gsking-x.dts +@@ -0,0 +1,133 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS ++ * Author: Neil Armstrong ++ * Copyright (c) 2019 Christian Hewitt ++ */ ++ ++/dts-v1/; ++ ++#include "meson-g12b-w400.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "azw,gsking-x", "amlogic,s922x", "amlogic,g12b"; ++ model = "Beelink GS-King X"; ++ ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ poll-interval = <100>; ++ ++ power-button { ++ label = "power"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "GSKING-X"; ++ audio-aux-devs = <&tdmout_a>; ++ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_A IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_A IN 2", "FRDDR_C OUT 1", ++ "TDM_A Playback", "TDMOUT_A OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-3 { ++ sound-dai = <&tdmif_a>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ ++&tdmif_a { ++ status = "okay"; ++}; ++ ++&tdmout_a { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts +index f0c56a16af..707daf9278 100644 +--- a/arch/arm/dts/meson-g12b-gtking-pro.dts ++++ b/arch/arm/dts/meson-g12b-gtking-pro.dts +@@ -11,9 +11,14 @@ + #include + + / { +- compatible = "azw,gtking", "amlogic,g12b"; ++ compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b"; + model = "Beelink GT-King Pro"; + ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; +@@ -30,7 +35,7 @@ + leds { + compatible = "gpio-leds"; + +- white { ++ led-white { + label = "power:white"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + default-state = "on"; +@@ -39,7 +44,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-GTKING-PRO"; ++ model = "GTKING-PRO"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +@@ -112,6 +117,18 @@ + status = "okay"; + }; + ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &tdmif_b { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts +index eeb7bc5539..5d96c14490 100644 +--- a/arch/arm/dts/meson-g12b-gtking.dts ++++ b/arch/arm/dts/meson-g12b-gtking.dts +@@ -11,9 +11,14 @@ + #include + + / { +- compatible = "azw,gtking", "amlogic,g12b"; ++ compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b"; + model = "Beelink GT-King"; + ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ + spdif_dit: audio-codec-1 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; +@@ -23,7 +28,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-GTKING"; ++ model = "GTKING"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +@@ -122,6 +127,19 @@ + status = "okay"; + }; + ++ ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &spdifout { + pinctrl-0 = <&spdif_out_h_pins>; + pinctrl-names = "default"; +diff --git a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts +index 5de2815ba9..ce1198ad34 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts ++++ b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts +@@ -19,7 +19,7 @@ + regulator-min-microvolt = <680000>; + regulator-max-microvolt = <1040000>; + +- pwms = <&pwm_AO_cd 1 1500 0>; ++ pwms = <&pwm_ab 0 1500 0>; + }; + + &vddcpu_b { +diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dtsi b/arch/arm/dts/meson-g12b-odroid-n2.dtsi +index 6982632ae6..344573e157 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2.dtsi ++++ b/arch/arm/dts/meson-g12b-odroid-n2.dtsi +@@ -13,6 +13,8 @@ + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; ++ rtc0 = &rtc; ++ rtc1 = &vrtc; + }; + + dioo2133: audio-amplifier-0 { +@@ -40,7 +42,7 @@ + leds { + compatible = "gpio-leds"; + +- blue { ++ led-blue { + label = "n2:blue"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; +@@ -211,7 +213,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-ODROID-N2"; ++ model = "ODROID-N2"; + audio-widgets = "Line", "Lineout"; + audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>, + <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>, +@@ -408,12 +410,12 @@ + + &ext_mdio { + external_phy: ethernet-phy@0 { +- /* Realtek RTL8211F (0x001cc916) */ ++ /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; +@@ -444,13 +446,58 @@ + }; + + &gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOH */ ++ "", "", "", "", "", "", "", "", ++ "", ++ /* BOOT */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOC */ ++ "", "", "", "", "", "", "", "", ++ /* GPIOA */ ++ "PIN_44", /* GPIOA_0 */ ++ "PIN_46", /* GPIOA_1 */ ++ "PIN_45", /* GPIOA_2 */ ++ "PIN_47", /* GPIOA_3 */ ++ "PIN_26", /* GPIOA_4 */ ++ "", "", "", "", "", "", ++ "PIN_42", /* GPIOA_11 */ ++ "PIN_32", /* GPIOA_12 */ ++ "PIN_7", /* GPIOA_13 */ ++ "PIN_27", /* GPIOA_14 */ ++ "PIN_28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "PIN_16", /* GPIOX_0 */ ++ "PIN_18", /* GPIOX_1 */ ++ "PIN_22", /* GPIOX_2 */ ++ "PIN_11", /* GPIOX_3 */ ++ "PIN_13", /* GPIOX_4 */ ++ "PIN_33", /* GPIOX_5 */ ++ "PIN_35", /* GPIOX_6 */ ++ "PIN_15", /* GPIOX_7 */ ++ "PIN_19", /* GPIOX_8 */ ++ "PIN_21", /* GPIOX_9 */ ++ "PIN_24", /* GPIOX_10 */ ++ "PIN_23", /* GPIOX_11 */ ++ "PIN_8", /* GPIOX_12 */ ++ "PIN_10", /* GPIOX_13 */ ++ "PIN_29", /* GPIOX_14 */ ++ "PIN_31", /* GPIOX_15 */ ++ "PIN_12", /* GPIOX_16 */ ++ "PIN_3", /* GPIOX_17 */ ++ "PIN_5", /* GPIOX_18 */ ++ "PIN_36"; /* GPIOX_19 */ + /* + * WARNING: The USB Hub on the Odroid-N2 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +@@ -478,6 +525,18 @@ + linux,rc-map-name = "rc-odroid"; + }; + ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &pwm_ab { + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; +@@ -494,6 +553,11 @@ + status = "okay"; + }; + ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ + /* SD card */ + &sd_emmc_b { + status = "okay"; +diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi +index 2802ddbb83..feb0885047 100644 +--- a/arch/arm/dts/meson-g12b-w400.dtsi ++++ b/arch/arm/dts/meson-g12b-w400.dtsi +@@ -264,7 +264,7 @@ + max-speed = <1000>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; +diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi +index 9b8548e5f6..ee8fcae9f9 100644 +--- a/arch/arm/dts/meson-g12b.dtsi ++++ b/arch/arm/dts/meson-g12b.dtsi +@@ -135,3 +135,7 @@ + }; + }; + }; ++ ++&mali { ++ dma-coherent; ++}; +diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi +index c2480bab8d..2d7032f41e 100644 +--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi ++++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi +@@ -186,7 +186,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S9XX-PC"; ++ model = "LIBRETECH-PC"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Speaker", "7J4-14 LEFT", + "Speaker", "7J4-11 RIGHT"; +diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi +index 6b57e15aad..dafc841f7c 100644 +--- a/arch/arm/dts/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm/dts/meson-gx-p23x-q20x.dtsi +@@ -121,7 +121,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GX-P230-Q200"; ++ model = "P230-Q200"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Line", "Lineout"; + audio-routing = "AU2 INL", "ACODEC LOLP", +diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi +index 0edd137151..6b457b2c30 100644 +--- a/arch/arm/dts/meson-gx.dtsi ++++ b/arch/arm/dts/meson-gx.dtsi +@@ -20,6 +20,12 @@ + #address-cells = <2>; + #size-cells = <2>; + ++ aliases { ++ mmc0 = &sd_emmc_b; /* SD card */ ++ mmc1 = &sd_emmc_c; /* eMMC */ ++ mmc2 = &sd_emmc_a; /* SDIO */ ++ }; ++ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; +@@ -295,6 +301,7 @@ + reg = <0x0 0x84c0 0x0 0x18>; + interrupts = ; + status = "disabled"; ++ fifo-size = <128>; + }; + + uart_B: serial@84dc { +diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +index 7be3e35409..7273eed529 100644 +--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +@@ -7,6 +7,7 @@ + + #include "meson-gxbb.dtsi" + #include ++#include + + / { + compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; +@@ -130,6 +131,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "NANOPI-K2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -165,7 +205,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts +index 70fcfb7b06..201596247f 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2.dts ++++ b/arch/arm/dts/meson-gxbb-odroidc2.dts +@@ -9,6 +9,7 @@ + + #include "meson-gxbb.dtsi" + #include ++#include + + / { + compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; +@@ -172,6 +173,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "ODROID-C2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -200,7 +240,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +@@ -217,7 +257,7 @@ + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +index 9e43f4dca9..2d769203f6 100644 +--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts ++++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +@@ -118,7 +118,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S805X-AC"; ++ model = "LIBRETECH-AC"; + audio-widgets = "Speaker", "9J5-3 LEFT", + "Speaker", "9J5-2 RIGHT"; + audio-routing = "9J5-3 LEFT", "ACODEC LOLN", +diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +index 8bcdffdf55..60feac0179 100644 +--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +@@ -5,9 +5,9 @@ + + /dts-v1/; + +-#include +- + #include "meson-gxl-s905x-p212.dtsi" ++#include ++#include + + / { + compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl"; +@@ -42,10 +42,10 @@ + }; + }; + +- pwmleds { ++ led-controller { + compatible = "pwm-leds"; + +- power { ++ led-1 { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; +@@ -63,6 +63,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "KHADAS-VIM"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -97,8 +136,7 @@ + pinctrl-names = "default"; + + rtc: rtc@51 { +- /* has to be enabled manually when a battery is connected: */ +- status = "disabled"; ++ status = "okay"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +index 675eaa8796..93d8f8aff7 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +@@ -84,7 +84,6 @@ + regulator-always-on; + }; + +- + vcck: regulator-vcck { + compatible = "regulator-fixed"; + regulator-name = "VCCK"; +@@ -124,7 +123,6 @@ + regulator-always-on; + }; + +- + vddio_card: regulator-vddio-card { + compatible = "regulator-gpio"; + regulator-name = "VDDIO_CARD"; +@@ -161,7 +159,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S905X-CC-V2"; ++ model = "LIBRETECH-CC-V2"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; +@@ -195,7 +193,6 @@ + }; + }; + +- + &aiu { + status = "okay"; + }; +@@ -207,7 +204,6 @@ + hdmi-phandle = <&hdmi_tx>; + }; + +- + ðmac { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +index 5ae7bb6209..82bfabfbd3 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +@@ -135,7 +135,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S905X-CC"; ++ model = "LIBRETECH-CC"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Line", "Lineout"; + audio-routing = "AU2 INL", "ACODEC LOLN", +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts +index bff8ec2c1c..18a4b7a6c5 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts ++++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts +@@ -7,9 +7,9 @@ + + /dts-v1/; + +-#include +- + #include "meson-gxm.dtsi" ++#include ++#include + + / { + compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; +@@ -81,10 +81,10 @@ + }; + }; + +- pwmleds { ++ led-controller { + compatible = "pwm-leds"; + +- power { ++ led-1 { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; +@@ -145,6 +145,45 @@ + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "KHADAS-VIM2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -154,7 +193,6 @@ + hdmi-phandle = <&hdmi_tx>; + }; + +- + &cpu_cooling_maps { + map0 { + cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; +@@ -194,7 +232,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +@@ -228,8 +266,7 @@ + pinctrl-names = "default"; + + rtc: rtc@51 { +- /* has to be enabled manually when a battery is connected: */ +- status = "disabled"; ++ status = "okay"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +@@ -341,7 +378,7 @@ + #size-cells = <1>; + compatible = "winbond,w25q16", "jedec,spi-nor"; + reg = <0>; +- spi-max-frequency = <3000000>; ++ spi-max-frequency = <104000000>; + }; + }; + +diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts +index ec794c134c..1e7f77f9b5 100644 +--- a/arch/arm/dts/meson-gxm-wetek-core2.dts ++++ b/arch/arm/dts/meson-gxm-wetek-core2.dts +@@ -22,7 +22,7 @@ + leds { + compatible = "gpio-leds"; + +- blue { ++ led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi +index fe41451122..411cc312fc 100644 +--- a/arch/arm/dts/meson-gxm.dtsi ++++ b/arch/arm/dts/meson-gxm.dtsi +@@ -42,11 +42,28 @@ + }; + }; + ++ cpu0: cpu@0 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu1: cpu@1 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu2: cpu@2 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu3: cpu@3 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x100>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -57,6 +74,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x101>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -67,6 +85,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x102>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -77,6 +96,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x103>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi +index 7b46555ac5..3cf4ecb6d5 100644 +--- a/arch/arm/dts/meson-khadas-vim3.dtsi ++++ b/arch/arm/dts/meson-khadas-vim3.dtsi +@@ -6,6 +6,7 @@ + */ + + #include ++#include + #include + #include + +@@ -13,6 +14,8 @@ + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; ++ rtc0 = &rtc; ++ rtc1 = &vrtc; + }; + + chosen { +@@ -41,13 +44,15 @@ + compatible = "gpio-leds"; + + led-white { +- label = "vim3:white:sys"; ++ color = ; ++ function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-red { +- label = "vim3:red"; ++ color = ; ++ function = LED_FUNCTION_STATUS; + gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>; + }; + }; +@@ -165,12 +170,17 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-KHADAS-VIM3"; +- audio-aux-devs = <&tdmout_a>; ++ model = "KHADAS-VIM3"; ++ audio-aux-devs = <&tdmin_a>, <&tdmout_a>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", +- "TDM_A Playback", "TDMOUT_A OUT"; ++ "TDM_A Playback", "TDMOUT_A OUT", ++ "TDMIN_A IN 0", "TDM_A Capture", ++ "TDMIN_A IN 3", "TDM_A Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, +@@ -193,8 +203,20 @@ + sound-dai = <&frddr_c>; + }; + +- /* 8ch hdmi interface */ + dai-link-3 { ++ sound-dai = <&toddr_a>; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&toddr_b>; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&toddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-6 { + sound-dai = <&tdmif_a>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; +@@ -209,7 +231,7 @@ + }; + + /* hdmi glue */ +- dai-link-4 { ++ dai-link-7 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { +@@ -278,12 +300,12 @@ + }; + + ðmac { +- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; +- pinctrl-names = "default"; +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <&external_phy>; +- amlogic,tx-delay-ns = <2>; ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; + }; + + &frddr_a { +@@ -330,7 +352,7 @@ + #gpio-cells = <2>; + }; + +- rtc@51 { ++ rtc: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +@@ -349,9 +371,9 @@ + }; + + &pwm_ef { +- status = "okay"; +- pinctrl-0 = <&pwm_e_pins>; +- pinctrl-names = "default"; ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; + }; + + &saradc { +@@ -445,15 +467,30 @@ + }; + }; + +- + &tdmif_a { + status = "okay"; + }; + ++&tdmin_a { ++ status = "okay"; ++}; ++ + &tdmout_a { + status = "okay"; + }; + ++&toddr_a { ++ status = "okay"; ++}; ++ ++&toddr_b { ++ status = "okay"; ++}; ++ ++&toddr_c { ++ status = "okay"; ++}; ++ + &tohdmitx { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts +new file mode 100644 +index 0000000000..effaa138b5 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-bananapi-m5.dts +@@ -0,0 +1,646 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 BayLibre SAS ++ * Author: Neil Armstrong ++ */ ++ ++/dts-v1/; ++ ++#include "meson-sm1.dtsi" ++#include ++#include ++#include ++#include ++#include ++ ++/ { ++ compatible = "bananapi,bpi-m5", "amlogic,sm1"; ++ model = "Banana Pi BPI-M5"; ++ ++ adc_keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 2>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ ++ key { ++ label = "SW3"; ++ linux,code = ; ++ press-threshold-microvolt = <1700000>; ++ }; ++ }; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ /* TOFIX: handle CVBS_DET on SARADC channel 0 */ ++ cvbs-connector { ++ compatible = "composite-video-connector"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ key { ++ label = "SW1"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <3 IRQ_TYPE_EDGE_BOTH>; ++ }; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ green { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ emmc_1v8: regulator-emmc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "EMMC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ dc_in: regulator-dc_in { ++ compatible = "regulator-fixed"; ++ regulator-name = "DC_IN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vddio_c: regulator-vddio_c { ++ compatible = "regulator-gpio"; ++ regulator-name = "VDDIO_C"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ ++ gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; ++ gpios-states = <1>; ++ ++ states = <1800000 0>, ++ <3300000 1>; ++ }; ++ ++ tflash_vdd: regulator-tflash_vdd { ++ compatible = "regulator-fixed"; ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_in>; ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_in>; ++ regulator-always-on; ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ /* ++ * SY8120B1ABC DC/DC Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <690000>; ++ regulator-max-microvolt = <1050000>; ++ ++ vin-supply = <&dc_in>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ /* USB Hub Power Enable */ ++ vl_pwr_en: regulator-vl_pwr_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "VL_PWR_EN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_in>; ++ ++ gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "BPI-M5"; ++ audio-widgets = "Line", "Lineout"; ++ audio-aux-devs = <&tdmout_b>, <&tdmout_c>, ++ <&tdmin_a>, <&tdmin_b>, <&tdmin_c>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT", ++ "TDMOUT_C IN 0", "FRDDR_A OUT 2", ++ "TDMOUT_C IN 1", "FRDDR_B OUT 2", ++ "TDMOUT_C IN 2", "FRDDR_C OUT 2", ++ "TDM_C Playback", "TDMOUT_C OUT", ++ "TDMIN_A IN 4", "TDM_B Loopback", ++ "TDMIN_B IN 4", "TDM_B Loopback", ++ "TDMIN_C IN 4", "TDM_B Loopback", ++ "TDMIN_A IN 5", "TDM_C Loopback", ++ "TDMIN_B IN 5", "TDM_C Loopback", ++ "TDMIN_C IN 5", "TDM_C Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT", ++ "TODDR_A IN 1", "TDMIN_B OUT", ++ "TODDR_B IN 1", "TDMIN_B OUT", ++ "TODDR_C IN 1", "TDMIN_B OUT", ++ "TODDR_A IN 2", "TDMIN_C OUT", ++ "TODDR_B IN 2", "TDMIN_C OUT", ++ "TODDR_C IN 2", "TDMIN_C OUT", ++ "Lineout", "ACODEC LOLP", ++ "Lineout", "ACODEC LORP"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&toddr_a>; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&toddr_b>; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&toddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-6 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&toacodec TOACODEC_IN_B>; ++ }; ++ }; ++ ++ /* i2s jack output interface */ ++ dai-link-7 { ++ sound-dai = <&tdmif_c>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&toacodec TOACODEC_IN_C>; ++ }; ++ }; ++ ++ /* hdmi glue */ ++ dai-link-8 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ ++ /* acodec glue */ ++ dai-link-9 { ++ sound-dai = <&toacodec TOACODEC_OUT>; ++ ++ codec { ++ sound-dai = <&acodec>; ++ }; ++ }; ++ }; ++}; ++ ++&acodec { ++ AVDD-supply = <&vddao_1v8>; ++ status = "okay"; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU1_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU2_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU3_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ ++&ext_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_14 */ ++ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii-txid"; ++ phy-handle = <&external_phy>; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "ETH_MDIO", /* GPIOZ_0 */ ++ "ETH_MDC", /* GPIOZ_1 */ ++ "ETH_RXCLK", /* GPIOZ_2 */ ++ "ETH_RX_DV", /* GPIOZ_3 */ ++ "ETH_RXD0", /* GPIOZ_4 */ ++ "ETH_RXD1", /* GPIOZ_5 */ ++ "ETH_RXD2", /* GPIOZ_6 */ ++ "ETH_RXD3", /* GPIOZ_7 */ ++ "ETH_TXCLK", /* GPIOZ_8 */ ++ "ETH_TXEN", /* GPIOZ_9 */ ++ "ETH_TXD0", /* GPIOZ_10 */ ++ "ETH_TXD1", /* GPIOZ_11 */ ++ "ETH_TXD2", /* GPIOZ_12 */ ++ "ETH_TXD3", /* GPIOZ_13 */ ++ "ETH_INTR", /* GPIOZ_14 */ ++ "ETH_NRST", /* GPIOZ_15 */ ++ /* GPIOH */ ++ "HDMI_SDA", /* GPIOH_0 */ ++ "HDMI_SCL", /* GPIOH_1 */ ++ "HDMI_HPD", /* GPIOH_2 */ ++ "HDMI_CEC", /* GPIOH_3 */ ++ "VL-RST_N", /* GPIOH_4 */ ++ "CON1-P36", /* GPIOH_5 */ ++ "VL-PWREN", /* GPIOH_6 */ ++ "WiFi_3V3_1V8", /* GPIOH_7 */ ++ "TFLASH_VDD_EN", /* GPIOH_8 */ ++ /* BOOT */ ++ "eMMC_D0", /* BOOT_0 */ ++ "eMMC_D1", /* BOOT_1 */ ++ "eMMC_D2", /* BOOT_2 */ ++ "eMMC_D3", /* BOOT_3 */ ++ "eMMC_D4", /* BOOT_4 */ ++ "eMMC_D5", /* BOOT_5 */ ++ "eMMC_D6", /* BOOT_6 */ ++ "eMMC_D7", /* BOOT_7 */ ++ "eMMC_CLK", /* BOOT_8 */ ++ "", ++ "eMMC_CMD", /* BOOT_10 */ ++ "", ++ "eMMC_RST#", /* BOOT_12 */ ++ "eMMC_DS", /* BOOT_13 */ ++ /* GPIOC */ ++ "SD_D0_B", /* GPIOC_0 */ ++ "SD_D1_B", /* GPIOC_1 */ ++ "SD_D2_B", /* GPIOC_2 */ ++ "SD_D3_B", /* GPIOC_3 */ ++ "SD_CLK_B", /* GPIOC_4 */ ++ "SD_CMD_B", /* GPIOC_5 */ ++ "CARD_EN_DET", /* GPIOC_6 */ ++ "", ++ /* GPIOA */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", ++ "CON1-P27", /* GPIOA_14 */ ++ "CON1-P28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "CON1-P16", /* GPIOX_0 */ ++ "CON1-P18", /* GPIOX_1 */ ++ "CON1-P22", /* GPIOX_2 */ ++ "CON1-P11", /* GPIOX_3 */ ++ "CON1-P13", /* GPIOX_4 */ ++ "CON1-P07", /* GPIOX_5 */ ++ "CON1-P33", /* GPIOX_6 */ ++ "CON1-P15", /* GPIOX_7 */ ++ "CON1-P19", /* GPIOX_8 */ ++ "CON1-P21", /* GPIOX_9 */ ++ "CON1-P24", /* GPIOX_10 */ ++ "CON1-P23", /* GPIOX_11 */ ++ "CON1-P08", /* GPIOX_12 */ ++ "CON1-P10", /* GPIOX_13 */ ++ "CON1-P29", /* GPIOX_14 */ ++ "CON1-P31", /* GPIOX_15 */ ++ "CON1-P26", /* GPIOX_16 */ ++ "CON1-P03", /* GPIOX_17 */ ++ "CON1-P05", /* GPIOX_18 */ ++ "CON1-P32"; /* GPIOX_19 */ ++ ++ /* ++ * WARNING: The USB Hub on the BPI-M5 needs a reset signal ++ * to be turned high in order to be detected by the USB Controller ++ * This signal should be handled by a USB specific power sequence ++ * in order to reset the Hub when USB bus is powered down. ++ */ ++ usb-hub { ++ gpio-hog; ++ gpios = ; ++ output-high; ++ line-name = "usb-hub-reset"; ++ }; ++}; ++ ++&gpio_ao { ++ gpio-line-names = ++ /* GPIOAO */ ++ "DEBUG TX", /* GPIOAO_0 */ ++ "DEBUG RX", /* GPIOAO_1 */ ++ "SYS_LED2", /* GPIOAO_2 */ ++ "UPDATE_KEY", /* GPIOAO_3 */ ++ "CON1-P40", /* GPIOAO_4 */ ++ "IR_IN", /* GPIOAO_5 */ ++ "TF_3V3N_1V8_EN", /* GPIOAO_6 */ ++ "CON1-P35", /* GPIOAO_7 */ ++ "CON1-P12", /* GPIOAO_8 */ ++ "CON1-P37", /* GPIOAO_9 */ ++ "CON1-P38", /* GPIOAO_10 */ ++ "SYS_LED", /* GPIOAO_11 */ ++ /* GPIOE */ ++ "VDDEE_PWM", /* GPIOE_0 */ ++ "VDDCPU_PWM", /* GPIOE_1 */ ++ "TF_PWR_EN"; /* GPIOE_2 */ ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&dc_in>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ disable-wp; ++ ++ /* TOFIX: SD card is barely usable in SDR modes */ ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&vddio_c>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&emmc_1v8>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmif_c { ++ status = "okay"; ++}; ++ ++&tdmin_a { ++ status = "okay"; ++}; ++ ++&tdmin_b { ++ status = "okay"; ++}; ++ ++&tdmin_c { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&tdmout_c { ++ status = "okay"; ++}; ++ ++&toacodec { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ ++&toddr_a { ++ status = "okay"; ++}; ++ ++&toddr_b { ++ status = "okay"; ++}; ++ ++&toddr_c { ++ status = "okay"; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++}; ++ ++&usb2_phy0 { ++ phy-supply = <&dc_in>; ++}; ++ ++&usb2_phy1 { ++ /* Enable the hub which is connected to this port */ ++ phy-supply = <&vl_pwr_en>; ++}; +diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +index 4b517ca720..f2c0981435 100644 +--- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts ++++ b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +@@ -32,6 +32,19 @@ + regulator-boot-on; + regulator-always-on; + }; ++ ++ sound { ++ model = "G12B-KHADAS-VIM3L"; ++ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", ++ "TDMOUT_A IN 1", "FRDDR_B OUT 0", ++ "TDMOUT_A IN 2", "FRDDR_C OUT 0", ++ "TDM_A Playback", "TDMOUT_A OUT", ++ "TDMIN_A IN 0", "TDM_A Capture", ++ "TDMIN_A IN 13", "TDM_A Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT"; ++ }; + }; + + &cpu0 { +@@ -89,13 +102,12 @@ + status = "okay"; + }; + +-&sd_emmc_a { +- sd-uhs-sdr50; +-}; +- + &usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; + }; + */ + ++&sd_emmc_a { ++ sd-uhs-sdr50; ++}; +diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts +index cf5a98f0e4..8c30ce6368 100644 +--- a/arch/arm/dts/meson-sm1-odroid-c4.dts ++++ b/arch/arm/dts/meson-sm1-odroid-c4.dts +@@ -5,34 +5,12 @@ + + /dts-v1/; + +-#include "meson-sm1.dtsi" +-#include +-#include +-#include ++#include "meson-sm1-odroid.dtsi" + + / { + compatible = "hardkernel,odroid-c4", "amlogic,sm1"; + model = "Hardkernel ODROID-C4"; + +- aliases { +- serial0 = &uart_AO; +- ethernet0 = ðmac; +- }; +- +- chosen { +- stdout-path = "serial0:115200n8"; +- }; +- +- memory@0 { +- device_type = "memory"; +- reg = <0x0 0x0 0x0 0x40000000>; +- }; +- +- emmc_pwrseq: emmc-pwrseq { +- compatible = "mmc-pwrseq-emmc"; +- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; +- }; +- + leds { + compatible = "gpio-leds"; + +@@ -45,324 +23,19 @@ + }; + }; + +- tflash_vdd: regulator-tflash_vdd { +- compatible = "regulator-fixed"; +- +- regulator-name = "TFLASH_VDD"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- +- gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- regulator-always-on; +- }; +- +- tf_io: gpio-regulator-tf_io { +- compatible = "regulator-gpio"; +- +- regulator-name = "TF_IO"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- +- gpios = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>; +- gpios-states = <0>; +- +- states = <3300000 0>, +- <1800000 1>; +- }; +- +- flash_1v8: regulator-flash_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "FLASH_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vcc_3v3>; +- regulator-always-on; +- }; +- +- main_12v: regulator-main_12v { +- compatible = "regulator-fixed"; +- regulator-name = "12V"; +- regulator-min-microvolt = <12000000>; +- regulator-max-microvolt = <12000000>; +- regulator-always-on; +- }; +- +- vcc_5v: regulator-vcc_5v { +- compatible = "regulator-fixed"; +- regulator-name = "5V"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- vin-supply = <&main_12v>; +- }; +- +- vcc_1v8: regulator-vcc_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "VCC_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vcc_3v3>; +- regulator-always-on; +- }; +- +- vcc_3v3: regulator-vcc_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "VCC_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vddao_3v3>; +- regulator-always-on; +- /* FIXME: actually controlled by VDDCPU_B_EN */ +- }; +- +- vddcpu: regulator-vddcpu { +- /* +- * MP8756GD Regulator. +- */ +- compatible = "pwm-regulator"; +- +- regulator-name = "VDDCPU"; +- regulator-min-microvolt = <721000>; +- regulator-max-microvolt = <1022000>; +- +- vin-supply = <&main_12v>; +- +- pwms = <&pwm_AO_cd 1 1250 0>; +- pwm-dutycycle-range = <100 0>; +- +- regulator-boot-on; +- regulator-always-on; +- }; +- +- hub_5v: regulator-hub_5v { +- compatible = "regulator-fixed"; +- regulator-name = "HUB_5V"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc_5v>; +- +- /* Connected to the Hub CHIPENABLE, LOW sets low power state */ +- gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- }; +- +- usb_pwr_en: regulator-usb_pwr_en { +- compatible = "regulator-fixed"; +- regulator-name = "USB_PWR_EN"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc_5v>; +- +- /* Connected to the microUSB port power enable */ +- gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- }; +- +- vddao_1v8: regulator-vddao_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "VDDAO_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vddao_3v3>; +- regulator-always-on; +- }; +- +- vddao_3v3: regulator-vddao_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "VDDAO_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&main_12v>; +- regulator-always-on; +- }; +- +- hdmi-connector { +- compatible = "hdmi-connector"; +- type = "a"; +- +- port { +- hdmi_connector_in: endpoint { +- remote-endpoint = <&hdmi_tx_tmds_out>; +- }; +- }; +- }; +- + sound { +- compatible = "amlogic,axg-sound-card"; +- model = "SM1-ODROID-C4"; +- audio-aux-devs = <&tdmout_b>; +- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", +- "TDMOUT_B IN 1", "FRDDR_B OUT 1", +- "TDMOUT_B IN 2", "FRDDR_C OUT 1", +- "TDM_B Playback", "TDMOUT_B OUT"; +- +- assigned-clocks = <&clkc CLKID_MPLL2>, +- <&clkc CLKID_MPLL0>, +- <&clkc CLKID_MPLL1>; +- assigned-clock-parents = <0>, <0>, <0>; +- assigned-clock-rates = <294912000>, +- <270950400>, +- <393216000>; +- status = "okay"; +- +- dai-link-0 { +- sound-dai = <&frddr_a>; +- }; +- +- dai-link-1 { +- sound-dai = <&frddr_b>; +- }; +- +- dai-link-2 { +- sound-dai = <&frddr_c>; +- }; +- +- /* 8ch hdmi interface */ +- dai-link-3 { +- sound-dai = <&tdmif_b>; +- dai-format = "i2s"; +- dai-tdm-slot-tx-mask-0 = <1 1>; +- dai-tdm-slot-tx-mask-1 = <1 1>; +- dai-tdm-slot-tx-mask-2 = <1 1>; +- dai-tdm-slot-tx-mask-3 = <1 1>; +- mclk-fs = <256>; +- +- codec { +- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; +- }; +- }; +- +- /* hdmi glue */ +- dai-link-4 { +- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; +- +- codec { +- sound-dai = <&hdmi_tx>; +- }; +- }; +- }; +-}; +- +-&arb { +- status = "okay"; +-}; +- +-&clkc_audio { +- status = "okay"; +-}; +- +-&cpu0 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu1 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU1_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu2 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU2_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu3 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU3_CLK>; +- clock-latency = <50000>; +-}; +- +-&ext_mdio { +- external_phy: ethernet-phy@0 { +- /* Realtek RTL8211F (0x001cc916) */ +- reg = <0>; +- max-speed = <1000>; +- +- interrupt-parent = <&gpio_intc>; +- /* MAC_INTR on GPIOZ_14 */ +- interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ model = "ODROID-C4"; + }; + }; + +-ðmac { +- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; +- pinctrl-names = "default"; +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <&external_phy>; +- amlogic,tx-delay-ns = <2>; +-}; +- +-&frddr_a { +- status = "okay"; +-}; +- +-&frddr_b { +- status = "okay"; +-}; +- +-&frddr_c { +- status = "okay"; +-}; +- + &gpio { +- gpio-line-names = +- /* GPIOZ */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", +- /* GPIOH */ +- "", "", "", "", "", +- "PIN_36", /* GPIOH_5 */ +- "PIN_26", /* GPIOH_6 */ +- "PIN_32", /* GPIOH_7 */ +- "", +- /* BOOT */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", +- /* GPIOC */ +- "", "", "", "", "", "", "", "", +- /* GPIOA */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", +- "PIN_27", /* GPIOA_14 */ +- "PIN_28", /* GPIOA_15 */ +- /* GPIOX */ +- "PIN_16", /* GPIOX_0 */ +- "PIN_18", /* GPIOX_1 */ +- "PIN_22", /* GPIOX_2 */ +- "PIN_11", /* GPIOX_3 */ +- "PIN_13", /* GPIOX_4 */ +- "PIN_7", /* GPIOX_5 */ +- "PIN_33", /* GPIOX_6 */ +- "PIN_15", /* GPIOX_7 */ +- "PIN_19", /* GPIOX_8 */ +- "PIN_21", /* GPIOX_9 */ +- "PIN_24", /* GPIOX_10 */ +- "PIN_23", /* GPIOX_11 */ +- "PIN_8", /* GPIOX_12 */ +- "PIN_10", /* GPIOX_13 */ +- "PIN_29", /* GPIOX_14 */ +- "PIN_31", /* GPIOX_15 */ +- "PIN_12", /* GPIOX_16 */ +- "PIN_3", /* GPIOX_17 */ +- "PIN_5", /* GPIOX_18 */ +- "PIN_35"; /* GPIOX_19 */ +- + /* + * WARNING: The USB Hub on the Odroid-C4 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +@@ -370,121 +43,6 @@ + }; + }; + +-&gpio_ao { +- gpio-line-names = +- /* GPIOAO */ +- "", "", "", "", +- "PIN_47", /* GPIOAO_4 */ +- "", "", +- "PIN_45", /* GPIOAO_7 */ +- "PIN_46", /* GPIOAO_8 */ +- "PIN_44", /* GPIOAO_9 */ +- "PIN_42", /* GPIOAO_10 */ +- "", +- /* GPIOE */ +- "", "", ""; +-}; +- +-&hdmi_tx { +- status = "okay"; +- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; +- pinctrl-names = "default"; +- hdmi-supply = <&vcc_5v>; +-}; +- +-&hdmi_tx_tmds_port { +- hdmi_tx_tmds_out: endpoint { +- remote-endpoint = <&hdmi_connector_in>; +- }; +-}; +- + &ir { +- status = "okay"; +- pinctrl-0 = <&remote_input_ao_pins>; +- pinctrl-names = "default"; + linux,rc-map-name = "rc-odroid"; + }; +- +-&pwm_AO_cd { +- pinctrl-0 = <&pwm_ao_d_e_pins>; +- pinctrl-names = "default"; +- clocks = <&xtal>; +- clock-names = "clkin1"; +- status = "okay"; +-}; +- +-&saradc { +- status = "okay"; +-}; +- +-/* SD card */ +-&sd_emmc_b { +- status = "okay"; +- pinctrl-0 = <&sdcard_c_pins>; +- pinctrl-1 = <&sdcard_clk_gate_c_pins>; +- pinctrl-names = "default", "clk-gate"; +- +- bus-width = <4>; +- cap-sd-highspeed; +- max-frequency = <200000000>; +- sd-uhs-sdr12; +- sd-uhs-sdr25; +- sd-uhs-sdr50; +- sd-uhs-sdr104; +- disable-wp; +- +- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; +- vmmc-supply = <&tflash_vdd>; +- vqmmc-supply = <&tf_io>; +-}; +- +-/* eMMC */ +-&sd_emmc_c { +- status = "okay"; +- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; +- pinctrl-1 = <&emmc_clk_gate_pins>; +- pinctrl-names = "default", "clk-gate"; +- +- bus-width = <8>; +- cap-mmc-highspeed; +- mmc-ddr-1_8v; +- mmc-hs200-1_8v; +- max-frequency = <200000000>; +- disable-wp; +- +- mmc-pwrseq = <&emmc_pwrseq>; +- vmmc-supply = <&vcc_3v3>; +- vqmmc-supply = <&flash_1v8>; +-}; +- +-&tdmif_b { +- status = "okay"; +-}; +- +-&tdmout_b { +- status = "okay"; +-}; +- +-&tohdmitx { +- status = "okay"; +-}; +- +-&uart_AO { +- status = "okay"; +- pinctrl-0 = <&uart_ao_a_pins>; +- pinctrl-names = "default"; +-}; +- +-&usb { +- status = "okay"; +- vbus-supply = <&usb_pwr_en>; +-}; +- +-&usb2_phy0 { +- phy-supply = <&vcc_5v>; +-}; +- +-&usb2_phy1 { +- /* Enable the hub which is connected to this port */ +- phy-supply = <&hub_5v>; +-}; +diff --git a/arch/arm/dts/meson-sm1-odroid-hc4.dts b/arch/arm/dts/meson-sm1-odroid-hc4.dts +new file mode 100644 +index 0000000000..f3f953225b +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid-hc4.dts +@@ -0,0 +1,140 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Dongjin Kim ++ */ ++ ++/dts-v1/; ++ ++#include "meson-sm1-odroid.dtsi" ++ ++/ { ++ compatible = "hardkernel,odroid-hc4", "amlogic,sm1"; ++ model = "Hardkernel ODROID-HC4"; ++ ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ cooling-levels = <0 120 170 220>; ++ pwms = <&pwm_cd 1 40000 0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ panic-indicator; ++ }; ++ ++ led-red { ++ color = ; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ }; ++ ++ /* Powers the SATA Disk 0 regulator, which is enabled when a disk load is detected */ ++ p12v_0: regulator-p12v_0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "P12V_0"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&main_12v>; ++ ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ /* Powers the SATA Disk 1 regulator, which is enabled when a disk load is detected */ ++ p12v_1: regulator-p12v_1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "P12V_1"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&main_12v>; ++ ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ sound { ++ model = "ODROID-HC4"; ++ }; ++}; ++ ++&cpu_thermal { ++ cooling-maps { ++ map { ++ trip = <&cpu_passive>; ++ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++}; ++ ++&ir { ++ linux,rc-map-name = "rc-odroid"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ status = "okay"; ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ ++&pcie { ++ status = "okay"; ++ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; ++}; ++ ++&pwm_cd { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_d_x6_pins>; ++}; ++ ++&sd_emmc_c { ++ status = "disabled"; ++}; ++ ++&spifc { ++ status = "okay"; ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ }; ++}; ++ ++&usb { ++ phys = <&usb2_phy1>; ++ phy-names = "usb2-phy1"; ++}; ++ ++&usb2_phy0 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/dts/meson-sm1-odroid.dtsi b/arch/arm/dts/meson-sm1-odroid.dtsi +new file mode 100644 +index 0000000000..fd0ad85c16 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid.dtsi +@@ -0,0 +1,449 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Dongjin Kim ++ */ ++ ++#include "meson-sm1.dtsi" ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ tflash_vdd: regulator-tflash_vdd { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ tf_io: gpio-regulator-tf_io { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "TF_IO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_5v>; ++ ++ enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ ++ gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_SOURCE>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ }; ++ ++ flash_1v8: regulator-flash_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "FLASH_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ main_12v: regulator-main_12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "12V"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-always-on; ++ }; ++ ++ vcc_5v: regulator-vcc_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ vin-supply = <&main_12v>; ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ }; ++ ++ vcc_1v8: regulator-vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ /* FIXME: actually controlled by VDDCPU_B_EN */ ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ /* ++ * MP8756GD Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&main_12v>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ usb_pwr_en: regulator-usb_pwr_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB_PWR_EN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_5v>; ++ ++ /* Connected to the microUSB port power enable */ ++ gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&main_12v>; ++ regulator-always-on; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ audio-aux-devs = <&tdmout_b>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-3 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ }; ++ ++ /* hdmi glue */ ++ dai-link-4 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU1_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU2_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU3_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&ext_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_14 */ ++ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOH */ ++ "", "", "", "", "", ++ "PIN_36", /* GPIOH_5 */ ++ "PIN_26", /* GPIOH_6 */ ++ "PIN_32", /* GPIOH_7 */ ++ "", ++ /* BOOT */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOC */ ++ "", "", "", "", "", "", "", "", ++ /* GPIOA */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", ++ "PIN_27", /* GPIOA_14 */ ++ "PIN_28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "PIN_16", /* GPIOX_0 */ ++ "PIN_18", /* GPIOX_1 */ ++ "PIN_22", /* GPIOX_2 */ ++ "PIN_11", /* GPIOX_3 */ ++ "PIN_13", /* GPIOX_4 */ ++ "PIN_7", /* GPIOX_5 */ ++ "PIN_33", /* GPIOX_6 */ ++ "PIN_15", /* GPIOX_7 */ ++ "PIN_19", /* GPIOX_8 */ ++ "PIN_21", /* GPIOX_9 */ ++ "PIN_24", /* GPIOX_10 */ ++ "PIN_23", /* GPIOX_11 */ ++ "PIN_8", /* GPIOX_12 */ ++ "PIN_10", /* GPIOX_13 */ ++ "PIN_29", /* GPIOX_14 */ ++ "PIN_31", /* GPIOX_15 */ ++ "PIN_12", /* GPIOX_16 */ ++ "PIN_3", /* GPIOX_17 */ ++ "PIN_5", /* GPIOX_18 */ ++ "PIN_35"; /* GPIOX_19 */ ++}; ++ ++&gpio_ao { ++ gpio-line-names = ++ /* GPIOAO */ ++ "", "", "", "", ++ "PIN_47", /* GPIOAO_4 */ ++ "", "", ++ "PIN_45", /* GPIOAO_7 */ ++ "PIN_46", /* GPIOAO_8 */ ++ "PIN_44", /* GPIOAO_9 */ ++ "PIN_42", /* GPIOAO_10 */ ++ "", ++ /* GPIOE */ ++ "", "", ""; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&vcc_5v>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <200000000>; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ disable-wp; ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&tf_io>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&flash_1v8>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++ vbus-supply = <&usb_pwr_en>; ++}; ++ ++&usb2_phy0 { ++ phy-supply = <&vcc_5v>; ++}; ++ +diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts +index 5ab139a34c..2194a77897 100644 +--- a/arch/arm/dts/meson-sm1-sei610.dts ++++ b/arch/arm/dts/meson-sm1-sei610.dts +@@ -101,20 +101,20 @@ + }; + }; + +- leds { ++ led-controller-1 { + compatible = "gpio-leds"; + +- led-bluetooth { ++ led-1 { + label = "sei610:blue:bt"; + gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + default-state = "off"; + }; + }; + +- pwmleds { ++ led-controller-2 { + compatible = "pwm-leds"; + +- power { ++ led-2 { + label = "sei610:red:power"; + pwms = <&pwm_AO_ab 0 30518 0>; + max-brightness = <255>; +@@ -220,7 +220,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "SM1-SEI610"; ++ model = "SEI610"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, + <&tdmin_a>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", +diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi +index 71317f5aad..3d8b1f4f20 100644 +--- a/arch/arm/dts/meson-sm1.dtsi ++++ b/arch/arm/dts/meson-sm1.dtsi +@@ -130,7 +130,7 @@ + opp-microvolt = <790000>; + }; + +- opp-1512000000 { ++ opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <800000>; + }; +@@ -401,6 +401,16 @@ + status = "disabled"; + }; + ++ toacodec: audio-controller@740 { ++ compatible = "amlogic,sm1-toacodec", ++ "amlogic,g12a-toacodec"; ++ reg = <0x0 0x740 0x0 0x4>; ++ #sound-dai-cells = <1>; ++ sound-name-prefix = "TOACODEC"; ++ resets = <&clkc_audio AUD_RESET_TOACODEC>; ++ status = "disabled"; ++ }; ++ + tohdmitx: audio-controller@744 { + compatible = "amlogic,sm1-tohdmitx", + "amlogic,g12a-tohdmitx"; +diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h +index fd1f938c38..93752ea107 100644 +--- a/include/dt-bindings/clock/axg-clkc.h ++++ b/include/dt-bindings/clock/axg-clkc.h +@@ -70,7 +70,31 @@ + #define CLKID_HIFI_PLL 69 + #define CLKID_PCIE_CML_EN0 79 + #define CLKID_PCIE_CML_EN1 80 +-#define CLKID_MIPI_ENABLE 81 + #define CLKID_GEN_CLK 84 ++#define CLKID_VPU_0_SEL 92 ++#define CLKID_VPU_0 93 ++#define CLKID_VPU_1_SEL 95 ++#define CLKID_VPU_1 96 ++#define CLKID_VPU 97 ++#define CLKID_VAPB_0_SEL 99 ++#define CLKID_VAPB_0 100 ++#define CLKID_VAPB_1_SEL 102 ++#define CLKID_VAPB_1 103 ++#define CLKID_VAPB_SEL 104 ++#define CLKID_VAPB 105 ++#define CLKID_VCLK 106 ++#define CLKID_VCLK2 107 ++#define CLKID_VCLK_DIV1 122 ++#define CLKID_VCLK_DIV2 123 ++#define CLKID_VCLK_DIV4 124 ++#define CLKID_VCLK_DIV6 125 ++#define CLKID_VCLK_DIV12 126 ++#define CLKID_VCLK2_DIV1 127 ++#define CLKID_VCLK2_DIV2 128 ++#define CLKID_VCLK2_DIV4 129 ++#define CLKID_VCLK2_DIV6 130 ++#define CLKID_VCLK2_DIV12 131 ++#define CLKID_CTS_ENCL 133 ++#define CLKID_VDIN_MEAS 136 + + #endif /* __AXG_CLKC_H */ +diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h +index 40d49940d8..a93b58c5e1 100644 +--- a/include/dt-bindings/clock/g12a-clkc.h ++++ b/include/dt-bindings/clock/g12a-clkc.h +@@ -147,5 +147,7 @@ + #define CLKID_SPICC1_SCLK 261 + #define CLKID_NNA_AXI_CLK 264 + #define CLKID_NNA_CORE_CLK 267 ++#define CLKID_MIPI_DSI_PXCLK_SEL 269 ++#define CLKID_MIPI_DSI_PXCLK 270 + + #endif /* __G12A_CLKC_H */ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-usb-dwc3-meson-gxl-add-AXG-compatible.patch b/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-usb-dwc3-meson-gxl-add-AXG-compatible.patch new file mode 100644 index 0000000000..95afbb5bb5 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-usb-dwc3-meson-gxl-add-AXG-compatible.patch @@ -0,0 +1,31 @@ +From 0115cea6009aebd6c59ad7306da59292f50dc081 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:01 +0200 +Subject: [PATCH 07/30] FROMGIT: usb: dwc3: meson-gxl: add AXG compatible + +Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs. + +This adds it to the compatible list for this driver. + +Reported-by: Vyacheslav Bocharov +Signed-off-by: Neil Armstrong +Tested-by: Vyacheslav Bocharov +--- + drivers/usb/dwc3/dwc3-meson-gxl.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c +index 08467d6210..b8f3886173 100644 +--- a/drivers/usb/dwc3/dwc3-meson-gxl.c ++++ b/drivers/usb/dwc3/dwc3-meson-gxl.c +@@ -409,6 +409,7 @@ static int dwc3_meson_gxl_remove(struct udevice *dev) + } + + static const struct udevice_id dwc3_meson_gxl_ids[] = { ++ { .compatible = "amlogic,meson-axg-usb-ctrl" }, + { .compatible = "amlogic,meson-gxl-usb-ctrl" }, + { .compatible = "amlogic,meson-gxm-usb-ctrl" }, + { } +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-ARM-meson-keep-HW-order-for-MMC-devices.patch b/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-ARM-meson-keep-HW-order-for-MMC-devices.patch new file mode 100644 index 0000000000..a618e8133c --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-ARM-meson-keep-HW-order-for-MMC-devices.patch @@ -0,0 +1,55 @@ +From c1683775d6022d456e2c0930b872abd77650f5c3 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:02 +0200 +Subject: [PATCH 08/30] FROMGIT: ARM: meson: keep HW order for MMC devices + +Since Linux commmit [1], the order is fixed with aliases, in order to keep the +MMC device order, set it back to HW order in U-Boot dtsi files. + +[1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices") + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-g12-common-u-boot.dtsi | 7 +++++++ + arch/arm/dts/meson-gx-u-boot.dtsi | 7 +++++++ + 2 files changed, 14 insertions(+) + +diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi b/arch/arm/dts/meson-g12-common-u-boot.dtsi +index 38fd3d3feb..b1f60b15c9 100644 +--- a/arch/arm/dts/meson-g12-common-u-boot.dtsi ++++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi +@@ -5,6 +5,13 @@ + */ + + / { ++ /* Keep HW order from U-boot */ ++ aliases { ++ /delete-property/ mmc0; ++ /delete-property/ mmc1; ++ /delete-property/ mmc2; ++ }; ++ + soc { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi +index 17d2cb95c1..fb6952f1d8 100644 +--- a/arch/arm/dts/meson-gx-u-boot.dtsi ++++ b/arch/arm/dts/meson-gx-u-boot.dtsi +@@ -5,6 +5,13 @@ + */ + + / { ++ /* Keep HW order from U-boot */ ++ aliases { ++ /delete-property/ mmc0; ++ /delete-property/ mmc1; ++ /delete-property/ mmc2; ++ }; ++ + soc { + u-boot,dm-pre-reloc; + }; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-ARM-meson-axg-remove-local-USB-nodes.patch b/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-ARM-meson-axg-remove-local-USB-nodes.patch new file mode 100644 index 0000000000..1b4af1338a --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-ARM-meson-axg-remove-local-USB-nodes.patch @@ -0,0 +1,111 @@ +From a7c1806fb36b8e3fea461bb4cbb8607216dad001 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:03 +0200 +Subject: [PATCH 09/30] FROMGIT: ARM: meson-axg: remove local USB nodes + +Drop the local USB nodes after Linux 5.14 sync. + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-axg-s400-u-boot.dtsi | 8 ---- + arch/arm/dts/meson-axg-u-boot.dtsi | 62 ------------------------- + 2 files changed, 70 deletions(-) + delete mode 100644 arch/arm/dts/meson-axg-u-boot.dtsi + +diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi b/arch/arm/dts/meson-axg-s400-u-boot.dtsi +index 2c4b06f140..334650d610 100644 +--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi ++++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi +@@ -3,8 +3,6 @@ + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + */ + +-#include "meson-axg-u-boot.dtsi" +- + /* wifi module */ + &sd_emmc_b { + status = "disabled"; +@@ -15,12 +13,6 @@ + status = "okay"; + }; + +-&usb { +- status = "okay"; +- dr_mode = "otg"; +- vbus-supply = <&usb_pwr>; +-}; +- + &usb2_phy1 { + phy-supply = <&vcc_5v>; + }; +diff --git a/arch/arm/dts/meson-axg-u-boot.dtsi b/arch/arm/dts/meson-axg-u-boot.dtsi +deleted file mode 100644 +index cb1c71e78c..0000000000 +--- a/arch/arm/dts/meson-axg-u-boot.dtsi ++++ /dev/null +@@ -1,62 +0,0 @@ +-// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +-/* +- * Copyright (c) 2020 BayLibre, SAS. +- * Author: Neil Armstrong +- */ +- +-/ { +- soc { +- usb: usb@ffe09080 { +- compatible = "amlogic,meson-gxl-usb-ctrl"; +- reg = <0x0 0xffe09080 0x0 0x20>; +- interrupts = ; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; +- +- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; +- clock-names = "usb_ctrl", "ddr"; +- resets = <&reset RESET_USB_OTG>; +- +- dr_mode = "otg"; +- +- phys = <&usb2_phy1>; +- phy-names = "usb2-phy1"; +- +- dwc2: usb@ff400000 { +- compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; +- reg = <0x0 0xff400000 0x0 0x40000>; +- interrupts = ; +- clocks = <&clkc CLKID_USB1>; +- clock-names = "otg"; +- phys = <&usb2_phy1>; +- dr_mode = "peripheral"; +- g-rx-fifo-size = <192>; +- g-np-tx-fifo-size = <128>; +- g-tx-fifo-size = <128 128 16 16 16>; +- }; +- +- dwc3: usb@ff500000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0xff500000 0x0 0x100000>; +- interrupts = ; +- dr_mode = "host"; +- maximum-speed = "high-speed"; +- snps,dis_u2_susphy_quirk; +- }; +- }; +- }; +-}; +- +-&apb { +- usb2_phy1: phy@9020 { +- compatible = "amlogic,meson-gxl-usb2-phy"; +- #phy-cells = <0>; +- reg = <0x0 0x9020 0x0 0x20>; +- clocks = <&clkc CLKID_USB>; +- clock-names = "phy"; +- resets = <&reset RESET_USB_OTG>; +- reset-names = "phy"; +- status = "okay"; +- }; +-}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-configs-meson64-add-SCSI-boot-target.patch b/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-configs-meson64-add-SCSI-boot-target.patch new file mode 100644 index 0000000000..7bfeb3a8b1 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-configs-meson64-add-SCSI-boot-target.patch @@ -0,0 +1,42 @@ +From 6d99a04473373ce9449f38d02722e4baf4d451a9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 8 Sep 2021 16:17:23 +0200 +Subject: [PATCH 10/30] FROMGIT: configs: meson64: add SCSI boot target + +Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using +an on-board AHCI PCIe controller. + +Signed-off-by: Neil Armstrong +Signed-off-by: Mark Kettenis +--- + include/configs/meson64.h | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index f909dbe079..c77b6917ab 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -66,6 +66,12 @@ + #define BOOT_TARGET_NVME(func) + #endif + ++#ifdef CONFIG_CMD_SCSI ++ #define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0) ++#else ++ #define BOOT_TARGET_SCSI(func) ++#endif ++ + #ifndef BOOT_TARGET_DEVICES + #define BOOT_TARGET_DEVICES(func) \ + func(ROMUSB, romusb, na) \ +@@ -74,6 +80,7 @@ + func(MMC, mmc, 2) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_NVME(func) \ ++ BOOT_TARGET_SCSI(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + #endif +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-distro_bootcmd-run-pci-enum-for-scsi_boot-ju.patch b/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-distro_bootcmd-run-pci-enum-for-scsi_boot-ju.patch new file mode 100644 index 0000000000..d1ad0fabe5 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-distro_bootcmd-run-pci-enum-for-scsi_boot-ju.patch @@ -0,0 +1,29 @@ +From a332eaf364ae643ca71974887093cc027bc4e21a Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:05 +0200 +Subject: [PATCH 11/30] FROMGIT: distro_bootcmd: run pci enum for scsi_boot + just like it is done for nvme_boot + +The SCSI device can be a PCIe adapter, so run pcie enum if enabled. + +Signed-off-by: Mark Kettenis +Signed-off-by: Neil Armstrong +--- + include/config_distro_bootcmd.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h +index 750e9e04e8..3f724aa10f 100644 +--- a/include/config_distro_bootcmd.h ++++ b/include/config_distro_bootcmd.h +@@ -226,6 +226,7 @@ + "fi\0" \ + \ + "scsi_boot=" \ ++ BOOTENV_RUN_PCI_ENUM \ + BOOTENV_RUN_SCSI_INIT \ + BOOTENV_SHARED_BLKDEV_BODY(scsi) + #define BOOTENV_DEV_SCSI BOOTENV_DEV_BLKDEV +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-ARM-amlogic-add-support-for-Odroid-HC4-devic.patch b/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-ARM-amlogic-add-support-for-Odroid-HC4-devic.patch new file mode 100644 index 0000000000..c6989902f2 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-ARM-amlogic-add-support-for-Odroid-HC4-devic.patch @@ -0,0 +1,159 @@ +From 1145e026ac9c4b0173c0bb44f381c9c0d23044f9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:06 +0200 +Subject: [PATCH 12/30] FROMGIT: ARM: amlogic: add support for Odroid-HC4 + device + +The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge +instead of the USB3 ports. + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi | 23 +++++ + board/amlogic/odroid-n2/MAINTAINERS | 1 + + configs/odroid-hc4_defconfig | 92 +++++++++++++++++++ + 3 files changed, 116 insertions(+) + create mode 100644 arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi + create mode 100644 configs/odroid-hc4_defconfig + +diff --git a/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi +new file mode 100644 +index 0000000000..963bf96b25 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi +@@ -0,0 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-sm1-u-boot.dtsi" ++ ++ðmac { ++ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++}; ++ ++/* SARADC is needed for proper board variant detection */ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ ++&tflash_vdd { ++ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; ++}; +diff --git a/board/amlogic/odroid-n2/MAINTAINERS b/board/amlogic/odroid-n2/MAINTAINERS +index 77f7746346..43724e6fdd 100644 +--- a/board/amlogic/odroid-n2/MAINTAINERS ++++ b/board/amlogic/odroid-n2/MAINTAINERS +@@ -5,5 +5,6 @@ L: u-boot-amlogic@groups.io + F: board/amlogic/odroid-n2/ + F: configs/odroid-n2_defconfig + F: configs/odroid-c4_defconfig ++F: configs/odroid-hc4_defconfig + F: doc/board/amlogic/odroid-n2.rst + F: doc/board/amlogic/odroid-c4.rst +diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig +new file mode 100644 +index 0000000000..7671496218 +--- /dev/null ++++ b/configs/odroid-hc4_defconfig +@@ -0,0 +1,92 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="odroid-n2" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4" ++CONFIG_MESON_G12A=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" odroid-hc4" ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_ADC=y ++CONFIG_SARADC_MESON=y ++CONFIG_SATA=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MDIO_MUX_MESON_G12A=y ++CONFIG_PCI=y ++CONFIG_PCIE_DW_MESON=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_RESET=y ++CONFIG_SCSI=y ++CONFIG_DM_SCSI=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_VIDEO_BMP_RLE8=y ++CONFIG_BMP_16BPP=y ++CONFIG_BMP_24BPP=y ++CONFIG_BMP_32BPP=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-doc-boards-amlogic-update-for-Odroid-HC4.patch b/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-doc-boards-amlogic-update-for-Odroid-HC4.patch new file mode 100644 index 0000000000..bedca37fea --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-doc-boards-amlogic-update-for-Odroid-HC4.patch @@ -0,0 +1,43 @@ +From 5d5fafb005313cfef25e2de69fd6521487047c20 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:07 +0200 +Subject: [PATCH 13/30] FROMGIT: doc: boards: amlogic: update for Odroid HC4 + +Add documentation bits for the Odroid-HC4. + +Signed-off-by: Neil Armstrong +--- + doc/board/amlogic/index.rst | 2 +- + doc/board/amlogic/odroid-c4.rst | 3 +++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst +index 8da7afddb4..af12f94fde 100644 +--- a/doc/board/amlogic/index.rst ++++ b/doc/board/amlogic/index.rst +@@ -18,7 +18,7 @@ This matrix concerns the actual source code version. + | Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | + | | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | + | | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | +-| | P201 | LibreTech-AC v2 | | | | | | ++| | P201 | LibreTech-AC v2 | | | | | Odroid-HC4 | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ + | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +diff --git a/doc/board/amlogic/odroid-c4.rst b/doc/board/amlogic/odroid-c4.rst +index 5a5a8688b8..f66d60a54d 100644 +--- a/doc/board/amlogic/odroid-c4.rst ++++ b/doc/board/amlogic/odroid-c4.rst +@@ -17,6 +17,9 @@ Co. Ltd with the following specifications: + - UART serial + - Infrared receiver + ++The ODROID-HC4 is a variant with a PCIe-SATA controller, the same commands ++applies for HC4. ++ + Schematics are available on the manufacturer website. + + U-Boot compilation +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-ARM-meson-add-Beelink-GS-King-X-board.patch b/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-ARM-meson-add-Beelink-GS-King-X-board.patch new file mode 100644 index 0000000000..9d2c6d6bfe --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-ARM-meson-add-Beelink-GS-King-X-board.patch @@ -0,0 +1,134 @@ +From 160de51c71b384a5514394f261e3d0255ebf8454 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:08 +0200 +Subject: [PATCH 14/30] FROMGIT: ARM: meson: add Beelink GS-King X board + +The Beelink GS-King X is a variant of the GS King boards but with an internal +USB to SATA bridge and advanced audio features. + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi | 7 ++ + board/amlogic/beelink-s922x/MAINTAINERS | 1 + + configs/beelink-gsking-x_defconfig | 70 ++++++++++++++++++++ + doc/board/amlogic/index.rst | 2 +- + 4 files changed, 79 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi + create mode 100644 configs/beelink-gsking-x_defconfig + +diff --git a/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi b/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi +new file mode 100644 +index 0000000000..236f2468dc +--- /dev/null ++++ b/arch/arm/dts/meson-g12b-gsking-x-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-g12-common-u-boot.dtsi" +diff --git a/board/amlogic/beelink-s922x/MAINTAINERS b/board/amlogic/beelink-s922x/MAINTAINERS +index 7f223df4ae..47b622765a 100644 +--- a/board/amlogic/beelink-s922x/MAINTAINERS ++++ b/board/amlogic/beelink-s922x/MAINTAINERS +@@ -5,5 +5,6 @@ L: u-boot-amlogic@groups.io + F: board/amlogic/beelink-s922x/ + F: configs/beelink-gtking_defconfig + F: configs/beelink-gtkingpro_defconfig ++F: configs/beelink-gsking-x_defconfig + F: doc/board/amlogic/beelink-gtking.rst + F: doc/board/amlogic/beelink-gtkingpro.rst +diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig +new file mode 100644 +index 0000000000..8a76e8829a +--- /dev/null ++++ b/configs/beelink-gsking-x_defconfig +@@ -0,0 +1,70 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="beelink-s922x" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gsking-x" ++CONFIG_MESON_G12A=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" beelink" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MDIO_MUX_MESON_G12A=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst +index af12f94fde..de1a9ce284 100644 +--- a/doc/board/amlogic/index.rst ++++ b/doc/board/amlogic/index.rst +@@ -18,7 +18,7 @@ This matrix concerns the actual source code version. + | Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | + | | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | + | | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | +-| | P201 | LibreTech-AC v2 | | | | | Odroid-HC4 | ++| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ + | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-ARM-amlogic-add-Banana-Pi-M5.patch b/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-ARM-amlogic-add-Banana-Pi-M5.patch new file mode 100644 index 0000000000..1efd23588e --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-ARM-amlogic-add-Banana-Pi-M5.patch @@ -0,0 +1,154 @@ +From a29813bd3bfbe4d263b6fd9010d713383bc0fcf3 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 17 Sep 2021 09:37:09 +0200 +Subject: [PATCH 15/30] FROMGIT: ARM: amlogic: add Banana Pi M5 + +Banana Pi BPI-M5 is a credit card format SBC with the following features: +- Amlogic S905X3 quad core Cortex-A55 +- Mali-G31 GPU +- 4GB LPDDR4 +- 16GB eMMC flash +- 4 USB 3.0 +- 1 GbE ethernet +- HDMI output +- 2x LEDS +- SDCard +- 2.5mm Jack with Stereo Audio + CVBS +- Infrared Received +- ADC Button +- GPIO Button +- 40 pins header + 3pins debug header + +Signed-off-by: Neil Armstrong +--- + .../arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi | 13 ++++ + board/amlogic/u200/MAINTAINERS | 1 + + configs/bananapi-m5_defconfig | 73 +++++++++++++++++++ + doc/board/amlogic/index.rst | 1 + + 4 files changed, 88 insertions(+) + create mode 100644 arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi + create mode 100644 configs/bananapi-m5_defconfig + +diff --git a/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi b/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi +new file mode 100644 +index 0000000000..a86fdb5668 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-bananapi-m5-u-boot.dtsi +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-sm1-u-boot.dtsi" ++ ++ðmac { ++ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++}; +diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS +index 8c23f9a7d3..655cf64a3d 100644 +--- a/board/amlogic/u200/MAINTAINERS ++++ b/board/amlogic/u200/MAINTAINERS +@@ -4,4 +4,5 @@ S: Maintained + L: u-boot-amlogic@groups.io + F: board/amlogic/u200/ + F: configs/u200_defconfig ++F: configs/bananapi-m5_defconfig + F: doc/board/amlogic/u200.rst +diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig +new file mode 100644 +index 0000000000..a088761622 +--- /dev/null ++++ b/configs/bananapi-m5_defconfig +@@ -0,0 +1,73 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m5" ++CONFIG_MESON_G12A=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING="bpi-m5" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_ADC=y ++CONFIG_SARADC_MESON=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MDIO_MUX_MESON_G12A=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_VIDEO_BMP_RLE8=y ++CONFIG_BMP_16BPP=y ++CONFIG_BMP_24BPP=y ++CONFIG_BMP_32BPP=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst +index de1a9ce284..2913ab281a 100644 +--- a/doc/board/amlogic/index.rst ++++ b/doc/board/amlogic/index.rst +@@ -19,6 +19,7 @@ This matrix concerns the actual source code version. + | | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | + | | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | + | | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | ++| | | | | | | | BananaPi-M5 | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ + | UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | + +-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-ARM-amlogic-add-JetHub-common-config-header.patch b/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-ARM-amlogic-add-JetHub-common-config-header.patch new file mode 100644 index 0000000000..f2acc82345 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-ARM-amlogic-add-JetHub-common-config-header.patch @@ -0,0 +1,63 @@ +From 9a68cb8d0d042b0c9ebc3546aeecdba75b320463 Mon Sep 17 00:00:00 2001 +From: Vyacheslav Bocharov +Date: Mon, 20 Sep 2021 11:40:14 +0300 +Subject: [PATCH 16/30] FROMGIT: ARM: amlogic: add JetHub common config header + +JetHub devices uses its own boot sequence with "rescue" button + +Signed-off-by: Vyacheslav Bocharov +Signed-off-by: Neil Armstrong +--- + include/configs/jethub.h | 40 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + create mode 100644 include/configs/jethub.h + +diff --git a/include/configs/jethub.h b/include/configs/jethub.h +new file mode 100644 +index 0000000000..35f85095ac +--- /dev/null ++++ b/include/configs/jethub.h +@@ -0,0 +1,40 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Configuration for JetHome devices ++ * Copyright (C) 2021 Vyacheslav Bocharov ++ * Author: Vyacheslav Bocharov ++ */ ++ ++#ifndef __JETHUB_CONFIG_H ++#define __JETHUB_CONFIG_H ++ ++#if defined(CONFIG_MESON_AXG) ++#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \ ++ "bootcmd_rescue=" \ ++ "if gpio input 10; then " \ ++ "run bootcmd_usb0;" \ ++ "fi;\0" ++#else ++#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \ ++ "bootcmd_rescue=" \ ++ "if test \"${userbutton}\" = \"true\"; then " \ ++ "run bootcmd_mmc0; " \ ++ "fi;\0" ++#endif ++ ++#define BOOTENV_DEV_NAME_RESCUE(devtypeu, devtypel, instance) \ ++ "rescue " ++ ++#ifndef BOOT_TARGET_DEVICES ++#define BOOT_TARGET_DEVICES(func) \ ++ func(RESCUE, rescue, na) \ ++ func(MMC, mmc, 1) \ ++ func(MMC, mmc, 0) \ ++ BOOT_TARGET_DEVICES_USB(func) \ ++ func(PXE, pxe, na) \ ++ func(DHCP, dhcp, na) ++#endif ++ ++#include ++ ++#endif /* __JETHUB_CONFIG_H */ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-device-support.patch b/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-device-support.patch new file mode 100644 index 0000000000..89d5588eb0 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-device-support.patch @@ -0,0 +1,934 @@ +From a6421333d73b027884bef7dd2841861d87e3a977 Mon Sep 17 00:00:00 2001 +From: Vyacheslav Bocharov +Date: Mon, 20 Sep 2021 11:40:15 +0300 +Subject: [PATCH 17/30] FROMGIT: ARM: amlogic: add JetHub D1/H1 device support + +Add support for new home automation devices. + +JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features: +- DIN Rail Mounting case +- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz +- no video out +- 512Mb/1GB DDR3 +- 8/16GB eMMC flash +- 1 x USB 2.0 +- 1 x 10/100Mbps ethernet +- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2. +- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. +- 2 x gpio LEDS +- GPIO user Button +- 1 x 1-Wire +- 2 x RS-485 +- 4 x dry contact digital GPIO inputs +- 3 x relay GPIO outputs +- DC source with a voltage of 9 to 56 V / Passive POE + +JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features: +- Square plastic case +- Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz +- no video out +- 1GB DDR3 +- 8/16GB eMMC flash +- 2 x USB 2.0 +- 1 x 10/100Mbps ethernet +- WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0. +- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. +- MicroSD 2.x/3.x/4.x DS/HS cards. +- 1 x gpio LED +- ADC user Button +- DC source 5V microUSB with serial console + +Patches from: +- JetHub H1 + https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.in + https://git.kernel.org/amlogic/c/abfaae24ecf3e7f00508b60fa05e2b6789b8f607 +- JetHub D1 + https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.in + https://git.kernel.org/amlogic/c/8e279fb2903990cc6296ec56b3b80b2f854b6c79 + +Signed-off-by: Vyacheslav Bocharov +Reviewed-by: Neil Armstrong +[narmstrong: removed unused variable value] +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 2 + + .../arm/dts/meson-axg-jethome-jethub-j100.dts | 361 ++++++++++++++++++ + .../meson-gxl-s905w-jethome-jethub-j80.dts | 241 ++++++++++++ + board/amlogic/jethub-j80/MAINTAINERS | 9 + + board/amlogic/jethub-j80/Makefile | 6 + + board/amlogic/jethub-j80/jethub-j80.c | 67 ++++ + configs/jethub_j100_defconfig | 55 +++ + configs/jethub_j80_defconfig | 63 +++ + 8 files changed, 804 insertions(+) + create mode 100644 arch/arm/dts/meson-axg-jethome-jethub-j100.dts + create mode 100644 arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts + create mode 100644 board/amlogic/jethub-j80/MAINTAINERS + create mode 100644 board/amlogic/jethub-j80/Makefile + create mode 100644 board/amlogic/jethub-j80/jethub-j80.c + create mode 100644 configs/jethub_j100_defconfig + create mode 100644 configs/jethub_j80_defconfig + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index f0160d2dc0..d1893a9812 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -169,10 +169,12 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxl-s905x-libretech-cc-v2.dtb \ + meson-gxl-s905x-khadas-vim.dtb \ + meson-gxl-s905d-libretech-pc.dtb \ ++ meson-gxl-s905w-jethome-jethub-j80.dtb \ + meson-gxm-khadas-vim2.dtb \ + meson-gxm-s912-libretech-pc.dtb \ + meson-gxm-wetek-core2.dtb \ + meson-axg-s400.dtb \ ++ meson-axg-jethome-jethub-j100.dtb \ + meson-g12a-u200.dtb \ + meson-g12a-sei510.dtb \ + meson-g12b-gtking.dtb \ +diff --git a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts +new file mode 100644 +index 0000000000..5783732dc6 +--- /dev/null ++++ b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts +@@ -0,0 +1,361 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 Vyacheslav Bocharov ++ * Copyright (c) 2020 JetHome ++ * Author: Aleksandr Kazantsev ++ * Author: Alexey Shevelkin ++ * Author: Vyacheslav Bocharov ++ */ ++ ++/dts-v1/; ++ ++#include "meson-axg.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "jethome,jethub-j100", "amlogic,a113d", "amlogic,meson-axg"; ++ model = "JetHome JetHub J100"; ++ aliases { ++ serial0 = &uart_AO; /* Console */ ++ serial1 = &uart_AO_B; /* External UART (Wireless Module) */ ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ /* 1024MB RAM */ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ reserved-memory { ++ linux,cma { ++ size = <0x0 0x400000>; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_5v: regulator-vcc_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_5v>; ++ regulator-always-on; ++ }; ++ ++ vddio_ao18: regulator-vddio_ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddio_boot: regulator-vddio_boot { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_BOOT"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ usb_pwr: regulator-usb_pwr { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB_PWR"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_5v>; ++ regulator-always-on; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; ++ }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */ ++ }; ++ ++ thermal-zones { ++ cpu_thermal: cpu-thermal { ++ polling-delay-passive = <250>; ++ polling-delay = <1000>; ++ thermal-sensors = <&scpi_sensors 0>; ++ trips { ++ cpu_passive: cpu-passive { ++ temperature = <70000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ cpu_hot: cpu-hot { ++ temperature = <80000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "hot"; ++ }; ++ ++ cpu_critical: cpu-critical { ++ temperature = <100000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ cpu_cooling_maps: cooling-maps { ++ map0 { ++ trip = <&cpu_passive>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ map1 { ++ trip = <&cpu_hot>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ onewire { ++ compatible = "w1-gpio"; ++ gpios = <&gpio GPIOA_14 GPIO_ACTIVE_HIGH>; ++ #gpio-cells = <1>; ++ }; ++}; ++ ++&efuse { ++ sn: sn@32 { ++ reg = <0x32 0x20>; ++ }; ++ ++ eth_mac: eth_mac@0 { ++ reg = <0x0 0x6>; ++ }; ++ ++ bt_mac: bt_mac@6 { ++ reg = <0x6 0x6>; ++ }; ++ ++ wifi_mac: wifi_mac@c { ++ reg = <0xc 0x6>; ++ }; ++ ++ bid: bid@12 { ++ reg = <0x12 0x20>; ++ }; ++}; ++ ++ðmac { ++ status = "okay"; ++ pinctrl-0 = <ð_rmii_x_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <ð_phy0>; ++ phy-mode = "rmii"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* ICPlus IP101A/G Ethernet PHY (vendor_id=0x0243, model_id=0x0c54) */ ++ eth_phy0: ethernet-phy@0 { ++ /* compatible = "ethernet-phy-id0243.0c54";*/ ++ max-speed = <100>; ++ reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <10000>; ++ reset-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++/* Internal I2C bus (on CPU module) */ ++&i2c1 { ++ status = "okay"; ++ pinctrl-0 = <&i2c1_z_pins>; ++ pinctrl-names = "default"; ++ ++ /* RTC */ ++ pcf8563: pcf8563@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++}; ++ ++/* Peripheral I2C bus (on motherboard) */ ++&i2c_AO { ++ status = "okay"; ++ pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_ab { ++ status = "okay"; ++ pinctrl-0 = <&pwm_a_x20_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* wifi module */ ++&sd_emmc_b { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-0 = <&sdio_pins>; ++ pinctrl-1 = <&sdio_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr104; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ ++ mmc-pwrseq = <&sdio_pwrseq>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* emmc storage */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* UART Bluetooth */ ++&uart_B { ++ status = "okay"; ++ pinctrl-0 = <&uart_b_z_pins>, <&uart_b_z_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++/* UART Console */ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* UART Wireless module */ ++&uart_AO_B { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_b_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++ phy-supply = <&usb_pwr>; ++}; ++ ++&spicc1 { ++ status = "okay"; ++ pinctrl-0 = <&spi1_x_pins>, <&spi1_ss0_x_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&gpio { ++ gpio-line-names = ++ "", "", "", "", "", // 0 - 4 ++ "", "", "", "", "", // 5 - 9 ++ "UserButton", "", "", "", "", // 10 - 14 ++ "", "", "", "", "", // 15 - 19 ++ "", "", "", "", "", // 20 - 24 ++ "", "LedRed", "LedGreen", "Output3", "Output2", // 25 - 29 ++ "Output1", "", "", "", "", // 30 - 34 ++ "", "ZigBeeBOOT", "", "", "", // 35 - 39 ++ "", "ZigBeeRESET", "", "Input4", "Input3", // 40 - 44 ++ "Input2", "Input1", "", "", "", // 45 - 49 ++ "", "", "", "", "", // 50 - 54 ++ "", "", "", "", "", // 55 - 59 ++ "", "", "", "", "", // 60 - 64 ++ "", "", "", "", "", // 65 - 69 ++ "", "", "", "", "", // 70 - 74 ++ "", "", "", "", "", // 75 - 79 ++ "", "", "", "", "", // 80 - 84 ++ "", ""; // 85-86 ++}; ++ ++&cpu0 { ++ #cooling-cells = <2>; ++}; ++ ++&cpu1 { ++ #cooling-cells = <2>; ++}; ++ ++&cpu2 { ++ #cooling-cells = <2>; ++}; ++ ++&cpu3 { ++ #cooling-cells = <2>; ++}; +diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts +new file mode 100644 +index 0000000000..6eafb90869 +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts +@@ -0,0 +1,241 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 Vyacheslav Bocharov ++ * Copyright (c) 2020 JetHome ++ * Author: Aleksandr Kazantsev ++ * Author: Alexey Shevelkin ++ * Author: Vyacheslav Bocharov ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxl.dtsi" ++ ++/ { ++ compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl"; ++ model = "JetHome JetHub J80"; ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ reserved-memory { ++ linux,cma { ++ size = <0x0 0x1000000>; ++ }; ++ }; ++ ++ aliases { ++ serial0 = &uart_AO; /* Console */ ++ serial1 = &uart_A; /* Bluetooth */ ++ serial2 = &uart_AO_B; /* Wireless module 1 */ ++ serial3 = &uart_C; /* Wireless module 2 */ ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ vddio_ao18: regulator-vddio_ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddio_boot: regulator-vddio_boot { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_BOOT"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; ++ }; ++}; ++ ++&efuse { ++ bt_mac: bt_mac@6 { ++ reg = <0x6 0x6>; ++ }; ++ ++ wifi_mac: wifi_mac@C { ++ reg = <0xc 0x6>; ++ }; ++}; ++ ++&sn { ++ reg = <0x32 0x20>; ++}; ++ ++ð_mac { ++ reg = <0x0 0x6>; ++}; ++ ++&bid { ++ reg = <0x12 0x20>; ++}; ++ ++&usb { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddio_ao18>; ++}; ++ ++/* Wireless SDIO Module */ ++&sd_emmc_a { ++ status = "okay"; ++ pinctrl-0 = <&sdio_pins>; ++ pinctrl-1 = <&sdio_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ ++ non-removable; ++ disable-wp; ++ ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ ++ mmc-pwrseq = <&sdio_pwrseq>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* Console UART */ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* S905W only has access to its internal PHY */ ++ðmac { ++ status = "okay"; ++ phy-mode = "rmii"; ++ phy-handle = <&internal_phy>; ++}; ++ ++&internal_phy { ++ status = "okay"; ++ pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&uart_A { ++ status = "okay"; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++}; ++ ++&uart_C { ++ status = "okay"; ++ pinctrl-0 = <&uart_c_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&uart_AO_B { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_b_pins>, <&uart_ao_b_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++}; ++ ++&i2c_B { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c_b_pins>; ++ ++ pcf8563: pcf8563@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++}; +diff --git a/board/amlogic/jethub-j80/MAINTAINERS b/board/amlogic/jethub-j80/MAINTAINERS +new file mode 100644 +index 0000000000..459e9f89da +--- /dev/null ++++ b/board/amlogic/jethub-j80/MAINTAINERS +@@ -0,0 +1,9 @@ ++JetHome JetHub ++M: Vyacheslav Bocharov ++S: Maintained ++L: u-boot-amlogic@groups.io ++F: board/amlogic/jethub-j80/ ++F: configs/jethub_j80_defconfig ++F: configs/jethub_j100_defconfig ++F: doc/board/amlogic/jethub-j80.rst ++F: doc/board/amlogic/jethub-j100.rst +diff --git a/board/amlogic/jethub-j80/Makefile b/board/amlogic/jethub-j80/Makefile +new file mode 100644 +index 0000000000..a727a4b222 +--- /dev/null ++++ b/board/amlogic/jethub-j80/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# (C) Copyright 2021 Vyacheslav Bocharov ++# Author: Vyacheslav Bocharov ++ ++obj-y := jethub-j80.o +diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c +new file mode 100644 +index 0000000000..185880de13 +--- /dev/null ++++ b/board/amlogic/jethub-j80/jethub-j80.c +@@ -0,0 +1,67 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2021 Vyacheslav Bocharov ++ * Author: Vyacheslav Bocharov ++ * Author: Neil Armstrong ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define EFUSE_SN_OFFSET 50 ++#define EFUSE_SN_SIZE 32 ++#define EFUSE_MAC_OFFSET 0 ++#define EFUSE_MAC_SIZE 6 ++#define EFUSE_USID_OFFSET 18 ++#define EFUSE_USID_SIZE 32 ++ ++int misc_init_r(void) ++{ ++ u8 mac_addr[EFUSE_MAC_SIZE]; ++ char serial[EFUSE_SN_SIZE]; ++ char usid[EFUSE_USID_SIZE]; ++ ssize_t len; ++ unsigned int adcval; ++ int ret; ++ ++ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { ++ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, ++ mac_addr, EFUSE_MAC_SIZE); ++ if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++ else ++ meson_generate_serial_ethaddr(); ++ } ++ ++ if (!env_get("serial")) { ++ len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, ++ EFUSE_SN_SIZE); ++ if (len == EFUSE_SN_SIZE) ++ env_set("serial", serial); ++ } ++ ++ if (!env_get("usid")) { ++ len = meson_sm_read_efuse(EFUSE_USID_OFFSET, usid, ++ EFUSE_USID_SIZE); ++ if (len == EFUSE_USID_SIZE) ++ env_set("usid", usid); ++ } ++ ++ ret = adc_channel_single_shot("adc@8680", 0, &adcval); ++ if (adcval < 3000) ++ env_set("userbutton", "true"); ++ else ++ env_set("userbutton", "false"); ++ ++ return 0; ++} +diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig +new file mode 100644 +index 0000000000..290ce4db85 +--- /dev/null ++++ b/configs/jethub_j100_defconfig +@@ -0,0 +1,55 @@ ++CONFIG_ARM=y ++CONFIG_SYS_CONFIG_NAME="jethub" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-axg-jethome-jethub-j100" ++CONFIG_MESON_AXG=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" jethubj100" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++CONFIG_RANDOM_UUID=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_PARTITION_TYPE_GUID=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD_UBI=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MESON_GXL_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_AXG=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_GXL=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig +new file mode 100644 +index 0000000000..7db05af3b0 +--- /dev/null ++++ b/configs/jethub_j80_defconfig +@@ -0,0 +1,63 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="jethub-j80" ++CONFIG_SYS_CONFIG_NAME="jethub" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905w-jethome-jethub-j80" ++CONFIG_MESON_GXL=y ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" jethubj80" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_CONSOLE_MUX=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_ADC=y ++CONFIG_CMD_GPIO=y ++CONFIG_RANDOM_UUID=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_PARTITION_TYPE_GUID=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SARADC_MESON=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD_UBI=y ++CONFIG_PHY_MESON_GXL=y ++CONFIG_DM_ETH=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MDIO_MUX_MMIOREG=y ++CONFIG_MESON_GXL_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXL=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_GXL=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-docs.patch b/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-docs.patch new file mode 100644 index 0000000000..b4848ca58e --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-ARM-amlogic-add-JetHub-D1-H1-docs.patch @@ -0,0 +1,391 @@ +From e4e87754aff3c9e961f12ae46426ac05132c1f16 Mon Sep 17 00:00:00 2001 +From: Vyacheslav Bocharov +Date: Mon, 20 Sep 2021 11:40:16 +0300 +Subject: [PATCH 18/30] FROMGIT: ARM: amlogic: add JetHub D1/H1 docs + +Fix doc/board/amlogic/index.rst: +- Add S905W to S905X column. +- Add JetHub devices to the corresponding columns. +- Fix tabs to spaces for table alignment + +Add doc/board/amlogic files: +- jethub-j100.rst +- jethub-j80.rst + +Signed-off-by: Vyacheslav Bocharov +Reviewed-by: Neil Armstrong +Signed-off-by: Neil Armstrong +--- + doc/board/amlogic/index.rst | 128 +++++++++++++++--------------- + doc/board/amlogic/jethub-j100.rst | 108 +++++++++++++++++++++++++ + doc/board/amlogic/jethub-j80.rst | 97 ++++++++++++++++++++++ + 3 files changed, 270 insertions(+), 63 deletions(-) + create mode 100644 doc/board/amlogic/jethub-j100.rst + create mode 100644 doc/board/amlogic/jethub-j80.rst + +diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst +index 2913ab281a..c18f1b7e71 100644 +--- a/doc/board/amlogic/index.rst ++++ b/doc/board/amlogic/index.rst +@@ -10,69 +10,69 @@ An up-do-date matrix is also available on: http://linux-meson.com + + This matrix concerns the actual source code version. + +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 | +-| | | S805X | S905D | | S905D2 | A311D | S905D3 | +-| | | | | | S905Y2 | | | +-+===============================+===========+=================+==============+============+============+=============+==============+ +-| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | +-| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L | +-| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | +-| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | +-| | | | | | | | BananaPi-M5 | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Infrared Decoder | No | No | No | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| SPI (CC) | No | No | No | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| NAND | No | No | No | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| CEC | No | No | No | *N/A* | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| Thermal Sensor | No | No | No | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| LCD/LVDS Output | No | *N/A* | No | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +-| PCIe (+NVMe) | *N/A* | *N/A* | *N/A* | **Yes** | **Yes** | **Yes** | **Yes** | +-+-------------------------------+-----------+-----------------+--------------+------------+------------+-------------+--------------+ +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 | ++| | | S805X | S905D | | S905D2 | A311D | S905D3 | ++| | | S905W | | | S905Y2 | | | +++===============================+===========+=================+==============+=============+============+=============+==============+ ++| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | ++| | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | ++| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | ++| | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | ++| | | JetHub J80 | | | | | BananaPi-M5 | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| PWM | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Infrared Decoder | No | No | No | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| SPI (CC) | No | No | No | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| USB | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| USB OTG | No | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| NAND | No | No | No | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| CEC | No | No | No | *N/A* | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| Thermal Sensor | No | No | No | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| LCD/LVDS Output | No | *N/A* | No | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| MIPI DSI Output | *N/A* | *N/A* | *N/A* | No | No | No | No | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ ++| PCIe (+NVMe) | *N/A* | *N/A* | *N/A* | **Yes** | **Yes** | **Yes** | **Yes** | +++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ + + Board Documentation + ------------------- +@@ -82,6 +82,8 @@ Board Documentation + + beelink-gtking + beelink-gtkingpro ++ jethub-j100 ++ jethub-j80 + khadas-vim2 + khadas-vim3l + khadas-vim3 +diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst +new file mode 100644 +index 0000000000..58602787d3 +--- /dev/null ++++ b/doc/board/amlogic/jethub-j100.rst +@@ -0,0 +1,108 @@ ++.. SPDX-License-Identifier: GPL-2.0+ ++ ++U-Boot for JetHub J100 ++======================= ++ ++JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation ++controller manufactured by JetHome with the following specifications: ++ ++ - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz ++ - no video out ++ - 512Mb/1GB DDR3 ++ - 8/16GB eMMC flash ++ - 1 x USB 2.0 ++ - 1 x 10/100Mbps ethernet ++ - WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE ++ 802.11a/b/g/n/ac, Bluetooth 4.2. ++ - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output ++ power and Zigbee 3.0 support. ++ - 2 x gpio LEDS ++ - GPIO user Button ++ - 1 x 1-Wire ++ - 2 x RS-485 ++ - 4 x dry contact digital GPIO inputs ++ - 3 x relay GPIO outputs ++ - DC source with a voltage of 9 to 56 V / Passive POE ++ - DIN Rail Mounting case ++ ++U-Boot compilation ++------------------ ++ ++.. code-block:: bash ++ ++ $ export CROSS_COMPILE=aarch64-none-elf- ++ $ make jethub_j100_defconfig ++ $ make ++ ++Image creation ++-------------- ++ ++Amlogic doesn't provide sources for the firmware and for tools needed ++to create the bootloader image, so it is necessary to obtain binaries ++from the git tree published by the board vendor: ++ ++.. code-block:: bash ++ ++ $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot ++ $ cd jethub-u-boot ++ $ export FIPDIR=$PWD ++ ++Go back to mainline U-boot source tree then : ++ ++.. code-block:: bash ++ ++ $ mkdir fip ++ ++ $ cp $FIPDIR/j100/bl2.bin fip/ ++ $ cp $FIPDIR/j100/acs.bin fip/ ++ $ cp $FIPDIR/j100/bl21.bin fip/ ++ $ cp $FIPDIR/j100/bl30.bin fip/ ++ $ cp $FIPDIR/j100/bl301.bin fip/ ++ $ cp $FIPDIR/j100/bl31.img fip/ ++ $ cp u-boot.bin fip/bl33.bin ++ ++ $ $FIPDIR/blx_fix.sh \ ++ fip/bl30.bin \ ++ fip/zero_tmp \ ++ fip/bl30_zero.bin \ ++ fip/bl301.bin \ ++ fip/bl301_zero.bin \ ++ fip/bl30_new.bin \ ++ bl30 ++ ++ $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 ++ ++ $ $FIPDIR/blx_fix.sh \ ++ fip/bl2_acs.bin \ ++ fip/zero_tmp \ ++ fip/bl2_zero.bin \ ++ fip/bl21.bin \ ++ fip/bl21_zero.bin \ ++ fip/bl2_new.bin \ ++ bl2 ++ ++ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \ ++ --output fip/bl30_new.bin.enc \ ++ --level v3 --type bl30 ++ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl31.img \ ++ --output fip/bl31.img.enc \ ++ --level v3 --type bl31 ++ $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \ ++ --output fip/bl33.bin.enc \ ++ --level v3 --type bl33 ++ $ $FIPDIR/j100/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \ ++ --output fip/bl2.n.bin.sig ++ $ $FIPDIR/j100/aml_encrypt_axg --bootmk \ ++ --output fip/u-boot.bin \ ++ --bl2 fip/bl2.n.bin.sig \ ++ --bl30 fip/bl30_new.bin.enc \ ++ --bl31 fip/bl31.img.enc \ ++ --bl33 fip/bl33.bin.enc --level v3 ++ ++and then write the image to eMMC with: ++ ++.. code-block:: bash ++ ++ $ DEV=/dev/your_emmc_device ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 +diff --git a/doc/board/amlogic/jethub-j80.rst b/doc/board/amlogic/jethub-j80.rst +new file mode 100644 +index 0000000000..6b7bdc78b1 +--- /dev/null ++++ b/doc/board/amlogic/jethub-j80.rst +@@ -0,0 +1,97 @@ ++.. SPDX-License-Identifier: GPL-2.0+ ++ ++U-Boot for JetHub J80 ++====================== ++ ++JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation ++controller manufactured by JetHome with the following specifications: ++ ++ - Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz ++ - No video out ++ - 1GB DDR3 ++ - 8/16GB eMMC flash ++ - 2 x USB 2.0 ++ - 1 x 10/100Mbps ethernet ++ - SDIO WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0. ++ - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output ++ power and Zigbee 3.0 support. ++ - MicroSD 2.x/3.x/4.x DS/HS cards. ++ - 1 x gpio LED ++ - ADC user Button ++ - DC source 5V microUSB ++ - Square plastic case ++ ++U-Boot compilation ++------------------ ++ ++.. code-block:: bash ++ ++ $ export CROSS_COMPILE=aarch64-none-elf- ++ $ make jethub_j80_defconfig ++ $ make ++ ++Image creation ++-------------- ++ ++Amlogic doesn't provide sources for the firmware and for tools needed ++to create the bootloader image, so it is necessary to obtain binaries ++from the git tree published by the board vendor: ++ ++.. code-block:: bash ++ ++ $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot ++ $ cd jethub-u-boot ++ $ export FIPDIR=$PWD ++ ++Go back to mainline U-Boot source tree then : ++ ++.. code-block:: bash ++ ++ $ mkdir fip ++ ++ $ cp $FIPDIR/j80/bl2.bin fip/ ++ $ cp $FIPDIR/j80/acs.bin fip/ ++ $ cp $FIPDIR/j80/bl21.bin fip/ ++ $ cp $FIPDIR/j80/bl30.bin fip/ ++ $ cp $FIPDIR/j80/bl301.bin fip/ ++ $ cp $FIPDIR/j80/bl31.img fip/ ++ $ cp u-boot.bin fip/bl33.bin ++ ++ $ $FIPDIR/blx_fix.sh \ ++ fip/bl30.bin \ ++ fip/zero_tmp \ ++ fip/bl30_zero.bin \ ++ fip/bl301.bin \ ++ fip/bl301_zero.bin \ ++ fip/bl30_new.bin \ ++ bl30 ++ ++ $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 ++ ++ $ $FIPDIR/blx_fix.sh \ ++ fip/bl2_acs.bin \ ++ fip/zero_tmp \ ++ fip/bl2_zero.bin \ ++ fip/bl21.bin \ ++ fip/bl21_zero.bin \ ++ fip/bl2_new.bin \ ++ bl2 ++ ++ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin ++ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl31.img ++ $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl33.bin --compress lz4 ++ $ $FIPDIR/j80/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig ++ $ $FIPDIR/j80/aml_encrypt_gxl --bootmk \ ++ --output fip/u-boot.bin \ ++ --bl2 fip/bl2.n.bin.sig \ ++ --bl30 fip/bl30_new.bin.enc \ ++ --bl31 fip/bl31.img.enc \ ++ --bl33 fip/bl33.bin.enc ++ ++and then write the image to SD/eMMC with: ++ ++.. code-block:: bash ++ ++ $ DEV=/dev/your_sd_device ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-ARM-dts-sort-Amlogic-Makefile-section.patch b/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-ARM-dts-sort-Amlogic-Makefile-section.patch new file mode 100644 index 0000000000..05b833852f --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-ARM-dts-sort-Amlogic-Makefile-section.patch @@ -0,0 +1,60 @@ +From 4fba951d8285c969f9701ae080034cc8129dec83 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 15 Sep 2021 01:46:56 +0000 +Subject: [PATCH 19/30] FROMGIT: ARM: dts: sort Amlogic Makefile section + +Alpha sort the Amlogic dtb list (same as the kernel). + +Signed-off-by: Christian Hewitt +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index d1893a9812..f0ab716409 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -158,31 +158,31 @@ dtb-$(CONFIG_ARCH_S5P4418) += \ + s5p4418-nanopi2.dtb + + dtb-$(CONFIG_ARCH_MESON) += \ ++ meson-axg-s400.dtb \ ++ meson-axg-jethome-jethub-j100.dtb \ + meson-gxbb-nanopi-k2.dtb \ + meson-gxbb-odroidc2.dtb \ + meson-gxbb-nanopi-k2.dtb \ + meson-gxbb-p200.dtb \ + meson-gxbb-p201.dtb \ +- meson-gxl-s905x-p212.dtb \ + meson-gxl-s805x-libretech-ac.dtb \ +- meson-gxl-s905x-libretech-cc.dtb \ +- meson-gxl-s905x-libretech-cc-v2.dtb \ +- meson-gxl-s905x-khadas-vim.dtb \ + meson-gxl-s905d-libretech-pc.dtb \ + meson-gxl-s905w-jethome-jethub-j80.dtb \ ++ meson-gxl-s905x-khadas-vim.dtb \ ++ meson-gxl-s905x-libretech-cc.dtb \ ++ meson-gxl-s905x-libretech-cc-v2.dtb \ ++ meson-gxl-s905x-p212.dtb \ + meson-gxm-khadas-vim2.dtb \ + meson-gxm-s912-libretech-pc.dtb \ + meson-gxm-wetek-core2.dtb \ +- meson-axg-s400.dtb \ +- meson-axg-jethome-jethub-j100.dtb \ +- meson-g12a-u200.dtb \ + meson-g12a-sei510.dtb \ ++ meson-g12a-u200.dtb \ ++ meson-g12b-a311d-khadas-vim3.dtb \ + meson-g12b-gtking.dtb \ + meson-g12b-gtking-pro.dtb \ + meson-g12b-gsking-x.dtb \ + meson-g12b-odroid-n2.dtb \ + meson-g12b-odroid-n2-plus.dtb \ +- meson-g12b-a311d-khadas-vim3.dtb \ + meson-sm1-bananapi-m5.dtb \ + meson-sm1-khadas-vim3l.dtb \ + meson-sm1-odroid-c4.dtb \ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-ARM-dts-add-support-for-Radxa-Zero.patch b/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-ARM-dts-add-support-for-Radxa-Zero.patch new file mode 100644 index 0000000000..3028c9b53d --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-ARM-dts-add-support-for-Radxa-Zero.patch @@ -0,0 +1,456 @@ +From 27730602a803186eed0e319bc620c4c08dba78aa Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 15 Sep 2021 01:46:57 +0000 +Subject: [PATCH 20/30] FROMGIT: ARM: dts: add support for Radxa Zero + +Import the initial dts queued for Linux 5.16.y + +Signed-off-by: Christian Hewitt +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 1 + + .../arm/dts/meson-g12a-radxa-zero-u-boot.dtsi | 7 + + arch/arm/dts/meson-g12a-radxa-zero.dts | 405 ++++++++++++++++++ + 3 files changed, 413 insertions(+) + create mode 100644 arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-g12a-radxa-zero.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index f0ab716409..742b404971 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -175,6 +175,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxm-khadas-vim2.dtb \ + meson-gxm-s912-libretech-pc.dtb \ + meson-gxm-wetek-core2.dtb \ ++ meson-g12a-radxa-zero.dtb \ + meson-g12a-sei510.dtb \ + meson-g12a-u200.dtb \ + meson-g12b-a311d-khadas-vim3.dtb \ +diff --git a/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi +new file mode 100644 +index 0000000000..236f2468dc +--- /dev/null ++++ b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-g12-common-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts +new file mode 100644 +index 0000000000..e3bb6df42f +--- /dev/null ++++ b/arch/arm/dts/meson-g12a-radxa-zero.dts +@@ -0,0 +1,405 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2018 BayLibre SAS. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++#include "meson-g12a.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "radxa,zero", "amlogic,g12a"; ++ model = "Radxa Zero"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ cvbs-connector { ++ status = "disabled"; ++ compatible = "composite-video-connector"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; ++ }; ++ ++ ao_5v: regulator-ao_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "AO_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vcc_1v8: regulator-vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ hdmi_pw: regulator-hdmi_pw { ++ compatible = "regulator-fixed"; ++ regulator-name = "HDMI_PW"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&ao_5v>; ++ regulator-always-on; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&ao_5v>; ++ regulator-always-on; ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&ao_5v>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "RADXA-ZERO"; ++ audio-aux-devs = <&tdmout_b>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-3 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&cec_AO { ++ pinctrl-0 = <&cec_ao_a_h_pins>; ++ pinctrl-names = "default"; ++ status = "disabled"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&cecb_AO { ++ pinctrl-0 = <&cec_ao_b_h_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_pw>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "disabled"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin0"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ ++/* SDIO */ ++&sd_emmc_a { ++ status = "okay"; ++ pinctrl-0 = <&sdio_pins>; ++ pinctrl-1 = <&sdio_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr50; ++ max-frequency = <100000000>; ++ ++ non-removable; ++ disable-wp; ++ ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ ++ mmc-pwrseq = <&sdio_pwrseq>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddao_1v8>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <100000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddao_3v3>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ ++&uart_A { ++ status = "okay"; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ max-speed = <2000000>; ++ clocks = <&wifi32k>; ++ clock-names = "lpo"; ++ }; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++ dr_mode = "host"; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-boards-amlogic-add-Radxa-Zero-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-boards-amlogic-add-Radxa-Zero-defconfig.patch new file mode 100644 index 0000000000..989b73c808 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-boards-amlogic-add-Radxa-Zero-defconfig.patch @@ -0,0 +1,105 @@ +From 029bd38e1e503ed676d2bd894e5402b62bbe26ed Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 15 Sep 2021 01:46:58 +0000 +Subject: [PATCH 21/30] FROMGIT: boards: amlogic: add Radxa Zero defconfig + +Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip. + +Signed-off-by: Christian Hewitt +[narmstrong: updated u200 MAINTAINERS] +Signed-off-by: Neil Armstrong +--- + board/amlogic/u200/MAINTAINERS | 1 + + configs/radxa-zero_defconfig | 70 ++++++++++++++++++++++++++++++++++ + 2 files changed, 71 insertions(+) + create mode 100644 configs/radxa-zero_defconfig + +diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS +index 655cf64a3d..73c73b1591 100644 +--- a/board/amlogic/u200/MAINTAINERS ++++ b/board/amlogic/u200/MAINTAINERS +@@ -5,4 +5,5 @@ L: u-boot-amlogic@groups.io + F: board/amlogic/u200/ + F: configs/u200_defconfig + F: configs/bananapi-m5_defconfig ++F: configs/radxa-zero_defconfig + F: doc/board/amlogic/u200.rst +diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig +new file mode 100644 +index 0000000000..acd13f1c6b +--- /dev/null ++++ b/configs/radxa-zero_defconfig +@@ -0,0 +1,70 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero" ++CONFIG_MESON_G12A=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" radxa-zero" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++# CONFIG_NET_RANDOM_ETHADDR is not set ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++# CONFIG_PHY_REALTEK is not set ++# CONFIG_DM_ETH is not set ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++# CONFIG_ETH_DESIGNWARE_MESON8B is not set ++CONFIG_MDIO_MUX_MESON_G12A=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-doc-boards-amlogic-update-for-Radxa-Zero.patch b/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-doc-boards-amlogic-update-for-Radxa-Zero.patch new file mode 100644 index 0000000000..766728bd28 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-doc-boards-amlogic-update-for-Radxa-Zero.patch @@ -0,0 +1,130 @@ +From c5f9aa2256a1cae64fef4a1dbc9e7540d8805e85 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 15 Sep 2021 01:46:59 +0000 +Subject: [PATCH 22/30] FROMGIT: doc: boards: amlogic: update for Radxa Zero + +Add documentation bits for the Radxa Zero + +Signed-off-by: Christian Hewitt +[narmstrong: updated u200 MAINTAINERS] +Signed-off-by: Neil Armstrong +--- + board/amlogic/u200/MAINTAINERS | 1 + + doc/board/amlogic/index.rst | 3 +- + doc/board/amlogic/radxa-zero.rst | 74 ++++++++++++++++++++++++++++++++ + 3 files changed, 77 insertions(+), 1 deletion(-) + create mode 100644 doc/board/amlogic/radxa-zero.rst + +diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS +index 73c73b1591..a259d12886 100644 +--- a/board/amlogic/u200/MAINTAINERS ++++ b/board/amlogic/u200/MAINTAINERS +@@ -7,3 +7,4 @@ F: configs/u200_defconfig + F: configs/bananapi-m5_defconfig + F: configs/radxa-zero_defconfig + F: doc/board/amlogic/u200.rst ++F: doc/board/amlogic/radxa-zero.rst +diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst +index c18f1b7e71..189b1efe2b 100644 +--- a/doc/board/amlogic/index.rst ++++ b/doc/board/amlogic/index.rst +@@ -17,7 +17,7 @@ This matrix concerns the actual source code version. + +===============================+===========+=================+==============+=============+============+=============+==============+ + | Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 | + | | Nanopi-K2 | Khadas-VIM | Libretech-PC | JetHub J100 | SEI510 | Khadas-VIM3 | Khadas-VIM3L | +-| | P200 | LibreTech-CC v1 | WeTek Core2 | | | GT-King/Pro | Odroid-C4 | ++| | P200 | LibreTech-CC v1 | WeTek Core2 | | Radxa Zero | GT-King/Pro | Odroid-C4 | + | | P201 | LibreTech-AC v2 | | | | GSKing-X | Odroid-HC4 | + | | | JetHub J80 | | | | | BananaPi-M5 | + +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ +@@ -98,6 +98,7 @@ Board Documentation + p201 + p212 + q200 ++ radxa-zero + s400 + sei510 + sei610 +diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero.rst +new file mode 100644 +index 0000000000..423403f3c7 +--- /dev/null ++++ b/doc/board/amlogic/radxa-zero.rst +@@ -0,0 +1,74 @@ ++.. SPDX-License-Identifier: GPL-2.0+ ++ ++U-Boot for Radxa Zero ++===================== ++ ++Radxa Zero is a small form factor SBC based on the Amlogic S905Y2 ++chipset that ships in a number of RAM/eMMC configurations: ++ ++Boards with 512MB/1GB LPDDR4 RAM have no eMMC storage and BCM43436 ++wireless (2.4GHz b/g/n) while 2GB/4GB boards have 8/16/32/64/128GB ++eMMC storage and BCM4345 wireless (2.4/5GHz a/b/g/n/ac). ++ ++- Amlogic S905Y2 quad-core Cortex-A53 ++- Mali G31-MP2 GPU ++- HDMI 2.1 output (micro) ++- 1x USB 2.0 port - Type C (OTG) ++- 1x USB 3.0 port - Type C (Host) ++- 1x micro SD Card slot ++- 40 Pin GPIO header ++ ++Schematics are available on the manufacturer website: ++ ++https://dl.radxa.com/zero/docs/hw/RADAX_ZERO_V13_SCH_20210309.pdf ++ ++U-Boot compilation ++------------------ ++ ++.. code-block:: bash ++ ++ $ export CROSS_COMPILE=aarch64-none-elf- ++ $ make radxa-zero_defconfig ++ $ make ++ ++Image creation ++-------------- ++ ++Amlogic does not provide sources for the firmware and for tools needed ++to create the bootloader image, so it is necessary to obtain them from ++git trees published by the board vendor: ++ ++.. code-block:: bash ++ ++ $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git ++ $ git clone https://github.com/radxa/fip.git ++ ++ $ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev ++ $ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools ++ ++ $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz ++ $ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt ++ ++ $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- ++ $ export ARCH=arm ++ $ cd u-boot ++ $ make radxa-zero_defconfig ++ $ make ++ ++ $ cp u-boot.bin ../fip/radxa-zero/bl33.bin ++ $ cd ../fip/radxa-zero ++ $ make ++ ++This will generate: ++ ++.. code-block:: bash ++ ++ $ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl ++ ++Then write the image to SD with: ++ ++.. code-block:: bash ++ ++ $ DEV=/dev/your_sd_device ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 ++ $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0023-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch b/projects/Amlogic/patches/u-boot/u-boot-0023-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch new file mode 100644 index 0000000000..ddf9d34708 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0023-WIP-ARM-dts-import-WeTek-Hub-Play2-DTs-from-Linux-5..patch @@ -0,0 +1,548 @@ +From 39890cba3c5eeaa63cbe999c5368a0a5862499ed Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 20 Apr 2021 05:19:43 +0000 +Subject: [PATCH 23/30] WIP: ARM: dts: import WeTek Hub/Play2 DTs from Linux + 5.14 + +Import the WeTek common dtsi and Hub/Play2 device-trees. + +Signed-off-by: Christian Hewitt +--- + arch/arm/dts/Makefile | 2 + + arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 + + arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 ++++ + .../dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 + + arch/arm/dts/meson-gxbb-wetek-play2.dts | 121 ++++++++ + arch/arm/dts/meson-gxbb-wetek.dtsi | 286 ++++++++++++++++++ + 6 files changed, 481 insertions(+) + create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts + create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts + create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 742b404971..43a1bfafbc 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -165,6 +165,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-nanopi-k2.dtb \ + meson-gxbb-p200.dtb \ + meson-gxbb-p201.dtb \ ++ meson-gxbb-wetek-hub.dtb \ ++ meson-gxbb-wetek-play2.dtb \ + meson-gxl-s805x-libretech-ac.dtb \ + meson-gxl-s905d-libretech-pc.dtb \ + meson-gxl-s905w-jethome-jethub-j80.dtb \ +diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi +new file mode 100644 +index 0000000000..c35158d7e9 +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts b/arch/arm/dts/meson-gxbb-wetek-hub.dts +new file mode 100644 +index 0000000000..58733017ed +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts +@@ -0,0 +1,58 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 BayLibre, Inc. ++ * Author: Neil Armstrong ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxbb-wetek.dtsi" ++#include ++ ++/ { ++ compatible = "wetek,hub", "amlogic,meson-gxbb"; ++ model = "WeTek Hub"; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "WETEK-HUB"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; ++}; ++ ++&ir { ++ linux,rc-map-name = "rc-wetek-hub"; ++}; +diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi +new file mode 100644 +index 0000000000..c35158d7e9 +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts b/arch/arm/dts/meson-gxbb-wetek-play2.dts +new file mode 100644 +index 0000000000..6eae692792 +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts +@@ -0,0 +1,121 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 BayLibre, Inc. ++ * Author: Neil Armstrong ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxbb-wetek.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "wetek,play2", "amlogic,meson-gxbb"; ++ model = "WeTek Play 2"; ++ ++ spdif_dit: audio-codec-0 { ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dit"; ++ status = "okay"; ++ sound-name-prefix = "DIT"; ++ }; ++ ++ leds { ++ led-wifi { ++ label = "wetek-play:wifi-status"; ++ gpios = <&gpio GPIODV_26 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ }; ++ ++ led-ethernet { ++ label = "wetek-play:ethernet-status"; ++ gpios = <&gpio GPIODV_27 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ }; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ poll-interval = <100>; ++ ++ button@0 { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "WETEK-PLAY2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>; ++ ++ codec-0 { ++ sound-dai = <&spdif_dit>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; ++ pinctrl-0 = <&spdif_out_y_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&i2c_A { ++ status = "okay"; ++ pinctrl-0 = <&i2c_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb1_phy { ++ status = "okay"; ++}; ++ ++&usb1 { ++ status = "okay"; ++}; ++ ++&ir { ++ linux,rc-map-name = "rc-wetek-play2"; ++}; +diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi +new file mode 100644 +index 0000000000..a350fee126 +--- /dev/null ++++ b/arch/arm/dts/meson-gxbb-wetek.dtsi +@@ -0,0 +1,286 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 Andreas Färber ++ * Copyright (c) 2016 BayLibre, Inc. ++ * Author: Kevin Hilman ++ */ ++ ++#include "meson-gxbb.dtsi" ++ ++/ { ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-system { ++ label = "wetek-play:system-status"; ++ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ panic-indicator; ++ }; ++ }; ++ ++ usb_pwr: regulator-usb-pwrs { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "USB_PWR"; ++ ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vddio_boot: regulator-vddio_boot { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_BOOT"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vddio_ao18: regulator-vddio_ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; ++ }; ++ ++ cvbs-connector { ++ compatible = "composite-video-connector"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++}; ++ ++&cec_AO { ++ status = "okay"; ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ ++ðmac { ++ status = "okay"; ++ pinctrl-0 = <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ ++ phy-handle = <ð_phy0>; ++ phy-mode = "rgmii"; ++ ++ amlogic,tx-delay-ns = <2>; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ eth_phy0: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <80000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_15 */ ++ interrupts = <29 IRQ_TYPE_LEVEL_LOW>; ++ }; ++ }; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddio_ao18>; ++}; ++ ++/* Wireless SDIO Module */ ++&sd_emmc_a { ++ status = "okay"; ++ pinctrl-0 = <&sdio_pins>; ++ pinctrl-1 = <&sdio_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ ++ non-removable; ++ disable-wp; ++ ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ ++ mmc-pwrseq = <&sdio_pwrseq>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vcc_3v3>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* This is connected to the Bluetooth module: */ ++&uart_A { ++ status = "okay"; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; ++ pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++/* This UART is brought out to the DB9 connector */ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb0_phy { ++ status = "okay"; ++ phy-supply = <&usb_pwr>; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0024-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch b/projects/Amlogic/patches/u-boot/u-boot-0024-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch new file mode 100644 index 0000000000..699a0c8282 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0024-WIP-ARM-dts-use-snps-reset-on-WeTek-devices-to-fix-E.patch @@ -0,0 +1,52 @@ +From a4a5411bf88f1f138eb4cd1edfd9de2be5154d22 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 20 Apr 2021 05:29:19 +0000 +Subject: [PATCH 24/30] WIP: ARM: dts: use snps,reset on WeTek devices to fix + Ethernet + +The sync of the device tree and dt-bindings from Linux v5.6-rc2 +11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on both +WeTek devices. The PHY seems to need proper reset timing to be +functional in U-Boot and Linux afterwards. Re-add the old PHY +reset bindings for dwmac until we support the new bindings in +the PHY node. + +Signed-off-by: Christian Hewitt +--- + arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 7 +++++++ + arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi | 7 +++++++ + 2 files changed, 14 insertions(+) + +diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi +index c35158d7e9..2a245bbe7f 100644 +--- a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi +@@ -5,3 +5,10 @@ + */ + + #include "meson-gx-u-boot.dtsi" ++ ++ðmac { ++ snps,reset-gpio = <&gpio GPIOZ_14 0>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++}; ++ +diff --git a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi +index c35158d7e9..2a245bbe7f 100644 +--- a/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi +@@ -5,3 +5,10 @@ + */ + + #include "meson-gx-u-boot.dtsi" ++ ++ðmac { ++ snps,reset-gpio = <&gpio GPIOZ_14 0>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++}; ++ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0025-WIP-ARM-dts-backport-fixups-patch-for-WeTek-Hub-Play.patch b/projects/Amlogic/patches/u-boot/u-boot-0025-WIP-ARM-dts-backport-fixups-patch-for-WeTek-Hub-Play.patch new file mode 100644 index 0000000000..d00d62e081 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0025-WIP-ARM-dts-backport-fixups-patch-for-WeTek-Hub-Play.patch @@ -0,0 +1,76 @@ +From 7c50f32f91d4d80bcc73e2ca58f96a7c68765f24 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 9 Sep 2021 16:03:42 +0000 +Subject: [PATCH 25/30] WIP: ARM: dts: backport fixups patch for WeTek + Hub/Play2 + +--- + arch/arm/dts/meson-gxbb-wetek.dtsi | 17 +++++++++++++---- + 1 file changed, 13 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/dts/meson-gxbb-wetek.dtsi b/arch/arm/dts/meson-gxbb-wetek.dtsi +index a350fee126..e414f36af8 100644 +--- a/arch/arm/dts/meson-gxbb-wetek.dtsi ++++ b/arch/arm/dts/meson-gxbb-wetek.dtsi +@@ -6,6 +6,8 @@ + */ + + #include "meson-gxbb.dtsi" ++#include ++#include + + / { + aliases { +@@ -25,8 +27,10 @@ + leds { + compatible = "gpio-leds"; + +- led-system { +- label = "wetek-play:system-status"; ++ led-blue { ++ /* red in suspend or power-off */ ++ color = ; ++ function = LED_FUNCTION_POWER; + gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>; + default-state = "on"; + panic-indicator; +@@ -64,6 +68,7 @@ + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; ++ regulator-always-on; + }; + + vcc_3v3: regulator-vcc_3v3 { +@@ -161,6 +166,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&vddio_ao18>; + }; + + &hdmi_tx_tmds_port { +@@ -199,7 +205,10 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <50000000>; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ max-frequency = <200000000>; + + non-removable; + disable-wp; +@@ -227,7 +236,7 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <50000000>; ++ max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0026-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch b/projects/Amlogic/patches/u-boot/u-boot-0026-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch new file mode 100644 index 0000000000..174b22c653 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0026-WIP-boards-amlogic-add-board-files-for-wetek-gxbb-de.patch @@ -0,0 +1,103 @@ +From 9016e83df512cf11547aeb308bc4f4d9af90d893 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Thu, 22 Apr 2021 05:45:29 +0000 +Subject: [PATCH 26/30] WIP: boards: amlogic: add board files for wetek-gxbb + devices + +These support the WeTek Hub and Play2 devices. + +Signed-off-by: Christian Hewitt +--- + board/amlogic/wetek-gxbb/MAINTAINERS | 8 +++++ + board/amlogic/wetek-gxbb/Makefile | 6 ++++ + board/amlogic/wetek-gxbb/wetek-gxbb.c | 50 +++++++++++++++++++++++++++ + 3 files changed, 64 insertions(+) + create mode 100644 board/amlogic/wetek-gxbb/MAINTAINERS + create mode 100644 board/amlogic/wetek-gxbb/Makefile + create mode 100644 board/amlogic/wetek-gxbb/wetek-gxbb.c + +diff --git a/board/amlogic/wetek-gxbb/MAINTAINERS b/board/amlogic/wetek-gxbb/MAINTAINERS +new file mode 100644 +index 0000000000..8aaa82ce17 +--- /dev/null ++++ b/board/amlogic/wetek-gxbb/MAINTAINERS +@@ -0,0 +1,8 @@ ++WETEK-GXBB ++M: Christian Hewitt ++S: Maintained ++L: u-boot-amlogic@groups.io ++F: board/amlogic/wetek-gxbb/ ++F: configs/wetek-hub_defconfig ++F: configs/wetek-play2_defconfig ++F: doc/board/amlogic/wetek-gxbb.rst +diff --git a/board/amlogic/wetek-gxbb/Makefile b/board/amlogic/wetek-gxbb/Makefile +new file mode 100644 +index 0000000000..7a5266b028 +--- /dev/null ++++ b/board/amlogic/wetek-gxbb/Makefile +@@ -0,0 +1,6 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++# (C) Copyright 2020 BayLibre, SAS ++# Author: Neil Armstrong ++ ++obj-y := wetek-gxbb.o +diff --git a/board/amlogic/wetek-gxbb/wetek-gxbb.c b/board/amlogic/wetek-gxbb/wetek-gxbb.c +new file mode 100644 +index 0000000000..fb07eefa53 +--- /dev/null ++++ b/board/amlogic/wetek-gxbb/wetek-gxbb.c +@@ -0,0 +1,50 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2016 Beniamino Galvani ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define EFUSE_MAC_OFFSET 0 ++#define EFUSE_MAC_SIZE 12 ++#define MAC_ADDR_LEN 6 ++ ++int misc_init_r(void) ++{ ++ u8 mac_addr[MAC_ADDR_LEN]; ++ char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3]; ++ ssize_t len; ++ ++ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { ++ len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, ++ efuse_mac_addr, EFUSE_MAC_SIZE); ++ if (len != EFUSE_MAC_SIZE) ++ return 0; ++ ++ /* MAC is stored in ASCII format, 1bytes = 2characters */ ++ for (int i = 0; i < 6; i++) { ++ tmp[0] = efuse_mac_addr[i * 2]; ++ tmp[1] = efuse_mac_addr[i * 2 + 1]; ++ tmp[2] = '\0'; ++ mac_addr[i] = simple_strtoul(tmp, NULL, 16); ++ } ++ ++ if (is_valid_ethaddr(mac_addr)) ++ eth_env_set_enetaddr("ethaddr", mac_addr); ++ else ++ meson_generate_serial_ethaddr(); ++ ++ eth_env_get_enetaddr("ethaddr", mac_addr); ++ } ++ ++ return 0; ++} +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0027-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0027-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch new file mode 100644 index 0000000000..835b18e5c3 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0027-WIP-boards-amlogic-add-WeTek-Hub-defconfig.patch @@ -0,0 +1,88 @@ +From ee8e14699c8eaaad66ddb9c4feaf69136c17f2ad Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Sat, 27 Feb 2021 06:03:00 +0000 +Subject: [PATCH 27/30] WIP: boards: amlogic: add WeTek Hub defconfig + +Signed-of-by: Christian Hewitt +--- + configs/wetek-hub_defconfig | 68 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 68 insertions(+) + create mode 100644 configs/wetek-hub_defconfig + +diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig +new file mode 100644 +index 0000000000..75560c9fe8 +--- /dev/null ++++ b/configs/wetek-hub_defconfig +@@ -0,0 +1,68 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="wetek-gxbb" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" wetek-hub" ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_ADC=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SARADC_MESON=y ++CONFIG_DM_I2C=y ++CONFIG_SYS_I2C_MESON=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_PHY=y ++CONFIG_MESON_GXBB_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXBB=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SYSINFO=y ++CONFIG_SYSINFO_SMBIOS=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_KEYBOARD=y ++# CONFIG_DM_VIDEO is not set ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++# CONFIG_SYS_WHITE_ON_BLACK is not set ++# CONFIG_VIDEO_MESON is not set ++# CONFIG_VIDEO_DT_SIMPLEFB is not set ++# CONFIG_SPLASH_SCREEN is not set ++# CONFIG_SPLASH_SCREEN_ALIGN is not set ++# CONFIG_VIDEO_BMP_RLE8 is not set ++CONFIG_BMP_16BPP=y ++CONFIG_BMP_24BPP=y ++CONFIG_BMP_32BPP=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0028-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch b/projects/Amlogic/patches/u-boot/u-boot-0028-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch new file mode 100644 index 0000000000..67272002b9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0028-WIP-boards-amlogic-add-WeTek-Play2-defconfig.patch @@ -0,0 +1,88 @@ +From b87da03bb2f7c8eb01926f8fd383c08228ff0211 Mon Sep 17 00:00:00 2001 +From: chewitt +Date: Sat, 27 Feb 2021 06:04:00 +0000 +Subject: [PATCH 28/30] WIP: boards: amlogic: add WeTek Play2 defconfig + +Signed-off-by: Christian Hewittt +--- + configs/wetek-play2_defconfig | 68 +++++++++++++++++++++++++++++++++++ + 1 file changed, 68 insertions(+) + create mode 100644 configs/wetek-play2_defconfig + +diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig +new file mode 100644 +index 0000000000..cc17b6afdf +--- /dev/null ++++ b/configs/wetek-play2_defconfig +@@ -0,0 +1,68 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="wetek-gxbb" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" wetek-play2" ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_ADC=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_I2C=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SARADC_MESON=y ++CONFIG_DM_I2C=y ++CONFIG_SYS_I2C_MESON=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_PHY=y ++CONFIG_MESON_GXBB_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXBB=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SYSINFO=y ++CONFIG_SYSINFO_SMBIOS=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_VIDEO_BMP_RLE8=y ++CONFIG_BMP_16BPP=y ++CONFIG_BMP_24BPP=y ++CONFIG_BMP_32BPP=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0029-WIP-boards-amlogic-add-CONFIG_DM_USB-to-Odroid-HC4.patch b/projects/Amlogic/patches/u-boot/u-boot-0029-WIP-boards-amlogic-add-CONFIG_DM_USB-to-Odroid-HC4.patch new file mode 100644 index 0000000000..4815257e3b --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0029-WIP-boards-amlogic-add-CONFIG_DM_USB-to-Odroid-HC4.patch @@ -0,0 +1,27 @@ +From 3969e7f4780855dda78ea8ffa8819f9ca3773287 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 21 Sep 2021 17:54:02 +0000 +Subject: [PATCH 29/30] WIP: boards: amlogic: add CONFIG_DM_USB to Odroid-HC4 + +This is required for 2021.07 but can be dropped with 2021.10/2022.01 + +Signed-off-by: Christian Hewitt +--- + configs/odroid-hc4_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig +index 7671496218..e95301db61 100644 +--- a/configs/odroid-hc4_defconfig ++++ b/configs/odroid-hc4_defconfig +@@ -64,6 +64,7 @@ CONFIG_MESON_SERIAL=y + CONFIG_SPI=y + CONFIG_DM_SPI=y + CONFIG_MESON_SPIFC=y ++CONFIG_DM_USB=y + CONFIG_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0030-WIP-boards-amlogic-add-CONFIG_DM_ETH-to-Radxa-Zero.patch b/projects/Amlogic/patches/u-boot/u-boot-0030-WIP-boards-amlogic-add-CONFIG_DM_ETH-to-Radxa-Zero.patch new file mode 100644 index 0000000000..c54816d927 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0030-WIP-boards-amlogic-add-CONFIG_DM_ETH-to-Radxa-Zero.patch @@ -0,0 +1,32 @@ +From 0c92a1152843384f45d399528762c9aa20a1aa14 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Sat, 30 Oct 2021 09:44:52 +0000 +Subject: [PATCH 30/30] WIP: boards: amlogic: add CONFIG_DM_ETH to Radxa Zero + +Radxa Zero does not have on-board Ethernet hardware but the common +Amlogic board/SoC files have dependencies on Ethernet code, so we +see the driver-model migration warning during u-boot compile. This +adds the required CONFIG_DM_ETH to the board config, which does no +harm and silences the warning. + +Signed-off-by: Christian Hewitt +--- + configs/radxa-zero_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig +index acd13f1c6b..88a984bb53 100644 +--- a/configs/radxa-zero_defconfig ++++ b/configs/radxa-zero_defconfig +@@ -29,7 +29,7 @@ CONFIG_MMC_MESON_GX=y + CONFIG_MTD=y + CONFIG_DM_MTD=y + # CONFIG_PHY_REALTEK is not set +-# CONFIG_DM_ETH is not set ++CONFIG_DM_ETH=y + CONFIG_DM_MDIO=y + CONFIG_DM_MDIO_MUX=y + # CONFIG_ETH_DESIGNWARE_MESON8B is not set +-- +2.17.1 +