Merge pull request #9508 from chewitt/amlogic-upstream

linux: bump Amlogic kernel to 6.12.y
This commit is contained in:
CvH 2024-11-21 19:09:49 +01:00 committed by GitHub
commit ed80833f4f
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42 changed files with 2179 additions and 1136 deletions

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@ -16,11 +16,11 @@ PKG_PATCH_DIRS="${LINUX}"
case "${LINUX}" in
amlogic)
PKG_VERSION="05b1367d372aca98a4e09c1a0e7ff0b9d721b2bc" # 6.11.5
PKG_SHA256="620a6206fadecdc3950b1e83eba5241df20e8e45b4e14496af4774d95764b141"
PKG_VERSION="adc218676eef25575469234709c2d87185ca223a" # 6.12.0
PKG_SHA256="8787cc90ca7740ab7c955b6fad83010dc600f14a6d94511b548703e4f0f40caa"
PKG_URL="https://github.com/torvalds/linux/archive/${PKG_VERSION}.tar.gz"
PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz"
PKG_PATCH_DIRS="default rtlwifi/6.12 rtlwifi/after-6.12"
PKG_PATCH_DIRS="default rtlwifi/after-6.12"
;;
raspberrypi)
PKG_VERSION="66aef6ce3557edd9d58d794e4a800c5be49ca0e7" # 6.6.60

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@ -1,7 +1,7 @@
From 1f8a8dd773396c9b62c0b407ff66312740e8b17b Mon Sep 17 00:00:00 2001
From ae45bee318f2e099ad18653f7fba72c68013823d Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:41:51 +0000
Subject: [PATCH 01/35] LOCAL: set meson-gx cma pool to 896MB
Subject: [PATCH 01/36] LOCAL: set meson-gx cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use

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@ -1,7 +1,7 @@
From d50541a95057fa0d9e1878caacc8c61fcef4e34b Mon Sep 17 00:00:00 2001
From 289e538ffbb00ad95b8825ac42bc310809022a3f Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Wed, 14 Aug 2019 19:58:14 +0000
Subject: [PATCH 02/35] LOCAL: set meson-g12 cma pool to 896MB
Subject: [PATCH 02/36] LOCAL: set meson-g12 cma pool to 896MB
This change sets the CMA pool to a larger 896MB! value for vdec use

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@ -1,7 +1,7 @@
From c009e6c4f96369f43cd5d340f2896d2462d5de60 Mon Sep 17 00:00:00 2001
From d4874464291f301cadc008da9dd592c12395ea17 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 13 Apr 2019 05:45:18 +0000
Subject: [PATCH 03/35] LOCAL: arm64: fix Kodi sysinfo CPU information
Subject: [PATCH 03/36] LOCAL: arm64: fix Kodi sysinfo CPU information
This allows the CPU information to show in the Kodi sysinfo screen, e.g.
@ -13,10 +13,10 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 09eeaa24d456..b7bf422ce536 100644
index 44718d0482b3..1c6721d1b6b9 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -205,8 +205,7 @@ static int c_show(struct seq_file *m, void *v)
@@ -206,8 +206,7 @@ static int c_show(struct seq_file *m, void *v)
* "processor". Give glibc what it expects.
*/
seq_printf(m, "processor\t: %d\n", i);

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@ -1,7 +1,7 @@
From 56481fb881d909e5ac9e68b2f958453a1ba67bc7 Mon Sep 17 00:00:00 2001
From 0c5d37a5f6ad2281f71c66a8acffef2c2a67b6c2 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:23 +0100
Subject: [PATCH 04/35] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
Subject: [PATCH 04/36] LOCAL: arm64: meson: add Amlogic Meson GX PM Suspend
The Amlogic Meson GX SoCs uses a non-standard argument to the
PSCI CPU_SUSPEND call to enter system suspend.

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@ -1,7 +1,7 @@
From 44cc4cb767d96b9c66e214a550c54d12eb2469a3 Mon Sep 17 00:00:00 2001
From 86ffbbed967edf0974ca3c242faaa3c38ceed7c3 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Thu, 3 Nov 2016 15:29:25 +0100
Subject: [PATCH 05/35] LOCAL: arm64: dts: meson: add support for GX PM and
Subject: [PATCH 05/36] LOCAL: arm64: dts: meson: add support for GX PM and
Virtual RTC
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

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@ -1,7 +1,7 @@
From 595fe6dde1371f59de9018637bb6ea30e0d81e28 Mon Sep 17 00:00:00 2001
From 7ae256c16de158201ec34e0ec7bacc24d713c7af Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 21 Jan 2021 01:35:36 +0000
Subject: [PATCH 06/35] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Subject: [PATCH 06/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Khadas VIM
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index fea65f20523a..dacbca73279c 100644
index a80f0ea2773b..0741d34945bb 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -29,6 +29,8 @@ button-function {

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@ -1,7 +1,7 @@
From 3b2e31b827e4c401787afcd9064d89a586b51eb6 Mon Sep 17 00:00:00 2001
From ba73f621cfb1ad3ce4cea6ecee4ed641bdb5e111 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 6 Nov 2021 13:01:08 +0000
Subject: [PATCH 07/35] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Subject: [PATCH 07/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to
Khadas VIM2
Add aliases to ensure the vrtc time (which normally proves first) is /dev/rtc1
@ -13,7 +13,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 07e7c3bedea0..a03269a00486 100644
index 96a3dd2d8a99..544c757f8bb7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -18,6 +18,8 @@ / {

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@ -1,7 +1,7 @@
From a4f47c9488db37ca73a3338f5508d939a3da2fc1 Mon Sep 17 00:00:00 2001
From 03f2673869392a11ec941acd4408a4bbcebff1db Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Mon, 1 Feb 2021 19:27:40 +0000
Subject: [PATCH 08/35] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
Subject: [PATCH 08/36] LOCAL: arm64: dts: meson: add rtc/vrtc aliases to Minix
NEO U9-H
Add node aliases to prevent meson-vrtc from claiming /dev/rtc0

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@ -1,7 +1,7 @@
From 0ddd7b0801bd3e83baecd21693d38ba7517f6d74 Mon Sep 17 00:00:00 2001
From 9097390dd2de048a9060d8161e3e63c3ef6fa60f Mon Sep 17 00:00:00 2001
From: Anssi Hannula <anssi.hannula@iki.fi>
Date: Sun, 17 Apr 2022 04:37:48 +0000
Subject: [PATCH 09/35] LOCAL: ASoC: meson: assign internal PCM
Subject: [PATCH 09/36] LOCAL: ASoC: meson: assign internal PCM
chmap/ELD/IEC958 kctls to device 0
On SoC sound devices utilizing codec2codec DAI links with an HDMI codec the kctls
@ -24,10 +24,10 @@ Tested-by: Christian Hewitt <christianshewitt@gmail.com>
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/sound/core/pcm_lib.c b/sound/core/pcm_lib.c
index 6e7905749c4a..f554295cc132 100644
index 6eaa950504cf..dbcf1f613fb4 100644
--- a/sound/core/pcm_lib.c
+++ b/sound/core/pcm_lib.c
@@ -2609,7 +2609,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream,
@@ -2612,7 +2612,10 @@ int snd_pcm_add_chmap_ctls(struct snd_pcm *pcm, int stream,
knew.name = "Playback Channel Map";
else
knew.name = "Capture Channel Map";

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@ -1,7 +1,7 @@
From 4691141558d9cd4a25d1a701c59083849e9c54dc Mon Sep 17 00:00:00 2001
From 918be36f2c344001714de256962c4b69a489056c Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 5 Jan 2023 15:16:46 +0000
Subject: [PATCH 10/35] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
Subject: [PATCH 10/36] LOCAL: media: meson: vdec: disable MPEG1/MPEG2 hardware
decoding
The MPEG1/2 decoder is broken and nobody has volunteered to poke
@ -15,7 +15,7 @@ Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 file changed, 110 deletions(-)
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
index 70c9fd7c8bc5..f1df637681e5 100644
index 66bb307db85a..75d295fdb5f8 100644
--- a/drivers/staging/media/meson/vdec/vdec_platform.c
+++ b/drivers/staging/media/meson/vdec/vdec_platform.c
@@ -26,28 +26,6 @@ static const struct amvdec_format vdec_formats_gxbb[] = {
@ -76,7 +76,7 @@ index 70c9fd7c8bc5..f1df637681e5 100644
},
};
@@ -126,28 +82,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
@@ -164,28 +120,6 @@ static const struct amvdec_format vdec_formats_gxm[] = {
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
.flags = V4L2_FMT_FLAG_COMPRESSED |
V4L2_FMT_FLAG_DYN_RESOLUTION,
@ -105,7 +105,7 @@ index 70c9fd7c8bc5..f1df637681e5 100644
},
};
@@ -176,28 +110,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
@@ -214,28 +148,6 @@ static const struct amvdec_format vdec_formats_g12a[] = {
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
.flags = V4L2_FMT_FLAG_COMPRESSED |
V4L2_FMT_FLAG_DYN_RESOLUTION,
@ -134,7 +134,7 @@ index 70c9fd7c8bc5..f1df637681e5 100644
},
};
@@ -226,28 +138,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
@@ -264,28 +176,6 @@ static const struct amvdec_format vdec_formats_sm1[] = {
.pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
.flags = V4L2_FMT_FLAG_COMPRESSED |
V4L2_FMT_FLAG_DYN_RESOLUTION,

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@ -1,831 +0,0 @@
From 8c7e90a5dacf95f777c1f4b002670668b13b164d Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 28 Aug 2024 15:53:56 +0200
Subject: [PATCH 11/35] FROMGIT(6.12): arm64: dts: amlogic: add clock and
clock-names to sound cards
Add the missing clocks in the sound card nodes according to the
AXG and GX sound card bindings changes.
It solves the following errors:
sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
from schema $id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#
sound: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
from schema $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
sound: 'anyOf' conditional failed, one must be fixed:
'clocks' is a required property
'#clock-cells' is a required property
from schema $id: http://devicetree.org/schemas/clock/clock.yaml#
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240828-topic-amlogic-upstream-bindings-fixes-audio-snd-card-v2-3-58159abf0779@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 4 ++++
.../boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts | 4 ++++
.../dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi | 6 ++++++
arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts | 4 ++++
.../arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 ++++
.../boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts | 4 ++++
.../arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts | 5 +++++
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts | 4 ++++
50 files changed, 203 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index 7ed526f45175..9611775b81ee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -268,6 +268,10 @@ sound {
"Speaker1 Right", "SPK1 OUT_D",
"Linein AINL", "Linein",
"Linein AINR", "Linein";
+ clocks = <&clkc CLKID_HIFI_PLL>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
index af211d8f3952..a457b3f4397b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
@@ -176,6 +176,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
index 15b9bc280706..c779a5da7d1e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
@@ -138,6 +138,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
index 61cb8135a392..ea51341f031b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
@@ -201,6 +201,10 @@ sound {
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
index 0e239939ade6..f70a46967e2b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
@@ -238,6 +238,10 @@ sound {
"Lineout", "10U2 OUTL",
"Lineout", "10U2 OUTR";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index 05c7a1e3f1b7..32f98a192494 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -158,6 +158,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
index 13d478f9c891..2d74456e685d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts
@@ -70,6 +70,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
index 003efed529ba..0f48c32bec97 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts
@@ -79,6 +79,10 @@ sound {
"LINPUT1", "Mic Jack",
"Mic Jack", "MICB";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
index 6a346cb86a53..d4e1990b5f26 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
@@ -194,6 +194,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
index 3a24c2411552..de35fa2d7a6d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi
@@ -38,6 +38,12 @@ sound {
"SPDIFOUT_A IN 0", "FRDDR_A OUT 3",
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
index bb73e10b5e74..369c5cf889b6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts
@@ -48,6 +48,10 @@ sound {
"TDMOUT_A IN 2", "FRDDR_C OUT 1",
"TDM_A Playback", "TDMOUT_A OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
index 6eeedd54ab91..654449afd3a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts
@@ -49,6 +49,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
index 0da386cabe1a..e20311386745 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts
@@ -37,6 +37,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
index eed2a23047ca..e21831dfceee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
@@ -234,6 +234,10 @@ sound {
"Internal Speakers", "Speaker Amplifier OUTL",
"Internal Speakers", "Speaker Amplifier OUTR";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 86eb81112232..3bca8023638d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -95,6 +95,10 @@ sound {
"Lineout", "U19 OUTL",
"Lineout", "U19 OUTR";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
index e26f3e3258e1..1b9097a30251 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts
@@ -39,6 +39,10 @@ sound {
"TODDR_B IN 6", "TDMIN_LB OUT",
"TODDR_C IN 6", "TDMIN_LB OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
index 8445701100d0..39feba7f2d08 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
@@ -176,6 +176,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
index 6396f190d703..4c1a75b926ee 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts
@@ -32,6 +32,10 @@ sound {
"SPDIFOUT_A IN 1", "FRDDR_B OUT 3",
"SPDIFOUT_A IN 2", "FRDDR_C OUT 3";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
index efd662a452e8..d38c3a224fbe 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi
@@ -194,6 +194,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"7J4-14 LEFT", "AU2 OUTL",
"7J4-11 RIGHT", "AU2 OUTR";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 08d6b69ba469..45ccddd1aaf0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -129,6 +129,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
index f28452b9f00f..073b47ce8c3c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts
@@ -45,6 +45,10 @@ button-reset {
sound {
compatible = "amlogic,gx-sound-card";
model = "KII-PRO";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
index 1fd2e56e6b08..cf2e2ef81680 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
@@ -135,6 +135,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NANOPI-K2";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index cca129ce2c58..7d7dde93fff3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
@@ -142,6 +142,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NEXBOX-A95X";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index c37cc6b036cd..959bd8d77a82 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -177,6 +177,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "ODROID-C2";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index 7f94716876d3..bfac00e76ba3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -68,6 +68,10 @@ button-menu {
sound {
compatible = "amlogic,gx-sound-card";
model = "P200";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
index 6f81eed83bec..c10f66031ecd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
@@ -17,6 +17,10 @@ / {
sound {
compatible = "amlogic,gx-sound-card";
model = "P201";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 255e93a0b36d..3807a184810b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -108,6 +108,10 @@ sdio_pwrseq: sdio-pwrseq {
sound {
compatible = "amlogic,gx-sound-card";
model = "VEGA-S95";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
index af9ea32a2876..ec281a9e9e77 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
@@ -16,6 +16,10 @@ / {
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-HUB";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index 376760d86766..924414861b72 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -48,6 +48,10 @@ button {
sound {
compatible = "amlogic,gx-sound-card";
model = "WETEK-PLAY2";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
index 90ef9c17d80b..c6132fb71dfc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
@@ -123,6 +123,10 @@ sound {
"Speaker", "9J5-2 RIGHT";
audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
"9J5-2 RIGHT", "ACODEC LORN";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
index 08a4718219b1..c5e2306ad7a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
@@ -128,6 +128,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index dacbca73279c..0741d34945bb 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -69,6 +69,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "KHADAS-VIM";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
index 63b20860067c..6cbdfde00e12 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts
@@ -160,6 +160,10 @@ vcc_1v8: regulator-vcc-1v8 {
sound {
compatible = "amlogic,gx-sound-card";
model = "LIBRETECH-CC-V2";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
index 8b26c9661be1..401064b0428d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
@@ -142,6 +142,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
index 9b4ea6a49398..8b41e340f919 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
@@ -50,6 +50,10 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
index de996e930b82..a9c5881c9783 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts
@@ -90,6 +90,11 @@ sound {
"AU2 INR", "ACODEC LORN",
"Lineout", "AU2 OUTL",
"Lineout", "AU2 OUTR";
+
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index a03269a00486..544c757f8bb7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -152,6 +152,10 @@ wifi32k: wifi32k {
sound {
compatible = "amlogic,gx-sound-card";
model = "KHADAS-VIM2";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
index ad2dd4ad0a31..773107cc47dd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
@@ -86,6 +86,10 @@ hdmi_connector_in: endpoint {
sound {
compatible = "amlogic,gx-sound-card";
model = "NEXBOX-A1";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
index d05dde8da5c5..7356d3b628b1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
@@ -101,6 +101,10 @@ sdio_pwrseq: sdio-pwrseq {
sound {
compatible = "amlogic,gx-sound-card";
model = "RBOX-PRO";
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index e78cc9b577a0..7daa9b122d5c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -182,6 +182,10 @@ sound {
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
index 082b72703cdf..929e4720ae76 100644
--- a/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
@@ -200,6 +200,10 @@ sound {
<&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
<&dioo2133>;
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
index 9b2eb6e42651..3c43d3490e14 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
index 6e34fd80ed71..445c1671ede7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
index 586034316ec3..eeaff22edade 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
index f045bf851638..697855fec476 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts
@@ -57,6 +57,10 @@ sound {
"Lineout", "ACODEC LOLP",
"Lineout", "ACODEC LORP";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
index e6e9410d40cb..7b3a014d4cde 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index 951eb8e3f0c0..7b0e9817a615 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -174,6 +174,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
index 3581e14cbf18..2e3397e55da2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
@@ -239,6 +239,10 @@ sound {
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
index fc9b961133cd..e4a3a2a8ad06 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
index 9ea969255b4f..fff92e0d6dd5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts
@@ -22,6 +22,10 @@ sound {
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>;
+
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
--
2.34.1

View File

@ -1,7 +1,7 @@
From 0d10690c3adead40e44d87ccc494f27715a21505 Mon Sep 17 00:00:00 2001
From 58a6cec25fbb39f025c7e8cd975688e35112c607 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Sun, 20 Feb 2022 08:23:12 +0000
Subject: [PATCH 14/35] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
Subject: [PATCH 11/36] FROMLIST(v5): dt-bindings: vendor-prefixes: Add Titan
Micro Electronics
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -17,10 +17,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index a70ce43b3dc0..c5e5100b83b0 100644
index b320a39de7fe..71fb54284813 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1492,6 +1492,8 @@ patternProperties:
@@ -1498,6 +1498,8 @@ patternProperties:
description: Texas Instruments
"^tianma,.*":
description: Tianma Micro-electronics Co., Ltd.

View File

@ -1,31 +0,0 @@
From b16565d736b4744e97d2ff7e301e50e76c9a27ac Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 1 Jun 2024 15:46:42 +0000
Subject: [PATCH 12/35] FROMGIT(6.12): dt-bindings: media: amlogic,gx-vdec: add
the GXLX SoC family and update GXL
The GXLX SoC is a GXL variant that omits VP9 codec support. Also add S905W
and S905Y as GXL chips and sort the GXL comment.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml
index 55930f6107c9..47dce75aeae6 100644
--- a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml
+++ b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml
@@ -31,7 +31,8 @@ properties:
- items:
- enum:
- amlogic,gxbb-vdec # GXBB (S905)
- - amlogic,gxl-vdec # GXL (S905X, S905D)
+ - amlogic,gxl-vdec # GXL (S905D, S905W, S905X, S905Y)
+ - amlogic,gxlx-vdec # GXLX (S905L)
- amlogic,gxm-vdec # GXM (S912)
- const: amlogic,gx-vdec
- enum:
--
2.34.1

View File

@ -1,7 +1,7 @@
From a84f13e095df1e67ad3c68542466dd406d9022ec Mon Sep 17 00:00:00 2001
From 0fe489a2679ea71eb7859f99a94c273869ba09a0 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:24:47 +0000
Subject: [PATCH 15/35] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
Subject: [PATCH 12/36] FROMLIST(v5): dt-bindings: auxdisplay: Add Titan Micro
Electronics TM1628
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

View File

@ -1,113 +0,0 @@
From c73239247ba486f899fcd291334a4ff3536cfba4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 1 Jun 2024 15:51:07 +0000
Subject: [PATCH 13/35] FROMGIT(6.12): media: meson: vdec: add GXLX SoC
platform
Add the GXLX SoC platform which is based on GXL but omits the VP9 codec.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
drivers/staging/media/meson/vdec/vdec.c | 2 +
.../staging/media/meson/vdec/vdec_platform.c | 44 +++++++++++++++++++
.../staging/media/meson/vdec/vdec_platform.h | 2 +
3 files changed, 48 insertions(+)
diff --git a/drivers/staging/media/meson/vdec/vdec.c b/drivers/staging/media/meson/vdec/vdec.c
index de3e0345ab7c..5e5b296f93ba 100644
--- a/drivers/staging/media/meson/vdec/vdec.c
+++ b/drivers/staging/media/meson/vdec/vdec.c
@@ -982,6 +982,8 @@ static const struct of_device_id vdec_dt_match[] = {
.data = &vdec_platform_gxm },
{ .compatible = "amlogic,gxl-vdec",
.data = &vdec_platform_gxl },
+ { .compatible = "amlogic,gxlx-vdec",
+ .data = &vdec_platform_gxlx },
{ .compatible = "amlogic,g12a-vdec",
.data = &vdec_platform_g12a },
{ .compatible = "amlogic,sm1-vdec",
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.c b/drivers/staging/media/meson/vdec/vdec_platform.c
index f1df637681e5..75d295fdb5f8 100644
--- a/drivers/staging/media/meson/vdec/vdec_platform.c
+++ b/drivers/staging/media/meson/vdec/vdec_platform.c
@@ -57,6 +57,44 @@ static const struct amvdec_format vdec_formats_gxl[] = {
},
};
+static const struct amvdec_format vdec_formats_gxlx[] = {
+ {
+ .pixfmt = V4L2_PIX_FMT_H264,
+ .min_buffers = 2,
+ .max_buffers = 24,
+ .max_width = 3840,
+ .max_height = 2160,
+ .vdec_ops = &vdec_1_ops,
+ .codec_ops = &codec_h264_ops,
+ .firmware_path = "meson/vdec/gxl_h264.bin",
+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 },
+ .flags = V4L2_FMT_FLAG_COMPRESSED |
+ V4L2_FMT_FLAG_DYN_RESOLUTION,
+ }, {
+ .pixfmt = V4L2_PIX_FMT_MPEG1,
+ .min_buffers = 8,
+ .max_buffers = 8,
+ .max_width = 1920,
+ .max_height = 1080,
+ .vdec_ops = &vdec_1_ops,
+ .codec_ops = &codec_mpeg12_ops,
+ .firmware_path = "meson/vdec/gxl_mpeg12.bin",
+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
+ .flags = V4L2_FMT_FLAG_COMPRESSED,
+ }, {
+ .pixfmt = V4L2_PIX_FMT_MPEG2,
+ .min_buffers = 8,
+ .max_buffers = 8,
+ .max_width = 1920,
+ .max_height = 1080,
+ .vdec_ops = &vdec_1_ops,
+ .codec_ops = &codec_mpeg12_ops,
+ .firmware_path = "meson/vdec/gxl_mpeg12.bin",
+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 },
+ .flags = V4L2_FMT_FLAG_COMPRESSED,
+ },
+};
+
static const struct amvdec_format vdec_formats_gxm[] = {
{
.pixfmt = V4L2_PIX_FMT_VP9,
@@ -153,6 +191,12 @@ const struct vdec_platform vdec_platform_gxl = {
.revision = VDEC_REVISION_GXL,
};
+const struct vdec_platform vdec_platform_gxlx = {
+ .formats = vdec_formats_gxlx,
+ .num_formats = ARRAY_SIZE(vdec_formats_gxlx),
+ .revision = VDEC_REVISION_GXLX,
+};
+
const struct vdec_platform vdec_platform_gxm = {
.formats = vdec_formats_gxm,
.num_formats = ARRAY_SIZE(vdec_formats_gxm),
diff --git a/drivers/staging/media/meson/vdec/vdec_platform.h b/drivers/staging/media/meson/vdec/vdec_platform.h
index 731877a771f4..88ca4a9db8a8 100644
--- a/drivers/staging/media/meson/vdec/vdec_platform.h
+++ b/drivers/staging/media/meson/vdec/vdec_platform.h
@@ -14,6 +14,7 @@ struct amvdec_format;
enum vdec_revision {
VDEC_REVISION_GXBB,
VDEC_REVISION_GXL,
+ VDEC_REVISION_GXLX,
VDEC_REVISION_GXM,
VDEC_REVISION_G12A,
VDEC_REVISION_SM1,
@@ -28,6 +29,7 @@ struct vdec_platform {
extern const struct vdec_platform vdec_platform_gxbb;
extern const struct vdec_platform vdec_platform_gxm;
extern const struct vdec_platform vdec_platform_gxl;
+extern const struct vdec_platform vdec_platform_gxlx;
extern const struct vdec_platform vdec_platform_g12a;
extern const struct vdec_platform vdec_platform_sm1;
--
2.34.1

View File

@ -1,7 +1,7 @@
From abb95907d5899b8f29d9186f1e90e78f5ee9f856 Mon Sep 17 00:00:00 2001
From 9fc13ae236cc61c72f144259f3514ea192903e60 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 20 Feb 2022 08:26:27 +0000
Subject: [PATCH 16/35] FROMLIST(v5): docs: ABI: document tm1628 attribute
Subject: [PATCH 13/36] FROMLIST(v5): docs: ABI: document tm1628 attribute
display-text
Document the attribute for reading / writing the text to be displayed on

View File

@ -1,7 +1,7 @@
From 47885946b23860ee8610815c5adca8277ed9f859 Mon Sep 17 00:00:00 2001
From dd7b8586cedf32119a3a4b4a52765b6191afd80c Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:51:20 +0000
Subject: [PATCH 17/35] FROMLIST(v5): auxdisplay: add support for Titanmec
Subject: [PATCH 14/36] FROMLIST(v5): auxdisplay: add support for Titanmec
TM1628 7 segment display controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8

View File

@ -1,7 +1,7 @@
From 0d6b6009384cca989fa528882718a6d4f526afba Mon Sep 17 00:00:00 2001
From 35862164f4c63a36e883477213603bcfc87ba0b1 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:52:34 +0000
Subject: [PATCH 18/35] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
Subject: [PATCH 15/36] FROMLIST(v5): arm64: dts: meson-gxl-s905w-tx3-mini: add
support for the 7 segment display
This patch adds support for the 7 segment display of the device.

View File

@ -1,7 +1,7 @@
From e7fb99446f773b250152894f4dbf830f44a4d312 Mon Sep 17 00:00:00 2001
From fbf9c7c1eac2bf9835e53c08083bdadd26fb88fe Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 4 Apr 2022 18:53:32 +0000
Subject: [PATCH 19/35] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
Subject: [PATCH 16/36] FROMLIST(v5): MAINTAINERS: Add entry for tm1628
auxdisplay driver
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
@ -10,10 +10,10 @@ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cc40a9d9b8cd..2f101da4c452 100644
index b878ddc99f94..f919e8b59031 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -23098,6 +23098,13 @@ W: http://sourceforge.net/projects/tlan/
@@ -23342,6 +23342,13 @@ W: http://sourceforge.net/projects/tlan/
F: Documentation/networking/device_drivers/ethernet/ti/tlan.rst
F: drivers/net/ethernet/ti/tlan.*

View File

@ -1,7 +1,7 @@
From 9f81dde746e981d7e2f52b62c082a89832b76070 Mon Sep 17 00:00:00 2001
From 79ca58ba94a4aeee71f24fe055a573655e175899 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 23 Dec 2018 02:24:38 +0100
Subject: [PATCH 20/35] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
Subject: [PATCH 17/36] FROMLIST(v1): ASoC: hdmi-codec: reorder channel
allocation list
Wrong channel allocation is selected by hdmi_codec_get_ch_alloc_table_idx().

View File

@ -1,7 +1,7 @@
From 7afe424a6ea0219a4271ffb332175a1f070d077b Mon Sep 17 00:00:00 2001
From f021d970c15f2788feaa671e8220244fee84e4ac Mon Sep 17 00:00:00 2001
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Mon, 22 Nov 2021 09:15:21 +0000
Subject: [PATCH 21/35] FROMLIST(v1): media: meson: vdec: esparser: check
Subject: [PATCH 18/36] FROMLIST(v1): media: meson: vdec: esparser: check
parsing state with hardware write pointer
Also check the hardware write pointer to check if ES Parser has stalled.

View File

@ -1,7 +1,7 @@
From 6439673b09f09a9e33a7c06e6be20254da1930bc Mon Sep 17 00:00:00 2001
From 3e13f0b82b6caf37a09f20415eaf8c11d66b2ab3 Mon Sep 17 00:00:00 2001
From: Benjamin Roszak <benjamin545@gmail.com>
Date: Mon, 23 Jan 2023 10:56:46 +0000
Subject: [PATCH 22/35] FROMLIST(v2): media: meson: vdec: implement 10bit
Subject: [PATCH 19/36] FROMLIST(v2): media: meson: vdec: implement 10bit
bitstream handling
In order to support 10bit bitstream decoding, buffers and MMU

View File

@ -1,7 +1,7 @@
From 5264b9d677f2972f8664958dff88adc3226f96cf Mon Sep 17 00:00:00 2001
From 4ee3045dcb983ae8128160ab43aa8e91e0ec036e Mon Sep 17 00:00:00 2001
From: Maxime Jourdan <mjourdan@baylibre.com>
Date: Mon, 23 Jan 2023 11:07:04 +0000
Subject: [PATCH 23/35] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
Subject: [PATCH 20/36] FROMLIST(v2): media: meson: vdec: add HEVC decode codec
Add initial HEVC codec for the Amlogic GXBB/GXL/GXM SoCs using
the common "HEVC" decoder driver.

View File

@ -1,7 +1,7 @@
From c8d6e29f58b2ee6e9718fc0b903b86a5fa3821b9 Mon Sep 17 00:00:00 2001
From ee2125dfba99a2c318e18e5a543c161f1c28fbe2 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:04:49 +0100
Subject: [PATCH 24/35] FROMLIST(v1): iio: adc: meson: fix voltage reference
Subject: [PATCH 21/36] FROMLIST(v1): iio: adc: meson: fix voltage reference
selection field name typo
The field should be called "vref_voltage", without a typo in the word

View File

@ -1,7 +1,7 @@
From b48aff8d86bbdcbf1b55b16c2a279c4adb48d9e3 Mon Sep 17 00:00:00 2001
From 09a6c2226f02620606512467a4bbe021a4b27056 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:30:02 +0100
Subject: [PATCH 25/35] FROMLIST(v1): iio: adc: consistently use bool and enum
Subject: [PATCH 22/36] FROMLIST(v1): iio: adc: consistently use bool and enum
in struct meson_sar_adc_param
Consistently use bool for any register bit that enables/disables

View File

@ -1,7 +1,7 @@
From fb2ceb994dbdd3aaaa02bd4b1727b8d573ecf3bd Mon Sep 17 00:00:00 2001
From aae5755ab09bbd51bef50e01976151fb63e46e2b Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:35:58 +0100
Subject: [PATCH 26/35] FROMLIST(v1): iio: adc: meson: simplify
Subject: [PATCH 23/36] FROMLIST(v1): iio: adc: meson: simplify
MESON_SAR_ADC_REG11 register access
Simply check the max_register value to decide whether

View File

@ -1,7 +1,7 @@
From 09110c8ac8d41bef0a7eee04cfd8e59e3a14a72b Mon Sep 17 00:00:00 2001
From 9856dc8263e2a07c78f90b61383e1181d3c59fbd Mon Sep 17 00:00:00 2001
From: Da Xue <da@libre.computer>
Date: Fri, 24 May 2024 15:17:37 +0000
Subject: [PATCH 27/35] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
Subject: [PATCH 24/36] FROMLIST(v1): net: mdio: meson-gxl set 28th bit in
eth_reg2
This bit is necessary to enable packets on the interface. Without this

View File

@ -1,7 +1,7 @@
From 4bf42b6cc2a476fb3e24417feff3560badfc28f5 Mon Sep 17 00:00:00 2001
From da28daf44c2634a1af3fc1d25ba0650a44944cea Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:38:59 +0100
Subject: [PATCH 28/35] FROMLIST(v1): dt-bindings: iio: adc:
Subject: [PATCH 25/36] FROMLIST(v1): dt-bindings: iio: adc:
amlogic,meson-saradc: add GXLX SoC compatible
Add support for the GXLX SoC. GXLX is very similar to GXL but has three

View File

@ -1,7 +1,7 @@
From ca073dee6ab59ec0229f9ed32b123caaddea988a Mon Sep 17 00:00:00 2001
From 6cc6cb159d9268ad5e6a8943a8c6a2d0e716bee3 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 23 Mar 2024 20:44:41 +0100
Subject: [PATCH 29/35] FROMLIST(v1): iio: adc: meson: add support for the GXLX
Subject: [PATCH 26/36] FROMLIST(v1): iio: adc: meson: add support for the GXLX
SoC
The SARADC IP on GXLX is identical to the one found on GXL SoCs: except

View File

@ -1,7 +1,7 @@
From 9628a8629c16d055d0c3a6020a902c47705ce5dc Mon Sep 17 00:00:00 2001
From e6a63f84d1e20b9949aff6d497dc8ae20b437247 Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 5 Jun 2024 11:15:11 +0200
Subject: [PATCH 30/35] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
Subject: [PATCH 27/36] FROMLIST(v1): dt-bindings: usb: dwc2: allow device
sub-nodes
Allow the '#address-cells', '#size-cells' and subnodes as defined in

View File

@ -0,0 +1,128 @@
From 93814374289368acf352b85a98abfa2cce7f94ca Mon Sep 17 00:00:00 2001
From: Chuan Liu <chuan.liu@amlogic.com>
Date: Mon, 11 Nov 2024 11:37:01 +0800
Subject: [PATCH 28/36] FROMLIST(v2): clk: Fix the CLK_IGNORE_UNUSED failure
issue
When the clk_disable_unused_subtree() function disables an unused clock,
if CLK_OPS_PARENT_ENABLE is configured on the clock,
clk_core_prepare_enable() and clk_core_disable_unprepare() are called
directly, and these two functions do not determine CLK_IGNORE_UNUSED,
This causes the clock to be disabled even if CLK_IGNORE_UNUSED is
configured when clk_core_disable_unprepare() is called.
Two new functions clk_disable_unprepare_unused() and
clk_prepare_enable_unused() are added to resolve the preceding
situation. The CLK_IGNORE_UNUSED judgment logic is added to these two
functions. To prevent clock configuration CLK_IGNORE_UNUSED from
possible failure.
Fixes: a4b3518d146f ("clk: core: support clocks which requires parents
enable (part 1)")
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/clk/clk.c | 67 +++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 65 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index d02451f951cf..6def76c30ce6 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -94,6 +94,7 @@ struct clk_core {
struct hlist_node debug_node;
#endif
struct kref ref;
+ bool ignore_enabled;
};
#define CREATE_TRACE_POINTS
@@ -1479,6 +1480,68 @@ static void __init clk_unprepare_unused_subtree(struct clk_core *core)
}
}
+static void __init clk_disable_unprepare_unused(struct clk_core *core)
+{
+ unsigned long flags;
+
+ lockdep_assert_held(&prepare_lock);
+
+ if (!core)
+ return;
+
+ if ((core->enable_count == 0) && core->ops->disable &&
+ !core->ignore_enabled) {
+ flags = clk_enable_lock();
+ core->ops->disable(core->hw);
+ clk_enable_unlock(flags);
+ }
+
+ if ((core->prepare_count == 0) && core->ops->unprepare &&
+ !core->ignore_enabled)
+ core->ops->unprepare(core->hw);
+
+ core->ignore_enabled = false;
+
+ clk_disable_unprepare_unused(core->parent);
+}
+
+static int __init clk_prepare_enable_unused(struct clk_core *core)
+{
+ int ret = 0;
+ unsigned long flags;
+
+ lockdep_assert_held(&prepare_lock);
+
+ if (!core)
+ return 0;
+
+ ret = clk_prepare_enable_unused(core->parent);
+ if (ret)
+ return ret;
+
+ if ((core->flags & CLK_IGNORE_UNUSED) && clk_core_is_enabled(core))
+ core->ignore_enabled = true;
+
+ if ((core->prepare_count == 0) && core->ops->prepare) {
+ ret = core->ops->prepare(core->hw);
+ if (ret)
+ goto disable_unprepare;
+ }
+
+ if ((core->enable_count == 0) && core->ops->enable) {
+ flags = clk_enable_lock();
+ ret = core->ops->enable(core->hw);
+ clk_enable_unlock(flags);
+ if (ret)
+ goto disable_unprepare;
+ }
+
+ return 0;
+disable_unprepare:
+ clk_disable_unprepare_unused(core->parent);
+ return ret;
+}
+
static void __init clk_disable_unused_subtree(struct clk_core *core)
{
struct clk_core *child;
@@ -1490,7 +1553,7 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
clk_disable_unused_subtree(child);
if (core->flags & CLK_OPS_PARENT_ENABLE)
- clk_core_prepare_enable(core->parent);
+ clk_prepare_enable_unused(core->parent);
flags = clk_enable_lock();
@@ -1517,7 +1580,7 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
unlock_out:
clk_enable_unlock(flags);
if (core->flags & CLK_OPS_PARENT_ENABLE)
- clk_core_disable_unprepare(core->parent);
+ clk_disable_unprepare_unused(core->parent);
}
static bool clk_ignore_unused __initdata;
--
2.34.1

View File

@ -0,0 +1,266 @@
From 8039e002c8740fe1af9e979ed49f7262b9a774f3 Mon Sep 17 00:00:00 2001
From: Chuan Liu <chuan.liu@amlogic.com>
Date: Mon, 11 Nov 2024 11:37:02 +0800
Subject: [PATCH 29/36] FROMLIST(v2): clk: meson: Fix failure of glitch-free
mux switching
glitch-free mux has two clock channels (channel 0 and channel 1) with
the same configuration.Channel 0 of glitch-free mux is not only the
clock source for the mux, but also the working clock for glitch free
mux. Therefore, when glitch-free mux switches, it is necessary to ensure
that channel 0 has a clock input, otherwise glitch free mux will not
work and cannot switch to the target channel. So adding flag
CLK_OPS_PARENT_ENABLE ensures that both channels 0 and 1 are enabled
when mux switches.
In fact, we just need to make sure that channel 0 is enabled. The
purpose of CLK_OPS_PARENT_ENABLE may not be to solve our situation, but
adding this flag does solve our current problem.
Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock
controller driver")
Fixes: 14ebb3154b8f ("clk: meson: axg: add Video Clocks")
Fixes: f06ac3ed04e8 ("clk: meson: c3: add c3 clock peripherals controller
driver")
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Fixes: fac9a55b66c9 ("clk: meson-gxbb: Add MALI clocks")
Fixes: 74e1f2521f16 ("clk: meson: meson8b: add the GPU clock tree")
Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC
peripheral clock controller")
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/clk/meson/a1-peripherals.c | 4 ++--
drivers/clk/meson/axg.c | 4 ++--
drivers/clk/meson/c3-peripherals.c | 2 +-
drivers/clk/meson/g12a.c | 6 +++---
drivers/clk/meson/gxbb.c | 6 +++---
drivers/clk/meson/meson8b.c | 21 ++++++++++++++++++---
drivers/clk/meson/s4-peripherals.c | 12 ++++++------
7 files changed, 35 insertions(+), 20 deletions(-)
diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
index 7aa6abb2eb1f..4b9686916b17 100644
--- a/drivers/clk/meson/a1-peripherals.c
+++ b/drivers/clk/meson/a1-peripherals.c
@@ -489,7 +489,7 @@ static struct clk_regmap dspa_sel = {
&dspa_b.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -635,7 +635,7 @@ static struct clk_regmap dspb_sel = {
&dspb_b.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 757c7a28c53d..6eb7b7a3fbf9 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -1150,7 +1150,7 @@ static struct clk_regmap axg_vpu = {
&axg_vpu_1.hw
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1266,7 +1266,7 @@ static struct clk_regmap axg_vapb_sel = {
&axg_vapb_1.hw
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
index 7dcbf4ebee07..4566c2aeeb19 100644
--- a/drivers/clk/meson/c3-peripherals.c
+++ b/drivers/clk/meson/c3-peripherals.c
@@ -1431,7 +1431,7 @@ static struct clk_regmap hcodec = {
.ops = &clk_regmap_mux_ops,
.parent_data = hcodec_parent_data,
.num_parents = ARRAY_SIZE(hcodec_parent_data),
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 02dda57105b1..b156da5528bc 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -2818,7 +2818,7 @@ static struct clk_regmap g12a_vpu = {
&g12a_vpu_1.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -3111,7 +3111,7 @@ static struct clk_regmap g12a_vapb_sel = {
&g12a_vapb_1.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -4045,7 +4045,7 @@ static struct clk_regmap g12a_mali = {
.ops = &clk_regmap_mux_ops,
.parent_hws = g12a_mali_parent_hws,
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index f071faad1ebb..784cdb019140 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -1138,7 +1138,7 @@ static struct clk_regmap gxbb_mali = {
.ops = &clk_regmap_mux_ops,
.parent_hws = gxbb_mali_parent_hws,
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1619,7 +1619,7 @@ static struct clk_regmap gxbb_vpu = {
&gxbb_vpu_1.hw
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1754,7 +1754,7 @@ static struct clk_regmap gxbb_vapb_sel = {
&gxbb_vapb_1.hw
},
.num_parents = 2,
- .flags = CLK_SET_RATE_NO_REPARENT,
+ .flags = CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index b7417ac262d3..0a5b65e0247d 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -2002,7 +2002,22 @@ static struct clk_regmap meson8b_mali = {
&meson8b_mali_1.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ /*
+ * glitch-free mux has two clock channels (channel 0 and
+ * channel 1) with the same configuration.Channel 0 of
+ * glitch-free mux is not only the clock source for the mux,
+ * but also the working clock for glitch free mux. Therefore,
+ * when glitch-free mux switches, it is necessary to ensure that
+ * channel 0 has a clock input, otherwise glitch free mux will
+ * not work and cannot switch to the target channel. So adding
+ * flag CLK_OPS_PARENT_ENABLE ensures that both channels 0 and 1
+ * are enabled when mux switches.
+ *
+ * In fact, we just need to make sure that channel 0 is enabled.
+ * The purpose of CLK_OPS_PARENT_ENABLE may not be to solve our
+ * situation, but adding this flag does solve our current problem.
+ */
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -2257,7 +2272,7 @@ static struct clk_regmap meson8b_vpu = {
&meson8b_vpu_1.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -2369,7 +2384,7 @@ static struct clk_regmap meson8b_vdec_1 = {
&meson8b_vdec_1_2.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
index c930cf0614a0..79e0240d58e6 100644
--- a/drivers/clk/meson/s4-peripherals.c
+++ b/drivers/clk/meson/s4-peripherals.c
@@ -1404,7 +1404,7 @@ static struct clk_regmap s4_mali_mux = {
.ops = &clk_regmap_mux_ops,
.parent_hws = s4_mali_parent_hws,
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1536,7 +1536,7 @@ static struct clk_regmap s4_vdec_mux = {
.ops = &clk_regmap_mux_ops,
.parent_hws = s4_vdec_mux_parent_hws,
.num_parents = ARRAY_SIZE(s4_vdec_mux_parent_hws),
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1656,7 +1656,7 @@ static struct clk_regmap s4_hevcf_mux = {
.ops = &clk_regmap_mux_ops,
.parent_hws = s4_hevcf_mux_parent_hws,
.num_parents = ARRAY_SIZE(s4_hevcf_mux_parent_hws),
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1774,7 +1774,7 @@ static struct clk_regmap s4_vpu = {
&s4_vpu_1.hw,
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -1989,7 +1989,7 @@ static struct clk_regmap s4_vpu_clkc_mux = {
.ops = &clk_regmap_mux_ops,
.parent_hws = s4_vpu_mux_parent_hws,
.num_parents = ARRAY_SIZE(s4_vpu_mux_parent_hws),
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
@@ -2115,7 +2115,7 @@ static struct clk_regmap s4_vapb = {
&s4_vapb_1.hw
},
.num_parents = 2,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
},
};
--
2.34.1

View File

@ -0,0 +1,323 @@
From 1262d9d4663eb3dd10cc47dab815d2e8bd1815c1 Mon Sep 17 00:00:00 2001
From: Chuan Liu <chuan.liu@amlogic.com>
Date: Mon, 11 Nov 2024 11:37:03 +0800
Subject: [PATCH 30/36] FROMLIST(v2): clk: meson: Fix glitch occurs when
setting up glitch-free mux
glitch-free mux has two clock channels (channel 0 and channel 1) with
the same configuration. When the frequency needs to be changed, the two
channels ping-pong to ensure clock continuity and suppress glitch.
The glitch-free mux configuration with CLK_SET_RATE_GATE enables the mux
to perform ping-pong switching to suppress glitches.
Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock
controller driver")
Fixes: 14ebb3154b8f ("clk: meson: axg: add Video Clocks")
Fixes: f06ac3ed04e8 ("clk: meson: c3: add c3 clock peripherals controller
driver")
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Fixes: fac9a55b66c9 ("clk: meson-gxbb: Add MALI clocks")
Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC
peripheral clock controller")
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/clk/meson/a1-peripherals.c | 8 ++++----
drivers/clk/meson/axg.c | 12 ++++++++----
drivers/clk/meson/c3-peripherals.c | 4 ++--
drivers/clk/meson/g12a.c | 12 ++++++++----
drivers/clk/meson/gxbb.c | 12 ++++++++----
drivers/clk/meson/s4-peripherals.c | 20 ++++++++++----------
6 files changed, 40 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
index 4b9686916b17..7f515e002adb 100644
--- a/drivers/clk/meson/a1-peripherals.c
+++ b/drivers/clk/meson/a1-peripherals.c
@@ -423,7 +423,7 @@ static struct clk_regmap dspa_a = {
&dspa_a_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -471,7 +471,7 @@ static struct clk_regmap dspa_b = {
&dspa_b_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -569,7 +569,7 @@ static struct clk_regmap dspb_a = {
&dspb_a_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -617,7 +617,7 @@ static struct clk_regmap dspb_b = {
&dspb_b_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 6eb7b7a3fbf9..746a9b61a890 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -1083,7 +1083,8 @@ static struct clk_regmap axg_vpu_0 = {
* We want to avoid CCF to disable the VPU clock if
* display has been set by Bootloader
*/
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1132,7 +1133,8 @@ static struct clk_regmap axg_vpu_1 = {
* We want to avoid CCF to disable the VPU clock if
* display has been set by Bootloader
*/
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1200,7 +1202,8 @@ static struct clk_regmap axg_vapb_0 = {
&axg_vapb_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1248,7 +1251,8 @@ static struct clk_regmap axg_vapb_1 = {
&axg_vapb_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
index 4566c2aeeb19..27343a73a521 100644
--- a/drivers/clk/meson/c3-peripherals.c
+++ b/drivers/clk/meson/c3-peripherals.c
@@ -1364,7 +1364,7 @@ static struct clk_regmap hcodec_0 = {
&hcodec_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1411,7 +1411,7 @@ static struct clk_regmap hcodec_1 = {
&hcodec_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index b156da5528bc..625d991d60e8 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -2752,7 +2752,8 @@ static struct clk_regmap g12a_vpu_0 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &g12a_vpu_0_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -2796,7 +2797,8 @@ static struct clk_regmap g12a_vpu_1 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &g12a_vpu_1_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -3041,7 +3043,8 @@ static struct clk_regmap g12a_vapb_0 = {
&g12a_vapb_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -3089,7 +3092,8 @@ static struct clk_regmap g12a_vapb_1 = {
&g12a_vapb_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 784cdb019140..21a5281b6233 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -1549,7 +1549,8 @@ static struct clk_regmap gxbb_vpu_0 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_0_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1597,7 +1598,8 @@ static struct clk_regmap gxbb_vpu_1 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &gxbb_vpu_1_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1680,7 +1682,8 @@ static struct clk_regmap gxbb_vapb_0 = {
&gxbb_vapb_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
@@ -1732,7 +1735,8 @@ static struct clk_regmap gxbb_vapb_1 = {
&gxbb_vapb_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED |
+ CLK_SET_RATE_GATE,
},
};
diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
index 79e0240d58e6..cf10be40141d 100644
--- a/drivers/clk/meson/s4-peripherals.c
+++ b/drivers/clk/meson/s4-peripherals.c
@@ -1466,7 +1466,7 @@ static struct clk_regmap s4_vdec_p0 = {
&s4_vdec_p0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1516,7 +1516,7 @@ static struct clk_regmap s4_vdec_p1 = {
&s4_vdec_p1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1586,7 +1586,7 @@ static struct clk_regmap s4_hevcf_p0 = {
&s4_hevcf_p0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1636,7 +1636,7 @@ static struct clk_regmap s4_hevcf_p1 = {
&s4_hevcf_p1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1712,7 +1712,7 @@ static struct clk_regmap s4_vpu_0 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &s4_vpu_0_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1756,7 +1756,7 @@ static struct clk_regmap s4_vpu_1 = {
.ops = &clk_regmap_gate_ops,
.parent_hws = (const struct clk_hw *[]) { &s4_vpu_1_div.hw },
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1921,7 +1921,7 @@ static struct clk_regmap s4_vpu_clkc_p0 = {
&s4_vpu_clkc_p0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -1969,7 +1969,7 @@ static struct clk_regmap s4_vpu_clkc_p1 = {
&s4_vpu_clkc_p1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -2049,7 +2049,7 @@ static struct clk_regmap s4_vapb_0 = {
&s4_vapb_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
@@ -2097,7 +2097,7 @@ static struct clk_regmap s4_vapb_1 = {
&s4_vapb_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
},
};
--
2.34.1

View File

@ -1,63 +0,0 @@
From 990e1d9a131a713fb00939151675cd7e857eb537 Mon Sep 17 00:00:00 2001
From: Zelong Dong <zelong.dong@amlogic.com>
Date: Wed, 3 Jul 2024 17:38:58 +0800
Subject: [PATCH 31/35] FROMLIST(v1): media: rc: meson-ir: support PM
suspend/resume
IR controller could be used and updated by another processor
while kernel has been suspended. Just in case, reinitialize
the IR controller when kernel is resuming.
Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
---
drivers/media/rc/meson-ir.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
index 5303e6da5809..9cdb45821ecc 100644
--- a/drivers/media/rc/meson-ir.c
+++ b/drivers/media/rc/meson-ir.c
@@ -567,6 +567,32 @@ static void meson_ir_shutdown(struct platform_device *pdev)
spin_unlock_irqrestore(&ir->lock, flags);
}
+static __maybe_unused int meson_ir_resume(struct device *dev)
+{
+ struct meson_ir *ir = dev_get_drvdata(dev);
+
+ if (ir->param->support_hw_decoder)
+ meson_ir_hw_decoder_init(ir->rc, &ir->rc->enabled_protocols);
+ else
+ meson_ir_sw_decoder_init(ir->rc);
+
+ return 0;
+}
+
+static __maybe_unused int meson_ir_suspend(struct device *dev)
+{
+ struct meson_ir *ir = dev_get_drvdata(dev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&ir->lock, flags);
+ regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0);
+ spin_unlock_irqrestore(&ir->lock, flags);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(meson_ir_pm_ops, meson_ir_suspend, meson_ir_resume);
+
static const struct meson_ir_param meson6_ir_param = {
.support_hw_decoder = false,
.max_register = IR_DEC_REG1,
@@ -607,6 +633,7 @@ static struct platform_driver meson_ir_driver = {
.driver = {
.name = DRIVER_NAME,
.of_match_table = meson_ir_match,
+ .pm = pm_ptr(&meson_ir_pm_ops),
},
};
--
2.34.1

View File

@ -0,0 +1,372 @@
From 42977c8edefd10406ccacb367c6a1ed0696579fe Mon Sep 17 00:00:00 2001
From: Chuan Liu <chuan.liu@amlogic.com>
Date: Mon, 11 Nov 2024 17:37:28 +0800
Subject: [PATCH 31/36] FROMLIST(v2): clk: meson: Fix children of ro_clk may be
tampered with
When setting the rate of a clock using clk_regmap_divider_ro_ops, the
rate of its children may be tampered with.
Fixes: 84af914404db ("clk: meson: a1: add Amlogic A1 Peripherals clock controller driver")
Fixes: 87173557d2f6 ("clk: meson: clk-pll: remove od parameters")
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Fixes: 64aa7008e957 ("clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller")
Fixes: 57b55c76aaf1 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
Fixes: e787c9c55eda ("clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver")
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
---
drivers/clk/meson/a1-peripherals.c | 2 ++
drivers/clk/meson/axg.c | 5 +++--
drivers/clk/meson/g12a.c | 23 ++++++++++++++---------
drivers/clk/meson/gxbb.c | 18 ++++++++++--------
drivers/clk/meson/meson8-ddr.c | 2 +-
drivers/clk/meson/meson8b.c | 4 +++-
drivers/clk/meson/s4-peripherals.c | 2 ++
drivers/clk/meson/s4-pll.c | 2 +-
8 files changed, 36 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
index 7f515e002adb..3dfdeb4c579a 100644
--- a/drivers/clk/meson/a1-peripherals.c
+++ b/drivers/clk/meson/a1-peripherals.c
@@ -266,6 +266,7 @@ static struct clk_regmap sys_b_div = {
.offset = SYS_CLK_CTRL0,
.shift = 16,
.width = 10,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sys_b_div",
@@ -314,6 +315,7 @@ static struct clk_regmap sys_a_div = {
.offset = SYS_CLK_CTRL0,
.shift = 0,
.width = 10,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sys_a_div",
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 746a9b61a890..ce9605e93b44 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -73,7 +73,7 @@ static struct clk_regmap axg_fixed_pll = {
.offset = HHI_MPLL_CNTL,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "fixed_pll",
@@ -132,7 +132,7 @@ static struct clk_regmap axg_sys_pll = {
.offset = HHI_SYS_PLL_CNTL,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sys_pll",
@@ -473,6 +473,7 @@ static struct clk_regmap axg_mpll_prediv = {
.offset = HHI_MPLL_CNTL5,
.shift = 12,
.width = 1,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "mpll_prediv",
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 625d991d60e8..5d03a02e7b79 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -78,7 +78,7 @@ static struct clk_regmap g12a_fixed_pll = {
.offset = HHI_FIX_PLL_CNTL0,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "fixed_pll",
@@ -445,6 +445,7 @@ static struct clk_regmap g12a_cpu_clk_mux1_div = {
.offset = HHI_SYS_CPU_CLK_CNTL0,
.shift = 20,
.width = 6,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_dyn1_div",
@@ -629,6 +630,7 @@ static struct clk_regmap g12b_cpub_clk_mux1_div = {
.offset = HHI_SYS_CPUB_CLK_CNTL,
.shift = 20,
.width = 6,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpub_clk_dyn1_div",
@@ -748,6 +750,7 @@ static struct clk_regmap sm1_dsu_clk_mux0_div = {
.offset = HHI_SYS_CPU_CLK_CNTL5,
.shift = 4,
.width = 6,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "dsu_clk_dyn0_div",
@@ -783,6 +786,7 @@ static struct clk_regmap sm1_dsu_clk_mux1_div = {
.offset = HHI_SYS_CPU_CLK_CNTL5,
.shift = 20,
.width = 6,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "dsu_clk_dyn1_div",
@@ -1200,7 +1204,7 @@ static struct clk_regmap g12a_cpu_clk_apb_div = {
.offset = HHI_SYS_CPU_CLK_CNTL1,
.shift = 3,
.width = 3,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_apb_div",
@@ -1234,7 +1238,7 @@ static struct clk_regmap g12a_cpu_clk_atb_div = {
.offset = HHI_SYS_CPU_CLK_CNTL1,
.shift = 6,
.width = 3,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_atb_div",
@@ -1268,7 +1272,7 @@ static struct clk_regmap g12a_cpu_clk_axi_div = {
.offset = HHI_SYS_CPU_CLK_CNTL1,
.shift = 9,
.width = 3,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_axi_div",
@@ -1302,7 +1306,7 @@ static struct clk_regmap g12a_cpu_clk_trace_div = {
.offset = HHI_SYS_CPU_CLK_CNTL1,
.shift = 20,
.width = 3,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "cpu_clk_trace_div",
@@ -1738,7 +1742,7 @@ static struct clk_regmap sm1_gp1_pll = {
.shift = 16,
.width = 3,
.flags = (CLK_DIVIDER_POWER_OF_TWO |
- CLK_DIVIDER_ROUND_CLOSEST),
+ CLK_DIVIDER_ROUND_CLOSEST | CLK_DIVIDER_READ_ONLY),
},
.hw.init = &(struct clk_init_data){
.name = "gp1_pll",
@@ -2001,7 +2005,7 @@ static struct clk_regmap g12a_hdmi_pll_od = {
.offset = HHI_HDMI_PLL_CNTL0,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od",
@@ -2019,7 +2023,7 @@ static struct clk_regmap g12a_hdmi_pll_od2 = {
.offset = HHI_HDMI_PLL_CNTL0,
.shift = 18,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od2",
@@ -2037,7 +2041,7 @@ static struct clk_regmap g12a_hdmi_pll = {
.offset = HHI_HDMI_PLL_CNTL0,
.shift = 20,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll",
@@ -4058,6 +4062,7 @@ static struct clk_regmap g12a_ts_div = {
.offset = HHI_TS_CLK_CNTL,
.shift = 0,
.width = 8,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "ts_div",
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 21a5281b6233..176123787ce1 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -133,7 +133,7 @@ static struct clk_regmap gxbb_fixed_pll = {
.offset = HHI_MPLL_CNTL,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "fixed_pll",
@@ -269,7 +269,7 @@ static struct clk_regmap gxbb_hdmi_pll_od = {
.offset = HHI_HDMI_PLL_CNTL2,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od",
@@ -287,7 +287,7 @@ static struct clk_regmap gxbb_hdmi_pll_od2 = {
.offset = HHI_HDMI_PLL_CNTL2,
.shift = 22,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od2",
@@ -305,7 +305,7 @@ static struct clk_regmap gxbb_hdmi_pll = {
.offset = HHI_HDMI_PLL_CNTL2,
.shift = 18,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll",
@@ -323,7 +323,7 @@ static struct clk_regmap gxl_hdmi_pll_od = {
.offset = HHI_HDMI_PLL_CNTL + 8,
.shift = 21,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od",
@@ -341,7 +341,7 @@ static struct clk_regmap gxl_hdmi_pll_od2 = {
.offset = HHI_HDMI_PLL_CNTL + 8,
.shift = 23,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll_od2",
@@ -359,7 +359,7 @@ static struct clk_regmap gxl_hdmi_pll = {
.offset = HHI_HDMI_PLL_CNTL + 8,
.shift = 19,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "hdmi_pll",
@@ -415,7 +415,7 @@ static struct clk_regmap gxbb_sys_pll = {
.offset = HHI_SYS_PLL_CNTL,
.shift = 10,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sys_pll",
@@ -705,6 +705,7 @@ static struct clk_regmap gxbb_mpll_prediv = {
.offset = HHI_MPLL_CNTL5,
.shift = 12,
.width = 1,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "mpll_prediv",
@@ -917,6 +918,7 @@ static struct clk_regmap gxbb_mpeg_clk_div = {
.offset = HHI_MPEG_CLK_CNTL,
.shift = 0,
.width = 7,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "mpeg_clk_div",
diff --git a/drivers/clk/meson/meson8-ddr.c b/drivers/clk/meson/meson8-ddr.c
index 4b73ea244b63..950f323072fb 100644
--- a/drivers/clk/meson/meson8-ddr.c
+++ b/drivers/clk/meson/meson8-ddr.c
@@ -65,7 +65,7 @@ static struct clk_regmap meson8_ddr_pll = {
.offset = AM_DDR_PLL_CNTL,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "ddr_pll",
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 0a5b65e0247d..9c38b3911c0a 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -106,7 +106,7 @@ static struct clk_regmap meson8b_fixed_pll = {
.offset = HHI_MPLL_CNTL,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "fixed_pll",
@@ -459,6 +459,7 @@ static struct clk_regmap meson8b_mpll_prediv = {
.offset = HHI_MPLL_CNTL5,
.shift = 12,
.width = 1,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "mpll_prediv",
@@ -640,6 +641,7 @@ static struct clk_regmap meson8b_mpeg_clk_div = {
.offset = HHI_MPEG_CLK_CNTL,
.shift = 0,
.width = 7,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "mpeg_clk_div",
diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
index cf10be40141d..d194d448b343 100644
--- a/drivers/clk/meson/s4-peripherals.c
+++ b/drivers/clk/meson/s4-peripherals.c
@@ -175,6 +175,7 @@ static struct clk_regmap s4_sysclk_b_div = {
.offset = CLKCTRL_SYS_CLK_CTRL0,
.shift = 16,
.width = 10,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sysclk_b_div",
@@ -221,6 +222,7 @@ static struct clk_regmap s4_sysclk_a_div = {
.offset = CLKCTRL_SYS_CLK_CTRL0,
.shift = 0,
.width = 10,
+ .flags = CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "sysclk_a_div",
diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
index b0258933fb9d..bca5c92ea2c1 100644
--- a/drivers/clk/meson/s4-pll.c
+++ b/drivers/clk/meson/s4-pll.c
@@ -74,7 +74,7 @@ static struct clk_regmap s4_fixed_pll = {
.offset = ANACTRL_FIXPLL_CTRL0,
.shift = 16,
.width = 2,
- .flags = CLK_DIVIDER_POWER_OF_TWO,
+ .flags = CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY,
},
.hw.init = &(struct clk_init_data){
.name = "fixed_pll",
--
2.34.1

View File

@ -1,7 +1,7 @@
From 4bcb695953fb804781fdd2a51968b64a5bc116f7 Mon Sep 17 00:00:00 2001
From bba724597d7df40df949cd4ebbdb59aa488cd908 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 4 Jun 2024 10:49:58 +0000
Subject: [PATCH 32/35] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
Subject: [PATCH 32/36] WIP: media: meson: vdec: add HEVC and remove MPEG1/2
from GXLX
This patch is required until GXLX support has been merged upstream.

View File

@ -1,7 +1,7 @@
From cb948f94d5ca684758eb6745ceb088407017a9ee Mon Sep 17 00:00:00 2001
From ad8f1bc66ac060d5a7061dc89d5df656f4d72d20 Mon Sep 17 00:00:00 2001
From: Andreas Baierl <ichgeh@imkreisrum.de>
Date: Tue, 2 Apr 2024 14:22:52 +0000
Subject: [PATCH 33/35] WIP: media: meson: vdec: reintroduce wiggle room
Subject: [PATCH 33/36] WIP: media: meson: vdec: reintroduce wiggle room
Without the wiggle room, it happens that matching offsets can't be found.
This results in non-matches and afterwards in frame drops in userspace apps.

View File

@ -1,7 +1,7 @@
From 30b58b11eddc6a44d8ae9808bb7f3d4484ca7622 Mon Sep 17 00:00:00 2001
From 87e7de5ee4abe0a0bc945332fb7648f807dc6f7c Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Tue, 14 Mar 2023 01:13:15 +0000
Subject: [PATCH 34/35] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Subject: [PATCH 34/36] WIP: media: meson: vdec: fix memory leak of 'new_frame'
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <error27@gmail.com>

View File

@ -1,7 +1,7 @@
From ab5e8fc419ff534374415ded95b1596c235363fd Mon Sep 17 00:00:00 2001
From f70aca0039b995753470bc49c6d76dc398c59cfa Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 7 Jul 2024 03:16:12 +0000
Subject: [PATCH 35/35] Revert "drm/meson: vclk: fix calculation of 59.94
Subject: [PATCH 35/36] Revert "drm/meson: vclk: fix calculation of 59.94
fractional rates"
This reverts commit bfbc68e4d8695497f858a45a142665e22a512ea3.

View File

@ -0,0 +1,949 @@
From 8b81159bdd6fd11c553b40f19d8446129af344b4 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sun, 26 May 2024 12:53:07 +0000
Subject: [PATCH 36/36] WIP: arm64: dts: meson: add Odroid-C2 HiFi-Shield
boards
Add experimental device-tree files for Odroid C2 with HiFi-Shield+ (pcm5102a)
and HiFi-Shield2 (pcm5242) mezzanine boards.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 4 +
.../meson-gxbb-odroidc2-hifishield.dts | 446 +++++++++++++++++
.../meson-gxbb-odroidc2-hifishield2.dts | 458 ++++++++++++++++++
3 files changed, 908 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 2fbda8419c65..6c246387985a 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -98,3 +98,7 @@ meson-g12a-fbx8am-brcm-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo
meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo
meson-g12b-a311d-khadas-vim3-ts050-dtbs := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo
meson-sm1-khadas-vim3l-ts050-dtbs := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo
+
+# Experimental
+dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-odroidc2-hifishield2.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
new file mode 100644
index 000000000000..80b44c2abac2
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield.dts
@@ -0,0 +1,446 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khilman@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/meson-aiu.h>
+
+/ {
+ compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
+ model = "Hardkernel ODROID-C2";
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = &ethmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
+ usb_otg_pwr: regulator-usb-pwrs {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB_OTG_PWR";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ /*
+ * signal name from schematics: PWREN
+ */
+ gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ /*
+ * signal name from schematics: USB_POWER
+ */
+ vin-supply = <&p5v0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-blue {
+ label = "c2:blue:alive";
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+ };
+
+ p5v0: regulator-p5v0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "P5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ hdmi_p5v0: regulator-hdmi-p5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "HDMI_P5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ /* AP2331SA-7 */
+ vin-supply = <&p5v0>;
+ };
+
+ tflash_vdd: regulator-tflash-vdd {
+ compatible = "regulator-fixed";
+
+ regulator-name = "TFLASH_VDD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ /*
+ * signal name from schematics: TFLASH_VDD_EN
+ */
+ gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ /* U16 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ tf_io: gpio-regulator-tf-io {
+ compatible = "regulator-gpio";
+
+ regulator-name = "TF_IO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ /*
+ * signal name from schematics: TF_3V3N_1V8_EN
+ */
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <3300000 0>,
+ <1800000 1>;
+ /* U12/U13 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ vcc1v8: regulator-vcc1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ /* U18 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ vcc3v3: regulator-vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vddio_ao1v8: regulator-vddio-ao1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ /* U17 RT9179GB */
+ vin-supply = <&p5v0>;
+ };
+
+ vddio_ao3v3: regulator-vddio-ao3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /* U11 MP2161GJ-C499 */
+ vin-supply = <&p5v0>;
+ };
+
+ ddr3_1v5: regulator-ddr3-1v5 {
+ compatible = "regulator-fixed";
+ regulator-name = "DDR3_1V5";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ /* U15 MP2161GJ-C499 */
+ vin-supply = <&p5v0>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "ODROID-C2";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
+ pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&cec_AO {
+ status = "okay";
+ pinctrl-0 = <&ao_cec_pins>;
+ pinctrl-names = "default";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc {
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+};
+
+&ethmac {
+ status = "okay";
+ pinctrl-0 = <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&eth_phy0>;
+ phy-mode = "rgmii";
+
+ amlogic,tx-delay-ns = <2>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy0: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_15 */
+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&hdmi_p5v0>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_A {
+ status = "okay";
+ pinctrl-0 = <&i2c_a_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcm5102a: pcm5102a@4c {
+ compatible = "ti,pcm5102a";
+ reg = <0x4c>;
+ #sound-dai-cells = <0>;
+ };
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+ linux,rc-map-name = "rc-odroid";
+};
+
+&gpio_ao {
+ gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
+ "USB HUB nRESET", "USB OTG Power En",
+ "SPDIF_OUTPUT", "IR In", "I2S_MCLK",
+ "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT",
+ "HDMI CEC", "SYS LED",
+ /* GPIO_TEST_N */
+ "";
+};
+
+&gpio {
+ gpio-line-names = /* Bank GPIOZ */
+ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
+ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
+ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
+ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
+ "Eth PHY nRESET", "Eth PHY Intc",
+ /* Bank GPIOH */
+ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
+ /* Bank BOOT */
+ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
+ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
+ "eMMC Reset", "eMMC CMD",
+ "", "", "", "", "", "", "",
+ /* Bank CARD */
+ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
+ "SDCard D3", "SDCard D2", "SDCard Det",
+ /* Bank GPIODV */
+ "", "", "", "", "", "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "", "", "", "",
+ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
+ "PWM D", "PWM B",
+ /* Bank GPIOY */
+ "Revision Bit0", "Revision Bit1", "",
+ "J2 Header Pin35", "", "", "", "J2 Header Pin36",
+ "J2 Header Pin31", "", "", "", "TF VDD En",
+ "J2 Header Pin32", "J2 Header Pin26", "", "",
+ /* Bank GPIOX */
+ "J2 Header Pin29", "J2 Header Pin24",
+ "J2 Header Pin23", "J2 Header Pin22",
+ "J2 Header Pin21", "J2 Header Pin18",
+ "J2 Header Pin33", "J2 Header Pin19",
+ "J2 Header Pin16", "J2 Header Pin15",
+ "J2 Header Pin12", "J2 Header Pin13",
+ "J2 Header Pin8", "J2 Header Pin10",
+ "", "", "", "", "",
+ "J2 Header Pin11", "", "J2 Header Pin7", "",
+ /* Bank GPIOCLK */
+ "", "", "", "";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcc1v8>;
+};
+
+&scpi_clocks {
+ status = "disabled";
+};
+
+/* SD */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-ddr50;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+
+ vmmc-supply = <&tflash_vdd>;
+ vqmmc-supply = <&tf_io>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc3v3>;
+ vqmmc-supply = <&vcc1v8>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb0_phy {
+ status = "disabled";
+ phy-supply = <&usb_otg_pwr>;
+};
+
+&usb1_phy {
+ status = "okay";
+ phy-supply = <&usb_otg_pwr>;
+};
+
+&usb0 {
+ status = "disabled";
+};
+
+&usb1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ hub@1 {
+ /* Genesys Logic GL852G USB 2.0 hub */
+ compatible = "usb5e3,610";
+ reg = <1>;
+ vdd-supply = <&p5v0>;
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
+ };
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts
new file mode 100644
index 000000000000..e94d6dc75fec
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2-hifishield2.dts
@@ -0,0 +1,458 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khilman@kernel.org>
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/meson-aiu.h>
+
+/ {
+ compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
+ model = "Hardkernel ODROID-C2";
+
+ aliases {
+ serial0 = &uart_AO;
+ ethernet0 = &ethmac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
+ usb_otg_pwr: regulator-usb-pwrs {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB_OTG_PWR";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ /*
+ * signal name from schematics: PWREN
+ */
+ gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ /*
+ * signal name from schematics: USB_POWER
+ */
+ vin-supply = <&p5v0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-blue {
+ label = "c2:blue:alive";
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+ };
+
+ p5v0: regulator-p5v0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "P5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ hdmi_p5v0: regulator-hdmi-p5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "HDMI_P5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ /* AP2331SA-7 */
+ vin-supply = <&p5v0>;
+ };
+
+ tflash_vdd: regulator-tflash-vdd {
+ compatible = "regulator-fixed";
+
+ regulator-name = "TFLASH_VDD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ /*
+ * signal name from schematics: TFLASH_VDD_EN
+ */
+ gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ /* U16 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ tf_io: gpio-regulator-tf-io {
+ compatible = "regulator-gpio";
+
+ regulator-name = "TF_IO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ /*
+ * signal name from schematics: TF_3V3N_1V8_EN
+ */
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+
+ states = <3300000 0>,
+ <1800000 1>;
+ /* U12/U13 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ vcc1v8: regulator-vcc1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ /* U18 RT9179GB */
+ vin-supply = <&vddio_ao3v3>;
+ };
+
+ vcc3v3: regulator-vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vddio_ao1v8: regulator-vddio-ao1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ /* U17 RT9179GB */
+ vin-supply = <&p5v0>;
+ };
+
+ vddio_ao3v3: regulator-vddio-ao3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /* U11 MP2161GJ-C499 */
+ vin-supply = <&p5v0>;
+ };
+
+ ddr3_1v5: regulator-ddr3-1v5 {
+ compatible = "regulator-fixed";
+ regulator-name = "DDR3_1V5";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ /* U15 MP2161GJ-C499 */
+ vin-supply = <&p5v0>;
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "ODROID-C2";
+
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
+
+ codec-0 {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
+ dai-link-4 {
+ sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
+
+ codec-0 {
+ sound-dai = <&pcm5242>;
+ };
+ };
+
+ dai-link-5 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+ };
+};
+
+&aiu {
+ status = "okay";
+ pinctrl-0 = <&spdif_out_ao_6_pins &i2s_am_clk_pins &i2s_out_ao_clk_pins &i2s_out_lr_clk_pins &i2s_out_ch01_ao_pins>;
+ pinctrl-names = "default";
+};
+
+&cec_AO {
+ status = "okay";
+ pinctrl-0 = <&ao_cec_pins>;
+ pinctrl-names = "default";
+ hdmi-phandle = <&hdmi_tx>;
+};
+
+&clkc {
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+};
+
+&ethmac {
+ status = "okay";
+ pinctrl-0 = <&eth_rgmii_pins>;
+ pinctrl-names = "default";
+ phy-handle = <&eth_phy0>;
+ phy-mode = "rgmii";
+
+ amlogic,tx-delay-ns = <2>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy0: ethernet-phy@0 {
+ /* Realtek RTL8211F (0x001cc916) */
+ reg = <0>;
+
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
+
+ interrupt-parent = <&gpio_intc>;
+ /* MAC_INTR on GPIOZ_15 */
+ interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
+};
+
+&hdmi_tx {
+ status = "okay";
+ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
+ pinctrl-names = "default";
+ hdmi-supply = <&hdmi_p5v0>;
+};
+
+&hdmi_tx_tmds_port {
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+};
+
+&i2c_A {
+ status = "okay";
+ pinctrl-0 = <&i2c_a_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcm5242: pcm5242@4c {
+ compatible = "ti,pcm5242";
+ reg = <0x4c>;
+ #sound-dai-cells = <0>;
+
+ AVDD-supply = <&vddio_ao3v3>;
+ DVDD-supply = <&vddio_ao3v3>;
+ CPVDD-supply = <&vddio_ao3v3>;
+ };
+};
+
+&ir {
+ status = "okay";
+ pinctrl-0 = <&remote_input_ao_pins>;
+ pinctrl-names = "default";
+ linux,rc-map-name = "rc-odroid";
+};
+
+&gpio_ao {
+ gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
+ "USB HUB nRESET", "USB OTG Power En",
+ "SPDIF_OUTPUT", "IR In", "I2S_MCLK",
+ "I2S_SCLK", "I2S_LRCLK", "I2S_DATA_OUTPUT",
+ "HDMI CEC", "SYS LED",
+ /* GPIO_TEST_N */
+ "";
+};
+
+&gpio {
+ gpio-line-names = /* Bank GPIOZ */
+ "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
+ "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
+ "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
+ "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
+ "Eth PHY nRESET", "Eth PHY Intc",
+ /* Bank GPIOH */
+ "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
+ /* Bank BOOT */
+ "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
+ "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
+ "eMMC Reset", "eMMC CMD",
+ "", "", "", "", "", "", "",
+ /* Bank CARD */
+ "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
+ "SDCard D3", "SDCard D2", "SDCard Det",
+ /* Bank GPIODV */
+ "", "", "", "", "", "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "", "", "", "",
+ "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
+ "PWM D", "PWM B",
+ /* Bank GPIOY */
+ "Revision Bit0", "Revision Bit1", "",
+ "J2 Header Pin35", "", "", "", "J2 Header Pin36",
+ "J2 Header Pin31", "", "", "", "TF VDD En",
+ "J2 Header Pin32", "J2 Header Pin26", "", "",
+ /* Bank GPIOX */
+ "J2 Header Pin29", "J2 Header Pin24",
+ "J2 Header Pin23", "J2 Header Pin22",
+ "J2 Header Pin21", "J2 Header Pin18",
+ "J2 Header Pin33", "J2 Header Pin19",
+ "J2 Header Pin16", "J2 Header Pin15",
+ "J2 Header Pin12", "J2 Header Pin13",
+ "J2 Header Pin8", "J2 Header Pin10",
+ "", "", "", "", "",
+ "J2 Header Pin11", "", "J2 Header Pin7", "",
+ /* Bank GPIOCLK */
+ "", "", "", "";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcc1v8>;
+};
+
+&scpi_clocks {
+ status = "disabled";
+};
+
+/* SD */
+&sd_emmc_b {
+ status = "okay";
+ pinctrl-0 = <&sdcard_pins>;
+ pinctrl-1 = <&sdcard_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-ddr50;
+ max-frequency = <100000000>;
+ disable-wp;
+
+ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
+
+ vmmc-supply = <&tflash_vdd>;
+ vqmmc-supply = <&tf_io>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+ status = "okay";
+ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
+ pinctrl-1 = <&emmc_clk_gate_pins>;
+ pinctrl-names = "default", "clk-gate";
+
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ vmmc-supply = <&vcc3v3>;
+ vqmmc-supply = <&vcc1v8>;
+};
+
+&uart_AO {
+ status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&usb0_phy {
+ status = "disabled";
+ phy-supply = <&usb_otg_pwr>;
+};
+
+&usb1_phy {
+ status = "okay";
+ phy-supply = <&usb_otg_pwr>;
+};
+
+&usb0 {
+ status = "disabled";
+};
+
+&usb1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ hub@1 {
+ /* Genesys Logic GL852G USB 2.0 hub */
+ compatible = "usb5e3,610";
+ reg = <1>;
+ vdd-supply = <&p5v0>;
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
+ };
+};
--
2.34.1

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.11.5 Kernel Configuration
# Linux/arm64 6.12.0 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-14.2.0 (GCC) 14.2.0"
CONFIG_CC_IS_GCC=y
@ -11,6 +11,8 @@ CONFIG_AS_VERSION=24301
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=24301
CONFIG_LLD_VERSION=0
CONFIG_RUSTC_VERSION=0
CONFIG_RUSTC_LLVM_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
@ -102,6 +104,7 @@ CONFIG_PREEMPT_BUILD=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
# CONFIG_PREEMPT_RT is not set
CONFIG_PREEMPT_COUNT=y
CONFIG_PREEMPTION=y
# CONFIG_PREEMPT_DYNAMIC is not set
@ -167,6 +170,7 @@ CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_WRITEBACK=y
CONFIG_CGROUP_SCHED=y
CONFIG_GROUP_SCHED_WEIGHT=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
# CONFIG_RT_GROUP_SCHED is not set
@ -175,6 +179,7 @@ CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_RDMA=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
# CONFIG_CPUSETS_V1 is not set
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
@ -268,6 +273,7 @@ CONFIG_PROFILING=y
# end of General setup
CONFIG_ARM64=y
CONFIG_RUSTC_SUPPORTS_ARM64=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_64BIT=y
CONFIG_MMU=y
@ -428,6 +434,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y
CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y
CONFIG_ARCH_DEFAULT_CRASH_DUMP=y
# CONFIG_XEN is not set
CONFIG_ARCH_FORCE_MAX_ORDER=10
CONFIG_UNMAP_KERNEL_AT_EL0=y
@ -500,8 +507,14 @@ CONFIG_ARM64_MTE=y
CONFIG_ARM64_EPAN=y
# end of ARMv8.7 architectural features
#
# ARMv8.9 architectural features
#
CONFIG_ARM64_POE=y
CONFIG_ARCH_PKEY_BITS=3
# end of ARMv8.9 architectural features
CONFIG_ARM64_SVE=y
CONFIG_ARM64_SME=y
CONFIG_ARM64_PSEUDO_NMI=y
# CONFIG_ARM64_DEBUG_PRIORITY_MASKING is not set
CONFIG_RELOCATABLE=y
@ -689,6 +702,7 @@ CONFIG_CLONE_BACKWARDS=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_COMPAT_OLD_SIGACTION=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_ARCH_SUPPORTS_RT=y
CONFIG_HAVE_ARCH_VMAP_STACK=y
CONFIG_VMAP_STACK=y
CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y
@ -703,6 +717,7 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
# CONFIG_LOCK_EVENT_COUNTS is not set
CONFIG_ARCH_HAS_RELR=y
CONFIG_RELR=y
CONFIG_ARCH_HAS_MEM_ENCRYPT=y
CONFIG_HAVE_PREEMPT_DYNAMIC=y
CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y
CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y
@ -738,10 +753,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
CONFIG_MODULE_COMPRESS_NONE=y
# CONFIG_MODULE_COMPRESS_GZIP is not set
# CONFIG_MODULE_COMPRESS_XZ is not set
# CONFIG_MODULE_COMPRESS_ZSTD is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set
@ -837,7 +849,6 @@ CONFIG_COREDUMP=y
#
CONFIG_SWAP=y
# CONFIG_ZSWAP is not set
CONFIG_HAVE_ZSMALLOC=y
#
# Slab allocator options
@ -866,8 +877,9 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_SPLIT_PTE_PTLOCKS=y
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
CONFIG_SPLIT_PMD_PTLOCKS=y
CONFIG_COMPACTION=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_PAGE_REPORTING is not set
@ -889,6 +901,8 @@ CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
CONFIG_THP_SWAP=y
# CONFIG_READ_ONLY_THP_FOR_FS is not set
CONFIG_PGTABLE_HAS_HUGE_LEAVES=y
CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y
CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y
CONFIG_CMA=y
CONFIG_CMA_DEBUGFS=y
# CONFIG_CMA_SYSFS is not set
@ -903,7 +917,9 @@ CONFIG_ARCH_HAS_ZONE_DMA_SET=y
CONFIG_ZONE_DMA=y
CONFIG_ZONE_DMA32=y
CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
CONFIG_ARCH_USES_PG_ARCH_X=y
CONFIG_ARCH_HAS_PKEYS=y
CONFIG_ARCH_USES_PG_ARCH_2=y
CONFIG_ARCH_USES_PG_ARCH_3=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_PERCPU_STATS is not set
# CONFIG_GUP_TEST is not set
@ -935,6 +951,7 @@ CONFIG_NET_INGRESS=y
CONFIG_NET_EGRESS=y
CONFIG_NET_XGRESS=y
CONFIG_SKB_EXTENSIONS=y
CONFIG_NET_DEVMEM=y
#
# Networking options
@ -1377,6 +1394,7 @@ CONFIG_BT_HCIUART_RTL=y
CONFIG_BT_HCIUART_QCA=y
# CONFIG_BT_HCIUART_AG6XX is not set
# CONFIG_BT_HCIUART_MRVL is not set
# CONFIG_BT_HCIUART_AML is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBCM4377 is not set
# CONFIG_BT_HCIBPA10X is not set
@ -1419,7 +1437,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
# CONFIG_MAC80211_MESH is not set
CONFIG_MAC80211_LEDS=y
# CONFIG_MAC80211_MESSAGE_TRACING is not set
# CONFIG_MAC80211_DEBUG_MENU is not set
CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
CONFIG_RFKILL=m
@ -1464,6 +1481,7 @@ CONFIG_PCI_QUIRKS=y
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_NPEM is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_PCI_DYNAMIC_OF_NODES is not set
@ -1746,6 +1764,8 @@ CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
CONFIG_CDROM=y
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_ZRAM is not set
CONFIG_ZRAM_DEF_COMP="unset-value"
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=0
# CONFIG_BLK_DEV_DRBD is not set
@ -1773,6 +1793,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_RPMB is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
@ -2110,6 +2131,7 @@ CONFIG_NET_VENDOR_ASIX=y
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_ETHOC is not set
# CONFIG_OA_TC6 is not set
# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
# CONFIG_NET_VENDOR_PENSANDO is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
@ -2120,6 +2142,7 @@ CONFIG_NET_VENDOR_REALTEK=y
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
CONFIG_R8169=y
# CONFIG_RTASE is not set
# CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
@ -2377,7 +2400,6 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y
CONFIG_BRCMFMAC_SDIO=y
# CONFIG_BRCMFMAC_USB is not set
# CONFIG_BRCMFMAC_PCIE is not set
# CONFIG_BRCM_TRACING is not set
CONFIG_BRCMDBG=y
CONFIG_WLAN_VENDOR_INTEL=y
# CONFIG_IPW2100 is not set
@ -2573,7 +2595,6 @@ CONFIG_KEYBOARD_GPIO_POLLED=m
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
@ -2803,7 +2824,6 @@ CONFIG_DEVPORT=y
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
@ -3335,6 +3355,7 @@ CONFIG_THERMAL=y
# CONFIG_THERMAL_NETLINK is not set
# CONFIG_THERMAL_STATISTICS is not set
# CONFIG_THERMAL_DEBUGFS is not set
# CONFIG_THERMAL_CORE_TESTING is not set
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
@ -3423,6 +3444,7 @@ CONFIG_BCMA_DRIVER_PCI=y
# Multifunction device drivers
#
CONFIG_MFD_CORE=y
# CONFIG_MFD_ADP5585 is not set
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_SMPRO is not set
@ -3681,6 +3703,7 @@ CONFIG_MEDIA_CEC_SUPPORT=y
CONFIG_CEC_MESON_AO=y
CONFIG_CEC_MESON_G12A_AO=y
# CONFIG_CEC_GPIO is not set
# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set
# CONFIG_USB_PULSE8_CEC is not set
# CONFIG_USB_RAINSHADOW_CEC is not set
# end of CEC support
@ -4376,6 +4399,7 @@ CONFIG_DRM=y
CONFIG_DRM_MIPI_DSI=y
# CONFIG_DRM_DEBUG_MM is not set
CONFIG_DRM_KMS_HELPER=y
# CONFIG_DRM_PANIC is not set
# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
CONFIG_DRM_DEBUG_MODESET_LOCK=y
CONFIG_DRM_FBDEV_EMULATION=y
@ -4435,6 +4459,7 @@ CONFIG_DRM_PANEL=y
# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set
# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set
# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set
# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set
# CONFIG_DRM_PANEL_EBBG_FT8719 is not set
# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set
# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set
@ -4735,10 +4760,10 @@ CONFIG_SND_MAX_CARDS=32
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_PROC_FS=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
CONFIG_SND_CTL_FAST_LOOKUP=y
# CONFIG_SND_DEBUG is not set
# CONFIG_SND_CTL_INPUT_VALIDATION is not set
# CONFIG_SND_UTIMER is not set
CONFIG_SND_VMASTER=y
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_DRIVERS is not set
@ -5016,6 +5041,7 @@ CONFIG_SND_SOC_SPDIF=y
# CONFIG_SND_SOC_ZL38060 is not set
# CONFIG_SND_SOC_MAX9759 is not set
# CONFIG_SND_SOC_MT6351 is not set
# CONFIG_SND_SOC_MT6357 is not set
# CONFIG_SND_SOC_MT6358 is not set
# CONFIG_SND_SOC_MT6660 is not set
# CONFIG_SND_SOC_NAU8315 is not set
@ -5079,6 +5105,7 @@ CONFIG_HID_EZKEY=y
# CONFIG_HID_GFRM is not set
# CONFIG_HID_GLORIOUS is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_GOODIX_SPI is not set
# CONFIG_HID_GOOGLE_STADIA_FF is not set
# CONFIG_HID_VIVALDI is not set
# CONFIG_HID_GT683R is not set
@ -5214,7 +5241,6 @@ CONFIG_USB_MON=m
# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_XHCI_HCD=y
# CONFIG_USB_XHCI_DBGCAP is not set
# CONFIG_USB_XHCI_PCI_RENESAS is not set
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
@ -5669,6 +5695,7 @@ CONFIG_RTC_DRV_PCF8563=m
# CONFIG_RTC_DRV_RV3032 is not set
# CONFIG_RTC_DRV_RV8803 is not set
# CONFIG_RTC_DRV_S5M is not set
# CONFIG_RTC_DRV_SD2405AL is not set
# CONFIG_RTC_DRV_SD3078 is not set
#
@ -5823,7 +5850,6 @@ CONFIG_VIDEO_MESON_VDEC=m
# CONFIG_STAGING_MEDIA_DEPRECATED is not set
# CONFIG_LTE_GDM724X is not set
# CONFIG_FB_TFT is not set
# CONFIG_KS7010 is not set
# CONFIG_XIL_AXIS_FIFO is not set
# CONFIG_FIELDBUS_DEV is not set
# CONFIG_VME_BUS is not set
@ -6021,7 +6047,6 @@ CONFIG_MESON_GX_SOCINFO=y
#
# Amlogic PM Domains
#
CONFIG_MESON_GX_PM_DOMAINS=y
CONFIG_MESON_EE_PM_DOMAINS=y
CONFIG_MESON_SECURE_PM_DOMAINS=y
# end of Amlogic PM Domains
@ -6067,6 +6092,7 @@ CONFIG_EXTCON=y
# CONFIG_EXTCON_ADC_JACK is not set
# CONFIG_EXTCON_FSA9480 is not set
# CONFIG_EXTCON_GPIO is not set
# CONFIG_EXTCON_LC824206XA is not set
# CONFIG_EXTCON_MAX3355 is not set
# CONFIG_EXTCON_PTN5150 is not set
# CONFIG_EXTCON_RT8973A is not set
@ -6104,6 +6130,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
# CONFIG_ADXL367_I2C is not set
# CONFIG_ADXL372_SPI is not set
# CONFIG_ADXL372_I2C is not set
# CONFIG_ADXL380_SPI is not set
# CONFIG_ADXL380_I2C is not set
# CONFIG_BMA180 is not set
# CONFIG_BMA220 is not set
# CONFIG_BMA400 is not set
@ -6140,7 +6168,9 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
#
# Analog to digital converters
#
# CONFIG_AD4000 is not set
# CONFIG_AD4130 is not set
# CONFIG_AD4695 is not set
# CONFIG_AD7091R5 is not set
# CONFIG_AD7091R8 is not set
# CONFIG_AD7124 is not set
@ -6191,6 +6221,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
# CONFIG_MCP3911 is not set
CONFIG_MESON_SARADC=y
# CONFIG_NAU7802 is not set
# CONFIG_PAC1921 is not set
# CONFIG_PAC1934 is not set
# CONFIG_QCOM_SPMI_IADC is not set
# CONFIG_QCOM_SPMI_VADC is not set
@ -6318,6 +6349,7 @@ CONFIG_MESON_SARADC=y
# CONFIG_DS4424 is not set
# CONFIG_LTC1660 is not set
# CONFIG_LTC2632 is not set
# CONFIG_LTC2664 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MAX5522 is not set
@ -6403,6 +6435,7 @@ CONFIG_MESON_SARADC=y
#
# CONFIG_AM2315 is not set
# CONFIG_DHT11 is not set
# CONFIG_ENS210 is not set
# CONFIG_HDC100X is not set
# CONFIG_HDC2010 is not set
# CONFIG_HDC3020 is not set
@ -6447,6 +6480,7 @@ CONFIG_MESON_SARADC=y
# CONFIG_APDS9306 is not set
# CONFIG_APDS9960 is not set
# CONFIG_AS73211 is not set
# CONFIG_BH1745 is not set
# CONFIG_BH1750 is not set
# CONFIG_BH1780 is not set
# CONFIG_CM32181 is not set
@ -6579,6 +6613,7 @@ CONFIG_MESON_SARADC=y
# CONFIG_MPRLS0025PA is not set
# CONFIG_MS5611 is not set
# CONFIG_MS5637 is not set
# CONFIG_SDP500 is not set
# CONFIG_IIO_ST_PRESS is not set
# CONFIG_T5403 is not set
# CONFIG_HP206C is not set
@ -6594,6 +6629,7 @@ CONFIG_MESON_SARADC=y
#
# Proximity and distance sensors
#
# CONFIG_HX9023S is not set
# CONFIG_IRSD200 is not set
# CONFIG_ISL29501 is not set
# CONFIG_LIDAR_LITE_V2 is not set
@ -6608,6 +6644,7 @@ CONFIG_MESON_SARADC=y
# CONFIG_SRF08 is not set
# CONFIG_VCNL3020 is not set
# CONFIG_VL53L0X_I2C is not set
# CONFIG_AW96103 is not set
# end of Proximity and distance sensors
#
@ -6658,7 +6695,6 @@ CONFIG_ARM_GIC_MAX_NR=1
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_IRQ_MSI_LIB=y
# CONFIG_AL_FIC is not set
# CONFIG_LAN966X_OIC is not set
@ -6720,6 +6756,7 @@ CONFIG_PHY_MESON_AXG_MIPI_DPHY=y
# CONFIG_ARM_CCI_PMU is not set
# CONFIG_ARM_CCN is not set
# CONFIG_ARM_CMN is not set
# CONFIG_ARM_NI is not set
# CONFIG_ARM_PMU is not set
# CONFIG_ARM_SMMU_V3_PMU is not set
# CONFIG_ARM_DSU_PMU is not set
@ -6751,6 +6788,7 @@ CONFIG_NVMEM_LAYOUTS=y
#
# CONFIG_NVMEM_LAYOUT_SL28_VPD is not set
# CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set
# CONFIG_NVMEM_LAYOUT_U_BOOT_ENV is not set
# end of Layout Types
CONFIG_NVMEM_MESON_EFUSE=y
@ -7015,6 +7053,7 @@ CONFIG_CIFS_DEBUG=y
# CONFIG_CIFS_SWN_UPCALL is not set
CONFIG_CIFS_FSCACHE=y
# CONFIG_CIFS_ROOT is not set
# CONFIG_CIFS_COMPRESSION is not set
# CONFIG_SMB_SERVER is not set
CONFIG_SMBFS=y
# CONFIG_CODA_FS is not set
@ -7454,8 +7493,11 @@ CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
CONFIG_XZ_DEC_ARM64=y
# CONFIG_XZ_DEC_SPARC is not set
# CONFIG_XZ_DEC_RISCV is not set
# CONFIG_XZ_DEC_MICROLZMA is not set
# CONFIG_XZ_DEC_BCJ is not set
# CONFIG_XZ_DEC_TEST is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_XARRAY_MULTI=y
@ -7464,7 +7506,7 @@ CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_DMA_OPS=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_NEED_SG_DMA_FLAGS=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NEED_DMA_MAP_STATE=y
@ -7510,6 +7552,7 @@ CONFIG_OID_REGISTRY=y
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_VDSO_TIME_NS=y
CONFIG_VDSO_GETRANDOM=y
CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y