Merge pull request #3863 from fritsch/amd-bisect

AMD Fix APU performance regression

packages/graphics/Mesa/patches/Mesa-1002-Revert-r600g-radeonsi-Always-use-GTT-again-for-PIPE_.patch

@@ -0,0 +1,33 @@
+From 2402ec06e7d968bfa2dd06d73d5d9a5096fcfbb5 Mon Sep 17 00:00:00 2001
+From: fritsch <Peter.Fruehberger@gmail.com>
+Date: Tue, 3 Feb 2015 10:10:48 +0100
+Subject: [PATCH 2/3] Revert "r600g,radeonsi: Always use GTT again for
+ PIPE_USAGE_STREAM buffers"
+
+This reverts commit 64c2bdc334ba472603b1e7cd2c3046cfbce285b6.
+---
+ src/gallium/drivers/radeon/r600_buffer_common.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
+index acdabc0..ee05776 100644
+--- a/src/gallium/drivers/radeon/r600_buffer_common.c
++++ b/src/gallium/drivers/radeon/r600_buffer_common.c
+@@ -110,13 +110,11 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
+ 	enum radeon_bo_flag flags = 0;
+ 
+ 	switch (res->b.b.usage) {
+-	case PIPE_USAGE_STREAM:
+-		flags = RADEON_FLAG_GTT_WC;
+-		/* fall through */
+ 	case PIPE_USAGE_STAGING:
+ 		/* Transfers are likely to occur more often with these resources. */
+ 		res->domains = RADEON_DOMAIN_GTT;
+ 		break;
++	case PIPE_USAGE_STREAM:
+ 	case PIPE_USAGE_DYNAMIC:
+ 		/* Older kernels didn't always flush the HDP cache before
+ 		 * CS execution
+-- 
+1.9.1
+

packages/linux/patches/3.17.8/linux-999.06-radeon-upstream-fixes.patch

@@ -1,21 +0,0 @@
-commit 108aa376ae52e634f6465424554fa9319c0a7a61
-Author: Michel Dänzer <michel.daenzer@amd.com>
-Date:   Fri Oct 10 18:01:18 2014 +0900
-
-    drm/radeon: Ignore RADEON_GEM_GTT_WC on Kabini and Aruba
-
-diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
-index 7f3b1e1..aea7c6e 100644
---- a/drivers/gpu/drm/radeon/radeon_object.c
-+++ b/drivers/gpu/drm/radeon/radeon_object.c
-@@ -235,6 +235,10 @@ int radeon_bo_create(struct radeon_device *rdev,
- 	if (!(rdev->flags & RADEON_IS_PCIE))
- 		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
- 
-+	/* XXX: Write-combined CPU mappings of GTT seem broken on Kabini and Aruba */
-+	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_ARUBA)
-+		bo->flags &= ~RADEON_GEM_GTT_WC;
-+
- 	radeon_ttm_placement_from_domain(bo, domain);
- 	/* Kernel allocation are uninterruptible */
- 	down_read(&rdev->pm.mclk_lock);