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Merge pull request #8785 from heitbaum/u-boot

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u-boot: update to 2024.04
This commit is contained in:
CvH 2024-05-01 21:03:29 +02:00 committed by GitHub
commit fbc5c64505
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12 changed files with 15 additions and 1606 deletions
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4
packages/tools/u-boot/package.mk
View File

@ -3,8 +3,8 @@
# Copyright (C) 2017-present Team LibreELEC (https://libreelec.tv)
PKG_NAME="u-boot"
PKG_VERSION="2024.01"
PKG_SHA256="b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3"
PKG_VERSION="2024.04"
PKG_SHA256="18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a"
PKG_ARCH="arm aarch64"
PKG_LICENSE="GPL"
PKG_SITE="https://www.denx.de/wiki/U-Boot"

41
projects/Allwinner/patches/u-boot/0001-sunxi-spl-Disable-padding-from-SPL_PAD_TO.patch
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@ -1,41 +0,0 @@
From 8674b92c48a528ec82a548bb677d0231316f5aa4 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 22 Jan 2023 14:29:17 -0600
Subject: [PATCH 01/13] sunxi: spl: Disable padding from SPL_PAD_TO
Starting with H6, Allwinner removed the artificial 32 KiB SPL size limit
from the boot ROM. Now SPL size is only limited by the available SRAM.
This limit ranges from 152 KiB on H6 to a whopping 2052 KiB on R329. To
take advantage of this additional space, we must increase SPL_MAX_SIZE.
Since we do not want to unnecessarily pad SPL out to these giant sizes,
we must set SPL_PAD_TO to zero. This causes no problems because binman
already takes care of appending the SPL payload at the right offset.
Commit-changes: 2
- New patch for v2
Cover-changes: 2
- Disable padding from SPL_PAD_TO
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
common/spl/Kconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 25cd18afda..a0968ff106 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -97,8 +97,7 @@ config SPL_PAD_TO
default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
default 0x10000 if ARCH_KEYSTONE
- default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
- default 0x0 if ARCH_MTMIPS
+ default 0x0 if ARCH_MTMIPS || ARCH_SUNXI
default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
default SPL_MAX_SIZE
help
--
2.34.1

112
projects/Allwinner/patches/u-boot/0002-sunxi-binman-Move-BL31-and-SCP-firmware-addresses-to.patch
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@ -1,112 +0,0 @@
From fa31297e5f79d6eb97aed3cf94326124b308e337 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 22 Jan 2023 11:46:34 -0600
Subject: [PATCH 02/13] sunxi: binman: Move BL31 and SCP firmware addresses to
Kconfig
This is easier to read than the #ifdef staircase, provides better
visibility into the memory map (alongside the other Kconfig
definitions), and allows these addresses to be reused from code.
Commit-changes: 2
- New patch for v2, split from the .dtsi changes
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/dts/sunxi-u-boot.dtsi | 24 +++++++-----------------
arch/arm/mach-sunxi/Kconfig | 17 +++++++++++++++++
2 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index a0c8abb703..7a8764e463 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -1,15 +1,5 @@
#include <config.h>
-#ifdef CONFIG_MACH_SUN50I_H6
-#define BL31_ADDR 0x104000
-#define SCP_ADDR 0x114000
-#elif defined(CONFIG_MACH_SUN50I_H616)
-#define BL31_ADDR 0x40000000
-#else
-#define BL31_ADDR 0x44000
-#define SCP_ADDR 0x50000
-#endif
-
/ {
aliases {
mmc0 = &mmc0;
@@ -69,8 +59,8 @@
os = "arm-trusted-firmware";
arch = "arm64";
compression = "none";
- load = <BL31_ADDR>;
- entry = <BL31_ADDR>;
+ load = <CONFIG_SUNXI_BL31_BASE>;
+ entry = <CONFIG_SUNXI_BL31_BASE>;
atf-bl31 {
filename = "bl31.bin";
@@ -78,13 +68,13 @@
};
};
-#ifdef SCP_ADDR
+#if CONFIG_SUNXI_SCP_BASE
scp {
description = "SCP firmware";
type = "firmware";
arch = "or1k";
compression = "none";
- load = <SCP_ADDR>;
+ load = <CONFIG_SUNXI_SCP_BASE>;
scp {
filename = "scp.bin";
@@ -106,10 +96,10 @@
@config-SEQ {
description = "NAME";
firmware = "atf";
-#ifndef SCP_ADDR
- loadables = "uboot";
-#else
+#if CONFIG_SUNXI_SCP_BASE
loadables = "scp", "uboot";
+#else
+ loadables = "uboot";
#endif
fdt = "fdt-SEQ";
};
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index a10e4c06b6..b0fbda0aa0 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -155,6 +155,23 @@ config SUNXI_RVBAR_ALTERNATIVE
for all other SoCs, so the content of the SRAM_VER_REG becomes
irrelevant there, and we can use the same code.
+config SUNXI_BL31_BASE
+ hex
+ default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x00104000 if MACH_SUN50I_H6
+ default 0x40000000 if MACH_SUN50I_H616
+ default 0x0
+ help
+ Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
+
+config SUNXI_SCP_BASE
+ hex
+ default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x00114000 if MACH_SUN50I_H6
+ default 0x0
+ help
+ Address where SCP firmware is loaded, or zero if it is not used.
+
config SUNXI_A64_TIMER_ERRATUM
bool
--
2.34.1

99
projects/Allwinner/patches/u-boot/0003-sunxi-binman-Support-FIT-generation-for-32-bit-SoCs.patch
View File

@ -1,99 +0,0 @@
From 50ec5566a9eb50288c7aca9d85182e152aaf47d9 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 22 Jan 2023 11:57:42 -0600
Subject: [PATCH 03/13] sunxi: binman: Support FIT generation for 32-bit SoCs
Some 32-bit SoCs can use SCP firmware to implement additional PSCI
functionality, such as system suspend. In order to load this firmware
from SPL, we need to generate and use a FIT instead of a legacy image.
Adjust the binman FIT definition so it does not rely on TF-A BL31, as
this is not used on 32-bit SoCs. Instead, after loading the firmware,
U-Boot proper is executed directly.
Series-changes: 2
- Rely on binman min-size instead of using explicit offsets
- Use Kconfig for firmware addresses instead of an #ifdef staircase
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/dts/sunxi-u-boot.dtsi | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 7a8764e463..ed1cb91eeb 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -1,5 +1,11 @@
#include <config.h>
+#ifdef CONFIG_ARM64
+#define ARCH "arm64"
+#else
+#define ARCH "arm"
+#endif
+
/ {
aliases {
mmc0 = &mmc0;
@@ -34,30 +40,32 @@
filename = "spl/sunxi-spl.bin";
};
-#ifdef CONFIG_ARM64
+#ifdef CONFIG_SPL_LOAD_FIT
fit {
- description = "Configuration to load ATF before U-Boot";
+ description = "Configuration to load U-Boot and firmware";
#address-cells = <1>;
fit,fdt-list = "of-list";
images {
uboot {
- description = "U-Boot (64-bit)";
+ description = "U-Boot";
type = "standalone";
os = "u-boot";
- arch = "arm64";
+ arch = ARCH;
compression = "none";
load = <CONFIG_TEXT_BASE>;
+ entry = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};
};
+#if CONFIG_SUNXI_BL31_BASE
atf {
description = "ARM Trusted Firmware";
type = "firmware";
os = "arm-trusted-firmware";
- arch = "arm64";
+ arch = ARCH;
compression = "none";
load = <CONFIG_SUNXI_BL31_BASE>;
entry = <CONFIG_SUNXI_BL31_BASE>;
@@ -67,6 +75,7 @@
missing-msg = "atf-bl31-sunxi";
};
};
+#endif
#if CONFIG_SUNXI_SCP_BASE
scp {
@@ -95,7 +104,11 @@
@config-SEQ {
description = "NAME";
+#if CONFIG_SUNXI_BL31_BASE
firmware = "atf";
+#else
+ firmware = "uboot";
+#endif
#if CONFIG_SUNXI_SCP_BASE
loadables = "scp", "uboot";
#else
--
2.34.1

14
projects/Allwinner/patches/u-boot/0004-sunxi-Enable-SPL-FIT-loading-for-32-bit-SoCs.patch
View File

@ -58,20 +58,6 @@ index d812685c98..42781d02f0 100644
imply SPL_MMC if MMC
imply SPL_POWER
imply SPL_SERIAL
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index a0968ff106..aebbfbf99d 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -567,8 +567,7 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
- default y if ARCH_IMX8M || ARCH_IMX9
+ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI
help
Enable this to reduce the size of the FIT image loading code
in SPL, if space for the SPL binary is very tight.
--
2.34.1

14
projects/Allwinner/patches/u-boot/0016-sunxi-dram-Fix-incorrect-ram-size-detection-for-some-H6-boards.patch
View File

@ -23,19 +23,19 @@ diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpe
index cdf2750f1c..5758c58e07 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -32,6 +32,7 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
#ifndef CONFIG_MACH_SUNIV
bool mctl_mem_matches(u32 offset)
{
@@ -41,6 +41,7 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
val_base = readl(base);
val_offset = readl(base + offset);
+ dsb();
/* Try to write different values to RAM at two addresses */
writel(0, CFG_SYS_SDRAM_BASE);
writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset);
writel(0, base);
writel(0xaa55aa55, base + offset);
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index bff2e42513..a031a845f5 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -623,6 +623,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
@@ -621,6 +621,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para)
para->cols = 11;
mctl_core_init(para);

197
projects/Amlogic/patches/u-boot/u-boot-0002-FROMGIT-net-Add-Amlogic-GXL-MDIO-Mux-driver.patch
View File

@ -1,197 +0,0 @@
From 5bf96e879251fdbce4cab01c1efb1157070f6ffc Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 13 Dec 2023 10:30:12 +0100
Subject: [PATCH 2/6] FROMGIT: net: Add Amlogic GXL MDIO Mux driver
Port the mdio-mux-meson-gxl.c Linux driver introduced in [1],
and adapt it to U-Boot.
This driver is needed to boot U-Boot with Linux DT since v6.4,
since it switched the MDIO mux from the mmio to a proper GXL driver.
[1] 9a24e1ff4326 ("net: mdio: add amlogic gxl mdio mux support")
Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-1-c56bb02a75ea@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/net/Kconfig | 7 ++
drivers/net/Makefile | 1 +
drivers/net/mdio_mux_meson_gxl.c | 138 +++++++++++++++++++++++++++++++
3 files changed, 146 insertions(+)
create mode 100644 drivers/net/mdio_mux_meson_gxl.c
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index ebab4d9f2e5..18ec910d12f 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -988,4 +988,11 @@ config MDIO_MUX_MESON_G12A
This driver is used for the MDIO mux found on the Amlogic G12A & compatible
SoCs.
+config MDIO_MUX_MESON_GXL
+ bool "MDIO MUX for Amlogic Meson GXL SoCs"
+ depends on DM_MDIO_MUX
+ help
+ This driver is used for the MDIO mux found on the Amlogic GXL & compatible
+ SoCs.
+
endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 1ce6fea323c..3794609fd2f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o
obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o
obj-$(CONFIG_MDIO_MUX_MESON_G12A) += mdio_mux_meson_g12a.o
+obj-$(CONFIG_MDIO_MUX_MESON_GXL) += mdio_mux_meson_gxl.o
obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o
obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
diff --git a/drivers/net/mdio_mux_meson_gxl.c b/drivers/net/mdio_mux_meson_gxl.c
new file mode 100644
index 00000000000..8ef3ae598b7
--- /dev/null
+++ b/drivers/net/mdio_mux_meson_gxl.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Baylibre, SAS.
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
+ */
+
+#include <dm.h>
+#include <errno.h>
+#include <log.h>
+#include <miiphy.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+
+#define ETH_REG2 0x0
+#define REG2_PHYID GENMASK(21, 0)
+#define EPHY_GXL_ID 0x110181
+#define REG2_LEDACT GENMASK(23, 22)
+#define REG2_LEDLINK GENMASK(25, 24)
+#define REG2_DIV4SEL BIT(27)
+#define REG2_ADCBYPASS BIT(30)
+#define REG2_CLKINSEL BIT(31)
+#define ETH_REG3 0x4
+#define REG3_ENH BIT(3)
+#define REG3_CFGMODE GENMASK(6, 4)
+#define REG3_AUTOMDIX BIT(7)
+#define REG3_PHYADDR GENMASK(12, 8)
+#define REG3_PWRUPRST BIT(21)
+#define REG3_PWRDOWN BIT(22)
+#define REG3_LEDPOL BIT(23)
+#define REG3_PHYMDI BIT(26)
+#define REG3_CLKINEN BIT(29)
+#define REG3_PHYIP BIT(30)
+#define REG3_PHYEN BIT(31)
+#define ETH_REG4 0x8
+#define REG4_PWRUPRSTSIG BIT(0)
+
+#define MESON_GXL_MDIO_EXTERNAL_ID 0
+#define MESON_GXL_MDIO_INTERNAL_ID 1
+
+struct mdio_mux_meson_gxl_priv {
+ phys_addr_t regs;
+};
+
+static int meson_gxl_enable_internal_mdio(struct mdio_mux_meson_gxl_priv *priv)
+{
+ u32 val;
+
+ /* Setup the internal phy */
+ val = (REG3_ENH |
+ FIELD_PREP(REG3_CFGMODE, 0x7) |
+ REG3_AUTOMDIX |
+ FIELD_PREP(REG3_PHYADDR, 8) |
+ REG3_LEDPOL |
+ REG3_PHYMDI |
+ REG3_CLKINEN |
+ REG3_PHYIP);
+
+ writel(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4);
+ writel(val, priv->regs + ETH_REG3);
+ mdelay(10);
+
+ /* NOTE: The HW kept the phy id configurable at runtime.
+ * The id below is arbitrary. It is the one used in the vendor code.
+ * The only constraint is that it must match the one in
+ * drivers/net/phy/meson-gxl.c to properly match the PHY.
+ */
+ writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
+ priv->regs + ETH_REG2);
+
+ /* Enable the internal phy */
+ val |= REG3_PHYEN;
+ writel(val, priv->regs + ETH_REG3);
+ writel(0, priv->regs + ETH_REG4);
+
+ /* The phy needs a bit of time to power up */
+ mdelay(10);
+
+ return 0;
+}
+
+static int meson_gxl_enable_external_mdio(struct mdio_mux_meson_gxl_priv *priv)
+{
+ /* Reset the mdio bus mux to the external phy */
+ writel(0, priv->regs + ETH_REG3);
+
+ return 0;
+}
+
+static int mdio_mux_meson_gxl_select(struct udevice *mux, int cur, int sel)
+{
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(mux);
+
+ debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel);
+
+ /* if last selection didn't change we're good to go */
+ if (cur == sel)
+ return 0;
+
+ switch (sel) {
+ case MESON_GXL_MDIO_EXTERNAL_ID:
+ return meson_gxl_enable_external_mdio(priv);
+ case MESON_GXL_MDIO_INTERNAL_ID:
+ return meson_gxl_enable_internal_mdio(priv);
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct mdio_mux_ops mdio_mux_meson_gxl_ops = {
+ .select = mdio_mux_meson_gxl_select,
+};
+
+static int mdio_mux_meson_gxl_probe(struct udevice *dev)
+{
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(dev);
+
+ priv->regs = dev_read_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id mdio_mux_meson_gxl_ids[] = {
+ { .compatible = "amlogic,gxl-mdio-mux" },
+ { }
+};
+
+U_BOOT_DRIVER(mdio_mux_meson_gxl) = {
+ .name = "mdio_mux_meson_gxl",
+ .id = UCLASS_MDIO_MUX,
+ .of_match = mdio_mux_meson_gxl_ids,
+ .probe = mdio_mux_meson_gxl_probe,
+ .ops = &mdio_mux_meson_gxl_ops,
+ .priv_auto = sizeof(struct mdio_mux_meson_gxl_priv),
+};
--
2.34.1

785
projects/Amlogic/patches/u-boot/u-boot-0003-FROMGIT-ARM-dts-sync-Amlogic-GX-DT-to-Linux-v6.4.patch
View File

@ -1,785 +0,0 @@
From f7cb3ada3688afbc79598b02c59a2e9c561fec7f Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 13 Dec 2023 10:30:13 +0100
Subject: [PATCH 3/6] FROMGIT: ARM: dts: sync Amlogic GX DT to Linux v6.4
Sync Amlogic GXBB, GXL & GXM DTs from Linux v6.4, and also
switch to GXL MDIO MUX driver to adapt to DT change,
Most of the changes are only cosmetic or doesn't concern U-Boot,
the most important change for U-Boot is the GXL mdio mux compatible
switch to amlogic,gxl-mdio-mux.
Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-2-c56bb02a75ea@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm/dts/meson-gx-libretech-pc.dtsi | 4 +-
arch/arm/dts/meson-gx.dtsi | 21 ++++--
arch/arm/dts/meson-gxbb-nanopi-k2.dts | 13 +++-
arch/arm/dts/meson-gxbb-odroidc2.dts | 26 +++----
arch/arm/dts/meson-gxbb.dtsi | 18 ++++-
arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 2 +-
.../meson-gxl-s905w-jethome-jethub-j80.dts | 12 +++-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 16 +----
.../dts/meson-gxl-s905x-libretech-cc-v2.dts | 3 +-
arch/arm/dts/meson-gxl-s905x-p212.dts | 68 +++++++++++++++++++
arch/arm/dts/meson-gxl-s905x-p212.dtsi | 21 +++---
arch/arm/dts/meson-gxl.dtsi | 43 ++++++++----
arch/arm/dts/meson-gxm-khadas-vim2.dts | 15 ++--
arch/arm/dts/meson-gxm-wetek-core2.dts | 2 -
configs/beelink-gt1-ultimate_defconfig | 2 +-
configs/jethub_j80_defconfig | 2 +-
configs/khadas-vim2_defconfig | 2 +-
configs/khadas-vim_defconfig | 2 +-
configs/libretech-ac_defconfig | 2 +-
configs/libretech-cc_defconfig | 2 +-
configs/libretech-cc_v2_defconfig | 2 +-
configs/libretech-s905d-pc_defconfig | 2 +-
configs/libretech-s912-pc_defconfig | 2 +-
configs/p212_defconfig | 2 +-
configs/wetek-core2_defconfig | 2 +-
25 files changed, 196 insertions(+), 90 deletions(-)
diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi
index 2d7032f41e4..4e84ab87cc7 100644
--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi
+++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi
@@ -17,7 +17,7 @@
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
- update-button {
+ button-update {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;
@@ -416,7 +416,7 @@
pinctrl-names = "default";
status = "okay";
- gd25lq128: spi-flash@0 {
+ gd25lq128: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
index 6b457b2c30a..11f89bfecb5 100644
--- a/arch/arm/dts/meson-gx.dtsi
+++ b/arch/arm/dts/meson-gx.dtsi
@@ -49,6 +49,12 @@
no-map;
};
+ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+ secmon_reserved_bl32: secmon@5300000 {
+ reg = <0x0 0x05300000 0x0 0x2000000>;
+ no-map;
+ };
+
linux,cma {
compatible = "shared-dma-pool";
reusable;
@@ -126,6 +132,7 @@
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -226,7 +233,7 @@
reg = <0x14 0x10>;
};
- eth_mac: eth_mac@34 {
+ eth_mac: eth-mac@34 {
reg = <0x34 0x10>;
};
@@ -243,7 +250,7 @@
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
- scpi_dvfs: scpi_clocks@0 {
+ scpi_dvfs: clocks-0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
@@ -444,7 +451,7 @@
sysctrl_AO: sys-ctrl@0 {
compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
+ reg = <0x0 0x0 0x0 0x100>;
clkc_AO: clock-controller {
compatible = "amlogic,meson-gx-aoclkc";
@@ -525,7 +532,7 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
- hwrng: rng {
+ hwrng: rng@0 {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};
@@ -596,21 +603,21 @@
sd_emmc_a: mmc@70000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x70000 0x0 0x800>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sd_emmc_b: mmc@72000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x72000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sd_emmc_c: mmc@74000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x74000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
index 7273eed5292..7d94160f580 100644
--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
@@ -385,9 +385,20 @@
/* Bluetooth on AP6212 */
&uart_A {
- status = "disabled";
+ status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&wifi_32k>;
+ clock-names = "lpo";
+ vbat-supply = <&vddio_ao3v3>;
+ vddio-supply = <&vddio_ao18>;
+ host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
+ };
};
/* 40-pin CON1 */
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 201596247fd..01356437a07 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -250,21 +250,6 @@
};
};
-&gpio_ao {
- /*
- * WARNING: The USB Hub on the Odroid-C2 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
@@ -414,5 +399,16 @@
};
&usb1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
+
+ hub@1 {
+ /* Genesys Logic GL852G USB 2.0 hub */
+ compatible = "usb5e3,610";
+ reg = <1>;
+ vdd-supply = <&p5v0>;
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
+ };
};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
index 7c029f552a2..12ef6e81c8b 100644
--- a/arch/arm/dts/meson-gxbb.dtsi
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -300,8 +300,8 @@
};
&gpio_intc {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-gxbb-gpio-intc";
+ compatible = "amlogic,meson-gxbb-gpio-intc",
+ "amlogic,meson-gpio-intc";
status = "okay";
};
@@ -427,6 +427,20 @@
};
};
+ spi_idle_high_pins: spi-idle-high-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-up;
+ };
+ };
+
+ spi_idle_low_pins: spi-idle-low-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-down;
+ };
+ };
+
spi_ss0_pins: spi-ss0 {
mux {
groups = "spi_ss0";
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
index 2d769203f67..213a0705ebd 100644
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
@@ -298,7 +298,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- w25q32: spi-flash@0 {
+ w25q32: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
index 6eafb908695..a18d6d241a5 100644
--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
+++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
@@ -86,11 +86,11 @@
};
&efuse {
- bt_mac: bt_mac@6 {
+ bt_mac: bt-mac@6 {
reg = <0x6 0x6>;
};
- wifi_mac: wifi_mac@C {
+ wifi_mac: wifi-mac@c {
reg = <0xc 0x6>;
};
};
@@ -213,6 +213,12 @@
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
+
+ bluetooth {
+ compatible = "realtek,rtl8822cs-bt";
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
+ };
};
&uart_C {
@@ -233,7 +239,7 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c_b_pins>;
- pcf8563: pcf8563@51 {
+ pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "okay";
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
index 60feac0179c..02f81839d4e 100644
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -140,7 +140,6 @@
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
- clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
@@ -218,20 +217,7 @@
};
&sd_emmc_a {
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&uart_A {
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
+ max-frequency = <100000000>;
};
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
index 93d8f8aff70..6c4e68e0e62 100644
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
@@ -284,7 +284,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- nor_4u1: spi-flash@0 {
+ nor_4u1: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -305,7 +305,6 @@
};
&usb2_phy0 {
- pinctrl-names = "default";
phy-supply = <&vcc5v>;
};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts
index 2602940c207..9b4ea6a4939 100644
--- a/arch/arm/dts/meson-gxl-s905x-p212.dts
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dts
@@ -7,11 +7,19 @@
/dts-v1/;
#include "meson-gxl-s905x-p212.dtsi"
+#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
model = "Amlogic Meson GXL (S905X) P212 Development Board";
+ dio2133: analog-amplifier {
+ compatible = "simple-audio-amplifier";
+ sound-name-prefix = "AU2";
+ VCC-supply = <&hdmi_5v>;
+ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
+ };
+
cvbs-connector {
compatible = "composite-video-connector";
@@ -32,6 +40,66 @@
};
};
};
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "S905X-P212";
+ audio-aux-devs = <&dio2133>;
+ audio-widgets = "Line", "Lineout";
+ audio-routing = "AU2 INL", "ACODEC LOLN",
+ "AU2 INR", "ACODEC LORN",
+ "Lineout", "AU2 OUTL",
+ "Lineout", "AU2 OUTR";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+
+ codec-1 {
+ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&acodec>;
+ };
+ };
+ };
+};
+
+&acodec {
+ AVDD-supply = <&vddio_ao18>;
+ status = "okay";
+};
+
+&aiu {
+ status = "okay";
};
&cec_AO {
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
index 05cb2f5e5c3..a150cc0e18f 100644
--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
@@ -97,6 +97,14 @@
pinctrl-names = "default";
};
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&clkc CLKID_FCLK_DIV4>;
+ clock-names = "clkin0";
+};
+
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
@@ -125,6 +133,11 @@
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
};
/* SD card */
@@ -165,14 +178,6 @@
vqmmc-supply = <&vddio_boot>;
};
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
/* This is connected to the Bluetooth module: */
&uart_A {
status = "okay";
diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi
index c3ac531c4f8..17bcfa4702e 100644
--- a/arch/arm/dts/meson-gxl.dtsi
+++ b/arch/arm/dts/meson-gxl.dtsi
@@ -312,8 +312,8 @@
};
&gpio_intc {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-gxl-gpio-intc";
+ compatible = "amlogic,meson-gxl-gpio-intc",
+ "amlogic,meson-gpio-intc";
status = "okay";
};
@@ -429,6 +429,20 @@
};
};
+ spi_idle_high_pins: spi-idle-high-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-up;
+ };
+ };
+
+ spi_idle_low_pins: spi-idle-low-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-down;
+ };
+ };
+
spi_ss0_pins: spi-ss0 {
mux {
groups = "spi_ss0";
@@ -759,16 +773,23 @@
};
};
- eth-phy-mux {
- compatible = "mdio-mux-mmioreg", "mdio-mux";
+ eth_phy_mux: mdio@558 {
+ reg = <0x0 0x558 0x0 0xc>;
+ compatible = "amlogic,gxl-mdio-mux";
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x0 0x55c 0x0 0x4>;
- mux-mask = <0xffffffff>;
+ clocks = <&clkc CLKID_FCLK_DIV4>;
+ clock-names = "ref";
mdio-parent-bus = <&mdio0>;
- internal_mdio: mdio@e40908ff {
- reg = <0xe40908ff>;
+ external_mdio: mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ internal_mdio: mdio@1 {
+ reg = <0x1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -779,12 +800,6 @@
max-speed = <100>;
};
};
-
- external_mdio: mdio@2009087f {
- reg = <0x2009087f>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
};
};
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts
index 18a4b7a6c5d..74897a15489 100644
--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts
+++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts
@@ -52,10 +52,11 @@
gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
&gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
/* Dummy RPM values since fan is optional */
- gpio-fan,speed-map = <0 0
- 1 1
- 2 2
- 3 3>;
+ gpio-fan,speed-map =
+ <0 0>,
+ <1 1>,
+ <2 2>,
+ <3 3>;
#cooling-cells = <2>;
};
@@ -270,7 +271,6 @@
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
- clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
@@ -307,7 +307,8 @@
#size-cells = <0>;
bus-width = <4>;
- max-frequency = <60000000>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
non-removable;
disable-wp;
@@ -373,7 +374,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- w25q32: spi-flash@0 {
+ w25q32: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q16", "jedec,spi-nor";
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
index 1e7f77f9b53..f8c40340b9c 100644
--- a/arch/arm/dts/meson-gxm-wetek-core2.dts
+++ b/arch/arm/dts/meson-gxm-wetek-core2.dts
@@ -45,8 +45,6 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <100>;
button-power {
diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig
index 1313dde92f5..00fdad8544b 100644
--- a/configs/beelink-gt1-ultimate_defconfig
+++ b/configs/beelink-gt1-ultimate_defconfig
@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
index b370e5d1d4d..15e410de829 100644
--- a/configs/jethub_j80_defconfig
+++ b/configs/jethub_j80_defconfig
@@ -54,7 +54,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index 28e90522451..59ef33723e4 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -51,7 +51,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
index d27ab6f5907..5ed7c1a4083 100644
--- a/configs/khadas-vim_defconfig
+++ b/configs/khadas-vim_defconfig
@@ -45,7 +45,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index bc17b423a2d..f0ab19580c6 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -57,7 +57,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
index baa9b1b3dbc..bb1a37a0cda 100644
--- a/configs/libretech-cc_defconfig
+++ b/configs/libretech-cc_defconfig
@@ -44,7 +44,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
index b1c267a7917..8949e240c93 100644
--- a/configs/libretech-cc_v2_defconfig
+++ b/configs/libretech-cc_v2_defconfig
@@ -52,7 +52,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_PHY=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index cd138d696e7..a5dc3115fcb 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -53,7 +53,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index dabb4ca4ece..68f462eeff0 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -52,7 +52,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index b90391d9b5f..6b73607d641 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -40,7 +40,7 @@ CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
index 9bf3de9e7aa..01ffb8bbd75 100644
--- a/configs/wetek-core2_defconfig
+++ b/configs/wetek-core2_defconfig
@@ -46,7 +46,7 @@ CONFIG_PHY_REALTEK=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
--
2.34.1

269
projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-board-amlogic-fix-buffler-overflow-in-serial.patch
View File

@ -1,269 +0,0 @@
From f1ef120a45f47ce8f2a2fd554e4fa9d9a14ed42e Mon Sep 17 00:00:00 2001
From: Neil Armstrong <neil.armstrong@linaro.org>
Date: Wed, 20 Mar 2024 09:46:11 +0100
Subject: [PATCH 4/6] FROMGIT: board: amlogic: fix buffler overflow in serial,
mac & usid read
While meson_sm_read_efuse() doesn't overflow, the string is not
zero terminated and env_set*() will buffer overflow and add random
characters to environment.
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20240320-u-boot-fix-p200-serial-v2-1-972be646a301@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
board/amlogic/beelink-s922x/beelink-s922x.c | 3 ++-
board/amlogic/jethub-j100/jethub-j100.c | 3 ++-
board/amlogic/jethub-j80/jethub-j80.c | 9 ++++++---
board/amlogic/odroid-n2/odroid-n2.c | 3 ++-
board/amlogic/p200/p200.c | 6 ++++--
board/amlogic/p201/p201.c | 6 ++++--
board/amlogic/p212/p212.c | 6 ++++--
board/amlogic/q200/q200.c | 6 ++++--
board/amlogic/vim3/vim3.c | 3 ++-
9 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c
index adae27fc7e7..c2776310a3d 100644
--- a/board/amlogic/beelink-s922x/beelink-s922x.c
+++ b/board/amlogic/beelink-s922x/beelink-s922x.c
@@ -20,7 +20,7 @@
int misc_init_r(void)
{
- u8 mac_addr[MAC_ADDR_LEN];
+ u8 mac_addr[MAC_ADDR_LEN + 1];
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
ssize_t len;
@@ -41,6 +41,7 @@ int misc_init_r(void)
tmp[2] = '\0';
mac_addr[i] = hextoul(tmp, NULL);
}
+ mac_addr[MAC_ADDR_LEN] = '\0';
if (is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
diff --git a/board/amlogic/jethub-j100/jethub-j100.c b/board/amlogic/jethub-j100/jethub-j100.c
index 6a2c4ad4c3c..010fc0df7d1 100644
--- a/board/amlogic/jethub-j100/jethub-j100.c
+++ b/board/amlogic/jethub-j100/jethub-j100.c
@@ -17,7 +17,7 @@
int misc_init_r(void)
{
- u8 mac_addr[ARP_HLEN];
+ u8 mac_addr[ARP_HLEN + 1];
char serial[SM_SERIAL_SIZE];
u32 sid;
@@ -34,6 +34,7 @@ int misc_init_r(void)
mac_addr[3] = (sid >> 16) & 0xff;
mac_addr[4] = (sid >> 8) & 0xff;
mac_addr[5] = (sid >> 0) & 0xff;
+ mac_addr[ARP_HLEN] = '\0';
eth_env_set_enetaddr("ethaddr", mac_addr);
}
diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c
index 185880de139..0b781666e98 100644
--- a/board/amlogic/jethub-j80/jethub-j80.c
+++ b/board/amlogic/jethub-j80/jethub-j80.c
@@ -27,9 +27,9 @@
int misc_init_r(void)
{
- u8 mac_addr[EFUSE_MAC_SIZE];
- char serial[EFUSE_SN_SIZE];
- char usid[EFUSE_USID_SIZE];
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
+ char serial[EFUSE_SN_SIZE + 1];
+ char usid[EFUSE_USID_SIZE + 1];
ssize_t len;
unsigned int adcval;
int ret;
@@ -37,6 +37,7 @@ int misc_init_r(void)
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
+ mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
else
@@ -46,6 +47,7 @@ int misc_init_r(void)
if (!env_get("serial")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial", serial);
}
@@ -53,6 +55,7 @@ int misc_init_r(void)
if (!env_get("usid")) {
len = meson_sm_read_efuse(EFUSE_USID_OFFSET, usid,
EFUSE_USID_SIZE);
+ usid[len] = '\0';
if (len == EFUSE_USID_SIZE)
env_set("usid", usid);
}
diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
index 2135457edd9..a4bcc62174a 100644
--- a/board/amlogic/odroid-n2/odroid-n2.c
+++ b/board/amlogic/odroid-n2/odroid-n2.c
@@ -107,7 +107,7 @@ static int odroid_detect_variant(void)
int misc_init_r(void)
{
- u8 mac_addr[MAC_ADDR_LEN];
+ u8 mac_addr[MAC_ADDR_LEN + 1];
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
ssize_t len;
@@ -128,6 +128,7 @@ int misc_init_r(void)
tmp[2] = '\0';
mac_addr[i] = hextoul(tmp, NULL);
}
+ mac_addr[MAC_ADDR_LEN] = '\0';
if (is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
index 7c432f9d281..769e2735d27 100644
--- a/board/amlogic/p200/p200.c
+++ b/board/amlogic/p200/p200.c
@@ -21,13 +21,14 @@
int misc_init_r(void)
{
- u8 mac_addr[EFUSE_MAC_SIZE];
- char serial[EFUSE_SN_SIZE];
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
+ char serial[EFUSE_SN_SIZE + 1];
ssize_t len;
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
+ mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
}
@@ -35,6 +36,7 @@ int misc_init_r(void)
if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial#", serial);
}
diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c
index 7c432f9d281..769e2735d27 100644
--- a/board/amlogic/p201/p201.c
+++ b/board/amlogic/p201/p201.c
@@ -21,13 +21,14 @@
int misc_init_r(void)
{
- u8 mac_addr[EFUSE_MAC_SIZE];
- char serial[EFUSE_SN_SIZE];
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
+ char serial[EFUSE_SN_SIZE + 1];
ssize_t len;
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
+ mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
}
@@ -35,6 +36,7 @@ int misc_init_r(void)
if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial#", serial);
}
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index fcef90bce56..f6e60ae3af1 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -22,13 +22,14 @@
int misc_init_r(void)
{
- u8 mac_addr[EFUSE_MAC_SIZE];
- char serial[EFUSE_SN_SIZE];
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
+ char serial[EFUSE_SN_SIZE + 1];
ssize_t len;
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
+ mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
else
@@ -38,6 +39,7 @@ int misc_init_r(void)
if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial#", serial);
}
diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c
index 3aa6d8f200e..47f1566a9d3 100644
--- a/board/amlogic/q200/q200.c
+++ b/board/amlogic/q200/q200.c
@@ -22,13 +22,14 @@
int misc_init_r(void)
{
- u8 mac_addr[EFUSE_MAC_SIZE];
- char serial[EFUSE_SN_SIZE];
+ u8 mac_addr[EFUSE_MAC_SIZE + 1];
+ char serial[EFUSE_SN_SIZE + 1];
ssize_t len;
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
+ mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
else
@@ -38,6 +39,7 @@ int misc_init_r(void)
if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial#", serial);
}
diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c
index 8bdfb302f72..43d7a8e84f6 100644
--- a/board/amlogic/vim3/vim3.c
+++ b/board/amlogic/vim3/vim3.c
@@ -151,7 +151,7 @@ int meson_ft_board_setup(void *blob, struct bd_info *bd)
int misc_init_r(void)
{
- u8 mac_addr[MAC_ADDR_LEN];
+ u8 mac_addr[MAC_ADDR_LEN + 1];
char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
char serial_string[EFUSE_MAC_SIZE + 1];
ssize_t len;
@@ -169,6 +169,7 @@ int misc_init_r(void)
tmp[2] = '\0';
mac_addr[i] = hextoul(tmp, NULL);
}
+ mac_addr[MAC_ADDR_LEN] = '\0';
if (is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
--
2.34.1

44
projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-ARM-dts-fix-Ethernet-on-WeTek-Hub-Play2.patch
View File

@ -1,44 +0,0 @@
From 20c327bd28ce28a81bb8524b68c23c029b6df96d Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Thu, 7 Mar 2024 16:11:17 +0000
Subject: [PATCH 5/6] FROMGIT: ARM: dts: fix Ethernet on WeTek Hub/Play2
Placing the snps,reset content needed for Ethernet to probe in a common uboot.dtsi
results in the content not being used and broken Ethernet. Fix this by creating two
board specific dtsi files with the right content.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi | 14 ++++++++++++++
...oot.dtsi => meson-gxbb-wetek-play2-u-boot.dtsi} | 0
2 files changed, 14 insertions(+)
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
rename arch/arm/dts/{meson-gxbb-wetek-u-boot.dtsi => meson-gxbb-wetek-play2-u-boot.dtsi} (100%)
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
new file mode 100644
index 00000000000..3675ffb701f
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek-hub-u-boot.dtsi
@@ -0,0 +1,14 @@
+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-gx-u-boot.dtsi"
+
+&ethmac {
+ snps,reset-gpio = <&gpio GPIOZ_14 0>;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-active-low;
+};
diff --git a/arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi b/arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi
rename to arch/arm/dts/meson-gxbb-wetek-play2-u-boot.dtsi
--
2.34.1

30
projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-board-amlogic-add-meson_generate_serial_etha.patch
View File

@ -1,30 +0,0 @@
From a915f25cf7f89f056dd2d0cdcbc2f1f1787ae5c0 Mon Sep 17 00:00:00 2001
From: Christian Hewitt <christianshewitt@gmail.com>
Date: Sat, 23 Mar 2024 09:59:30 +0000
Subject: [PATCH 6/6] FROMGIT: board: amlogic: add
meson_generate_serial_ethaddr fallback to p200
Add a fall-back method to generate ethaddr from CPU serial on p200 boards
if the MAC cannot be read from efuse.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
board/amlogic/p200/p200.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
index 769e2735d27..754242e4a9f 100644
--- a/board/amlogic/p200/p200.c
+++ b/board/amlogic/p200/p200.c
@@ -31,6 +31,8 @@ int misc_init_r(void)
mac_addr[len] = '\0';
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
eth_env_set_enetaddr("ethaddr", mac_addr);
+ else
+ meson_generate_serial_ethaddr();
}
if (!env_get("serial#")) {
--
2.34.1

12
projects/Rockchip/patches/u-boot/0004-rockchip-rk3328-Set-VOP-QoS-to-high-priority.patch
View File

@ -18,19 +18,19 @@ diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3
index de17b88682..58300bdf3f 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -19,6 +19,8 @@ DECLARE_GLOBAL_DATA_PTR;
@@ -16,6 +16,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define GRF_BASE 0xFF100000
#define UART2_BASE 0xFF130000
#define FW_DDR_CON_REG 0xFF7C0040
+#define QOS_VOP_OFFSET 0xFF760080
+#define QOS_VOP_PRIORITY 0x8
#define EFUSE_NS_BASE 0xFF260000
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
#define EFUSE_MOD 0x0000
@@ -54,6 +56,9 @@ int arch_cpu_init(void)
/* Disable the ddr secure region setting to make it non-secure */
rk_setreg(FW_DDR_CON_REG, 0x200);
writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_LOAD_R);
writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_ADDR_R);
writel(EFUSE_TIMING(2, 3), EFUSE_NS_BASE + EFUSE_T_STROBE_R);
+#else
+ printf("Setting VOP QoS\n");
+ rk_setreg(QOS_VOP_OFFSET + QOS_VOP_PRIORITY, 0xF);