From fd65cabda7d1a64b107239835ce1ec0aee600dfa Mon Sep 17 00:00:00 2001 From: chewitt Date: Sun, 17 May 2020 05:49:20 +0000 Subject: [PATCH] amlogic: add u-boot patch-set for 2020.04 --- ...ngs-leds-import-common-led-bindings-.patch | 101 + ...GIT-mmc-meson-gx-enable-input-clocks.patch | 62 + ...T-clk-meson-reset-mmc-clock-on-probe.patch | 77 + ...s-meson-sync-dt-and-bindings-from-v5.patch | 5520 +++++++++++++++++ ...s-meson-import-libretech-pc-from-lin.patch | 515 ++ ...4-dts-meson-add-libretech-pc-support.patch | 236 + ...add-missing-meson-gxl-s805x-libretec.patch | 34 + ...s-meson-gx-add-back-dmc-register-ran.patch | 35 + ...eric-phy-add-generic_phy_get_by_node.patch | 109 + ...n-gxl-usb-add-set_mode-call-to-force.patch | 173 + ...n-gx-add-board_usb_init-cleanup-for-.patch | 151 + ...meson-gxl-Add-USB-Gadget-nodes-for-U.patch | 84 + ...libretech-cc-Enable-USB-gadget-with-.patch | 41 + ...libretech-ac-Enable-USB-gadget-with-.patch | 41 + ...khadas-vim2-Enable-USB-gadget-with-M.patch | 39 + ...khadas-vim-Enable-USB-gadget-with-Ma.patch | 39 + ...libretech-s905d-pc-Enable-USB-gadget.patch | 41 + ...libretech-s912-pc-Enable-USB-gadget-.patch | 41 + ...n-g12a-add-missing-SD_EMMC_A-control.patch | 38 + ...ROMGIT-phy-meson-add-GXBB-PHY-driver.patch | 292 + ...s-meson-sync-dt-and-bindings-from-v5.patch | 817 +++ ...meson-gxm-khadas-vim2-u-boot-enable-.patch | 40 + ...khadas-vim2-enable-support-for-SPI-N.patch | 50 + ...meson-khadas-vim3-enable-SPI-NOR-fla.patch | 75 + ...khadas-vim3-enable-support-for-SPI-N.patch | 85 + ...-meson-g12a-add-power-on-off-of-the-.patch | 63 + ...odroid-c2-enable-USB-host-controller.patch | 84 + ...s-Import-Odroid-C4-DT-from-Linux-5.X.patch | 432 ++ ...boards-amlogic-add-Odroid-C4-support.patch | 237 + ...khadas-vim3-include-meson-g12-common.patch | 26 + ...nfigs-khadas-vim3-enable-HDMI-output.patch | 67 + ...032-HACK-mmc-meson-gx-limit-to-24MHz.patch | 25 + ...revent-stdout-stderr-on-videoconsole.patch | 28 + 33 files changed, 9698 insertions(+) create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0001-FROMGIT-dt-bindings-leds-import-common-led-bindings-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0002-FROMGIT-mmc-meson-gx-enable-input-clocks.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0003-FROMGIT-clk-meson-reset-mmc-clock-on-probe.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-arm64-dts-meson-import-libretech-pc-from-lin.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-arm64-dts-meson-add-libretech-pc-support.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-ARM-dts-add-missing-meson-gxl-s805x-libretec.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-arm64-dts-meson-gx-add-back-dmc-register-ran.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-generic-phy-add-generic_phy_get_by_node.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-phy-meson-gxl-usb-add-set_mode-call-to-force.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-arm-meson-gx-add-board_usb_init-cleanup-for-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-arm-dts-meson-gxl-Add-USB-Gadget-nodes-for-U.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-configs-libretech-cc-Enable-USB-gadget-with-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-configs-libretech-ac-Enable-USB-gadget-with-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-configs-khadas-vim2-Enable-USB-gadget-with-M.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-configs-khadas-vim-Enable-USB-gadget-with-Ma.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-configs-libretech-s905d-pc-Enable-USB-gadget.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-configs-libretech-s912-pc-Enable-USB-gadget-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-clk-meson-g12a-add-missing-SD_EMMC_A-control.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-phy-meson-add-GXBB-PHY-driver.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-arm-dts-meson-gxm-khadas-vim2-u-boot-enable-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0023-FROMGIT-configs-khadas-vim2-enable-support-for-SPI-N.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0024-FROMGIT-arm-dts-meson-khadas-vim3-enable-SPI-NOR-fla.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0025-FROMGIT-configs-khadas-vim3-enable-support-for-SPI-N.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0026-FROMGIT-usb-dwc3-meson-g12a-add-power-on-off-of-the-.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0027-FROMGIT-odroid-c2-enable-USB-host-controller.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0028-FROMGIT-ARM-dts-Import-Odroid-C4-DT-from-Linux-5.X.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0029-FROMGIT-boards-amlogic-add-Odroid-C4-support.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0030-FROMGIT-arm-dts-khadas-vim3-include-meson-g12-common.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0031-FROMGIT-configs-khadas-vim3-enable-HDMI-output.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0032-HACK-mmc-meson-gx-limit-to-24MHz.patch create mode 100644 projects/Amlogic/patches/u-boot/u-boot-0033-HACK-prevent-stdout-stderr-on-videoconsole.patch diff --git a/projects/Amlogic/patches/u-boot/u-boot-0001-FROMGIT-dt-bindings-leds-import-common-led-bindings-.patch b/projects/Amlogic/patches/u-boot/u-boot-0001-FROMGIT-dt-bindings-leds-import-common-led-bindings-.patch new file mode 100644 index 0000000000..be3df019a6 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0001-FROMGIT-dt-bindings-leds-import-common-led-bindings-.patch @@ -0,0 +1,101 @@ +From c3234c37aa9234d0d03b4fe2e9c4aba84069d38b Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:35 +0100 +Subject: [PATCH 01/33] FROMGIT: dt-bindings: leds: import common led bindings + from linux v5.5 + +Import the common leds bindings definition from linux +d5226fa6dbae ("Linux 5.5") + +Reviewed-by: Neil Armstrong +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + include/dt-bindings/leds/common.h | 75 +++++++++++++++++++++++++++++++ + 1 file changed, 75 insertions(+) + create mode 100644 include/dt-bindings/leds/common.h + +diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h +new file mode 100644 +index 0000000000..9e1256a7c1 +--- /dev/null ++++ b/include/dt-bindings/leds/common.h +@@ -0,0 +1,75 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * This header provides macros for the common LEDs device tree bindings. ++ * ++ * Copyright (C) 2015, Samsung Electronics Co., Ltd. ++ * Author: Jacek Anaszewski ++ * ++ * Copyright (C) 2019 Jacek Anaszewski ++ */ ++ ++#ifndef __DT_BINDINGS_LEDS_H ++#define __DT_BINDINGS_LEDS_H ++ ++/* External trigger type */ ++#define LEDS_TRIG_TYPE_EDGE 0 ++#define LEDS_TRIG_TYPE_LEVEL 1 ++ ++/* Boost modes */ ++#define LEDS_BOOST_OFF 0 ++#define LEDS_BOOST_ADAPTIVE 1 ++#define LEDS_BOOST_FIXED 2 ++ ++/* Standard LED colors */ ++#define LED_COLOR_ID_WHITE 0 ++#define LED_COLOR_ID_RED 1 ++#define LED_COLOR_ID_GREEN 2 ++#define LED_COLOR_ID_BLUE 3 ++#define LED_COLOR_ID_AMBER 4 ++#define LED_COLOR_ID_VIOLET 5 ++#define LED_COLOR_ID_YELLOW 6 ++#define LED_COLOR_ID_IR 7 ++#define LED_COLOR_ID_MAX 8 ++ ++/* Standard LED functions */ ++#define LED_FUNCTION_ACTIVITY "activity" ++#define LED_FUNCTION_ALARM "alarm" ++#define LED_FUNCTION_BACKLIGHT "backlight" ++#define LED_FUNCTION_BLUETOOTH "bluetooth" ++#define LED_FUNCTION_BOOT "boot" ++#define LED_FUNCTION_CPU "cpu" ++#define LED_FUNCTION_CAPSLOCK "capslock" ++#define LED_FUNCTION_CHARGING "charging" ++#define LED_FUNCTION_DEBUG "debug" ++#define LED_FUNCTION_DISK "disk" ++#define LED_FUNCTION_DISK_ACTIVITY "disk-activity" ++#define LED_FUNCTION_DISK_ERR "disk-err" ++#define LED_FUNCTION_DISK_READ "disk-read" ++#define LED_FUNCTION_DISK_WRITE "disk-write" ++#define LED_FUNCTION_FAULT "fault" ++#define LED_FUNCTION_FLASH "flash" ++#define LED_FUNCTION_HEARTBEAT "heartbeat" ++#define LED_FUNCTION_INDICATOR "indicator" ++#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight" ++#define LED_FUNCTION_LAN "lan" ++#define LED_FUNCTION_MAIL "mail" ++#define LED_FUNCTION_MTD "mtd" ++#define LED_FUNCTION_MICMUTE "micmute" ++#define LED_FUNCTION_MUTE "mute" ++#define LED_FUNCTION_NUMLOCK "numlock" ++#define LED_FUNCTION_PANIC "panic" ++#define LED_FUNCTION_PROGRAMMING "programming" ++#define LED_FUNCTION_POWER "power" ++#define LED_FUNCTION_RX "rx" ++#define LED_FUNCTION_SD "sd" ++#define LED_FUNCTION_SCROLLLOCK "scrolllock" ++#define LED_FUNCTION_STANDBY "standby" ++#define LED_FUNCTION_STATUS "status" ++#define LED_FUNCTION_TORCH "torch" ++#define LED_FUNCTION_TX "tx" ++#define LED_FUNCTION_USB "usb" ++#define LED_FUNCTION_WAN "wan" ++#define LED_FUNCTION_WLAN "wlan" ++#define LED_FUNCTION_WPS "wps" ++ ++#endif /* __DT_BINDINGS_LEDS_H */ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0002-FROMGIT-mmc-meson-gx-enable-input-clocks.patch b/projects/Amlogic/patches/u-boot/u-boot-0002-FROMGIT-mmc-meson-gx-enable-input-clocks.patch new file mode 100644 index 0000000000..0d2f675195 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0002-FROMGIT-mmc-meson-gx-enable-input-clocks.patch @@ -0,0 +1,62 @@ +From aeb0006b6b0bf77bef8bb39cd65ee0a7eb4fabe3 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:36 +0100 +Subject: [PATCH 02/33] FROMGIT: mmc: meson-gx: enable input clocks + +Until now, the mmc clock was left in a good enough state by the ROM +code to be used by the controller. However on some SoC, if the ROM +code finds a bootloader on USB or SPI, it might leave the MMC clock +in state the controller cannot work with. + +Enable the input clocks provided to the mmc controller. While the +u-boot mmc controller driver is not doing fancy settings like the Linux, +it at least needs to make these clocks are running. + +Reviewed-by: Neil Armstrong +Signed-off-by: Jerome Brunet +Reviewed-by: Anand Moon +Signed-off-by: Neil Armstrong +--- + drivers/mmc/meson_gx_mmc.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c +index b5f5122b1b..86c1a7164a 100644 +--- a/drivers/mmc/meson_gx_mmc.c ++++ b/drivers/mmc/meson_gx_mmc.c +@@ -4,6 +4,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -241,12 +242,23 @@ static int meson_mmc_probe(struct udevice *dev) + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct mmc *mmc = &pdata->mmc; + struct mmc_config *cfg = &pdata->cfg; ++ struct clk_bulk clocks; + uint32_t val; ++ int ret; ++ + #ifdef CONFIG_PWRSEQ + struct udevice *pwr_dev; +- int ret; + #endif + ++ /* Enable the clocks feeding the MMC controller */ ++ ret = clk_get_bulk(dev, &clocks); ++ if (ret) ++ return ret; ++ ++ ret = clk_enable_bulk(&clocks); ++ if (ret) ++ return ret; ++ + cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 | + MMC_VDD_31_32 | MMC_VDD_165_195; + cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT | +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0003-FROMGIT-clk-meson-reset-mmc-clock-on-probe.patch b/projects/Amlogic/patches/u-boot/u-boot-0003-FROMGIT-clk-meson-reset-mmc-clock-on-probe.patch new file mode 100644 index 0000000000..fdcded3385 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0003-FROMGIT-clk-meson-reset-mmc-clock-on-probe.patch @@ -0,0 +1,77 @@ +From fcf29e62ed25bc08e7ed7aa7e5a8a1c8dc070b86 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:37 +0100 +Subject: [PATCH 03/33] FROMGIT: clk: meson: reset mmc clock on probe + +On some SoCs, depending on the boot device, the MMC clock block may be +left in a weird state by the ROM code, in which no decent clock may be +provided. Reset the related register to make sure a sane MMC clock is +ready for the controller. + +Reviewed-by: Neil Armstrong +Tested-by: Anand Moon +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + drivers/clk/meson/axg.c | 7 +++++++ + drivers/clk/meson/g12a.c | 7 +++++++ + drivers/clk/meson/gxbb.c | 7 +++++++ + 3 files changed, 21 insertions(+) + +diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c +index 7035b59a13..4b0028d04b 100644 +--- a/drivers/clk/meson/axg.c ++++ b/drivers/clk/meson/axg.c +@@ -291,6 +291,13 @@ static int meson_clk_probe(struct udevice *dev) + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + ++ /* ++ * Depending on the boot src, the state of the MMC clock might ++ * be different. Reset it to make sure we won't get stuck ++ */ ++ regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); ++ regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); ++ + debug("meson-clk-axg: probed\n"); + + return 0; +diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c +index 686d94ebfe..9e6beca94a 100644 +--- a/drivers/clk/meson/g12a.c ++++ b/drivers/clk/meson/g12a.c +@@ -977,6 +977,13 @@ static int meson_clk_probe(struct udevice *dev) + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + ++ /* ++ * Depending on the boot src, the state of the MMC clock might ++ * be different. Reset it to make sure we won't get stuck ++ */ ++ regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); ++ regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); ++ + debug("meson-clk-g12a: probed\n"); + + return 0; +diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c +index e781e08d9d..5ef4dd794d 100644 +--- a/drivers/clk/meson/gxbb.c ++++ b/drivers/clk/meson/gxbb.c +@@ -887,6 +887,13 @@ static int meson_clk_probe(struct udevice *dev) + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + ++ /* ++ * Depending on the boot src, the state of the MMC clock might ++ * be different. Reset it to make sure we won't get stuck ++ */ ++ regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); ++ regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0); ++ + debug("meson-clk: probed\n"); + + return 0; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch new file mode 100644 index 0000000000..bf5af53c8a --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0004-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch @@ -0,0 +1,5520 @@ +From f8f28c9a8c0e67362ab8be110d1bbdffdde3a3cc Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:38 +0100 +Subject: [PATCH 04/33] FROMGIT: arm64: dts: meson: sync dt and bindings from + v5.6-rc2 + +Sync the device tree and dt-bindings from Linux v5.6-rc2 +11a48a5a18c6 ("Linux 5.6-rc2") + +The only exception to this is the mmc pinctrl pin bias of gxl SoC family. +This is a fix which found its way to u-boot but not Linux yet. + +Acked-by: Neil Armstrong +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-axg-s400.dts | 70 ++- + arch/arm/dts/meson-axg.dtsi | 273 ++++++++-- + arch/arm/dts/meson-g12-common.dtsi | 478 ++++++------------ + arch/arm/dts/meson-g12.dtsi | 398 +++++++++++++++ + arch/arm/dts/meson-g12a-sei510.dts | 64 +++ + arch/arm/dts/meson-g12a-u200.dts | 54 ++ + arch/arm/dts/meson-g12a.dtsi | 33 +- + arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts | 25 + + arch/arm/dts/meson-g12b-odroid-n2.dts | 2 +- + arch/arm/dts/meson-g12b.dtsi | 26 +- + arch/arm/dts/meson-gx.dtsi | 87 +++- + arch/arm/dts/meson-gxbb-nanopi-k2.dts | 26 +- + arch/arm/dts/meson-gxbb-odroidc2.dts | 100 +++- + arch/arm/dts/meson-gxbb-p200.dts | 9 +- + arch/arm/dts/meson-gxbb-p201.dts | 2 +- + arch/arm/dts/meson-gxbb-p20x.dtsi | 9 +- + arch/arm/dts/meson-gxbb.dtsi | 118 ++++- + arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 2 +- + arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 20 +- + arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 26 +- + arch/arm/dts/meson-gxl-s905x-p212.dtsi | 10 +- + arch/arm/dts/meson-gxl.dtsi | 76 ++- + arch/arm/dts/meson-gxm-khadas-vim2.dts | 71 +-- + arch/arm/dts/meson-gxm.dtsi | 39 +- + arch/arm/dts/meson-khadas-vim3.dtsi | 7 + + arch/arm/dts/meson-sm1-sei610.dts | 236 ++++++++- + arch/arm/dts/meson-sm1.dtsi | 356 +++++++++++++ + include/dt-bindings/clock/axg-audio-clkc.h | 10 + + include/dt-bindings/clock/gxbb-aoclkc.h | 7 + + include/dt-bindings/clock/gxbb-clkc.h | 21 + + include/dt-bindings/gpio/meson-gxbb-gpio.h | 8 +- + include/dt-bindings/gpio/meson-gxl-gpio.h | 8 +- + .../reset/amlogic,meson-axg-audio-arb.h | 2 + + .../reset/amlogic,meson-axg-reset.h | 3 +- + .../reset/amlogic,meson-g12a-audio-reset.h | 15 + + .../reset/amlogic,meson-gxbb-reset.h | 51 +- + 36 files changed, 2119 insertions(+), 623 deletions(-) + create mode 100644 arch/arm/dts/meson-g12.dtsi + +diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts +index 18778ada7b..4cd2d59518 100644 +--- a/arch/arm/dts/meson-axg-s400.dts ++++ b/arch/arm/dts/meson-axg-s400.dts +@@ -60,7 +60,7 @@ + serial1 = &uart_A; + }; + +- linein: audio-codec@0 { ++ linein: audio-codec-0 { + #sound-dai-cells = <0>; + compatible = "everest,es7241"; + VDDA-supply = <&vcc_3v3>; +@@ -70,7 +70,7 @@ + sound-name-prefix = "Linein"; + }; + +- lineout: audio-codec@1 { ++ lineout: audio-codec-1 { + #sound-dai-cells = <0>; + compatible = "everest,es7154"; + VDD-supply = <&vcc_3v3>; +@@ -79,14 +79,14 @@ + sound-name-prefix = "Lineout"; + }; + +- spdif_dit: audio-codec@2 { ++ spdif_dit: audio-codec-2 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + status = "okay"; + sound-name-prefix = "DIT"; + }; + +- dmics: audio-codec@3 { ++ dmics: audio-codec-3 { + #sound-dai-cells = <0>; + compatible = "dmic-codec"; + num-channels = <7>; +@@ -95,6 +95,13 @@ + sound-name-prefix = "MIC"; + }; + ++ spdif_dir: audio-codec-4 { ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dir"; ++ status = "okay"; ++ sound-name-prefix = "DIR"; ++ }; ++ + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; +@@ -249,6 +256,9 @@ + "TODDR_A IN 2", "TDMIN_C OUT", + "TODDR_B IN 2", "TDMIN_C OUT", + "TODDR_C IN 2", "TDMIN_C OUT", ++ "TODDR_A IN 3", "SPDIFIN Capture", ++ "TODDR_B IN 3", "SPDIFIN Capture", ++ "TODDR_C IN 3", "SPDIFIN Capture", + "TODDR_A IN 4", "PDM Capture", + "TODDR_B IN 4", "PDM Capture", + "TODDR_C IN 4", "PDM Capture", +@@ -272,31 +282,31 @@ + <393216000>; + status = "okay"; + +- dai-link@0 { ++ dai-link-0 { + sound-dai = <&frddr_a>; + }; + +- dai-link@1 { ++ dai-link-1 { + sound-dai = <&frddr_b>; + }; + +- dai-link@2 { ++ dai-link-2 { + sound-dai = <&frddr_c>; + }; + +- dai-link@3 { ++ dai-link-3 { + sound-dai = <&toddr_a>; + }; + +- dai-link@4 { ++ dai-link-4 { + sound-dai = <&toddr_b>; + }; + +- dai-link@5 { ++ dai-link-5 { + sound-dai = <&toddr_c>; + }; + +- dai-link@6 { ++ dai-link-6 { + sound-dai = <&tdmif_c>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-2 = <1 1>; +@@ -317,7 +327,7 @@ + + }; + +- dai-link@7 { ++ dai-link-7 { + sound-dai = <&spdifout>; + + codec { +@@ -325,7 +335,15 @@ + }; + }; + +- dai-link@8 { ++ dai-link-8 { ++ sound-dai = <&spdifin>; ++ ++ codec { ++ sound-dai = <&spdif_dir>; ++ }; ++ }; ++ ++ dai-link-9 { + sound-dai = <&pdm>; + + codec { +@@ -357,6 +375,8 @@ + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <98 IRQ_TYPE_LEVEL_LOW>; + eee-broken-1000t; + }; + }; +@@ -444,7 +464,8 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ sd-uhs-sdr104; ++ max-frequency = <200000000>; + non-removable; + disable-wp; + +@@ -461,15 +482,14 @@ + + /* emmc storage */ + &sd_emmc_c { +- status = "disabled"; +- pinctrl-0 = <&emmc_pins>; ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; +- cap-sd-highspeed; + cap-mmc-highspeed; +- max-frequency = <180000000>; ++ max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; +@@ -481,6 +501,12 @@ + vqmmc-supply = <&vddio_boot>; + }; + ++&spdifin { ++ pinctrl-0 = <&spdif_in_a19_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ + &spdifout { + pinctrl-0 = <&spdif_out_a20_pins>; + pinctrl-names = "default"; +@@ -543,8 +569,14 @@ + + &uart_A { + status = "okay"; +- pinctrl-0 = <&uart_a_pins>; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &uart_AO { +diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi +index df017dbd2e..aace3d32a3 100644 +--- a/arch/arm/dts/meson-axg.dtsi ++++ b/arch/arm/dts/meson-axg.dtsi +@@ -20,7 +20,7 @@ + #address-cells = <2>; + #size-cells = <2>; + +- tdmif_a: audio-controller@0 { ++ tdmif_a: audio-controller-0 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_A"; +@@ -31,7 +31,7 @@ + status = "disabled"; + }; + +- tdmif_b: audio-controller@1 { ++ tdmif_b: audio-controller-1 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_B"; +@@ -42,7 +42,7 @@ + status = "disabled"; + }; + +- tdmif_c: audio-controller@2 { ++ tdmif_c: audio-controller-2 { + compatible = "amlogic,axg-tdm-iface"; + #sound-dai-cells = <0>; + sound-name-prefix = "TDM_C"; +@@ -53,13 +53,6 @@ + status = "disabled"; + }; + +- ao_alt_xtal: ao_alt_xtal-clk { +- compatible = "fixed-clock"; +- clock-frequency = <32000000>; +- clock-output-names = "ao_alt_xtal"; +- #clock-cells = <0>; +- }; +- + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , +@@ -75,34 +68,38 @@ + + cpu0: cpu@0 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ clocks = <&scpi_dvfs 0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ clocks = <&scpi_dvfs 0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ clocks = <&scpi_dvfs 0>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ clocks = <&scpi_dvfs 0>; + }; + + l2: l2-cache0 { +@@ -110,6 +107,19 @@ + }; + }; + ++ sm: secure-monitor { ++ compatible = "amlogic,meson-gxbb-sm"; ++ }; ++ ++ efuse: efuse { ++ compatible = "amlogic,meson-gxbb-efuse"; ++ clocks = <&clkc CLKID_EFUSE>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ read-only; ++ secure-monitor = <&sm>; ++ }; ++ + psci { + compatible = "arm,psci-1.0"; + method = "smc"; +@@ -133,6 +143,28 @@ + }; + }; + ++ scpi { ++ compatible = "arm,scpi-pre-1.0"; ++ mboxes = <&mailbox 1 &mailbox 2>; ++ shmem = <&cpu_scp_lpri &cpu_scp_hpri>; ++ ++ scpi_clocks: clocks { ++ compatible = "arm,scpi-clocks"; ++ ++ scpi_dvfs: clock-controller { ++ compatible = "arm,scpi-dvfs-clocks"; ++ #clock-cells = <1>; ++ clock-indices = <0>; ++ clock-output-names = "vcpu"; ++ }; ++ }; ++ ++ scpi_sensors: sensors { ++ compatible = "amlogic,meson-gxbb-scpi-sensors"; ++ #thermal-sensor-cells = <1>; ++ }; ++ }; ++ + soc { + compatible = "simple-bus"; + #address-cells = <2>; +@@ -140,15 +172,19 @@ + ranges; + + ethmac: ethernet@ff3f0000 { +- compatible = "amlogic,meson-axg-dwmac", "snps,dwmac"; +- reg = <0x0 0xff3f0000 0x0 0x10000 +- 0x0 0xff634540 0x0 0x8>; +- interrupts = ; ++ compatible = "amlogic,meson-axg-dwmac", ++ "snps,dwmac-3.70a", ++ "snps,dwmac"; ++ reg = <0x0 0xff3f0000 0x0 0x10000>, ++ <0x0 0xff634540 0x0 0x8>; ++ interrupts = ; + interrupt-names = "macirq"; + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; ++ rx-fifo-depth = <4096>; ++ tx-fifo-depth = <2048>; + status = "disabled"; + }; + +@@ -200,6 +236,7 @@ + groups = "i2c0_sck", + "i2c0_sda"; + function = "i2c0"; ++ bias-disable; + }; + }; + +@@ -208,6 +245,7 @@ + groups = "i2c1_sck_x", + "i2c1_sda_x"; + function = "i2c1"; ++ bias-disable; + }; + }; + +@@ -216,6 +254,7 @@ + groups = "i2c1_sck_z", + "i2c1_sda_z"; + function = "i2c1"; ++ bias-disable; + }; + }; + +@@ -224,6 +263,7 @@ + groups = "i2c2_sck_a", + "i2c2_sda_a"; + function = "i2c2"; ++ bias-disable; + }; + }; + +@@ -232,6 +272,7 @@ + groups = "i2c2_sck_x", + "i2c2_sda_x"; + function = "i2c2"; ++ bias-disable; + }; + }; + +@@ -240,6 +281,7 @@ + groups = "i2c3_sda_a6", + "i2c3_sck_a7"; + function = "i2c3"; ++ bias-disable; + }; + }; + +@@ -248,6 +290,7 @@ + groups = "i2c3_sda_a12", + "i2c3_sck_a13"; + function = "i2c3"; ++ bias-disable; + }; + }; + +@@ -256,11 +299,12 @@ + groups = "i2c3_sda_a19", + "i2c3_sck_a20"; + function = "i2c3"; ++ bias-disable; + }; + }; + + emmc_pins: emmc { +- mux { ++ mux-0 { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", +@@ -269,10 +313,23 @@ + "emmc_nand_d5", + "emmc_nand_d6", + "emmc_nand_d7", +- "emmc_clk", +- "emmc_cmd", +- "emmc_ds"; ++ "emmc_cmd"; ++ function = "emmc"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "emmc_clk"; + function = "emmc"; ++ bias-disable; ++ }; ++ }; ++ ++ emmc_ds_pins: emmc_ds { ++ mux { ++ groups = "emmc_ds"; ++ function = "emmc"; ++ bias-pull-down; + }; + }; + +@@ -280,9 +337,6 @@ + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; +- }; +- cfg-pull-down { +- pins = "BOOT_8"; + bias-pull-down; + }; + }; +@@ -304,6 +358,7 @@ + "eth_txd2_rgmii", + "eth_txd3_rgmii"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -324,6 +379,7 @@ + "eth_txd2_rgmii", + "eth_txd3_rgmii"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -339,6 +395,7 @@ + "eth_txd0_x", + "eth_txd1_x"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -354,6 +411,7 @@ + "eth_txd0_y", + "eth_txd1_y"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -361,6 +419,7 @@ + mux { + groups = "mclk_b"; + function = "mclk_b"; ++ bias-disable; + }; + }; + +@@ -368,6 +427,7 @@ + mux { + groups = "mclk_c"; + function = "mclk_c"; ++ bias-disable; + }; + }; + +@@ -375,6 +435,7 @@ + mux { + groups = "pdm_dclk_a14"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -382,6 +443,7 @@ + mux { + groups = "pdm_dclk_a19"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -389,6 +451,7 @@ + mux { + groups = "pdm_din0"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -396,6 +459,7 @@ + mux { + groups = "pdm_din1"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -403,6 +467,7 @@ + mux { + groups = "pdm_din2"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -410,6 +475,7 @@ + mux { + groups = "pdm_din3"; + function = "pdm"; ++ bias-disable; + }; + }; + +@@ -417,6 +483,7 @@ + mux { + groups = "pwm_a_a"; + function = "pwm_a"; ++ bias-disable; + }; + }; + +@@ -424,6 +491,7 @@ + mux { + groups = "pwm_a_x18"; + function = "pwm_a"; ++ bias-disable; + }; + }; + +@@ -431,6 +499,7 @@ + mux { + groups = "pwm_a_x20"; + function = "pwm_a"; ++ bias-disable; + }; + }; + +@@ -438,6 +507,7 @@ + mux { + groups = "pwm_a_z"; + function = "pwm_a"; ++ bias-disable; + }; + }; + +@@ -445,6 +515,7 @@ + mux { + groups = "pwm_b_a"; + function = "pwm_b"; ++ bias-disable; + }; + }; + +@@ -452,6 +523,7 @@ + mux { + groups = "pwm_b_x"; + function = "pwm_b"; ++ bias-disable; + }; + }; + +@@ -459,6 +531,7 @@ + mux { + groups = "pwm_b_z"; + function = "pwm_b"; ++ bias-disable; + }; + }; + +@@ -466,6 +539,7 @@ + mux { + groups = "pwm_c_a"; + function = "pwm_c"; ++ bias-disable; + }; + }; + +@@ -473,6 +547,7 @@ + mux { + groups = "pwm_c_x10"; + function = "pwm_c"; ++ bias-disable; + }; + }; + +@@ -480,6 +555,7 @@ + mux { + groups = "pwm_c_x17"; + function = "pwm_c"; ++ bias-disable; + }; + }; + +@@ -487,6 +563,7 @@ + mux { + groups = "pwm_d_x11"; + function = "pwm_d"; ++ bias-disable; + }; + }; + +@@ -494,18 +571,25 @@ + mux { + groups = "pwm_d_x16"; + function = "pwm_d"; ++ bias-disable; + }; + }; + + sdio_pins: sdio { +- mux { ++ mux-0 { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", +- "sdio_cmd", +- "sdio_clk"; ++ "sdio_cmd"; ++ function = "sdio"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "sdio_clk"; + function = "sdio"; ++ bias-disable; + }; + }; + +@@ -513,9 +597,6 @@ + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; +- }; +- cfg-pull-down { +- pins = "GPIOX_4"; + bias-pull-down; + }; + }; +@@ -524,6 +605,7 @@ + mux { + groups = "spdif_in_z"; + function = "spdif_in"; ++ bias-disable; + }; + }; + +@@ -531,6 +613,7 @@ + mux { + groups = "spdif_in_a1"; + function = "spdif_in"; ++ bias-disable; + }; + }; + +@@ -538,6 +621,7 @@ + mux { + groups = "spdif_in_a7"; + function = "spdif_in"; ++ bias-disable; + }; + }; + +@@ -545,6 +629,7 @@ + mux { + groups = "spdif_in_a19"; + function = "spdif_in"; ++ bias-disable; + }; + }; + +@@ -552,6 +637,7 @@ + mux { + groups = "spdif_in_a20"; + function = "spdif_in"; ++ bias-disable; + }; + }; + +@@ -559,6 +645,7 @@ + mux { + groups = "spdif_out_a1"; + function = "spdif_out"; ++ bias-disable; + }; + }; + +@@ -566,6 +653,7 @@ + mux { + groups = "spdif_out_a11"; + function = "spdif_out"; ++ bias-disable; + }; + }; + +@@ -573,6 +661,7 @@ + mux { + groups = "spdif_out_a19"; + function = "spdif_out"; ++ bias-disable; + }; + }; + +@@ -580,6 +669,7 @@ + mux { + groups = "spdif_out_a20"; + function = "spdif_out"; ++ bias-disable; + }; + }; + +@@ -587,6 +677,7 @@ + mux { + groups = "spdif_out_z"; + function = "spdif_out"; ++ bias-disable; + }; + }; + +@@ -596,6 +687,7 @@ + "spi0_mosi", + "spi0_clk"; + function = "spi0"; ++ bias-disable; + }; + }; + +@@ -603,6 +695,7 @@ + mux { + groups = "spi0_ss0"; + function = "spi0"; ++ bias-disable; + }; + }; + +@@ -610,6 +703,7 @@ + mux { + groups = "spi0_ss1"; + function = "spi0"; ++ bias-disable; + }; + }; + +@@ -617,6 +711,7 @@ + mux { + groups = "spi0_ss2"; + function = "spi0"; ++ bias-disable; + }; + }; + +@@ -626,6 +721,7 @@ + "spi1_mosi_a", + "spi1_clk_a"; + function = "spi1"; ++ bias-disable; + }; + }; + +@@ -633,6 +729,7 @@ + mux { + groups = "spi1_ss0_a"; + function = "spi1"; ++ bias-disable; + }; + }; + +@@ -640,6 +737,7 @@ + mux { + groups = "spi1_ss1"; + function = "spi1"; ++ bias-disable; + }; + }; + +@@ -649,6 +747,7 @@ + "spi1_mosi_x", + "spi1_clk_x"; + function = "spi1"; ++ bias-disable; + }; + }; + +@@ -656,6 +755,7 @@ + mux { + groups = "spi1_ss0_x"; + function = "spi1"; ++ bias-disable; + }; + }; + +@@ -663,6 +763,7 @@ + mux { + groups = "tdma_din0"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -670,6 +771,7 @@ + mux { + groups = "tdma_dout0_x14"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -677,6 +779,7 @@ + mux { + groups = "tdma_dout0_x15"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -684,6 +787,7 @@ + mux { + groups = "tdma_dout1"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -691,6 +795,7 @@ + mux { + groups = "tdma_din1"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -698,6 +803,7 @@ + mux { + groups = "tdma_fs"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -705,6 +811,7 @@ + mux { + groups = "tdma_fs_slv"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -712,6 +819,7 @@ + mux { + groups = "tdma_sclk"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -719,6 +827,7 @@ + mux { + groups = "tdma_sclk_slv"; + function = "tdma"; ++ bias-disable; + }; + }; + +@@ -726,6 +835,7 @@ + mux { + groups = "tdmb_din0"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -733,6 +843,7 @@ + mux { + groups = "tdmb_din1"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -740,6 +851,7 @@ + mux { + groups = "tdmb_din2"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -747,6 +859,7 @@ + mux { + groups = "tdmb_din3"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -754,6 +867,7 @@ + mux { + groups = "tdmb_dout0"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -761,6 +875,7 @@ + mux { + groups = "tdmb_dout1"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -768,6 +883,7 @@ + mux { + groups = "tdmb_dout2"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -775,6 +891,7 @@ + mux { + groups = "tdmb_dout3"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -782,6 +899,7 @@ + mux { + groups = "tdmb_fs"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -789,6 +907,7 @@ + mux { + groups = "tdmb_fs_slv"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -796,6 +915,7 @@ + mux { + groups = "tdmb_sclk"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -803,6 +923,7 @@ + mux { + groups = "tdmb_sclk_slv"; + function = "tdmb"; ++ bias-disable; + }; + }; + +@@ -810,6 +931,7 @@ + mux { + groups = "tdmc_fs"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -817,6 +939,7 @@ + mux { + groups = "tdmc_fs_slv"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -824,6 +947,7 @@ + mux { + groups = "tdmc_sclk"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -831,6 +955,7 @@ + mux { + groups = "tdmc_sclk_slv"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -838,6 +963,7 @@ + mux { + groups = "tdmc_din0"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -845,6 +971,7 @@ + mux { + groups = "tdmc_din1"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -852,6 +979,7 @@ + mux { + groups = "tdmc_din2"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -859,6 +987,7 @@ + mux { + groups = "tdmc_din3"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -866,6 +995,7 @@ + mux { + groups = "tdmc_dout0"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -873,6 +1003,7 @@ + mux { + groups = "tdmc_dout1"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -880,6 +1011,7 @@ + mux { + groups = "tdmc_dout2"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -887,6 +1019,7 @@ + mux { + groups = "tdmc_dout3"; + function = "tdmc"; ++ bias-disable; + }; + }; + +@@ -895,6 +1028,7 @@ + groups = "uart_tx_a", + "uart_rx_a"; + function = "uart_a"; ++ bias-disable; + }; + }; + +@@ -903,6 +1037,7 @@ + groups = "uart_cts_a", + "uart_rts_a"; + function = "uart_a"; ++ bias-disable; + }; + }; + +@@ -911,6 +1046,7 @@ + groups = "uart_tx_b_x", + "uart_rx_b_x"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -919,6 +1055,7 @@ + groups = "uart_cts_b_x", + "uart_rts_b_x"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -927,6 +1064,7 @@ + groups = "uart_tx_b_z", + "uart_rx_b_z"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -935,6 +1073,7 @@ + groups = "uart_cts_b_z", + "uart_rts_b_z"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -943,6 +1082,7 @@ + groups = "uart_ao_tx_b_z", + "uart_ao_rx_b_z"; + function = "uart_ao_b_z"; ++ bias-disable; + }; + }; + +@@ -951,6 +1091,7 @@ + groups = "uart_ao_cts_b_z", + "uart_ao_rts_b_z"; + function = "uart_ao_b_z"; ++ bias-disable; + }; + }; + }; +@@ -971,13 +1112,15 @@ + clkc: clock-controller { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; ++ clocks = <&xtal>; ++ clock-names = "xtal"; + }; + }; + }; + +- mailbox: mailbox@ff63dc00 { +- compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; +- reg = <0 0xff63dc00 0 0x400>; ++ mailbox: mailbox@ff63c404 { ++ compatible = "amlogic,meson-gxbb-mhu"; ++ reg = <0 0xff63c404 0 0x4c>; + interrupts = , + , + ; +@@ -1020,67 +1163,73 @@ + + toddr_a: audio-controller@100 { + compatible = "amlogic,axg-toddr"; +- reg = <0x0 0x100 0x0 0x1c>; ++ reg = <0x0 0x100 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_A"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_A>; + resets = <&arb AXG_ARB_TODDR_A>; ++ amlogic,fifo-depth = <512>; + status = "disabled"; + }; + + toddr_b: audio-controller@140 { + compatible = "amlogic,axg-toddr"; +- reg = <0x0 0x140 0x0 0x1c>; ++ reg = <0x0 0x140 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_B"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_B>; + resets = <&arb AXG_ARB_TODDR_B>; ++ amlogic,fifo-depth = <256>; + status = "disabled"; + }; + + toddr_c: audio-controller@180 { + compatible = "amlogic,axg-toddr"; +- reg = <0x0 0x180 0x0 0x1c>; ++ reg = <0x0 0x180 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "TODDR_C"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_TODDR_C>; + resets = <&arb AXG_ARB_TODDR_C>; ++ amlogic,fifo-depth = <256>; + status = "disabled"; + }; + + frddr_a: audio-controller@1c0 { + compatible = "amlogic,axg-frddr"; +- reg = <0x0 0x1c0 0x0 0x1c>; ++ reg = <0x0 0x1c0 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_A"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; + resets = <&arb AXG_ARB_FRDDR_A>; ++ amlogic,fifo-depth = <512>; + status = "disabled"; + }; + + frddr_b: audio-controller@200 { + compatible = "amlogic,axg-frddr"; +- reg = <0x0 0x200 0x0 0x1c>; ++ reg = <0x0 0x200 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_B"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; + resets = <&arb AXG_ARB_FRDDR_B>; ++ amlogic,fifo-depth = <256>; + status = "disabled"; + }; + + frddr_c: audio-controller@240 { + compatible = "amlogic,axg-frddr"; +- reg = <0x0 0x240 0x0 0x1c>; ++ reg = <0x0 0x240 0x0 0x2c>; + #sound-dai-cells = <0>; + sound-name-prefix = "FRDDR_C"; + interrupts = ; + clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; + resets = <&arb AXG_ARB_FRDDR_C>; ++ amlogic,fifo-depth = <256>; + status = "disabled"; + }; + +@@ -1147,6 +1296,18 @@ + status = "disabled"; + }; + ++ spdifin: audio-controller@400 { ++ compatible = "amlogic,axg-spdifin"; ++ reg = <0x0 0x400 0x0 0x30>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "SPDIFIN"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, ++ <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; ++ clock-names = "pclk", "refclk"; ++ status = "disabled"; ++ }; ++ + spdifout: audio-controller@480 { + compatible = "amlogic,axg-spdifout"; + reg = <0x0 0x480 0x0 0x50>; +@@ -1216,6 +1377,8 @@ + compatible = "amlogic,meson-axg-aoclkc"; + #clock-cells = <1>; + #reset-cells = <1>; ++ clocks = <&xtal>, <&clkc CLKID_CLK81>; ++ clock-names = "xtal", "mpeg-clk"; + }; + }; + +@@ -1239,6 +1402,7 @@ + mux { + groups = "i2c_ao_sck_4"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1246,6 +1410,7 @@ + mux { + groups = "i2c_ao_sck_8"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1253,6 +1418,7 @@ + mux { + groups = "i2c_ao_sck_10"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1260,6 +1426,7 @@ + mux { + groups = "i2c_ao_sda_5"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1267,6 +1434,7 @@ + mux { + groups = "i2c_ao_sda_9"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1274,6 +1442,7 @@ + mux { + groups = "i2c_ao_sda_11"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -1281,6 +1450,7 @@ + mux { + groups = "remote_input_ao"; + function = "remote_input_ao"; ++ bias-disable; + }; + }; + +@@ -1289,6 +1459,7 @@ + groups = "uart_ao_tx_a", + "uart_ao_rx_a"; + function = "uart_ao_a"; ++ bias-disable; + }; + }; + +@@ -1297,6 +1468,7 @@ + groups = "uart_ao_cts_a", + "uart_ao_rts_a"; + function = "uart_ao_a"; ++ bias-disable; + }; + }; + +@@ -1305,6 +1477,7 @@ + groups = "uart_ao_tx_b", + "uart_ao_rx_b"; + function = "uart_ao_b"; ++ bias-disable; + }; + }; + +@@ -1313,6 +1486,7 @@ + groups = "uart_ao_cts_b", + "uart_ao_rts_b"; + function = "uart_ao_b"; ++ bias-disable; + }; + }; + }; +@@ -1414,12 +1588,18 @@ + }; + + gpio_intc: interrupt-controller@f080 { +- compatible = "amlogic,meson-gpio-intc"; ++ compatible = "amlogic,meson-axg-gpio-intc", ++ "amlogic,meson-gpio-intc"; + reg = <0x0 0xf080 0x0 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; +- status = "disabled"; ++ }; ++ ++ watchdog@f0d0 { ++ compatible = "amlogic,meson-gxbb-wdt"; ++ reg = <0x0 0xf0d0 0x0 0x10>; ++ clocks = <&xtal>; + }; + + pwm_ab: pwm@1b000 { +@@ -1458,6 +1638,11 @@ + status = "disabled"; + }; + ++ clk_msr: clock-measure@18000 { ++ compatible = "amlogic,meson-axg-clk-measure"; ++ reg = <0x0 0x18000 0x0 0x10>; ++ }; ++ + i2c3: i2c@1c000 { + compatible = "amlogic,meson-axg-i2c"; + reg = <0x0 0x1c000 0x0 0x20>; +@@ -1556,12 +1741,12 @@ + #size-cells = <1>; + ranges = <0 0x0 0xfffc0000 0x20000>; + +- cpu_scp_lpri: scp-shmem@0 { ++ cpu_scp_lpri: scp-shmem@13000 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13000 0x400>; + }; + +- cpu_scp_hpri: scp-shmem@200 { ++ cpu_scp_hpri: scp-shmem@13400 { + compatible = "amlogic,meson-axg-scp-shmem"; + reg = <0x13400 0x400>; + }; +diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi +index 3f39e020f7..abe04f4ad7 100644 +--- a/arch/arm/dts/meson-g12-common.dtsi ++++ b/arch/arm/dts/meson-g12-common.dtsi +@@ -5,51 +5,42 @@ + + #include + #include +-#include + #include + #include + #include + #include +-#include +-#include + #include ++#include + + / { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + +- tdmif_a: audio-controller-0 { +- compatible = "amlogic,axg-tdm-iface"; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TDM_A"; +- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, +- <&clkc_audio AUD_CLKID_MST_A_SCLK>, +- <&clkc_audio AUD_CLKID_MST_A_LRCLK>; +- clock-names = "mclk", "sclk", "lrclk"; +- status = "disabled"; +- }; ++ chosen { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; + +- tdmif_b: audio-controller-1 { +- compatible = "amlogic,axg-tdm-iface"; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TDM_B"; +- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, +- <&clkc_audio AUD_CLKID_MST_B_SCLK>, +- <&clkc_audio AUD_CLKID_MST_B_LRCLK>; +- clock-names = "mclk", "sclk", "lrclk"; +- status = "disabled"; +- }; ++ simplefb_cvbs: framebuffer-cvbs { ++ compatible = "amlogic,simple-framebuffer", ++ "simple-framebuffer"; ++ amlogic,pipeline = "vpu-cvbs"; ++ clocks = <&clkc CLKID_HDMI>, ++ <&clkc CLKID_HTX_PCLK>, ++ <&clkc CLKID_VPU_INTR>; ++ status = "disabled"; ++ }; + +- tdmif_c: audio-controller-2 { +- compatible = "amlogic,axg-tdm-iface"; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TDM_C"; +- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, +- <&clkc_audio AUD_CLKID_MST_C_SCLK>, +- <&clkc_audio AUD_CLKID_MST_C_LRCLK>; +- clock-names = "mclk", "sclk", "lrclk"; +- status = "disabled"; ++ simplefb_hdmi: framebuffer-hdmi { ++ compatible = "amlogic,simple-framebuffer", ++ "simple-framebuffer"; ++ amlogic,pipeline = "vpu-hdmi"; ++ clocks = <&clkc CLKID_HDMI>, ++ <&clkc CLKID_HTX_PCLK>, ++ <&clkc CLKID_VPU_INTR>; ++ status = "disabled"; ++ }; + }; + + efuse: efuse { +@@ -58,6 +49,7 @@ + #address-cells = <1>; + #size-cells = <1>; + read-only; ++ secure-monitor = <&sm>; + }; + + psci { +@@ -95,6 +87,94 @@ + #size-cells = <2>; + ranges; + ++ pcie: pcie@fc000000 { ++ compatible = "amlogic,g12a-pcie", "snps,dw-pcie"; ++ reg = <0x0 0xfc000000 0x0 0x400000 ++ 0x0 0xff648000 0x0 0x2000 ++ 0x0 0xfc400000 0x0 0x200000>; ++ reg-names = "elbi", "cfg", "config"; ++ interrupts = ; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0>; ++ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; ++ bus-range = <0x0 0xff>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000 ++ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; ++ ++ clocks = <&clkc CLKID_PCIE_PHY ++ &clkc CLKID_PCIE_COMB ++ &clkc CLKID_PCIE_PLL>; ++ clock-names = "general", ++ "pclk", ++ "port"; ++ resets = <&reset RESET_PCIE_CTRL_A>, ++ <&reset RESET_PCIE_APB>; ++ reset-names = "port", ++ "apb"; ++ num-lanes = <1>; ++ phys = <&usb3_pcie_phy PHY_TYPE_PCIE>; ++ phy-names = "pcie"; ++ status = "disabled"; ++ }; ++ ++ thermal-zones { ++ cpu_thermal: cpu-thermal { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ thermal-sensors = <&cpu_temp>; ++ ++ trips { ++ cpu_passive: cpu-passive { ++ temperature = <85000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ cpu_hot: cpu-hot { ++ temperature = <95000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "hot"; ++ }; ++ ++ cpu_critical: cpu-critical { ++ temperature = <110000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ ddr_thermal: ddr-thermal { ++ polling-delay = <1000>; ++ polling-delay-passive = <100>; ++ thermal-sensors = <&ddr_temp>; ++ ++ trips { ++ ddr_passive: ddr-passive { ++ temperature = <85000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ ddr_critical: ddr-critical { ++ temperature = <110000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ ++ cooling-maps { ++ map { ++ trip = <&ddr_passive>; ++ cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ }; ++ + ethmac: ethernet@ff3f0000 { + compatible = "amlogic,meson-axg-dwmac", + "snps,dwmac-3.70a", +@@ -1356,6 +1436,26 @@ + }; + }; + ++ cpu_temp: temperature-sensor@34800 { ++ compatible = "amlogic,g12a-cpu-thermal", ++ "amlogic,g12a-thermal"; ++ reg = <0x0 0x34800 0x0 0x50>; ++ interrupts = ; ++ clocks = <&clkc CLKID_TS>; ++ #thermal-sensor-cells = <0>; ++ amlogic,ao-secure = <&sec_AO>; ++ }; ++ ++ ddr_temp: temperature-sensor@34c00 { ++ compatible = "amlogic,g12a-ddr-thermal", ++ "amlogic,g12a-thermal"; ++ reg = <0x0 0x34c00 0x0 0x50>; ++ interrupts = ; ++ clocks = <&clkc CLKID_TS>; ++ #thermal-sensor-cells = <0>; ++ amlogic,ao-secure = <&sec_AO>; ++ }; ++ + usb2_phy0: phy@36000 { + compatible = "amlogic,g12a-usb2-phy"; + reg = <0x0 0x36000 0x0 0x2000>; +@@ -1457,290 +1557,6 @@ + }; + }; + +- pdm: audio-controller@40000 { +- compatible = "amlogic,g12a-pdm", +- "amlogic,axg-pdm"; +- reg = <0x0 0x40000 0x0 0x34>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "PDM"; +- clocks = <&clkc_audio AUD_CLKID_PDM>, +- <&clkc_audio AUD_CLKID_PDM_DCLK>, +- <&clkc_audio AUD_CLKID_PDM_SYSCLK>; +- clock-names = "pclk", "dclk", "sysclk"; +- status = "disabled"; +- }; +- +- audio: bus@42000 { +- compatible = "simple-bus"; +- reg = <0x0 0x42000 0x0 0x2000>; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>; +- +- clkc_audio: clock-controller@0 { +- status = "disabled"; +- compatible = "amlogic,g12a-audio-clkc"; +- reg = <0x0 0x0 0x0 0xb4>; +- #clock-cells = <1>; +- #reset-cells = <1>; +- +- clocks = <&clkc CLKID_AUDIO>, +- <&clkc CLKID_MPLL0>, +- <&clkc CLKID_MPLL1>, +- <&clkc CLKID_MPLL2>, +- <&clkc CLKID_MPLL3>, +- <&clkc CLKID_HIFI_PLL>, +- <&clkc CLKID_FCLK_DIV3>, +- <&clkc CLKID_FCLK_DIV4>, +- <&clkc CLKID_GP0_PLL>; +- clock-names = "pclk", +- "mst_in0", +- "mst_in1", +- "mst_in2", +- "mst_in3", +- "mst_in4", +- "mst_in5", +- "mst_in6", +- "mst_in7"; +- +- resets = <&reset RESET_AUDIO>; +- }; +- +- toddr_a: audio-controller@100 { +- compatible = "amlogic,g12a-toddr", +- "amlogic,axg-toddr"; +- reg = <0x0 0x100 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TODDR_A"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_TODDR_A>; +- resets = <&arb AXG_ARB_TODDR_A>; +- status = "disabled"; +- }; +- +- toddr_b: audio-controller@140 { +- compatible = "amlogic,g12a-toddr", +- "amlogic,axg-toddr"; +- reg = <0x0 0x140 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TODDR_B"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_TODDR_B>; +- resets = <&arb AXG_ARB_TODDR_B>; +- status = "disabled"; +- }; +- +- toddr_c: audio-controller@180 { +- compatible = "amlogic,g12a-toddr", +- "amlogic,axg-toddr"; +- reg = <0x0 0x180 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "TODDR_C"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_TODDR_C>; +- resets = <&arb AXG_ARB_TODDR_C>; +- status = "disabled"; +- }; +- +- frddr_a: audio-controller@1c0 { +- compatible = "amlogic,g12a-frddr", +- "amlogic,axg-frddr"; +- reg = <0x0 0x1c0 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "FRDDR_A"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; +- resets = <&arb AXG_ARB_FRDDR_A>; +- status = "disabled"; +- }; +- +- frddr_b: audio-controller@200 { +- compatible = "amlogic,g12a-frddr", +- "amlogic,axg-frddr"; +- reg = <0x0 0x200 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "FRDDR_B"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; +- resets = <&arb AXG_ARB_FRDDR_B>; +- status = "disabled"; +- }; +- +- frddr_c: audio-controller@240 { +- compatible = "amlogic,g12a-frddr", +- "amlogic,axg-frddr"; +- reg = <0x0 0x240 0x0 0x1c>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "FRDDR_C"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; +- resets = <&arb AXG_ARB_FRDDR_C>; +- status = "disabled"; +- }; +- +- arb: reset-controller@280 { +- status = "disabled"; +- compatible = "amlogic,meson-axg-audio-arb"; +- reg = <0x0 0x280 0x0 0x4>; +- #reset-cells = <1>; +- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; +- }; +- +- tdmin_a: audio-controller@300 { +- compatible = "amlogic,g12a-tdmin", +- "amlogic,axg-tdmin"; +- reg = <0x0 0x300 0x0 0x40>; +- sound-name-prefix = "TDMIN_A"; +- resets = <&clkc_audio AUD_RESET_TDMIN_A>; +- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, +- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- tdmin_b: audio-controller@340 { +- compatible = "amlogic,g12a-tdmin", +- "amlogic,axg-tdmin"; +- reg = <0x0 0x340 0x0 0x40>; +- sound-name-prefix = "TDMIN_B"; +- resets = <&clkc_audio AUD_RESET_TDMIN_B>; +- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, +- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- tdmin_c: audio-controller@380 { +- compatible = "amlogic,g12a-tdmin", +- "amlogic,axg-tdmin"; +- reg = <0x0 0x380 0x0 0x40>; +- sound-name-prefix = "TDMIN_C"; +- resets = <&clkc_audio AUD_RESET_TDMIN_C>; +- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, +- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- tdmin_lb: audio-controller@3c0 { +- compatible = "amlogic,g12a-tdmin", +- "amlogic,axg-tdmin"; +- reg = <0x0 0x3c0 0x0 0x40>; +- sound-name-prefix = "TDMIN_LB"; +- resets = <&clkc_audio AUD_RESET_TDMIN_LB>; +- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, +- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- spdifin: audio-controller@400 { +- compatible = "amlogic,g12a-spdifin", +- "amlogic,axg-spdifin"; +- reg = <0x0 0x400 0x0 0x30>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "SPDIFIN"; +- interrupts = ; +- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, +- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; +- clock-names = "pclk", "refclk"; +- status = "disabled"; +- }; +- +- spdifout: audio-controller@480 { +- compatible = "amlogic,g12a-spdifout", +- "amlogic,axg-spdifout"; +- reg = <0x0 0x480 0x0 0x50>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "SPDIFOUT"; +- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, +- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; +- clock-names = "pclk", "mclk"; +- status = "disabled"; +- }; +- +- tdmout_a: audio-controller@500 { +- compatible = "amlogic,g12a-tdmout"; +- reg = <0x0 0x500 0x0 0x40>; +- sound-name-prefix = "TDMOUT_A"; +- resets = <&clkc_audio AUD_RESET_TDMOUT_A>; +- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, +- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- tdmout_b: audio-controller@540 { +- compatible = "amlogic,g12a-tdmout"; +- reg = <0x0 0x540 0x0 0x40>; +- sound-name-prefix = "TDMOUT_B"; +- resets = <&clkc_audio AUD_RESET_TDMOUT_B>; +- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, +- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- tdmout_c: audio-controller@580 { +- compatible = "amlogic,g12a-tdmout"; +- reg = <0x0 0x580 0x0 0x40>; +- sound-name-prefix = "TDMOUT_C"; +- resets = <&clkc_audio AUD_RESET_TDMOUT_C>; +- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, +- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, +- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, +- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; +- clock-names = "pclk", "sclk", "sclk_sel", +- "lrclk", "lrclk_sel"; +- status = "disabled"; +- }; +- +- spdifout_b: audio-controller@680 { +- compatible = "amlogic,g12a-spdifout", +- "amlogic,axg-spdifout"; +- reg = <0x0 0x680 0x0 0x50>; +- #sound-dai-cells = <0>; +- sound-name-prefix = "SPDIFOUT_B"; +- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>, +- <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>; +- clock-names = "pclk", "mclk"; +- status = "disabled"; +- }; +- +- tohdmitx: audio-controller@744 { +- compatible = "amlogic,g12a-tohdmitx"; +- reg = <0x0 0x744 0x0 0x4>; +- #sound-dai-cells = <1>; +- sound-name-prefix = "TOHDMITX"; +- status = "disabled"; +- }; +- }; +- + usb3_pcie_phy: phy@46000 { + compatible = "amlogic,g12a-usb3-pcie-phy"; + reg = <0x0 0x46000 0x0 0x2000>; +@@ -2152,6 +1968,29 @@ + }; + }; + ++ vdec: video-decoder@ff620000 { ++ compatible = "amlogic,g12a-vdec"; ++ reg = <0x0 0xff620000 0x0 0x10000>, ++ <0x0 0xffd0e180 0x0 0xe4>; ++ reg-names = "dos", "esparser"; ++ interrupts = , ++ ; ++ interrupt-names = "vdec", "esparser"; ++ ++ amlogic,ao-sysctrl = <&rti>; ++ amlogic,canvas = <&canvas>; ++ ++ clocks = <&clkc CLKID_PARSER>, ++ <&clkc CLKID_DOS>, ++ <&clkc CLKID_VDEC_1>, ++ <&clkc CLKID_VDEC_HEVC>, ++ <&clkc CLKID_VDEC_HEVCF>; ++ clock-names = "dos_parser", "dos", "vdec_1", ++ "vdec_hevc", "vdec_hevcf"; ++ resets = <&reset RESET_PARSER>; ++ reset-names = "esparser"; ++ }; ++ + vpu: vpu@ff900000 { + compatible = "amlogic,meson-g12a-vpu"; + reg = <0x0 0xff900000 0x0 0x100000>, +@@ -2388,10 +2227,10 @@ + compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; + reg = <0x0 0xffe40000 0x0 0x40000>; + interrupt-parent = <&gic>; +- interrupts = , ++ interrupts = , + , +- ; +- interrupt-names = "gpu", "mmu", "job"; ++ ; ++ interrupt-names = "job", "mmu", "gpu"; + clocks = <&clkc CLKID_MALI>; + resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; + +@@ -2409,6 +2248,7 @@ + assigned-clock-rates = <0>, /* Do Nothing */ + <800000000>, + <0>; /* Do Nothing */ ++ #cooling-cells = <2>; + }; + }; + +diff --git a/arch/arm/dts/meson-g12.dtsi b/arch/arm/dts/meson-g12.dtsi +new file mode 100644 +index 0000000000..03054c4788 +--- /dev/null ++++ b/arch/arm/dts/meson-g12.dtsi +@@ -0,0 +1,398 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS ++ * Author: Jerome Brunet ++ */ ++ ++#include "meson-g12-common.dtsi" ++#include ++#include ++#include ++#include ++ ++/ { ++ tdmif_a: audio-controller-0 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_A"; ++ clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_A_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_A_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++ ++ tdmif_b: audio-controller-1 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_B"; ++ clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_B_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_B_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++ ++ tdmif_c: audio-controller-2 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_C"; ++ clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_C_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_C_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++}; ++ ++&apb { ++ pdm: audio-controller@40000 { ++ compatible = "amlogic,g12a-pdm", ++ "amlogic,axg-pdm"; ++ reg = <0x0 0x40000 0x0 0x34>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "PDM"; ++ clocks = <&clkc_audio AUD_CLKID_PDM>, ++ <&clkc_audio AUD_CLKID_PDM_DCLK>, ++ <&clkc_audio AUD_CLKID_PDM_SYSCLK>; ++ clock-names = "pclk", "dclk", "sysclk"; ++ status = "disabled"; ++ }; ++ ++ audio: bus@42000 { ++ compatible = "simple-bus"; ++ reg = <0x0 0x42000 0x0 0x2000>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>; ++ ++ clkc_audio: clock-controller@0 { ++ status = "disabled"; ++ compatible = "amlogic,g12a-audio-clkc"; ++ reg = <0x0 0x0 0x0 0xb4>; ++ #clock-cells = <1>; ++ #reset-cells = <1>; ++ ++ clocks = <&clkc CLKID_AUDIO>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL3>, ++ <&clkc CLKID_HIFI_PLL>, ++ <&clkc CLKID_FCLK_DIV3>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <&clkc CLKID_GP0_PLL>; ++ clock-names = "pclk", ++ "mst_in0", ++ "mst_in1", ++ "mst_in2", ++ "mst_in3", ++ "mst_in4", ++ "mst_in5", ++ "mst_in6", ++ "mst_in7"; ++ ++ resets = <&reset RESET_AUDIO>; ++ }; ++ ++ toddr_a: audio-controller@100 { ++ compatible = "amlogic,g12a-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x100 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_A"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_A>; ++ resets = <&arb AXG_ARB_TODDR_A>, ++ <&clkc_audio AUD_RESET_TODDR_A>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <512>; ++ status = "disabled"; ++ }; ++ ++ toddr_b: audio-controller@140 { ++ compatible = "amlogic,g12a-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x140 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_B"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_B>; ++ resets = <&arb AXG_ARB_TODDR_B>, ++ <&clkc_audio AUD_RESET_TODDR_B>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ toddr_c: audio-controller@180 { ++ compatible = "amlogic,g12a-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x180 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_C"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_C>; ++ resets = <&arb AXG_ARB_TODDR_C>, ++ <&clkc_audio AUD_RESET_TODDR_C>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ frddr_a: audio-controller@1c0 { ++ compatible = "amlogic,g12a-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x1c0 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_A"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; ++ resets = <&arb AXG_ARB_FRDDR_A>, ++ <&clkc_audio AUD_RESET_FRDDR_A>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <512>; ++ status = "disabled"; ++ }; ++ ++ frddr_b: audio-controller@200 { ++ compatible = "amlogic,g12a-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x200 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_B"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; ++ resets = <&arb AXG_ARB_FRDDR_B>, ++ <&clkc_audio AUD_RESET_FRDDR_B>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ frddr_c: audio-controller@240 { ++ compatible = "amlogic,g12a-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x240 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_C"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; ++ resets = <&arb AXG_ARB_FRDDR_C>, ++ <&clkc_audio AUD_RESET_FRDDR_C>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ arb: reset-controller@280 { ++ status = "disabled"; ++ compatible = "amlogic,meson-axg-audio-arb"; ++ reg = <0x0 0x280 0x0 0x4>; ++ #reset-cells = <1>; ++ clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; ++ }; ++ ++ tdmin_a: audio-controller@300 { ++ compatible = "amlogic,g12a-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x300 0x0 0x40>; ++ sound-name-prefix = "TDMIN_A"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_A>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_b: audio-controller@340 { ++ compatible = "amlogic,g12a-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x340 0x0 0x40>; ++ sound-name-prefix = "TDMIN_B"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_B>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_c: audio-controller@380 { ++ compatible = "amlogic,g12a-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x380 0x0 0x40>; ++ sound-name-prefix = "TDMIN_C"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_C>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_lb: audio-controller@3c0 { ++ compatible = "amlogic,g12a-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x3c0 0x0 0x40>; ++ sound-name-prefix = "TDMIN_LB"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_LB>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ spdifin: audio-controller@400 { ++ compatible = "amlogic,g12a-spdifin", ++ "amlogic,axg-spdifin"; ++ reg = <0x0 0x400 0x0 0x30>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "SPDIFIN"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, ++ <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; ++ clock-names = "pclk", "refclk"; ++ resets = <&clkc_audio AUD_RESET_SPDIFIN>; ++ status = "disabled"; ++ }; ++ ++ spdifout: audio-controller@480 { ++ compatible = "amlogic,g12a-spdifout", ++ "amlogic,axg-spdifout"; ++ reg = <0x0 0x480 0x0 0x50>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "SPDIFOUT"; ++ clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, ++ <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; ++ clock-names = "pclk", "mclk"; ++ resets = <&clkc_audio AUD_RESET_SPDIFOUT>; ++ status = "disabled"; ++ }; ++ ++ tdmout_a: audio-controller@500 { ++ compatible = "amlogic,g12a-tdmout"; ++ reg = <0x0 0x500 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_A"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_A>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmout_b: audio-controller@540 { ++ compatible = "amlogic,g12a-tdmout"; ++ reg = <0x0 0x540 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_B"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_B>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmout_c: audio-controller@580 { ++ compatible = "amlogic,g12a-tdmout"; ++ reg = <0x0 0x580 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_C"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_C>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ spdifout_b: audio-controller@680 { ++ compatible = "amlogic,g12a-spdifout", ++ "amlogic,axg-spdifout"; ++ reg = <0x0 0x680 0x0 0x50>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "SPDIFOUT_B"; ++ clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>, ++ <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>; ++ clock-names = "pclk", "mclk"; ++ resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>; ++ status = "disabled"; ++ }; ++ ++ tohdmitx: audio-controller@744 { ++ compatible = "amlogic,g12a-tohdmitx"; ++ reg = <0x0 0x744 0x0 0x4>; ++ #sound-dai-cells = <1>; ++ sound-name-prefix = "TOHDMITX"; ++ resets = <&clkc_audio AUD_RESET_TOHDMITX>; ++ status = "disabled"; ++ }; ++ }; ++}; ++ ++&cpu_thermal { ++ cooling-maps { ++ map0 { ++ trip = <&cpu_passive>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ map1 { ++ trip = <&cpu_hot>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++}; ++ ++ðmac { ++ power-domains = <&pwrc PWRC_G12A_ETH_ID>; ++}; ++ ++&vpu { ++ power-domains = <&pwrc PWRC_G12A_VPU_ID>; ++}; ++ ++&sd_emmc_a { ++ amlogic,dram-access-quirk; ++}; ++ ++&simplefb_cvbs { ++ power-domains = <&pwrc PWRC_G12A_VPU_ID>; ++}; ++ ++&simplefb_hdmi { ++ power-domains = <&pwrc PWRC_G12A_VPU_ID>; ++}; ++ +diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts +index c7a8736885..2ac9e3a43b 100644 +--- a/arch/arm/dts/meson-g12a-sei510.dts ++++ b/arch/arm/dts/meson-g12a-sei510.dts +@@ -129,6 +129,25 @@ + enable-active-high; + }; + ++ vddcpu: regulator-vddcpu { ++ /* ++ * SY8120B1ABC DC/DC Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&dc_in>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ + vddio_ao1v8: regulator-vddio_ao1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO1V8"; +@@ -297,6 +316,34 @@ + status = "okay"; + }; + ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -339,6 +386,20 @@ + pinctrl-names = "default"; + }; + ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ + &pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; +@@ -377,6 +438,9 @@ + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; +diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts +index 8551fbd4a4..2a324f0136 100644 +--- a/arch/arm/dts/meson-g12a-u200.dts ++++ b/arch/arm/dts/meson-g12a-u200.dts +@@ -129,6 +129,24 @@ + regulator-always-on; + }; + ++ vddcpu: regulator-vddcpu { ++ /* ++ * MP8756GD Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&main_12v>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; + }; + + &cec_AO { +@@ -145,6 +163,34 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -197,6 +243,14 @@ + pinctrl-names = "default"; + }; + ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ + /* SD card */ + &sd_emmc_b { + status = "okay"; +diff --git a/arch/arm/dts/meson-g12a.dtsi b/arch/arm/dts/meson-g12a.dtsi +index eb5d177d7a..fb0ab27d1f 100644 +--- a/arch/arm/dts/meson-g12a.dtsi ++++ b/arch/arm/dts/meson-g12a.dtsi +@@ -3,8 +3,7 @@ + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +-#include "meson-g12-common.dtsi" +-#include ++#include "meson-g12.dtsi" + + / { + compatible = "amlogic,g12a"; +@@ -19,6 +18,7 @@ + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +@@ -27,6 +27,7 @@ + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu2: cpu@2 { +@@ -35,6 +36,7 @@ + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu3: cpu@3 { +@@ -43,6 +45,7 @@ + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + l2: l2-cache0 { +@@ -111,14 +114,22 @@ + }; + }; + +-ðmac { +- power-domains = <&pwrc PWRC_G12A_ETH_ID>; +-}; +- +-&vpu { +- power-domains = <&pwrc PWRC_G12A_VPU_ID>; +-}; ++&cpu_thermal { ++ cooling-maps { ++ map0 { ++ trip = <&cpu_passive>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; + +-&sd_emmc_a { +- amlogic,dram-access-quirk; ++ map1 { ++ trip = <&cpu_hot>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; + }; +diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts +index 3a6a1e0c1e..124a809010 100644 +--- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts ++++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts +@@ -14,3 +14,28 @@ + / { + compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; + }; ++ ++/* ++ * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential ++ * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between ++ * an USB3.0 Type A connector and a M.2 Key M slot. ++ * The PHY driving these differential lines is shared between ++ * the USB3.0 controller and the PCIe Controller, thus only ++ * a single controller can use it. ++ * If the MCU is configured to mux the PCIe/USB3.0 differential lines ++ * to the M.2 Key M slot, uncomment the following block to disable ++ * USB3.0 from the USB Complex and enable the PCIe controller. ++ * The End User is not expected to uncomment the following except for ++ * testing purposes, but instead rely on the firmware/bootloader to ++ * update these nodes accordingly if PCIe mode is selected by the MCU. ++ */ ++/* ++&pcie { ++ status = "okay"; ++}; ++ ++&usb { ++ phys = <&usb2_phy0>, <&usb2_phy1>; ++ phy-names = "usb2-phy0", "usb2-phy1"; ++}; ++ */ +diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts +index 42f1540575..0e54c1dc28 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2.dts ++++ b/arch/arm/dts/meson-g12b-odroid-n2.dts +@@ -12,7 +12,7 @@ + #include + + / { +- compatible = "hardkernel,odroid-n2", "amlogic,g12b"; ++ compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b"; + model = "Hardkernel ODROID-N2"; + + aliases { +diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi +index 5628ccd545..6dbc396804 100644 +--- a/arch/arm/dts/meson-g12b.dtsi ++++ b/arch/arm/dts/meson-g12b.dtsi +@@ -4,8 +4,7 @@ + * Author: Neil Armstrong + */ + +-#include "meson-g12-common.dtsi" +-#include ++#include "meson-g12.dtsi" + + / { + compatible = "amlogic,g12b"; +@@ -49,7 +48,9 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + enable-method = "psci"; ++ capacity-dmips-mhz = <592>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +@@ -57,7 +58,9 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + enable-method = "psci"; ++ capacity-dmips-mhz = <592>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu100: cpu@100 { +@@ -65,7 +68,9 @@ + compatible = "arm,cortex-a73"; + reg = <0x0 0x100>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu101: cpu@101 { +@@ -73,7 +78,9 @@ + compatible = "arm,cortex-a73"; + reg = <0x0 0x101>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu102: cpu@102 { +@@ -81,7 +88,9 @@ + compatible = "arm,cortex-a73"; + reg = <0x0 0x102>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + cpu103: cpu@103 { +@@ -89,7 +98,9 @@ + compatible = "arm,cortex-a73"; + reg = <0x0 0x103>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; ++ #cooling-cells = <2>; + }; + + l2: l2-cache0 { +@@ -102,14 +113,3 @@ + compatible = "amlogic,g12b-clkc"; + }; + +-ðmac { +- power-domains = <&pwrc PWRC_G12A_ETH_ID>; +-}; +- +-&vpu { +- power-domains = <&pwrc PWRC_G12A_VPU_ID>; +-}; +- +-&sd_emmc_a { +- amlogic,dram-access-quirk; +-}; +diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi +index f1e5cdbade..40db06e28b 100644 +--- a/arch/arm/dts/meson-gx.dtsi ++++ b/arch/arm/dts/meson-gx.dtsi +@@ -50,13 +50,35 @@ + }; + }; + ++ chosen { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ simplefb_cvbs: framebuffer-cvbs { ++ compatible = "amlogic,simple-framebuffer", ++ "simple-framebuffer"; ++ amlogic,pipeline = "vpu-cvbs"; ++ power-domains = <&pwrc_vpu>; ++ status = "disabled"; ++ }; ++ ++ simplefb_hdmi: framebuffer-hdmi { ++ compatible = "amlogic,simple-framebuffer", ++ "simple-framebuffer"; ++ amlogic,pipeline = "vpu-hdmi"; ++ power-domains = <&pwrc_vpu>; ++ status = "disabled"; ++ }; ++ }; ++ + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -65,7 +87,7 @@ + + cpu1: cpu@1 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -74,7 +96,7 @@ + + cpu2: cpu@2 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -83,7 +105,7 @@ + + cpu3: cpu@3 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -139,6 +161,7 @@ + #address-cells = <1>; + #size-cells = <1>; + read-only; ++ secure-monitor = <&sm>; + + sn: sn@14 { + reg = <0x14 0x10>; +@@ -198,7 +221,7 @@ + }; + + reset: reset-controller@4404 { +- compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset"; ++ compatible = "amlogic,meson-gxbb-reset"; + reg = <0x0 0x04404 0x0 0x9c>; + #reset-cells = <1>; + }; +@@ -218,7 +241,7 @@ + }; + + i2c_A: i2c@8500 { +- compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; ++ compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x08500 0x0 0x20>; + interrupts = ; + #address-cells = <1>; +@@ -262,8 +285,13 @@ + status = "disabled"; + }; + ++ clock-measure@8758 { ++ compatible = "amlogic,meson-gx-clk-measure"; ++ reg = <0x0 0x8758 0x0 0x10>; ++ }; ++ + i2c_B: i2c@87c0 { +- compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; ++ compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x087c0 0x0 0x20>; + interrupts = ; + #address-cells = <1>; +@@ -272,7 +300,7 @@ + }; + + i2c_C: i2c@87e0 { +- compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; ++ compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x087e0 0x0 0x20>; + interrupts = ; + #address-cells = <1>; +@@ -290,7 +318,7 @@ + }; + + spifc: spi@8c80 { +- compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc"; ++ compatible = "amlogic,meson-gxbb-spifc"; + reg = <0x0 0x08c80 0x0 0x80>; + #address-cells = <1>; + #size-cells = <0>; +@@ -298,7 +326,7 @@ + }; + + watchdog@98d0 { +- compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; ++ compatible = "amlogic,meson-gxbb-wdt"; + reg = <0x0 0x098d0 0x0 0x10>; + clocks = <&xtal>; + }; +@@ -364,6 +392,7 @@ + compatible = "amlogic,meson-gx-ao-cec"; + reg = <0x0 0x00100 0x0 0x14>; + interrupts = ; ++ status = "disabled"; + }; + + sec_AO: ao-secure@140 { +@@ -387,7 +416,7 @@ + }; + + i2c_AO: i2c@500 { +- compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; ++ compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x500 0x0 0x20>; + interrupts = ; + #address-cells = <1>; +@@ -410,7 +439,21 @@ + }; + }; + +- periphs: periphs@c8834000 { ++ vdec: video-codec@c8820000 { ++ compatible = "amlogic,gx-vdec"; ++ reg = <0x0 0xc8820000 0x0 0x10000>, ++ <0x0 0xc110a580 0x0 0xe4>; ++ reg-names = "dos", "esparser"; ++ ++ interrupts = , ++ ; ++ interrupt-names = "vdec", "esparser"; ++ ++ amlogic,ao-sysctrl = <&sysctrl_AO>; ++ amlogic,canvas = <&canvas>; ++ }; ++ ++ periphs: bus@c8834000 { + compatible = "simple-bus"; + reg = <0x0 0xc8834000 0x0 0x2000>; + #address-cells = <2>; +@@ -449,7 +492,7 @@ + }; + + mailbox: mailbox@404 { +- compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; ++ compatible = "amlogic,meson-gxbb-mhu"; + reg = <0 0x404 0 0x4c>; + interrupts = , + , +@@ -459,11 +502,15 @@ + }; + + ethmac: ethernet@c9410000 { +- compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; +- reg = <0x0 0xc9410000 0x0 0x10000 +- 0x0 0xc8834540 0x0 0x4>; +- interrupts = ; ++ compatible = "amlogic,meson-gxbb-dwmac", ++ "snps,dwmac-3.70a", ++ "snps,dwmac"; ++ reg = <0x0 0xc9410000 0x0 0x10000>, ++ <0x0 0xc8834540 0x0 0x4>; ++ interrupts = ; + interrupt-names = "macirq"; ++ rx-fifo-depth = <4096>; ++ tx-fifo-depth = <2048>; + status = "disabled"; + }; + +@@ -499,12 +546,12 @@ + vpu: vpu@d0100000 { + compatible = "amlogic,meson-gx-vpu"; + reg = <0x0 0xd0100000 0x0 0x100000>, +- <0x0 0xc883c000 0x0 0x1000>, +- <0x0 0xc8838000 0x0 0x1000>; +- reg-names = "vpu", "hhi", "dmc"; ++ <0x0 0xc883c000 0x0 0x1000>; ++ reg-names = "vpu", "hhi"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; ++ amlogic,canvas = <&canvas>; + + /* CVBS VDAC output port */ + cvbs_vdac_port: port@0 { +diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +index cbe99bd4e0..d6ca684e0e 100644 +--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +@@ -10,6 +10,7 @@ + + / { + compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; ++ model = "FriendlyARM NanoPi K2"; + + aliases { + serial0 = &uart_AO; +@@ -154,10 +155,6 @@ + + amlogic,tx-delay-ns = <2>; + +- snps,reset-gpio = <&gpio GPIOZ_14 0>; +- snps,reset-delays-us = <0 10000 1000000>; +- snps,reset-active-low; +- + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; +@@ -166,6 +163,11 @@ + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; +@@ -191,7 +193,7 @@ + pinctrl-names = "default"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In", + "VCCK En", "CON1 Header Pin31", + "I2S Header Pin6", "IR In", "I2S Header Pin7", +@@ -201,7 +203,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", + "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", +@@ -273,11 +275,14 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <200000000>; ++ max-frequency = <50000000>; + + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddio_ao3v3>; +@@ -301,12 +306,11 @@ + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; +- sd-uhs-sdr104; +- max-frequency = <200000000>; ++ sd-uhs-ddr50; ++ max-frequency = <100000000>; + disable-wp; + +- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; +- cd-inverted; ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddio_ao3v3>; + vqmmc-supply = <&vddio_tf>; +diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts +index 54954b314a..6ded279c40 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2.dts ++++ b/arch/arm/dts/meson-gxbb-odroidc2.dts +@@ -36,8 +36,15 @@ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + ++ /* ++ * signal name from schematics: PWREN ++ */ + gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; + enable-active-high; ++ /* ++ * signal name from schematics: USB_POWER ++ */ ++ vin-supply = <&p5v0>; + }; + + leds { +@@ -50,18 +57,38 @@ + }; + }; + ++ p5v0: regulator-p5v0 { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ hdmi_p5v0: regulator-hdmi_p5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "HDMI_P5V0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ /* AP2331SA-7 */ ++ vin-supply = <&p5v0>; ++ }; ++ + tflash_vdd: regulator-tflash_vdd { +- /* +- * signal name from schematics: TFLASH_VDD_EN +- */ + compatible = "regulator-fixed"; + + regulator-name = "TFLASH_VDD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + ++ /* ++ * signal name from schematics: TFLASH_VDD_EN ++ */ + gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; + enable-active-high; ++ /* U16 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; + }; + + tf_io: gpio-regulator-tf_io { +@@ -77,8 +104,10 @@ + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + +- states = <3300000 0 +- 1800000 1>; ++ states = <3300000 0>, ++ <1800000 1>; ++ /* U12/U13 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; + }; + + vcc1v8: regulator-vcc1v8 { +@@ -86,6 +115,9 @@ + regulator-name = "VCC1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U18 RT9179GB */ ++ vin-supply = <&vddio_ao3v3>; + }; + + vcc3v3: regulator-vcc3v3 { +@@ -95,6 +127,36 @@ + regulator-max-microvolt = <3300000>; + }; + ++ vddio_ao1v8: regulator-vddio-ao1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ /* U17 RT9179GB */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ vddio_ao3v3: regulator-vddio-ao3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ /* U11 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ ++ ddr3_1v5: regulator-ddr3_1v5 { ++ compatible = "regulator-fixed"; ++ regulator-name = "DDR3_1V5"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ /* U15 MP2161GJ-C499 */ ++ vin-supply = <&p5v0>; ++ }; ++ + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; +@@ -126,10 +188,6 @@ + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + +- snps,reset-gpio = <&gpio GPIOZ_14 0>; +- snps,reset-delays-us = <0 10000 1000000>; +- snps,reset-active-low; +- + amlogic,tx-delay-ns = <2>; + + mdio { +@@ -140,10 +198,14 @@ + eth_phy0: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; +- eee-broken-1000t; + }; + }; + }; +@@ -167,6 +229,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_p5v0>; + }; + + &hdmi_tx_tmds_port { +@@ -187,7 +250,7 @@ + pinctrl-names = "default"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", + "USB HUB nRESET", "USB OTG Power En", + "J7 Header Pin2", "IR In", "J7 Header Pin4", +@@ -197,7 +260,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", + "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", +@@ -256,11 +319,14 @@ + + bus-width = <4>; + cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-ddr50; + max-frequency = <100000000>; + disable-wp; + +- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; +- cd-inverted; ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&tflash_vdd>; + vqmmc-supply = <&tf_io>; +@@ -274,7 +340,7 @@ + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; +- max-frequency = <100000000>; ++ max-frequency = <200000000>; + non-removable; + disable-wp; + cap-mmc-highspeed; +@@ -293,7 +359,7 @@ + }; + + &usb0_phy { +- status = "okay"; ++ status = "disabled"; + phy-supply = <&usb_otg_pwr>; + }; + +@@ -303,7 +369,7 @@ + }; + + &usb0 { +- status = "okay"; ++ status = "disabled"; + }; + + &usb1 { +diff --git a/arch/arm/dts/meson-gxbb-p200.dts b/arch/arm/dts/meson-gxbb-p200.dts +index 9d2406a7c4..3c93d1898b 100644 +--- a/arch/arm/dts/meson-gxbb-p200.dts ++++ b/arch/arm/dts/meson-gxbb-p200.dts +@@ -68,10 +68,6 @@ + + amlogic,tx-delay-ns = <2>; + +- snps,reset-gpio = <&gpio GPIOZ_14 0>; +- snps,reset-delays-us = <0 10000 1000000>; +- snps,reset-active-low; +- + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; +@@ -80,6 +76,11 @@ + eth_phy0: ethernet-phy@3 { + /* Micrel KSZ9031 (0x00221620) */ + reg = <3>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; +diff --git a/arch/arm/dts/meson-gxbb-p201.dts b/arch/arm/dts/meson-gxbb-p201.dts +index 56e0dd1ff5..150a82f3b2 100644 +--- a/arch/arm/dts/meson-gxbb-p201.dts ++++ b/arch/arm/dts/meson-gxbb-p201.dts +@@ -21,6 +21,6 @@ + phy-mode = "rmii"; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; +- snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-delays-us = <0>, <10000>, <1000000>; + snps,reset-active-low; + }; +diff --git a/arch/arm/dts/meson-gxbb-p20x.dtsi b/arch/arm/dts/meson-gxbb-p20x.dtsi +index 0be0f2a5d2..e803a466fe 100644 +--- a/arch/arm/dts/meson-gxbb-p20x.dtsi ++++ b/arch/arm/dts/meson-gxbb-p20x.dtsi +@@ -46,8 +46,8 @@ + gpios-states = <1>; + + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ +- states = <1800000 0 +- 3300000 1>; ++ states = <1800000 0>, ++ <3300000 1>; + + regulator-settling-time-up-us = <10000>; + regulator-settling-time-down-us = <150000>; +@@ -165,11 +165,14 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; +diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi +index 1ade7e4868..0cb40326b0 100644 +--- a/arch/arm/dts/meson-gxbb.dtsi ++++ b/arch/arm/dts/meson-gxbb.dtsi +@@ -81,6 +81,7 @@ + mux { + groups = "uart_tx_ao_a", "uart_rx_ao_a"; + function = "uart_ao"; ++ bias-disable; + }; + }; + +@@ -89,6 +90,7 @@ + groups = "uart_cts_ao_a", + "uart_rts_ao_a"; + function = "uart_ao"; ++ bias-disable; + }; + }; + +@@ -96,6 +98,7 @@ + mux { + groups = "uart_tx_ao_b", "uart_rx_ao_b"; + function = "uart_ao_b"; ++ bias-disable; + }; + }; + +@@ -104,6 +107,7 @@ + groups = "uart_cts_ao_b", + "uart_rts_ao_b"; + function = "uart_ao_b"; ++ bias-disable; + }; + }; + +@@ -111,6 +115,7 @@ + mux { + groups = "remote_input_ao"; + function = "remote_input_ao"; ++ bias-disable; + }; + }; + +@@ -119,6 +124,7 @@ + groups = "i2c_sck_ao", + "i2c_sda_ao"; + function = "i2c_ao"; ++ bias-disable; + }; + }; + +@@ -126,6 +132,7 @@ + mux { + groups = "pwm_ao_a_3"; + function = "pwm_ao_a_3"; ++ bias-disable; + }; + }; + +@@ -133,6 +140,7 @@ + mux { + groups = "pwm_ao_a_6"; + function = "pwm_ao_a_6"; ++ bias-disable; + }; + }; + +@@ -140,6 +148,7 @@ + mux { + groups = "pwm_ao_a_12"; + function = "pwm_ao_a_12"; ++ bias-disable; + }; + }; + +@@ -147,6 +156,7 @@ + mux { + groups = "pwm_ao_b"; + function = "pwm_ao_b"; ++ bias-disable; + }; + }; + +@@ -154,6 +164,7 @@ + mux { + groups = "i2s_am_clk"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -161,6 +172,7 @@ + mux { + groups = "i2s_out_ao_clk"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -168,6 +180,7 @@ + mux { + groups = "i2s_out_lr_clk"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -175,6 +188,7 @@ + mux { + groups = "i2s_out_ch01_ao"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -182,6 +196,7 @@ + mux { + groups = "i2s_out_ch23_ao"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -189,6 +204,7 @@ + mux { + groups = "i2s_out_ch45_ao"; + function = "i2s_out_ao"; ++ bias-disable; + }; + }; + +@@ -203,6 +219,7 @@ + mux { + groups = "spdif_out_ao_13"; + function = "spdif_out_ao"; ++ bias-disable; + }; + }; + +@@ -210,6 +227,7 @@ + mux { + groups = "ao_cec"; + function = "cec_ao"; ++ bias-disable; + }; + }; + +@@ -217,6 +235,7 @@ + mux { + groups = "ee_cec"; + function = "cec_ao"; ++ bias-disable; + }; + }; + }; +@@ -280,6 +299,12 @@ + + &clkc_AO { + compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; ++ clocks = <&xtal>, <&clkc CLKID_CLK81>; ++ clock-names = "xtal", "mpeg-clk"; ++}; ++ ++&efuse { ++ clocks = <&clkc CLKID_EFUSE>; + }; + + ðmac { +@@ -311,6 +336,8 @@ + clkc: clock-controller { + compatible = "amlogic,gxbb-clkc"; + #clock-cells = <1>; ++ clocks = <&xtal>; ++ clock-names = "xtal"; + }; + }; + +@@ -354,11 +381,17 @@ + }; + + emmc_pins: emmc { +- mux { ++ mux-0 { + groups = "emmc_nand_d07", +- "emmc_cmd", +- "emmc_clk"; ++ "emmc_cmd"; + function = "emmc"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "emmc_clk"; ++ function = "emmc"; ++ bias-disable; + }; + }; + +@@ -366,6 +399,7 @@ + mux { + groups = "emmc_ds"; + function = "emmc"; ++ bias-pull-down; + }; + }; + +@@ -373,9 +407,6 @@ + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; +- }; +- cfg-pull-down { +- pins = "BOOT_8"; + bias-pull-down; + }; + }; +@@ -387,6 +418,7 @@ + "nor_c", + "nor_cs"; + function = "nor"; ++ bias-disable; + }; + }; + +@@ -396,6 +428,7 @@ + "spi_mosi", + "spi_sclk"; + function = "spi"; ++ bias-disable; + }; + }; + +@@ -403,18 +436,25 @@ + mux { + groups = "spi_ss0"; + function = "spi"; ++ bias-disable; + }; + }; + + sdcard_pins: sdcard { +- mux { ++ mux-0 { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", +- "sdcard_cmd", +- "sdcard_clk"; ++ "sdcard_cmd"; ++ function = "sdcard"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "sdcard_clk"; + function = "sdcard"; ++ bias-disable; + }; + }; + +@@ -422,22 +462,25 @@ + mux { + groups = "CARD_2"; + function = "gpio_periphs"; +- }; +- cfg-pull-down { +- pins = "CARD_2"; + bias-pull-down; + }; + }; + + sdio_pins: sdio { +- mux { ++ mux-0 { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", +- "sdio_cmd", +- "sdio_clk"; ++ "sdio_cmd"; ++ function = "sdio"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "sdio_clk"; + function = "sdio"; ++ bias-disable; + }; + }; + +@@ -445,9 +488,6 @@ + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; +- }; +- cfg-pull-down { +- pins = "GPIOX_4"; + bias-pull-down; + }; + }; +@@ -456,6 +496,7 @@ + mux { + groups = "sdio_irq"; + function = "sdio"; ++ bias-disable; + }; + }; + +@@ -464,6 +505,7 @@ + groups = "uart_tx_a", + "uart_rx_a"; + function = "uart_a"; ++ bias-disable; + }; + }; + +@@ -472,6 +514,7 @@ + groups = "uart_cts_a", + "uart_rts_a"; + function = "uart_a"; ++ bias-disable; + }; + }; + +@@ -480,6 +523,7 @@ + groups = "uart_tx_b", + "uart_rx_b"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -488,6 +532,7 @@ + groups = "uart_cts_b", + "uart_rts_b"; + function = "uart_b"; ++ bias-disable; + }; + }; + +@@ -496,6 +541,7 @@ + groups = "uart_tx_c", + "uart_rx_c"; + function = "uart_c"; ++ bias-disable; + }; + }; + +@@ -504,6 +550,7 @@ + groups = "uart_cts_c", + "uart_rts_c"; + function = "uart_c"; ++ bias-disable; + }; + }; + +@@ -512,6 +559,7 @@ + groups = "i2c_sck_a", + "i2c_sda_a"; + function = "i2c_a"; ++ bias-disable; + }; + }; + +@@ -520,6 +568,7 @@ + groups = "i2c_sck_b", + "i2c_sda_b"; + function = "i2c_b"; ++ bias-disable; + }; + }; + +@@ -528,6 +577,7 @@ + groups = "i2c_sck_c", + "i2c_sda_c"; + function = "i2c_c"; ++ bias-disable; + }; + }; + +@@ -548,6 +598,7 @@ + "eth_txd2", + "eth_txd3"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -563,6 +614,7 @@ + "eth_txd0", + "eth_txd1"; + function = "eth"; ++ bias-disable; + }; + }; + +@@ -570,6 +622,7 @@ + mux { + groups = "pwm_a_x"; + function = "pwm_a_x"; ++ bias-disable; + }; + }; + +@@ -577,6 +630,7 @@ + mux { + groups = "pwm_a_y"; + function = "pwm_a_y"; ++ bias-disable; + }; + }; + +@@ -584,6 +638,7 @@ + mux { + groups = "pwm_b"; + function = "pwm_b"; ++ bias-disable; + }; + }; + +@@ -591,6 +646,7 @@ + mux { + groups = "pwm_d"; + function = "pwm_d"; ++ bias-disable; + }; + }; + +@@ -598,6 +654,7 @@ + mux { + groups = "pwm_e"; + function = "pwm_e"; ++ bias-disable; + }; + }; + +@@ -605,6 +662,7 @@ + mux { + groups = "pwm_f_x"; + function = "pwm_f_x"; ++ bias-disable; + }; + }; + +@@ -612,6 +670,7 @@ + mux { + groups = "pwm_f_y"; + function = "pwm_f_y"; ++ bias-disable; + }; + }; + +@@ -619,6 +678,7 @@ + mux { + groups = "hdmi_hpd"; + function = "hdmi_hpd"; ++ bias-disable; + }; + }; + +@@ -626,6 +686,7 @@ + mux { + groups = "hdmi_sda", "hdmi_scl"; + function = "hdmi_i2c"; ++ bias-disable; + }; + }; + +@@ -633,6 +694,7 @@ + mux { + groups = "i2sout_ch23_y"; + function = "i2s_out"; ++ bias-disable; + }; + }; + +@@ -640,6 +702,7 @@ + mux { + groups = "i2sout_ch45_y"; + function = "i2s_out"; ++ bias-disable; + }; + }; + +@@ -647,6 +710,7 @@ + mux { + groups = "i2sout_ch67_y"; + function = "i2s_out"; ++ bias-disable; + }; + }; + +@@ -654,6 +718,7 @@ + mux { + groups = "spdif_out_y"; + function = "spdif_out"; ++ bias-disable; + }; + }; + }; +@@ -734,6 +799,12 @@ + resets = <&reset RESET_SD_EMMC_C>; + }; + ++&simplefb_hdmi { ++ clocks = <&clkc CLKID_HDMI_PCLK>, ++ <&clkc CLKID_CLK81>, ++ <&clkc CLKID_GCLK_VENCI_INT0>; ++}; ++ + &spicc { + clocks = <&clkc CLKID_SPICC>; + clock-names = "core"; +@@ -774,3 +845,14 @@ + compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; + power-domains = <&pwrc_vpu>; + }; ++ ++&vdec { ++ compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec"; ++ clocks = <&clkc CLKID_DOS_PARSER>, ++ <&clkc CLKID_DOS>, ++ <&clkc CLKID_VDEC_1>, ++ <&clkc CLKID_VDEC_HEVC>; ++ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; ++ resets = <&reset RESET_PARSER>; ++ reset-names = "esparser"; ++}; +diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +index 82b1c48511..4d59494965 100644 +--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts ++++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +@@ -14,7 +14,7 @@ + / { + compatible = "libretech,aml-s805x-ac", "amlogic,s805x", + "amlogic,meson-gxl"; +- model = "Libre Computer Board AML-S805X-AC"; ++ model = "Libre Computer AML-S805X-AC"; + + aliases { + serial0 = &uart_AO; +diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +index ceb34afe42..440bc23c73 100644 +--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +@@ -33,11 +33,9 @@ + + gpio-keys-polled { + compatible = "gpio-keys-polled"; +- #address-cells = <1>; +- #size-cells = <0>; + poll-interval = <100>; + +- button@0 { ++ power-button { + label = "power"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; +@@ -110,10 +108,10 @@ + }; + + &ir { +- linux,rc-map-name = "rc-geekbox"; ++ linux,rc-map-name = "rc-khadas"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", + "UART RX", + "Power Key In", +@@ -128,7 +126,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", +@@ -188,6 +186,16 @@ + }; + }; + ++&uart_A { ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ max-speed = <2000000>; ++ clocks = <&wifi32k>; ++ clock-names = "lpo"; ++ }; ++}; ++ + /* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ + &uart_AO { + status = "okay"; +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +index a23252efc6..e8348b2728 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +@@ -12,8 +12,9 @@ + #include "meson-gxl-s905x.dtsi" + + / { +- compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl"; +- model = "Libre Computer Board AML-S905X-CC"; ++ compatible = "libretech,aml-s905x-cc", "amlogic,s905x", ++ "amlogic,meson-gxl"; ++ model = "Libre Computer AML-S905X-CC"; + + aliases { + serial0 = &uart_AO; +@@ -115,11 +116,13 @@ + regulator-max-microvolt = <1800000>; + }; + ++ /* This is provided by LDOs on the eMMC daugther card */ + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; + }; + }; + +@@ -164,7 +167,7 @@ + }; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", + "UART RX", + "Blue LED", +@@ -179,7 +182,7 @@ + "7J1 Header Pin15"; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", +@@ -235,11 +238,10 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + disable-wp; + +- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; +- cd-inverted; ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_card>; +@@ -254,9 +256,9 @@ + + bus-width = <8>; + cap-mmc-highspeed; +- mmc-ddr-3_3v; +- max-frequency = <50000000>; +- non-removable; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; +diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +index a1b31013ab..43eb7d149e 100644 +--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +@@ -114,11 +114,14 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; +@@ -134,11 +137,10 @@ + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + disable-wp; + +- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; +- cd-inverted; ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi +index d5c3d78aaf..259d863993 100644 +--- a/arch/arm/dts/meson-gxl.dtsi ++++ b/arch/arm/dts/meson-gxl.dtsi +@@ -36,6 +36,16 @@ + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>; + }; + }; ++ ++ crypto: crypto@c883e000 { ++ compatible = "amlogic,gxl-crypto"; ++ reg = <0x0 0xc883e000 0x0 0x36>; ++ interrupts = , ++ ; ++ clocks = <&clkc CLKID_BLKMV>; ++ clock-names = "blkmv"; ++ status = "okay"; ++ }; + }; + }; + +@@ -80,9 +90,6 @@ + }; + + ðmac { +- reg = <0x0 0xc9410000 0x0 0x10000 +- 0x0 0xc8834540 0x0 0x4>; +- + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; +@@ -326,10 +333,15 @@ + }; + + emmc_pins: emmc { +- mux { ++ mux-0 { + groups = "emmc_nand_d07", +- "emmc_cmd", +- "emmc_clk"; ++ "emmc_cmd"; ++ function = "emmc"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "emmc_clk"; + function = "emmc"; + bias-disable; + }; +@@ -339,7 +351,7 @@ + mux { + groups = "emmc_ds"; + function = "emmc"; +- bias-disable; ++ bias-pull-down; + }; + }; + +@@ -381,13 +393,18 @@ + }; + + sdcard_pins: sdcard { +- mux { ++ mux-0 { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", +- "sdcard_cmd", +- "sdcard_clk"; ++ "sdcard_cmd"; ++ function = "sdcard"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "sdcard_clk"; + function = "sdcard"; + bias-disable; + }; +@@ -402,13 +419,18 @@ + }; + + sdio_pins: sdio { +- mux { ++ mux-0 { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", +- "sdio_cmd", +- "sdio_clk"; ++ "sdio_cmd"; ++ function = "sdio"; ++ bias-pull-up; ++ }; ++ ++ mux-1 { ++ groups = "sdio_clk"; + function = "sdio"; + bias-disable; + }; +@@ -511,6 +533,15 @@ + }; + }; + ++ i2c_c_dv18_pins: i2c_c_dv18 { ++ mux { ++ groups = "i2c_sck_c_dv19", ++ "i2c_sda_c_dv18"; ++ function = "i2c_c"; ++ bias-disable; ++ }; ++ }; ++ + eth_pins: eth_c { + mux { + groups = "eth_mdio", +@@ -697,7 +728,7 @@ + #size-cells = <0>; + + internal_phy: ethernet-phy@8 { +- compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22"; ++ compatible = "ethernet-phy-id0181.4400"; + interrupts = ; + reg = <8>; + max-speed = <100>; +@@ -787,6 +818,12 @@ + resets = <&reset RESET_SD_EMMC_C>; + }; + ++&simplefb_hdmi { ++ clocks = <&clkc CLKID_HDMI_PCLK>, ++ <&clkc CLKID_CLK81>, ++ <&clkc CLKID_GCLK_VENCI_INT0>; ++}; ++ + &spicc { + clocks = <&clkc CLKID_SPICC>; + clock-names = "core"; +@@ -827,3 +864,14 @@ + compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; + power-domains = <&pwrc_vpu>; + }; ++ ++&vdec { ++ compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec"; ++ clocks = <&clkc CLKID_DOS_PARSER>, ++ <&clkc CLKID_DOS>, ++ <&clkc CLKID_VDEC_1>, ++ <&clkc CLKID_VDEC_HEVC>; ++ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; ++ resets = <&reset RESET_PARSER>; ++ reset-names = "esparser"; ++}; +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts +index 782e9edac8..f82f25c1a5 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts ++++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts +@@ -18,7 +18,6 @@ + + aliases { + serial0 = &uart_AO; +- serial1 = &uart_A; + serial2 = &uart_AO_B; + }; + +@@ -63,11 +62,9 @@ + + gpio-keys-polled { + compatible = "gpio-keys-polled"; +- #address-cells = <1>; +- #size-cells = <0>; + poll-interval = <100>; + +- button@0 { ++ power-button { + label = "power"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; +@@ -132,19 +129,15 @@ + + map1 { + trip = <&cpu_alert1>; +- cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>; +- }; +- +- map2 { +- trip = <&cpu_alert1>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +- }; +- +- map3 { +- trip = <&cpu_alert1>; +- cooling-device = +- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>, ++ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +@@ -246,11 +239,6 @@ + + amlogic,tx-delay-ns = <2>; + +- /* External PHY reset is shared with internal PHY Led signals */ +- snps,reset-gpio = <&gpio GPIOZ_14 0>; +- snps,reset-delays-us = <0 10000 1000000>; +- snps,reset-active-low; +- + /* External PHY is in RGMII */ + phy-mode = "rgmii"; + +@@ -261,6 +249,11 @@ + external_phy: ethernet-phy@0 { + /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ + interrupt-parent = <&gpio_intc>; + /* MAC_INTR on GPIOZ_15 */ + interrupts = <25 IRQ_TYPE_LEVEL_LOW>; +@@ -306,7 +299,7 @@ + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +- linux,rc-map-name = "rc-geekbox"; ++ linux,rc-map-name = "rc-khadas"; + }; + + &pwm_AO_ab { +@@ -328,16 +321,20 @@ + &sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; +- pinctrl-names = "default"; ++ pinctrl-1 = <&sdio_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; +@@ -353,15 +350,15 @@ + &sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; +- pinctrl-names = "default"; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; +- max-frequency = <100000000>; ++ max-frequency = <50000000>; + disable-wp; + +- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; +- cd-inverted; ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +@@ -371,17 +368,16 @@ + &sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; +- pinctrl-names = "default"; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; +- cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; +- mmc-hs400-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; +@@ -409,8 +405,17 @@ + /* This one is connected to the Bluetooth module */ + &uart_A { + status = "okay"; +- pinctrl-0 = <&uart_a_pins>; ++ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; ++ uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ max-speed = <2000000>; ++ clocks = <&wifi32k>; ++ clock-names = "lpo"; ++ }; + }; + + /* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ +diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi +index 247888d68a..5ff64a0d2d 100644 +--- a/arch/arm/dts/meson-gxm.dtsi ++++ b/arch/arm/dts/meson-gxm.dtsi +@@ -44,7 +44,7 @@ + + cpu4: cpu@100 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -53,7 +53,7 @@ + + cpu5: cpu@101 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -62,7 +62,7 @@ + + cpu6: cpu@102 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x102>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -71,7 +71,7 @@ + + cpu7: cpu@103 { + device_type = "cpu"; +- compatible = "arm,cortex-a53", "arm,armv8"; ++ compatible = "arm,cortex-a53"; + reg = <0x0 0x103>; + enable-method = "psci"; + next-level-cache = <&l2>; +@@ -91,6 +91,33 @@ + reset-names = "phy"; + status = "okay"; + }; ++ ++ mali: gpu@c0000 { ++ compatible = "amlogic,meson-gxm-mali", "arm,mali-t820"; ++ reg = <0x0 0xc0000 0x0 0x40000>; ++ interrupt-parent = <&gic>; ++ interrupts = , ++ , ++ ; ++ interrupt-names = "job", "mmu", "gpu"; ++ clocks = <&clkc CLKID_MALI>; ++ resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; ++ ++ /* ++ * Mali clocking is provided by two identical clock paths ++ * MALI_0 and MALI_1 muxed to a single clock by a glitch ++ * free mux to safely change frequency while running. ++ */ ++ assigned-clocks = <&clkc CLKID_MALI_0_SEL>, ++ <&clkc CLKID_MALI_0>, ++ <&clkc CLKID_MALI>; /* Glitch free mux */ ++ assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_MALI_0>; ++ assigned-clock-rates = <0>, /* Do Nothing */ ++ <666666666>, ++ <0>; /* Do Nothing */ ++ }; + }; + + &clkc_AO { +@@ -117,3 +144,7 @@ + &dwc3 { + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; + }; ++ ++&vdec { ++ compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec"; ++}; +diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi +index 8647da7d66..90815fa25e 100644 +--- a/arch/arm/dts/meson-khadas-vim3.dtsi ++++ b/arch/arm/dts/meson-khadas-vim3.dtsi +@@ -246,6 +246,10 @@ + linux,rc-map-name = "rc-khadas"; + }; + ++&pcie { ++ reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>; ++}; ++ + &pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; +@@ -274,6 +278,9 @@ + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vsys_3v3>; +diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts +index 3435aaa4e8..a8bb3fa9fe 100644 +--- a/arch/arm/dts/meson-sm1-sei610.dts ++++ b/arch/arm/dts/meson-sm1-sei610.dts +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + / { + compatible = "seirobotics,sei610", "amlogic,sm1"; +@@ -19,6 +20,22 @@ + ethernet0 = ðmac; + }; + ++ mono_dac: audio-codec-0 { ++ compatible = "maxim,max98357a"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "U16"; ++ sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ dmics: audio-codec-1 { ++ #sound-dai-cells = <0>; ++ compatible = "dmic-codec"; ++ num-channels = <2>; ++ wakeup-delay-ms = <50>; ++ status = "okay"; ++ sound-name-prefix = "MIC"; ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -29,25 +46,47 @@ + }; + + gpio-keys { +- compatible = "gpio-keys-polled"; +- poll-interval = <100>; ++ compatible = "gpio-keys"; + + key1 { + label = "A"; + linux,code = ; + gpios = <&gpio GPIOH_6 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <34 IRQ_TYPE_EDGE_BOTH>; + }; + + key2 { + label = "B"; + linux,code = ; + gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <35 IRQ_TYPE_EDGE_BOTH>; + }; + + key3 { + label = "C"; + linux,code = ; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <2 IRQ_TYPE_EDGE_BOTH>; ++ }; ++ ++ mic_mute { ++ label = "MicMute"; ++ linux,code = ; ++ linux,input-type = ; ++ gpios = <&gpio_ao GPIOE_2 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <99 IRQ_TYPE_EDGE_BOTH>; ++ }; ++ ++ power_key { ++ label = "PowerKey"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <3 IRQ_TYPE_EDGE_BOTH>; + }; + }; + +@@ -179,6 +218,120 @@ + clock-names = "ext_clock"; + }; + ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "SM1-SEI610"; ++ audio-aux-devs = <&tdmout_a>, <&tdmout_b>, ++ <&tdmin_a>, <&tdmin_b>; ++ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", ++ "TDMOUT_A IN 1", "FRDDR_B OUT 0", ++ "TDMOUT_A IN 2", "FRDDR_C OUT 0", ++ "TDM_A Playback", "TDMOUT_A OUT", ++ "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT", ++ "TODDR_A IN 4", "PDM Capture", ++ "TODDR_B IN 4", "PDM Capture", ++ "TODDR_C IN 4", "PDM Capture", ++ "TDMIN_A IN 0", "TDM_A Capture", ++ "TDMIN_A IN 3", "TDM_A Loopback", ++ "TDMIN_B IN 0", "TDM_A Capture", ++ "TDMIN_B IN 3", "TDM_A Loopback", ++ "TDMIN_A IN 1", "TDM_B Capture", ++ "TDMIN_A IN 4", "TDM_B Loopback", ++ "TDMIN_B IN 1", "TDM_B Capture", ++ "TDMIN_B IN 4", "TDM_B Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT", ++ "TODDR_A IN 1", "TDMIN_B OUT", ++ "TODDR_B IN 1", "TDMIN_B OUT", ++ "TODDR_C IN 1", "TDMIN_B OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&toddr_a>; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&toddr_b>; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&toddr_c>; ++ }; ++ ++ /* internal speaker interface */ ++ dai-link-6 { ++ sound-dai = <&tdmif_a>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&mono_dac>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; ++ }; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-7 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ }; ++ ++ /* internal digital mics */ ++ dai-link-8 { ++ sound-dai = <&pdm>; ++ ++ codec { ++ sound-dai = <&dmics>; ++ }; ++ }; ++ ++ /* hdmi glue */ ++ dai-link-9 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; +@@ -187,6 +340,10 @@ + }; + }; + ++&arb { ++ status = "okay"; ++}; ++ + &cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; +@@ -201,6 +358,10 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&clkc_audio { ++ status = "okay"; ++}; ++ + &cpu0 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; +@@ -235,6 +396,18 @@ + phy-mode = "rmii"; + }; + ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; +@@ -259,6 +432,12 @@ + pinctrl-names = "default"; + }; + ++&pdm { ++ pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_dclk_z_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ + &pwm_AO_ab { + status = "okay"; + pinctrl-0 = <&pwm_ao_a_pins>; +@@ -305,6 +484,9 @@ + non-removable; + disable-wp; + ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; +@@ -353,6 +535,54 @@ + vqmmc-supply = <&emmc_1v8>; + }; + ++&tdmif_a { ++ pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>, ++ <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>; ++ assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_A_LRCLK>; ++ assigned-clock-rates = <0>, <0>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmin_a { ++ status = "okay"; ++}; ++ ++&tdmin_b { ++ status = "okay"; ++}; ++ ++&tdmout_a { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&toddr_a { ++ status = "okay"; ++}; ++ ++&toddr_b { ++ status = "okay"; ++}; ++ ++&toddr_c { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ + &uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; +@@ -361,6 +591,8 @@ + + bluetooth { + compatible = "brcm,bcm43438-bt"; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; +diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi +index 521573f3a5..d847a3fcbc 100644 +--- a/arch/arm/dts/meson-sm1.dtsi ++++ b/arch/arm/dts/meson-sm1.dtsi +@@ -5,11 +5,47 @@ + */ + + #include "meson-g12-common.dtsi" ++#include + #include ++#include ++#include + + / { + compatible = "amlogic,sm1"; + ++ tdmif_a: audio-controller-0 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_A"; ++ clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_A_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_A_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++ ++ tdmif_b: audio-controller-1 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_B"; ++ clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_B_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_B_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++ ++ tdmif_c: audio-controller-2 { ++ compatible = "amlogic,axg-tdm-iface"; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TDM_C"; ++ clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>, ++ <&clkc_audio AUD_CLKID_MST_C_SCLK>, ++ <&clkc_audio AUD_CLKID_MST_C_LRCLK>; ++ clock-names = "mclk", "sclk", "lrclk"; ++ status = "disabled"; ++ }; ++ + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; +@@ -117,6 +153,305 @@ + }; + }; + ++&apb { ++ audio: bus@60000 { ++ compatible = "simple-bus"; ++ reg = <0x0 0x60000 0x0 0x1000>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>; ++ ++ clkc_audio: clock-controller@0 { ++ status = "disabled"; ++ compatible = "amlogic,sm1-audio-clkc"; ++ reg = <0x0 0x0 0x0 0xb4>; ++ #clock-cells = <1>; ++ #reset-cells = <1>; ++ ++ clocks = <&clkc CLKID_AUDIO>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL3>, ++ <&clkc CLKID_HIFI_PLL>, ++ <&clkc CLKID_FCLK_DIV3>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <&clkc CLKID_FCLK_DIV5>; ++ clock-names = "pclk", ++ "mst_in0", ++ "mst_in1", ++ "mst_in2", ++ "mst_in3", ++ "mst_in4", ++ "mst_in5", ++ "mst_in6", ++ "mst_in7"; ++ ++ resets = <&reset RESET_AUDIO>; ++ }; ++ ++ toddr_a: audio-controller@100 { ++ compatible = "amlogic,sm1-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x100 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_A"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_A>; ++ resets = <&arb AXG_ARB_TODDR_A>, ++ <&clkc_audio AUD_RESET_TODDR_A>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <8192>; ++ status = "disabled"; ++ }; ++ ++ toddr_b: audio-controller@140 { ++ compatible = "amlogic,sm1-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x140 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_B"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_B>; ++ resets = <&arb AXG_ARB_TODDR_B>, ++ <&clkc_audio AUD_RESET_TODDR_B>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ toddr_c: audio-controller@180 { ++ compatible = "amlogic,sm1-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x180 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_C"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_C>; ++ resets = <&arb AXG_ARB_TODDR_C>, ++ <&clkc_audio AUD_RESET_TODDR_C>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ frddr_a: audio-controller@1c0 { ++ compatible = "amlogic,sm1-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x1c0 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_A"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; ++ resets = <&arb AXG_ARB_FRDDR_A>, ++ <&clkc_audio AUD_RESET_FRDDR_A>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <512>; ++ status = "disabled"; ++ }; ++ ++ frddr_b: audio-controller@200 { ++ compatible = "amlogic,sm1-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x200 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_B"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; ++ resets = <&arb AXG_ARB_FRDDR_B>, ++ <&clkc_audio AUD_RESET_FRDDR_B>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ frddr_c: audio-controller@240 { ++ compatible = "amlogic,sm1-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x240 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_C"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; ++ resets = <&arb AXG_ARB_FRDDR_C>, ++ <&clkc_audio AUD_RESET_FRDDR_C>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ arb: reset-controller@280 { ++ status = "disabled"; ++ compatible = "amlogic,meson-sm1-audio-arb"; ++ reg = <0x0 0x280 0x0 0x4>; ++ #reset-cells = <1>; ++ clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; ++ }; ++ ++ tdmin_a: audio-controller@300 { ++ compatible = "amlogic,sm1-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x300 0x0 0x40>; ++ sound-name-prefix = "TDMIN_A"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_A>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_b: audio-controller@340 { ++ compatible = "amlogic,sm1-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x340 0x0 0x40>; ++ sound-name-prefix = "TDMIN_B"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_B>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_c: audio-controller@380 { ++ compatible = "amlogic,sm1-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x380 0x0 0x40>; ++ sound-name-prefix = "TDMIN_C"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_C>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmin_lb: audio-controller@3c0 { ++ compatible = "amlogic,sm1-tdmin", ++ "amlogic,axg-tdmin"; ++ reg = <0x0 0x3c0 0x0 0x40>; ++ sound-name-prefix = "TDMIN_LB"; ++ resets = <&clkc_audio AUD_RESET_TDMIN_LB>; ++ clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmout_a: audio-controller@500 { ++ compatible = "amlogic,sm1-tdmout"; ++ reg = <0x0 0x500 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_A"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_A>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmout_b: audio-controller@540 { ++ compatible = "amlogic,sm1-tdmout"; ++ reg = <0x0 0x540 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_B"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_B>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tdmout_c: audio-controller@580 { ++ compatible = "amlogic,sm1-tdmout"; ++ reg = <0x0 0x580 0x0 0x40>; ++ sound-name-prefix = "TDMOUT_C"; ++ resets = <&clkc_audio AUD_RESET_TDMOUT_C>; ++ clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, ++ <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; ++ clock-names = "pclk", "sclk", "sclk_sel", ++ "lrclk", "lrclk_sel"; ++ status = "disabled"; ++ }; ++ ++ tohdmitx: audio-controller@744 { ++ compatible = "amlogic,sm1-tohdmitx", ++ "amlogic,g12a-tohdmitx"; ++ reg = <0x0 0x744 0x0 0x4>; ++ #sound-dai-cells = <1>; ++ sound-name-prefix = "TOHDMITX"; ++ resets = <&clkc_audio AUD_RESET_TOHDMITX>; ++ status = "disabled"; ++ }; ++ ++ toddr_d: audio-controller@840 { ++ compatible = "amlogic,sm1-toddr", ++ "amlogic,axg-toddr"; ++ reg = <0x0 0x840 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "TODDR_D"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_TODDR_D>; ++ resets = <&arb AXG_ARB_TODDR_D>, ++ <&clkc_audio AUD_RESET_TODDR_D>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ ++ frddr_d: audio-controller@880 { ++ compatible = "amlogic,sm1-frddr", ++ "amlogic,axg-frddr"; ++ reg = <0x0 0x880 0x0 0x2c>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "FRDDR_D"; ++ interrupts = ; ++ clocks = <&clkc_audio AUD_CLKID_FRDDR_D>; ++ resets = <&arb AXG_ARB_FRDDR_D>, ++ <&clkc_audio AUD_RESET_FRDDR_D>; ++ reset-names = "arb", "rst"; ++ amlogic,fifo-depth = <256>; ++ status = "disabled"; ++ }; ++ }; ++ ++ pdm: audio-controller@61000 { ++ compatible = "amlogic,sm1-pdm", ++ "amlogic,axg-pdm"; ++ reg = <0x0 0x61000 0x0 0x34>; ++ #sound-dai-cells = <0>; ++ sound-name-prefix = "PDM"; ++ clocks = <&clkc_audio AUD_CLKID_PDM>, ++ <&clkc_audio AUD_CLKID_PDM_DCLK>, ++ <&clkc_audio AUD_CLKID_PDM_SYSCLK>; ++ clock-names = "pclk", "dclk", "sysclk"; ++ status = "disabled"; ++ }; ++}; ++ + &cecb_AO { + compatible = "amlogic,meson-sm1-ao-cec"; + }; +@@ -134,10 +469,31 @@ + power-domains = <&pwrc PWRC_SM1_ETH_ID>; + }; + ++&gpio_intc { ++ compatible = "amlogic,meson-sm1-gpio-intc", ++ "amlogic,meson-gpio-intc"; ++}; ++ ++&pcie { ++ power-domains = <&pwrc PWRC_SM1_PCIE_ID>; ++}; ++ + &pwrc { + compatible = "amlogic,meson-sm1-pwrc"; + }; + ++&simplefb_cvbs { ++ power-domains = <&pwrc PWRC_SM1_VPU_ID>; ++}; ++ ++&simplefb_hdmi { ++ power-domains = <&pwrc PWRC_SM1_VPU_ID>; ++}; ++ ++&vdec { ++ compatible = "amlogic,sm1-vdec"; ++}; ++ + &vpu { + power-domains = <&pwrc PWRC_SM1_VPU_ID>; + }; +diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h +index 75901c6368..f561f5c5ef 100644 +--- a/include/dt-bindings/clock/axg-audio-clkc.h ++++ b/include/dt-bindings/clock/axg-audio-clkc.h +@@ -80,5 +80,15 @@ + #define AUD_CLKID_TDM_SCLK_PAD0 160 + #define AUD_CLKID_TDM_SCLK_PAD1 161 + #define AUD_CLKID_TDM_SCLK_PAD2 162 ++#define AUD_CLKID_TOP 163 ++#define AUD_CLKID_TORAM 164 ++#define AUD_CLKID_EQDRC 165 ++#define AUD_CLKID_RESAMPLE_B 166 ++#define AUD_CLKID_TOVAD 167 ++#define AUD_CLKID_LOCKER 168 ++#define AUD_CLKID_SPDIFIN_LB 169 ++#define AUD_CLKID_FRDDR_D 170 ++#define AUD_CLKID_TODDR_D 171 ++#define AUD_CLKID_LOOPBACK_B 172 + + #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ +diff --git a/include/dt-bindings/clock/gxbb-aoclkc.h b/include/dt-bindings/clock/gxbb-aoclkc.h +index 9d15e2221f..ec3b26319f 100644 +--- a/include/dt-bindings/clock/gxbb-aoclkc.h ++++ b/include/dt-bindings/clock/gxbb-aoclkc.h +@@ -63,5 +63,12 @@ + #define CLKID_AO_UART2 4 + #define CLKID_AO_IR_BLASTER 5 + #define CLKID_AO_CEC_32K 6 ++#define CLKID_AO_CTS_OSCIN 7 ++#define CLKID_AO_32K_PRE 8 ++#define CLKID_AO_32K_DIV 9 ++#define CLKID_AO_32K_SEL 10 ++#define CLKID_AO_32K 11 ++#define CLKID_AO_CTS_RTC_OSCIN 12 ++#define CLKID_AO_CLK81 13 + + #endif +diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h +index 8ba99a5e3f..db0763e961 100644 +--- a/include/dt-bindings/clock/gxbb-clkc.h ++++ b/include/dt-bindings/clock/gxbb-clkc.h +@@ -125,5 +125,26 @@ + #define CLKID_VAPB_1 138 + #define CLKID_VAPB_SEL 139 + #define CLKID_VAPB 140 ++#define CLKID_VDEC_1 153 ++#define CLKID_VDEC_HEVC 156 ++#define CLKID_GEN_CLK 159 ++#define CLKID_VID_PLL 166 ++#define CLKID_VCLK 175 ++#define CLKID_VCLK2 176 ++#define CLKID_VCLK_DIV1 185 ++#define CLKID_VCLK_DIV2 186 ++#define CLKID_VCLK_DIV4 187 ++#define CLKID_VCLK_DIV6 188 ++#define CLKID_VCLK_DIV12 189 ++#define CLKID_VCLK2_DIV1 190 ++#define CLKID_VCLK2_DIV2 191 ++#define CLKID_VCLK2_DIV4 192 ++#define CLKID_VCLK2_DIV6 193 ++#define CLKID_VCLK2_DIV12 194 ++#define CLKID_CTS_ENCI 199 ++#define CLKID_CTS_ENCP 200 ++#define CLKID_CTS_VDAC 201 ++#define CLKID_HDMI_TX 202 ++#define CLKID_HDMI 205 + + #endif /* __GXBB_CLKC_H */ +diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h +index 43a68a1110..489c75b276 100644 +--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h ++++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h +@@ -1,15 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * GPIO definitions for Amlogic Meson GXBB SoCs + * + * Copyright (C) 2016 Endless Mobile, Inc. + * Author: Carlo Caione +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * version 2 as published by the Free Software Foundation. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program. If not, see . + */ + + #ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H +diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h +index 01f2a2abd3..0a001ae482 100644 +--- a/include/dt-bindings/gpio/meson-gxl-gpio.h ++++ b/include/dt-bindings/gpio/meson-gxl-gpio.h +@@ -1,15 +1,9 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ + /* + * GPIO definitions for Amlogic Meson GXL SoCs + * + * Copyright (C) 2016 Endless Mobile, Inc. + * Author: Carlo Caione +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * version 2 as published by the Free Software Foundation. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program. If not, see . + */ + + #ifndef _DT_BINDINGS_MESON_GXL_GPIO_H +diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h +index 05c3636787..1ef807856c 100644 +--- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h ++++ b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h +@@ -13,5 +13,7 @@ + #define AXG_ARB_FRDDR_A 3 + #define AXG_ARB_FRDDR_B 4 + #define AXG_ARB_FRDDR_C 5 ++#define AXG_ARB_TODDR_D 6 ++#define AXG_ARB_FRDDR_D 7 + + #endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */ +diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h +index ad6f55dabd..0f2e0fe45c 100644 +--- a/include/dt-bindings/reset/amlogic,meson-axg-reset.h ++++ b/include/dt-bindings/reset/amlogic,meson-axg-reset.h +@@ -1,12 +1,11 @@ ++/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ + /* +- * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong + * + * Copyright (c) 2017 Amlogic, inc. + * Author: Yixun Lan + * +- * SPDX-License-Identifier: (GPL-2.0+ OR BSD) + */ + + #ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H +diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h +index 14b78dabed..f805129ca7 100644 +--- a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h ++++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h +@@ -35,4 +35,19 @@ + #define AUD_RESET_TOHDMITX 24 + #define AUD_RESET_CLKTREE 25 + ++/* SM1 added resets */ ++#define AUD_RESET_RESAMPLE_B 26 ++#define AUD_RESET_TOVAD 27 ++#define AUD_RESET_LOCKER 28 ++#define AUD_RESET_SPDIFIN_LB 29 ++#define AUD_RESET_FRATV 30 ++#define AUD_RESET_FRHDMIRX 31 ++#define AUD_RESET_FRDDR_D 32 ++#define AUD_RESET_TODDR_D 33 ++#define AUD_RESET_LOOPBACK_B 34 ++#define AUD_RESET_EARCTX 35 ++#define AUD_RESET_EARCRX 36 ++#define AUD_RESET_FRDDR_E 37 ++#define AUD_RESET_TODDR_E 38 ++ + #endif +diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h +index 524d6077ac..ea50586188 100644 +--- a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h ++++ b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h +@@ -1,56 +1,7 @@ ++/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ + /* +- * This file is provided under a dual BSD/GPLv2 license. When using or +- * redistributing this file, you may do so under either license. +- * +- * GPL LICENSE SUMMARY +- * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of version 2 of the GNU General Public License as +- * published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, see . +- * The full GNU General Public License is included in this distribution +- * in the file called COPYING. +- * +- * BSD LICENSE +- * +- * Copyright (c) 2016 BayLibre, SAS. +- * Author: Neil Armstrong +- * +- * Redistribution and use in source and binary forms, with or without +- * modification, are permitted provided that the following conditions +- * are met: +- * +- * * Redistributions of source code must retain the above copyright +- * notice, this list of conditions and the following disclaimer. +- * * Redistributions in binary form must reproduce the above copyright +- * notice, this list of conditions and the following disclaimer in +- * the documentation and/or other materials provided with the +- * distribution. +- * * Neither the name of Intel Corporation nor the names of its +- * contributors may be used to endorse or promote products derived +- * from this software without specific prior written permission. +- * +- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H + #define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-arm64-dts-meson-import-libretech-pc-from-lin.patch b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-arm64-dts-meson-import-libretech-pc-from-lin.patch new file mode 100644 index 0000000000..c8717da1f9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0005-FROMGIT-arm64-dts-meson-import-libretech-pc-from-lin.patch @@ -0,0 +1,515 @@ +From 1b2f800496b58d8d98de6e805294f7def4716fc6 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:39 +0100 +Subject: [PATCH 05/33] FROMGIT: arm64: dts: meson: import libretech-pc from + linux v5.6-rc2 + +Sync the libretech-pc device tree from Linux v5.6-rc2 +11a48a5a18c6 ("Linux 5.6-rc2") + +Acked-by: Neil Armstrong +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-gx-libretech-pc.dtsi | 375 ++++++++++++++++++ + arch/arm/dts/meson-gxl-s905d-libretech-pc.dts | 16 + + arch/arm/dts/meson-gxl-s905d.dtsi | 12 + + arch/arm/dts/meson-gxm-s912-libretech-pc.dts | 62 +++ + 4 files changed, 465 insertions(+) + create mode 100644 arch/arm/dts/meson-gx-libretech-pc.dtsi + create mode 100644 arch/arm/dts/meson-gxl-s905d-libretech-pc.dts + create mode 100644 arch/arm/dts/meson-gxl-s905d.dtsi + create mode 100644 arch/arm/dts/meson-gxm-s912-libretech-pc.dts + +diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi +new file mode 100644 +index 0000000000..248b018c83 +--- /dev/null ++++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi +@@ -0,0 +1,375 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2019 BayLibre SAS. ++ * Author: Jerome Brunet ++ */ ++ ++/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */ ++ ++#include ++#include ++ ++/ { ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ ++ update-button { ++ label = "update"; ++ linux,code = ; ++ press-threshold-microvolt = <1300000>; ++ }; ++ }; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ spi0 = &spifc; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ cvbs-connector { ++ compatible = "composite-video-connector"; ++ status = "disabled"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ poll-interval = <100>; ++ ++ power-button { ++ label = "power"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ ao_5v: regulator-ao_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "AO_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_in>; ++ regulator-always-on; ++ }; ++ ++ dc_in: regulator-dc_in { ++ compatible = "regulator-fixed"; ++ regulator-name = "DC_IN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ green { ++ color = ; ++ function = LED_FUNCTION_DISK_ACTIVITY; ++ gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "disk-activity"; ++ }; ++ ++ blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ panic-indicator; ++ }; ++ }; ++ ++ vcc_card: regulator-vcc_card { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_CARD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddio_ao3v3>; ++ ++ gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vcc5v: regulator-vcc5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&ao_5v>; ++ ++ gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>; ++ }; ++ ++ vddio_ao18: regulator-vddio_ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&ao_5v>; ++ regulator-always-on; ++ }; ++ ++ vddio_ao3v3: regulator-vddio_ao3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&ao_5v>; ++ regulator-always-on; ++ }; ++ ++ vddio_boot: regulator-vddio_boot { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_BOOT"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddio_ao3v3>; ++ regulator-always-on; ++ }; ++ ++ vddio_card: regulator-vddio-card { ++ compatible = "regulator-gpio"; ++ regulator-name = "VDDIO_CARD"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ ++ regulator-settling-time-up-us = <200>; ++ regulator-settling-time-down-us = <50000>; ++ }; ++}; ++ ++&cec_AO { ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; ++ status = "okay"; ++}; ++ ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_phy_irq_pins>; ++ pinctrl-names = "default"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ external_phy: ethernet-phy@0 { ++ reg = <0>; ++ max-speed = <1000>; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++&pinctrl_periphs { ++ /* ++ * Make sure the reset pin of the usb HUB is driven high to take ++ * it out of reset. ++ */ ++ usb1_rst_pins: usb1_rst_irq { ++ mux { ++ groups = "GPIODV_3"; ++ function = "gpio_periphs"; ++ bias-disable; ++ output-high; ++ }; ++ }; ++ ++ /* Make sure the phy irq pin is properly configured as input */ ++ eth_phy_irq_pins: eth_phy_irq { ++ mux { ++ groups = "GPIOZ_15"; ++ function = "gpio_periphs"; ++ bias-disable; ++ output-disable; ++ }; ++ }; ++}; ++ ++&hdmi_tx { ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&vcc5v>; ++ status = "okay"; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&i2c_C { ++ pinctrl-0 = <&i2c_c_dv18_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ rtc: rtc@51 { ++ reg = <0x51>; ++ compatible = "nxp,pcf8563"; ++ #clock-cells = <0>; ++ clock-output-names = "rtc_clkout"; ++ }; ++}; ++ ++&pwm_AO_ab { ++ pinctrl-0 = <&pwm_ao_a_3_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++ status = "okay"; ++}; ++ ++&pwm_ab { ++ pinctrl-0 = <&pwm_b_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++ status = "okay"; ++}; ++ ++&pwm_ef { ++ pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vddio_ao18>; ++ status = "okay"; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-ddr50; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; ++ ++ vmmc-supply = <&vcc_card>; ++ vqmmc-supply = <&vddio_card>; ++ ++ status = "okay"; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ pinctrl-0 = <&emmc_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vddio_ao3v3>; ++ vqmmc-supply = <&vddio_boot>; ++ ++ status = "okay"; ++}; ++ ++&spifc { ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ gd25lq128: spi-flash@0 { ++ compatible = "jedec,spi-nor"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0>; ++ spi-max-frequency = <12000000>; ++ }; ++}; ++ ++&uart_AO { ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&usb0 { ++ status = "okay"; ++}; ++ ++&usb2_phy0 { ++ pinctrl-0 = <&usb1_rst_pins>; ++ pinctrl-names = "default"; ++ phy-supply = <&vcc5v>; ++}; ++ ++&usb2_phy1 { ++ phy-supply = <&vcc5v>; ++}; +diff --git a/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts b/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts +new file mode 100644 +index 0000000000..100a1cfeea +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts +@@ -0,0 +1,16 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2019 BayLibre SAS. All rights reserved. ++ * Author: Jerome Brunet ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxl-s905d.dtsi" ++#include "meson-gx-libretech-pc.dtsi" ++ ++/ { ++ compatible = "libretech,aml-s905d-pc", "amlogic,s905d", ++ "amlogic,meson-gxl"; ++ model = "Libre Computer AML-S905D-PC"; ++}; +diff --git a/arch/arm/dts/meson-gxl-s905d.dtsi b/arch/arm/dts/meson-gxl-s905d.dtsi +new file mode 100644 +index 0000000000..4332191954 +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-s905d.dtsi +@@ -0,0 +1,12 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2016 Endless Computers, Inc. ++ * Author: Carlo Caione ++ */ ++ ++#include "meson-gxl.dtsi" ++#include "meson-gxl-mali.dtsi" ++ ++/ { ++ compatible = "amlogic,s905d", "amlogic,meson-gxl"; ++}; +diff --git a/arch/arm/dts/meson-gxm-s912-libretech-pc.dts b/arch/arm/dts/meson-gxm-s912-libretech-pc.dts +new file mode 100644 +index 0000000000..444c249863 +--- /dev/null ++++ b/arch/arm/dts/meson-gxm-s912-libretech-pc.dts +@@ -0,0 +1,62 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2019 BayLibre SAS. All rights reserved. ++ * Author: Jerome Brunet ++ */ ++ ++/dts-v1/; ++ ++#include "meson-gxm.dtsi" ++#include "meson-gx-libretech-pc.dtsi" ++ ++/ { ++ compatible = "libretech,aml-s912-pc", "amlogic,s912", ++ "amlogic,meson-gxm"; ++ model = "Libre Computer AML-S912-PC"; ++ ++ typec2_vbus: regulator-typec2_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "TYPEC2_VBUS"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v>; ++ ++ gpio = <&gpio GPIODV_1 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++}; ++ ++&pinctrl_periphs { ++ /* ++ * Make sure the irq pin of the TYPE C controller is not driven ++ * by the SoC. ++ */ ++ fusb302_irq_pins: fusb302_irq { ++ mux { ++ groups = "GPIODV_0"; ++ function = "gpio_periphs"; ++ bias-pull-up; ++ output-disable; ++ }; ++ }; ++}; ++ ++&i2c_C { ++ fusb302@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ ++ pinctrl-0 = <&fusb302_irq_pins>; ++ pinctrl-names = "default"; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <59 IRQ_TYPE_LEVEL_LOW>; ++ ++ vbus-supply = <&typec2_vbus>; ++ ++ status = "okay"; ++ }; ++}; ++ ++&usb2_phy2 { ++ phy-supply = <&typec2_vbus>; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-arm64-dts-meson-add-libretech-pc-support.patch b/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-arm64-dts-meson-add-libretech-pc-support.patch new file mode 100644 index 0000000000..4b165b6ee7 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0006-FROMGIT-arm64-dts-meson-add-libretech-pc-support.patch @@ -0,0 +1,236 @@ +From ccbac5c2b2e82ef217f87689aa86afd67993c7d4 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 5 Mar 2020 12:12:40 +0100 +Subject: [PATCH 06/33] FROMGIT: arm64: dts: meson: add libretech-pc support + +Add support for the Amlogic based libretech-pc platform. +This platform comes with 2 variant, based on the s905d or s912 SoC. + +Acked-by: Neil Armstrong +Signed-off-by: Jerome Brunet +[narmstrong: update board/amlogic/q200/MAINTAINERS] +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 2 + + .../meson-gxl-s905d-libretech-pc-u-boot.dtsi | 7 ++ + .../meson-gxm-s912-libretech-pc-u-boot.dtsi | 7 ++ + board/amlogic/q200/MAINTAINERS | 2 + + configs/libretech-s905d-pc_defconfig | 73 +++++++++++++++++++ + configs/libretech-s912-pc_defconfig | 73 +++++++++++++++++++ + 6 files changed, 164 insertions(+) + create mode 100644 arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi + create mode 100644 configs/libretech-s905d-pc_defconfig + create mode 100644 configs/libretech-s912-pc_defconfig + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 820ee9733a..a80ce9c791 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -147,7 +147,9 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxl-s805x-libretech-ac.dtb \ + meson-gxl-s905x-libretech-cc.dtb \ + meson-gxl-s905x-khadas-vim.dtb \ ++ meson-gxl-s905d-libretech-pc.dtb \ + meson-gxm-khadas-vim2.dtb \ ++ meson-gxm-s912-libretech-pc.dtb \ + meson-axg-s400.dtb \ + meson-g12a-u200.dtb \ + meson-g12a-sei510.dtb \ +diff --git a/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi +new file mode 100644 +index 0000000000..c35158d7e9 +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi b/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi +new file mode 100644 +index 0000000000..c35158d7e9 +--- /dev/null ++++ b/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" +diff --git a/board/amlogic/q200/MAINTAINERS b/board/amlogic/q200/MAINTAINERS +index d3c5a4617b..6f00f87386 100644 +--- a/board/amlogic/q200/MAINTAINERS ++++ b/board/amlogic/q200/MAINTAINERS +@@ -5,3 +5,5 @@ L: u-boot-amlogic@groups.io + F: board/amlogic/q200/ + F: include/configs/q200.h + F: configs/khadas-vim2_defconfig ++F: configs/libretech-s905d-pc_defconfig ++F: configs/libretech-s912-pc_defconfig +diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig +new file mode 100644 +index 0000000000..7e0c95872a +--- /dev/null ++++ b/configs/libretech-s905d-pc_defconfig +@@ -0,0 +1,73 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="q200" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_MESON_GXL=y ++CONFIG_ENV_SIZE=0x10000 ++CONFIG_ENV_OFFSET=0xFFFF0000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_ENV_SECT_SIZE=0x10000 ++CONFIG_IDENT_STRING=" libretech-s905d-pc" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="usb start" ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_ADC=y ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SARADC_MESON=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_PHY=y ++CONFIG_MESON_GXL_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXL=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_GX_VPU_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_MESON=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig +new file mode 100644 +index 0000000000..5f4ee329e2 +--- /dev/null ++++ b/configs/libretech-s912-pc_defconfig +@@ -0,0 +1,73 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="q200" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_MESON_GXM=y ++CONFIG_ENV_SIZE=0x10000 ++CONFIG_ENV_OFFSET=0xFFFF0000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEBUG_UART_BASE=0xc81004c0 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_ENV_SECT_SIZE=0x10000 ++CONFIG_IDENT_STRING=" libretech-s912-pc" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_USE_PREBOOT=y ++CONFIG_PREBOOT="usb start" ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_ADC=y ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SARADC_MESON=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_KEYBOARD=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_PHY=y ++CONFIG_MESON_GXL_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_GXL=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_GX_VPU_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_MESON=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_DM_VIDEO=y ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-ARM-dts-add-missing-meson-gxl-s805x-libretec.patch b/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-ARM-dts-add-missing-meson-gxl-s805x-libretec.patch new file mode 100644 index 0000000000..a2b1dd13f9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0007-FROMGIT-ARM-dts-add-missing-meson-gxl-s805x-libretec.patch @@ -0,0 +1,34 @@ +From 18e5ef0dc6d2368bfb6cd5736842ad895c1bfc73 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 15 Apr 2020 17:58:30 +0200 +Subject: [PATCH 07/33] FROMGIT: ARM: dts: add missing + meson-gxl-s805x-libretech-ac-u-boot.dtsi file + +The libretech-ac u-boot.dtsi file is missing to enabled DT nodes changes +to enable Video output on U-Boot. + +Fixes: 671b1db8f8 ("arm64: dts: meson-gx: vpu should be probed before relocation") +Reported-by: Jerome Brunet +Signed-off-by: Neil Armstrong +Tested-by: Jerome Brunet +--- + arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + create mode 100644 arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi + +diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi +new file mode 100644 +index 0000000000..c35158d7e9 +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-arm64-dts-meson-gx-add-back-dmc-register-ran.patch b/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-arm64-dts-meson-gx-add-back-dmc-register-ran.patch new file mode 100644 index 0000000000..13a9202372 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0008-FROMGIT-arm64-dts-meson-gx-add-back-dmc-register-ran.patch @@ -0,0 +1,35 @@ +From a630363ac19a63561c0acb4e7d66456a646e0d01 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 16 Apr 2020 10:39:41 +0200 +Subject: [PATCH 08/33] FROMGIT: arm64: dts: meson-gx: add back dmc register + range until canvas driver is available + +The Linux VPU bindings have changed and dropped the dmc register range. + +Add it back in the meson-gx-u-boot.dtsi file until a proper canvas driver +is available. + +Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2") +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-gx-u-boot.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi +index b84e5edba4..17d2cb95c1 100644 +--- a/arch/arm/dts/meson-gx-u-boot.dtsi ++++ b/arch/arm/dts/meson-gx-u-boot.dtsi +@@ -11,6 +11,10 @@ + }; + + &vpu { ++ reg = <0x0 0xd0100000 0x0 0x100000>, ++ <0x0 0xc883c000 0x0 0x1000>, ++ <0x0 0xc8838000 0x0 0x1000>; ++ reg-names = "vpu", "hhi", "dmc"; + u-boot,dm-pre-reloc; + }; + +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-generic-phy-add-generic_phy_get_by_node.patch b/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-generic-phy-add-generic_phy_get_by_node.patch new file mode 100644 index 0000000000..d871c2ad0c --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0009-FROMGIT-generic-phy-add-generic_phy_get_by_node.patch @@ -0,0 +1,109 @@ +From 9102eaa76d81c8465e995fe61297fad4c1791615 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:23 +0200 +Subject: [PATCH 09/33] FROMGIT: generic-phy: add generic_phy_get_by_node() + +Add generic_phy_get_by_node() to get a PHY phandle from a node instead +of a udevice. + +Signed-off-by: Neil Armstrong +Reviewed-by: Tom Rini +[narmstrong: fixed by including ofnode.h in generic-phy.h] +--- + drivers/phy/phy-uclass.c | 16 +++++++++++----- + include/generic-phy.h | 29 +++++++++++++++++++++++++++++ + 2 files changed, 40 insertions(+), 5 deletions(-) + +diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c +index e201a90c8c..e463b0b400 100644 +--- a/drivers/phy/phy-uclass.c ++++ b/drivers/phy/phy-uclass.c +@@ -31,20 +31,20 @@ static int generic_phy_xlate_offs_flags(struct phy *phy, + return 0; + } + +-int generic_phy_get_by_index(struct udevice *dev, int index, +- struct phy *phy) ++int generic_phy_get_by_node(ofnode node, int index, struct phy *phy) + { + struct ofnode_phandle_args args; + struct phy_ops *ops; + struct udevice *phydev; + int i, ret; + +- debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy); ++ debug("%s(node=%s, index=%d, phy=%p)\n", ++ __func__, ofnode_get_name(node), index, phy); + + assert(phy); + phy->dev = NULL; +- ret = dev_read_phandle_with_args(dev, "phys", "#phy-cells", 0, index, +- &args); ++ ret = ofnode_parse_phandle_with_args(node, "phys", "#phy-cells", 0, ++ index, &args); + if (ret) { + debug("%s: dev_read_phandle_with_args failed: err=%d\n", + __func__, ret); +@@ -90,6 +90,12 @@ err: + return ret; + } + ++int generic_phy_get_by_index(struct udevice *dev, int index, ++ struct phy *phy) ++{ ++ return generic_phy_get_by_node(dev_ofnode(dev), index, phy); ++} ++ + int generic_phy_get_by_name(struct udevice *dev, const char *phy_name, + struct phy *phy) + { +diff --git a/include/generic-phy.h b/include/generic-phy.h +index 95caf58341..73537025c2 100644 +--- a/include/generic-phy.h ++++ b/include/generic-phy.h +@@ -7,6 +7,8 @@ + #ifndef __GENERIC_PHY_H + #define __GENERIC_PHY_H + ++#include ++ + struct ofnode_phandle_args; + + /** +@@ -193,6 +195,33 @@ int generic_phy_power_off(struct phy *phy); + int generic_phy_get_by_index(struct udevice *user, int index, + struct phy *phy); + ++/** ++ * generic_phy_get_by_node() - Get a PHY device by integer index on ofnode ++ * ++ * @node: the device node ++ * @index: The index in the list of available PHYs ++ * @phy: A pointer to the PHY port ++ * ++ * This looks up a PHY device for a client device based on its ofnode and on ++ * its position in the list of the possible PHYs. ++ * ++ * example: ++ * usb1: usb_otg_ss@xxx { ++ * compatible = "xxx"; ++ * reg = ; ++ * . ++ * . ++ * phys = <&usb2_phy>, <&usb3_phy>; ++ * . ++ * . ++ * }; ++ * the USB2 phy can be accessed by passing index '0' and the USB3 phy can ++ * be accessed by passing index '1' ++ * ++ * @return 0 if OK, or a negative error code ++ */ ++int generic_phy_get_by_node(ofnode node, int index, struct phy *phy); ++ + /** + * generic_phy_get_by_name() - Get a PHY device by its name. + * +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-phy-meson-gxl-usb-add-set_mode-call-to-force.patch b/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-phy-meson-gxl-usb-add-set_mode-call-to-force.patch new file mode 100644 index 0000000000..f04f6c43be --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0010-FROMGIT-phy-meson-gxl-usb-add-set_mode-call-to-force.patch @@ -0,0 +1,173 @@ +From 5d52ec98996401176465a16408862393fcc83fc7 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:24 +0200 +Subject: [PATCH 10/33] FROMGIT: phy: meson-gxl-usb: add set_mode call to force + switch to peripheral mode + +Add set_mode function in the Amlogic GXL PHYs that will be called by +the arch code to switch PHYs from/to gadget mode. + +Signed-off-by: Neil Armstrong +--- + arch/arm/include/asm/arch-meson/usb-gx.h | 16 +++++++++ + drivers/phy/meson-gxl-usb2.c | 30 ++++++++++++---- + drivers/phy/meson-gxl-usb3.c | 44 +++++++++++++++++------- + 3 files changed, 72 insertions(+), 18 deletions(-) + create mode 100644 arch/arm/include/asm/arch-meson/usb-gx.h + +diff --git a/arch/arm/include/asm/arch-meson/usb-gx.h b/arch/arm/include/asm/arch-meson/usb-gx.h +new file mode 100644 +index 0000000000..aeb8e0c673 +--- /dev/null ++++ b/arch/arm/include/asm/arch-meson/usb-gx.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright 2019 BayLibre SAS ++ * Author: Neil Armstrong ++ */ ++#ifndef _ARCH_MESON_USB_GX_H_ ++#define _ARCH_MESON_USB_GX_H_ ++ ++#include ++#include ++ ++/* TOFIX add set_mode to struct phy_ops */ ++void phy_meson_gxl_usb2_set_mode(struct phy *phy, enum usb_dr_mode mode); ++void phy_meson_gxl_usb3_set_mode(struct phy *phy, enum usb_dr_mode mode); ++ ++#endif +diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c +index c98d12b627..b4f4c3c76b 100644 +--- a/drivers/phy/meson-gxl-usb2.c ++++ b/drivers/phy/meson-gxl-usb2.c +@@ -17,6 +17,9 @@ + #include + #include + #include ++#include ++ ++#include + + #include + #include +@@ -121,15 +124,30 @@ static void phy_meson_gxl_usb2_reset(struct phy_meson_gxl_usb2_priv *priv) + udelay(RESET_COMPLETE_TIME); + } + +-static void +-phy_meson_gxl_usb2_set_host_mode(struct phy_meson_gxl_usb2_priv *priv) ++void phy_meson_gxl_usb2_set_mode(struct phy *phy, enum usb_dr_mode mode) + { ++ struct udevice *dev = phy->dev; ++ struct phy_meson_gxl_usb2_priv *priv = dev_get_priv(dev); + uint val; + + regmap_read(priv->regmap, U2P_R0, &val); +- val |= U2P_R0_DM_PULLDOWN; +- val |= U2P_R0_DP_PULLDOWN; +- val &= ~U2P_R0_ID_PULLUP; ++ ++ switch (mode) { ++ case USB_DR_MODE_UNKNOWN: ++ case USB_DR_MODE_HOST: ++ case USB_DR_MODE_OTG: ++ val |= U2P_R0_DM_PULLDOWN; ++ val |= U2P_R0_DP_PULLDOWN; ++ val &= ~U2P_R0_ID_PULLUP; ++ break; ++ ++ case USB_DR_MODE_PERIPHERAL: ++ val &= ~U2P_R0_DM_PULLDOWN; ++ val &= ~U2P_R0_DP_PULLDOWN; ++ val |= U2P_R0_ID_PULLUP; ++ break; ++ } ++ + regmap_write(priv->regmap, U2P_R0, val); + + phy_meson_gxl_usb2_reset(priv); +@@ -146,7 +164,7 @@ static int phy_meson_gxl_usb2_power_on(struct phy *phy) + val &= ~U2P_R0_POWER_ON_RESET; + regmap_write(priv->regmap, U2P_R0, val); + +- phy_meson_gxl_usb2_set_host_mode(priv); ++ phy_meson_gxl_usb2_set_mode(phy, USB_DR_MODE_HOST); + + #if CONFIG_IS_ENABLED(DM_REGULATOR) + if (priv->phy_supply) { +diff --git a/drivers/phy/meson-gxl-usb3.c b/drivers/phy/meson-gxl-usb3.c +index c2a8593b39..9de55bb5df 100644 +--- a/drivers/phy/meson-gxl-usb3.c ++++ b/drivers/phy/meson-gxl-usb3.c +@@ -16,6 +16,9 @@ + #include + #include + #include ++#include ++ ++#include + + #include + #include +@@ -93,20 +96,35 @@ struct phy_meson_gxl_usb3_priv { + #endif + }; + +-static int +-phy_meson_gxl_usb3_set_host_mode(struct phy_meson_gxl_usb3_priv *priv) ++void phy_meson_gxl_usb3_set_mode(struct phy *phy, enum usb_dr_mode mode) + { ++ struct udevice *dev = phy->dev; ++ struct phy_meson_gxl_usb3_priv *priv = dev_get_priv(dev); + uint val; + +- regmap_read(priv->regmap, USB_R0, &val); +- val &= ~USB_R0_U2D_ACT; +- regmap_write(priv->regmap, USB_R0, val); +- +- regmap_read(priv->regmap, USB_R4, &val); +- val &= ~USB_R4_P21_SLEEP_M0; +- regmap_write(priv->regmap, USB_R4, val); +- +- return 0; ++ switch (mode) { ++ case USB_DR_MODE_UNKNOWN: ++ case USB_DR_MODE_HOST: ++ case USB_DR_MODE_OTG: ++ regmap_read(priv->regmap, USB_R0, &val); ++ val &= ~USB_R0_U2D_ACT; ++ regmap_write(priv->regmap, USB_R0, val); ++ ++ regmap_read(priv->regmap, USB_R4, &val); ++ val &= ~USB_R4_P21_SLEEP_M0; ++ regmap_write(priv->regmap, USB_R4, val); ++ break; ++ ++ case USB_DR_MODE_PERIPHERAL: ++ regmap_read(priv->regmap, USB_R0, &val); ++ val |= USB_R0_U2D_ACT; ++ regmap_write(priv->regmap, USB_R0, val); ++ ++ regmap_read(priv->regmap, USB_R4, &val); ++ val |= USB_R4_P21_SLEEP_M0; ++ regmap_write(priv->regmap, USB_R4, val); ++ break; ++ } + } + + static int phy_meson_gxl_usb3_power_on(struct phy *phy) +@@ -122,7 +140,9 @@ static int phy_meson_gxl_usb3_power_on(struct phy *phy) + val |= FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff); + regmap_write(priv->regmap, USB_R5, val); + +- return phy_meson_gxl_usb3_set_host_mode(priv); ++ phy_meson_gxl_usb3_set_mode(phy, USB_DR_MODE_HOST); ++ ++ return 0; + } + + static int phy_meson_gxl_usb3_power_off(struct phy *phy) +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-arm-meson-gx-add-board_usb_init-cleanup-for-.patch b/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-arm-meson-gx-add-board_usb_init-cleanup-for-.patch new file mode 100644 index 0000000000..8d4023c15f --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0011-FROMGIT-arm-meson-gx-add-board_usb_init-cleanup-for-.patch @@ -0,0 +1,151 @@ +From 250936e89ab2a704a78aa8e8648094ee5de8702f Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:25 +0200 +Subject: [PATCH 11/33] FROMGIT: arm: meson-gx: add board_usb_init()/cleanup() + for USB gadget + +Add arch code to initialize USB Gadget mode using the DWC2 controller, +and using the previously added set_mode() phy functions. + +[narmstrong: fixup board_usb_cleanup call to phy_meson_gxl_usb2_set_mode] +Signed-off-by: Neil Armstrong +--- + arch/arm/mach-meson/board-gx.c | 118 +++++++++++++++++++++++++++++++++ + 1 file changed, 118 insertions(+) + +diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c +index 191fd49005..3da99017a5 100644 +--- a/arch/arm/mach-meson/board-gx.c ++++ b/arch/arm/mach-meson/board-gx.c +@@ -14,6 +14,11 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include + #include + + DECLARE_GLOBAL_DATA_PTR; +@@ -149,3 +154,116 @@ void meson_eth_init(phy_interface_t mode, unsigned int flags) + /* Enable power gate */ + clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); + } ++ ++#if CONFIG_IS_ENABLED(USB_XHCI_DWC3_OF_SIMPLE) && \ ++ CONFIG_IS_ENABLED(USB_GADGET_DWC2_OTG) ++static struct dwc2_plat_otg_data meson_gx_dwc2_data; ++static struct phy usb_phys[2]; ++ ++int board_usb_init(int index, enum usb_init_type init) ++{ ++ struct ofnode_phandle_args args; ++ struct udevice *clk_dev; ++ ofnode dwc2_node; ++ struct clk clk; ++ int ret, i; ++ u32 val; ++ ++ /* find the dwc2 node */ ++ dwc2_node = ofnode_by_compatible(ofnode_null(), "snps,dwc2"); ++ if (!ofnode_valid(dwc2_node)) { ++ debug("Not found dwc2 node\n"); ++ return -ENODEV; ++ } ++ ++ if (!ofnode_is_available(dwc2_node)) { ++ debug("dwc2 is disabled in the device tree\n"); ++ return -ENODEV; ++ } ++ ++ /* get the PHYs */ ++ for (i = 0; i < 2; i++) { ++ ret = generic_phy_get_by_node(dwc2_node, i, &usb_phys[i]); ++ if (ret && ret != -ENOENT) { ++ pr_err("Failed to get USB PHY%d for %s\n", ++ i, ofnode_get_name(dwc2_node)); ++ return ret; ++ } ++ } ++ ++ for (i = 0; i < 2; i++) { ++ ret = generic_phy_init(&usb_phys[i]); ++ if (ret) { ++ pr_err("Can't init USB PHY%d for %s\n", ++ i, ofnode_get_name(dwc2_node)); ++ return ret; ++ } ++ } ++ ++ for (i = 0; i < 2; i++) { ++ ret = generic_phy_power_on(&usb_phys[i]); ++ if (ret) { ++ pr_err("Can't power USB PHY%d for %s\n", ++ i, ofnode_get_name(dwc2_node)); ++ return ret; ++ } ++ } ++ ++ phy_meson_gxl_usb3_set_mode(&usb_phys[0], USB_DR_MODE_PERIPHERAL); ++ phy_meson_gxl_usb2_set_mode(&usb_phys[1], USB_DR_MODE_PERIPHERAL); ++ ++ meson_gx_dwc2_data.regs_otg = ofnode_get_addr(dwc2_node); ++ if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) { ++ debug("usbotg: can't get base address\n"); ++ return -ENODATA; ++ } ++ ++ /* Enable clock */ ++ ret = ofnode_parse_phandle_with_args(dwc2_node, "clocks", ++ "#clock-cells", 0, 0, &args); ++ if (ret) { ++ debug("usbotg has no clocks defined in the device tree\n"); ++ return ret; ++ } ++ ++ ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &clk_dev); ++ if (ret) ++ return ret; ++ ++ if (args.args_count != 1) { ++ debug("Can't find clock ID in the device tree\n"); ++ return -ENODATA; ++ } ++ ++ clk.dev = clk_dev; ++ clk.id = args.args[0]; ++ ++ ret = clk_enable(&clk); ++ if (ret) { ++ debug("Failed to enable usbotg clock\n"); ++ return ret; ++ } ++ ++ ofnode_read_u32(dwc2_node, "g-rx-fifo-size", &val); ++ meson_gx_dwc2_data.rx_fifo_sz = val; ++ ofnode_read_u32(dwc2_node, "g-np-tx-fifo-size", &val); ++ meson_gx_dwc2_data.np_tx_fifo_sz = val; ++ ofnode_read_u32(dwc2_node, "g-tx-fifo-size", &val); ++ meson_gx_dwc2_data.tx_fifo_sz = val; ++ ++ return dwc2_udc_probe(&meson_gx_dwc2_data); ++} ++ ++int board_usb_cleanup(int index, enum usb_init_type init) ++{ ++ int i; ++ ++ phy_meson_gxl_usb3_set_mode(&usb_phys[0], USB_DR_MODE_HOST); ++ phy_meson_gxl_usb2_set_mode(&usb_phys[1], USB_DR_MODE_HOST); ++ ++ for (i = 0; i < 2; i++) ++ usb_phys[i].dev = NULL; ++ ++ return 0; ++} ++#endif +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-arm-dts-meson-gxl-Add-USB-Gadget-nodes-for-U.patch b/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-arm-dts-meson-gxl-Add-USB-Gadget-nodes-for-U.patch new file mode 100644 index 0000000000..0a3b678360 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0012-FROMGIT-arm-dts-meson-gxl-Add-USB-Gadget-nodes-for-U.patch @@ -0,0 +1,84 @@ +From da97f35bad96e2748744968b35f823dde27dc001 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:26 +0200 +Subject: [PATCH 12/33] FROMGIT: arm: dts: meson-gxl: Add USB Gadget nodes for + U-Boot + +Add the USB DWC2 node to u-boot specific dtsi files since Gadget +support is not (yet) available in upstream Linux yet. + +Signed-off-by: Neil Armstrong +--- + .../meson-gxl-s905x-khadas-vim-u-boot.dtsi | 2 +- + .../meson-gxl-s905x-libretech-cc-u-boot.dtsi | 6 ++++- + arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi | 2 +- + arch/arm/dts/meson-gxl-u-boot.dtsi | 23 +++++++++++++++++++ + 4 files changed, 30 insertions(+), 3 deletions(-) + create mode 100644 arch/arm/dts/meson-gxl-u-boot.dtsi + +diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi +index c35158d7e9..39270ea71c 100644 +--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi +@@ -4,4 +4,4 @@ + * Author: Neil Armstrong + */ + +-#include "meson-gx-u-boot.dtsi" ++#include "meson-gxl-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi +index c35158d7e9..474a3e1604 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi +@@ -4,4 +4,8 @@ + * Author: Neil Armstrong + */ + +-#include "meson-gx-u-boot.dtsi" ++#include "meson-gxl-u-boot.dtsi" ++ ++&dwc2 { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi +index c35158d7e9..39270ea71c 100644 +--- a/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi +@@ -4,4 +4,4 @@ + * Author: Neil Armstrong + */ + +-#include "meson-gx-u-boot.dtsi" ++#include "meson-gxl-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-gxl-u-boot.dtsi b/arch/arm/dts/meson-gxl-u-boot.dtsi +new file mode 100644 +index 0000000000..9e88afd30e +--- /dev/null ++++ b/arch/arm/dts/meson-gxl-u-boot.dtsi +@@ -0,0 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS. ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-gx-u-boot.dtsi" ++ ++&usb0 { ++ dwc2: usb@c9100000 { ++ compatible = "snps,dwc2"; ++ reg = <0x0 0xc9100000 0x0 0x40000>; ++ interrupts = ; ++ clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; ++ clock-names = "ddr"; ++ phys = <&usb3_phy>, <&usb2_phy1>; ++ dr_mode = "peripheral"; ++ g-rx-fifo-size = <192>; ++ g-np-tx-fifo-size = <128>; ++ g-tx-fifo-size = <128 128 16 16 16>; ++ status = "disabled"; ++ }; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-configs-libretech-cc-Enable-USB-gadget-with-.patch b/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-configs-libretech-cc-Enable-USB-gadget-with-.patch new file mode 100644 index 0000000000..13747d3b7b --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0013-FROMGIT-configs-libretech-cc-Enable-USB-gadget-with-.patch @@ -0,0 +1,41 @@ +From c0a978fcba484af5a0c643a4a7c3b69276a3c0ea Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:27 +0200 +Subject: [PATCH 13/33] FROMGIT: configs: libretech-cc: Enable USB gadget with + Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/libretech-cc_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig +index 7c257b33b3..2c512ebc1e 100644 +--- a/configs/libretech-cc_defconfig ++++ b/configs/libretech-cc_defconfig +@@ -19,6 +19,7 @@ CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -51,6 +52,12 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_DM_VIDEO=y + # CONFIG_VIDEO_BPP8 is not set + # CONFIG_VIDEO_BPP16 is not set +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-configs-libretech-ac-Enable-USB-gadget-with-.patch b/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-configs-libretech-ac-Enable-USB-gadget-with-.patch new file mode 100644 index 0000000000..a849b2d8ec --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0014-FROMGIT-configs-libretech-ac-Enable-USB-gadget-with-.patch @@ -0,0 +1,41 @@ +From a1657ae3f2b3101d12994b8936bbcecf899979b8 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:28 +0200 +Subject: [PATCH 14/33] FROMGIT: configs: libretech-ac: Enable USB gadget with + Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/libretech-ac_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig +index 09b87c54d5..7e486757a2 100644 +--- a/configs/libretech-ac_defconfig ++++ b/configs/libretech-ac_defconfig +@@ -27,6 +27,7 @@ CONFIG_CMD_MMC=y + CONFIG_CMD_SF_TEST=y + CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -69,6 +70,12 @@ CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y + CONFIG_USB_KEYBOARD=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_DM_VIDEO=y + # CONFIG_VIDEO_BPP8 is not set + # CONFIG_VIDEO_BPP16 is not set +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-configs-khadas-vim2-Enable-USB-gadget-with-M.patch b/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-configs-khadas-vim2-Enable-USB-gadget-with-M.patch new file mode 100644 index 0000000000..7e0cbfc1ba --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0015-FROMGIT-configs-khadas-vim2-Enable-USB-gadget-with-M.patch @@ -0,0 +1,39 @@ +From c91bbf06c3b7489bc90a10c2bcaf20e84a251cd9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:29 +0200 +Subject: [PATCH 15/33] FROMGIT: configs: khadas-vim2: Enable USB gadget with + Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/khadas-vim2_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig +index 9cb377e55e..a533566410 100644 +--- a/configs/khadas-vim2_defconfig ++++ b/configs/khadas-vim2_defconfig +@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -49,4 +50,10 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-configs-khadas-vim-Enable-USB-gadget-with-Ma.patch b/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-configs-khadas-vim-Enable-USB-gadget-with-Ma.patch new file mode 100644 index 0000000000..9cfdf4c1e9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0016-FROMGIT-configs-khadas-vim-Enable-USB-gadget-with-Ma.patch @@ -0,0 +1,39 @@ +From 742693fe45c96a7033a861b78527b63f0847a368 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:30 +0200 +Subject: [PATCH 16/33] FROMGIT: configs: khadas-vim: Enable USB gadget with + Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/khadas-vim_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig +index e18a5e62bb..8a0af5cebb 100644 +--- a/configs/khadas-vim_defconfig ++++ b/configs/khadas-vim_defconfig +@@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -50,4 +51,10 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-configs-libretech-s905d-pc-Enable-USB-gadget.patch b/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-configs-libretech-s905d-pc-Enable-USB-gadget.patch new file mode 100644 index 0000000000..7a49a8d8df --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0017-FROMGIT-configs-libretech-s905d-pc-Enable-USB-gadget.patch @@ -0,0 +1,41 @@ +From d404f6bfbb231b38b0248f79c0b2491324b7a8a7 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:31 +0200 +Subject: [PATCH 17/33] FROMGIT: configs: libretech-s905d-pc: Enable USB gadget + with Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/libretech-s905d-pc_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig +index 7e0c95872a..531d519a7c 100644 +--- a/configs/libretech-s905d-pc_defconfig ++++ b/configs/libretech-s905d-pc_defconfig +@@ -26,6 +26,7 @@ CONFIG_CMD_SF=y + CONFIG_CMD_SF_TEST=y + CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -65,6 +66,12 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_KEYBOARD=y + CONFIG_DM_VIDEO=y + CONFIG_SYS_WHITE_ON_BLACK=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-configs-libretech-s912-pc-Enable-USB-gadget-.patch b/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-configs-libretech-s912-pc-Enable-USB-gadget-.patch new file mode 100644 index 0000000000..d6fb9bf07f --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0018-FROMGIT-configs-libretech-s912-pc-Enable-USB-gadget-.patch @@ -0,0 +1,41 @@ +From 86650226bce789960a7fd8d36d2e7f57f2d0d9b1 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 30 Mar 2020 11:27:32 +0200 +Subject: [PATCH 18/33] FROMGIT: configs: libretech-s912-pc: Enable USB gadget + with Mass Storage function + +Enable configs to support USB gadget and Mass Storage + +Signed-off-by: Neil Armstrong +--- + configs/libretech-s912-pc_defconfig | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig +index 5f4ee329e2..595ec21da7 100644 +--- a/configs/libretech-s912-pc_defconfig ++++ b/configs/libretech-s912-pc_defconfig +@@ -26,6 +26,7 @@ CONFIG_CMD_SF=y + CONFIG_CMD_SF_TEST=y + CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -65,6 +66,12 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y + CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_USB_KEYBOARD=y + CONFIG_DM_VIDEO=y + CONFIG_SYS_WHITE_ON_BLACK=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-clk-meson-g12a-add-missing-SD_EMMC_A-control.patch b/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-clk-meson-g12a-add-missing-SD_EMMC_A-control.patch new file mode 100644 index 0000000000..d7b937d0d8 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0019-FROMGIT-clk-meson-g12a-add-missing-SD_EMMC_A-control.patch @@ -0,0 +1,38 @@ +From 885bb5a00c3d58123a8f4efa8ef03acf27b45301 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:46:30 +0200 +Subject: [PATCH 19/33] FROMGIT: clk: meson: g12a: add missing SD_EMMC_A + controller gates + +Add missing SD_EMMC_A controller gates needed for probe of the A +controller, otherwise leading to a freeze of the SoC after b3d69aa596. + +Fixes: b3d69aa596 ("clk: meson: reset mmc clock on probe") +Signed-off-by: Neil Armstrong +--- + drivers/clk/meson/g12a.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c +index 9e6beca94a..5a94e5560f 100644 +--- a/drivers/clk/meson/g12a.c ++++ b/drivers/clk/meson/g12a.c +@@ -112,6 +112,7 @@ static struct meson_gate gates[NUM_CLKS] = { + MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9), + MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13), + MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14), ++ MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 4), + MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25), + MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26), + MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3), +@@ -127,6 +128,7 @@ static struct meson_gate gates[NUM_CLKS] = { + MESON_GATE(CLKID_FCLK_DIV4, HHI_FIX_PLL_CNTL1, 21), + MESON_GATE(CLKID_FCLK_DIV5, HHI_FIX_PLL_CNTL1, 22), + MESON_GATE(CLKID_FCLK_DIV7, HHI_FIX_PLL_CNTL1, 23), ++ MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7), + MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23), + MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7), + MESON_GATE(CLKID_VPU_0, HHI_VPU_CLK_CNTL, 8), +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-phy-meson-add-GXBB-PHY-driver.patch b/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-phy-meson-add-GXBB-PHY-driver.patch new file mode 100644 index 0000000000..fd6c6c2837 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0020-FROMGIT-phy-meson-add-GXBB-PHY-driver.patch @@ -0,0 +1,292 @@ +From 60502f9c7098cc48fe332b7c596aecf4e995e2c8 Mon Sep 17 00:00:00 2001 +From: Beniamino Galvani +Date: Sun, 18 Aug 2019 15:42:54 +0200 +Subject: [PATCH 20/33] FROMGIT: phy: meson: add GXBB PHY driver + +This adds support for the USB PHY found on Amlogic GXBB SoCs. + +Signed-off-by: Beniamino Galvani +Reviewed-by: Neil Armstrong +Signed-off-by: Neil Armstrong +--- + drivers/phy/Kconfig | 8 ++ + drivers/phy/Makefile | 1 + + drivers/phy/meson-gxbb-usb2.c | 235 ++++++++++++++++++++++++++++++++++ + 3 files changed, 244 insertions(+) + create mode 100644 drivers/phy/meson-gxbb-usb2.c + +diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig +index a72f34f0d4..1e38c8741f 100644 +--- a/drivers/phy/Kconfig ++++ b/drivers/phy/Kconfig +@@ -154,6 +154,14 @@ config PHY_STM32_USBPHYC + between an HS USB OTG controller and an HS USB Host controller, + selected by an USB switch. + ++config MESON_GXBB_USB_PHY ++ bool "Amlogic Meson GXBB USB PHY" ++ depends on PHY && ARCH_MESON && MESON_GXBB ++ imply REGMAP ++ help ++ This is the generic phy driver for the Amlogic Meson GXBB ++ USB2 PHY. ++ + config MESON_GXL_USB_PHY + bool "Amlogic Meson GXL USB PHYs" + depends on PHY && ARCH_MESON && (MESON_GXL || MESON_GXM) +diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile +index 43ce62e08c..74e8d931d3 100644 +--- a/drivers/phy/Makefile ++++ b/drivers/phy/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o + obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o + obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o + obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o ++obj-$(CONFIG_MESON_GXBB_USB_PHY) += meson-gxbb-usb2.o + obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o + obj-$(CONFIG_MESON_G12A_USB_PHY) += meson-g12a-usb2.o meson-g12a-usb3-pcie.o + obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o +diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c +new file mode 100644 +index 0000000000..88c2ec69b2 +--- /dev/null ++++ b/drivers/phy/meson-gxbb-usb2.c +@@ -0,0 +1,235 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Meson8, Meson8b and GXBB USB2 PHY driver ++ * ++ * Copyright (C) 2016 Martin Blumenstingl ++ * Copyright (C) 2018 BayLibre, SAS ++ * ++ * Author: Beniamino Galvani ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define REG_CONFIG 0x00 ++ #define REG_CONFIG_CLK_EN BIT(0) ++ #define REG_CONFIG_CLK_SEL_MASK GENMASK(3, 1) ++ #define REG_CONFIG_CLK_DIV_MASK GENMASK(10, 4) ++ #define REG_CONFIG_CLK_32k_ALTSEL BIT(15) ++ #define REG_CONFIG_TEST_TRIG BIT(31) ++ ++#define REG_CTRL 0x04 ++ #define REG_CTRL_SOFT_PRST BIT(0) ++ #define REG_CTRL_SOFT_HRESET BIT(1) ++ #define REG_CTRL_SS_SCALEDOWN_MODE_MASK GENMASK(3, 2) ++ #define REG_CTRL_CLK_DET_RST BIT(4) ++ #define REG_CTRL_INTR_SEL BIT(5) ++ #define REG_CTRL_CLK_DETECTED BIT(8) ++ #define REG_CTRL_SOF_SENT_RCVD_TGL BIT(9) ++ #define REG_CTRL_SOF_TOGGLE_OUT BIT(10) ++ #define REG_CTRL_POWER_ON_RESET BIT(15) ++ #define REG_CTRL_SLEEPM BIT(16) ++ #define REG_CTRL_TX_BITSTUFF_ENN_H BIT(17) ++ #define REG_CTRL_TX_BITSTUFF_ENN BIT(18) ++ #define REG_CTRL_COMMON_ON BIT(19) ++ #define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20) ++ #define REG_CTRL_REF_CLK_SEL_SHIFT 20 ++ #define REG_CTRL_FSEL_MASK GENMASK(24, 22) ++ #define REG_CTRL_FSEL_SHIFT 22 ++ #define REG_CTRL_PORT_RESET BIT(25) ++ #define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26) ++ ++/* bits [31:26], [24:21] and [15:3] seem to be read-only */ ++#define REG_ADP_BC 0x0c ++ #define REG_ADP_BC_VBUS_VLD_EXT_SEL BIT(0) ++ #define REG_ADP_BC_VBUS_VLD_EXT BIT(1) ++ #define REG_ADP_BC_OTG_DISABLE BIT(2) ++ #define REG_ADP_BC_ID_PULLUP BIT(3) ++ #define REG_ADP_BC_DRV_VBUS BIT(4) ++ #define REG_ADP_BC_ADP_PRB_EN BIT(5) ++ #define REG_ADP_BC_ADP_DISCHARGE BIT(6) ++ #define REG_ADP_BC_ADP_CHARGE BIT(7) ++ #define REG_ADP_BC_SESS_END BIT(8) ++ #define REG_ADP_BC_DEVICE_SESS_VLD BIT(9) ++ #define REG_ADP_BC_B_VALID BIT(10) ++ #define REG_ADP_BC_A_VALID BIT(11) ++ #define REG_ADP_BC_ID_DIG BIT(12) ++ #define REG_ADP_BC_VBUS_VALID BIT(13) ++ #define REG_ADP_BC_ADP_PROBE BIT(14) ++ #define REG_ADP_BC_ADP_SENSE BIT(15) ++ #define REG_ADP_BC_ACA_ENABLE BIT(16) ++ #define REG_ADP_BC_DCD_ENABLE BIT(17) ++ #define REG_ADP_BC_VDAT_DET_EN_B BIT(18) ++ #define REG_ADP_BC_VDAT_SRC_EN_B BIT(19) ++ #define REG_ADP_BC_CHARGE_SEL BIT(20) ++ #define REG_ADP_BC_CHARGE_DETECT BIT(21) ++ #define REG_ADP_BC_ACA_PIN_RANGE_C BIT(22) ++ #define REG_ADP_BC_ACA_PIN_RANGE_B BIT(23) ++ #define REG_ADP_BC_ACA_PIN_RANGE_A BIT(24) ++ #define REG_ADP_BC_ACA_PIN_GND BIT(25) ++ #define REG_ADP_BC_ACA_PIN_FLOAT BIT(26) ++ ++#define RESET_COMPLETE_TIME 500 ++#define ACA_ENABLE_COMPLETE_TIME 50 ++ ++struct phy_meson_gxbb_usb2_priv { ++ struct regmap *regmap; ++ struct reset_ctl_bulk resets; ++#if CONFIG_IS_ENABLED(DM_REGULATOR) ++ struct udevice *phy_supply; ++#endif ++}; ++ ++static int phy_meson_gxbb_usb2_power_on(struct phy *phy) ++{ ++ struct udevice *dev = phy->dev; ++ struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); ++ uint val; ++ ++#if CONFIG_IS_ENABLED(DM_REGULATOR) ++ if (priv->phy_supply) { ++ int ret = regulator_set_enable(priv->phy_supply, true); ++ ++ if (ret) ++ return ret; ++ } ++#endif ++ ++ regmap_update_bits(priv->regmap, REG_CONFIG, ++ REG_CONFIG_CLK_32k_ALTSEL, ++ REG_CONFIG_CLK_32k_ALTSEL); ++ regmap_update_bits(priv->regmap, REG_CTRL, ++ REG_CTRL_REF_CLK_SEL_MASK, ++ 0x2 << REG_CTRL_REF_CLK_SEL_SHIFT); ++ regmap_update_bits(priv->regmap, REG_CTRL, ++ REG_CTRL_FSEL_MASK, ++ 0x5 << REG_CTRL_FSEL_SHIFT); ++ ++ /* reset the PHY */ ++ regmap_update_bits(priv->regmap, REG_CTRL, ++ REG_CTRL_POWER_ON_RESET, ++ REG_CTRL_POWER_ON_RESET); ++ udelay(RESET_COMPLETE_TIME); ++ regmap_update_bits(priv->regmap, REG_CTRL, ++ REG_CTRL_POWER_ON_RESET, ++ 0); ++ udelay(RESET_COMPLETE_TIME); ++ ++ regmap_update_bits(priv->regmap, REG_CTRL, ++ REG_CTRL_SOF_TOGGLE_OUT, ++ REG_CTRL_SOF_TOGGLE_OUT); ++ ++ /* Set host mode */ ++ regmap_update_bits(priv->regmap, REG_ADP_BC, ++ REG_ADP_BC_ACA_ENABLE, ++ REG_ADP_BC_ACA_ENABLE); ++ udelay(ACA_ENABLE_COMPLETE_TIME); ++ ++ regmap_read(priv->regmap, REG_ADP_BC, &val); ++ if (val & REG_ADP_BC_ACA_PIN_FLOAT) { ++ pr_err("Error powering on GXBB USB PHY\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int phy_meson_gxbb_usb2_power_off(struct phy *phy) ++{ ++#if CONFIG_IS_ENABLED(DM_REGULATOR) ++ struct udevice *dev = phy->dev; ++ struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); ++ ++ if (priv->phy_supply) { ++ int ret = regulator_set_enable(priv->phy_supply, false); ++ ++ if (ret) ++ return ret; ++ } ++#endif ++ ++ return 0; ++} ++ ++static struct phy_ops meson_gxbb_usb2_phy_ops = { ++ .power_on = phy_meson_gxbb_usb2_power_on, ++ .power_off = phy_meson_gxbb_usb2_power_off, ++}; ++ ++static int meson_gxbb_usb2_phy_probe(struct udevice *dev) ++{ ++ struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); ++ struct clk clk_usb_general, clk_usb; ++ int ret; ++ ++ ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap); ++ if (ret) ++ return ret; ++ ++ ret = clk_get_by_name(dev, "usb_general", &clk_usb_general); ++ if (ret) ++ return ret; ++ ++ ret = clk_enable(&clk_usb_general); ++ if (ret && ret != -ENOSYS && ret != -ENOTSUPP) { ++ pr_err("Failed to enable PHY general clock\n"); ++ return ret; ++ } ++ ++ ret = clk_get_by_name(dev, "usb", &clk_usb); ++ if (ret) ++ return ret; ++ ++ ret = clk_enable(&clk_usb); ++ if (ret && ret != -ENOSYS && ret != -ENOTSUPP) { ++ pr_err("Failed to enable PHY clock\n"); ++ return ret; ++ } ++ ++#if CONFIG_IS_ENABLED(DM_REGULATOR) ++ ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply); ++ if (ret && ret != -ENOENT) { ++ pr_err("Failed to get PHY regulator\n"); ++ return ret; ++ } ++#endif ++ ret = reset_get_bulk(dev, &priv->resets); ++ if (!ret) { ++ ret = reset_deassert_bulk(&priv->resets); ++ if (ret) { ++ pr_err("Failed to deassert reset\n"); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ ++static int meson_gxbb_usb2_phy_remove(struct udevice *dev) ++{ ++ struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); ++ ++ return reset_release_bulk(&priv->resets); ++} ++ ++static const struct udevice_id meson_gxbb_usb2_phy_ids[] = { ++ { .compatible = "amlogic,meson8-usb2-phy" }, ++ { .compatible = "amlogic,meson8b-usb2-phy" }, ++ { .compatible = "amlogic,meson-gxbb-usb2-phy" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(meson_gxbb_usb2_phy) = { ++ .name = "meson_gxbb_usb2_phy", ++ .id = UCLASS_PHY, ++ .of_match = meson_gxbb_usb2_phy_ids, ++ .probe = meson_gxbb_usb2_phy_probe, ++ .remove = meson_gxbb_usb2_phy_remove, ++ .ops = &meson_gxbb_usb2_phy_ops, ++ .priv_auto_alloc_size = sizeof(struct phy_meson_gxbb_usb2_priv), ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch b/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch new file mode 100644 index 0000000000..d85d0ddfc4 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0021-FROMGIT-arm64-dts-meson-sync-dt-and-bindings-from-v5.patch @@ -0,0 +1,817 @@ +From ba4630b67a7cdd15921b4a11b99c0c38ab1f63d4 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:44:41 +0200 +Subject: [PATCH 21/33] FROMGIT: arm64: dts: meson: sync dt and bindings from + v5.7-rc1 + +Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286 +("Linux 5.7-rc1"). + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-axg-s400.dts | 6 +- + arch/arm/dts/meson-g12-common.dtsi | 136 +++++++++++++++++++++-- + arch/arm/dts/meson-g12.dtsi | 1 + + arch/arm/dts/meson-g12a-sei510.dts | 4 +- + arch/arm/dts/meson-g12a-u200.dts | 2 +- + arch/arm/dts/meson-g12b-khadas-vim3.dtsi | 4 +- + arch/arm/dts/meson-g12b-odroid-n2.dts | 25 ++++- + arch/arm/dts/meson-gx.dtsi | 52 +++++++++ + arch/arm/dts/meson-gxbb-odroidc2.dts | 1 + + arch/arm/dts/meson-gxl-s905x-p212.dtsi | 9 +- + arch/arm/dts/meson-gxm-khadas-vim2.dts | 89 +++------------ + arch/arm/dts/meson-gxm.dtsi | 28 +++++ + arch/arm/dts/meson-khadas-vim3.dtsi | 24 +++- + arch/arm/dts/meson-sm1-khadas-vim3l.dts | 8 +- + arch/arm/dts/meson-sm1-sei610.dts | 3 +- + arch/arm/dts/meson-sm1.dtsi | 1 + + include/dt-bindings/clock/g12a-clkc.h | 2 + + include/dt-bindings/clock/gxbb-clkc.h | 1 + + 18 files changed, 295 insertions(+), 101 deletions(-) + +diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts +index 4cd2d59518..cb1360ae12 100644 +--- a/arch/arm/dts/meson-axg-s400.dts ++++ b/arch/arm/dts/meson-axg-s400.dts +@@ -313,15 +313,15 @@ + dai-tdm-slot-rx-mask-1 = <1 1>; + mclk-fs = <256>; + +- codec@0 { ++ codec-0 { + sound-dai = <&lineout>; + }; + +- codec@1 { ++ codec-1 { + sound-dai = <&speaker_amp1>; + }; + +- codec@2 { ++ codec-2 { + sound-dai = <&linein>; + }; + +diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi +index abe04f4ad7..0882ea215b 100644 +--- a/arch/arm/dts/meson-g12-common.dtsi ++++ b/arch/arm/dts/meson-g12-common.dtsi +@@ -295,17 +295,9 @@ + }; + }; + +- emmc_pins: emmc { ++ emmc_ctrl_pins: emmc-ctrl { + mux-0 { +- groups = "emmc_nand_d0", +- "emmc_nand_d1", +- "emmc_nand_d2", +- "emmc_nand_d3", +- "emmc_nand_d4", +- "emmc_nand_d5", +- "emmc_nand_d6", +- "emmc_nand_d7", +- "emmc_cmd"; ++ groups = "emmc_cmd"; + function = "emmc"; + bias-pull-up; + drive-strength-microamp = <4000>; +@@ -319,6 +311,34 @@ + }; + }; + ++ emmc_data_4b_pins: emmc-data-4b { ++ mux-0 { ++ groups = "emmc_nand_d0", ++ "emmc_nand_d1", ++ "emmc_nand_d2", ++ "emmc_nand_d3"; ++ function = "emmc"; ++ bias-pull-up; ++ drive-strength-microamp = <4000>; ++ }; ++ }; ++ ++ emmc_data_8b_pins: emmc-data-8b { ++ mux-0 { ++ groups = "emmc_nand_d0", ++ "emmc_nand_d1", ++ "emmc_nand_d2", ++ "emmc_nand_d3", ++ "emmc_nand_d4", ++ "emmc_nand_d5", ++ "emmc_nand_d6", ++ "emmc_nand_d7"; ++ function = "emmc"; ++ bias-pull-up; ++ drive-strength-microamp = <4000>; ++ }; ++ }; ++ + emmc_ds_pins: emmc-ds { + mux { + groups = "emmc_nand_ds"; +@@ -573,6 +593,17 @@ + }; + }; + ++ nor_pins: nor { ++ mux { ++ groups = "nor_d", ++ "nor_q", ++ "nor_c", ++ "nor_cs"; ++ function = "nor"; ++ bias-disable; ++ }; ++ }; ++ + pdm_din0_a_pins: pdm-din0-a { + mux { + groups = "pdm_din0_a"; +@@ -957,6 +988,57 @@ + }; + }; + ++ spicc0_x_pins: spicc0-x { ++ mux { ++ groups = "spi0_mosi_x", ++ "spi0_miso_x", ++ "spi0_clk_x"; ++ function = "spi0"; ++ drive-strength-microamp = <4000>; ++ bias-disable; ++ }; ++ }; ++ ++ spicc0_ss0_x_pins: spicc0-ss0-x { ++ mux { ++ groups = "spi0_ss0_x"; ++ function = "spi0"; ++ drive-strength-microamp = <4000>; ++ bias-disable; ++ }; ++ }; ++ ++ spicc0_c_pins: spicc0-c { ++ mux { ++ groups = "spi0_mosi_c", ++ "spi0_miso_c", ++ "spi0_ss0_c", ++ "spi0_clk_c"; ++ function = "spi0"; ++ drive-strength-microamp = <4000>; ++ bias-disable; ++ }; ++ }; ++ ++ spicc1_pins: spicc1 { ++ mux { ++ groups = "spi1_mosi", ++ "spi1_miso", ++ "spi1_clk"; ++ function = "spi1"; ++ drive-strength-microamp = <4000>; ++ }; ++ }; ++ ++ spicc1_ss0_pins: spicc1-ss0 { ++ mux { ++ groups = "spi1_ss0"; ++ function = "spi1"; ++ drive-strength-microamp = <4000>; ++ bias-disable; ++ }; ++ }; ++ + tdm_a_din0_pins: tdm-a-din0 { + mux { + groups = "tdm_a_din0"; +@@ -2051,6 +2133,39 @@ + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; + }; + ++ spicc0: spi@13000 { ++ compatible = "amlogic,meson-g12a-spicc"; ++ reg = <0x0 0x13000 0x0 0x44>; ++ interrupts = ; ++ clocks = <&clkc CLKID_SPICC0>, ++ <&clkc CLKID_SPICC0_SCLK>; ++ clock-names = "core", "pclk"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spicc1: spi@15000 { ++ compatible = "amlogic,meson-g12a-spicc"; ++ reg = <0x0 0x15000 0x0 0x44>; ++ interrupts = ; ++ clocks = <&clkc CLKID_SPICC1>, ++ <&clkc CLKID_SPICC1_SCLK>; ++ clock-names = "core", "pclk"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spifc: spi@14000 { ++ compatible = "amlogic,meson-gxbb-spifc"; ++ status = "disabled"; ++ reg = <0x0 0x14000 0x0 0x80>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ clocks = <&clkc CLKID_CLK81>; ++ }; ++ + pwm_ef: pwm@19000 { + compatible = "amlogic,meson-g12a-ee-pwm"; + reg = <0x0 0x19000 0x0 0x20>; +@@ -2220,6 +2335,7 @@ + dr_mode = "host"; + snps,dis_u2_susphy_quirk; + snps,quirk-frame-length-adjustment; ++ snps,parkmode-disable-ss-quirk; + }; + }; + +diff --git a/arch/arm/dts/meson-g12.dtsi b/arch/arm/dts/meson-g12.dtsi +index 03054c4788..55d39020ec 100644 +--- a/arch/arm/dts/meson-g12.dtsi ++++ b/arch/arm/dts/meson-g12.dtsi +@@ -56,6 +56,7 @@ + <&clkc_audio AUD_CLKID_PDM_DCLK>, + <&clkc_audio AUD_CLKID_PDM_SYSCLK>; + clock-names = "pclk", "dclk", "sysclk"; ++ resets = <&clkc_audio AUD_RESET_PDM>; + status = "disabled"; + }; + +diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts +index 2ac9e3a43b..b00d0468c7 100644 +--- a/arch/arm/dts/meson-g12a-sei510.dts ++++ b/arch/arm/dts/meson-g12a-sei510.dts +@@ -269,7 +269,7 @@ + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + +- codec@0 { ++ codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; +@@ -472,7 +472,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts +index 2a324f0136..a26bfe7255 100644 +--- a/arch/arm/dts/meson-g12a-u200.dts ++++ b/arch/arm/dts/meson-g12a-u200.dts +@@ -271,7 +271,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi +index 554863429a..c33e85fbda 100644 +--- a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi ++++ b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi +@@ -8,6 +8,8 @@ + #include + + / { ++ model = "Khadas VIM3"; ++ + vddcpu_a: regulator-vddcpu-a { + /* + * MP8756GD Regulator. +@@ -48,7 +50,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12A-KHADAS-VIM3"; ++ model = "G12B-KHADAS-VIM3"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts +index 0e54c1dc28..169ea283d4 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2.dts ++++ b/arch/arm/dts/meson-g12b-odroid-n2.dts +@@ -208,7 +208,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12A-ODROIDN2"; ++ model = "G12B-ODROID-N2"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +@@ -435,7 +435,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +@@ -451,6 +451,27 @@ + vqmmc-supply = <&flash_1v8>; + }; + ++/* ++ * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins ++ * and eMMC Data 4 to 7 pins. ++ * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, ++ * and change bus-width to 4 then spifc can be enabled. ++ * The SW1 slide should also be set to the correct position. ++ */ ++&spifc { ++ status = "disabled"; ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ ++ mx25u64: spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "mxicy,mx25u6435f", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ }; ++}; ++ + &tdmif_b { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi +index 40db06e28b..03f79fe045 100644 +--- a/arch/arm/dts/meson-gx.dtsi ++++ b/arch/arm/dts/meson-gx.dtsi +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -83,6 +84,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +@@ -92,6 +94,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; ++ #cooling-cells = <2>; + }; + + cpu2: cpu@2 { +@@ -101,6 +104,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; ++ #cooling-cells = <2>; + }; + + cpu3: cpu@3 { +@@ -110,6 +114,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; ++ #cooling-cells = <2>; + }; + + l2: l2-cache0 { +@@ -117,6 +122,53 @@ + }; + }; + ++ thermal-zones { ++ cpu-thermal { ++ polling-delay-passive = <250>; /* milliseconds */ ++ polling-delay = <1000>; /* milliseconds */ ++ ++ thermal-sensors = <&scpi_sensors 0>; ++ ++ trips { ++ cpu_passive: cpu-passive { ++ temperature = <80000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ ++ cpu_hot: cpu-hot { ++ temperature = <90000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "hot"; ++ }; ++ ++ cpu_critical: cpu-critical { ++ temperature = <110000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "critical"; ++ }; ++ }; ++ ++ cpu_cooling_maps: cooling-maps { ++ map0 { ++ trip = <&cpu_passive>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ map1 { ++ trip = <&cpu_hot>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ }; ++ + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , +diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts +index 6ded279c40..b46ef985bb 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2.dts ++++ b/arch/arm/dts/meson-gxbb-odroidc2.dts +@@ -248,6 +248,7 @@ + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; ++ linux,rc-map-name = "rc-odroid"; + }; + + &gpio_ao { +diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +index 43eb7d149e..6ac678f88b 100644 +--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi +@@ -15,7 +15,6 @@ + / { + aliases { + serial0 = &uart_AO; +- serial1 = &uart_A; + ethernet0 = ðmac; + }; + +@@ -180,6 +179,14 @@ + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; ++ max-speed = <2000000>; ++ clocks = <&wifi32k>; ++ clock-names = "lpo"; ++ }; + }; + + &uart_AO { +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts +index f82f25c1a5..27eeab71ec 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts ++++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts +@@ -8,7 +8,6 @@ + /dts-v1/; + + #include +-#include + + #include "meson-gxm.dtsi" + +@@ -100,49 +99,6 @@ + clock-names = "ext_clock"; + }; + +- thermal-zones { +- cpu-thermal { +- polling-delay-passive = <250>; /* milliseconds */ +- polling-delay = <1000>; /* milliseconds */ +- +- thermal-sensors = <&scpi_sensors 0>; +- +- trips { +- cpu_alert0: cpu-alert0 { +- temperature = <70000>; /* millicelsius */ +- hysteresis = <2000>; /* millicelsius */ +- type = "active"; +- }; +- +- cpu_alert1: cpu-alert1 { +- temperature = <80000>; /* millicelsius */ +- hysteresis = <2000>; /* millicelsius */ +- type = "passive"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert0>; +- cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; +- }; +- +- map1 { +- trip = <&cpu_alert1>; +- cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>, +- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; +- + hdmi_5v: regulator-hdmi-5v { + compatible = "regulator-fixed"; + +@@ -198,36 +154,23 @@ + hdmi-phandle = <&hdmi_tx>; + }; + +-&cpu0 { +- #cooling-cells = <2>; +-}; +- +-&cpu1 { +- #cooling-cells = <2>; +-}; +- +-&cpu2 { +- #cooling-cells = <2>; +-}; + +-&cpu3 { +- #cooling-cells = <2>; +-}; +- +-&cpu4 { +- #cooling-cells = <2>; +-}; +- +-&cpu5 { +- #cooling-cells = <2>; +-}; +- +-&cpu6 { +- #cooling-cells = <2>; +-}; ++&cpu_cooling_maps { ++ map0 { ++ cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; ++ }; + +-&cpu7 { +- #cooling-cells = <2>; ++ map1 { ++ cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>, ++ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; + }; + + ðmac { +@@ -327,7 +270,7 @@ + #size-cells = <0>; + + bus-width = <4>; +- max-frequency = <50000000>; ++ max-frequency = <60000000>; + + non-removable; + disable-wp; +diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi +index 5ff64a0d2d..b6f89f108e 100644 +--- a/arch/arm/dts/meson-gxm.dtsi ++++ b/arch/arm/dts/meson-gxm.dtsi +@@ -49,6 +49,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; ++ #cooling-cells = <2>; + }; + + cpu5: cpu@101 { +@@ -58,6 +59,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; ++ #cooling-cells = <2>; + }; + + cpu6: cpu@102 { +@@ -67,6 +69,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; ++ #cooling-cells = <2>; + }; + + cpu7: cpu@103 { +@@ -76,6 +79,7 @@ + enable-method = "psci"; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; ++ #cooling-cells = <2>; + }; + }; + }; +@@ -124,6 +128,30 @@ + compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; + }; + ++&cpu_cooling_maps { ++ map0 { ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ map1 { ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++}; ++ + &saradc { + compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; + }; +diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi +index 90815fa25e..094ecf2222 100644 +--- a/arch/arm/dts/meson-khadas-vim3.dtsi ++++ b/arch/arm/dts/meson-khadas-vim3.dtsi +@@ -9,8 +9,6 @@ + #include + + / { +- model = "Khadas VIM3"; +- + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; +@@ -312,7 +310,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +@@ -328,6 +326,26 @@ + vqmmc-supply = <&emmc_1v8>; + }; + ++/* ++ * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS ++ * and eMMC Data 4 to 7 pins. ++ * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, ++ * and change bus-width to 4 then spifc can be enabled. ++ */ ++&spifc { ++ status = "disabled"; ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ ++ w25q32: spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "winbond,w25q128fw", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ }; ++}; ++ + &uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; +diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +index 1001b376ca..dbbf29a0db 100644 +--- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts ++++ b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +@@ -72,9 +72,10 @@ + /* + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between +- * an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving +- * these differential lines is shared between the USB3.0 controller +- * and the PCIe Controller, thus only a single controller can use it. ++ * an USB3.0 Type A connector and a M.2 Key M slot. ++ * The PHY driving these differential lines is shared between ++ * the USB3.0 controller and the PCIe Controller, thus only ++ * a single controller can use it. + * If the MCU is configured to mux the PCIe/USB3.0 differential lines + * to the M.2 Key M slot, uncomment the following block to disable + * USB3.0 from the USB Complex and enable the PCIe controller. +@@ -82,7 +83,6 @@ + * testing purposes, but instead rely on the firmware/bootloader to + * update these nodes accordingly if PCIe mode is selected by the MCU. + */ +- + /* + &pcie { + status = "okay"; +diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts +index a8bb3fa9fe..dfb2438851 100644 +--- a/arch/arm/dts/meson-sm1-sei610.dts ++++ b/arch/arm/dts/meson-sm1-sei610.dts +@@ -518,7 +518,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +@@ -593,6 +593,7 @@ + compatible = "brcm,bcm43438-bt"; + interrupt-parent = <&gpio_intc>; + interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "host-wakeup"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; +diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi +index d847a3fcbc..d4ec735fb1 100644 +--- a/arch/arm/dts/meson-sm1.dtsi ++++ b/arch/arm/dts/meson-sm1.dtsi +@@ -448,6 +448,7 @@ + <&clkc_audio AUD_CLKID_PDM_DCLK>, + <&clkc_audio AUD_CLKID_PDM_SYSCLK>; + clock-names = "pclk", "dclk", "sysclk"; ++ resets = <&clkc_audio AUD_RESET_PDM>; + status = "disabled"; + }; + }; +diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h +index 0837c1a7ae..b0d65d73db 100644 +--- a/include/dt-bindings/clock/g12a-clkc.h ++++ b/include/dt-bindings/clock/g12a-clkc.h +@@ -143,5 +143,7 @@ + #define CLKID_CPU1_CLK 253 + #define CLKID_CPU2_CLK 254 + #define CLKID_CPU3_CLK 255 ++#define CLKID_SPICC0_SCLK 258 ++#define CLKID_SPICC1_SCLK 261 + + #endif /* __G12A_CLKC_H */ +diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h +index db0763e961..4073eb7a9d 100644 +--- a/include/dt-bindings/clock/gxbb-clkc.h ++++ b/include/dt-bindings/clock/gxbb-clkc.h +@@ -146,5 +146,6 @@ + #define CLKID_CTS_VDAC 201 + #define CLKID_HDMI_TX 202 + #define CLKID_HDMI 205 ++#define CLKID_ACODEC 206 + + #endif /* __GXBB_CLKC_H */ +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-arm-dts-meson-gxm-khadas-vim2-u-boot-enable-.patch b/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-arm-dts-meson-gxm-khadas-vim2-u-boot-enable-.patch new file mode 100644 index 0000000000..115b2a62a2 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0022-FROMGIT-arm-dts-meson-gxm-khadas-vim2-u-boot-enable-.patch @@ -0,0 +1,40 @@ +From 708e5bd515cbc44e0fbf30f538788870efc7b78f Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:44:42 +0200 +Subject: [PATCH 22/33] FROMGIT: arm: dts: meson-gxm-khadas-vim2-u-boot: enable + SPI NOR flash + +Activate the on-board SPI NOR Flash by enabling the SPI controller and +disabling the DS eMMC pin in the VIM2 u-boot.dtsi file. + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi +index c35158d7e9..bec9e05b09 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi +@@ -5,3 +5,18 @@ + */ + + #include "meson-gx-u-boot.dtsi" ++ ++/ { ++ aliases { ++ spi0 = &spifc; ++ }; ++}; ++ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>; ++}; ++ ++&spifc { ++ status = "okay"; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0023-FROMGIT-configs-khadas-vim2-enable-support-for-SPI-N.patch b/projects/Amlogic/patches/u-boot/u-boot-0023-FROMGIT-configs-khadas-vim2-enable-support-for-SPI-N.patch new file mode 100644 index 0000000000..bc74796219 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0023-FROMGIT-configs-khadas-vim2-enable-support-for-SPI-N.patch @@ -0,0 +1,50 @@ +From 31c3732a736db4c2a9fa7606d9f587ebca3c62e0 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:44:43 +0200 +Subject: [PATCH 23/33] FROMGIT: configs: khadas-vim2: enable support for SPI + NOR flash + +Add the necessary configs to use the SPI NOR flash. + +Signed-off-by: Neil Armstrong +--- + configs/khadas-vim2_defconfig | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig +index a533566410..5633f6da9c 100644 +--- a/configs/khadas-vim2_defconfig ++++ b/configs/khadas-vim2_defconfig +@@ -19,6 +19,8 @@ CONFIG_CMD_ADC=y + CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y + CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set +@@ -30,7 +32,10 @@ CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_SARADC_MESON=y + CONFIG_DM_MMC=y + CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y + CONFIG_DM_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH_WINBOND=y + CONFIG_PHY_REALTEK=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +@@ -44,6 +49,9 @@ CONFIG_DEBUG_UART_MESON=y + CONFIG_DEBUG_UART_ANNOUNCE=y + CONFIG_DEBUG_UART_SKIP_INIT=y + CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0024-FROMGIT-arm-dts-meson-khadas-vim3-enable-SPI-NOR-fla.patch b/projects/Amlogic/patches/u-boot/u-boot-0024-FROMGIT-arm-dts-meson-khadas-vim3-enable-SPI-NOR-fla.patch new file mode 100644 index 0000000000..f4d5158627 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0024-FROMGIT-arm-dts-meson-khadas-vim3-enable-SPI-NOR-fla.patch @@ -0,0 +1,75 @@ +From 26f693a99848613acb1493fce40c72279830a5a5 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:44:44 +0200 +Subject: [PATCH 24/33] FROMGIT: arm: dts: meson-khadas-vim3: enable SPI NOR + flash + +Enable the SPI flash controller and reduce the usable eMMC data pins to 4 +to permit using the on-board SPI NOR Flash. + +Signed-off-by: Neil Armstrong +--- + .../meson-g12b-a311d-khadas-vim3-u-boot.dtsi | 7 +++++++ + arch/arm/dts/meson-khadas-vim3-u-boot.dtsi | 21 +++++++++++++++++++ + .../dts/meson-sm1-khadas-vim3l-u-boot.dtsi | 7 +++++++ + 3 files changed, 35 insertions(+) + create mode 100644 arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-khadas-vim3-u-boot.dtsi + create mode 100644 arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi + +diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi +new file mode 100644 +index 0000000000..f66eca14b1 +--- /dev/null ++++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-khadas-vim3-u-boot.dtsi" +diff --git a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi +new file mode 100644 +index 0000000000..81fd5be378 +--- /dev/null ++++ b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi +@@ -0,0 +1,21 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++/ { ++ aliases { ++ spi0 = &spifc; ++ }; ++}; ++ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_4b_pins>, <&emmc_ds_pins>; ++ bus-width = <4>; ++}; ++ ++&spifc { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi +new file mode 100644 +index 0000000000..f66eca14b1 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-khadas-vim3-u-boot.dtsi" +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0025-FROMGIT-configs-khadas-vim3-enable-support-for-SPI-N.patch b/projects/Amlogic/patches/u-boot/u-boot-0025-FROMGIT-configs-khadas-vim3-enable-support-for-SPI-N.patch new file mode 100644 index 0000000000..7d9499be5c --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0025-FROMGIT-configs-khadas-vim3-enable-support-for-SPI-N.patch @@ -0,0 +1,85 @@ +From 9527f3aa3d4d3acd7793137c34b2c86e7d83b8d5 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 20 Apr 2020 15:44:45 +0200 +Subject: [PATCH 25/33] FROMGIT: configs: khadas-vim3: enable support for SPI + NOR flash + +Enable the necessary configs to make usage of the SPI NOR Flash. + +Signed-off-by: Neil Armstrong +--- + configs/khadas-vim3_defconfig | 9 +++++++++ + configs/khadas-vim3l_defconfig | 9 +++++++++ + 2 files changed, 18 insertions(+) + +diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig +index 72987d9523..692138eb11 100644 +--- a/configs/khadas-vim3_defconfig ++++ b/configs/khadas-vim3_defconfig +@@ -18,6 +18,8 @@ CONFIG_MISC_INIT_R=y + CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y + CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set +@@ -28,6 +30,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_DM_MMC=y + CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH_WINBOND=y + CONFIG_PHY_REALTEK=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +@@ -41,6 +47,9 @@ CONFIG_DEBUG_UART_MESON=y + CONFIG_DEBUG_UART_ANNOUNCE=y + CONFIG_DEBUG_UART_SKIP_INIT=y + CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y +diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig +index 7e2ad41bca..28c20c0d6d 100644 +--- a/configs/khadas-vim3l_defconfig ++++ b/configs/khadas-vim3l_defconfig +@@ -18,6 +18,8 @@ CONFIG_MISC_INIT_R=y + CONFIG_CMD_GPIO=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_SPI=y + CONFIG_CMD_USB=y + CONFIG_CMD_USB_MASS_STORAGE=y + # CONFIG_CMD_SETEXPR is not set +@@ -28,6 +30,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y + CONFIG_NET_RANDOM_ETHADDR=y + CONFIG_DM_MMC=y + CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH_WINBOND=y + CONFIG_PHY_REALTEK=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y +@@ -43,6 +49,9 @@ CONFIG_DEBUG_UART_MESON=y + CONFIG_DEBUG_UART_ANNOUNCE=y + CONFIG_DEBUG_UART_SKIP_INIT=y + CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y + CONFIG_USB=y + CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0026-FROMGIT-usb-dwc3-meson-g12a-add-power-on-off-of-the-.patch b/projects/Amlogic/patches/u-boot/u-boot-0026-FROMGIT-usb-dwc3-meson-g12a-add-power-on-off-of-the-.patch new file mode 100644 index 0000000000..0e0e7a002e --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0026-FROMGIT-usb-dwc3-meson-g12a-add-power-on-off-of-the-.patch @@ -0,0 +1,63 @@ +From ef9479b0c9873bec6acd31b24db176e71d6e7624 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Tue, 21 Apr 2020 10:17:42 +0200 +Subject: [PATCH 26/33] FROMGIT: usb: dwc3-meson-g12a: add power-on/off of the + PHYs + +Power on/off the PHYs to enable power to the USB ports, fixing USB support +on Khadas VIM3/VIM3L boards. + +The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the +DWC2 and DWC3 controller and the other one directly connected to the DWC3 +controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller +and a DW-PCIE controller. +All PHYs are optional, but it's type (usb2/usb3) and position are important +to determine it's capabilities, thus they are stored in a fixed size +array and the phy-name determines it's position, it's position determining +it's type and functionnalities. +This is why we need to loop over the array to power on all the DT provided +PHYs. + +Signed-off-by: Neil Armstrong +Reviewed-by: Marek Vasut +--- + drivers/usb/dwc3/dwc3-meson-g12a.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c +index 832bcd70ff..b0e3c96616 100644 +--- a/drivers/usb/dwc3/dwc3-meson-g12a.c ++++ b/drivers/usb/dwc3/dwc3-meson-g12a.c +@@ -408,6 +408,15 @@ static int dwc3_meson_g12a_probe(struct udevice *dev) + goto err_phy_init; + } + ++ for (i = 0; i < PHY_COUNT; ++i) { ++ if (!priv->phys[i].dev) ++ continue; ++ ++ ret = generic_phy_power_on(&priv->phys[i]); ++ if (ret) ++ goto err_phy_init; ++ } ++ + return 0; + + err_phy_init: +@@ -430,6 +439,13 @@ static int dwc3_meson_g12a_remove(struct udevice *dev) + + clk_release_all(&priv->clk, 1); + ++ for (i = 0; i < PHY_COUNT; ++i) { ++ if (!priv->phys[i].dev) ++ continue; ++ ++ generic_phy_power_off(&priv->phys[i]); ++ } ++ + for (i = 0 ; i < PHY_COUNT ; ++i) { + if (!priv->phys[i].dev) + continue; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0027-FROMGIT-odroid-c2-enable-USB-host-controller.patch b/projects/Amlogic/patches/u-boot/u-boot-0027-FROMGIT-odroid-c2-enable-USB-host-controller.patch new file mode 100644 index 0000000000..b6e070e2d9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0027-FROMGIT-odroid-c2-enable-USB-host-controller.patch @@ -0,0 +1,84 @@ +From 6aab17c13bb48f505f8d45c727238945a254ca3c Mon Sep 17 00:00:00 2001 +From: Beniamino Galvani +Date: Sun, 18 Aug 2019 15:42:55 +0200 +Subject: [PATCH 27/33] FROMGIT: odroid-c2: enable USB host controller + +Enable the second USB controller, which is connected to a hub with 4 +ports. The first controller is for the OTG port and is currently not +supported. + +Signed-off-by: Beniamino Galvani +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 8 ++++++++ + configs/odroid-c2_defconfig | 7 +++++++ + include/configs/meson64.h | 5 +++++ + 3 files changed, 20 insertions(+) + +diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi +index c35158d7e9..484b40504d 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi ++++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi +@@ -5,3 +5,11 @@ + */ + + #include "meson-gx-u-boot.dtsi" ++ ++&usb0 { ++ status = "disabled"; ++}; ++ ++&usb1 { ++ hnp-srp-disable; ++}; +diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig +index 64fbfdf064..82620f4452 100644 +--- a/configs/odroid-c2_defconfig ++++ b/configs/odroid-c2_defconfig +@@ -18,6 +18,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_I2C=y + # CONFIG_CMD_LOADS is not set + CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y + # CONFIG_CMD_SETEXPR is not set + CONFIG_CMD_REGULATOR=y + CONFIG_OF_CONTROL=y +@@ -31,13 +32,19 @@ CONFIG_MMC_MESON_GX=y + CONFIG_PHY_REALTEK=y + CONFIG_DM_ETH=y + CONFIG_ETH_DESIGNWARE=y ++CONFIG_PHY=y ++CONFIG_MESON_GXBB_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_GXBB=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y + CONFIG_DM_RESET=y + CONFIG_DEBUG_UART_MESON=y + CONFIG_DEBUG_UART_ANNOUNCE=y + CONFIG_DEBUG_UART_SKIP_INIT=y + CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_DWC2=y + CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index 50707a3197..851cba807f 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -16,6 +16,11 @@ + #define GICC_BASE 0xc4302000 + #endif + ++/* USB */ ++#if defined(CONFIG_MESON_GXBB) ++#define CONFIG_DWC2_UTMI_WIDTH 16 ++#endif ++ + /* For splashscreen */ + #ifdef CONFIG_DM_VIDEO + #define CONFIG_VIDEO_BMP_RLE8 +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0028-FROMGIT-ARM-dts-Import-Odroid-C4-DT-from-Linux-5.X.patch b/projects/Amlogic/patches/u-boot/u-boot-0028-FROMGIT-ARM-dts-Import-Odroid-C4-DT-from-Linux-5.X.patch new file mode 100644 index 0000000000..7042ad72d2 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0028-FROMGIT-ARM-dts-Import-Odroid-C4-DT-from-Linux-5.X.patch @@ -0,0 +1,432 @@ +From 9a5818bd7e3812f8fe5c45fb7342e241c878a2db Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 24 Apr 2020 02:58:30 +0000 +Subject: [PATCH 28/33] FROMGIT: ARM: dts: Import Odroid C4 DT from Linux 5.X + +Signed-off-by: Neil Armstrong +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/meson-sm1-odroid-c4.dts | 399 +++++++++++++++++++++++++++ + 2 files changed, 400 insertions(+) + create mode 100644 arch/arm/dts/meson-sm1-odroid-c4.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index a80ce9c791..8f9828b63a 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -156,6 +156,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-g12b-odroid-n2.dtb \ + meson-g12b-a311d-khadas-vim3.dtb \ + meson-sm1-khadas-vim3l.dtb \ ++ meson-sm1-odroid-c4.dtb \ + meson-sm1-sei610.dtb + dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ + tegra20-medcom-wide.dtb \ +diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts +new file mode 100644 +index 0000000000..4882c604a7 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid-c4.dts +@@ -0,0 +1,399 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Dongjin Kim ++ */ ++ ++/dts-v1/; ++ ++#include "meson-sm1.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "hardkernel,odroid-c4", "amlogic,sm1"; ++ model = "Hardkernel ODROID-C4"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ panic-indicator; ++ }; ++ }; ++ ++ tflash_vdd: regulator-tflash_vdd { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ tf_io: gpio-regulator-tf_io { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "TF_IO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpios = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ }; ++ ++ flash_1v8: regulator-flash_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "FLASH_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ main_12v: regulator-main_12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "12V"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-always-on; ++ }; ++ ++ vcc_5v: regulator-vcc_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ vin-supply = <&main_12v>; ++ }; ++ ++ vcc_1v8: regulator-vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ /* FIXME: actually controlled by VDDCPU_B_EN */ ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ /* ++ * MP8756GD Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&main_12v>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ hub_5v: regulator-hub_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "HUB_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_5v>; ++ ++ /* Connected to the Hub CHIPENABLE, LOW sets low power state */ ++ gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ usb_pwr_en: regulator-usb_pwr_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB_PWR_EN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_5v>; ++ ++ /* Connected to the microUSB port power enable */ ++ gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&main_12v>; ++ regulator-always-on; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU1_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU2_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU3_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&ext_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ reset-assert-us = <10000>; ++ reset-deassert-us = <30000>; ++ reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_14 */ ++ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; ++}; ++ ++&gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOH */ ++ "", "", "", "", "", ++ "PIN_36", /* GPIOH_5 */ ++ "PIN_26", /* GPIOH_6 */ ++ "PIN_32", /* GPIOH_7 */ ++ "", ++ /* BOOT */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOC */ ++ "", "", "", "", "", "", "", "", ++ /* GPIOA */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", ++ "PIN_27", /* GPIOA_14 */ ++ "PIN_28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "PIN_16", /* GPIOX_0 */ ++ "PIN_18", /* GPIOX_1 */ ++ "PIN_22", /* GPIOX_2 */ ++ "PIN_11", /* GPIOX_3 */ ++ "PIN_13", /* GPIOX_4 */ ++ "PIN_7", /* GPIOX_5 */ ++ "PIN_33", /* GPIOX_6 */ ++ "PIN_15", /* GPIOX_7 */ ++ "PIN_19", /* GPIOX_8 */ ++ "PIN_21", /* GPIOX_9 */ ++ "PIN_24", /* GPIOX_10 */ ++ "PIN_23", /* GPIOX_11 */ ++ "PIN_8", /* GPIOX_12 */ ++ "PIN_10", /* GPIOX_13 */ ++ "PIN_29", /* GPIOX_14 */ ++ "PIN_31", /* GPIOX_15 */ ++ "PIN_12", /* GPIOX_16 */ ++ "PIN_3", /* GPIOX_17 */ ++ "PIN_5", /* GPIOX_18 */ ++ "PIN_35"; /* GPIOX_19 */ ++ ++ /* ++ * WARNING: The USB Hub on the Odroid-C4 needs a reset signal ++ * to be turned high in order to be detected by the USB Controller ++ * This signal should be handled by a USB specific power sequence ++ * in order to reset the Hub when USB bus is powered down. ++ */ ++ usb-hub { ++ gpio-hog; ++ gpios = ; ++ output-high; ++ line-name = "usb-hub-reset"; ++ }; ++}; ++ ++&gpio_ao { ++ gpio-line-names = ++ /* GPIOAO */ ++ "", "", "", "", ++ "PIN_47", /* GPIOAO_4 */ ++ "", "", ++ "PIN_45", /* GPIOAO_7 */ ++ "PIN_46", /* GPIOAO_8 */ ++ "PIN_44", /* GPIOAO_9 */ ++ "PIN_42", /* GPIOAO_10 */ ++ "", ++ /* GPIOE */ ++ "", "", ""; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&vcc_5v>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <200000000>; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ disable-wp; ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&tf_io>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&flash_1v8>; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++ vbus-supply = <&usb_pwr_en>; ++}; ++ ++&usb2_phy0 { ++ phy-supply = <&vcc_5v>; ++}; ++ ++&usb2_phy1 { ++ /* Enable the hub which is connected to this port */ ++ phy-supply = <&hub_5v>; ++}; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0029-FROMGIT-boards-amlogic-add-Odroid-C4-support.patch b/projects/Amlogic/patches/u-boot/u-boot-0029-FROMGIT-boards-amlogic-add-Odroid-C4-support.patch new file mode 100644 index 0000000000..08d94729d9 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0029-FROMGIT-boards-amlogic-add-Odroid-C4-support.patch @@ -0,0 +1,237 @@ +From 5936436f1ea848ea045708ed7d86d326d3508101 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 24 Apr 2020 03:09:12 +0000 +Subject: [PATCH 29/33] FROMGIT: boards: amlogic: add Odroid C4 support + +Odroid C4 is an SM1 device, the board config is adapted from VIM3L and +README is based on the README.odroid-n2 from the same vendor. + +Signed-off-by: Christian Hewitt +--- + board/amlogic/w400/MAINTAINERS | 1 + + board/amlogic/w400/README.odroid-c4 | 134 ++++++++++++++++++++++++++++ + configs/odroid-c4_defconfig | 62 +++++++++++++ + 3 files changed, 197 insertions(+) + create mode 100644 board/amlogic/w400/README.odroid-c4 + create mode 100644 configs/odroid-c4_defconfig + +diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS +index 2ff90039ca..b28dd7f0e4 100644 +--- a/board/amlogic/w400/MAINTAINERS ++++ b/board/amlogic/w400/MAINTAINERS +@@ -6,3 +6,4 @@ F: board/amlogic/w400/ + F: configs/khadas-vim3_defconfig + F: configs/khadas-vim3l_defconfig + F: configs/odroid-n2_defconfig ++F: configs/odroid-c4_defconfig +diff --git a/board/amlogic/w400/README.odroid-c4 b/board/amlogic/w400/README.odroid-c4 +new file mode 100644 +index 0000000000..b1bca75891 +--- /dev/null ++++ b/board/amlogic/w400/README.odroid-c4 +@@ -0,0 +1,134 @@ ++U-Boot for ODROID-C4 ++==================== ++ ++ODROID-N2 is a single board computer manufactured by Hardkernel ++Co. Ltd with the following specifications: ++ ++ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC ++ - 2GB or 4GB LPDDR4 SDRAM ++ - Gigabit Ethernet ++ - HDMI 2.1 display ++ - 40-pin GPIO header ++ - 7-pin GPIO expansion header ++ - 4x USB 3.0 Host ++ - 1x USB 2.0 Host/OTG (micro) ++ - eMMC, microSD ++ - UART serial ++ - Infrared receiver ++ ++Schematics are available on the manufacturer website. ++ ++Currently the U-Boot port supports the following devices: ++ - serial ++ - eMMC, microSD ++ - Ethernet ++ - I2C ++ - Regulators ++ - Reset controller ++ - Clock controller ++ - ADC ++ ++u-boot compilation ++================== ++ ++ > export ARCH=arm ++ > export CROSS_COMPILE=aarch64-none-elf- ++ > make odroid-c4_defconfig ++ > make ++ ++Image creation ++============== ++ ++Amlogic doesn't provide sources for the firmware and for tools needed ++to create the bootloader image, so it is necessary to obtain them from ++the git tree published by the board vendor: ++ ++ > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz ++ > wget https://releases.linaro.org/archive/14.04/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz ++ > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz ++ > tar xvf gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz ++ > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2014.04_linux/bin:$PATH ++ ++ > DIR=odroidc4-u-boot ++ > git clone --depth 1 \ ++ https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 \ ++ $DIR ++ ++ > cd odroidc4-u-boot ++ > make odroidc4_defconfig ++ > make ++ > export UBOOTDIR=$PWD ++ ++ Go back to mainline U-Boot source tree then : ++ > mkdir fip ++ ++ > cp $UBOOTDIR/build/scp_task/bl301.bin fip/ ++ > cp $UBOOTDIR/build/board/hardkernel/odroidc4/firmware/acs.bin fip/ ++ > cp $UBOOTDIR/fip/g12a/bl2.bin fip/ ++ > cp $UBOOTDIR/fip/g12a/bl30.bin fip/ ++ > cp $UBOOTDIR/fip/g12a/bl31.img fip/ ++ > cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/piei.fw fip/ ++ > cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/ ++ > cp u-boot.bin fip/bl33.bin ++ ++ > sh fip/blx_fix.sh \ ++ fip/bl30.bin \ ++ fip/zero_tmp \ ++ fip/bl30_zero.bin \ ++ fip/bl301.bin \ ++ fip/bl301_zero.bin \ ++ fip/bl30_new.bin \ ++ bl30 ++ ++ > sh fip/blx_fix.sh \ ++ fip/bl2.bin \ ++ fip/zero_tmp \ ++ fip/bl2_zero.bin \ ++ fip/acs.bin \ ++ fip/bl21_zero.bin \ ++ fip/bl2_new.bin \ ++ bl2 ++ ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ ++ --output fip/bl30_new.bin.g12a.enc \ ++ --level v3 ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ ++ --output fip/bl30_new.bin.enc \ ++ --level v3 --type bl30 ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \ ++ --output fip/bl31.img.enc \ ++ --level v3 --type bl31 ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \ ++ --output fip/bl33.bin.enc \ ++ --level v3 --type bl33 --compress lz4 ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \ ++ --output fip/bl2.n.bin.sig ++ > $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \ ++ --output fip/u-boot.bin \ ++ --bl2 fip/bl2.n.bin.sig \ ++ --bl30 fip/bl30_new.bin.enc \ ++ --bl31 fip/bl31.img.enc \ ++ --bl33 fip/bl33.bin.enc \ ++ --ddrfw1 fip/ddr4_1d.fw \ ++ --ddrfw2 fip/ddr4_2d.fw \ ++ --ddrfw3 fip/ddr3_1d.fw \ ++ --ddrfw4 fip/piei.fw \ ++ --ddrfw5 fip/lpddr4_1d.fw \ ++ --ddrfw6 fip/lpddr4_2d.fw \ ++ --ddrfw7 fip/diag_lpddr4.fw \ ++ --ddrfw8 fip/aml_ddr.fw \ ++ --ddrfw9 fip/lpddr3_1d.fw \ ++ --level v3 ++ ++and then write the image to SD with: ++ ++ > DEV=/dev/your_sd_device ++ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 ++ > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 +diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig +new file mode 100644 +index 0000000000..ab7d588e98 +--- /dev/null ++++ b/configs/odroid-c4_defconfig +@@ -0,0 +1,62 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="w400" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_MESON_G12A=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" odroid-c4" ++CONFIG_DEBUG_UART=y ++CONFIG_OF_BOARD_SETUP=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_RESET=y ++CONFIG_DEBUG_UART_MESON=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_USB=y ++CONFIG_DM_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0030-FROMGIT-arm-dts-khadas-vim3-include-meson-g12-common.patch b/projects/Amlogic/patches/u-boot/u-boot-0030-FROMGIT-arm-dts-khadas-vim3-include-meson-g12-common.patch new file mode 100644 index 0000000000..0579e65c6a --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0030-FROMGIT-arm-dts-khadas-vim3-include-meson-g12-common.patch @@ -0,0 +1,26 @@ +From 109f9409fea47eefd0859fcf962da71188dca9d8 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 29 Apr 2020 09:37:55 +0200 +Subject: [PATCH 30/33] FROMGIT: arm: dts: khadas-vim3: include + meson-g12-common-u-boot.dtsi to enable HDMI output + +--- + arch/arm/dts/meson-khadas-vim3-u-boot.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi +index 81fd5be378..b5da4fdfc3 100644 +--- a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi ++++ b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi +@@ -4,6 +4,8 @@ + * Author: Neil Armstrong + */ + ++#include "meson-g12-common-u-boot.dtsi" ++ + / { + aliases { + spi0 = &spifc; +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0031-FROMGIT-configs-khadas-vim3-enable-HDMI-output.patch b/projects/Amlogic/patches/u-boot/u-boot-0031-FROMGIT-configs-khadas-vim3-enable-HDMI-output.patch new file mode 100644 index 0000000000..92f17f6c23 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0031-FROMGIT-configs-khadas-vim3-enable-HDMI-output.patch @@ -0,0 +1,67 @@ +From 51d87789f9084e29f9a638e3d5c9f2bdda928113 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 29 Apr 2020 09:38:13 +0200 +Subject: [PATCH 31/33] FROMGIT: configs: khadas-vim3: enable HDMI output + +--- + configs/khadas-vim3_defconfig | 9 +++++++++ + configs/khadas-vim3l_defconfig | 4 ++++ + 2 files changed, 13 insertions(+) + +diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig +index 692138eb11..4aeab0e35d 100644 +--- a/configs/khadas-vim3_defconfig ++++ b/configs/khadas-vim3_defconfig +@@ -40,6 +40,8 @@ CONFIG_ETH_DESIGNWARE=y + CONFIG_MESON_G12A_USB_PHY=y + CONFIG_PINCTRL=y + CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y + CONFIG_DM_REGULATOR=y + CONFIG_DM_REGULATOR_FIXED=y + CONFIG_DM_RESET=y +@@ -55,6 +57,7 @@ CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_DWC3=y ++CONFIG_USB_KEYBOARD=y + # CONFIG_USB_DWC3_GADGET is not set + CONFIG_USB_DWC3_MESON_G12A=y + CONFIG_USB_GADGET=y +@@ -63,4 +66,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xfada + CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y + CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y + CONFIG_OF_LIBFDT_OVERLAY=y +diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig +index 28c20c0d6d..887885f329 100644 +--- a/configs/khadas-vim3l_defconfig ++++ b/configs/khadas-vim3l_defconfig +@@ -57,6 +57,7 @@ CONFIG_DM_USB=y + CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_DWC3=y + CONFIG_USB_DWC3=y ++CONFIG_USB_KEYBOARD=y + # CONFIG_USB_DWC3_GADGET is not set + CONFIG_USB_DWC3_MESON_G12A=y + CONFIG_USB_GADGET=y +@@ -66,6 +67,9 @@ CONFIG_USB_GADGET_DWC2_OTG=y + CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y + CONFIG_USB_GADGET_DOWNLOAD=y + CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y + CONFIG_VIDEO_MESON=y + CONFIG_VIDEO_DT_SIMPLEFB=y + CONFIG_OF_LIBFDT_OVERLAY=y +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0032-HACK-mmc-meson-gx-limit-to-24MHz.patch b/projects/Amlogic/patches/u-boot/u-boot-0032-HACK-mmc-meson-gx-limit-to-24MHz.patch new file mode 100644 index 0000000000..baccadd697 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0032-HACK-mmc-meson-gx-limit-to-24MHz.patch @@ -0,0 +1,25 @@ +From 0c0505f7e8ee3ffc96cfa70d609a4140586fa2dc Mon Sep 17 00:00:00 2001 +From: chewitt +Date: Fri, 24 Apr 2020 15:15:04 +0000 +Subject: [PATCH 32/33] HACK: mmc: meson-gx: limit to 24MHz + +--- + drivers/mmc/meson_gx_mmc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c +index 86c1a7164a..0d273c09ad 100644 +--- a/drivers/mmc/meson_gx_mmc.c ++++ b/drivers/mmc/meson_gx_mmc.c +@@ -264,7 +264,7 @@ static int meson_mmc_probe(struct udevice *dev) + cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT | + MMC_MODE_HS_52MHz | MMC_MODE_HS; + cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV); +- cfg->f_max = 100000000; /* 100 MHz */ ++ cfg->f_max = SD_EMMC_CLKSRC_24M; + cfg->b_max = 511; /* max 512 - 1 blocks */ + cfg->name = dev->name; + +-- +2.17.1 + diff --git a/projects/Amlogic/patches/u-boot/u-boot-0033-HACK-prevent-stdout-stderr-on-videoconsole.patch b/projects/Amlogic/patches/u-boot/u-boot-0033-HACK-prevent-stdout-stderr-on-videoconsole.patch new file mode 100644 index 0000000000..10c46041b5 --- /dev/null +++ b/projects/Amlogic/patches/u-boot/u-boot-0033-HACK-prevent-stdout-stderr-on-videoconsole.patch @@ -0,0 +1,28 @@ +From 018e32a21b8fb04c07440ef2b8d389f3805aefb5 Mon Sep 17 00:00:00 2001 +From: chewitt +Date: Thu, 28 May 2020 09:07:11 +0000 +Subject: [PATCH 33/33] HACK: prevent stdout/stderr on videoconsole + +Severl devices now have CONFIG_DM_VIDEO enabled which causes stdout/stderr +to appear on videoconsole (HDMI). Remove videoconsole so that early u-boot +boot remains silent unless you are using the UART/serial console. +--- + include/configs/meson64.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index 851cba807f..52ba6eab02 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -29,7 +29,7 @@ + #define CONFIG_BMP_32BPP + #define CONFIG_SPLASH_SCREEN + #define CONFIG_SPLASH_SCREEN_ALIGN +-#define STDOUT_CFG "vidconsole,serial" ++#define STDOUT_CFG "serial" + #else + #define STDOUT_CFG "serial" + #endif +-- +2.17.1 +