Prep ESP32S2

This commit is contained in:
Theo Arends 2021-02-02 17:55:45 +01:00
parent e70412b9b7
commit 13713dccc1
8 changed files with 66 additions and 0 deletions

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@ -18,6 +18,8 @@
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#if CONFIG_IDF_TARGET_ESP32
#include "ETH.h"
#include "eth_phy/phy.h"
#include "eth_phy/phy_tlk110.h"
@ -302,3 +304,5 @@ String ETHClass::macAddress(void)
}
ETHClass ETH;
#endif // CONFIG_IDF_TARGET_ESP32

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@ -21,6 +21,8 @@
#ifndef _ETH_H_
#define _ETH_H_
#if CONFIG_IDF_TARGET_ESP32
#include "WiFi.h"
#include "esp_eth.h"
@ -92,4 +94,5 @@ class ETHClass {
extern ETHClass ETH;
#endif // CONFIG_IDF_TARGET_ESP32
#endif /* _ETH_H_ */

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@ -17,7 +17,14 @@
#include "Arduino.h"
#include "lwip/apps/sntp.h"
#include <nvs.h>
#if CONFIG_IDF_TARGET_ESP32
#include <rom/rtc.h>
//#include "esp32/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/rtc.h"
#endif
#include <ESP8266WiFi.h>
#include "esp8266toEsp32.h"

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@ -102,7 +102,14 @@ void *special_malloc(uint32_t size) {
// Handle 20k of NVM
#include <nvs.h>
#if CONFIG_IDF_TARGET_ESP32
#include <rom/rtc.h>
//#include "esp32/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/rtc.h"
#endif
#include <esp_phy_init.h>
void NvmLoad(const char *sNvsName, const char *sName, void *pSettings, unsigned nSettingsLen) {
@ -205,7 +212,14 @@ void NvsInfo(void) {
//
#include "Esp.h"
#if CONFIG_IDF_TARGET_ESP32
#include "rom/spi_flash.h"
//#include "esp32/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#endif
#include "esp_spi_flash.h"
#include <memory>
#include <soc/soc.h>
@ -324,6 +338,8 @@ void DisableBrownout(void) {
//
String ESP32GetResetReason(uint32_t cpu_no) {
#if CONFIG_IDF_TARGET_ESP32
// tools\sdk\include\esp32\rom\rtc.h
switch (rtc_get_reset_reason(cpu_no)) {
case POWERON_RESET : return F("Vbat power on reset"); // 1
@ -342,6 +358,27 @@ String ESP32GetResetReason(uint32_t cpu_no) {
case RTCWDT_BROWN_OUT_RESET : return F("Reset when the vdd voltage is not stable"); // 15
case RTCWDT_RTC_RESET : return F("RTC Watch dog reset digital core and rtc module"); // 16
}
#elif CONFIG_IDF_TARGET_ESP32S2
// tools\sdk\esp32\include\esp_rom\include\esp32s2\rom\rtc.h
switch (rtc_get_reset_reason(cpu_no)) {
case POWERON_RESET : return F("Vbat power on reset"); // 1
case RTC_SW_SYS_RESET : return F("Software reset digital core"); // 3
case DEEPSLEEP_RESET : return F("Deep Sleep reset digital core"); // 5
case TG0WDT_SYS_RESET : return F("Timer Group0 Watch dog reset digital core"); // 7
case TG1WDT_SYS_RESET : return F("Timer Group1 Watch dog reset digital core"); // 8
case RTCWDT_SYS_RESET : return F("RTC Watch dog Reset digital core"); // 9
case INTRUSION_RESET : return F("Instrusion tested to reset CPU"); // 10
case TG0WDT_CPU_RESET : return F("Time Group0 reset CPU"); // 11
case RTC_SW_CPU_RESET : return F("Software reset CPU"); // 12
case RTCWDT_CPU_RESET : return F("RTC Watch dog Reset CPU"); // 13
case RTCWDT_BROWN_OUT_RESET : return F("Reset when the vdd voltage is not stable"); // 15
case RTCWDT_RTC_RESET : return F("RTC Watch dog reset digital core and rtc module"); // 16
case TG1WDT_CPU_RESET : return F("Time Group1 reset CPU"); // 17
case SUPER_WDT_RESET : return F("Super watchdog reset digital core and rtc module"); // 18
case GLITCH_RTC_RESET : return F("Glitch reset digital core and rtc module"); // 19
}
#endif
return F("No meaning"); // 0 and undefined
}
@ -351,10 +388,17 @@ String ESP_getResetReason(void) {
uint32_t ESP_ResetInfoReason(void) {
RESET_REASON reason = rtc_get_reset_reason(0);
#if CONFIG_IDF_TARGET_ESP32
if (POWERON_RESET == reason) { return REASON_DEFAULT_RST; }
if (SW_CPU_RESET == reason) { return REASON_SOFT_RESTART; }
if (DEEPSLEEP_RESET == reason) { return REASON_DEEP_SLEEP_AWAKE; }
if (SW_RESET == reason) { return REASON_EXT_SYS_RST; }
#elif CONFIG_IDF_TARGET_ESP32S2
if (POWERON_RESET == reason) { return REASON_DEFAULT_RST; }
if (RTC_SW_CPU_RESET == reason) { return REASON_SOFT_RESTART; }
if (DEEPSLEEP_RESET == reason) { return REASON_DEEP_SLEEP_AWAKE; }
if (RTC_SW_SYS_RESET == reason) { return REASON_EXT_SYS_RST; }
#endif
return -1; //no "official error code", but should work with the current code base
}

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@ -30,6 +30,7 @@
#endif
#ifdef ESP32 // ESP32 only. Use define USE_HM10 for ESP8266 support
#if CONFIG_IDF_TARGET_ESP32
#ifdef USE_BLE_ESP32
/*
@ -3574,6 +3575,7 @@ void sendExample(){
#endif
#endif // CONFIG_IDF_TARGET_ESP32
#endif // ESP32

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@ -18,6 +18,7 @@
*/
#ifdef ESP32
#if CONFIG_IDF_TARGET_ESP32
#ifdef USE_ETHERNET
/*********************************************************************************************\
* Ethernet support for ESP32
@ -221,4 +222,5 @@ bool Xdrv82(uint8_t function) {
}
#endif // USE_ETHERNET
#endif // CONFIG_IDF_TARGET_ESP32
#endif // ESP32

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@ -247,7 +247,9 @@ void AdcInit(void) {
if (Adcs.present) {
#ifdef ESP32
analogSetClockDiv(1); // Default 1
#if CONFIG_IDF_TARGET_ESP32
analogSetWidth(ANALOG_RESOLUTION); // Default 12 bits (0 - 4095)
#endif // CONFIG_IDF_TARGET_ESP32
analogSetAttenuation(ADC_11db); // Default 11db
#endif
for (uint32_t idx = 0; idx < Adcs.present; idx++) {

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@ -67,6 +67,7 @@
#ifdef USE_BLE_ESP32
#ifdef ESP32 // ESP32 only. Use define USE_HM10 for ESP8266 support
#if CONFIG_IDF_TARGET_ESP32
#ifdef USE_MI_ESP32
@ -2947,6 +2948,7 @@ bool Xsns62(uint8_t function)
return result;
}
#endif // USE_MI_ESP32
#endif // CONFIG_IDF_TARGET_ESP32
#endif // ESP32
#endif