Fix Modbus timeouts reading reg blocks

This commit is contained in:
Norbert Richter 2021-01-20 14:02:53 +01:00
parent d4c2282170
commit 204d738053
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@ -81,30 +81,34 @@ bool TasmotaModbus::ReceiveReady()
uint8_t TasmotaModbus::ReceiveBuffer(uint8_t *buffer, uint8_t register_count) uint8_t TasmotaModbus::ReceiveBuffer(uint8_t *buffer, uint8_t register_count)
{ {
mb_len = 0; mb_len = 0;
uint32_t last = millis(); uint32_t timeout = millis() + 10;
while ((available() > 0) && (mb_len < (register_count *2) + 5) && (millis() - last < 10)) { while ((mb_len < (register_count *2) + 5) && (millis() < timeout)) {
uint8_t data = (uint8_t)read(); if (available()) {
if (!mb_len) { // Skip leading data as provided by hardware serial uint8_t data = (uint8_t)read();
if (mb_address == data) { if (!mb_len) { // Skip leading data as provided by hardware serial
if (mb_address == data) {
buffer[mb_len++] = data;
}
} else {
buffer[mb_len++] = data; buffer[mb_len++] = data;
} if (3 == mb_len) {
} else { if (buffer[1] & 0x80) { // 01 84 02 f2 f1
buffer[mb_len++] = data; return buffer[2]; // 1 = Illegal Function,
if (3 == mb_len) { // 2 = Illegal Data Address,
if (buffer[1] & 0x80) { // 01 84 02 f2 f1 // 3 = Illegal Data Value,
return buffer[2]; // 1 = Illegal Function, // 4 = Slave Error
// 2 = Illegal Data Address, // 5 = Acknowledge but not finished (no error)
// 3 = Illegal Data Value, // 6 = Slave Busy
// 4 = Slave Error // 8 = Memory Parity error
// 5 = Acknowledge but not finished (no error) // 10 = Gateway Path Unavailable
// 6 = Slave Busy // 11 = Gateway Target device failed to respond
// 8 = Memory Parity error }
// 10 = Gateway Path Unavailable
// 11 = Gateway Target device failed to respond
} }
} }
timeout = millis() + 10;
} }
last = millis();
} }
if (mb_len < 7) { return 7; } // 7 = Not enough data if (mb_len < 7) { return 7; } // 7 = Not enough data