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make more readable
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@ -511,15 +511,10 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
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#ifdef ESPHOME_SINGLE_CORE
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// This is the single core implementation.
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 2. Restricting normal updates to forward movement within the same epoch
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// This prevents race conditions at the rollover boundary without requiring
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// 64-bit atomics or locking on every call.
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// Single-core platforms have no concurrency, so this is a simple implementation
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// that just tracks 32-bit rollover (every 49.7 days) without any locking or atomics.
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uint16_t major = this->millis_major_;
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// Single-core platforms: No atomics needed
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uint32_t last = this->last_millis_;
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// Check for rollover
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@ -538,121 +533,119 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
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// Combine major (high 32 bits) and now (low 32 bits) into 64-bit time
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return now + (static_cast<uint64_t>(major) << 32);
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}
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#endif // ESPHOME_SINGLE_CORE
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#ifdef ESPHOME_MULTI_CORE_NO_ATOMICS
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// This is the multi core no atomics implementation.
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 2. Restricting normal updates to forward movement within the same epoch
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// This prevents race conditions at the rollover boundary without requiring
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// 64-bit atomics or locking on every call.
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// This is the multi core no atomics implementation.
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 2. Restricting normal updates to forward movement within the same epoch
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// This prevents race conditions at the rollover boundary without requiring
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// 64-bit atomics or locking on every call.
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uint16_t major = this->millis_major_;
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uint32_t last = this->last_millis_;
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uint16_t major = this->millis_major_;
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uint32_t last = this->last_millis_;
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// Define a safe window around the rollover point (10 seconds)
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// This covers any reasonable scheduler delays or thread preemption
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static const uint32_t ROLLOVER_WINDOW = 10000; // 10 seconds in milliseconds
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// Define a safe window around the rollover point (10 seconds)
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// This covers any reasonable scheduler delays or thread preemption
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static const uint32_t ROLLOVER_WINDOW = 10000; // 10 seconds in milliseconds
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// Check if we're near the rollover boundary (close to std::numeric_limits<uint32_t>::max() or just past 0)
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bool near_rollover = (last > (std::numeric_limits<uint32_t>::max() - ROLLOVER_WINDOW)) || (now < ROLLOVER_WINDOW);
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// Check if we're near the rollover boundary (close to std::numeric_limits<uint32_t>::max() or just past 0)
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bool near_rollover = (last > (std::numeric_limits<uint32_t>::max() - ROLLOVER_WINDOW)) || (now < ROLLOVER_WINDOW);
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if (near_rollover || (now < last && (last - now) > HALF_MAX_UINT32)) {
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// Near rollover or detected a rollover - need lock for safety
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LockGuard guard{this->lock_};
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// Re-read with lock held
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last = this->last_millis_;
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if (now < last && (last - now) > HALF_MAX_UINT32) {
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// True rollover detected (happens every ~49.7 days)
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this->millis_major_++;
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major++;
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#ifdef ESPHOME_DEBUG_SCHEDULER
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ESP_LOGD(TAG, "Detected true 32-bit rollover at %" PRIu32 "ms (was %" PRIu32 ")", now, last);
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#endif /* ESPHOME_DEBUG_SCHEDULER */
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}
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// Update last_millis_ while holding lock
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this->last_millis_ = now;
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} else if (now > last) {
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// Normal case: Not near rollover and time moved forward
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// Update without lock. While this may cause minor races (microseconds of
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// backwards time movement), they're acceptable because:
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// 1. The scheduler operates at millisecond resolution, not microsecond
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// 2. We've already prevented the critical rollover race condition
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// 3. Any backwards movement is orders of magnitude smaller than scheduler delays
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this->last_millis_ = now;
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}
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// If now <= last and we're not near rollover, don't update
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// This minimizes backwards time movement
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// Combine major (high 32 bits) and now (low 32 bits) into 64-bit time
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return now + (static_cast<uint64_t>(major) << 32);
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#endif // ESPHOME_MULTI_CORE_NO_ATOMICS
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#ifdef ESPHOME_MULTI_CORE_ATOMICS
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// This is the multi core with atomics implementation.
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 2. Restricting normal updates to forward movement within the same epoch
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// This prevents race conditions at the rollover boundary without requiring
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// 64-bit atomics or locking on every call.
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for (;;) {
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uint16_t major = this->millis_major_.load(std::memory_order_acquire);
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/*
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* Acquire so that if we later decide **not** to take the lock we still
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* observe a `millis_major_` value coherent with the loaded `last_millis_`.
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* The acquire load ensures any later read of `millis_major_` sees its
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* corresponding increment.
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*/
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uint32_t last = this->last_millis_.load(std::memory_order_acquire);
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// If we might be near a rollover (large backwards jump), take the lock for the entire operation
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// This ensures rollover detection and last_millis_ update are atomic together
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if (now < last && (last - now) > HALF_MAX_UINT32) {
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// Potential rollover - need lock for atomic rollover detection + update
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if (near_rollover || (now < last && (last - now) > HALF_MAX_UINT32)) {
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// Near rollover or detected a rollover - need lock for safety
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LockGuard guard{this->lock_};
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// Re-read with lock held; mutex already provides ordering
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last = this->last_millis_.load(std::memory_order_relaxed);
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// Re-read with lock held
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last = this->last_millis_;
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if (now < last && (last - now) > HALF_MAX_UINT32) {
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// True rollover detected (happens every ~49.7 days)
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this->millis_major_.fetch_add(1, std::memory_order_relaxed);
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this->millis_major_++;
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major++;
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#ifdef ESPHOME_DEBUG_SCHEDULER
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ESP_LOGD(TAG, "Detected true 32-bit rollover at %" PRIu32 "ms (was %" PRIu32 ")", now, last);
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#endif /* ESPHOME_DEBUG_SCHEDULER */
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}
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/*
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* Update last_millis_ while holding the lock to prevent races
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* Publish the new low-word *after* bumping `millis_major_` (done above)
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* so readers never see a mismatched pair.
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*/
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this->last_millis_.store(now, std::memory_order_release);
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} else {
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// Normal case: Try lock-free update, but only allow forward movement within same epoch
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// This prevents accidentally moving backwards across a rollover boundary
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while (now > last && (now - last) < HALF_MAX_UINT32) {
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if (this->last_millis_.compare_exchange_weak(last, now,
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std::memory_order_release, // success
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std::memory_order_relaxed)) { // failure
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break;
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}
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// CAS failure means no data was published; relaxed is fine
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// last is automatically updated by compare_exchange_weak if it fails
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}
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// Update last_millis_ while holding lock
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this->last_millis_ = now;
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} else if (now > last) {
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// Normal case: Not near rollover and time moved forward
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// Update without lock. While this may cause minor races (microseconds of
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// backwards time movement), they're acceptable because:
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// 1. The scheduler operates at millisecond resolution, not microsecond
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// 2. We've already prevented the critical rollover race condition
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// 3. Any backwards movement is orders of magnitude smaller than scheduler delays
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this->last_millis_ = now;
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}
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uint16_t major_end = this->millis_major_.load(std::memory_order_relaxed);
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if (major_end == major)
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return now + (static_cast<uint64_t>(major) << 32);
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}
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#endif // ESPHOME_MULTI_CORE_ATOMICS
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// If now <= last and we're not near rollover, don't update
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// This minimizes backwards time movement
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// Combine major (high 32 bits) and now (low 32 bits) into 64-bit time
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return now + (static_cast<uint64_t>(major) << 32);
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#endif // ESPHOME_MULTI_CORE_NO_ATOMICS
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#ifdef ESPHOME_MULTI_CORE_ATOMICS
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// This is the multi core with atomics implementation.
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 2. Restricting normal updates to forward movement within the same epoch
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// This prevents race conditions at the rollover boundary without requiring
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// 64-bit atomics or locking on every call.
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for (;;) {
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uint16_t major = this->millis_major_.load(std::memory_order_acquire);
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/*
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* Acquire so that if we later decide **not** to take the lock we still
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* observe a `millis_major_` value coherent with the loaded `last_millis_`.
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* The acquire load ensures any later read of `millis_major_` sees its
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* corresponding increment.
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*/
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uint32_t last = this->last_millis_.load(std::memory_order_acquire);
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// If we might be near a rollover (large backwards jump), take the lock for the entire operation
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// This ensures rollover detection and last_millis_ update are atomic together
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if (now < last && (last - now) > HALF_MAX_UINT32) {
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// Potential rollover - need lock for atomic rollover detection + update
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LockGuard guard{this->lock_};
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// Re-read with lock held; mutex already provides ordering
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last = this->last_millis_.load(std::memory_order_relaxed);
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if (now < last && (last - now) > HALF_MAX_UINT32) {
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// True rollover detected (happens every ~49.7 days)
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this->millis_major_.fetch_add(1, std::memory_order_relaxed);
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major++;
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#ifdef ESPHOME_DEBUG_SCHEDULER
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ESP_LOGD(TAG, "Detected true 32-bit rollover at %" PRIu32 "ms (was %" PRIu32 ")", now, last);
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#endif /* ESPHOME_DEBUG_SCHEDULER */
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}
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/*
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* Update last_millis_ while holding the lock to prevent races
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* Publish the new low-word *after* bumping `millis_major_` (done above)
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* so readers never see a mismatched pair.
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*/
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this->last_millis_.store(now, std::memory_order_release);
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} else {
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// Normal case: Try lock-free update, but only allow forward movement within same epoch
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// This prevents accidentally moving backwards across a rollover boundary
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while (now > last && (now - last) < HALF_MAX_UINT32) {
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if (this->last_millis_.compare_exchange_weak(last, now,
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std::memory_order_release, // success
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std::memory_order_relaxed)) { // failure
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break;
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}
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// CAS failure means no data was published; relaxed is fine
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// last is automatically updated by compare_exchange_weak if it fails
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}
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}
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uint16_t major_end = this->millis_major_.load(std::memory_order_relaxed);
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if (major_end == major)
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return now + (static_cast<uint64_t>(major) << 32);
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}
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#endif // ESPHOME_MULTI_CORE_ATOMICS
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}
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bool HOT Scheduler::SchedulerItem::cmp(const std::unique_ptr<SchedulerItem> &a,
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