jeans/esphome
jeans/esphome
1
0
Fork 0
mirror of https://github.com/esphome/esphome.git synced 2025-07-29 06:36:45 +00:00
Code Issues Packages Projects Releases Wiki Activity

[esp8266] fix isr pin (#8981)

Browse Source 
Co-authored-by: Samuel Sieb <samuel@sieb.net>
This commit is contained in:
Samuel Sieb 2025-05-31 12:21:08 -07:00 committed by Jesse Hills
parent 8583466c6a
commit 6554af21b9
No known key found for this signature in database
GPG Key ID: BEAAE804EFD8E83A
1 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
esphome/components/esp8266/gpio.cpp
View File

@ -40,6 +40,7 @@ struct ISRPinArg {
volatile uint32_t *mode_set_reg; volatile uint32_t *mode_set_reg;
volatile uint32_t *mode_clr_reg; volatile uint32_t *mode_clr_reg;
volatile uint32_t *func_reg; volatile uint32_t *func_reg;
volatile uint32_t *control_reg;
uint32_t mask; uint32_t mask;
}; };
@ -54,6 +55,7 @@ ISRInternalGPIOPin ESP8266GPIOPin::to_isr() const {
arg->mode_set_reg = &GPES; arg->mode_set_reg = &GPES;
arg->mode_clr_reg = &GPEC; arg->mode_clr_reg = &GPEC;
arg->func_reg = &GPF(this->pin_); arg->func_reg = &GPF(this->pin_);
arg->control_reg = &GPC(this->pin_);
arg->mask = 1 << this->pin_; arg->mask = 1 << this->pin_;
} else { } else {
arg->in_reg = &GP16I; arg->in_reg = &GP16I;
@ -62,6 +64,7 @@ ISRInternalGPIOPin ESP8266GPIOPin::to_isr() const {
arg->mode_set_reg = &GP16E; arg->mode_set_reg = &GP16E;
arg->mode_clr_reg = nullptr; arg->mode_clr_reg = nullptr;
arg->func_reg = &GPF16; arg->func_reg = &GPF16;
arg->control_reg = nullptr;
arg->mask = 1; arg->mask = 1;
} }
return ISRInternalGPIOPin((void *) arg); return ISRInternalGPIOPin((void *) arg);
@ -143,11 +146,17 @@ void IRAM_ATTR ISRInternalGPIOPin::pin_mode(gpio::Flags flags) {
if (arg->pin < 16) { if (arg->pin < 16) {
if (flags & gpio::FLAG_OUTPUT) { if (flags & gpio::FLAG_OUTPUT) {
*arg->mode_set_reg = arg->mask; *arg->mode_set_reg = arg->mask;
} else { if (flags & gpio::FLAG_OPEN_DRAIN) {
*arg->control_reg |= 1 << GPCD;
} else {
*arg->control_reg &= ~(1 << GPCD);
}
} else if (flags & gpio::FLAG_INPUT) {
*arg->mode_clr_reg = arg->mask; *arg->mode_clr_reg = arg->mask;
} }
if (flags & gpio::FLAG_PULLUP) { if (flags & gpio::FLAG_PULLUP) {
*arg->func_reg |= 1 << GPFPU; *arg->func_reg |= 1 << GPFPU;
*arg->control_reg |= 1 << GPCD;
} else { } else {
*arg->func_reg &= ~(1 << GPFPU); *arg->func_reg &= ~(1 << GPFPU);
} }