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[rp2040] use low-level control for ISR gpio and add IRAM_ATTR (#8950)

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Co-authored-by: Samuel Sieb <samuel@sieb.net>
This commit is contained in:
Samuel Sieb 2025-05-30 04:38:50 -07:00 committed by Jesse Hills
parent 6666604069
commit 8583466c6a
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GPG Key ID: BEAAE804EFD8E83A
2 changed files with 31 additions and 9 deletions
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35
esphome/components/rp2040/gpio.cpp
View File

@ -8,7 +8,7 @@ namespace rp2040 {
static const char *const TAG = "rp2040"; static const char *const TAG = "rp2040";
static int IRAM_ATTR flags_to_mode(gpio::Flags flags, uint8_t pin) { static int flags_to_mode(gpio::Flags flags, uint8_t pin) {
if (flags == gpio::FLAG_INPUT) { // NOLINT(bugprone-branch-clone) if (flags == gpio::FLAG_INPUT) { // NOLINT(bugprone-branch-clone)
return INPUT; return INPUT;
} else if (flags == gpio::FLAG_OUTPUT) { } else if (flags == gpio::FLAG_OUTPUT) {
@ -25,14 +25,16 @@ static int IRAM_ATTR flags_to_mode(gpio::Flags flags, uint8_t pin) {
} }
struct ISRPinArg { struct ISRPinArg {
uint32_t mask;
uint8_t pin; uint8_t pin;
bool inverted; bool inverted;
}; };
ISRInternalGPIOPin RP2040GPIOPin::to_isr() const { ISRInternalGPIOPin RP2040GPIOPin::to_isr() const {
auto *arg = new ISRPinArg{}; // NOLINT(cppcoreguidelines-owning-memory) auto *arg = new ISRPinArg{}; // NOLINT(cppcoreguidelines-owning-memory)
arg->pin = pin_; arg->pin = this->pin_;
arg->inverted = inverted_; arg->inverted = this->inverted_;
arg->mask = 1 << this->pin_;
return ISRInternalGPIOPin((void *) arg); return ISRInternalGPIOPin((void *) arg);
} }
@ -81,21 +83,36 @@ void RP2040GPIOPin::detach_interrupt() const { detachInterrupt(pin_); }
using namespace rp2040; using namespace rp2040;
bool IRAM_ATTR ISRInternalGPIOPin::digital_read() { bool IRAM_ATTR ISRInternalGPIOPin::digital_read() {
auto *arg = reinterpret_cast<ISRPinArg *>(arg_); auto *arg = reinterpret_cast<ISRPinArg *>(this->arg_);
return bool(digitalRead(arg->pin)) != arg->inverted; // NOLINT return bool(sio_hw->gpio_in & arg->mask) != arg->inverted;
} }
void IRAM_ATTR ISRInternalGPIOPin::digital_write(bool value) { void IRAM_ATTR ISRInternalGPIOPin::digital_write(bool value) {
auto *arg = reinterpret_cast<ISRPinArg *>(arg_); auto *arg = reinterpret_cast<ISRPinArg *>(this->arg_);
digitalWrite(arg->pin, value != arg->inverted ? 1 : 0); // NOLINT if (value != arg->inverted) {
sio_hw->gpio_set = arg->mask;
} else {
sio_hw->gpio_clr = arg->mask;
} }
}
void IRAM_ATTR ISRInternalGPIOPin::clear_interrupt() { void IRAM_ATTR ISRInternalGPIOPin::clear_interrupt() {
// TODO: implement // TODO: implement
// auto *arg = reinterpret_cast<ISRPinArg *>(arg_); // auto *arg = reinterpret_cast<ISRPinArg *>(arg_);
// GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1UL << arg->pin); // GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1UL << arg->pin);
} }
void IRAM_ATTR ISRInternalGPIOPin::pin_mode(gpio::Flags flags) { void IRAM_ATTR ISRInternalGPIOPin::pin_mode(gpio::Flags flags) {
auto *arg = reinterpret_cast<ISRPinArg *>(arg_); auto *arg = reinterpret_cast<ISRPinArg *>(this->arg_);
pinMode(arg->pin, flags_to_mode(flags, arg->pin)); // NOLINT if (flags & gpio::FLAG_OUTPUT) {
sio_hw->gpio_oe_set = arg->mask;
} else if (flags & gpio::FLAG_INPUT) {
sio_hw->gpio_oe_clr = arg->mask;
hw_write_masked(&padsbank0_hw->io[arg->pin],
(bool_to_bit(flags & gpio::FLAG_PULLUP) << PADS_BANK0_GPIO0_PUE_LSB) |
(bool_to_bit(flags & gpio::FLAG_PULLDOWN) << PADS_BANK0_GPIO0_PDE_LSB),
PADS_BANK0_GPIO0_PUE_BITS | PADS_BANK0_GPIO0_PDE_BITS);
}
} }
} // namespace esphome } // namespace esphome

5
esphome/core/hal.h
View File

@ -24,6 +24,11 @@
#define PROGMEM ICACHE_RODATA_ATTR #define PROGMEM ICACHE_RODATA_ATTR
#endif #endif
#elif defined(USE_RP2040)
#define IRAM_ATTR __attribute__((noinline, long_call, section(".time_critical")))
#define PROGMEM
#else #else
#define IRAM_ATTR #define IRAM_ATTR