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make more readable

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This commit is contained in:
J. Nick Koston 2025-07-19 10:36:49 -10:00
parent fde80bc530
commit a5f5af9596
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2 changed files with 103 additions and 138 deletions
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63
esphome/core/scheduler.cpp
View File

@ -494,23 +494,23 @@ bool HOT Scheduler::cancel_item_locked_(Component *component, const char *name_c
return total_cancelled > 0;
}
#ifdef ESPHOME_SINGLE_CORE
uint64_t Scheduler::millis_64_(uint32_t now) {
// THREAD SAFETY NOTE:
// This function has three implemenations, based on the precompiler flags
// - ESPHOME_SINGLE_CORE
// - ESPHOME_MULTI_CORE_NO_ATOMICS
// - ESPHOME_MULTI_CORE_ATOMICS
// This function has three implementations, based on the precompiler flags
// - ESPHOME_SINGLE_CORE - Runs on single-core platforms (ESP8266, RP2040, etc.)
// - ESPHOME_MULTI_CORE_NO_ATOMICS - Runs on multi-core platforms without atomics (LibreTiny)
// - ESPHOME_MULTI_CORE_ATOMICS - Runs on multi-core platforms with atomics (ESP32, HOST, etc.)
//
// Make sure all changes are synchronous if you edit this function.
//
// This is the single core implementation.
// Make sure all changes are synchronized if you edit this function.
//
// IMPORTANT: Always pass fresh millis() values to this function. The implementation
// handles out-of-order timestamps between threads, but minimizing time differences
// helps maintain accuracy.
//
#ifdef ESPHOME_SINGLE_CORE
// This is the single core implementation.
//
// The implementation handles the 32-bit rollover (every 49.7 days) by:
// 1. Using a lock when detecting rollover to ensure atomic update
// 2. Restricting normal updates to forward movement within the same epoch
@ -539,26 +539,11 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
// Combine major (high 32 bits) and now (low 32 bits) into 64-bit time
return now + (static_cast<uint64_t>(major) << 32);
}
#endif
#endif // ESPHOME_SINGLE_CORE
#ifdef ESPHOME_MULTI_CORE_NO_ATOMICS
uint64_t Scheduler::millis_64_(uint32_t now) {
// THREAD SAFETY NOTE:
// This function has three implemenations, based on the precompiler flags
// - ESPHOME_SINGLE_CORE
// - ESPHOME_MULTI_CORE_NO_ATOMICS
// - ESPHOME_MULTI_CORE_ATOMICS
//
// Make sure all changes are synchronous if you edit this function.
//
// This is the multi core no atomics implementation.
//
// IMPORTANT: Always pass fresh millis() values to this function. The implementation
// handles out-of-order timestamps between threads, but minimizing time differences
// helps maintain accuracy.
//
// The implementation handles the 32-bit rollover (every 49.7 days) by:
// 1. Using a lock when detecting rollover to ensure atomic update
// 2. Restricting normal updates to forward movement within the same epoch
@ -566,11 +551,6 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
// 64-bit atomics or locking on every call.
uint16_t major = this->millis_major_;
// LibreTiny: Multi-threaded but lacks atomic operation support
// TODO: If LibreTiny ever adds atomic support, remove this entire block and
// let it fall through to the atomic-based implementation below
// We need to use a lock when near the rollover boundary to prevent races
uint32_t last = this->last_millis_;
// Define a safe window around the rollover point (10 seconds)
@ -610,27 +590,11 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
// Combine major (high 32 bits) and now (low 32 bits) into 64-bit time
return now + (static_cast<uint64_t>(major) << 32);
}
#endif
#endif // ESPHOME_MULTI_CORE_NO_ATOMICS
#ifdef ESPHOME_MULTI_CORE_ATOMICS
uint64_t Scheduler::millis_64_(uint32_t now) {
// THREAD SAFETY NOTE:
// This function has three implemenations, based on the precompiler flags
// - ESPHOME_SINGLE_CORE
// - ESPHOME_MULTI_CORE_NO_ATOMICS
// - ESPHOME_MULTI_CORE_ATOMICS
//
// Make sure all changes are synchronous if you edit this function.
//
// This is the multi core with atomics implementation.
//
// IMPORTANT: Always pass fresh millis() values to this function. The implementation
// handles out-of-order timestamps between threads, but minimizing time differences
// helps maintain accuracy.
//
// The implementation handles the 32-bit rollover (every 49.7 days) by:
// 1. Using a lock when detecting rollover to ensure atomic update
// 2. Restricting normal updates to forward movement within the same epoch
@ -641,7 +605,6 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
uint16_t major = this->millis_major_.load(std::memory_order_acquire);
/*
* Multi-threaded platforms with atomic support (ESP32)
* Acquire so that if we later decide **not** to take the lock we still
* observe a `millis_major_` value coherent with the loaded `last_millis_`.
* The acquire load ensures any later read of `millis_major_` sees its
@ -688,9 +651,9 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
if (major_end == major)
return now + (static_cast<uint64_t>(major) << 32);
}
}
#endif // ESPHOME_MULTI_CORE_ATOMICS
#endif
}
bool HOT Scheduler::SchedulerItem::cmp(const std::unique_ptr<SchedulerItem> &a,
const std::unique_ptr<SchedulerItem> &b) {

4
esphome/core/scheduler.h
View File

@ -209,6 +209,8 @@ class Scheduler {
// Single-core platforms don't need the defer queue and save 40 bytes of RAM
std::deque<std::unique_ptr<SchedulerItem>> defer_queue_; // FIFO queue for defer() calls
#endif /* ESPHOME_SINGLE_CORE */
uint32_t to_remove_{0};
#ifdef ESPHOME_MULTI_CORE_ATOMICS
/*
* Multi-threaded platforms with atomic support: last_millis_ needs atomic for lock-free updates
@ -225,6 +227,7 @@ class Scheduler {
// Platforms without atomic support or single-threaded platforms
uint32_t last_millis_{0};
#endif /* else ESPHOME_MULTI_CORE_ATOMICS */
/*
* Upper 16 bits of the 64-bit millis counter. Incremented only while holding
* `lock_`; read concurrently. Atomic (relaxed) avoids a formal data race.
@ -236,7 +239,6 @@ class Scheduler {
#else /* not ESPHOME_MULTI_CORE_ATOMICS */
uint16_t millis_major_{0};
#endif /* else ESPHOME_MULTI_CORE_ATOMICS */
uint32_t to_remove_{0};
};
} // namespace esphome