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macchiatobin: bump kernel and u-boot versions
Bump Linux to 4.15 and U-Boot to 2018.01. Remove networking dts patches since they has landed in Linux 4.15. Update readme.txt: fix mainline BSP versions and update boot selection for board rev 1.3. Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
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@ -1,45 +0,0 @@
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From c25a2b8559989011d43fb901824dd8b981fc6b7b Mon Sep 17 00:00:00 2001
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From: Sergey Matyukevich <geomatsi@gmail.com>
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Date: Fri, 8 Dec 2017 23:08:34 +0300
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Subject: [PATCH] arm64: dts: marvell: extend the cp110 syscon register area length
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This patch extends on both cp110 the system register area length to
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include some of the comphy registers as well.
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Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
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---
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arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 2 +-
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arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +-
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2 files changed, 2 insertions(+), 2 deletions(-)
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diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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index f2aa2a81de4d..4dd8c7d53764 100644
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--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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@@ -143,7 +143,7 @@
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cpm_syscon0: system-controller@440000 {
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compatible = "syscon", "simple-mfd";
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- reg = <0x440000 0x1000>;
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+ reg = <0x440000 0x2000>;
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cpm_clk: clock {
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compatible = "marvell,cp110-clock";
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diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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index 4fe70323abb3..43fa491da6ce 100644
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--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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@@ -143,7 +143,7 @@
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cps_syscon0: system-controller@440000 {
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compatible = "syscon", "simple-mfd";
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- reg = <0x440000 0x1000>;
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+ reg = <0x440000 0x2000>;
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cps_clk: clock {
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compatible = "marvell,cp110-clock";
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--
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2.11.0
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@ -1,118 +0,0 @@
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From f05fc07443118bb3017c2b6938c63f48845329ca Mon Sep 17 00:00:00 2001
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From: Sergey Matyukevich <geomatsi@gmail.com>
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Date: Fri, 8 Dec 2017 23:10:36 +0300
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Subject: [PATCH] arm64: dts: marvell: add comphy nodes on cp110 master and slave
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This patch describes the comphy available in the cp110 master and slave.
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This comphy provides serdes lanes used by various controllers such as
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the network one.
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Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
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---
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.../boot/dts/marvell/armada-cp110-master.dtsi | 38 ++++++++++++++++++++++
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.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 38 ++++++++++++++++++++++
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2 files changed, 76 insertions(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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index 4dd8c7d53764..b91c27ccee33 100644
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--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
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@@ -109,6 +109,44 @@
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};
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};
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+ cpm_comphy: phy@120000 {
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+ compatible = "marvell,comphy-cp110";
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+ reg = <0x120000 0x6000>;
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+ marvell,system-controller = <&cpm_syscon0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpm_comphy0: phy@0 {
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+ reg = <0>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cpm_comphy1: phy@1 {
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+ reg = <1>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cpm_comphy2: phy@2 {
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+ reg = <2>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cpm_comphy3: phy@3 {
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+ reg = <3>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cpm_comphy4: phy@4 {
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+ reg = <4>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cpm_comphy5: phy@5 {
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+ reg = <5>;
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+ #phy-cells = <1>;
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+ };
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+ };
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+
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cpm_mdio: mdio@12a200 {
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#address-cells = <1>;
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#size-cells = <0>;
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diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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index 43fa491da6ce..6849348ae214 100644
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--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
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@@ -109,6 +109,44 @@
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};
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};
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+ cps_comphy: phy@120000 {
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+ compatible = "marvell,comphy-cp110";
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+ reg = <0x120000 0x6000>;
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+ marvell,system-controller = <&cps_syscon0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cps_comphy0: phy@0 {
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+ reg = <0>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cps_comphy1: phy@1 {
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+ reg = <1>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cps_comphy2: phy@2 {
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+ reg = <2>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cps_comphy3: phy@3 {
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+ reg = <3>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cps_comphy4: phy@4 {
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+ reg = <4>;
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+ #phy-cells = <1>;
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+ };
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+
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+ cps_comphy5: phy@5 {
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+ reg = <5>;
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+ #phy-cells = <1>;
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+ };
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+ };
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+
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cps_mdio: mdio@12a200 {
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#address-cells = <1>;
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#size-cells = <0>;
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--
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2.11.0
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@ -1,58 +0,0 @@
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From 7a67e72567a9b6104c7ebe134e710610cfb88a6e Mon Sep 17 00:00:00 2001
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From: Sergey Matyukevich <geomatsi@gmail.com>
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Date: Fri, 8 Dec 2017 23:11:29 +0300
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Subject: [PATCH] arm64: dts: marvell: mcbin: add comphy references to Ethernet ports
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This patch adds comphy phandles to the Ethernet ports in the mcbin
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device tree. The comphy is used to configure the serdes PHYs used by
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these ports.
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Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
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---
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arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
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index acf5c7d16d79..49d6590507b5 100644
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--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
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+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
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@@ -222,8 +222,11 @@
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&cpm_eth0 {
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status = "okay";
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+ /* Network PHY */
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phy = <&phy0>;
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phy-mode = "10gbase-kr";
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+ /* Generic PHY, providing serdes lanes */
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+ phys = <&cpm_comphy4 0>;
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};
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&cpm_sata0 {
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@@ -257,15 +260,21 @@
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&cps_eth0 {
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status = "okay";
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+ /* Network PHY */
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phy = <&phy8>;
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phy-mode = "10gbase-kr";
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+ /* Generic PHY, providing serdes lanes */
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+ phys = <&cps_comphy4 0>;
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};
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&cps_eth1 {
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/* CPS Lane 0 - J5 (Gigabit RJ45) */
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status = "okay";
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+ /* Network PHY */
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phy = <&ge_phy>;
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phy-mode = "sgmii";
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+ /* Generic PHY, providing serdes lanes */
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+ phys = <&cps_comphy0 1>;
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};
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&cps_pinctrl {
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--
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2.11.0
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@ -15,8 +15,8 @@ How to build
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There are two build options: mainline support and vendor support.
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There are two build options: mainline support and vendor support.
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For the mainline BSP, we use:
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For the mainline BSP, we use:
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- Linux v4.14.4
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- Linux v4.15
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- U-Boot v2017.11
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- U-Boot v2018.01
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For the vendor BSP, we use the sources available from Marvell Github
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For the vendor BSP, we use the sources available from Marvell Github
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page at https://github.com/MarvellEmbeddedProcessors, which uses:
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page at https://github.com/MarvellEmbeddedProcessors, which uses:
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@ -24,10 +24,10 @@ page at https://github.com/MarvellEmbeddedProcessors, which uses:
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- U-Boot v2017.03
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- U-Boot v2017.03
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At the moment mainline support for the board is a work in progress.
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At the moment mainline support for the board is a work in progress.
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Mainline kernel 4.14 with provided patches enables eth2 in 1Gb (RJ45
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Mainline kernel 4.15 enables eth2 in 1Gb (RJ45 connector J5) and
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connector J5) and eth0 in 10Gb (SFP connector J15). The vendor BSP
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eth0 in 10Gb (SFP connector CON15 and RJ45 connector CON16).
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enables more hardware features out of the box, e.g. all the network
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The vendor BSP enables more hardware features out of the box,
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interfaces.
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e.g. all the network interfaces.
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To use the mainline BSP run the following commands:
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To use the mainline BSP run the following commands:
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@ -54,13 +54,21 @@ How to boot the board
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=====================
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=====================
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The MacchiatoBin board can be setup to load the bootloader from
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The MacchiatoBin board can be setup to load the bootloader from
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different sources including eMMC, SPI flash, and SD-card. In order to
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different sources including eMMC, SPI flash, and SD-card.
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select boot from SD-card DIP switches SW1 and SW2 should be configured
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as follows:
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On Rev 1.2 board to select boot from SD-card the DIP switches
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SW1 and SW2 should be configured as follows:
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SW2: 01110
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SW2: 01110
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SW1: 1xxxx
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SW1: 1xxxx
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The upcoming Rev 1.3 board will have a single pins header J1 instead
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of the SW1/2 DIP switches. To boot from SD-card the setting of J1
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jumpers should match the DIP switches of Rev v1.2 board
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from left to right:
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J1: 011101xxxx
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Insert the micro SDcard in the MacchiatoBin board and power it up.
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Insert the micro SDcard in the MacchiatoBin board and power it up.
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The serial console is accessible at the micro-USB Type-B connector
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The serial console is accessible at the micro-USB Type-B connector
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marked CON9. The serial line settings are 115200 8N1.
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marked CON9. The serial line settings are 115200 8N1.
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@ -1,6 +1,5 @@
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BR2_aarch64=y
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BR2_aarch64=y
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BR2_GLOBAL_PATCH_DIR="board/solidrun/macchiatobin/patches"
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BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_15=y
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BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
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BR2_TARGET_GENERIC_HOSTNAME="mcbin"
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BR2_TARGET_GENERIC_HOSTNAME="mcbin"
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BR2_TARGET_GENERIC_ISSUE="Welcome to Buildroot for Marvell MacchiatoBin"
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BR2_TARGET_GENERIC_ISSUE="Welcome to Buildroot for Marvell MacchiatoBin"
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@ -21,12 +20,12 @@ BR2_TARGET_MV_DDR_MARVELL=y
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BR2_TARGET_UBOOT=y
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BR2_TARGET_UBOOT=y
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BR2_TARGET_UBOOT_BOARDNAME="mvebu_mcbin-88f8040"
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BR2_TARGET_UBOOT_BOARDNAME="mvebu_mcbin-88f8040"
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BR2_TARGET_UBOOT_CUSTOM_VERSION=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION=y
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2017.11"
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BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.01"
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# Kernel
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# Kernel
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BR2_LINUX_KERNEL=y
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BR2_LINUX_KERNEL=y
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BR2_LINUX_KERNEL_CUSTOM_VERSION=y
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BR2_LINUX_KERNEL_CUSTOM_VERSION=y
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BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.4"
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BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.15"
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BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG=y
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BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG=y
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BR2_LINUX_KERNEL_DTS_SUPPORT=y
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BR2_LINUX_KERNEL_DTS_SUPPORT=y
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BR2_LINUX_KERNEL_INTREE_DTS_NAME="marvell/armada-8040-mcbin"
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BR2_LINUX_KERNEL_INTREE_DTS_NAME="marvell/armada-8040-mcbin"
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