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openblas: use MIPS specific cores for P5600 and I6400

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Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
This commit is contained in:
Vicente Olivert Riera 2016-10-15 12:26:12 +01:00 committed by Peter Korsgaard
parent dad86ab515
commit 606cc1320d
1 changed files with 2 additions and 2 deletions
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4
package/openblas/Config.in
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@ -27,10 +27,10 @@ config BR2_PACKAGE_OPENBLAS_DEFAULT_TARGET
default "PPC440" if BR2_powerpc_440 default "PPC440" if BR2_powerpc_440
default "PPC440FP2" if BR2_powerpc_440fp default "PPC440FP2" if BR2_powerpc_440fp
# P5600 is built with MSA support which is only available in Codescape toolchains # P5600 is built with MSA support which is only available in Codescape toolchains
default "P5600" if BR2_MIPS_CPU_MIPS32R2 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS default "P5600" if BR2_mips_p5600 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
default "SICORTEX" if BR2_MIPS_CPU_MIPS64 default "SICORTEX" if BR2_MIPS_CPU_MIPS64
# I6400 is built with MSA support which is only available in Codescape toolchains # I6400 is built with MSA support which is only available in Codescape toolchains
default "I6400" if BR2_MIPS_CPU_MIPS64R6 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS default "I6400" if BR2_mips_i6400 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
default "SPARC" if BR2_sparc default "SPARC" if BR2_sparc
# Cortex-A15 always have a VFPv4 # Cortex-A15 always have a VFPv4
default "CORTEXA15" if (BR2_cortex_a15 && BR2_ARM_EABIHF) default "CORTEXA15" if (BR2_cortex_a15 && BR2_ARM_EABIHF)