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gcc: switch microblaze to version 4.9.x
Switch to gcc 4.9.x for microblaze since it's a better target than 4.8.x, and also add a build patch that fixes (e)glibc build issues. Hence disable 4.8.x for microblaze. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
This commit is contained in:
Gustavo Zacarias
Peter Korsgaard
parent
58d82dda1a
commit
c6ad2fcb90
169
package/gcc/4.9.0/840-microblaze-enable-dwarf-eh-support.patch
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169
package/gcc/4.9.0/840-microblaze-enable-dwarf-eh-support.patch
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@ -0,0 +1,169 @@
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Fetched from Xilinx gcc git at https://github.com/Xilinx/gcc
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From 23c35173490ac2d6348a668dfc9c1a6eb62171f2 Mon Sep 17 00:00:00 2001
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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
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Date: Mon, 18 Jun 2012 20:18:13 +0200
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Subject: [PATCH] [Patch, microblaze]: Enable DWARF exception handling support.
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Changelog
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2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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David Holsgrove <david.holsgrove@xilinx.com>
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* common/config/microblaze/microblaze-common.c: Remove
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TARGET_EXCEPT_UNWIND_INFO definition.
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* config/microblaze/microblaze-protos.h: Add
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microblaze_eh_return prototype.
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* gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
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microblaze_expand_epilogue, microblaze_return_addr): Handle
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calls_eh_return
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(microblaze_eh_return): New function.
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* gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
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EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
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ASM_PREFERRED_EH_DATA_FORMAT
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* gcc/config/microblaze/microblaze.md: Define eh_return pattern.
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Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
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Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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---
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gcc/common/config/microblaze/microblaze-common.c | 3 ---
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gcc/config/microblaze/microblaze-protos.h | 1 +
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gcc/config/microblaze/microblaze.c | 29 ++++++++++++++++++++----
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gcc/config/microblaze/microblaze.h | 15 ++++++++++++
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gcc/config/microblaze/microblaze.md | 11 +++++++++
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5 files changed, 52 insertions(+), 7 deletions(-)
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diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
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index 5835acc..85e6a53 100644
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--- a/gcc/common/config/microblaze/microblaze-common.c
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+++ b/gcc/common/config/microblaze/microblaze-common.c
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@@ -39,7 +39,4 @@ static const struct default_options microblaze_option_optimization_table[] =
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#undef TARGET_OPTION_OPTIMIZATION_TABLE
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#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table
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-#undef TARGET_EXCEPT_UNWIND_INFO
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-#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
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-
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struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
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diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
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index c30ec72..260f4e4 100644
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--- a/gcc/config/microblaze/microblaze-protos.h
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+++ b/gcc/config/microblaze/microblaze-protos.h
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@@ -56,6 +56,7 @@ extern bool microblaze_tls_referenced_p (rtx);
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extern int symbol_mentioned_p (rtx);
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extern int label_mentioned_p (rtx);
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extern bool microblaze_cannot_force_const_mem (enum machine_mode, rtx);
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+extern void microblaze_eh_return (rtx op0);
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#endif /* RTX_CODE */
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/* Declare functions in microblaze-c.c. */
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diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
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index fe61fce..15166d3 100644
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--- a/gcc/config/microblaze/microblaze.c
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+++ b/gcc/config/microblaze/microblaze.c
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@@ -1999,6 +1999,11 @@ microblaze_must_save_register (int regno)
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if (frame_pointer_needed && (regno == HARD_FRAME_POINTER_REGNUM))
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return 1;
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+ if (crtl->calls_eh_return
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+ && regno == MB_ABI_SUB_RETURN_ADDR_REGNUM) {
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+ return 1;
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+ }
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+
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if (!crtl->is_leaf)
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{
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if (regno == MB_ABI_SUB_RETURN_ADDR_REGNUM)
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@@ -2026,6 +2031,13 @@ microblaze_must_save_register (int regno)
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return 1;
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}
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+ if (crtl->calls_eh_return
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+ && (regno == EH_RETURN_DATA_REGNO (0)
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+ || regno == EH_RETURN_DATA_REGNO (1)))
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+ {
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+ return 1;
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+ }
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+
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return 0;
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}
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@@ -3131,6 +3143,12 @@ microblaze_expand_epilogue (void)
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emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx));
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}
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+ if (crtl->calls_eh_return)
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+ emit_insn (gen_addsi3 (stack_pointer_rtx,
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+ stack_pointer_rtx,
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+ gen_rtx_raw_REG (SImode,
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+ MB_EH_STACKADJ_REGNUM)));
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+
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emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
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MB_ABI_SUB_RETURN_ADDR_REGNUM)));
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}
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@@ -3427,10 +3445,13 @@ microblaze_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
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if (count != 0)
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return NULL_RTX;
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- return gen_rtx_PLUS (Pmode,
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- get_hard_reg_initial_val (Pmode,
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- MB_ABI_SUB_RETURN_ADDR_REGNUM),
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- GEN_INT (8));
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+ return get_hard_reg_initial_val (Pmode,
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+ MB_ABI_SUB_RETURN_ADDR_REGNUM);
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+}
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+
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+void microblaze_eh_return (rtx op0)
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+{
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+ emit_insn (gen_movsi(gen_rtx_MEM(Pmode, stack_pointer_rtx), op0));
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}
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/* Queue an .ident string in the queue of top-level asm statements.
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diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
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index 4072283..5e9f49c 100644
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--- a/gcc/config/microblaze/microblaze.h
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+++ b/gcc/config/microblaze/microblaze.h
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@@ -184,6 +184,21 @@ extern enum pipeline_type microblaze_pipe;
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#define INCOMING_RETURN_ADDR_RTX \
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gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
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+/* Specifies the offset from INCOMING_RETURN_ADDR_RTX and the actual return PC. */
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+#define RETURN_ADDR_OFFSET (8)
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+
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+/* Describe how we implement __builtin_eh_return. */
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+#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? MB_ABI_FIRST_ARG_REGNUM + (N) : INVALID_REGNUM)
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+
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+#define MB_EH_STACKADJ_REGNUM MB_ABI_INT_RETURN_VAL2_REGNUM
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+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, MB_EH_STACKADJ_REGNUM)
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+
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+/* Select a format to encode pointers in exception handling data. CODE
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+ is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
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+ true if the symbol may be affected by dynamic relocations. */
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+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
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+ ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
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+
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/* Use DWARF 2 debugging information by default. */
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#define DWARF2_DEBUGGING_INFO
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#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
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diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
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index ed6131a..dc2405f 100644
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--- a/gcc/config/microblaze/microblaze.md
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+++ b/gcc/config/microblaze/microblaze.md
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@@ -2327,4 +2327,15 @@
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(set_attr "mode" "SI")
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(set_attr "length" "4")])
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+; This is used in compiling the unwind routines.
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+(define_expand "eh_return"
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+ [(use (match_operand 0 "general_operand" ""))]
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+ ""
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+ "
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+{
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+ microblaze_eh_return(operands[0]);
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+ DONE;
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+}")
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+
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(include "sync.md")
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+
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--
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1.8.3.2
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@ -9,7 +9,7 @@ choice
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default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32
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default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32
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default BR2_GCC_VERSION_4_8_X if BR2_aarch64
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default BR2_GCC_VERSION_4_8_X if BR2_aarch64
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default BR2_GCC_VERSION_4_8_ARC if BR2_arc
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default BR2_GCC_VERSION_4_8_ARC if BR2_arc
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default BR2_GCC_VERSION_4_8_X if BR2_microblaze
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default BR2_GCC_VERSION_4_9_X if BR2_microblaze
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default BR2_GCC_VERSION_4_5_X if BR2_bfin
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default BR2_GCC_VERSION_4_5_X if BR2_bfin
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default BR2_GCC_VERSION_4_7_X
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default BR2_GCC_VERSION_4_7_X
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help
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help
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@ -50,7 +50,7 @@ choice
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bool "gcc 4.7.x"
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bool "gcc 4.7.x"
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config BR2_GCC_VERSION_4_8_X
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config BR2_GCC_VERSION_4_8_X
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depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a12 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a12 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
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select BR2_GCC_NEEDS_MPC
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select BR2_GCC_NEEDS_MPC
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bool "gcc 4.8.x"
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bool "gcc 4.8.x"
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