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Obsolete esp32ResetReason

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This commit is contained in:
fvanroie 2021-06-05 23:41:08 +02:00
parent 4ebd010883
commit 240d559255
1 changed files with 74 additions and 74 deletions
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148
src/hal/hasp_hal.cpp
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@ -19,85 +19,85 @@
#include <rom/rtc.h> // needed to get the ResetInfo #include <rom/rtc.h> // needed to get the ResetInfo
// Compatibility function for ESP8266 getRestInfo // Compatibility function for ESP8266 getRestInfo
String esp32ResetReason(uint8_t cpuid) // String esp32ResetReason(uint8_t cpuid)
{ // {
if(cpuid > 1) { // if(cpuid > 1) {
return F("Invalid CPU id"); // return F("Invalid CPU id");
} // }
RESET_REASON reason = rtc_get_reset_reason(cpuid); // RESET_REASON reason = rtc_get_reset_reason(cpuid);
String resetReason((char*)0); // String resetReason((char*)0);
resetReason.reserve(128); // resetReason.reserve(128);
resetReason += F("CPU"); // resetReason += F("CPU");
resetReason += cpuid; // resetReason += cpuid;
resetReason += F(": "); // resetReason += F(": ");
switch(reason) { // switch(reason) {
case 1: // case 1:
resetReason += F("POWERON"); // resetReason += F("POWERON");
break; /**<1, Vbat power on reset*/ // break; /**<1, Vbat power on reset*/
case 3: // case 3:
resetReason += F("SW"); // resetReason += F("SW");
break; /**<3, Software reset digital core*/ // break; /**<3, Software reset digital core*/
case 4: // case 4:
resetReason += F("OWDT"); // resetReason += F("OWDT");
break; /**<4, Legacy watch dog reset digital core*/ // break; /**<4, Legacy watch dog reset digital core*/
case 5: // case 5:
resetReason += F("DEEPSLEEP"); // resetReason += F("DEEPSLEEP");
break; /**<5, Deep Sleep reset digital core*/ // break; /**<5, Deep Sleep reset digital core*/
case 6: // case 6:
resetReason += F("SDIO"); // resetReason += F("SDIO");
break; /**<6, Reset by SLC module, reset digital core*/ // break; /**<6, Reset by SLC module, reset digital core*/
case 7: // case 7:
resetReason += F("TG0WDT_SYS"); // resetReason += F("TG0WDT_SYS");
break; /**<7, Timer Group0 Watch dog reset digital core*/ // break; /**<7, Timer Group0 Watch dog reset digital core*/
case 8: // case 8:
resetReason += F("TG1WDT_SYS"); // resetReason += F("TG1WDT_SYS");
break; /**<8, Timer Group1 Watch dog reset digital core*/ // break; /**<8, Timer Group1 Watch dog reset digital core*/
case 9: // case 9:
resetReason += F("RTCWDT_SYS"); // resetReason += F("RTCWDT_SYS");
break; /**<9, RTC Watch dog Reset digital core*/ // break; /**<9, RTC Watch dog Reset digital core*/
case 10: // case 10:
resetReason += F("INTRUSION"); // resetReason += F("INTRUSION");
break; /**<10, Instrusion tested to reset CPU*/ // break; /**<10, Instrusion tested to reset CPU*/
case 11: // case 11:
resetReason += F("TGWDT_CPU"); // resetReason += F("TGWDT_CPU");
break; /**<11, Time Group reset CPU*/ // break; /**<11, Time Group reset CPU*/
case 12: // case 12:
resetReason += F("SW_CPU"); // resetReason += F("SW_CPU");
break; /**<12, Software reset CPU*/ // break; /**<12, Software reset CPU*/
case 13: // case 13:
resetReason += F("RTCWDT_CPU"); // resetReason += F("RTCWDT_CPU");
break; /**<13, RTC Watch dog Reset CPU*/ // break; /**<13, RTC Watch dog Reset CPU*/
case 14: // case 14:
resetReason += F("EXT_CPU"); // resetReason += F("EXT_CPU");
break; /**<14, for APP CPU, reseted by PRO CPU*/ // break; /**<14, for APP CPU, reseted by PRO CPU*/
case 15: // case 15:
resetReason += F("RTCWDT_BROWN_OUT"); // resetReason += F("RTCWDT_BROWN_OUT");
break; /**<15, Reset when the vdd voltage is not stable*/ // break; /**<15, Reset when the vdd voltage is not stable*/
case 16: // case 16:
resetReason += F("RTCWDT_RTC"); // resetReason += F("RTCWDT_RTC");
break; /**<16, RTC Watch dog reset digital core and rtc module*/ // break; /**<16, RTC Watch dog reset digital core and rtc module*/
default: // default:
resetReason += F("NO_MEAN"); // resetReason += F("NO_MEAN");
return resetReason; // return resetReason;
} // }
resetReason += F("_RESET"); // resetReason += F("_RESET");
return resetReason; // return resetReason;
} // }
#endif #endif
void halRestartMcu(void) // void halRestartMcu(void)
{ // {
#if defined(ARDUINO_ARCH_ESP32) || defined(ARDUINO_ARCH_ESP8266) // #if defined(ARDUINO_ARCH_ESP32) || defined(ARDUINO_ARCH_ESP8266)
ESP.restart(); // ESP.restart();
#else // #else
NVIC_SystemReset(); // NVIC_SystemReset();
#endif // #endif
for(;;) { // for(;;) {
} // halt // } // halt
} // }
// String halGetResetInfo() // String halGetResetInfo()
// { // {