Adjust Sunton timings

This commit is contained in:
fvanroie 2023-04-12 04:22:24 +02:00
parent 8460286641
commit 34149b875a

View File

@ -32,7 +32,7 @@ lib_deps =
[sunton-tft-common-pins]
build_flags =
; Bus Setttings
; Bus Settings
-D TFT_DE=40
-D TFT_VSYNC=41
-D TFT_HSYNC=39
@ -60,7 +60,8 @@ extends = sunton-esp32-s3-tft, flash_16mb
build_flags =
-D HASP_MODEL="Sunton ESP32-4827S043R"
${sunton-esp32-s3-tft.build_flags}
${sunton-tft-common-pins.build_flags} ; Bus Setttings
${sunton-tft-common-pins.build_flags}
; Bus Settings
-D TFT_WIDTH=480
-D TFT_HEIGHT=272
; Panel Settings
@ -75,7 +76,7 @@ build_flags =
-D TFT_PCLK_ACTIVE_NEG=1
-D TFT_PREFER_SPEED=9000000 ; Typical DCLK Frequency
-D TFT_AUTO_FLUSH=1
; Touch Setttings
; Touch Settings
;-D TOUCH_DRIVER=0x2046
-D TOUCH_SCLK=12
-D TOUCH_MISO=13
@ -90,7 +91,8 @@ extends = sunton-esp32-s3-tft, flash_16mb
build_flags =
-D HASP_MODEL="Sunton ESP32-4827S043C"
${sunton-esp32-s3-tft.build_flags}
${sunton-tft-common-pins.build_flags} ; Bus Setttings
${sunton-tft-common-pins.build_flags}
; Bus Settings
-D TFT_WIDTH=480
-D TFT_HEIGHT=272
; Panel Settings
@ -105,7 +107,7 @@ build_flags =
-D TFT_PCLK_ACTIVE_NEG=1
-D TFT_PREFER_SPEED=9000000 ; Typical DCLK Frequency
-D TFT_AUTO_FLUSH=1
; Touch Setttings
; Touch Settings
-D TOUCH_DRIVER=0x911
-D TOUCH_SCL=20
-D TOUCH_SDA=19
@ -124,23 +126,24 @@ extends = sunton-esp32-s3-tft, flash_16mb
build_flags =
-D HASP_MODEL="Sunton ESP32-8048S043C"
${sunton-esp32-s3-tft.build_flags}
${sunton-tft-common-pins.build_flags} ; Bus Setttings
${sunton-tft-common-pins.build_flags}
; Bus Settings
-D LV_VDB_SIZE=76800 ; 10% of full framebuffer
-D TFT_WIDTH=800
-D TFT_HEIGHT=480
; Panel Settings
-D TFT_HSYNC_POLARITY=0
-D TFT_HSYNC_FRONT_PORCH=8
-D TFT_HSYNC_PULSE_WIDTH=4
-D TFT_HSYNC_BACK_PORCH=8
-D TFT_HSYNC_FRONT_PORCH=48 ; Maximum HSYNC Front Porch
-D TFT_HSYNC_PULSE_WIDTH=4 ; Typical HSYNC Pulse Width
-D TFT_HSYNC_BACK_PORCH=8 ; Typical HSYNC Back Porch
-D TFT_VSYNC_POLARITY=0
-D TFT_VSYNC_FRONT_PORCH=8
-D TFT_VSYNC_PULSE_WIDTH=4
-D TFT_VSYNC_BACK_PORCH=8
-D TFT_VSYNC_FRONT_PORCH=12 ; Maximum VSYNC Front Porch
-D TFT_VSYNC_PULSE_WIDTH=4 ; Typical VSYNC Pulse Width
-D TFT_VSYNC_BACK_PORCH=8 ; Typical VSYNC Back Porch
-D TFT_PCLK_ACTIVE_NEG=1
-D TFT_PREFER_SPEED=12000000
-D TFT_PREFER_SPEED=14000000 ; 1/2 of Typical DCLK Frequency
-D TFT_AUTO_FLUSH=1
; Touch Setttings
; Touch Settings
-D TOUCH_WIDTH=480
-D TOUCH_HEIGHT=272
-D TOUCH_DRIVER=0x911
@ -161,11 +164,12 @@ extends = sunton-esp32-s3-tft, flash_16mb
build_flags =
-D HASP_MODEL="Sunton ESP32-8048S050C"
${sunton-esp32-s3-tft.build_flags}
${sunton-tft-common-pins.build_flags} ; Bus Setttings
${sunton-tft-common-pins.build_flags}
; Bus Settings
-D LV_VDB_SIZE=76800 ; 10% of full framebuffer
-D TFT_WIDTH=800
-D TFT_HEIGHT=480
; Panel Setttings
; Panel Settings
-D TFT_HSYNC_POLARITY=0
-D TFT_HSYNC_FRONT_PORCH=48 ; Maximum HSYNC Front Porch
-D TFT_HSYNC_PULSE_WIDTH=4 ; Typical HSYNC Pulse Width
@ -177,7 +181,7 @@ build_flags =
-D TFT_PCLK_ACTIVE_NEG=1
-D TFT_PREFER_SPEED=14000000 ; 1/2 of Typical DCLK Frequency
-D TFT_AUTO_FLUSH=1
; Touch Setttings
; Touch Settings
-D TOUCH_WIDTH=800
-D TOUCH_HEIGHT=480
-D TOUCH_DRIVER=0x0911