Update User_setups

This commit is contained in:
fvanroie 2020-11-15 20:49:54 +01:00
parent da2f84a061
commit db47ce798b
3 changed files with 7 additions and 1 deletions

View File

@ -15,6 +15,7 @@ board_build.partitions = user_setups/esp32_partition_app1300k_spiffs1216k.csv
build_flags =
${flags.esp32_flags}
-D PIOENV=${PIOENV}
; -- TFT_eSPI build options ------------------------
${lcd.lolin24}
${pins.vspi32}
@ -23,10 +24,13 @@ build_flags =
-D TFT_RST=-1 ; RST
-D TFT_BCKL=-1 ; None, configurable via web UI (e.g. 21)
-D TOUCH_CS=17 ; (can also be 22 or 16)
-D PIOENV=${PIOENV}
;-D USE_DMA_TO_TFT
;-D ESP32_DMA ; Make touch reads wait for DMA
; -- LittleFS build options ------------------------
-D CONFIG_LITTLEFS_FOR_IDF_3_2
lib_deps =
${env.lib_deps}
LittleFS_esp32
lib_ignore =

View File

@ -21,6 +21,7 @@ build_flags =
;-D TFT_MOSI=PB5 ;Default
;-D TFT_SCLK=PB3 ;Default
-D USE_DMA_TO_TFT=1
;#define TFT_SPI_PORT 1 // SPI port 1 maximum clock rate is 55MHz
-D TFT_CS=PE13 ;D8
-D TFT_DC=PE14 ;D3
-D TFT_BCKL=PA15 ;None, configurable via web UI (e.g. 2 for D4)

View File

@ -36,6 +36,7 @@ build_flags =
-D TOUCH_CS=PA6 ;NC
-D TFT_RST=-1 ;D4
-D STM32
;#define TFT_SPI_PORT 1 // SPI port 1 maximum clock rate is 55MHz
-D TFT_SPI3
-D USE_DMA_TO_TFT
-D HASP_USE_WIFI=0