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Tinker: update kernel 4.19 (#349)

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This commit is contained in:
Pascal Vizeli 2019-02-09 11:45:13 +01:00 committed by GitHub
parent 7b4be3b4f7
commit 30b599acc6
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GPG Key ID: 4AEE18F83AFDEB23
68 changed files with 9356 additions and 1000404 deletions
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2
Documentation/kernel.md
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@ -5,7 +5,7 @@
|-------|---------|
| Open Virtual Applicance | 4.19.18 |
| Raspberry Pi | 4.14.81 |
| Tinker Board | 4.14.82 |
| Tinker Board | 4.19.20 |
| Odroid-C2 | 4.19.15 |
| Odroid-XU4 | 4.19.15 |
| Orangepi-Prime | 4.19.13 |

5819
buildroot-external/board/asus/tinker/kernel.config
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File diff suppressed because it is too large Load Diff

98
buildroot-external/board/asus/tinker/patches/linux/0006-gpu-arm-Midgard-setup_timer-timer_setup.patch Normal file
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@ -0,0 +1,98 @@
From ee7f0a678fff8316ec0be973f1b3780a63f50942 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 11 Dec 2017 21:04:56 +0100
Subject: [PATCH] gpu: arm: Midgard: setup_timer() -> timer_setup()
This patch is due the changes provoked by series of commit ending
at 513ae785c63c30741e46f43960213d4ae5382ec0, and removing the
setup_timer macros.
The previous patches replaced made sure that timers were all set
up with setup_timer and replaced setup_timer calls by timer_setup
calls.
This changed was introduced in the 4.15-rc1.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase.h | 2 +-
drivers/gpu/arm/midgard/mali_kbase_context.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_softjobs.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_tlstream.c | 6 ++----
4 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
index a4ceab9e0..27bde3b71 100644
--- a/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/drivers/gpu/arm/midgard/mali_kbase.h
@@ -213,7 +213,7 @@ int kbase_soft_event_update(struct kbase_context *kctx,
bool kbase_replay_process(struct kbase_jd_atom *katom);
-void kbasep_soft_job_timeout_worker(unsigned long data);
+void kbasep_soft_job_timeout_worker(struct timer_list *t);
void kbasep_complete_triggered_soft_events(struct kbase_context *kctx, u64 evt);
/* api used internally for register access. Contains validation and tracing */
diff --git a/drivers/gpu/arm/midgard/mali_kbase_context.c b/drivers/gpu/arm/midgard/mali_kbase_context.c
index f43db48fd..589df768c 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_context.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_context.c
@@ -165,9 +165,9 @@ kbase_create_context(struct kbase_device *kbdev, bool is_compat)
mutex_init(&kctx->vinstr_cli_lock);
- setup_timer(&kctx->soft_job_timeout,
+ timer_setup(&kctx->soft_job_timeout,
kbasep_soft_job_timeout_worker,
- (uintptr_t)kctx);
+ 0);
return kctx;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
index 127ada07f..019edf562 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
@@ -370,9 +370,9 @@ static void kbase_fence_debug_timeout(struct kbase_jd_atom *katom)
}
#endif /* CONFIG_MALI_FENCE_DEBUG */
-void kbasep_soft_job_timeout_worker(unsigned long data)
+void kbasep_soft_job_timeout_worker(struct timer_list *t)
{
- struct kbase_context *kctx = (struct kbase_context *)data;
+ struct kbase_context *kctx = from_timer(kctx, t, soft_job_timeout);
u32 timeout_ms = (u32)atomic_read(
&kctx->kbdev->js_data.soft_job_timeout_ms);
struct timer_list *timer = &kctx->soft_job_timeout;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
index d01aa23b2..11d8b59c7 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
@@ -1042,13 +1042,11 @@ static void kbasep_tlstream_flush_stream(enum tl_stream_type stype)
* Timer is executed periodically to check if any of the stream contains
* buffer ready to be submitted to user space.
*/
-static void kbasep_tlstream_autoflush_timer_callback(unsigned long data)
+static void kbasep_tlstream_autoflush_timer_callback(struct timer_list *unused)
{
enum tl_stream_type stype;
int rcode;
- CSTD_UNUSED(data);
-
for (stype = 0; stype < TL_STREAM_TYPE_COUNT; stype++) {
struct tl_stream *stream = tl_stream[stype];
unsigned long flags;
@@ -1371,7 +1369,7 @@ int kbase_tlstream_init(void)
/* Initialize autoflush timer. */
atomic_set(&autoflush_timer_active, 0);
- setup_timer(&autoflush_timer,
+ timer_setup(&autoflush_timer,
kbasep_tlstream_autoflush_timer_callback,
0);
--
2.14.1

35
buildroot-external/board/asus/tinker/patches/linux/0007-drivers-gpu-Arm-Midgard-Replace-ACCESS_ONCE-by-READ_.patch Normal file
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@ -0,0 +1,35 @@
From 44a5ba2e969adfb64c84f294c16490194988dcc7 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 24 Dec 2017 19:30:12 +0100
Subject: [PATCH] drivers: gpu: Arm: Midgard: Replace ACCESS_ONCE by READ_ONCE
The ACCESS_ONCE macro has now been removed in the 4.15.0-rc4,
and every ACCESS_ONCE call has been replaced by either READ_ONCE or
WRITE_ONCE calls.
Since the Midgard GPU drivers are not mainlined, the change
needs to be applied manually.
See commit b899a850431e2dd0943205a63a68573f3e312d0d and its parents,
for more informations.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_mem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem.h b/drivers/gpu/arm/midgard/mali_kbase_mem.h
index e9a8d5dd6..eac685699 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_mem.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_mem.h
@@ -591,7 +591,7 @@ void kbase_mem_pool_free_pages(struct kbase_mem_pool *pool, size_t nr_pages,
*/
static inline size_t kbase_mem_pool_size(struct kbase_mem_pool *pool)
{
- return ACCESS_ONCE(pool->cur_size);
+ return READ_ONCE(pool->cur_size);
}
/**
--
2.14.1

32
buildroot-external/board/asus/tinker/patches/linux/0008-gpu-arm-midgard-Remove-sys_close-references.patch Normal file
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@ -0,0 +1,32 @@
From 47e8aad9419ff8843a373c3e5aa2c9d261d8cd07 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 23 Apr 2018 20:54:13 +0200
Subject: [PATCH] gpu: arm: midgard: Remove sys_close references
sys_close is now replaced by ksys_close in an effort to remove
in-kernel system calls references.
See 2ca2a09d6215fd9621aa3e2db7cc9428a61f2911 and
https://lkml.org/lkml/2018/3/25/93 for more details.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_sync.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync.h b/drivers/gpu/arm/midgard/mali_kbase_sync.h
index de72147d..33b58059 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_sync.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_sync.h
@@ -156,7 +156,7 @@ void kbase_sync_fence_out_remove(struct kbase_jd_atom *katom);
*/
static inline void kbase_sync_fence_close_fd(int fd)
{
- sys_close(fd);
+ ksys_close(fd);
}
/**
--
2.14.1

76
buildroot-external/board/asus/tinker/patches/linux/0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch Normal file
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@ -0,0 +1,76 @@
From 9bf91a052d8ceddfd5808547a51e167fb7463754 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Wed, 18 Jul 2018 19:59:21 +0200
Subject: [PATCH] GPU: Mali: Midgard: remove rcu_read_lock references
This patch is actually based on @mihailescu2m patch.
This removes references to rcu_read_lock when acquiring the OPP table,
as it is useless since.
See :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/base/power/opp/core.c?id=5b650b388844f26c61c70564865598836d05dcb3
The current rcu_read_lock actually generates some issues with recent
kernels.
See here :
https://community.arm.com/graphics/f/discussions/9207/midgard-r20p0-kernel-drivers-errors
The patch has been recreated since it does not apply directly on r19p0
sources (I guess the affected line numbers slightly differ...).
@mihailescu2m patch for the Mali Midgard r20p0 kernel driver can be
acquired here :
https://github.com/mihailescu2m/linux/commit/bbe73c3c1143e5991bdcaee3afaecf5c31af0647
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
index e280322e..bf69d897 100644
--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
@@ -87,10 +87,9 @@ kbase_devfreq_target(struct device *dev, unsigned long *target_freq, u32 flags)
freq = *target_freq;
- rcu_read_lock();
opp = devfreq_recommended_opp(dev, &freq, flags);
voltage = dev_pm_opp_get_voltage(opp);
- rcu_read_unlock();
+
if (IS_ERR_OR_NULL(opp)) {
dev_err(dev, "Failed to get opp (%ld)\n", PTR_ERR(opp));
return PTR_ERR(opp);
@@ -186,20 +185,17 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
unsigned long freq;
struct dev_pm_opp *opp;
- rcu_read_lock();
count = dev_pm_opp_get_opp_count(kbdev->dev);
if (count < 0) {
rcu_read_unlock();
return count;
}
- rcu_read_unlock();
dp->freq_table = kmalloc_array(count, sizeof(dp->freq_table[0]),
GFP_KERNEL);
if (!dp->freq_table)
return -ENOMEM;
- rcu_read_lock();
for (i = 0, freq = ULONG_MAX; i < count; i++, freq--) {
opp = dev_pm_opp_find_freq_floor(kbdev->dev, &freq);
if (IS_ERR(opp))
@@ -207,7 +203,6 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
dp->freq_table[i] = freq;
}
- rcu_read_unlock();
if (count != i)
dev_warn(kbdev->dev, "Unable to enumerate all OPPs (%d!=%d\n",
--
2.16.4

74
buildroot-external/board/asus/tinker/patches/linux/1-2-regulator-act8865-add-restart-handler-for-act8846.patch Normal file
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@ -0,0 +1,74 @@
Patches act8846 regulator providing the proper reset handle and exploit
the SIPC bit in GLB_POWER_OFF register. Mainly used to reset some rockchip
boards.
Origin: <https://patchwork.kernel.org/patch/6409521/>
diff --git a/drivers/regulator/act8865-regulator.c b/drivers/regulator/act8865-regulator.c
index 2ff73d7..836d10b 100644
--- a/drivers/regulator/act8865-regulator.c
+++ b/drivers/regulator/act8865-regulator.c
@@ -27,6 +27,7 @@
#include <linux/of_device.h>
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>
+#include <linux/reboot.h>
/*
* ACT8600 Global Register Map.
@@ -133,6 +134,8 @@
#define ACT8865_VOLTAGE_NUM 64
#define ACT8600_SUDCDC_VOLTAGE_NUM 255
+#define ACT8846_SIPC_MASK 0x01
+
struct act8865 {
struct regmap *regmap;
int off_reg;
@@ -402,6 +405,22 @@ static void act8865_power_off(void)
while (1);
}
+static int act8846_power_cycle(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ struct act8865 *act8846;
+
+ act8846 = i2c_get_clientdata(act8865_i2c_client);
+ regmap_write(act8846->regmap, ACT8846_GLB_OFF_CTRL, ACT8846_SIPC_MASK);
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block act8846_restart_handler = {
+ .notifier_call = act8846_power_cycle,
+ .priority = 129,
+};
+
static int act8865_pmic_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
@@ -484,6 +503,8 @@ static int act8865_pmic_probe(struct i2c_client *client,
}
if (of_device_is_system_power_controller(dev->of_node)) {
+ int ret;
+
if (!pm_power_off && (off_reg > 0)) {
act8865_i2c_client = client;
act8865->off_reg = off_reg;
@@ -492,6 +513,14 @@ static int act8865_pmic_probe(struct i2c_client *client,
} else {
dev_err(dev, "Failed to set poweroff capability, already defined\n");
}
+
+ if (type == ACT8846) {
+ act8865_i2c_client = client;
+ ret = register_restart_handler(&act8846_restart_handler);
+ if (ret)
+ pr_err("%s: cannot register restart handler, %d\n",
+ __func__, ret);
+ }
}
/* Finally register devices */

65
buildroot-external/board/asus/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch
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@ -1,65 +0,0 @@
From 7de25b73e152830587740d8f2ffaad94c72d90ac Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 11:24:47 +0000
Subject: [PATCH 1/5] Integrating the Mali drivers
Changses required in order to select and compile the previously copied
Mali Midgard drivers.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/Kconfig | 2 ++
drivers/base/Makefile | 1 +
drivers/gpu/Makefile | 2 +-
drivers/video/Kconfig | 1 +
4 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index f046d21..b0982fc 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -348,3 +348,5 @@ config GENERIC_ARCH_TOPOLOGY
runtime.
endmenu
+
+source "drivers/base/ump/Kconfig"
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
index 397e5c3..251e0cf 100644
--- a/drivers/base/Makefile
+++ b/drivers/base/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_PINCTRL) += pinctrl.o
obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o
obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
+obj-$(CONFIG_UMP) += ump/
obj-y += test/
diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index e9ed439..66386b4 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -2,5 +2,5 @@
# taken to initialize them in the correct order. Link order is the only way
# to ensure this currently.
obj-$(CONFIG_TEGRA_HOST1X) += host1x/
-obj-y += drm/ vga/
+obj-y += drm/ vga/ arm/
obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af9..041e15f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
source "drivers/gpu/host1x/Kconfig"
source "drivers/gpu/ipu-v3/Kconfig"
+source "drivers/gpu/arm/midgard/Kconfig"
source "drivers/gpu/drm/Kconfig"
--
2.10.2

39
buildroot-external/board/asus/tinker/patches/linux/1001-drivers-Integrating-Mali-Midgard-video-and-gpu-drive.patch Normal file
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@ -0,0 +1,39 @@
From fe85565d9ed8212cbda2148d4731418a36a8d088 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 11 Dec 2017 21:53:28 +0100
Subject: [PATCH 1/3] drivers: Integrating Mali Midgard video and gpu drivers.
I'm dropping the UMP drivers. They are not maintained.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/Makefile | 2 +-
drivers/video/Kconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index e9ed439a5..66386b42a 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -2,5 +2,5 @@
# taken to initialize them in the correct order. Link order is the only way
# to ensure this currently.
obj-$(CONFIG_TEGRA_HOST1X) += host1x/
-obj-y += drm/ vga/
+obj-y += drm/ vga/ arm/
obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af999..041e15f2c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
source "drivers/gpu/host1x/Kconfig"
source "drivers/gpu/ipu-v3/Kconfig"
+source "drivers/gpu/arm/midgard/Kconfig"
source "drivers/gpu/drm/Kconfig"
--
2.14.1

67
buildroot-external/board/asus/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch → buildroot-external/board/asus/tinker/patches/linux/1005-ASUS-Tinkerboard-Stupid-reboot.patch
View File

@ -1,32 +1,38 @@
From 1aeeeeaf10ad5888c1a5b3ab9b780be91c7dada9 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 24 Jul 2017 23:09:31 +0000
Subject: [PATCH] Last try for the reboot hack
From bf9b932f6ae506baf5b79c8407089448ed77fc56 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 17 Dec 2017 16:15:03 +0100
Subject: [PATCH] ASUS Tinkerboard: Stupid reboot patch
If this one does not work, get a refund for your CantRebootBoard.
This patch is ugly as shit and will be reworked when possible.
Signed-off-by: Myy <myy@miouyouyou.fr>
Meanwhile, this fixes an issue with the ASUS Tinkerboard which
cannot reboot correctly. The issue is that the MMC hardware is
shutdown during the reboot phase and is not powered again after
the power cycle, leading to a dead board awaiting a hard power
cycle.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 26 ++++++++++++++++++++++++++
include/linux/reboot.h | 3 +++
drivers/mmc/host/dw_mmc.c | 28 ++++++++++++++++++++++++++++
include/linux/reboot.h | 2 ++
kernel/reboot.c | 1 +
4 files changed, 54 insertions(+)
4 files changed, 55 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index aaed6f9b..71131020 100644
index a3f1c2b30..52c13733f 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -14,10 +14,12 @@
#include <linux/of_address.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h> // Hack
+#include <linux/regulator/consumer.h> // Stupid Tinkerboard Hack
#include <linux/slab.h>
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
+#include "../core/core.h" // Hack
+#include "../core/core.h" // Stupid Tinkerboard Hack
#define RK3288_CLKGEN_DIV 2
@ -34,6 +40,7 @@ index aaed6f9b..71131020 100644
return 0;
}
+/* Stupid Tinkerboard Hack */
+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
+{
+ struct dw_mci *host = platform_get_drvdata(pdev);
@ -53,7 +60,6 @@ index aaed6f9b..71131020 100644
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+ }
+}
+
+
static int dw_mci_rockchip_remove(struct platform_device *pdev)
{
@ -62,29 +68,30 @@ index aaed6f9b..71131020 100644
static struct platform_driver dw_mci_rockchip_pltfm_driver = {
.probe = dw_mci_rockchip_probe,
.remove = dw_mci_rockchip_remove,
+ .shutdown = dw_mci_rockchip_platfm_shutdown,
+ .shutdown = dw_mci_rockchip_platfm_shutdown, // Stupid Tinkerboard Hack
.driver = {
.name = "dwmmc_rockchip",
.of_match_table = dw_mci_rockchip_match,
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index a9dfb269..ee956a57 100644
index 0aa39975f..70f7ce21b 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -39,8 +39,10 @@
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/mmc/slot-gpio.h>
+#include <linux/reboot.h> // Hack
+#include <linux/reboot.h> // Stupid Tinkerboard Hack
#include "dw_mmc.h"
+#include "../core/core.h" // Hack
+#include "../core/core.h" // Stupid Tinkerboard Hack
/* Common flag combinations */
#define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
@@ -2687,6 +2689,28 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
@@ -2778,6 +2780,29 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+/* Stupid Tinkerboard Hack */
+struct dw_mci *mSdhost;
+void setmmcEmergency() {
+ struct mmc_host *mmc;
@ -110,47 +117,41 @@ index a9dfb269..ee956a57 100644
static int dw_mci_init_slot(struct dw_mci *host)
{
struct mmc_host *mmc;
@@ -2718,6 +2742,8 @@ static int dw_mci_init_slot(struct dw_mci *host)
@@ -2809,6 +2834,9 @@ static int dw_mci_init_slot(struct dw_mci *host)
mmc->f_max = freq[1];
}
+ /* Stupid Tinkerboard Hack */
+ if (of_find_property(host->dev->of_node, "supports-sd", NULL))
+ mSdhost = host;
/*if there are external regulators, get them*/
ret = mmc_regulator_get_supply(mmc);
if (ret == -EPROBE_DEFER)
if (ret)
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index a7ff409f..586e4504 100644
index e63799a6e..057d3ce0c 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -72,12 +72,15 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
@@ -77,6 +77,8 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
extern void orderly_poweroff(bool force);
extern void orderly_reboot(void);
+// Wonderful ASUS hack
+/* Stupid Tinkerboard Hack */
+extern void setmmcEmergency(void);
/*
* Emergency restart, callable from an interrupt handler.
*/
extern void emergency_restart(void);
+
#include <asm/emergency-restart.h>
#endif /* _LINUX_REBOOT_H */
diff --git a/kernel/reboot.c b/kernel/reboot.c
index bd30a973..9f99488f 100644
index e4ced883d..c8e678ce6 100644
--- a/kernel/reboot.c
+++ b/kernel/reboot.c
@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
void emergency_restart(void)
{
kmsg_dump(KMSG_DUMP_EMERG);
+ setmmcEmergency();
+ setmmcEmergency(); // Stupid Tinkerboard Hack
machine_emergency_restart();
}
EXPORT_SYMBOL_GPL(emergency_restart);
--
2.13.0
2.14.1

116
buildroot-external/board/asus/tinker/patches/linux/1005-drivers-mmc-dw-mci-rockchip-Handle-ASUS-Tinkerboard.patch Normal file
View File

@ -0,0 +1,116 @@
From 302cd9b8a9f1f8a7735fabea3b9a7645dc40f9cc Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 7 Jan 2018 01:52:44 +0100
Subject: [PATCH] drivers: mmc: dw-mci-rockchip: Handle ASUS Tinkerboard reboot
On ASUS Tinkerboard systems, if the SDMMC hardware is shutdown before
rebooting, the system will be dead, as the SDMMC is the only way to
boot anything, and the hardware doesn't power up the SDMMC hardware
automatically when rebooting.
So, when using an ASUS Tinkerboard system, a new reboot handler is
installed. This reboot handler takes care of powering the SDMMC
hardware again before restarting the system, resolving the issue.
The code was inspired by the pwrseq_emmc.c, which seems to overcome
similar effects with eMMC hardware.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/mmc/host/dw_mmc-rockchip.c | 66 ++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index a3f1c2b30..7eac1f221 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -16,6 +16,11 @@
#include <linux/pm_runtime.h>
#include <linux/slab.h>
+#include <linux/regulator/consumer.h>
+#include <linux/reboot.h>
+#include <linux/delay.h>
+#include "../core/core.h"
+
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
@@ -334,6 +339,66 @@ static const struct of_device_id dw_mci_rockchip_match[] = {
};
MODULE_DEVICE_TABLE(of, dw_mci_rockchip_match);
+struct dw_mci_rockchip_broken_boards_data {
+ struct notifier_block reset_nb;
+ struct platform_device *pdev;
+};
+
+/* This reboot handler handles cases where disabling the SDMMC on
+ * reboot will cause the hardware to be unable to start correctly
+ * after rebooting.
+ *
+ * This happens with Tinkerboard systems...
+ */
+static int dw_mci_rockchip_broken_boards_reset_nb(
+ struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ struct dw_mci_rockchip_broken_boards_data const *data =
+ container_of(this,
+ struct dw_mci_rockchip_broken_boards_data,
+ reset_nb);
+ struct dw_mci *host = platform_get_drvdata(data->pdev);
+ struct mmc_host *mmc = host->slot->mmc;
+
+ printk(KERN_ERR "Meow.\n");
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+
+ printk(KERN_ERR "woeM.\n");
+
+ return NOTIFY_DONE;
+}
+
+static void dw_mci_rockchip_register_broken_boards_reboot_handler(
+ struct platform_device *pdev)
+{
+ struct dw_mci_rockchip_broken_boards_data *data;
+
+ if (!of_machine_is_compatible("asus,rk3288-tinker"))
+ return;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+
+ if (!data)
+ return;
+
+ data->reset_nb.notifier_call =
+ dw_mci_rockchip_broken_boards_reset_nb;
+ data->reset_nb.priority = 255;
+ register_restart_handler(&data->reset_nb);
+
+ data->pdev = pdev;
+}
+
static int dw_mci_rockchip_probe(struct platform_device *pdev)
{
const struct dw_mci_drv_data *drv_data;
@@ -361,6 +426,7 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
}
pm_runtime_put_autosuspend(&pdev->dev);
+ dw_mci_rockchip_register_broken_boards_reboot_handler(pdev);
return 0;
}
--
2.14.1

2295
buildroot-external/board/asus/tinker/patches/linux/1006-rockchip-rga-v4l2-m2m-support.patch
View File

File diff suppressed because it is too large Load Diff

82
buildroot-external/board/asus/tinker/patches/linux/1006-soc-rockchip-power-domain-export-idle-request.patch Normal file
View File

@ -0,0 +1,82 @@
From 4ffe79de7272234408a9179aa4c403ee1b67a362 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 7 Dec 2017 21:27:52 +0100
Subject: [PATCH] soc: rockchip: power-domain: export idle request
We need to put the power status of HEVC/RKVDEC IP into IDLE
unless we can't reset that IP or the SoC would crash down.
rockchip_pmu_idle_request(dev, true)---> enter idle
rockchip_pmu_idle_request(dev, false)---> exit idle
Only the video codec drivers of rockchip platform would
request this patch currently.
I am not sure whether it is necessary to add a new function
at generic power domain. I want someone give me some advises
here.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
include/linux/rockchip_pmu.h | 15 +++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 include/linux/rockchip_pmu.h
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 40b75748..0006ed53 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -180,6 +180,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
return 0;
}
+int rockchip_pmu_idle_request(struct device *dev, bool idle)
+{
+ struct generic_pm_domain *genpd;
+ struct rockchip_pm_domain *pd;
+ int ret;
+
+ if (IS_ERR_OR_NULL(dev))
+ return -EINVAL;
+
+ if (IS_ERR_OR_NULL(dev->pm_domain))
+ return -EINVAL;
+
+ genpd = pd_to_genpd(dev->pm_domain);
+ pd = to_rockchip_pd(genpd);
+
+ mutex_lock(&pd->pmu->mutex);
+ ret = rockchip_pmu_set_idle_request(pd, idle);
+ mutex_unlock(&pd->pmu->mutex);
+
+ return ret;
+}
+EXPORT_SYMBOL(rockchip_pmu_idle_request);
+
static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
{
int i;
diff --git a/include/linux/rockchip_pmu.h b/include/linux/rockchip_pmu.h
new file mode 100644
index 00000000..720b3314
--- /dev/null
+++ b/include/linux/rockchip_pmu.h
@@ -0,0 +1,15 @@
+/*
+ * pm_domain.h - Definitions and headers related to device power domains.
+ *
+ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
+ *
+ * This file is released under the GPLv2.
+ */
+
+#ifndef _LINUX_ROCKCHIP_PM_H
+#define _LINUX_ROCKCHIP_PM_H
+#include <linux/device.h>
+
+int rockchip_pmu_idle_request(struct device *dev, bool idle);
+
+#endif /* _LINUX_ROCKCHIP_PM_H */
--
2.14.1

59
buildroot-external/board/asus/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch
View File

@ -1,59 +0,0 @@
From c9f505dba7e4a3adc62054b852349e8bbae10326 Mon Sep 17 00:00:00 2001
From: Jacob Chen <jacob-chen@iotwrt.com>
Date: Mon, 26 Jun 2017 22:53:22 +0800
Subject: [PATCH 5/9] dt-bindings: Document the Rockchip RGA bindings
Add DT bindings documentation for Rockchip RGA
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
---
.../devicetree/bindings/media/rockchip-rga.txt | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt
new file mode 100644
index 00000000..48a260e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
@@ -0,0 +1,36 @@
+device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)
+
+RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
+graphics operations, such as point/line drawing, image scaling, rotation,
+BitBLT, alpha blending and image blur/sharpness.
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3228-rga";
+ "rockchip,rk3288-rga";
+ "rockchip,rk3399-rga";
+
+- interrupts: RGA interrupt number.
+
+- clocks: phandle to RGA sclk/hclk/aclk clocks
+
+- clock-names: should be "aclk" "hclk" and "sclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+- reset-names: should be "core" "axi" and "ahb"
+
+Example:
+SoC specific DT entry:
+ rga: rga@ff680000 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0xff680000 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
+ reset-names = "core, "axi", "ahb";
+ status = "disabled";
+ };
--
2.13.0

83
buildroot-external/board/asus/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch
View File

@ -1,83 +0,0 @@
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 7b6eb0ad513b..96b6935dc0d7 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -2748,6 +2748,8 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
chan->xfer_len = urb->length - urb->actual_length;
chan->xfer_count = 0;
+ chan->csplit_nak = 0;
+
/* Set the split attributes if required */
if (qh->do_split)
dwc2_hc_init_split(hsotg, chan, qtd, urb);
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 78e9e01051b5..e54f1351225b 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -143,6 +143,7 @@ struct dwc2_host_chan {
u8 halt_pending;
u8 do_split;
u8 complete_split;
+ u8 csplit_nak;
u8 hub_addr;
u8 hub_port;
u8 xact_pos;
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index 916d991b96b8..551cfacd2252 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -691,6 +691,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
enum dwc2_transaction_type tr_type;
u32 haintmsk;
int free_qtd = 0;
+ int continue_trans = 1;
if (dbg_hc(chan))
dev_vdbg(hsotg->dev, " %s: channel %d, halt_status %d\n",
@@ -719,6 +720,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
* deactivated. Don't want to do anything except release the
* host channel and try to queue more transfers.
*/
+ continue_trans = 0;
goto cleanup;
case DWC2_HC_XFER_PERIODIC_INCOMPLETE:
dev_vdbg(hsotg->dev, " Complete URB with I/O error\n");
@@ -730,6 +732,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
break;
}
+ if (chan->csplit_nak) {
+ continue_trans = 0;
+ chan->csplit_nak = 0;
+ }
+
dwc2_deactivate_qh(hsotg, chan->qh, free_qtd);
cleanup:
@@ -767,9 +774,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
dwc2_writel(haintmsk, hsotg->regs + HAINTMSK);
/* Try to queue more transfers now that there's a free channel */
- tr_type = dwc2_hcd_select_transactions(hsotg);
- if (tr_type != DWC2_TRANSACTION_NONE)
- dwc2_hcd_queue_transactions(hsotg, tr_type);
+ if (continue_trans) {
+ tr_type = dwc2_hcd_select_transactions(hsotg);
+ if (tr_type != DWC2_TRANSACTION_NONE)
+ dwc2_hcd_queue_transactions(hsotg, tr_type);
+ }
}
/*
@@ -1205,6 +1214,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
if (chan->do_split) {
if (chan->complete_split)
qtd->error_count = 0;
+ chan->csplit_nak = 1;
qtd->complete_split = 0;
dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_NAK);
goto handle_nak_done;
--
2.11.0

44
buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch Normal file
View File

@ -0,0 +1,44 @@
From 04fbf78e4e569bf872f1ffcb0a6f9b89569dc913 Mon Sep 17 00:00:00 2001
From: Hal Emmerich <hal@halemmerich.com>
Date: Thu, 19 Jul 2018 21:48:08 -0500
Subject: [PATCH] usb: dwc2: disable power_down on rockchip devices
The bug would let the usb controller enter partial power down,
which was formally known as hibernate, upon boot if nothing was plugged
in to the port. Partial power down couldn't be exited properly, so any
usb devices plugged in after boot would not be usable.
Before the name change, params.hibernation was false by default, so
_dwc2_hcd_suspend() would skip entering hibernation. With the
rename, _dwc2_hcd_suspend() was changed to use params.power_down
to decide whether or not to enter partial power down.
Since params.power_down is non-zero by default, it needs to be set
to 0 for rockchip devices to restore functionality.
This bug was reported in the linux-usb thread:
REGRESSION: usb: dwc2: USB device not seen after boot
The commit that caused this regression is:
6d23ee9caa6790aea047f9aca7f3c03cb8d96eb6
Signed-off-by: Hal Emmerich <hal@halemmerich.com>
---
drivers/usb/dwc2/params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index f03e418..492607a 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -82,6 +82,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
p->host_perio_tx_fifo_size = 256;
p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
GAHBCFG_HBSTLEN_SHIFT;
+ p->power_down = 0;
}
static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
--
2.11.0

228
buildroot-external/board/asus/tinker/patches/linux/1009-drivers-clk-rk3288-support-for-dedicating-NPLL-to-a-.patch Normal file
View File

@ -0,0 +1,228 @@
From bc16cd0aa3cdaaff27b9bf2d3282ccfff81d8784 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 02:56:32 +0200
Subject: [PATCH 5/6] drivers: clk-rk3288: support for dedicating NPLL to a VOP
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
I'm not really sure what this does exactly. It basically sets the
parent clock of the newly added clocks, if the newly added property
"rockchip,npll-for-vop" is detected and set.
I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
so I cannot comment on what it's doing and if it's a good idea in
general.
The only thing I know from this patchset is that it works and have
resolved some purple line issue at the left of my HDMI screen, when
connected to MiQi or Tinkerboard devices.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 98 ++++++++++++++++++++++++++++++++-------
drivers/clk/rockchip/clk.h | 3 ++
2 files changed, 85 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index fd2058f7d..b5b56169d 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -83,22 +83,43 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
RK3066_PLL_RATE( 768000000, 1, 64, 2),
RK3066_PLL_RATE( 742500000, 8, 495, 2),
RK3066_PLL_RATE( 696000000, 1, 58, 2),
+ RK3066_PLL_RATE_NB(621000000, 1, 207, 8, 1),
RK3066_PLL_RATE( 600000000, 1, 50, 2),
RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1),
RK3066_PLL_RATE( 552000000, 1, 46, 2),
RK3066_PLL_RATE( 504000000, 1, 84, 4),
RK3066_PLL_RATE( 500000000, 3, 125, 2),
RK3066_PLL_RATE( 456000000, 1, 76, 4),
+ RK3066_PLL_RATE( 428000000, 1, 107, 6),
RK3066_PLL_RATE( 408000000, 1, 68, 4),
RK3066_PLL_RATE( 400000000, 3, 100, 2),
+ RK3066_PLL_RATE_NB( 394000000, 1, 197, 12, 1),
RK3066_PLL_RATE( 384000000, 2, 128, 4),
RK3066_PLL_RATE( 360000000, 1, 60, 4),
+ RK3066_PLL_RATE_NB( 356000000, 1, 178, 12, 1),
+ RK3066_PLL_RATE_NB( 324000000, 1, 189, 14, 1),
RK3066_PLL_RATE( 312000000, 1, 52, 4),
- RK3066_PLL_RATE( 300000000, 1, 50, 4),
- RK3066_PLL_RATE( 297000000, 2, 198, 8),
+ RK3066_PLL_RATE_NB( 308000000, 1, 154, 12, 1),
+ RK3066_PLL_RATE_NB( 303000000, 1, 202, 16, 1),
+ RK3066_PLL_RATE( 300000000, 1, 75, 6),
+ RK3066_PLL_RATE_NB( 297750000, 2, 397, 16, 1),
+ RK3066_PLL_RATE_NB( 293250000, 2, 391, 16, 1),
+ RK3066_PLL_RATE_NB( 292500000, 1, 195, 16, 1),
+ RK3066_PLL_RATE( 273600000, 1, 114, 10),
+ RK3066_PLL_RATE_NB( 273000000, 1, 182, 16, 1),
+ RK3066_PLL_RATE_NB( 270000000, 1, 180, 16, 1),
+ RK3066_PLL_RATE_NB( 266250000, 2, 355, 16, 1),
+ RK3066_PLL_RATE_NB( 256500000, 1, 171, 16, 1),
RK3066_PLL_RATE( 252000000, 1, 84, 8),
- RK3066_PLL_RATE( 216000000, 1, 72, 8),
- RK3066_PLL_RATE( 148500000, 2, 99, 8),
+ RK3066_PLL_RATE_NB( 250500000, 1, 167, 16, 1),
+ RK3066_PLL_RATE_NB( 243428571, 1, 142, 14, 1),
+ RK3066_PLL_RATE( 238000000, 1, 119, 12),
+ RK3066_PLL_RATE_NB( 219750000, 2, 293, 16, 1),
+ RK3066_PLL_RATE_NB( 216000000, 1, 144, 16, 1),
+ RK3066_PLL_RATE_NB( 213000000, 1, 142, 16, 1),
+ RK3066_PLL_RATE( 195428571, 1, 114, 14),
+ RK3066_PLL_RATE( 160000000, 1, 80, 12),
+ RK3066_PLL_RATE( 157500000, 1, 105, 16),
RK3066_PLL_RATE( 126000000, 1, 84, 16),
RK3066_PLL_RATE( 48000000, 1, 64, 32),
{ /* sentinel */ },
@@ -194,10 +215,14 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu" };
PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
-PNAME(mux_pll_src_npll_cpll_gpll_p) = { "npll", "cpll", "gpll" };
-PNAME(mux_pll_src_cpll_gpll_npll_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_npll_cpll_gpll_p) = { "npll", "cpll", "gpll" };
+
+PNAME_ED(mux_pll_src_cgn_pll_nonvop_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
+
PNAME(mux_pll_src_cpll_gpll_usb480m_p) = { "cpll", "gpll", "usbphy480m_src" };
-PNAME(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
+PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
PNAME(mux_mmc_src_p) = { "cpll", "gpll", "xin24m", "xin24m" };
PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
@@ -443,24 +468,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(3), 4, GFLAGS),
- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cgn_pll_vop0_p, 0,
RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
RK3288_CLKGATE_CON(3), 1, GFLAGS),
- COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cgn_pll_vop1_p, 0,
RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
RK3288_CLKGATE_CON(3), 3, GFLAGS),
COMPOSITE_NODIV(SCLK_EDP_24M, "sclk_edp_24m", mux_edp_24m_p, 0,
RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
RK3288_CLKGATE_CON(3), 12, GFLAGS),
- COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 13, GFLAGS),
- COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 14, GFLAGS),
- COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 15, GFLAGS),
@@ -469,16 +494,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
RK3288_CLKGATE_CON(5), 11, GFLAGS),
- COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 13, GFLAGS),
DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
- COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 14, GFLAGS),
- COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 15, GFLAGS),
@@ -552,7 +577,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 11, GFLAGS),
- COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(0, "sclk_tsp", mux_pll_src_cgn_pll_nonvop_p, 0,
RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 10, GFLAGS),
@@ -912,6 +937,7 @@ static void __init rk3288_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
struct clk *clk;
+ s32 npll_vop = -1;
rk3288_cru_base = of_iomap(np, 0);
if (!rk3288_cru_base) {
@@ -919,6 +945,46 @@ static void __init rk3288_clk_init(struct device_node *np)
return;
}
+ if (!of_property_read_s32(np, "rockchip,npll-for-vop", &npll_vop)) {
+ if ((npll_vop < -1) || (npll_vop > 1)) {
+ pr_warn("%s: invalid VOP to dedicate NPLL to: %d\n",
+ __func__, npll_vop);
+ } else if (npll_vop >= 0) {
+ unsigned int vop_clk_id;
+ const char ** npll_names;
+ const char ** non_npll_names;
+ int i;
+
+ /* Firstly, not-VOP needs to not use npll */
+ mux_pll_src_npll_cpll_gpll_p[0] = "dummy_npll";
+ mux_pll_src_cgn_pll_nonvop_p[2] = "dummy_npll";
+ mux_pll_src_cpll_gll_usb_npll_p[3] = "dummy_npll";
+
+ /* Then the npll VOP needs to only use npll, and the other one not use npll. */
+ if (npll_vop) {
+ vop_clk_id = DCLK_VOP1;
+ npll_names = mux_pll_src_cgn_pll_vop1_p;
+ non_npll_names = mux_pll_src_cgn_pll_vop0_p;
+ } else {
+ vop_clk_id = DCLK_VOP0;
+ npll_names = mux_pll_src_cgn_pll_vop0_p;
+ non_npll_names = mux_pll_src_cgn_pll_vop1_p;
+ }
+ npll_names[0] = "dummy_cpll";
+ npll_names[1] = "dummy_gpll";
+ non_npll_names[2] = "dummy_npll";
+
+ /* Lastly the npll-dedicated-VOP needs to be able to control npll. */
+ for (i = 0; i < ARRAY_SIZE(rk3288_clk_branches); i++) {
+ if (rk3288_clk_branches[i].id == vop_clk_id) {
+ rk3288_clk_branches[i].flags |= CLK_SET_RATE_PARENT;
+ break;
+ }
+ }
+ pr_debug("%s: npll dedicated for VOP %d\n", __func__, npll_vop);
+ }
+ }
+
ctx = rockchip_clk_init(np, rk3288_cru_base, CLK_NR_CLKS);
if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__);
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 6b53fff4c..dbda9d281 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -382,6 +382,9 @@ struct clk *rockchip_clk_register_muxgrf(const char *name,
#define PNAME(x) static const char *const x[] __initconst
+/* For when you want to be able to modify the pointers. */
+#define PNAME_ED(x) static const char * x[] __initdata
+
enum rockchip_clk_branch_type {
branch_composite,
branch_mux,
--
2.16.4

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@ -0,0 +1,424 @@
From 6c86916e81fa18394d9b57b4af44f9948e100e96 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 03:02:10 +0200
Subject: [PATCH 6/6] drm: dw_hdmi-rockchip: better clock selection logic and
dts-based rate list
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
The original description was :
This contains traces of the following commits from the ChromeOS 3.14
tree, which improve RF/EMI performance and detach the clock selection
logic from the HDMI PHY configurations, plus support for configuring
the allowed clock rates via device tree as they are dependent on
PLL configuration and maybe even the PCB layout and other hardware things,
eg. interference to wifi or such (EMI).
Rates that were allowed previous to this patch are added as the fallback
list if no dts configuration exists.
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Adjust rockchip_mpll_cfg for 146.25
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: expand the informal mpll config
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: add slop to more tables
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: redo rockchip hdmi to allow slop
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Use auto-generated tables
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Fixup the clock to be what we expect
CHROMIUM: drm/rockchip: hdmi: adjust cklvl & txlvl for RF/EMI
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Set cur_ctr to 0 always
CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Decrease slop
https://www.spinics.net/lists/arm-kernel/msg673163.html
This is the patch that takes into account the new property
"rockchip,hdmi-rates-hz" that allows the definition of the HDMI
frequencies in the DTS file.
This also change a lot of HDMI frequencies definition, so that
*will* require some extensive testing.
Still, if it works fine, this should make tinkering the HDMI
frequencies easier, in case you have a very special HDMI screen.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 269 ++++++++++++++++++----------
1 file changed, 175 insertions(+), 94 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 11309a2a4..740b0aeea 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -49,122 +49,141 @@ struct rockchip_hdmi {
struct clk *vpll_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
+ u32* rates;
+ u32 rates_cnt;
};
+#define CLK_SLOP(clk) ((clk) / 1000)
+#define CLK_PLUS_SLOP(clk) ((clk) + CLK_SLOP(clk))
+
#define to_rockchip_hdmi(x) container_of(x, struct rockchip_hdmi, x)
+/* These were the rates allowed by the driver before rates list in device tree,
+ * so keep them around as a fallback */
+static const u32 dw_hdmi_fallback_rates[] = {
+ 27000000,
+ 36000000,
+ 40000000,
+ 54000000,
+ 65000000,
+ 66000000,
+ 74250000,
+ 83500000,
+ 106500000,
+ 108000000,
+ 146250000,
+ 148500000
+};
+
static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
{
- 27000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ 30666000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40f3, 0x0000 },
+ },
+ }, {
+ 36800000, {
+ { 0x00b3, 0x0000 },
+ { 0x2153, 0x0000 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 36000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ }, {
+ 46000000, {
+ { 0x00b3, 0x0000 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 40000000, {
- { 0x00b3, 0x0000},
- { 0x2153, 0x0000},
- { 0x40f3, 0x0000}
+ }, {
+ 61333000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x40a2, 0x0001 },
},
- }, {
- 54000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
+ }, {
+ 73600000, {
+ { 0x0072, 0x0001 },
+ { 0x2142, 0x0001 },
+ { 0x4061, 0x0002 },
},
- }, {
- 65000000, {
- { 0x0072, 0x0001},
- { 0x2142, 0x0001},
- { 0x40a2, 0x0001},
+ }, {
+ 92000000, {
+ { 0x0072, 0x0001 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
},
- }, {
- 66000000, {
- { 0x013e, 0x0003},
- { 0x217e, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 122666000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4061, 0x0002 },
},
- }, {
- 74250000, {
- { 0x0072, 0x0001},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 147200000, {
+ { 0x0051, 0x0002 },
+ { 0x2145, 0x0002 },
+ { 0x4064, 0x0003 },
},
- }, {
- 83500000, {
- { 0x0072, 0x0001},
+ }, {
+ 184000000, {
+ { 0x0051, 0x0002 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
},
- }, {
- 108000000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 226666000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x4064, 0x0003 },
},
- }, {
- 106500000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 272000000, {
+ { 0x0040, 0x0003 },
+ { 0x214c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
- 146250000, {
- { 0x0051, 0x0002},
- { 0x2145, 0x0002},
- { 0x4061, 0x0002}
+ }, {
+ 340000000, {
+ { 0x0040, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
- 148500000, {
- { 0x0051, 0x0003},
- { 0x214c, 0x0003},
- { 0x4064, 0x0003}
+ }, {
+ 600000000, {
+ { 0x1a40, 0x0003 },
+ { 0x3b4c, 0x0003 },
+ { 0x5a64, 0x0003 },
},
- }, {
+ }, {
~0UL, {
- { 0x00a0, 0x000a },
- { 0x2001, 0x000f },
- { 0x4002, 0x000f },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
+ { 0x0000, 0x0000 },
},
}
};
static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
- /* pixelclk bpp8 bpp10 bpp12 */
+ /* pixelclk bpp8 bpp10 bpp12 */
{
- 40000000, { 0x0018, 0x0018, 0x0018 },
- }, {
- 65000000, { 0x0028, 0x0028, 0x0028 },
- }, {
- 66000000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 74250000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 83500000, { 0x0028, 0x0038, 0x0038 },
- }, {
- 146250000, { 0x0038, 0x0038, 0x0038 },
- }, {
- 148500000, { 0x0000, 0x0038, 0x0038 },
- }, {
- ~0UL, { 0x0000, 0x0000, 0x0000},
- }
+ 600000000, { 0x0000, 0x0000, 0x0000 },
+ }, {
+ ~0UL, { 0x0000, 0x0000, 0x0000 },
+ },
};
static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
/*pixelclk symbol term vlev*/
- { 74250000, 0x8009, 0x0004, 0x0272},
- { 148500000, 0x802b, 0x0004, 0x028d},
- { 297000000, 0x8039, 0x0005, 0x028d},
- { ~0UL, 0x0000, 0x0000, 0x0000}
+ { CLK_PLUS_SLOP(74250000), 0x8009, 0x0004, 0x0272},
+ { CLK_PLUS_SLOP(165000000), 0x802b, 0x0004, 0x0209},
+ { CLK_PLUS_SLOP(297000000), 0x8039, 0x0005, 0x028d},
+ { ~0UL, 0x0000, 0x0000, 0x0000}
};
static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
{
struct device_node *np = hdmi->dev->of_node;
+ int rates_cnt;
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
if (IS_ERR(hdmi->regmap)) {
@@ -192,26 +211,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
return PTR_ERR(hdmi->grf_clk);
}
+ if ((rates_cnt = of_property_count_u32_elems(np, "rockchip,hdmi-rates-hz")) > 0) {
+ int rv;
+ u32 *rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
+ if (!rates)
+ return -ENOMEM;
+ rv = of_property_read_u32_array(np, "rockchip,hdmi-rates-hz", rates, rates_cnt);
+ if (rv)
+ return rv;
+ hdmi->rates = rates;
+ hdmi->rates_cnt = rates_cnt;
+ } else {
+ rates_cnt = ARRAY_SIZE(dw_hdmi_fallback_rates);
+ hdmi->rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
+ if (!hdmi->rates)
+ return -ENOMEM;
+ memcpy(hdmi->rates, dw_hdmi_fallback_rates, rates_cnt * sizeof(u32));
+ hdmi->rates_cnt = rates_cnt;
+ }
+
+
return 0;
}
static enum drm_mode_status
-dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
+dw_hdmi_rockchip_encoder_mode_valid(struct drm_encoder *encoder,
const struct drm_display_mode *mode)
{
- const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
+ struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
int pclk = mode->clock * 1000;
- bool valid = false;
+ int num_rates = hdmi->rates_cnt;
int i;
- for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
- if (pclk == mpll_cfg[i].mpixelclock) {
- valid = true;
- break;
- }
+ /*
+ * Pixel clocks we support are always < 2GHz and so fit in an
+ * int. We should make sure source rate does too so we don't get
+ * overflow when we multiply by 1000.
+ */
+ if (mode->clock > INT_MAX / 1000)
+ return MODE_BAD;
+
+ for (i = 0; i < num_rates; i++) {
+ int slop = CLK_SLOP(pclk);
+
+ if ((pclk >= hdmi->rates[i] - slop) &&
+ (pclk <= hdmi->rates[i] + slop))
+ return MODE_OK;
}
- return (valid) ? MODE_OK : MODE_BAD;
+ return MODE_BAD;
}
static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
@@ -227,7 +275,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
- return true;
+ struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
+ int pclk = adj_mode->clock * 1000;
+ int best_diff = INT_MAX;
+ int best_clock = 0;
+ int slop;
+ int i;
+
+ /* Pick the best clock */
+ for (i = 0; i < hdmi->rates_cnt; i++) {
+ int diff = hdmi->rates[i] - pclk;
+
+ if (diff < 0)
+ diff = -diff;
+ if (diff < best_diff) {
+ best_diff = diff;
+ best_clock = hdmi->rates[i];
+
+ /* Bail early if we're exact */
+ if (best_diff == 0)
+ return true;
+ }
+ }
+
+ /* Double check that it's OK */
+ slop = CLK_SLOP(pclk);
+ if ((pclk >= best_clock - slop) && (pclk <= best_clock + slop)) {
+ adj_mode->clock = DIV_ROUND_UP(best_clock, 1000);
+ return true;
+ }
+
+ /* Shoudn't be here; we should have said rate wasn't valid */
+ dev_warn(hdmi->dev, "tried to set invalid rate %d\n", adj_mode->clock);
+ return false;
}
static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
@@ -280,6 +360,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
}
static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
+ .mode_valid = dw_hdmi_rockchip_encoder_mode_valid,
.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
.mode_set = dw_hdmi_rockchip_encoder_mode_set,
.enable = dw_hdmi_rockchip_encoder_enable,
@@ -294,7 +375,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
};
static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -308,7 +388,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
};
static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -387,6 +466,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
*/
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
+ devm_kfree(hdmi->dev, hdmi->rates);
drm_encoder_cleanup(encoder);
clk_disable_unprepare(hdmi->vpll_clk);
}
@@ -399,6 +479,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
{
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
+ devm_kfree(hdmi->dev, hdmi->rates);
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->vpll_clk);
}
--
2.16.4

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View File

@ -0,0 +1,63 @@
From 1680a655127a62e74cbcfb84782e04a9c55dcf81 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 5 Sep 2018 19:00:09 -0300
Subject: [PATCH 3/6] media: Add JPEG_RAW format
Add V4L2_PIX_FMT_JPEG_RAW format that does not contain
JPEG header in the output frame.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/media/uapi/v4l/pixfmt-compressed.rst | 9 +++++++++
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/uapi/linux/videodev2.h | 1 +
3 files changed, 11 insertions(+)
diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
index d382e7a5..4dffe400 100644
--- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
@@ -23,6 +23,15 @@ Compressed Formats
- 'JPEG'
- TBD. See also :ref:`VIDIOC_G_JPEGCOMP <VIDIOC_G_JPEGCOMP>`,
:ref:`VIDIOC_S_JPEGCOMP <VIDIOC_G_JPEGCOMP>`.
+ * .. _V4L2-PIX-FMT-JPEG-RAW:
+
+ - ``V4L2_PIX_FMT_JPEG_RAW``
+ - 'Raw JPEG'
+ - Raw JPEG bitstream, containing a compressed payload. This format
+ contains an image scan, i.e. without any metadata or headers.
+ The user is expected to set the needed metadata such as
+ quantization and entropy encoding tables, via ``V4L2_CID_JPEG``
+ controls, see :ref:`jpeg-control-id`.
* .. _V4L2-PIX-FMT-MPEG:
- ``V4L2_PIX_FMT_MPEG``
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 54afc9c7..0dcd95f4 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1301,6 +1301,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
/* Max description length mask: descr = "0123456789012345678901234567890" */
case V4L2_PIX_FMT_MJPEG: descr = "Motion-JPEG"; break;
case V4L2_PIX_FMT_JPEG: descr = "JFIF JPEG"; break;
+ case V4L2_PIX_FMT_JPEG_RAW: descr = "Raw JPEG"; break;
case V4L2_PIX_FMT_DV: descr = "1394"; break;
case V4L2_PIX_FMT_MPEG: descr = "MPEG-1/2/4"; break;
case V4L2_PIX_FMT_H264: descr = "H.264"; break;
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 5d1a3685..f271048c 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -627,6 +627,7 @@ struct v4l2_pix_format {
/* compressed formats */
#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */
#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */
+#define V4L2_PIX_FMT_JPEG_RAW v4l2_fourcc('J', 'P', 'G', 'R') /* JFIF JPEG RAW without headers */
#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */
#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
--
2.16.4

153
buildroot-external/board/asus/tinker/patches/linux/1101-media-Add-controls-for-JPEG-quantization-tables.patch Normal file
View File

@ -0,0 +1,153 @@
From 82da876c36ccc7791d5b20e7ee8b50379f7b19aa Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 5 Sep 2018 19:00:10 -0300
Subject: [PATCH 4/6] media: Add controls for JPEG quantization tables
Add V4L2_CID_JPEG_QUANTIZATION compound control to allow userspace
configure the JPEG quantization tables.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/media/uapi/v4l/extended-controls.rst | 31 ++++++++++++++++++++++
Documentation/media/videodev2.h.rst.exceptions | 1 +
drivers/media/v4l2-core/v4l2-ctrls.c | 10 +++++++
include/uapi/linux/v4l2-controls.h | 12 +++++++++
include/uapi/linux/videodev2.h | 1 +
5 files changed, 55 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index 9f7312bf..1335d27d 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -3354,7 +3354,38 @@ JPEG Control IDs
Specify which JPEG markers are included in compressed stream. This
control is valid only for encoders.
+.. _jpeg-quant-tables-control:
+``V4L2_CID_JPEG_QUANTIZATION (struct)``
+ Specifies the luma and chroma quantization matrices for encoding
+ or decoding a V4L2_PIX_FMT_JPEG_RAW format buffer. The :ref:`itu-t81`
+ specification allows 8-bit quantization coefficients for
+ baseline profile images, and 8-bit or 16-bit for extended profile
+ images. Supporting or not 16-bit precision coefficients is driver-specific.
+ Coefficients must be set in JPEG zigzag scan order.
+
+
+.. c:type:: struct v4l2_ctrl_jpeg_quantization
+
+.. cssclass:: longtable
+
+.. flat-table:: struct v4l2_ctrl_jpeg_quantization
+ :header-rows: 0
+ :stub-columns: 0
+ :widths: 1 1 2
+
+ * - __u8
+ - ``precision``
+ - Specifies the coefficient precision. User shall set 0
+ for 8-bit, and 1 for 16-bit.
+
+ * - __u16
+ - ``luma_quantization_matrix[64]``
+ - Sets the luma quantization table.
+
+ * - __u16
+ - ``chroma_quantization_matrix[64]``
+ - Sets the chroma quantization table.
.. flat-table::
:header-rows: 0
diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/media/videodev2.h.rst.exceptions
index ca9f0edc..a0a38e92 100644
--- a/Documentation/media/videodev2.h.rst.exceptions
+++ b/Documentation/media/videodev2.h.rst.exceptions
@@ -129,6 +129,7 @@ replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type`
+replace symbol V4L2_CTRL_TYPE_JPEG_QUANTIZATION :c:type:`v4l2_ctrl_type`
# V4L2 capability defines
replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index 599c1cbf..305bd7a9 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -999,6 +999,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_JPEG_RESTART_INTERVAL: return "Restart Interval";
case V4L2_CID_JPEG_COMPRESSION_QUALITY: return "Compression Quality";
case V4L2_CID_JPEG_ACTIVE_MARKER: return "Active Markers";
+ case V4L2_CID_JPEG_QUANTIZATION: return "JPEG Quantization Tables";
/* Image source controls */
/* Keep the order of the 'case's the same as in v4l2-controls.h! */
@@ -1286,6 +1287,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
case V4L2_CID_DETECT_MD_REGION_GRID:
*type = V4L2_CTRL_TYPE_U8;
break;
+ case V4L2_CID_JPEG_QUANTIZATION:
+ *type = V4L2_CTRL_TYPE_JPEG_QUANTIZATION;
+ break;
case V4L2_CID_DETECT_MD_THRESHOLD_GRID:
*type = V4L2_CTRL_TYPE_U16;
break;
@@ -1612,6 +1616,9 @@ static int std_validate(const struct v4l2_ctrl *ctrl, u32 idx,
return -ERANGE;
return 0;
+ case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
+ return 0;
+
default:
return -EINVAL;
}
@@ -2133,6 +2140,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
case V4L2_CTRL_TYPE_U32:
elem_size = sizeof(u32);
break;
+ case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
+ elem_size = sizeof(struct v4l2_ctrl_jpeg_quantization);
+ break;
default:
if (type < V4L2_CTRL_COMPOUND_TYPES)
elem_size = sizeof(s32);
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index e4ee10ee..856b3325 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -987,6 +987,18 @@ enum v4l2_jpeg_chroma_subsampling {
#define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17)
#define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18)
+#define V4L2_CID_JPEG_QUANTIZATION (V4L2_CID_JPEG_CLASS_BASE + 5)
+struct v4l2_ctrl_jpeg_quantization {
+ /* ITU-T.81 specifies two quantization coefficient precisions:
+ * 8-bit for baseline profile,
+ * 8-bit or 16-bit for extended profile.
+ *
+ * User shall set "precision" to 0 for 8-bit and 1 for 16-bit.
+ */
+ __u8 precision;
+ __u16 luma_quantization_matrix[64];
+ __u16 chroma_quantization_matrix[64];
+};
/* Image source controls */
#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index f271048c..e998d074 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -1630,6 +1630,7 @@ enum v4l2_ctrl_type {
V4L2_CTRL_TYPE_U8 = 0x0100,
V4L2_CTRL_TYPE_U16 = 0x0101,
V4L2_CTRL_TYPE_U32 = 0x0102,
+ V4L2_CTRL_TYPE_JPEG_QUANTIZATION = 0x0103,
};
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
--
2.16.4

0
buildroot-external/board/asus/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch → buildroot-external/board/asus/tinker/patches/linux/2009-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch → buildroot-external/board/asus/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch → buildroot-external/board/asus/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch
View File

40
buildroot-external/board/asus/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch
View File

@ -1,40 +0,0 @@
From 3fe37d29b53e3d06c8f4314cfc113bfa679f67eb Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:48:05 +0200
Subject: [PATCH 15/28] ARM: DTSI: rk3288.dtsi: Add the RGA node
Imported from @wzyy2 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 10ecebb4..455446f6 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1159,6 +1159,20 @@
};
};
+ rga: rga@ff920000 {
+ compatible = "rockchip,rk3288-rga";
+ reg = <0x0 0xff920000 0x0 0x180>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+ clock-names = "aclk", "hclk", "sclk";
+ power-domains = <&power RK3288_PD_VIO>;
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
+
+ reset-names = "core", "axi", "ahb";
+ status = "disabled";
+ };
+
vpu_mmu: iommu@ff9a0800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0800 0x0 0x100>;
--
2.11.0

0
buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch → buildroot-external/board/asus/tinker/patches/linux/2012-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch → buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2028-Tinker-Bluetooth.patch → buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch
View File

29
buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Improving-the-CPU-max-volt.patch Normal file
View File

@ -0,0 +1,29 @@
From d4775f623b25009039a8ef3f28332033c7766ecc Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:20:33 +0200
Subject: [PATCH 19/28] ARM: DTS: rk3288-tinker.dts: Improving the CPU max
voltage
Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index c552fd95..4ce94698 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -243,7 +243,7 @@
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-max-microvolt = <1450000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.11.0

0
buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch → buildroot-external/board/asus/tinker/patches/linux/2016-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch
View File

4
buildroot-external/board/asus/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch → buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch
View File

@ -30,12 +30,12 @@ index 90c1a251..67a3ce6f 100644
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0 0x0c>;
+ reg = <0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x0 0x50>;
+ reg = <0x50>;
+ };
+};
+

35
buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch
View File

@ -1,35 +0,0 @@
From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:36:02 +0200
Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
Taken from, and tested by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 67a3ce6f..6f4c0843 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -443,6 +443,15 @@
sdcard-supply = <&vccio_sd>;
};
+&mipi_dsi {
+ status = "okay";
+ mipi_panel: mipi-panel {
+ compatible ="asus,tc358762";
+ reg = <0x0 0>;
+ status = "okay";
+ };
+};
+
&sdio0 {
status = "okay";
clock-frequency = <50000000>;
--
2.11.0

0
buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch → buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch
View File

49
buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch
View File

@ -1,49 +0,0 @@
From 14f951ca2d354ad8fd068d0f3d8648d5c0d1e60e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:40:26 +0200
Subject: [PATCH 23/28] ARM: DTS: rk3288-tinker.dts: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 6f4c0843..f4b4525c 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -471,6 +471,24 @@
};
+&spi2 {
+ status = "okay";
+ max-freq = <50000000>;
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
+
&pinctrl {
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
--
2.11.0

0
buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch → buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTSI-rk3288-Define-the-VPU-services.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch → buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch → buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch → buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch → buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch
View File

39
buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-Renamed-the-VPU-services-clocks.patch Normal file
View File

@ -0,0 +1,39 @@
From 29ef524e8890bbfd24602a61e14234259df92349 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 25 Jun 2018 17:05:37 +0200
Subject: [PATCH 25/26] ARM: DTSI: rk3288: Renamed the VPU services clocks
In order to conform to the naming scheme used in the whole DTSI.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 796609e3..45ec4e89 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1242,7 +1242,7 @@
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- clock-names = "aclk_vcodec", "hclk_vcodec";
+ clock-names = "aclk", "iface";
power-domains = <&power RK3288_PD_VIDEO>;
rockchip,grf = <&grf>;
resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
@@ -1277,8 +1277,8 @@
<&cru SCLK_HEVC_CORE>,
<&cru SCLK_HEVC_CABAC>;
clock-names =
- "aclk_vcodec",
- "hclk_vcodec",
+ "aclk",
+ "iface",
"clk_core",
"clk_cabac";
/*
--
2.16.4

56
buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch Normal file
View File

@ -0,0 +1,56 @@
From d3d3fe433d9038dcd1a98f4d6711c0777ed06703 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 25 Jun 2018 17:08:32 +0200
Subject: [PATCH 26/26] ARM: DTSI: rk3288: Set the VPU MMU power domains
Without that, the auto-activation of the VPU hardware IOMMU fails
when enabling the hardware, before the "probe" phase of its device
driver.
Basically, when loading a "of_platform" device driver targeting
the VPU devices, you'll get these errors without this patch :
[12753.996950] rk_iommu ff9c0440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning
[12754.007483] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
[12754.026652] rk_iommu ff9c0440.iommu: Disable paging request timed out, status: 0xffffffff
[12754.045975] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
When using this patch, the errors disappear.
This seems to be due to the IOMMU device sharing the same power domain
than the device.
When loading an "of_platform" driver, the kernel logic seems to try
enabling the associated IOMMU device before letting the driver handles
anything with the actual VPU hardware.
It appears that setting the power domain of the VPU IOMMU nodes let the
IOMMU driver enable the IOMMU shared power domain, and make the IOMMU
device useable.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 45ec4e89..46e1b8e2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1230,6 +1230,7 @@
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_VIDEO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -1262,6 +1263,7 @@
interrupt-names = "hevc_mmu";
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_HEVC>;
#iommu-cells = <0>;
status = "disabled";
};
--
2.16.4

43
buildroot-external/board/asus/tinker/patches/linux/2027-ARM-dtsi-The-VPU-service-as-defined-in-the-V4L2-driv.patch Normal file
View File

@ -0,0 +1,43 @@
From 7f8607ba9a20f8ddb5c24559d9b875af762d4717 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Tue, 11 Sep 2018 02:55:55 +0200
Subject: [PATCH] ARM: dtsi: The VPU service as defined in the V4L2 driver
Let's try the V4L2 road.
They've got a lot of things ready, like an entire H264
movie with the V4L2 data of *every frame*.
That might help in this endless endeavour.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 72c36af6..d23c7fa5 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1246,7 +1246,18 @@
clock-names = "aclk", "iface";
power-domains = <&power RK3288_PD_VIDEO>;
#iommu-cells = <0>;
- status = "disabled";
+ };
+
+ vpu: video-codec@ff9a0000 {
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk", "hclk";
+ compatible = "rockchip,rk3288-vpu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vepu", "vdpu";
+ iommus = <&vpu_mmu>;
+ power-domains = <&power RK3288_PD_VIDEO>;
+ reg = <0x0 0xff9a0000 0x0 0x800>;
};
hevc_mmu: iommu@ff9c0440 {
--
2.16.4

17
buildroot-external/board/asus/tinker/patches/linux/260_DTS_gpiomem_node.patch
View File

@ -1,17 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 925b277..33b198e 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -100,6 +100,12 @@
};
};
+ rk3288-gpiomem {
+ compatible = "rockchip,rk3288-gpiomem";
+ reg = <0x0 0xff750000 0x0 0x1000>;
+ status = "okay";
+ };
+
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";

364
buildroot-external/board/asus/tinker/patches/linux/261_gpiomem_driver.patch
View File

@ -1,364 +0,0 @@
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index c28dca0..d9df49d 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -6,6 +6,7 @@
menu "Character devices"
source "drivers/tty/Kconfig"
+source "drivers/char/rockchip/Kconfig"
config DEVMEM
bool "/dev/mem virtual device support"
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 7dc3abe..5d43b1d 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -60,3 +60,5 @@ js-rtc-y = rtc.o
obj-$(CONFIG_TILE_SROM) += tile-srom.o
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
+
+obj-$(CONFIG_RK_CHAR_DRIVERS) += rockchip/
diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
new file mode 100644
index 0000000..867d51e
--- /dev/null
+++ b/drivers/char/rockchip/Kconfig
@@ -0,0 +1,16 @@
+#
+# Broadcom char driver config
+#
+
+menuconfig RK_CHAR_DRIVERS
+ bool "Rockchip Char Drivers"
+ help
+ Rockchip's char drivers
+
+config RK3288_DEVGPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
+ default y
+ help
+ Provides users with root-free access to the GPIO registers
+ on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
+ register page to the user's pointer.
diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
new file mode 100644
index 0000000..e7df7f2
--- /dev/null
+++ b/drivers/char/rockchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
new file mode 100644
index 0000000..c289041
--- /dev/null
+++ b/drivers/char/rockchip/rk3288-gpiomem.c
@@ -0,0 +1,307 @@
+/**
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the rk3288's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Ported to rk3288 from Jörg Wolff, 2017
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+
+#define DEVICE_NAME "rk3288-gpiomem"
+#define DRIVER_NAME "gpiomem-rk3288"
+#define DEVICE_MINOR 0
+
+struct rk3288_gpiomem_instance {
+ unsigned long gpio_regs_phys;
+ struct device *dev;
+};
+
+static struct cdev rk3288_gpiomem_cdev;
+static dev_t rk3288_gpiomem_devid;
+static struct class *rk3288_gpiomem_class;
+static struct device *rk3288_gpiomem_dev;
+static struct rk3288_gpiomem_instance *inst;
+
+
+/****************************************************************************
+*
+* GPIO mem chardev file ops
+*
+***************************************************************************/
+
+static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+static int address_is_allowed(unsigned long pfn, unsigned long size)
+{
+ unsigned long address = pfn << PAGE_SHIFT;
+
+ dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
+
+ switch(address) {
+
+ case 0xff750000:
+ case 0xff760000:
+ case 0xff780000:
+ case 0xff790000:
+ case 0xff7a0000:
+ case 0xff7b0000:
+ case 0xff7c0000:
+ case 0xff7d0000:
+ case 0xff7e0000:
+ case 0xff7f0000:
+ case 0xff7f2000:
+ case 0xff770000:
+ case 0xff730000:
+ case 0xff680000:
+ dev_info(inst->dev, "address_is_allowed.return 1");
+ return 1;
+ break;
+ default :
+ dev_info(inst->dev, "address_is_allowed.return 0");
+ return 0;
+ }
+}
+
+static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+
+ size_t size;
+
+ size = vma->vm_end - vma->vm_start;
+
+
+ if (!address_is_allowed(vma->vm_pgoff, size))
+ return -EPERM;
+
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
+ size,
+ vma->vm_page_prot);
+
+ vma->vm_ops = &rk3288_gpiomem_vm_ops;
+
+ /* Remap-pfn-range will mark the range VM_IO */
+ if (remap_pfn_range(vma,
+ vma->vm_start,
+ vma->vm_pgoff,
+ size,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static const struct file_operations
+rk3288_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = rk3288_gpiomem_open,
+ .release = rk3288_gpiomem_release,
+ .mmap = rk3288_gpiomem_mmap,
+};
+
+static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ add_uevent_var(env, "DEVMODE=%#o", 0660);
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Probe and remove functions
+*
+***************************************************************************/
+
+
+static int rk3288_gpiomem_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct resource *ioresource;
+
+ /* Allocate buffers and instance data */
+
+ inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (ioresource) {
+ inst->gpio_regs_phys = ioresource->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&rk3288_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
+ rk3288_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
+ ptr_err = rk3288_gpiomem_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+ rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
+ rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
+ rk3288_gpiomem_devid, NULL,
+ "gpiomem");
+ ptr_err = rk3288_gpiomem_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys);
+
+ return 0;
+
+failed_device_create:
+ class_destroy(rk3288_gpiomem_class);
+failed_class_create:
+ cdev_del(&rk3288_gpiomem_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load rk3288_gpiomem");
+ return err;
+}
+
+static int rk3288_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
+ class_destroy(rk3288_gpiomem_class);
+ cdev_del(&rk3288_gpiomem_cdev);
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id rk3288_gpiomem_of_match[] = {
+ {.compatible = "rockchip,rk3288-gpiomem",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
+
+static struct platform_driver rk3288_gpiomem_driver = {
+ .probe = rk3288_gpiomem_probe,
+ .remove = rk3288_gpiomem_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = rk3288_gpiomem_of_match,
+ },
+};
+
+module_platform_driver(rk3288_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-rk3288");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");

45
buildroot-external/board/asus/tinker/patches/linux/3000_RK3288-Tinkerboard-add-1.7_1.8Ghz_OPP.patch Normal file
View File

@ -0,0 +1,45 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 2601316da..08ec7aa4b 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -210,8 +210,8 @@
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1450000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -222,8 +222,8 @@
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <6000>;
regulator-state-mem {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 22bcaaa29..2fcd46098 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -149,6 +149,14 @@
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
};
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
};
amba {

18
buildroot-external/board/asus/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch → buildroot-external/board/asus/tinker/patches/linux/3001_Tinkerboard-4.19-audio.patch
View File

@ -1,19 +1,19 @@
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 23d1d23..98610ae 100644
index 2bfe4e80a..cea93aaf5 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -434,6 +434,14 @@ static int snd_usb_audio_create(struct usb_interface *intf,
@@ -382,6 +382,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
+
/* retrieve the vendor and device strings as longname */
if (quirk && quirk->vendor_name && *quirk->vendor_name) {
len = strlcpy(card->longname, quirk->vendor_name, sizeof(card->longname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

37
buildroot-external/board/asus/tinker/patches/linux/3002_RK3288-add-missing-interleaved-pcm-attribute.patch Normal file
View File

@ -0,0 +1,37 @@
From 24d6638302b48328a58c13439276d4531af4ca7d Mon Sep 17 00:00:00 2001
From: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Date: Tue, 11 Sep 2018 01:39:32 +0900
Subject: ASoC: rockchip: add missing INTERLEAVED PCM attribute
This patch adds SNDRV_PCM_INFO_INTERLEAVED into PCM hardware info.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
sound/soc/rockchip/rockchip_pcm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
(limited to 'sound/soc/rockchip')
Armbian Note: this patch has been backported from 4.20 to 4.19 due to break in rockchip HDMI/I2S audio. This
can be safely removed once there is a new kernel bump.
Origin: <https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/sound/soc/rockchip?h=linux-4.20.y&id=24d6638302b48328a58c13439276d4531af4ca7d>
diff --git a/sound/soc/rockchip/rockchip_pcm.c b/sound/soc/rockchip/rockchip_pcm.c
index f77538319221..9e7b5fa4cf59 100644
--- a/sound/soc/rockchip/rockchip_pcm.c
+++ b/sound/soc/rockchip/rockchip_pcm.c
@@ -21,7 +21,8 @@ static const struct snd_pcm_hardware snd_rockchip_hardware = {
.info = SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
SNDRV_PCM_INFO_PAUSE |
- SNDRV_PCM_INFO_RESUME,
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_INTERLEAVED,
.period_bytes_min = 32,
.period_bytes_max = 8192,
.periods_min = 1,
--
cgit 1.2-0.3.lf.el7

122
buildroot-external/board/asus/tinker/patches/linux/3004-Tinkerboard-overclocking-operation.patch
View File

@ -1,122 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 07b4af4..f71fa24
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -175,10 +175,83 @@
status = "okay";
};
+ cpu0_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ };
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
&gmac {
@@ -345,8 +345,8 @@
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -357,8 +357,8 @@
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -652,6 +755,11 @@
};
&usb_otg {
+ /*
+ * The otg controller is the only system power source,
+ * so needs to always stay in device mode.
+ */
+ dr_mode = "peripheral";
status= "okay";
};

13
buildroot-external/board/asus/tinker/patches/linux/4001-rockchip-Fix-dai_name-for-HDMI-codec-to-the-asoc-tree.patch
View File

@ -1,13 +0,0 @@
diff --git a/sound/soc/rockchip/rk3288_hdmi_analog.c b/sound/soc/rockchip/rk3288_hdmi_analog.c
index fa44e3901336..929b3fe289b0 100644
--- a/sound/soc/rockchip/rk3288_hdmi_analog.c
+++ b/sound/soc/rockchip/rk3288_hdmi_analog.c
@@ -155,7 +155,7 @@ static struct snd_soc_dai_link_component rk_codecs[] = {
{ },
{
.name = "hdmi-audio-codec.2.auto",
- .dai_name = "hdmi-hifi.0",
+ .dai_name = "i2s-hifi",
},
};

20
buildroot-external/board/asus/tinker/patches/linux/5000-add-link-for-miniarm-dtb-file.patch
View File

@ -1,20 +0,0 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index eff87a3..58fade2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -762,6 +762,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
+ rk3288-miniarm.dtb \
rk3288-veyron-brain.dtb \
rk3288-veyron-jaq.dtb \
rk3288-veyron-jerry.dtb \
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
new file mode 120000
index 0000000..830ab68
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -0,0 +1 @@
+rk3288-tinker.dts
\ No newline at end of file

31
buildroot-external/board/asus/tinker/patches/linux/ARM-DTSI-rk3288-add-usbphy-reset.patch Normal file
View File

@ -0,0 +1,31 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0840ffb3..5393f2cd 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -894,6 +894,8 @@
reg = <0x320>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBOTG_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
@@ -902,6 +904,8 @@
reg = <0x334>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBHOST0_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
@@ -910,6 +914,8 @@
reg = <0x348>;
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBHOST1_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
};

68
buildroot-external/board/asus/tinker/patches/linux/assert-phy-reset-when-waking-up-in-rk3288-platform.patch Normal file
View File

@ -0,0 +1,68 @@
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index cc9c93af..3ff41d87 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -1021,6 +1021,7 @@ struct dwc2_hsotg {
u16 frame_number;
struct phy *phy;
+ struct work_struct phy_rst_work;
struct usb_phy *uphy;
struct dwc2_hsotg_plat *plat;
struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 19ae2595..f1270bf1 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -396,6 +396,7 @@ static void dwc2_wakeup_from_lpm_l1(struct dwc2_hsotg *hsotg)
static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
{
int ret;
+ struct device_node *np = hsotg->dev->of_node;
/* Clear interrupt */
dwc2_writel(hsotg, GINTSTS_WKUPINT, GINTSTS);
@@ -435,6 +436,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
/* Restart the Phy Clock */
pcgcctl &= ~PCGCTL_STOPPCLK;
dwc2_writel(hsotg, pcgcctl, PCGCTL);
+
+ /*
+ * It is a quirk in Rockchip RK3288, causing by
+ * a hardware bug. This will propagate out and
+ * eventually we'll re-enumerate the device.
+ * Not great but the best we can do.
+ */
+ if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
+ schedule_work(&hsotg->phy_rst_work);
+
mod_timer(&hsotg->wkp_timer,
jiffies + msecs_to_jiffies(71));
} else {
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 57764289..748763bd 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -208,6 +208,14 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
return ret;
}
+/* Only used to reset usb phy at interrupter runtime */
+static void dwc2_reset_phy_work(struct work_struct *data)
+{
+ struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg,
+ phy_rst_work);
+ phy_reset(hsotg->phy);
+}
+
static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
{
int i, ret;
@@ -252,6 +260,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
return ret;
}
}
+ INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work);
if (!hsotg->phy) {
hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);

665
buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-support-older-eMMC-installs.patch Normal file
View File

@ -0,0 +1,665 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 2d0b2f4c4..d5c9022e7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -859,6 +859,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly-beta.dtb \
rk3288-firefly.dtb \
rk3288-firefly-reload.dtb \
+ rk3288-miniarm.dtb \
rk3288-miqi.dtb \
rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
new file mode 100644
index 000000000..d0961c35d
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -0,0 +1,647 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/rockchip,rk808.h>
+
+/ {
+ model = "Rockchip RK3288 Tinker Board";
+ compatible = "asus,rk3288-tinker", "rockchip,rk3288";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory {
+ reg = <0x0 0x0 0x0 0x80000000>;
+ device_type = "memory";
+ };
+
+ ext_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwrbtn>;
+
+ button@0 {
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "GPIO Key Power";
+ linux,input-type = <1>;
+ wakeup-source;
+ debounce-interval = <100>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ act-led {
+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger="mmc0";
+ };
+
+ heartbeat-led {
+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger="heartbeat";
+ };
+
+ pwr-led {
+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,tinker-codec";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ };
+
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwr>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "8723bs";
+ sdio_vref = <1800>;
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+/*
+ wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default","rts_gpio";
+ pinctrl-0 = <&uart0_rts>;
+ pinctrl-1 = <&uart0_gpios>;
+ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+*/
+
+};
+
+&cpu0 {
+ cpu0-supply = <&vdd_cpu>;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ phy-supply = <&vcc33_lan>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio4 7 0>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 1000000>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+ status = "ok";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c5>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
+ <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_io>;
+ vcc9-supply = <&vcc_io>;
+ vcc10-supply = <&vcc_io>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_io>;
+ vddio-supply = <&vcc_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_arm";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_io";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc18_ldo1: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_ldo1";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc33_mipi: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_mipi";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd_10";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc18_codec: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_codec";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd10_lcd: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_18: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_18";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_lcd: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc33_sd: SWITCH_REG1 {
+ regulator-boot-on;
+ regulator-name = "vcc33_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc33_lan: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc33_lan";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2s {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+ rockchip,grf = <&grf>;
+ wifi-supply = <&vcc_18>;
+ sdcard-supply = <&vccio_sd>;
+};
+
+&sdio0 {
+ status = "okay";
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ supports-sdio;
+
+};
+
+&pinctrl {
+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ backlight {
+ bl_en: bl-en {
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ buttons {
+ pwrbtn: pwrbtn {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ eth_phy {
+ eth_phy_pwr: eth-phy-pwr {
+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic-int {
+ rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
+ &pcfg_pull_up>;
+ };
+
+ dvs_1: dvs-1 {
+ rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
+ &pcfg_pull_down>;
+ };
+
+ dvs_2: dvs-2 {
+ rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
+ &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <6 20 RK_FUNC_1 \
+ &pcfg_pull_none_drv_8ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_pwr: sdmmc-pwr {
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pwr_3g: pwr-3g {
+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc18_ldo1>;
+ status ="okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp; /* wp not hooked up */
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+ supports-sd;
+ vmmc-supply = <&vcc33_sd>;
+ vqmmc-supply = <&vccio_sd>;
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host1 {
+ status = "okay";
+};
+
+&usb_otg {
+ status= "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
+
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};

23
buildroot-external/board/asus/tinker/patches/linux/brcmfmac-add-ap6330-firmware.patch Normal file
View File

@ -0,0 +1,23 @@
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
index a907d7b06..ec71996c7 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
@@ -619,13 +619,17 @@ BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
+/* AMPAK */
+BRCMF_FW_DEF(AP6330, "brcmfmac-ap6330-sdio");
+
static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
- BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFEF, 4330),
+ BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0x10, AP6330),
BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),

27
buildroot-external/board/asus/tinker/patches/linux/general-increasing_DMA_block_memory_allocation_to_2048.patch Normal file
View File

@ -0,0 +1,27 @@
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 3216e09..21bce28
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
static struct gen_pool *atomic_pool;
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
static int __init early_coherent_pool(char *p)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ada8eb2..8df220f
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
VM_ARM_DMA_CONSISTENT | VM_USERMAP);
}
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool __ro_after_init;
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;

13
buildroot-external/board/asus/tinker/patches/linux/increasing_DMA_block_memory_allocation_to_2048.patch
View File

@ -1,13 +0,0 @@
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index bd83c53..af7cfe3
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -374,7 +374,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
VM_ARM_DMA_CONSISTENT | VM_USERMAP);
}
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool;
static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;

26
buildroot-external/board/asus/tinker/patches/linux/memolry-leak-fix-r8723bs.patch
View File

@ -1,26 +0,0 @@
diff --git a/drivers/staging/rtl8723bs/hal/sdio_ops.c
b/drivers/staging/rtl8723bs/hal/sdio_ops.c
index 6285b72faa9a..ad65cd74c3c8 100644
--- a/drivers/staging/rtl8723bs/hal/sdio_ops.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_ops.c
@@ -1008,6 +1008,7 @@ static struct recv_buf *sd_recv_rxfifo(struct
adapter *padapter, u32 size)
}
if (precvbuf->pskb == NULL) {
+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
DBG_871X("%s: alloc_skb fail! read =%d\n", __func__, readsize);
return NULL;
}
@@ -1017,6 +1018,7 @@ static struct recv_buf *sd_recv_rxfifo(struct
adapter *padapter, u32 size)
preadbuf = precvbuf->pskb->data;
ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID,
readsize, preadbuf);
if (ret == _FAIL) {
+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n",
__func__));
return NULL;
}

22
buildroot-external/board/asus/tinker/patches/linux/staging-rtl8723bs-hide-nolinked-power-save-info-when-not-debugging.patch
View File

@ -1,22 +0,0 @@
diff --git a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
index 820a061506cc..80cf5a8b1557 100644
--- a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
+++ b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
@@ -34,7 +34,7 @@ void _ips_enter(struct adapter *padapter)
if (rf_off == pwrpriv->change_rfpwrstate) {
pwrpriv->bpower_saving = true;
- DBG_871X_LEVEL(_drv_always_, "nolinked power save enter\n");
+ DBG_871X("nolinked power save enter\n");
if (pwrpriv->ips_mode == IPS_LEVEL_2)
pwrpriv->bkeepfwalive = true;
@@ -73,7 +73,7 @@ int _ips_leave(struct adapter *padapter)
if (result == _SUCCESS) {
pwrpriv->rf_pwrstate = rf_on;
}
- DBG_871X_LEVEL(_drv_always_, "nolinked power save leave\n");
+ DBG_871X("nolinked power save leave\n");
DBG_871X("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;

992314
buildroot-external/board/asus/tinker/patches/linux/wifi-0001-realtek-wifi-881xAU-605ecfa.patch
View File

File diff suppressed because it is too large Load Diff

26
buildroot-external/board/asus/tinker/patches/linux/wifi-0002-realtek-wifi-881xAU-adding-kernel-4.14.patch
View File

@ -1,26 +0,0 @@
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 918f449..561b71c 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -39,6 +39,8 @@ source "drivers/net/wireless/cisco/Kconfig"
source "drivers/net/wireless/intel/Kconfig"
source "drivers/net/wireless/intersil/Kconfig"
source "drivers/net/wireless/marvell/Kconfig"
+source "drivers/net/wireless/rtl8812au/Kconfig"
+source "drivers/net/wireless/rtl8814au/Kconfig"
source "drivers/net/wireless/mediatek/Kconfig"
source "drivers/net/wireless/ralink/Kconfig"
source "drivers/net/wireless/realtek/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 59df552..614ddf4 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -12,6 +12,8 @@ obj-$(CONFIG_WLAN_VENDOR_CISCO) += cisco/
obj-$(CONFIG_WLAN_VENDOR_INTEL) += intel/
obj-$(CONFIG_WLAN_VENDOR_INTERSIL) += intersil/
obj-$(CONFIG_WLAN_VENDOR_MARVELL) += marvell/
+obj-$(CONFIG_RTL8812AU) += rtl8812au/
+obj-$(CONFIG_RTL8814AU) += rtl8814au/
obj-$(CONFIG_WLAN_VENDOR_MEDIATEK) += mediatek/
obj-$(CONFIG_WLAN_VENDOR_RALINK) += ralink/
obj-$(CONFIG_WLAN_VENDOR_REALTEK) += realtek/

46
buildroot-external/board/asus/tinker/patches/linux/wifi-0003-realtek-wifi-881xAU-enable-8814au.patch
View File

@ -1,46 +0,0 @@
diff --git a/drivers/net/wireless/rtl8812au/Kconfig b/drivers/net/wireless/rtl8812au/Kconfig
index 16d3567..f87653d 100644
--- a/drivers/net/wireless/rtl8812au/Kconfig
+++ b/drivers/net/wireless/rtl8812au/Kconfig
@@ -4,8 +4,3 @@ config RTL8812AU
---help---
Help message of RTL8812AU
-config RTL8814AU
- tristate "Realtek 8814A USB WiFi"
- depends on USB
- ---help---
- Help message of RTL8814AU
diff --git a/drivers/net/wireless/rtl8814au/Kconfig b/drivers/net/wireless/rtl8814au/Kconfig
index 16d3567..730c4e0 100644
--- a/drivers/net/wireless/rtl8814au/Kconfig
+++ b/drivers/net/wireless/rtl8814au/Kconfig
@@ -1,9 +1,3 @@
-config RTL8812AU
- tristate "Realtek 8812A USB WiFi"
- depends on USB
- ---help---
- Help message of RTL8812AU
-
config RTL8814AU
tristate "Realtek 8814A USB WiFi"
depends on USB
diff --git a/drivers/net/wireless/rtl8814au/Makefile b/drivers/net/wireless/rtl8814au/Makefile
index ef959e7..f71f524 100644
--- a/drivers/net/wireless/rtl8814au/Makefile
+++ b/drivers/net/wireless/rtl8814au/Makefile
@@ -32,11 +32,11 @@ CONFIG_AUTOCFG_CP = n
########################## WIFI IC ############################
CONFIG_MULTIDRV = n
CONFIG_RTL8188E = n
-CONFIG_RTL8812A = y
-CONFIG_RTL8821A = y
+CONFIG_RTL8812A = n
+CONFIG_RTL8821A = n
CONFIG_RTL8192E = n
CONFIG_RTL8723B = n
-CONFIG_RTL8814A = n
+CONFIG_RTL8814A = y
CONFIG_RTL8723C = n
CONFIG_RTL8188F = n
CONFIG_RTL8822B = n

4586
buildroot-external/board/asus/tinker/patches/linux/wifi-0005-realtek-wifi-881xAU-update-to-5a5d0f.patch
View File

File diff suppressed because it is too large Load Diff

11
buildroot-external/board/asus/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch
View File

@ -301875,7 +301875,7 @@ new file mode 100644
index 0000000000000..324b45bd223fd
--- /dev/null
+++ b/drivers/net/wireless/rtl8188eu/include/wifi.h
@@ -0,0 +1,1103 @@
@@ -0,0 +1,1105 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
@ -302608,7 +302608,9 @@ index 0000000000000..324b45bd223fd
+ * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2)
+ */
+#define IEEE80211_MIN_AMPDU_BUF 0x8
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0))
+#define IEEE80211_MAX_AMPDU_BUF 0x40
+#endif
+
+/* Spatial Multiplexing Power Save Modes */
+#define WLAN_HT_CAP_SM_PS_STATIC 0
@ -311898,7 +311900,7 @@ new file mode 100644
index 0000000000000..fadf117a54b6a
--- /dev/null
+++ b/drivers/net/wireless/rtl8188eu/os_dep/os_intfs.c
@@ -0,0 +1,1273 @@
@@ -0,0 +1,1276 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
@ -312553,7 +312555,10 @@ index 0000000000000..fadf117a54b6a
+}
+
+static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0))
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0))
+ ,struct net_device *sb_dev
+ ,select_queue_fallback_t fallback
+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0))
+ ,void *unused
+ ,select_queue_fallback_t fallback
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3, 13, 0))

972
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-add-device-tree.patch Normal file
View File

@ -0,0 +1,972 @@
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts 2018-12-06 21:46:51.493688015 +0000
@@ -0,0 +1,969 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "XT-Q8L-V10-RK3288";
+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
+
+ memory {
+ reg = <0x0 0x0 0x0 0x80000000>;
+ device_type = "memory";
+ };
+
+ cpu0_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ /*
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ */
+ };
+
+ /*
+ * Peripheral from original q8 device tree, currently no references
+ * for drivers in linux kernel.
+ rockchip-hsadc@ff080000 {
+ compatible = "rockchip-hsadc";
+ reg = <0xff080000 0x4000>;
+ interrupts = <0x0 0x1f 0x4>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <0x9a>;
+ clocks = <0x79 0x7 0x8 0x39>;
+ clock-names = "hclk_hsadc", "clk_hsadc_out", "clk_hsadc_ext";
+ dmas = <0x9b 0x0>;
+ dma-names = "data";
+ status = "disabled";
+ };
+ */
+
+ ext_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ };
+
+ /*
+ * Handle the IR receiver using the gpio-ir-receiver kernel module.
+ * This works flawlessy, the original xt-q8l-v10 remote uses a NEC
+ * protocol and the keymap rc-xt-q8l-v10 has to be compiled in the
+ * kernel for the remote to work as an input device
+ */
+ ir: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_int>;
+ linux,rc-map-name = "rc-xt-q8l-v10";
+ wakeup-source;
+ };
+
+ keys: gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ button@0 {
+ gpio-key,wakeup = <1>;
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ label = "GPIO Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ debounce-interval = <100>;
+ };
+
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ /*
+ Power led is active high, but we set it here active low
+ so while there is mass storage access it turns red and
+ when it is idle is blue
+ */
+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+ label = "power";
+ linux,default-trigger = "mmc0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&power_led>;
+ };
+
+ };
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwr>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_flash: flash-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_flash";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_host_5v: usb-host-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc_host_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+// startup-delay-us = <1000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+
+ vcc_otg_5v: usb-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
+ regulator-name = "vcc_otg_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+// startup-delay-us = <1000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ /*
+ * Required power sequence to properly enable the wireless/bluetooth
+ * module connected to sdio0
+ */
+ sdio0_pwrseq: sdio0_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>, <&bt_enable_h>;
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 29 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <100>;
+ };
+
+ /*
+ * Sound taken from tinkerboard device tree, adapted to q8.
+ */
+ soundcard-hdmi {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "DW-I2S-HDMI";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ };
+
+ soundcard-spdif {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+ simple-audio-card,dai-link@1 {
+
+ cpu {
+ sound-dai = <&spdif>;
+ };
+
+ codec {
+ sound-dai = <&spdif_out>;
+ };
+
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+};
+
+
+&io_domains {
+ status = "okay";
+
+ audio-supply = <&vcca_33>;
+ bb-supply = <&vcc_io>;
+ dvp-supply = <&vcc_18>;
+ flash0-supply = <&vcc_flash>;
+ flash1-supply = <&vcc_lan>;
+ gpio30-supply = <&vcc_io>;
+ gpio1830-supply = <&vcc_io>;
+ lcdc-supply = <&vcc_io>;
+ sdcard-supply = <&vccio_sd>;
+ wifi-supply = <&vcc_18>;
+};
+
+&cpu0 {
+ cpu0-supply = <&vdd_cpu>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ clock_in_out = "input";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+ status = "ok";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c5>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ vdd_cpu: syr827@40 {
+ compatible = "silergy,syr827";
+ fcs,suspend-voltage-selector = <1>;
+ reg = <0x40>;
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vdd_gpu: syr828@41 {
+ compatible = "silergy,syr828";
+ fcs,suspend-voltage-selector = <1>;
+ reg = <0x41>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <8000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ };
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int>;
+ };
+
+ act8846: act8846@5a {
+ compatible = "active-semi,act8846";
+ reg = <0x5a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_vsel>;
+ system-power-controller;
+
+ vp1-supply = <&vcc_sys>;
+ vp2-supply = <&vcc_sys>;
+ vp3-supply = <&vcc_sys>;
+ vp4-supply = <&vcc_sys>;
+ inl1-supply = <&vcc_sys>;
+ inl2-supply = <&vcc_sys>;
+ inl3-supply = <&vcc_20>;
+ wakeup-source;
+
+ regulators {
+
+ /*
+ * Regulator controlling DDR memory - always on
+ */
+ vcc_ddr: REG1 {
+ regulator-name = "vcc_ddr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ /*
+ * Regulator controlling various IO functions of the rk3288.
+ * Always on
+ */
+ vcc_io: REG2 {
+ regulator-name = "vcc_io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ /*
+ * Regulator controlling various board logic.
+ * Always on.
+ * rk3288 electrical datasheet says it should have variable
+ * voltage depending upon dvfs
+ */
+ vdd_log: REG3 {
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ /*
+ * No reference for this on electrical datasheet. Maybe this
+ * is vcc_18? Maybe this is vcc18_flash on electrical datasheet.
+ * So far we disable it.
+ */
+ vcc_20: REG4 {
+ regulator-name = "vcc_20";
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ };
+
+ /*
+ * This regulator controls SDIO. Electrical datasheet says
+ * this regulator can be operated between 1.8 and 3.3 volts
+ */
+ vccio_sd: REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ /*
+ * Controlling HDMI and LCD controller on rk3288. 1.0 volts
+ * by reference
+ */
+ vdd10_lcd: REG6 {
+ regulator-name = "vdd10_lcd";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ /*
+ * From the rk3288 electrical datasheet, this regulator powers
+ * the rk1000 chip, which is absent in our device, but it
+ * is also supplying bluetooth, so we enable it.
+ */
+ vcca_18: REG7 {
+ regulator-name = "vcca_18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ /*
+ * This regulator controls, among other things, the SPDIF
+ * interface, so we enable it
+ */
+ vcca_33: REG8 {
+ regulator-name = "vcca_33";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on; // Turn this on to get SPDIF!
+ };
+
+ /*
+ * LAN regulator
+ */
+ vcc_lan: REG9 {
+ regulator-name = "vcc_lan";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ /*
+ * Regulator controlling PMU, USB PHY and rk3288 PLLs.
+ * 1.0 volts by reference
+ */
+ vdd_10: REG10 {
+ regulator-name = "vdd_10";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ /*
+ * Regulator controlling Wifi over SDIO, SARADC and USB PHY.
+ * Better turn this on
+ */
+ vccio_wl: vcc_18: REG11 {
+ regulator-name = "vcc_18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ /*
+ * Not clear: apparently this controls HDMI and LCD controller
+ * on rk3368 devices.
+ * 1.8 volts by reference
+ */
+ vcc18_lcd: REG12 {
+ regulator-name = "vcc18_lcd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+
+ /*
+ * Here should go the RK1000 audio codec parts, but seems that
+ * there is no driver in linux kernel at the moment, so we can't
+ * describe it.
+ * Also, most important, there is no RK1000 on our board :)
+ * Datasheet is available here:
+ * http://dl.radxa.com/rock/docs/hw/ds/RK1000-S%20DATASHEET%20V14.pdf
+ */
+ status = "okay";
+
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&pinctrl {
+
+ /*
+ These two lines here, these must be commented out! Otherwise for some reason the kernel
+ does not see the boot device anymore and will stay stuck in initramfs!
+ On the contrary, these are required by u-boot to keep the power holding so the device does not
+ automatically turns off after a small timeout
+ */
+ /*pinctrl-names = "default";*/
+ /*pinctrl-0 = <&pwr_hold>;*/
+
+ pcfg_output_high: pcfg-output-high {
+ output-high;
+ };
+
+ pcfg_output_low: pcfg-output-low {
+ output-low;
+ };
+
+ pcfg_wl: pcfg-wl {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <8>;
+ };
+
+ pcfg_wl_clk: pcfg-wl-clk {
+ bias-disable;
+ drive-strength = <12>;
+ };
+
+ pcfg_wl_int: pcfg-wl-int {
+ bias-pull-up;
+ };
+
+ act8846 {
+
+ /*
+ * Original q8 device tree says:
+ * - gpio0 11 HIGH -> power hold
+ * - gpio7 1 LOW -> possibly pmic-vsel, we don't care
+ */
+ pmic_vsel: pmic-vsel {
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+ pwr_hold: pwr-hold {
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ gmac {
+ phy_int: phy-int {
+ rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_pmeb: phy-pmeb {
+ rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ phy_rst: phy-rst {
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+
+ hym8563 {
+ rtc_int: rtc-int {
+ rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ power_led: power-led {
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+
+ /*
+ * Copied from firefly board definition to give more drive to
+ * the sdmmc pins. The Q8 seems to be quite able to drive
+ * ultra high speed uSD cards, so we give a bit more energy
+ * to the gpio pins
+ */
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_8ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_pwr: sdmmc-pwr {
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+ usb_host1 {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+ usb_otg {
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio0 {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ };
+
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&saradc {
+ vref-supply = <&vcc_18>;
+ status = "okay";
+};
+
+&emmc {
+
+ /*
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
+ * vmmc-supply and vqmmc-supply are removed because they hang
+ * u-boot >= v2018.03
+ * From the original q8l firmware and eMMC datasheet it also should
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
+ * properties are not working
+ */
+ clock-frequency = <50000000>;
+
+ broken-cd;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+
+ status = "okay";
+};
+
+&sdmmc {
+ supports-sd;
+
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ status = "okay";
+};
+
+&sdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bus-width = <4>;
+ mmc-pwrseq = <&sdio0_pwrseq>;
+
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc_18>; // This must be the same as in io_domains,
+ // otherwise the mmc1 device won't be detected properly
+
+// clock-frequency = <50000000>;
+// max-frequency = <50000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
+
+ cap-sdio-irq;
+ no-mmc;
+ no-sd;
+ cap-sd-highspeed; // required, otherwise does not work!
+ supports-sdio;
+ non-removable;
+
+ keep-power-in-suspend;
+ disable-wp;
+
+
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&gpio4>;
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ status = "okay";
+ };
+
+ //sd-uhs-sdr104; // required to be disabled, otherwise the device get
+ // detected, but there is no communication
+
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+/*
+ * These dmas described here for uarts are present in original q8 board
+ * dts, so I replicate them here because documentation says that serial
+ * ports can have dmas.
+ * note:
+ * - uart0 is the serial port connected to the bluetooth module
+ * - uart2 is the onboard serial port
+ *
+ * As ok kernel 4.19 DMA for serial ports is disabled because it makes
+ * the ports unusable
+ *
+ */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+ //dmas = <&dmac_peri 1 &dmac_peri 2>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart1 {
+ //dmas = <&dmac_peri 3 &dmac_peri 4>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart2 {
+ //dmas = <&dmac_bus_s 4 &dmac_bus_s 5>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart3 {
+ //dmas = <&dmac_peri 7 &dmac_peri 8>;
+ //dma-names = "tx", "rx";
+ status = "okay";
+};
+
+&uart4 {
+ //dmas = <&dmac_peri 9 &dmac_peri 10>;
+ //dma-names = "tx", "rx";
+ status = "disabled";
+};
+
+/*
+ * Here usbphy* should have their proper reset lines described in rk3288.dtsi
+ * Describing resets for usb phy is important because otherwise the USB
+ * port gets stuck in case it goes into autosuspend: plugging any device
+ * when the port is autosuspended will actually kill the port itself and
+ * require a power cycle.
+ * This is required for the usbphy1 phy, nonetheless it is a good idea to
+ * specify the proper resources for all the phys though.
+ * The reference patch which works in conjuction with the reset lines:
+ * https://patchwork.kernel.org/patch/9469811/
+ *
+ */
+&usbphy {
+ status = "okay";
+};
+
+&usbphy0 {
+ vbus-supply = <&vcc_otg_5v>;
+};
+
+&usbphy2 {
+ vbus-supply = <&vcc_host_5v>;
+};
+
+&usb_host0_ehci {
+ dr_mode = "host";
+ reg = <0x0 0xff500000 0x0 0x20000>;
+ status = "disable";
+};
+
+&usb_host1 {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+/*
+ * Enable VPU services and complete the relative IOMMU configurations
+ */
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
+
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
+
+// i2s bus is present on q8 device, enable it
+&i2s {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+// spdif is present on q8 device, enable it
+&spdif {
+ status = "okay";
+};

12
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-add-dts-makefile.patch Normal file
View File

@ -0,0 +1,12 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 37a3de760..6bcfceede 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -832,6 +832,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
rk3229-evb.dtb \
+ rk3288-xt-q8l-v10.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
rk3288-fennec.dtb \

103
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-remote-keymap.patch Normal file
View File

@ -0,0 +1,103 @@
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index bfa3017..c2a21bb 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -277,6 +277,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_WINFAST "rc-winfast"
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_SU3000 "rc-su3000"
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
#define RC_MAP_ZX_IRDEC "rc-zx-irdec"
/*
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index d6b913a..ee00ce5 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -116,4 +116,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-winfast.o \
rc-winfast-usbii-deluxe.o \
rc-su3000.o \
+ rc-xt-q8l-v10.o \
rc-zx-irdec.o
diff --git a/drivers/media/rc/keymaps/rc-xt-q8l-v10.c b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
index e69de29..19c7d9e 100644
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+// rc-xt-q8l-v10.c - Keytable for xt-q8l-v10 tv box remote controller
+//
+// keymap imported from ir-keymaps.c
+//
+// Copyright (c) 2018 Paolo Sabatino
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+/*
+
+*/
+
+static struct rc_map_table xt_q8l_v10[] = {
+
+ { 0xcc1d11, KEY_ENTER },
+ { 0xcc1d00, KEY_POWER },
+ { 0xcc1d15, KEY_PLAYPAUSE },
+ { 0xcc1d16, KEY_STOP },
+ { 0xcc1d06, KEY_PREVIOUSSONG },
+ { 0xcc1d0a, KEY_NEXTSONG },
+ { 0xcc1d41, KEY_1 },
+ { 0xcc1d45, KEY_2 },
+ { 0xcc1d4d, KEY_3 },
+ { 0xcc1d42, KEY_4 },
+ { 0xcc1d46, KEY_5 },
+ { 0xcc1d4e, KEY_6 },
+ { 0xcc1d43, KEY_7 },
+ { 0xcc1d47, KEY_8 },
+ { 0xcc1d4f, KEY_9 },
+ { 0xcc1d49, KEY_0 },
+ { 0xcc1d4a, KEY_BACKSPACE },
+ { 0xcc1d48, KEY_F6 },
+ { 0xcc1d03, KEY_HOME },
+ { 0xcc1d0f, KEY_BACK },
+ { 0xcc1d40, KEY_MENU },
+ { 0xcc1d4c, KEY_TEXT },
+ { 0xcc1d10, KEY_LEFT },
+ { 0xcc1d12, KEY_RIGHT },
+ { 0xcc1d44, KEY_DOWN },
+ { 0xcc1d07, KEY_UP },
+ { 0xcc1d02, KEY_VOLUMEDOWN },
+ { 0xcc1d0c, KEY_MUTE },
+ { 0xcc1d0e, KEY_VOLUMEUP },
+ { 0xcc1d01, KEY_F1 },
+ { 0xcc1d05, KEY_F2 },
+ { 0xcc1d09, KEY_F3 },
+ { 0xcc1d0d, KEY_F4 },
+
+};
+
+static struct rc_map_list xt_q8l_v10_map = {
+ .map = {
+ .scan = xt_q8l_v10,
+ .size = ARRAY_SIZE(xt_q8l_v10),
+ .rc_proto = RC_PROTO_NEC, /* Legacy IR type */
+ .name = RC_MAP_XT_Q8L_V10,
+ }
+};
+
+static int __init init_rc_map_xt_q8l_v10(void)
+{
+ return rc_map_register(&xt_q8l_v10_map);
+}
+
+static void __exit exit_rc_map_xt_q8l_v10(void)
+{
+ rc_map_unregister(&xt_q8l_v10_map);
+}
+
+module_init(init_rc_map_xt_q8l_v10)
+module_exit(exit_rc_map_xt_q8l_v10)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paolo Sabatino");

0
buildroot-external/board/asus/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch → buildroot-external/board/asus/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch.disabled
View File

25
buildroot-external/board/asus/tinker/patches/uboot/101-u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch.disabled Normal file
View File

@ -0,0 +1,25 @@
From cd0236ef771fd72e2975ca294ba2f1872d7dbc0b Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 22 Oct 2017 12:48:24 +0200
Subject: [PATCH 2/2] rockchip: tinker: enable rockchip video driver
---
configs/tinker-rk3288_defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 1315be3ee8..3a81328b48 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -78,6 +78,11 @@ CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y

5
buildroot-external/configs/tinker_defconfig
View File

@ -6,7 +6,6 @@ BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
BR2_TOOLCHAIN_BUILDROOT_CXX=y
BR2_BINUTILS_ENABLE_LTO=y
@ -22,7 +21,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.82"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.20"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
@ -78,7 +77,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.11"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-rk3288"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot.config"
BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y