mirror of
https://github.com/home-assistant/operating-system.git
synced 2025-08-02 17:57:42 +00:00
Pascal Vizeli
GitHub
commit
3329912511
12
.github/ISSUE_TEMPLATE.md
vendored
12
.github/ISSUE_TEMPLATE.md
vendored
@ -1,21 +1,23 @@
|
||||
<!-- READ THIS FIRST:
|
||||
- If you need additional help with this template please refer to https://www.home-assistant.io/help/reporting_issues/
|
||||
- Make sure you are running the latest version before reporting an issue: https://github.com/home-assistant/home-assistant/releases
|
||||
- Do not report issues for components here, plaese refer to https://github.com/home-assistant/home-assistant/issues
|
||||
- Make sure you are running the latest version before reporting an issue: https://github.com/home-assistant/core/releases
|
||||
- Do not report issues for integrations here, please refer to https://github.com/home-assistant/core/issues
|
||||
- This is for bugs only. Feature and enhancement requests should go in our community forum: https://community.home-assistant.io/c/feature-requests
|
||||
- Provide as many details as possible. Paste logs, configuration sample and code into the backticks. Do not delete any text from this template!
|
||||
- If you have a problem with a Add-on, make a issue on there repository.
|
||||
- If you have a problem with an add-on, make an issue in its repository.
|
||||
- If you are using Raspberry Pi overlays in config.txt and your system doesn't work anymore please report this to the Raspberry Pi kernel project.
|
||||
|
||||
-->
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||||
|
||||
**HassOS release with the issue:**
|
||||
<!--
|
||||
- Frontend -> Developer tools -> Info
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||||
- Frontend -> Configuration -> Info
|
||||
- Or use this command: hass --version
|
||||
-->
|
||||
|
||||
**Supervisor logs:**
|
||||
<!--
|
||||
- Frontend -> Hass.io -> System
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||||
- Frontend -> Supervisor -> System
|
||||
- Or use this command: ha su logs
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||||
-->
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||||
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||||
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||||
30
Dockerfile
30
Dockerfile
@ -1,4 +1,4 @@
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FROM ubuntu:18.04
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FROM debian:buster
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||||
# Set shell
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SHELL ["/bin/bash", "-o", "pipefail", "-c"]
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@ -9,17 +9,35 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
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ca-certificates \
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curl \
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||||
gpg-agent \
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||||
gpg \
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||||
dirmngr \
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software-properties-common \
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&& curl -fsSL https://download.docker.com/linux/ubuntu/gpg | apt-key add - \
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||||
&& add-apt-repository "deb https://download.docker.com/linux/ubuntu $(lsb_release -cs) stable" \
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||||
&& curl -fsSL https://download.docker.com/linux/debian/gpg | apt-key add - \
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||||
&& add-apt-repository "deb https://download.docker.com/linux/debian $(lsb_release -cs) stable" \
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&& apt-get update && apt-get install -y --no-install-recommends \
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docker-ce \
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||||
&& rm -rf /var/lib/apt/lists/*
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||||
|
||||
# Build Tools
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||||
# Build tools
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RUN apt-get update && apt-get install -y --no-install-recommends \
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wget patch vim cpio python unzip rsync bc bzip2 ncurses-dev sudo \
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git make g++ file perl bash binutils locales qemu-utils bison flex \
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||||
bash \
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||||
bc \
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||||
binutils \
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||||
build-essential \
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||||
bzip2 \
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||||
cpio \
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||||
file \
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||||
git \
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||||
make \
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ncurses-dev \
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||||
patch \
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||||
perl \
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||||
python \
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rsync \
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sudo \
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unzip \
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wget \
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qemu-utils \
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&& rm -rf /var/lib/apt/lists/*
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# Init entry
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@ -8,7 +8,8 @@ Requirements:
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- UEFI boot
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- SATA/AHCI storage
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- Supported NIC:
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- Intel Gigabit NIC (e1000, e1000e, igb)
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- Intel Gigabit NIC (e1000, igb - via Linux mainline)
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- Intel PCIe Gigabit NIC (e1000e - via out-of-tree module in *buildroot-external/package/intel-e1000e*)
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- Realtek Gigabit NIC (r8169)
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- Intel Wireless Wifi 802.11ac (iwlwifi, see below)
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|
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@ -18,6 +19,7 @@ Requirements:
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|--------|-----------|
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| Intel NUC5CPYH | |
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||||
| Intel NUC6CAYH | |
|
||||
| Intel NUC10I3FNK2 | |
|
||||
| Gigabyte GB-BPCE-3455 | needs 'nomodeset' in cmdline.txt if you want a console |
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||||
|
||||
|
||||
|
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@ -31,8 +31,13 @@ i2c-bcm2708
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|
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## USB Boot
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USB mass storage boot is available on Raspberry Pi 3B, 3B+, 3A+, and 2B v1.2.
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To enable USB boot, add `program_usb_boot_mode=1` into `config.txt`. Note that this **permanently** alters the one-time programmable memory of the device.
|
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USB mass storage boot is available on Raspberry Pi 4 (64-bit only), 3B, 3B+, 3A+, and 2B v1.2.
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For Raspberry 3B, 3A+ and 2B v1.2, to enable USB boot, add `program_usb_boot_mode=1` into `config.txt`. Note that this **permanently** alters the one-time programmable memory of the device.
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||||
|
||||
For Raspberry 4, make sure to update the bootloader to a stable release
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||||
supporting USB mass storage boot (see
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||||
[bcm2711_bootloader_config.md](https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md#usbmassstorageboot). If no SD card is used add `sd_poll_once=on` to `dtparam` in `config.txt` (comma separated). This gets rid of `mmc0: timeout waiting for hardware interrupt` kernel errors.
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For more information see [RaspberryPi](https://www.raspberrypi.org/documentation/hardware/raspberrypi/bootmodes/msd.md).
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||||
|
||||
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||||
@ -5,11 +5,13 @@ Supported Hardware:
|
||||
| Device | Board |
|
||||
|--------|-----------|
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||||
| Tinker RK3288 | tinker |
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||||
| Tinker S RK3288 | tinker |
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||||
| Tinker S RK3288 | |
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||||
|
||||
<!--
|
||||
## eMMC
|
||||
|
||||
eMMC support is provided transparently. Just flash the image to the eMMC by connecting your Tinker Board S to your PC via Micro-USB.
|
||||
-->
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||||
|
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## Serial console
|
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@ -3,7 +3,7 @@
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## Automatic
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You can use an USB drive with HassOS to configure network options, SSH access to the host and to install updates.
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Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG` (in all capitals). Alternative you can create a `CONFIG` folder inside boot partition. Use the following directory structure within the USB drive:
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Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG` (in all capitals). Alternative you can create a `CONFIG` folder inside the `boot` partition. Use the following directory structure within the USB drive:
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```text
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network/
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@ -24,7 +24,7 @@ hassos-xy.raucb
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- The `hassos-*.raucb` file is a firmware OTA update which will be installed. These can be found on on the [release][hassos-release] page.
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You can put this USB stick into the device and it will be read on startup and files written to the correct places. You can also trigger this process later over the
|
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API/UI or by calling `systemctl restart hassos-config` on the host. *The USB Stick just needs to be insterted to the device during this setup process and can be disconnected afterwards.*
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API/UI or by calling `systemctl restart hassos-config` on the host. *The USB Stick just needs to be inserted to the device during this setup process and can be disconnected afterwards.*
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## Local
|
||||
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@ -47,7 +47,9 @@ You can manual add, edit or remove connections configurations from `/etc/Network
|
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### NTP
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You can manual edit the systemd timesync file on `/etc/systemd/timesyncd.conf`.
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Our default ntp configuration look like:
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Our default NTP configuration look like:
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```
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[Time]
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NTP=time1.google.com time2.google.com time3.google.com
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@ -57,4 +59,4 @@ FallbackNTP=0.pool.ntp.org 1.pool.ntp.org 2.pool.ntp.org 3.pool.ntp.org
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[systemd-modules]: https://www.freedesktop.org/software/systemd/man/modules-load.d.html
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[network.md]: network.md
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||||
[hassos-release]: https://github.com/home-assistant/hassos/releases/
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[debug-homeassistant]: https://developers.home-assistant.io/docs/en/hassio_debugging.html
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||||
[debug-homeassistant]: https://developers.home-assistant.io/docs/operating-system/debugging
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||||
@ -2,8 +2,8 @@
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|
||||
We provide 3 different types of release builds:
|
||||
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||||
- development (beta/dev)
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||||
- staging (rc)
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||||
- development (dev)
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||||
- staging (beta)
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- production (stable)
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## Versioning
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||||
@ -15,7 +15,7 @@ The development number they will be bump for the stable release version and the
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The branch `dev` ist the actual development branch and from there we never make a release. The `master` branch contains the development version and from there we build a beta release.
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If we create a new productive release, we create a new branch `rel-{MAJOR}`. They will be used for the whole cycle of this release.
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If we create a new productive/staging release, we create a new branch `rel-{MAJOR}`. They will be used for the whole cycle of this release.
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## Upload release files
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@ -3,33 +3,37 @@
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## Boot system
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`BOOT_SYS`:
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- efi
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- hyprid
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- hybrid
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- mbr
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HassOS is basicly used GPT. But for use GPT we need own the first 1024 of
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boot drive. Is that not possible, you can use MBR for your device, they work also with SPLs.
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HassOS is using GPT. But to use GPT we need own the first 1024 of boot drive. Is that's not possible, you can use MBR for your device. This also work with SPLs.
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Hyprid and SPL use both a hyprid MBR/GPT table but SPL move the GPT header 8MB for give space to write SPL and boot images before.
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Hybrid and SPL use both a hybrid MBR/GPT table but SPL move the GPT header 8 MB for give space to write SPL and boot images before.
|
||||
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`BOOT_SPL`:
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- true
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- false
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Enable SPL update handling.
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`BOOTLOADER`:
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- uboot
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- U-Boot
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- barebox
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We support mainly uboot but for uefi system we can also use barebox. In future we hope to remove barebox with uboot also on uefi.
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We support mainly U-Boot but for UEFI systems we can also use [barebox](https://barebox.org/). In the future, we hope to remove barebox with U-Boot also on UEFI.
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`DISK_SIZE`:
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Default 2. That is the size of end image in GB.
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## Supervisor
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||||
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`SUPERVISOR_MACHINE`:
|
||||
|
||||
- intel-nuc
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||||
- odroid-c2
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||||
- odroid-n2
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||||
@ -46,7 +50,8 @@ Default 2. That is the size of end image in GB.
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||||
- raspberrypi4-64
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- tinker
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`SUPERVISOR_ARCH`
|
||||
`SUPERVISOR_ARCH`:
|
||||
|
||||
- amd64
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||||
- i386
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||||
- armhf
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||||
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||||
@ -1,11 +1,10 @@
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Getting started with Hassos development using Docker on GNU/Linux
|
||||
=================================================================
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# Getting started with HassOS development using Docker on GNU/Linux
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|
||||
First, install **docker-ce** for your distribution - I'd advise to use your distro's provided packages, since that will make sure permissions et al. are sanely set up for what you are about to run. You're also expected to have your current user properly set up in in your sudoers policy, so that this account may elevate to root and execute arbitrary commands as UID 0 (this is required, since at some point during the build process, a new loopback device-backed filesystem image will be mounted inside a docker container - which requires a "privileged" container to run, which can only be done as root).
|
||||
First, install `docker-ce` for your distribution. I'd advise to use your distro's provided packages, since that will make sure permissions et al. are sanely set up for what you are about to run. You're also expected to have your current user properly set up in in your sudoers policy, so that this account may elevate to root and execute arbitrary commands as UID 0 (this is required, since at some point during the build process, a new loopback device-backed filesystem image will be mounted inside a Docker container - which requires a "privileged" container to run, which can only be done as root).
|
||||
|
||||
Next, make sure the docker daemon is running:
|
||||
Next, make sure the Docker daemon is running:
|
||||
|
||||
```
|
||||
```bash
|
||||
$ sudo systemctl status docker
|
||||
● docker.service - Docker Application Container Engine
|
||||
Loaded: loaded (/usr/lib/systemd/system/docker.service; disabled; vendor preset: disabled)
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@ -15,7 +14,7 @@ $ sudo systemctl status docker
|
||||
|
||||
My desktop distro doesn't start newly installed services by default, which means I'll have to manually fire up the `docker` service:
|
||||
|
||||
```
|
||||
```bash
|
||||
$ sudo systemctl start docker
|
||||
$ sudo systemctl --no-pager status docker -n0
|
||||
● docker.service - Docker Application Container Engine
|
||||
@ -30,9 +29,9 @@ $ sudo systemctl --no-pager status docker -n0
|
||||
└─1539 docker-containerd --config /var/run/docker/containerd/containerd.toml
|
||||
```
|
||||
|
||||
Now, change your working directory to your hassos repo checkout (please adapt pathnames as needed), make sure your intended changes to the source tree are applied (and committed, ideally :)), and execute the `enter.sh` helper script:
|
||||
Now, change your working directory to your home-assistant/operating-system repository checkout (please adapt path names as needed), make sure your intended changes to the source tree are applied (and committed, ideally :)), and execute the `enter.sh` helper script:
|
||||
|
||||
```
|
||||
```bash
|
||||
$ cd ~/codebase/hassos/
|
||||
$ sudo scripts/enter.sh
|
||||
Sending build context to Docker daemon 30.48MB
|
||||
@ -43,24 +42,24 @@ Successfully built 4dc25a21556b
|
||||
Successfully tagged hassbuildroot:latest
|
||||
```
|
||||
|
||||
Note that the current iteration of `enter.sh` will try to load the **overlayfs** kernel module, which is not strictly required for docker's operation, as far as I can tell. It's OK if loading that module fails; the shell script will continue executing. If everything works out, you will find yourself in an interactive login shell inside your docker container/build environment, where you can peek around:
|
||||
Note that the current iteration of `enter.sh` will try to load the **overlayfs** kernel module, which is not strictly required for Docker's operation, as far as I can tell. It's OK if loading that module fails; the shell script will continue executing. If everything works out, you will find yourself in an interactive login shell inside your Docker container/build environment, where you can peek around:
|
||||
|
||||
```
|
||||
```bash
|
||||
root@somehashinhex:/build#
|
||||
root@somehashinhex:/build# make help
|
||||
[...]
|
||||
```
|
||||
|
||||
The _hassos_ developers provide a Makefile that will build hassos images for a (rather long!) list of targets. For example run the command below to start building the _ova_ variant, and go make a cup of tea. Or fifteen.
|
||||
The HassOS developers provide a `Makefile` that will build HassOS images for a list of targets. For example run the command below to start building the _ova_ variant, and go make a cup of tea. Or fifteen.
|
||||
|
||||
```
|
||||
```bash
|
||||
root@0db6f7079872:/build# make ova
|
||||
[...]
|
||||
```
|
||||
|
||||
That will result in a single VMDK image file at the very end of the build process. This image file is a compressed block device dump with a proper GPT partition table, prepared to ship into any OVA-compatible hypervisor's innards. For me, the end of the **ova** build steps looks like this:
|
||||
|
||||
```
|
||||
```bash
|
||||
[...]
|
||||
2097152+0 records out
|
||||
1073741824 bytes (1.1 GB, 1.0 GiB) copied, 12.2145 s, 87.9 MB/s
|
||||
@ -74,15 +73,15 @@ make: Leaving directory '/build/buildroot'
|
||||
|
||||
The artifacts you just built are placed in the `target/` subdirectory:
|
||||
|
||||
```
|
||||
```bash
|
||||
root@fd292c061896:/build# ls -lh release/
|
||||
total 141M
|
||||
-rw-r--r-- 1 root root 141M Oct 10 20:22 hassos_ova-2.2.vmdk.gz
|
||||
```
|
||||
|
||||
In order to be able to use this image file with the **qemu** hypervisor, you'll need to unpack it, and convert it to an image format that qemu can work with. Conveniently, the _hassos_ buildenv already provides all the tools we need for this conversion:
|
||||
In order to be able to use this image file with the QEMU hypervisor, you'll need to unpack it, and convert it to an image format that QEMU can work with. Conveniently, the HassOS buildenv already provides all the tools we need for this conversion:
|
||||
|
||||
```
|
||||
```bash
|
||||
root@fd292c061896:/build# gunzip release/hassos_ova-2.2.qcow2.gz
|
||||
root@fd292c061896:/build# ls -lh release/
|
||||
total 673M
|
||||
@ -91,14 +90,12 @@ total 673M
|
||||
|
||||
Now, exit the docker container's environment, and find the build artifacts in the `releases/` directory beneath your repository checkout dir. (The generated files will be owned by _root_; make sure to `chown` them to your user account, if needed.)
|
||||
|
||||
From there, qemu can try to boot it. Since the generated image assumes UEFI support in the host/hypervisor, this is slightly more tricky than with "classic"(/legacy) MBR-based images. On the *Debian* host I use to run my qemu virtual machine on, you'll need to install the **ovmf** package, which is described as providing "UEFI firmware for 64-bit x86 virtual machines". That package will install a _TianoCore_-derived qemu UEFI image build at `/usr/share/OVMF/OVMF_CODE.fd`, which we'll use with qemu to boot the generated qcow2 image. (Please adapt pathnames as necessary, for example if you have installed the ovmf firmware image at another location.)
|
||||
From there, QEMU can try to boot it. Since the generated image assumes UEFI support in the host/hypervisor, this is slightly more tricky than with "classic"(/legacy) MBR-based images. On the *Debian* host I use to run my QEMU virtual machine on, you'll need to install the **ovmf** package which provides the "UEFI firmware for 64-bit x86 virtual machines". That package will install a **TianoCore**-derived QEMU UEFI image build at `/usr/share/OVMF/OVMF_CODE.fd`, which we'll use with QEMU to boot the generated qcow2 image. (Please adapt path names as necessary, for example if you have installed the ovmf firmware image at another location.)
|
||||
|
||||
```
|
||||
```bash
|
||||
$ /usr/bin/qemu-system-x86_64 -enable-kvm -name hassos_ova -smp 2 -m 1024 -drive file=release/hassos_ova-2.2.qcow2,index=0,media=disk,if=ide,cache=none,format=qcow2 -drive file=/usr/share/ovmf/x64/OVMF_CODE.fd,if=pflash,format=raw,readonly=on
|
||||
```
|
||||
|
||||
This should pop up qemu's SDL frontend, displaying _hassos_' VT/CLI environment. Specifying addtional options and flags to qemu for network access, keyboard layout et al. are left as an exercise for the reader.
|
||||
This should pop up QEMU's SDL frontend, displaying _hassos_' VT/CLI environment. Specifying additional options and flags to QEMU for network access, keyboard layout et al. are left as an exercise for the reader.
|
||||
|
||||
After the boot process has finished, you can log in to _hassos_ without a password, providing *root* as the username. From there, executing `login` on the *ha>* shell prompt will yield a root shell in the host OS.
|
||||
|
||||
Happy hacking! :)
|
||||
|
||||
@ -5,14 +5,14 @@ Default Kernel tree: 5.4
|
||||
|
||||
| Board | Version |
|
||||
|-------|---------|
|
||||
| Open Virtual Applicance | 5.4.39 |
|
||||
| Raspberry Pi | 5.4.38 |
|
||||
| Raspberry Pi 0-W | 5.4.38 |
|
||||
| Raspberry Pi 2 | 5.4.38 |
|
||||
| Raspberry Pi 3 | 5.4.38 |
|
||||
| Raspberry Pi 4 | 5.4.38 |
|
||||
| Tinker Board | 5.4.39 |
|
||||
| Odroid-C2 | 5.4.35 |
|
||||
| Odroid-N2 | 5.4.32 |
|
||||
| Odroid-XU4 | 5.4.35 |
|
||||
| Intel NUC | 5.4.39 |
|
||||
| Open Virtual Applicance | 5.4.53 |
|
||||
| Raspberry Pi | 4.19.127 |
|
||||
| Raspberry Pi 0-W | 4.19.127 |
|
||||
| Raspberry Pi 2 | 4.19.127 |
|
||||
| Raspberry Pi 3 | 4.19.127 |
|
||||
| Raspberry Pi 4 | 4.19.127 |
|
||||
| Tinker Board | 5.4.53 |
|
||||
| Odroid-C2 | 5.7.10 |
|
||||
| Odroid-N2 | 5.7.10 |
|
||||
| Odroid-XU4 | 5.7.10 |
|
||||
| Intel NUC | 5.4.53 |
|
||||
|
||||
@ -1,15 +1,18 @@
|
||||
# Network
|
||||
|
||||
## Configure Network
|
||||
HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive and imported to the host as described in [Configuration][configuration-usb].
|
||||
HassOS uses NetworkManager to control the host network.
|
||||
|
||||
## Configuration Examples
|
||||
## Configure network
|
||||
|
||||
You can read the [Official Manual][keyfile] or find many configuration examples across the internet. The system is read-only, if you don't want the IP address to change on every boot, you should set the UUID property with a generic [UUID4][uuid]. Inside `\CONFIG\network\` on the USB or SD, create a file called `my-network` and add the appropriate contents below:
|
||||
Only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive and imported to the host as described in [Configuration][configuration-usb].
|
||||
|
||||
## Configuration examples
|
||||
|
||||
You can read the [NetworkManager manual][nm-manual] or find many configuration examples across the internet. Keep in mind that the system is read-only. If you don't want the IP address to change on every boot, you should modify the UUID property to a generic [UUID4][uuid]. Inside the `\CONFIG\network\` directory on the USB drive or SD card, create a file called `my-network` and add the appropriate contents below:
|
||||
|
||||
### Default
|
||||
|
||||
We have a preinstalled connection profile:
|
||||
A preinstalled connection profile is provided by default:
|
||||
|
||||
```ini
|
||||
[connection]
|
||||
@ -25,7 +28,7 @@ addr-gen-mode=stable-privacy
|
||||
method=auto
|
||||
```
|
||||
|
||||
### LAN
|
||||
### Wired connection to the LAN
|
||||
|
||||
```ini
|
||||
[connection]
|
||||
@ -41,7 +44,7 @@ addr-gen-mode=stable-privacy
|
||||
method=auto
|
||||
```
|
||||
|
||||
### Wireless WPA/PSK
|
||||
### Wireless LAN WPA/PSK
|
||||
|
||||
```ini
|
||||
[connection]
|
||||
@ -78,7 +81,8 @@ method=manual
|
||||
address=192.168.1.111/24;192.168.1.1
|
||||
dns=8.8.8.8;8.8.4.4;
|
||||
```
|
||||
For address, the value before the semicolon is the IP address and subnet prefix bitlength; the second value is the IP address of the gateway.
|
||||
|
||||
For `address`, the value before the semicolon is the IP address and subnet prefix bitlength. The second value (after the semicolon) is the IP address of the local gateway.
|
||||
|
||||
## Tips
|
||||
|
||||
@ -87,59 +91,63 @@ For address, the value before the semicolon is the IP address and subnet prefix
|
||||
If you want to reset the network configuration back to the default DHCP settings, use the following commands on the host:
|
||||
|
||||
```bash
|
||||
$ rm /etc/NetworkManager/system-connections/*
|
||||
$ cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/
|
||||
$ nmcli con reload
|
||||
# rm /etc/NetworkManager/system-connections/*
|
||||
# cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/
|
||||
# nmcli con reload
|
||||
```
|
||||
|
||||
### Powersave
|
||||
|
||||
If you have trouble with powersave you can do following:
|
||||
If you have trouble with powersave then apply the following changes:
|
||||
|
||||
```ini
|
||||
[wifi]
|
||||
# Values are 0 (use default), 1 (ignore/don't touch), 2 (disable) or 3 (enable).
|
||||
powersave=0
|
||||
```
|
||||
## Using nmcli to set a static IPV4 address
|
||||
|
||||
Log into the HASSOS base system via a console:
|
||||
## Using `nmcli` to set a static IPv4 address
|
||||
|
||||
```
|
||||
Log into the the HassOS base system via a console:
|
||||
|
||||
```bash
|
||||
Welcome to Home Assistant
|
||||
homeassistant login:
|
||||
```
|
||||
Login as `root` (no password needed)
|
||||
|
||||
At the `ha >` prompt, type `login` (as instructed).
|
||||
- Login as `root` (no password needed). At the `ha >` prompt, type `login` (as instructed).
|
||||
|
||||
From here you will use the `nmcli` configuration tool.
|
||||
From there you use the `nmcli` configuration tool.
|
||||
|
||||
`# nmcli connection show` will list the “HassOS default” connection in use.
|
||||
- `# nmcli con show` will list the "HassOS default" connection in use.
|
||||
- `# nmcli con show "HassOS default"` will list all the properties of the connection.
|
||||
|
||||
`# nmcli con show "HassOS default"` will list all the properties of the connection.
|
||||
To start editing the configuration setting for "HassOS default":
|
||||
|
||||
`# nmcli con edit "HassOS default"` will put you in a position to edit the connection.
|
||||
|
||||
`nmcli> print ipv4` will show you the ipv4 properties of this connection.
|
||||
```bash
|
||||
# nmcli con edit "HassOS default"
|
||||
```
|
||||
|
||||
To add your static IP address (select 'yes' for manual method);
|
||||
```
|
||||
|
||||
```bash
|
||||
nmcli> set ipv4.addresses 192.168.100.10/24
|
||||
Do you also want to set 'ipv4.method' to 'manual'? [yes]:
|
||||
```
|
||||
In addition I have found it is wise to set the dns server and the local gateway. For most home routers these will be the same address. If you are using Pi-Hole you can set the dns to that.
|
||||
```
|
||||
|
||||
In addition, it's recommended to set the DNS server and the local gateway. For most home routers the DNS server will have the same IP address as the router itself. If you are using Pi-Hole or a third-party DNS system then you can set the DNS server to that.
|
||||
|
||||
```bash
|
||||
nmcli> set ipv4.dns 192.168.100.1
|
||||
nmcli> set ipv4.gateway 192.168.100.1
|
||||
nmcli> save
|
||||
nmcli> quit
|
||||
```
|
||||
|
||||
`nmcli> print ipv4` will show you the IPv4 properties of this connection. With `nmcli> save` you will save the changes afterwards.
|
||||
|
||||
If you now view the default connection `cat /etc/NetworkManager/system-connections/default` you should see the method is manual and the address is set.
|
||||
|
||||
Doing a `nmcli con reload` does not always work so restart the VM.
|
||||
Doing a `nmcli con reload` does not always work, so restart the virtual machine or the physical system.
|
||||
|
||||
[keyfile]: https://developer.gnome.org/NetworkManager/stable/nm-settings.html
|
||||
[nm-manual]: https://developer.gnome.org/NetworkManager/stable/NetworkManager.conf.html
|
||||
[configuration-usb]: configuration.md
|
||||
[uuid]: https://www.uuidgenerator.net/
|
||||
|
||||
@ -1,12 +1,12 @@
|
||||
# Partition
|
||||
|
||||
The partition layout is a bit different on the first part. We prefere GPT every time where is possible. With SoCs they don't support GPT, we can use the hyprid GPT. More about this on [development](development.mnd) documentation.
|
||||
The partition layout is a bit different than for regular setups. We prefer GPT, if possible. With SoCs which don't support GPT, we use the hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
|
||||
|
||||
The system is designed to have less as possible writes on the system. Which means we have basicly just writes on the OTA update and pretty small (5-6 times per week) on the overlay part. The Data partition have real I/O which is possible to offload into a different drive.
|
||||
The system is designed to have as less as possible write operations on the storage media. Which means that we have basically only write during the OTA update and 5-6 times per week on the overlay part. The data partition is having I/O. This is the reason which is should be run on a different drive.
|
||||
|
||||
Basic it look like:
|
||||
A visual representation looks like this:
|
||||
|
||||
```
|
||||
```text
|
||||
-------------------------
|
||||
| Bootloader |
|
||||
-------------------------
|
||||
@ -36,11 +36,33 @@ Sometime the bootloader part can look different because there can be firmware or
|
||||
|
||||
## Data
|
||||
|
||||
The data partation is the only partition with real I/O. It will be expanded automatic on boot time to the full size of the disk.
|
||||
The data partition is the only partition with real I/O. It will be expanded automatically at boot to the full size of the disk.
|
||||
|
||||
|
||||
## Using datactl to move the data partition.
|
||||
|
||||
In a Home Assistant OS installation, the data is stored on the `/mnt/data` partition of the SD card. This is the only read+write partition on the SD drive. Using the `datactl` move command, this partition can be moved off of the SD card onto an externally connected drive, leaving the rest of the read-only system on the SD.
|
||||
|
||||
The storage capacity of the external drive must be larger than the storage capacity of the existing SD card.
|
||||
|
||||
The command needs to be run from the host console by either connecting a keyboard and monitor or making use of the [debug ssh access](https://developers.home-assistant.io/docs/operating-system/debugging/) over port 22222. The command will not work from within an SSH add-on container.
|
||||
|
||||
Log in as `root` to get to the Home Assistant CLI and then enter `login` to continue to the host.
|
||||
|
||||
Confirm your USB SSD/HD is connected and recognized using `fdisk -l`.
|
||||
|
||||
It is recommended to use fdisk to remove the existing partition(s) before proceeding.
|
||||
|
||||
- Type `fdisk /dev/XXX` (replacing XXX with your drive)
|
||||
- Type `d` to delete a partition.
|
||||
- Continue if needed, then write the changes.
|
||||
|
||||
Creating a new partition is not necessary.
|
||||
|
||||
With the drive now prepared, use the below command (again, replacing XXX with your drive)
|
||||
|
||||
This partition can be offloaded to a different drive with the utility:
|
||||
```sh
|
||||
$ datactl move /dev/xxx
|
||||
```
|
||||
|
||||
On next boot, the partition will be moved to the new drive. The drive need to be bigger as the old one and we own the full new drive.
|
||||
Hit any key to continue, and then the move will happen after the next reboot. Once complete, the external drive will be owned and used by the system.
|
||||
|
||||
13
README.md
13
README.md
@ -1,15 +1,18 @@
|
||||
# Home Assistant Operating-System
|
||||
Hass.io OS based on [buildroot](https://buildroot.org/). It's a hypervisor for Docker and supports various kind of IoT hardware. It is also available as virtual appliance. The whole system is optimized for embedded system and security. You can update the system simple with OTA updates or offline updates.
|
||||
# Home Assistant Operating system
|
||||
|
||||
This is a embedded Linux which work different as a normal Linux distribution. The system is designed to run with less as possible I/O and full optimized for what is needed to be. Not more and not less. If you don't have expirence with embedded systems, that will be the point to go out of this repository. All docs are for developer with embedded background.
|
||||
Home Assistant Operating System (HassOS) is based on [buildroot](https://buildroot.org/). It's a hypervisor for Docker and supports various kind of hardware. It is also available as virtual appliance for different virtualization solutions. The whole system is optimized for hosting [Home Assistant](https://www.home-assistant.io) and its features (to be precise, the [Add-ons](https://www.home-assistant.io/addons/)). You can update the system by using OTA updates or offline updates.
|
||||
|
||||
This is an embedded Linux which works different than a normal Linux distribution. The system is designed to run with minimal I/O and is optimized for its tasks.
|
||||
|
||||
If you don't have experience with embedded systems, buildroot or the build process Linux distributions, then please read up on those topics. All provided documentation here is focusing on developers with a background on embedded systems or a strong understanding of the internal workings of operating systems.
|
||||
|
||||
## Focus
|
||||
|
||||
- Barebox as bootloader on EFI
|
||||
- U-Boot as bootloader on IoT
|
||||
- U-Boot as bootloader
|
||||
- Linux/Buildroot LTS
|
||||
- RAUC for OTA updates
|
||||
- SquashFS LZ4 as filesystem
|
||||
- Docker-CE
|
||||
- AppArmor protected
|
||||
- ZRAM LZ4 for /tmp, /var, swap
|
||||
- ZRAM LZ4 for `/tmp`, `/var` and swap
|
||||
|
||||
@ -5,3 +5,4 @@ source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in"
|
||||
source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in"
|
||||
source "$BR2_EXTERNAL_HASSOS_PATH/package/hardkernel-boot/Config.in"
|
||||
source "$BR2_EXTERNAL_HASSOS_PATH/package/qemu-guest-agent/Config.in"
|
||||
source "$BR2_EXTERNAL_HASSOS_PATH/package/intel-e1000e/Config.in"
|
||||
|
||||
@ -43,8 +43,8 @@ diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath
|
||||
|
||||
resubmit:
|
||||
@@ -909,11 +909,11 @@
|
||||
goto err_skb;
|
||||
}
|
||||
rx_buf->hif_dev = hif_dev;
|
||||
rx_buf->skb = skb;
|
||||
|
||||
+ usb_fill_bulk_urb(urb, hif_dev->udev,
|
||||
+ usb_rcvbulkpipe(hif_dev->udev,
|
||||
@ -53,7 +53,7 @@ diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath
|
||||
USB_REG_IN_PIPE),
|
||||
skb->data, MAX_REG_IN_BUF_SIZE,
|
||||
+ ath9k_hif_usb_reg_in_cb, skb);
|
||||
- ath9k_hif_usb_reg_in_cb, skb, 1);
|
||||
- ath9k_hif_usb_reg_in_cb, rx_buf, 1);
|
||||
|
||||
/* Anchor URB */
|
||||
usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
|
||||
|
||||
@ -1,3 +1,2 @@
|
||||
# CONFIG_USB_STORAGE is not set
|
||||
# CONFIG_DOS_PARTITION is not set
|
||||
CONFIG_DM_VIDEO=y
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,131 +0,0 @@
|
||||
|
||||
|
||||
# Custom modeline!
|
||||
# To use custom modeline you need to disable all the below resolutions
|
||||
# and setup your own!
|
||||
# For more information check our wiki:
|
||||
# http://odroid.com/dokuwiki/doku.php?id=en:c2_hdmi_autosetting
|
||||
# Example below:
|
||||
#m=custombuilt
|
||||
#modeline=1920,1200,154000,74040,60,1920,1968,2000,2080,1200,1202,1208,1235,1,0,1
|
||||
|
||||
# 480 Lines (720x480)
|
||||
#m=480i60hz
|
||||
#m=480i_rpt
|
||||
#m=480p60hz
|
||||
#m=480p_rpt
|
||||
|
||||
# 576 Lines (720x576)
|
||||
#m=576i50hz
|
||||
#m=576i_rpt
|
||||
#m=576p50hz
|
||||
#m=576p_rpt
|
||||
|
||||
# 720 Lines (1280x720)
|
||||
#m=720p50hz
|
||||
#m=720p60hz
|
||||
|
||||
# 1080 Lines (1920x1080)
|
||||
#m=1080i60hz
|
||||
m=1080p60hz
|
||||
#m=1080i50hz
|
||||
#m=1080p50hz
|
||||
#m=1080p24hz
|
||||
|
||||
# 4K (3840x2160)
|
||||
#m=2160p30hz
|
||||
#m=2160p25hz
|
||||
#m=2160p24hz
|
||||
#m=smpte24hz
|
||||
#m=2160p50hz
|
||||
#m=2160p60hz
|
||||
#m=2160p50hz420
|
||||
#m=2160p60hz420
|
||||
|
||||
### VESA modes ###
|
||||
#m=640x480p60hz
|
||||
#m=800x480p60hz
|
||||
#m=480x800p60hz
|
||||
#m=800x600p60hz
|
||||
#m=1024x600p60hz
|
||||
#m=1024x768p60hz
|
||||
#m=1280x800p60hz
|
||||
#m=1280x1024p60hz
|
||||
#m=1360x768p60hz
|
||||
#m=1440x900p60hz
|
||||
#m=1600x900p60hz
|
||||
#m=1680x1050p60hz
|
||||
#m=1600x1200p60hz
|
||||
#m=1920x1200p60hz
|
||||
#m=2560x1080p60hz
|
||||
#m=2560x1440p60hz
|
||||
#m=2560x1600p60hz
|
||||
#m=3440x1440p60hz
|
||||
|
||||
# HDMI BPP Mode
|
||||
m_bpp=32
|
||||
#m_bpp=24
|
||||
#m_bpp=16
|
||||
|
||||
# HDMI DVI/VGA modes
|
||||
# By default its set to HDMI, if needed change below.
|
||||
# Uncomment only a single Line.
|
||||
#vout=dvi
|
||||
#vout=vga
|
||||
|
||||
# HDMI HotPlug Detection control
|
||||
# Allows you to force HDMI thinking that the cable is connected.
|
||||
# true = HDMI will believe that cable is always connected
|
||||
# false = will let board/monitor negotiate the connection status
|
||||
#hpd=false
|
||||
hpd=true
|
||||
|
||||
# Monitor output
|
||||
# Controls if HDMI PHY should output anything to the monitor
|
||||
monitor_onoff=false
|
||||
|
||||
# Server Mode (aka. No Graphics)
|
||||
# Setting nographics to 1 will disable all video subsystem
|
||||
# This mode is ideal of server type usage. (Saves ~300Mb of RAM)
|
||||
nographics=0
|
||||
|
||||
# Meson Timer
|
||||
# 1 - Meson Timer
|
||||
# 0 - Arch Timer
|
||||
# Using meson_timer improves the video playback however it breaks KVM (virtualization).
|
||||
# Using arch timer allows KVM/Virtualization to work however you'll experience poor video
|
||||
mesontimer=1
|
||||
|
||||
# UHS (Ultra High Speed) MicroSD mode enable/disable
|
||||
disableuhs=false
|
||||
|
||||
# MicroSD Card Detection enable/disable
|
||||
# Force the MMC controlled to believe that a card is connected.
|
||||
mmc_removable=true
|
||||
|
||||
# USB Multi WebCam tweak
|
||||
# Only enable this if you use it.
|
||||
usbmulticam=false
|
||||
|
||||
# CPU Frequency / Cores control
|
||||
###########################################
|
||||
### WARNING!!! WARNING!!! WARNING!!!
|
||||
# Before changing anything here please read the wiki entry:
|
||||
# http://odroid.com/dokuwiki/doku.php?id=en:c2_set_cpu_freq
|
||||
#
|
||||
# MAX CPU's
|
||||
#maxcpus=1
|
||||
#maxcpus=2
|
||||
#maxcpus=3
|
||||
maxcpus=4
|
||||
|
||||
# MAX Frequency
|
||||
#max_freq=2016
|
||||
#max_freq=1944
|
||||
#max_freq=1944
|
||||
#max_freq=1920
|
||||
#max_freq=1896
|
||||
#max_freq=1752
|
||||
#max_freq=1680
|
||||
#max_freq=1656
|
||||
max_freq=1536
|
||||
@ -8,7 +8,6 @@ function hassos_pre_image() {
|
||||
local SPL_IMG="$(path_spl_img)"
|
||||
|
||||
cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
|
||||
cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt"
|
||||
cp "${BINARIES_DIR}/meson-gxbb-odroidc2.dtb" "${BOOT_DATA}/meson-gxbb-odroidc2.dtb"
|
||||
|
||||
echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt"
|
||||
|
||||
@ -23,8 +23,7 @@ if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
|
||||
fi
|
||||
|
||||
# Board bootargs
|
||||
if test "${m}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi
|
||||
setenv bootargs_odroidc2 "no_console_suspend hdmimode=${m} ${cmode} m_bpp=${m_bpp} vout=${vout} net.ifnames=0 elevator=noop disablehpd=${hpd} max_freq=${max_freq} maxcpus=${maxcpus} monitor_onoff=${monitor_onoff} disableuhs=${disableuhs} mmc_removable=${mmc_removable} usbmulticam=${usbmulticam}"
|
||||
setenv bootargs_odroidc2 ""
|
||||
|
||||
# HassOS bootargs
|
||||
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
|
||||
|
||||
@ -1,6 +1,3 @@
|
||||
CONFIG_DOS_PARTITION=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
# CONFIG_USB_STORAGE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
|
||||
@ -1,84 +0,0 @@
|
||||
|
||||
|
||||
# Custom modeline!
|
||||
# To use custom modeline you need to disable all the below resolutions
|
||||
# and setup your own!
|
||||
# For more information check our wiki:
|
||||
# https://wiki.odroid.com/odroid-n2/application_note/software/set_display_mode
|
||||
|
||||
# HDMI Mode
|
||||
# Resolution Configuration
|
||||
# Symbol | Resolution
|
||||
# ----------------------+-------------
|
||||
# "480x320p60hz" | 480x320 Progressive 60Hz
|
||||
# "480p60hz" | 720x480 Progressive 60Hz
|
||||
# "576p50hz" | 720x576 Progressive 50Hz
|
||||
# "720p60hz" | 1280x720 Progressive 60Hz
|
||||
# "720p50hz" | 1280x720 Progressive 50Hz
|
||||
# "1080p60hz" | 1920x1080 Progressive 60Hz
|
||||
# "1080p50hz" | 1920x1080 Progressive 50Hz
|
||||
# "1080p30hz" | 1920x1080 Progressive 30Hz
|
||||
# "1080p24hz" | 1920x1080 Progressive 24Hz
|
||||
# "1080i60hz" | 1920x1080 Interlaced 60Hz
|
||||
# "1080i50hz" | 1920x1080 Interlaced 50Hz
|
||||
# "2160p60hz" | 3840x2160 Progressive 60Hz
|
||||
# "2160p50hz" | 3840x2160 Progressive 50Hz
|
||||
# "2160p30hz" | 3840x2160 Progressive 30Hz
|
||||
# "2160p25hz" | 3840x2160 Progressive 25Hz
|
||||
# "2160p24hz" | 3840x2160 Progressive 24Hz
|
||||
# "smpte24hz" | 3840x2160 Progressive 24Hz SMPTE
|
||||
# "2160p60hz420" | 3840x2160 Progressive 60Hz YCbCr 4:2:0
|
||||
# "2160p50hz420" | 3840x2160 Progressive 50Hz YCbCr 4:2:0
|
||||
# "640x480p60hz" | 640x480 Progressive 60Hz
|
||||
# "800x480p60hz" | 800x480 Progressive 60Hz
|
||||
# "800x600p60hz" | 800x600 Progressive 60Hz
|
||||
# "1024x600p60hz" | 1024x600 Progressive 60Hz
|
||||
# "1024x768p60hz" | 1024x768 Progressive 60Hz
|
||||
# "1280x800p60hz" | 1280x800 Progressive 60Hz
|
||||
# "1280x1024p60hz" | 1280x1024 Progressive 60Hz
|
||||
# "1360x768p60hz" | 1360x768 Progressive 60Hz
|
||||
# "1440x900p60hz" | 1440x900 Progressive 60Hz
|
||||
# "1600x900p60hz" | 1600x900 Progressive 60Hz
|
||||
# "1600x1200p60hz" | 1600x1200 Progressive 60Hz
|
||||
# "1680x1050p60hz" | 1680x1050 Progressive 60Hz
|
||||
# "1920x1200p60hz" | 1920x1200 Progressive 60Hz
|
||||
# "2560x1080p60hz" | 2560x1080 Progressive 60Hz
|
||||
# "2560x1440p60hz" | 2560x1440 Progressive 60Hz
|
||||
# "2560x1600p60hz" | 2560x1600 Progressive 60Hz
|
||||
# "3440x1440p60hz" | 3440x1440 Progressive 60Hz
|
||||
hdmimode=1080p60hz
|
||||
|
||||
# Overscan percentage
|
||||
# This value scales down the actual screen size by the percentage below
|
||||
# valid range is 80 to 100
|
||||
overscan=100
|
||||
|
||||
### voutmode : hdmi or dvi
|
||||
#voutmode=dvi
|
||||
voutmode=hdmi
|
||||
|
||||
# HPD enable/disable option
|
||||
disablehpd="false"
|
||||
|
||||
# max cpu frequency for big core, A73 in MHz unit
|
||||
# 1.8 GHz, default value
|
||||
#max_freq_a73=2004 # 2.004 GHz
|
||||
#max_freq_a73=1908 # 1.908 GHz
|
||||
#max_freq_a73=1704 # 1.704 GHz
|
||||
max_freq_a73=1800
|
||||
|
||||
# max cpu frequency for little core, A53 in MHz unit
|
||||
# 1.896 GHz, default value
|
||||
#max_freq_a53=1992 # 1.992 GHz
|
||||
#max_freq_a53=1704 # 1.704 GHz
|
||||
max_freq_a53=1896
|
||||
|
||||
|
||||
# max cpu-cores
|
||||
# Note:
|
||||
# CPU's 0 and 1 are the A53 (small cores)
|
||||
# CPU's 2 to 5 are the A73 (big cores)
|
||||
# Lowering this value disables only the bigger cores (the last cores).
|
||||
#maxcpus=4
|
||||
#maxcpus=5
|
||||
maxcpus=6
|
||||
@ -7,7 +7,6 @@ function hassos_pre_image() {
|
||||
local SPL_IMG="$(path_spl_img)"
|
||||
|
||||
cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
|
||||
cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt"
|
||||
cp "${BINARIES_DIR}/meson-g12b-odroid-n2.dtb" "${BOOT_DATA}/meson-g12b-odroid-n2.dtb"
|
||||
|
||||
echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt"
|
||||
|
||||
@ -23,10 +23,7 @@ if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
|
||||
fi
|
||||
|
||||
# Board bootargs
|
||||
if test "${hdmimode}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi
|
||||
|
||||
# Boot Args
|
||||
setenv bootargs_odroidn2 "clk_ignore_unused hdmimode=${hdmimode} cvbsmode=576cvbs max_freq_a53=${max_freq_a53} max_freq_a73=${max_freq_a73} maxcpus=${maxcpus} ${cmode} voutmode=${voutmode} disablehpd=${disablehpd} overscan=${overscan}"
|
||||
setenv bootargs_odroidn2 ""
|
||||
|
||||
# HassOS bootargs
|
||||
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
|
||||
|
||||
@ -1,40 +0,0 @@
|
||||
|
||||
macaddr=00:1e:06:61:7a:39
|
||||
vout=hdmi
|
||||
# - DVI Mode (disables sound over HDMI as per DVI compat)
|
||||
# vout=dvi
|
||||
|
||||
# --- HDMI CEC Configuration ---
|
||||
# ------------------------------------------
|
||||
cecenable=false
|
||||
# set to true to enable HDMI CEC
|
||||
|
||||
# Enable/Disable ODROID-VU7 Touchsreen
|
||||
disable_vu7=false
|
||||
|
||||
# DRAM Frequency
|
||||
# Sets the LPDDR3 memory frequency
|
||||
# Supported values: 933 825 728 633 (MHZ)
|
||||
ddr_freq=825
|
||||
|
||||
# External watchdog board enable
|
||||
external_watchdog=false
|
||||
# debounce time set to 3 ~ 10 sec, default 3 sec
|
||||
external_watchdog_debounce=3
|
||||
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# HDMI Hot Plug detection
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Forces the HDMI subsystem to ignore the check if the cable is connected or
|
||||
# not.
|
||||
# false : disable the detection and force it as connected.
|
||||
# true : let cable, board and monitor decide the connection status.
|
||||
#
|
||||
# default: true
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
HPD=true
|
||||
@ -10,7 +10,6 @@ function hassos_pre_image() {
|
||||
local spl_img="$(path_spl_img)"
|
||||
|
||||
cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
|
||||
cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt"
|
||||
cp "${BINARIES_DIR}/exynos5422-odroidxu4.dtb" "${BOOT_DATA}/exynos5422-odroidxu4.dtb"
|
||||
|
||||
echo "console=tty1 console=ttySAC2,115200" > "${BOOT_DATA}/cmdline.txt"
|
||||
|
||||
@ -25,12 +25,7 @@ if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then
|
||||
fi
|
||||
|
||||
# Board bootargs
|
||||
setenv hdmi_phy_control "HPD=${HPD} vout=${vout}"
|
||||
if test "${cecenable}" = "false"; then fdt rm /cec@101B0000; fi
|
||||
if test "${disable_vu7}" = "false"; then setenv hid_quirks "usbhid.quirks=0x0eef:0x0005:0x0004"; fi
|
||||
if test "${external_watchdog}" = "true"; then setenv external_watchdog "external_watchdog=${external_watchdog} external_watchdog_debounce=${external_watchdog_debounce}"; fi
|
||||
|
||||
setenv bootargs_odroidxu4 "${videoconfig} ${hdmi_phy_control} ${hid_quirks} smsc95xx.macaddr=${macaddr} ${external_watchdog}"
|
||||
setenv bootargs_odroidxu4 ""
|
||||
|
||||
# HassOS bootargs
|
||||
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor systemd.machine_id=${MACHINE_ID} cgroup_enable=memory"
|
||||
|
||||
@ -1,4 +1,3 @@
|
||||
CONFIG_DOS_PARTITION=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
# CONFIG_USB_STORAGE is not set
|
||||
CONFIG_DISPLAY_BOARDINFO=y
|
||||
|
||||
@ -1,39 +0,0 @@
|
||||
From 81b290367d59103d1f041709c56a3de1c360e102 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 13 May 2019 14:45:31 +0200
|
||||
Subject: [PATCH] FROMLIST: clk: meson: g12a: fix gp0 and hifi ranges
|
||||
|
||||
While some SoC samples are able to lock with a PLL factor of 55, others
|
||||
samples can't. ATM, a minimum of 60 appears to work on all the samples
|
||||
I have tried.
|
||||
|
||||
Even with 60, it sometimes takes a long time for the PLL to eventually
|
||||
lock. The documentation says that the minimum rate of these PLLs DCO
|
||||
should be 3GHz, a factor of 125. Let's use that to be on the safe side.
|
||||
|
||||
With factor range changed, the PLL seems to lock quickly (enough) so far.
|
||||
It is still unclear if the range was the only reason for the delay.
|
||||
|
||||
Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
|
||||
---
|
||||
drivers/clk/meson/g12a.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
|
||||
index b3af61cc6fb9..66cf791bfc8c 100644
|
||||
--- a/drivers/clk/meson/g12a.c
|
||||
+++ b/drivers/clk/meson/g12a.c
|
||||
@@ -1591,7 +1591,7 @@ static struct clk_regmap g12b_cpub_clk_trace = {
|
||||
};
|
||||
|
||||
static const struct pll_mult_range g12a_gp0_pll_mult_range = {
|
||||
- .min = 55,
|
||||
+ .min = 125,
|
||||
.max = 255,
|
||||
};
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,26 +0,0 @@
|
||||
From 122cb1d72a440bc6a84e50b1ed40af7ed7f737c6 Mon Sep 17 00:00:00 2001
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Mon, 27 Apr 2020 23:41:44 +0000
|
||||
Subject: [PATCH 1/1] Odroid-N2: arm64/dts: fix audio name
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
index 1cf9af35e435..f0aac838bc46 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
@@ -227,7 +227,7 @@
|
||||
|
||||
sound {
|
||||
compatible = "amlogic,axg-sound-card";
|
||||
- model = "G12A-ODROIDN2";
|
||||
+ model = "G12B-ODROID-N2";
|
||||
audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&dio2133>;
|
||||
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,43 @@
|
||||
From e2b93751cfd0722801b65b4603b588ab9df4c12b Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Tue, 21 Apr 2020 18:39:30 +0200
|
||||
Subject: [PATCH 2/8] arm64: defconfig: enable meson gx audio as module
|
||||
|
||||
Enable the module config for the Amlogic GX audio card.
|
||||
This module will imply the internal components usually associated
|
||||
with it to make a functional sound card on these platforms.
|
||||
|
||||
Also enable the simple amplifier module which often used on the
|
||||
output stage of those cards.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
||||
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
|
||||
Link: https://lore.kernel.org/r/20200421163935.775935-2-jbrunet@baylibre.com
|
||||
---
|
||||
arch/arm64/configs/defconfig | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
|
||||
index 03d0189f7d68..ceb60ee9c340 100644
|
||||
--- a/arch/arm64/configs/defconfig
|
||||
+++ b/arch/arm64/configs/defconfig
|
||||
@@ -644,6 +644,7 @@ CONFIG_SND_HDA_CODEC_HDMI=m
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_BCM2835_SOC_I2S=m
|
||||
CONFIG_SND_MESON_AXG_SOUND_CARD=m
|
||||
+CONFIG_SND_MESON_GX_SOUND_CARD=m
|
||||
CONFIG_SND_SOC_SDM845=m
|
||||
CONFIG_SND_SOC_ROCKCHIP=m
|
||||
CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
|
||||
@@ -656,6 +657,7 @@ CONFIG_SND_SOC_AK4613=m
|
||||
CONFIG_SND_SOC_ES7134=m
|
||||
CONFIG_SND_SOC_ES7241=m
|
||||
CONFIG_SND_SOC_PCM3168A_I2C=m
|
||||
+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
|
||||
CONFIG_SND_SOC_TAS571X=m
|
||||
CONFIG_SND_SOC_WCD934X=m
|
||||
CONFIG_SND_SOC_WSA881X=m
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,28 @@
|
||||
From 821b8ac21b1675910423ee69d37cb1977b8f271e Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 30 Mar 2020 17:39:04 +0200
|
||||
Subject: [PATCH 3/8] ASoC: meson: imply acodec glue on axg sound card
|
||||
|
||||
When axg card driver support is enabled, lets enable the related
|
||||
internal DAC glue by default.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
sound/soc/meson/Kconfig | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
|
||||
index 8b6295283989..363dc3b1bbe4 100644
|
||||
--- a/sound/soc/meson/Kconfig
|
||||
+++ b/sound/soc/meson/Kconfig
|
||||
@@ -68,6 +68,7 @@ config SND_MESON_AXG_SOUND_CARD
|
||||
imply SND_MESON_AXG_SPDIFOUT
|
||||
imply SND_MESON_AXG_SPDIFIN
|
||||
imply SND_MESON_AXG_PDM
|
||||
+ imply SND_MESON_G12A_TOACODEC
|
||||
imply SND_MESON_G12A_TOHDMITX if DRM_MESON_DW_HDMI
|
||||
help
|
||||
Select Y or M to add support for the AXG SoC sound card
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,47 @@
|
||||
From 60164df03c6314d8f5f3afef56b0bf97962ec9ee Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 24 Feb 2020 14:35:17 +0100
|
||||
Subject: [PATCH 4/8] ASoC: meson: gx-card: fix sound-dai dt schema
|
||||
|
||||
There is a fair amount of warnings when running 'make dtbs_check' with
|
||||
amlogic,gx-sound-card.yaml.
|
||||
|
||||
Ex:
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:1: missing phandle tag in 0
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0:2: missing phandle tag in 0
|
||||
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dt.yaml: sound: dai-link-0:sound-dai:0: [66, 0, 0] is too long
|
||||
|
||||
The reason is that the sound-dai phandle provided has cells, and in such
|
||||
case the schema should use 'phandle-array' instead of 'phandle'.
|
||||
|
||||
Fixes: fd00366b8e41 ("ASoC: meson: gx: add sound card dt-binding documentation")
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
.../devicetree/bindings/sound/amlogic,gx-sound-card.yaml | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
|
||||
index fb374c659be1..a48222e8cd08 100644
|
||||
--- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
|
||||
+++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml
|
||||
@@ -57,7 +57,7 @@ patternProperties:
|
||||
rate
|
||||
|
||||
sound-dai:
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
+ $ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description: phandle of the CPU DAI
|
||||
|
||||
patternProperties:
|
||||
@@ -71,7 +71,7 @@ patternProperties:
|
||||
|
||||
properties:
|
||||
sound-dai:
|
||||
- $ref: /schemas/types.yaml#/definitions/phandle
|
||||
+ $ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description: phandle of the codec DAI
|
||||
|
||||
required:
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,39 @@
|
||||
From e128dd1ca079c5ee558ab100387d9f81bd4f3980 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Thu, 7 May 2020 00:16:55 +0200
|
||||
Subject: [PATCH 5/8] arm64: dts: meson: g12: add internal DAC
|
||||
|
||||
add internal audio DAC support on the g12 and sm1 SoC family
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20200506221656.477379-7-jbrunet@baylibre.com
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 11 +++++++++++
|
||||
1 file changed, 11 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
index c0aef7d69117..593a006f4b7b 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
|
||||
@@ -250,6 +250,17 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ acodec: audio-controller@32000 {
|
||||
+ compatible = "amlogic,t9015";
|
||||
+ reg = <0x0 0x32000 0x0 0x14>;
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ sound-name-prefix = "ACODEC";
|
||||
+ clocks = <&clkc CLKID_AUDIO_CODEC>;
|
||||
+ clock-names = "pclk";
|
||||
+ resets = <&reset RESET_AUDIO_CODEC>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
periphs: bus@34400 {
|
||||
compatible = "simple-bus";
|
||||
reg = <0x0 0x34400 0x0 0x400>;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,39 @@
|
||||
From 5ea4085da165fd3f3aa211cb3664dd166d0d5fd7 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Thu, 7 May 2020 00:16:56 +0200
|
||||
Subject: [PATCH 6/8] arm64: dts: meson: g12: add internal DAC glue
|
||||
|
||||
add the internal DAC glue support on the g12 and sm1 family
|
||||
This glue connects the different TDM interfaces of the SoC to
|
||||
the internal audio DAC codec.
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
|
||||
Link: https://lore.kernel.org/r/20200506221656.477379-8-jbrunet@baylibre.com
|
||||
---
|
||||
arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
index 55d39020ec72..0d14409f509c 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi
|
||||
@@ -343,6 +343,15 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ toacodec: audio-controller@740 {
|
||||
+ compatible = "amlogic,g12a-toacodec";
|
||||
+ reg = <0x0 0x740 0x0 0x4>;
|
||||
+ #sound-dai-cells = <1>;
|
||||
+ sound-name-prefix = "TOACODEC";
|
||||
+ resets = <&clkc_audio AUD_RESET_TOACODEC>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
tohdmitx: audio-controller@744 {
|
||||
compatible = "amlogic,g12a-tohdmitx";
|
||||
reg = <0x0 0x744 0x0 0x4>;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,123 @@
|
||||
From 15b3cef2ea75c4d81cb067264be1cf49c49f81b1 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 15 Jun 2020 15:38:44 +0200
|
||||
Subject: [PATCH 7/8] arm64: dts: meson-g12b: odroid-n2: enable audio loopback
|
||||
|
||||
Add capture pcm interfaces and loopback routes to the odroid-n2
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 65 +++++++++++++++++--
|
||||
1 file changed, 61 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
index 169ea283d4ee..d4421ad164bd 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
@@ -209,11 +209,28 @@
|
||||
sound {
|
||||
compatible = "amlogic,axg-sound-card";
|
||||
model = "G12B-ODROID-N2";
|
||||
- audio-aux-devs = <&tdmout_b>;
|
||||
+ audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
|
||||
+ <&tdmin_c>, <&tdmin_lb>;
|
||||
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
- "TDM_B Playback", "TDMOUT_B OUT";
|
||||
+ "TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "TDMIN_A IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_B IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_C IN 4", "TDM_B Loopback",
|
||||
+ "TDMIN_LB IN 1", "TDM_B Loopback",
|
||||
+ "TODDR_A IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_B IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_C IN 0", "TDMIN_A OUT",
|
||||
+ "TODDR_A IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_B IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_C IN 1", "TDMIN_B OUT",
|
||||
+ "TODDR_A IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_B IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_C IN 2", "TDMIN_C OUT",
|
||||
+ "TODDR_A IN 6", "TDMIN_LB OUT",
|
||||
+ "TODDR_B IN 6", "TDMIN_LB OUT",
|
||||
+ "TODDR_C IN 6", "TDMIN_LB OUT";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -236,8 +253,20 @@
|
||||
sound-dai = <&frddr_c>;
|
||||
};
|
||||
|
||||
- /* 8ch hdmi interface */
|
||||
dai-link-3 {
|
||||
+ sound-dai = <&toddr_a>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-4 {
|
||||
+ sound-dai = <&toddr_b>;
|
||||
+ };
|
||||
+
|
||||
+ dai-link-5 {
|
||||
+ sound-dai = <&toddr_c>;
|
||||
+ };
|
||||
+
|
||||
+ /* 8ch hdmi interface */
|
||||
+ dai-link-6 {
|
||||
sound-dai = <&tdmif_b>;
|
||||
dai-format = "i2s";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
@@ -252,7 +281,7 @@
|
||||
};
|
||||
|
||||
/* hdmi glue */
|
||||
- dai-link-4 {
|
||||
+ dai-link-7 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
|
||||
codec {
|
||||
@@ -476,6 +505,22 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tdmin_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tdmin_lb {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&tdmout_b {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -484,6 +529,18 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&toddr_a {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_b {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toddr_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&uart_ao_a_pins>;
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,168 @@
|
||||
From 978cc250574b7f1ab45f494cc2a094e3c9fd1fa4 Mon Sep 17 00:00:00 2001
|
||||
From: Jerome Brunet <jbrunet@baylibre.com>
|
||||
Date: Mon, 15 Jun 2020 16:34:37 +0200
|
||||
Subject: [PATCH 8/8] arm64: dts: meson: odroid-n2: add jack audio output
|
||||
support
|
||||
|
||||
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
|
||||
---
|
||||
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 79 +++++++++++++++++--
|
||||
1 file changed, 74 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
index d4421ad164bd..34fffa6d859d 100644
|
||||
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
|
||||
@@ -9,6 +9,7 @@
|
||||
#include "meson-g12b-s922x.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
+#include <dt-bindings/sound/meson-g12a-toacodec.h>
|
||||
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
|
||||
/ {
|
||||
@@ -20,6 +21,14 @@
|
||||
ethernet0 = ðmac;
|
||||
};
|
||||
|
||||
+ dioo2133: audio-amplifier-0 {
|
||||
+ compatible = "simple-audio-amplifier";
|
||||
+ enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
|
||||
+ VCC-supply = <&vcc_5v>;
|
||||
+ sound-name-prefix = "U19";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
@@ -209,16 +218,26 @@
|
||||
sound {
|
||||
compatible = "amlogic,axg-sound-card";
|
||||
model = "G12B-ODROID-N2";
|
||||
- audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
|
||||
- <&tdmin_c>, <&tdmin_lb>;
|
||||
+ audio-widgets = "Line", "Lineout";
|
||||
+ audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
|
||||
+ <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
|
||||
+ <&dioo2133>;
|
||||
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
+ "TDMOUT_C IN 0", "FRDDR_A OUT 2",
|
||||
+ "TDMOUT_C IN 1", "FRDDR_B OUT 2",
|
||||
+ "TDMOUT_C IN 2", "FRDDR_C OUT 2",
|
||||
+ "TDM_C Playback", "TDMOUT_C OUT",
|
||||
"TDMIN_A IN 4", "TDM_B Loopback",
|
||||
"TDMIN_B IN 4", "TDM_B Loopback",
|
||||
"TDMIN_C IN 4", "TDM_B Loopback",
|
||||
"TDMIN_LB IN 1", "TDM_B Loopback",
|
||||
+ "TDMIN_A IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_B IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_C IN 5", "TDM_C Loopback",
|
||||
+ "TDMIN_LB IN 2", "TDM_C Loopback",
|
||||
"TODDR_A IN 0", "TDMIN_A OUT",
|
||||
"TODDR_B IN 0", "TDMIN_A OUT",
|
||||
"TODDR_C IN 0", "TDMIN_A OUT",
|
||||
@@ -230,7 +249,11 @@
|
||||
"TODDR_C IN 2", "TDMIN_C OUT",
|
||||
"TODDR_A IN 6", "TDMIN_LB OUT",
|
||||
"TODDR_B IN 6", "TDMIN_LB OUT",
|
||||
- "TODDR_C IN 6", "TDMIN_LB OUT";
|
||||
+ "TODDR_C IN 6", "TDMIN_LB OUT",
|
||||
+ "U19 INL", "ACODEC LOLP",
|
||||
+ "U19 INR", "ACODEC LORP",
|
||||
+ "Lineout", "U19 OUTL",
|
||||
+ "Lineout", "U19 OUTR";
|
||||
|
||||
assigned-clocks = <&clkc CLKID_MPLL2>,
|
||||
<&clkc CLKID_MPLL0>,
|
||||
@@ -275,22 +298,56 @@
|
||||
dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
mclk-fs = <256>;
|
||||
|
||||
- codec {
|
||||
+ codec-0 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
};
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&toacodec TOACODEC_IN_B>;
|
||||
+ };
|
||||
};
|
||||
|
||||
- /* hdmi glue */
|
||||
+ /* i2s jack output interface */
|
||||
dai-link-7 {
|
||||
+ sound-dai = <&tdmif_c>;
|
||||
+ dai-format = "i2s";
|
||||
+ dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
+ mclk-fs = <256>;
|
||||
+
|
||||
+ codec-0 {
|
||||
+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
|
||||
+ };
|
||||
+
|
||||
+ codec-1 {
|
||||
+ sound-dai = <&toacodec TOACODEC_IN_C>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ /* hdmi glue */
|
||||
+ dai-link-8 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
|
||||
codec {
|
||||
sound-dai = <&hdmi_tx>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ /* acodec glue */
|
||||
+ dai-link-9 {
|
||||
+ sound-dai = <&toacodec TOACODEC_OUT>;
|
||||
+
|
||||
+ codec {
|
||||
+ sound-dai = <&acodec>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
};
|
||||
|
||||
+&acodec {
|
||||
+ AVDD-supply = <&vddao_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&arb {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -505,6 +562,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tdmif_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&tdmin_a {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -525,6 +586,14 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&tdmout_c {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&toacodec {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
&tohdmitx {
|
||||
status = "okay";
|
||||
};
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -4,6 +4,8 @@ CONFIG_SCSI_LOWLEVEL=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_BLK_DEV_NVME=y
|
||||
|
||||
# CONFIG_E1000E is not set
|
||||
|
||||
CONFIG_IGB=y
|
||||
|
||||
CONFIG_IWLWIFI=m
|
||||
@ -13,13 +15,3 @@ CONFIG_DRM_I915=m
|
||||
CONFIG_DRM_I915_CAPTURE_ERROR=y
|
||||
CONFIG_DRM_I915_COMPRESS_ERROR=y
|
||||
CONFIG_DRM_I915_USERPTR=y
|
||||
|
||||
CONFIG_SND_HDA=y
|
||||
CONFIG_SND_HDA_CORE=y
|
||||
CONFIG_SND_HDA_GENERIC=y
|
||||
CONFIG_SND_HDA_INTEL=m
|
||||
CONFIG_SND_HDA_I915=m
|
||||
CONFIG_SND_HDA_CODEC_REALTEK=m
|
||||
CONFIG_SND_HDA_CODEC_ANALOG=m
|
||||
CONFIG_SND_HDA_CODEC_VIA=m
|
||||
CONFIG_SND_HDA_CODEC_HDMI=m
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
<?xml version="1.0"?>
|
||||
<Envelope ovf:version="1.0" xml:lang="en-US" xmlns="http://schemas.dmtf.org/ovf/envelope/1" xmlns:ovf="http://schemas.dmtf.org/ovf/envelope/1" xmlns:rasd="http://schemas.dmtf.org/wbem/wscim/1/cim-schema/2/CIM_ResourceAllocationSettingData" xmlns:vssd="http://schemas.dmtf.org/wbem/wscim/1/cim-schema/2/CIM_VirtualSystemSettingData" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vbox="http://www.virtualbox.org/ovf/machine">
|
||||
<Envelope ovf:version="1.0" xml:lang="en-US" xmlns="http://schemas.dmtf.org/ovf/envelope/1" xmlns:ovf="http://schemas.dmtf.org/ovf/envelope/1" xmlns:rasd="http://schemas.dmtf.org/wbem/wscim/1/cim-schema/2/CIM_ResourceAllocationSettingData" xmlns:vssd="http://schemas.dmtf.org/wbem/wscim/1/cim-schema/2/CIM_VirtualSystemSettingData" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vbox="http://www.virtualbox.org/ovf/machine" xmlns:vmw="http://www.vmware.com/schema/ovf">
|
||||
<References>
|
||||
<File ovf:id="file1" ovf:href="home-assistant.vmdk"/>
|
||||
</References>
|
||||
@ -20,7 +20,7 @@
|
||||
<Product>Operating-System</Product>
|
||||
<ProductUrl>https://home-assistant.io</ProductUrl>
|
||||
</ProductSection>
|
||||
<OperatingSystemSection ovf:id="102" vmw:osType="otherLinux64Guest" ovf:required="false">
|
||||
<OperatingSystemSection ovf:id="100" vmw:osType="other4xLinux64Guest">
|
||||
<Info>The kind of installed guest operating system</Info>
|
||||
<Description>Linux</Description>
|
||||
</OperatingSystemSection>
|
||||
@ -81,8 +81,8 @@
|
||||
<Item>
|
||||
<rasd:AutomaticAllocation>true</rasd:AutomaticAllocation>
|
||||
<rasd:Caption>eth0</rasd:Caption>
|
||||
<rasd:Description>Ethernet adapter</rasd:Description>
|
||||
<rasd:Connection>Bridged</rasd:Connection>
|
||||
<rasd:Description>Ethernet adapter</rasd:Description>
|
||||
<rasd:ElementName>eth0</rasd:ElementName>
|
||||
<rasd:InstanceID>6</rasd:InstanceID>
|
||||
<rasd:ResourceSubType>E1000</rasd:ResourceSubType>
|
||||
|
||||
@ -0,0 +1,41 @@
|
||||
From a9f92163e6c07e5c6f57f00f4931098e0e1ee826 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:18:37 +0200
|
||||
Subject: [PATCH 1/4] dt-bindings: reset: Add a binding for the RPi Firmware
|
||||
reset controller
|
||||
|
||||
The firmware running on the RPi VideoCore can be used to reset and
|
||||
initialize HW controlled by the firmware.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
[backport for RPi 4.19 kernel]
|
||||
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
||||
---
|
||||
.../dt-bindings/reset/raspberrypi,firmware-reset.h | 13 +++++++++++++
|
||||
1 file changed, 13 insertions(+)
|
||||
create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
|
||||
diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
new file mode 100644
|
||||
index 000000000000..1a4f4c792723
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
@@ -0,0 +1,13 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+/*
|
||||
+ * Copyright (c) 2020 Nicolas Saenz Julienne
|
||||
+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
|
||||
+ */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||
+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||
+
|
||||
+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0
|
||||
+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1
|
||||
+
|
||||
+#endif
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -1,26 +0,0 @@
|
||||
From b8cabc02384390446cb7f2e34af07b44881246e3 Mon Sep 17 00:00:00 2001
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Fri, 24 Apr 2020 22:03:34 +0000
|
||||
Subject: [PATCH 1/1] rpi-dts: allow uboot find serial
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
arch/arm/boot/dts/bcm283x.dtsi | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
|
||||
index 7e95601376d0..82a0ee0d5889 100644
|
||||
--- a/arch/arm/boot/dts/bcm283x.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm283x.dtsi
|
||||
@@ -306,7 +306,7 @@
|
||||
};
|
||||
|
||||
uart0: serial@7e201000 {
|
||||
- compatible = "arm,pl011", "arm,primecell";
|
||||
+ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
|
||||
reg = <0x7e201000 0x200>;
|
||||
interrupts = <2 25>;
|
||||
clocks = <&clocks BCM2835_CLOCK_UART>,
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,38 @@
|
||||
From b15414057bc9a023fc865242f499807d82933e58 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <b15414057bc9a023fc865242f499807d82933e58.1595152741.git.stefan@agner.ch>
|
||||
In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:18:39 +0200
|
||||
Subject: [PATCH 2/4] ARM: dts: bcm2711: Add firmware usb reset node
|
||||
|
||||
Now that the reset driver exposing Raspberry Pi 4's firmware based USB
|
||||
reset routine is available, let's add the device tree node exposing it.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
[backport for RPi 4.19 kernel]
|
||||
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 5 +++++
|
||||
1 file changed, 5 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
index 42259dbf3919..ec0b3bb64de8 100644
|
||||
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
@@ -80,6 +80,11 @@
|
||||
"";
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+ reset: reset {
|
||||
+ compatible = "raspberrypi,firmware-reset";
|
||||
+ #reset-cells = <1>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,58 @@
|
||||
From 08558575c0f3d1437994590ad418d6c2cf18d96b Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <08558575c0f3d1437994590ad418d6c2cf18d96b.1595152741.git.stefan@agner.ch>
|
||||
In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:18:40 +0200
|
||||
Subject: [PATCH 3/4] ARM: dts: bcm2711: Add reset controller to xHCI node
|
||||
|
||||
The chip is hardwired to the board's PCIe bus and needs to be properly
|
||||
setup trough a firmware routine after a PCI fundamental reset. Pass the
|
||||
reset controller phandle that takes care of triggering the
|
||||
initialization to the relevant PCI device.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
[backport for RPi 4.19 kernel]
|
||||
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
index ec0b3bb64de8..2c6aa1933600 100644
|
||||
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
||||
@@ -4,6 +4,8 @@
|
||||
#include "bcm2711-rpi.dtsi"
|
||||
#include "bcm283x-rpi-csi1-2lane.dtsi"
|
||||
|
||||
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
|
||||
+
|
||||
/ {
|
||||
compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
|
||||
model = "Raspberry Pi 4 Model B";
|
||||
@@ -87,6 +89,21 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&pcie_0 {
|
||||
+ pci@1,0 {
|
||||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+ ranges;
|
||||
+
|
||||
+ reg = <0 0 0 0 0>;
|
||||
+
|
||||
+ usb@1,0 {
|
||||
+ reg = <0x10000 0 0 0 0>;
|
||||
+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins &bt_pins>;
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,44 @@
|
||||
From dcfb930f9c271ad303a888ce94227d2d78974e39 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <dcfb930f9c271ad303a888ce94227d2d78974e39.1595152741.git.stefan@agner.ch>
|
||||
In-Reply-To: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
References: <a9f92163e6c07e5c6f57f00f4931098e0e1ee826.1595152741.git.stefan@agner.ch>
|
||||
From: Stefan Agner <stefan@agner.ch>
|
||||
Date: Sun, 19 Jul 2020 11:49:45 +0200
|
||||
Subject: [PATCH 4/4] ARM: dts: bcm2838: add upstream property to enable PCIe
|
||||
spread-spectrum
|
||||
|
||||
Add the upstream device tree property brcm,enable-ssc to enable
|
||||
spread-spectrum for PCIe. This is used by the upstream U-Boot.
|
||||
|
||||
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2838.dtsi | 13 ++++++++-----
|
||||
1 file changed, 8 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2838.dtsi b/arch/arm/boot/dts/bcm2838.dtsi
|
||||
index 36d250d7053b..d6cc876bc720 100644
|
||||
--- a/arch/arm/boot/dts/bcm2838.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm2838.dtsi
|
||||
@@ -353,11 +353,14 @@
|
||||
*/
|
||||
ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
|
||||
0x0 0x04000000>;
|
||||
- /* Map inbound accesses from pci:0x0_00000000..ffffffff
|
||||
- * to scb:0x0_00000000-ffffffff
|
||||
- */
|
||||
- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
|
||||
- 0x1 0x00000000>;
|
||||
+ /*
|
||||
+ * The wrapper around the PCIe block has a bug
|
||||
+ * preventing it from accessing beyond the first 3GB of
|
||||
+ * memory.
|
||||
+ */
|
||||
+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
|
||||
+ 0x0 0xc0000000>;
|
||||
+ brcm,enable-ssc;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -22,7 +22,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.39"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/kernel.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -47,6 +47,7 @@ BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_8000=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_8265=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_IWLWIFI_9XXX=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_I915=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_DT_UTILS=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
@ -103,3 +104,4 @@ BR2_PACKAGE_HOST_RAUC=y
|
||||
BR2_PACKAGE_HASSIO=y
|
||||
BR2_PACKAGE_HASSIO_ARCH="amd64"
|
||||
BR2_PACKAGE_APPARMOR=y
|
||||
BR2_PACKAGE_INTEL_E1000E=y
|
||||
|
||||
@ -21,8 +21,8 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
|
||||
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/hardkernel/linux/archive/f2eb401e73e9b54432cf4234722cb4fad1b334f2.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
|
||||
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
@ -38,6 +38,7 @@ BR2_PACKAGE_JQ=y
|
||||
BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -55,7 +56,6 @@ BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
|
||||
BR2_PACKAGE_DHCP=y
|
||||
BR2_PACKAGE_DHCP_CLIENT=y
|
||||
BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
|
||||
BR2_PACKAGE_DROPBEAR=y
|
||||
# BR2_PACKAGE_DROPBEAR_CLIENT is not set
|
||||
# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
|
||||
@ -88,7 +88,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -21,8 +21,8 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
|
||||
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/hardkernel/linux/archive/40b58dcff55ee1046f6d69953b241ff27b92f749.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
|
||||
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
@ -38,6 +38,7 @@ BR2_PACKAGE_JQ=y
|
||||
BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -55,7 +56,6 @@ BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
|
||||
BR2_PACKAGE_DHCP=y
|
||||
BR2_PACKAGE_DHCP_CLIENT=y
|
||||
BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
|
||||
BR2_PACKAGE_DROPBEAR=y
|
||||
# BR2_PACKAGE_DROPBEAR_CLIENT is not set
|
||||
# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
|
||||
@ -88,7 +88,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-n2"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -22,10 +22,9 @@ BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
|
||||
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/hardkernel/linux/archive/f2eb401e73e9b54432cf4234722cb4fad1b334f2.tar.gz"
|
||||
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-exynos.config"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.7.10"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="exynos"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
BR2_LINUX_KERNEL_DTS_SUPPORT=y
|
||||
@ -41,6 +40,7 @@ BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_MFC_V8=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -58,7 +58,6 @@ BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y
|
||||
BR2_PACKAGE_DHCP=y
|
||||
BR2_PACKAGE_DHCP_CLIENT=y
|
||||
BR2_PACKAGE_WIREGUARD_LINUX_COMPAT=y
|
||||
BR2_PACKAGE_DROPBEAR=y
|
||||
# BR2_PACKAGE_DROPBEAR_CLIENT is not set
|
||||
# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
|
||||
@ -93,7 +92,7 @@ BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -23,7 +23,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.39"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/kernel.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -37,6 +37,7 @@ BR2_PACKAGE_JQ=y
|
||||
BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_DT_UTILS=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0-w $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -41,6 +41,7 @@ BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_WIFI_FIRMWARE=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -90,7 +91,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -40,6 +40,7 @@ BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -89,12 +90,12 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
BR2_PACKAGE_HOST_MTOOLS=y
|
||||
BR2_PACKAGE_HOST_RAUC=y
|
||||
BR2_PACKAGE_HASSIO=y
|
||||
BR2_PACKAGE_HASSIO_ARCH="armhf"
|
||||
BR2_PACKAGE_HASSIO_ARCH="armv7"
|
||||
BR2_PACKAGE_APPARMOR=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -41,6 +41,7 @@ BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_RPI_WIFI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -90,7 +91,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot64.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -41,6 +41,7 @@ BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_RPI_WIFI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -90,7 +91,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -42,6 +42,7 @@ BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE_VARIANT_PI4=y
|
||||
BR2_PACKAGE_RPI_WIFI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -86,12 +87,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
|
||||
BR2_TARGET_UBOOT=y
|
||||
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
|
||||
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
|
||||
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
|
||||
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.07"
|
||||
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot64.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcm2711"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -42,6 +42,7 @@ BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE_VARIANT_PI4=y
|
||||
BR2_PACKAGE_RPI_WIFI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -91,7 +92,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4_32b"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/c41ae7cf543c1d680b4ac1afae40ca5bb0a96661.tar.gz"
|
||||
BR2_LINUX_KERNEL_CUSTOM_TARBALL_LOCATION="https://github.com/raspberrypi/linux/archive/cc39f1c9f82f6fe5a437836811d906c709e0661c.tar.gz"
|
||||
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
BR2_LINUX_KERNEL_LZ4=y
|
||||
@ -40,6 +40,7 @@ BR2_PACKAGE_E2FSPROGS=y
|
||||
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_RPI_FIRMWARE=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
@ -89,7 +90,7 @@ BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi"
|
||||
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
|
||||
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.ush"
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
|
||||
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
|
||||
BR2_PACKAGE_HOST_DOSFSTOOLS=y
|
||||
BR2_PACKAGE_HOST_E2FSPROGS=y
|
||||
BR2_PACKAGE_HOST_GPTFDISK=y
|
||||
|
||||
@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
|
||||
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh"
|
||||
BR2_LINUX_KERNEL=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.39"
|
||||
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.53"
|
||||
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
|
||||
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
|
||||
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
|
||||
@ -42,6 +42,7 @@ BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
|
||||
BR2_PACKAGE_SQUASHFS=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE=y
|
||||
BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y
|
||||
BR2_PACKAGE_CRDA=y
|
||||
BR2_PACKAGE_GPTFDISK=y
|
||||
BR2_PACKAGE_GPTFDISK_SGDISK=y
|
||||
BR2_PACKAGE_UBOOT_TOOLS=y
|
||||
|
||||
@ -13,7 +13,6 @@ CONFIG_USB_ACM=m
|
||||
CONFIG_USB_USBNET=m
|
||||
|
||||
CONFIG_MEDIA_CEC_SUPPORT=y
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
|
||||
CONFIG_BT=y
|
||||
CONFIG_BT_BREDR=y
|
||||
@ -141,3 +140,15 @@ CONFIG_VIDEO_EM28XX_V4L2=m
|
||||
CONFIG_VIDEO_EM28XX_ALSA=m
|
||||
CONFIG_VIDEO_EM28XX_DVB=m
|
||||
CONFIG_VIDEO_EM28XX_RC=m
|
||||
|
||||
# Audio devices (USB/PCI)
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
CONFIG_SND_HDA=y
|
||||
CONFIG_SND_HDA_CORE=y
|
||||
CONFIG_SND_HDA_GENERIC=y
|
||||
CONFIG_SND_HDA_INTEL=m
|
||||
CONFIG_SND_HDA_I915=m
|
||||
CONFIG_SND_HDA_CODEC_REALTEK=m
|
||||
CONFIG_SND_HDA_CODEC_ANALOG=m
|
||||
CONFIG_SND_HDA_CODEC_VIA=m
|
||||
CONFIG_SND_HDA_CODEC_HDMI=m
|
||||
|
||||
@ -41,3 +41,5 @@ CONFIG_CIFS_XATTR=y
|
||||
CONFIG_CIFS_POSIX=y
|
||||
CONFIG_CIFS_ACL=y
|
||||
CONFIG_CIFS_DFS_UPCALL=y
|
||||
|
||||
CONFIG_WIREGUARD=m
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
VERSION_MAJOR=4
|
||||
VERSION_BUILD=6
|
||||
VERSION_MAJOR=5
|
||||
VERSION_BUILD=0
|
||||
|
||||
HASSOS_NAME="HassOS"
|
||||
HASSOS_ID="hassos"
|
||||
|
||||
DEPLOYMENT="staging"
|
||||
DEPLOYMENT="development"
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
FROM ubuntu:18.04
|
||||
FROM debian:buster
|
||||
|
||||
# Set shell
|
||||
SHELL ["/bin/bash", "-o", "pipefail", "-c"]
|
||||
@ -10,9 +10,11 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
|
||||
curl \
|
||||
jq \
|
||||
gpg-agent \
|
||||
gpg \
|
||||
dirmngr \
|
||||
software-properties-common \
|
||||
&& curl -fsSL https://download.docker.com/linux/ubuntu/gpg | apt-key add - \
|
||||
&& add-apt-repository "deb https://download.docker.com/linux/ubuntu $(lsb_release -cs) stable" \
|
||||
&& curl -fsSL https://download.docker.com/linux/debian/gpg | apt-key add - \
|
||||
&& add-apt-repository "deb https://download.docker.com/linux/debian $(lsb_release -cs) stable" \
|
||||
&& apt-get update && apt-get install -y --no-install-recommends \
|
||||
docker-ce docker-ce-cli containerd.io \
|
||||
&& rm -rf /var/lib/apt/lists/*
|
||||
|
||||
10
buildroot-external/package/intel-e1000e/Config.in
Normal file
10
buildroot-external/package/intel-e1000e/Config.in
Normal file
@ -0,0 +1,10 @@
|
||||
comment "e1000e needs a Linux kernel to be built"
|
||||
depends on !BR2_LINUX_KERNEL
|
||||
|
||||
config BR2_PACKAGE_INTEL_E1000E
|
||||
bool "Intel Network Adapter Driver for PCIe"
|
||||
depends on BR2_LINUX_KERNEL
|
||||
help
|
||||
Install Intel Network Adapter Driver for PCIe (external module)
|
||||
|
||||
https://downloadcenter.intel.com/download/15817/Intel-Network-Adapter-Driver-for-PCIe-Intel-Gigabit-Ethernet-Network-Connections-Under-Linux-
|
||||
@ -0,0 +1,5 @@
|
||||
# from https://downloadcenter.intel.com/download/15817/Intel-Network-Adapter-Driver-for-PCIe-Intel-Gigabit-Ethernet-Network-Connections-Under-Linux-
|
||||
md5 711dc0ada83947b0e22e53699d4fa1ac e1000e-3.8.4.tar.gz
|
||||
|
||||
# Locally calculated
|
||||
sha256 4441515302f901e32f29b9b4702239f176d3c02c3b9a697009f93012205e0de1 e1000e-3.8.4.tar.gz
|
||||
20
buildroot-external/package/intel-e1000e/intel-e1000e.mk
Normal file
20
buildroot-external/package/intel-e1000e/intel-e1000e.mk
Normal file
@ -0,0 +1,20 @@
|
||||
################################################################################
|
||||
#
|
||||
# Intel Network Adapter Driver for PCIe
|
||||
#
|
||||
################################################################################
|
||||
|
||||
INTEL_E1000E_VERSION = 3.8.4
|
||||
INTEL_E1000E_LICENSE = GPL-2.0
|
||||
INTEL_E1000E_LICENSE_FILES = COPYING
|
||||
INTEL_E1000E_SOURCE = e1000e-$(INTEL_E1000E_VERSION).tar.gz
|
||||
INTEL_E1000E_SITE = https://downloads.sourceforge.net/project/e1000/e1000e%20stable/$(INTEL_E1000E_VERSION)
|
||||
INTEL_E1000E_MODULE_SUBDIRS = src
|
||||
|
||||
INTEL_E1000E_MODULE_MAKE_OPTS = \
|
||||
CONFIG_E1000E=m \
|
||||
KVER=$(LINUX_VERSION_PROBED) \
|
||||
KSRC=$(LINUX_DIR)
|
||||
|
||||
$(eval $(kernel-module))
|
||||
$(eval $(generic-package))
|
||||
@ -1,7 +1,8 @@
|
||||
[Unit]
|
||||
Description=QEMU Guest Agent
|
||||
After=syslog.target network.target
|
||||
ConditionVirtualization=kvm
|
||||
ConditionVirtualization=|kvm
|
||||
ConditionVirtualization=|qemu
|
||||
|
||||
[Service]
|
||||
ExecStart=/usr/libexec/qemu-ga -m virtio-serial -p /dev/virtio-ports/org.qemu.guest_agent.0
|
||||
|
||||
@ -0,0 +1,96 @@
|
||||
From 040a141f84f2f84bf8be18f85b4cdb34bf066df0 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595086593.git.stefan@agner.ch>
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Sun, 5 Aug 2018 20:43:03 +0000
|
||||
Subject: [PATCH 1/1] CMD: read string from fileinto env
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
cmd/Kconfig | 5 +++++
|
||||
cmd/Makefile | 1 +
|
||||
cmd/fileenv.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 51 insertions(+)
|
||||
create mode 100644 cmd/fileenv.c
|
||||
|
||||
diff --git a/cmd/Kconfig b/cmd/Kconfig
|
||||
index 192b3b262f..b44cd64215 100644
|
||||
--- a/cmd/Kconfig
|
||||
+++ b/cmd/Kconfig
|
||||
@@ -1388,6 +1388,11 @@ config CMD_SETEXPR
|
||||
Also supports loading the value at a memory location into a variable.
|
||||
If CONFIG_REGEX is enabled, setexpr also supports a gsub function.
|
||||
|
||||
+config CMD_FILEENV
|
||||
+ bool "fileenv"
|
||||
+ help
|
||||
+ Read a file into memory and store it to env.
|
||||
+
|
||||
endmenu
|
||||
|
||||
menu "Android support commands"
|
||||
diff --git a/cmd/Makefile b/cmd/Makefile
|
||||
index 974ad48b0a..287887e97f 100644
|
||||
--- a/cmd/Makefile
|
||||
+++ b/cmd/Makefile
|
||||
@@ -128,6 +128,7 @@ obj-$(CONFIG_CMD_SF) += sf.o
|
||||
obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
|
||||
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
|
||||
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
|
||||
+obj-$(CONFIG_CMD_FILEENV) += fileenv.o
|
||||
obj-$(CONFIG_CMD_SPI) += spi.o
|
||||
obj-$(CONFIG_CMD_STRINGS) += strings.o
|
||||
obj-$(CONFIG_CMD_SMC) += smccc.o
|
||||
diff --git a/cmd/fileenv.c b/cmd/fileenv.c
|
||||
new file mode 100644
|
||||
index 0000000000..af24d22d0e
|
||||
--- /dev/null
|
||||
+++ b/cmd/fileenv.c
|
||||
@@ -0,0 +1,45 @@
|
||||
+#include <config.h>
|
||||
+#include <common.h>
|
||||
+#include <command.h>
|
||||
+#include <linux/ctype.h>
|
||||
+
|
||||
+static char *fs_argv[5];
|
||||
+
|
||||
+int do_fileenv(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
|
||||
+{
|
||||
+ if (argc < 6)
|
||||
+ return CMD_RET_USAGE;
|
||||
+
|
||||
+ fs_argv[0] = "fatload";
|
||||
+ fs_argv[1] = argv[1];
|
||||
+ fs_argv[2] = argv[2];
|
||||
+ fs_argv[3] = argv[3];
|
||||
+ fs_argv[4] = argv[4];
|
||||
+
|
||||
+ if (do_fat_fsload(cmdtp, 0, 5, fs_argv) != 0)
|
||||
+ return 1;
|
||||
+
|
||||
+ char *addr = (char *)simple_strtoul(argv[3], NULL, 16);
|
||||
+ size_t size = env_get_hex("filesize", 0);
|
||||
+
|
||||
+ // Prepare string
|
||||
+ addr[size] = 0x00;
|
||||
+ char *s = addr;
|
||||
+ while(*s != 0x00) {
|
||||
+ if (isprint(*s)) {
|
||||
+ s++;
|
||||
+ }
|
||||
+ else {
|
||||
+ *s = 0x00;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ return env_set(argv[5], addr);
|
||||
+}
|
||||
+
|
||||
+U_BOOT_CMD(
|
||||
+ fileenv, 6, 0, do_fileenv,
|
||||
+ "Read file and store it into env.",
|
||||
+ "<interface> <dev:part> <addr> <filename> <envname>\n"
|
||||
+ " - Read file from fat32 and store it as env."
|
||||
+);
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,41 @@
|
||||
From b39cd5ba642ddba46268e8d873b952604844c047 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <b39cd5ba642ddba46268e8d873b952604844c047.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:51 +0200
|
||||
Subject: [PATCH 02/20] usb: xhci: Add missing cache flush in the scratchpad
|
||||
array initialization
|
||||
|
||||
In current code there is no cache flush after initializing the scratchpad
|
||||
buffer array with the scratchpad buffer pointers. This leads to a failure
|
||||
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
|
||||
controller + VL805 USB hub) - the very first TRB transfer on the command
|
||||
ring fails and there is a timeout while waiting for the command completion
|
||||
event. After adding the missing cache flush everything seems to be working
|
||||
as expected.
|
||||
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
drivers/usb/host/xhci-mem.c | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
|
||||
index 2d968aafb0..f446520528 100644
|
||||
--- a/drivers/usb/host/xhci-mem.c
|
||||
+++ b/drivers/usb/host/xhci-mem.c
|
||||
@@ -395,6 +395,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
|
||||
scratchpad->sp_array[i] = cpu_to_le64(ptr);
|
||||
}
|
||||
|
||||
+ xhci_flush_cache((uintptr_t)scratchpad->sp_array,
|
||||
+ sizeof(u64) * num_sp);
|
||||
+
|
||||
return 0;
|
||||
|
||||
fail_sp3:
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,69 @@
|
||||
From 71343be3dd8d7f04cea781c8369aa77a36ae7123 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <71343be3dd8d7f04cea781c8369aa77a36ae7123.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:52 +0200
|
||||
Subject: [PATCH 03/20] usb: xhci: Use only 32-bit accesses in
|
||||
xhci_writeq/xhci_readq
|
||||
|
||||
There might be hardware configurations where 64-bit data accesses
|
||||
to XHCI registers are not supported properly. This patch removes
|
||||
the readq/writeq so always two 32-bit accesses are used to read/write
|
||||
64-bit XHCI registers, similarly as it is done in Linux kernel.
|
||||
|
||||
This patch fixes operation of the XHCI controller on RPI4 Broadcom
|
||||
BCM2711 SoC based board, where the VL805 USB XHCI controller is
|
||||
connected to the PCIe Root Complex, which is attached to the system
|
||||
through the SCB bridge.
|
||||
|
||||
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
|
||||
the 64-bit wide register accesses initiated by the CPU are not properly
|
||||
translated to a sequence of 32-bit PCIe accesses.
|
||||
xhci_readq(), for example, always returns same value in upper and lower
|
||||
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
|
||||
|
||||
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
include/usb/xhci.h | 8 --------
|
||||
1 file changed, 8 deletions(-)
|
||||
|
||||
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
|
||||
index 20e4a21066..1170c0ac69 100644
|
||||
--- a/include/usb/xhci.h
|
||||
+++ b/include/usb/xhci.h
|
||||
@@ -1114,28 +1114,20 @@ static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)
|
||||
*/
|
||||
static inline u64 xhci_readq(__le64 volatile *regs)
|
||||
{
|
||||
-#if BITS_PER_LONG == 64
|
||||
- return readq(regs);
|
||||
-#else
|
||||
__u32 *ptr = (__u32 *)regs;
|
||||
u64 val_lo = readl(ptr);
|
||||
u64 val_hi = readl(ptr + 1);
|
||||
return val_lo + (val_hi << 32);
|
||||
-#endif
|
||||
}
|
||||
|
||||
static inline void xhci_writeq(__le64 volatile *regs, const u64 val)
|
||||
{
|
||||
-#if BITS_PER_LONG == 64
|
||||
- writeq(val, regs);
|
||||
-#else
|
||||
__u32 *ptr = (__u32 *)regs;
|
||||
u32 val_lo = lower_32_bits(val);
|
||||
/* FIXME */
|
||||
u32 val_hi = upper_32_bits(val);
|
||||
writel(val_lo, ptr);
|
||||
writel(val_hi, ptr + 1);
|
||||
-#endif
|
||||
}
|
||||
|
||||
int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,85 @@
|
||||
From 82024c95e4d00b555f93d93b9f706c4d995ab302 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <82024c95e4d00b555f93d93b9f706c4d995ab302.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:53 +0200
|
||||
Subject: [PATCH 04/20] pci: Move some PCIe register offset definitions to a
|
||||
common header
|
||||
|
||||
Some PCI Express register offsets are currently defined in multiple
|
||||
drivers, move them to a common header to avoid re-definitions and
|
||||
as a pre-requisite for adding new PCIe driver.
|
||||
While at it replace some spaces with tabs.
|
||||
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
drivers/pci/pci-rcar-gen3.c | 8 --------
|
||||
drivers/pci/pcie_intel_fpga.c | 3 ---
|
||||
include/pci.h | 13 +++++++++++--
|
||||
3 files changed, 11 insertions(+), 13 deletions(-)
|
||||
|
||||
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
|
||||
index df7b37a592..1f51854ccc 100644
|
||||
--- a/drivers/pci/pci-rcar-gen3.c
|
||||
+++ b/drivers/pci/pci-rcar-gen3.c
|
||||
@@ -118,14 +118,6 @@
|
||||
#define RCAR_PCI_MAX_RESOURCES 4
|
||||
#define MAX_NR_INBOUND_MAPS 6
|
||||
|
||||
-#define PCI_EXP_FLAGS 2 /* Capabilities register */
|
||||
-#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
|
||||
-#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
|
||||
-#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
|
||||
-#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
|
||||
-#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
|
||||
-#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
|
||||
-
|
||||
enum {
|
||||
RCAR_PCI_ACCESS_READ,
|
||||
RCAR_PCI_ACCESS_WRITE,
|
||||
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
|
||||
index aa1903e547..9f102c64c6 100644
|
||||
--- a/drivers/pci/pcie_intel_fpga.c
|
||||
+++ b/drivers/pci/pcie_intel_fpga.c
|
||||
@@ -67,9 +67,6 @@
|
||||
#define IS_ROOT_PORT(pcie, bdf) \
|
||||
((PCI_BUS(bdf) == pcie->first_busno) ? true : false)
|
||||
|
||||
-#define PCI_EXP_LNKSTA 18 /* Link Status */
|
||||
-#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
|
||||
-
|
||||
/**
|
||||
* struct intel_fpga_pcie - Intel FPGA PCIe controller state
|
||||
* @bus: Pointer to the PCI bus
|
||||
diff --git a/include/pci.h b/include/pci.h
|
||||
index 19c9244b94..9cd8564436 100644
|
||||
--- a/include/pci.h
|
||||
+++ b/include/pci.h
|
||||
@@ -471,10 +471,19 @@
|
||||
#define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */
|
||||
|
||||
/* PCI Express capabilities */
|
||||
+#define PCI_EXP_FLAGS 2 /* Capabilities register */
|
||||
+#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */
|
||||
+#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */
|
||||
#define PCI_EXP_DEVCAP 4 /* Device capabilities */
|
||||
-#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
|
||||
+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
|
||||
#define PCI_EXP_DEVCTL 8 /* Device Control */
|
||||
-#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
|
||||
+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
|
||||
+#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
|
||||
+#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
|
||||
+#define PCI_EXP_LNKSTA 18 /* Link Status */
|
||||
+#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
|
||||
+#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
|
||||
+#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
|
||||
|
||||
/* Include the ID list */
|
||||
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,33 @@
|
||||
From 5dddca0c2ca5de72b74a5fca0d3ea67251add760 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <5dddca0c2ca5de72b74a5fca0d3ea67251add760.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:54 +0200
|
||||
Subject: [PATCH 05/20] rpi4: shorten a mapping for the DRAM
|
||||
|
||||
Remove the overlap between DRAM and device's IO area.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
arch/arm/mach-bcm283x/init.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
|
||||
index f4d00d892d..f9a5209480 100644
|
||||
--- a/arch/arm/mach-bcm283x/init.c
|
||||
+++ b/arch/arm/mach-bcm283x/init.c
|
||||
@@ -39,7 +39,7 @@ static struct mm_region bcm2711_mem_map[] = {
|
||||
{
|
||||
.virt = 0x00000000UL,
|
||||
.phys = 0x00000000UL,
|
||||
- .size = 0xfe000000UL,
|
||||
+ .size = 0xfc000000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE
|
||||
}, {
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,76 @@
|
||||
From a326f58940f16b2dc3740fd9e87eb485da939ae5 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <a326f58940f16b2dc3740fd9e87eb485da939ae5.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:55 +0200
|
||||
Subject: [PATCH 06/20] rpi4: add a mapping for the PCIe XHCI controller MMIO
|
||||
registers (ARM 64bit)
|
||||
|
||||
Create a non-cacheable mapping for the 0x600000000 physical memory region,
|
||||
where MMIO registers for the PCIe XHCI controller are instantiated by the
|
||||
PCIe bridge.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
arch/arm/mach-bcm283x/init.c | 18 +++++++++++++++---
|
||||
1 file changed, 15 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
|
||||
index f9a5209480..cf4c5b245d 100644
|
||||
--- a/arch/arm/mach-bcm283x/init.c
|
||||
+++ b/arch/arm/mach-bcm283x/init.c
|
||||
@@ -12,10 +12,15 @@
|
||||
#include <dm/device.h>
|
||||
#include <fdt_support.h>
|
||||
|
||||
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS 0x600000000UL
|
||||
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE 0x800000UL
|
||||
+
|
||||
#ifdef CONFIG_ARM64
|
||||
#include <asm/armv8/mmu.h>
|
||||
|
||||
-static struct mm_region bcm283x_mem_map[] = {
|
||||
+#define MEM_MAP_MAX_ENTRIES (4)
|
||||
+
|
||||
+static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
|
||||
{
|
||||
.virt = 0x00000000UL,
|
||||
.phys = 0x00000000UL,
|
||||
@@ -35,7 +40,7 @@ static struct mm_region bcm283x_mem_map[] = {
|
||||
}
|
||||
};
|
||||
|
||||
-static struct mm_region bcm2711_mem_map[] = {
|
||||
+static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
|
||||
{
|
||||
.virt = 0x00000000UL,
|
||||
.phys = 0x00000000UL,
|
||||
@@ -49,6 +54,13 @@ static struct mm_region bcm2711_mem_map[] = {
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
+ }, {
|
||||
+ .virt = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
|
||||
+ .phys = BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
|
||||
+ .size = BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
|
||||
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
+ PTE_BLOCK_NON_SHARE |
|
||||
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* List terminator */
|
||||
0,
|
||||
@@ -72,7 +84,7 @@ static void _rpi_update_mem_map(struct mm_region *pd)
|
||||
{
|
||||
int i;
|
||||
|
||||
- for (i = 0; i < 2; i++) {
|
||||
+ for (i = 0; i < MEM_MAP_MAX_ENTRIES; i++) {
|
||||
mem_map[i].virt = pd[i].virt;
|
||||
mem_map[i].phys = pd[i].phys;
|
||||
mem_map[i].size = pd[i].size;
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,85 @@
|
||||
From 9c761488487ce27517e2a9e425f4ed0777708c53 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <9c761488487ce27517e2a9e425f4ed0777708c53.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 25 May 2020 13:39:56 +0200
|
||||
Subject: [PATCH 07/20] linux/bitfield.h: Add primitives for manipulating
|
||||
bitfields both in host- and fixed-endian
|
||||
|
||||
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
|
||||
an in depth explanation and two fixes from Johannes Berg:
|
||||
e7d4a95da86e0 "bitfield: fix *_encode_bits()",
|
||||
37a3862e12382 "bitfield: add u8 helpers".
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
[s.nawrocki: added empty lines between functions and macros]
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
---
|
||||
include/linux/bitfield.h | 52 ++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 52 insertions(+)
|
||||
|
||||
diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
|
||||
index 8b9d6fff00..7ad8b088ed 100644
|
||||
--- a/include/linux/bitfield.h
|
||||
+++ b/include/linux/bitfield.h
|
||||
@@ -103,4 +103,56 @@
|
||||
(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
|
||||
})
|
||||
|
||||
+extern void __compiletime_error("value doesn't fit into mask")
|
||||
+__field_overflow(void);
|
||||
+extern void __compiletime_error("bad bitfield mask")
|
||||
+__bad_mask(void);
|
||||
+
|
||||
+static __always_inline u64 field_multiplier(u64 field)
|
||||
+{
|
||||
+ if ((field | (field - 1)) & ((field | (field - 1)) + 1))
|
||||
+ __bad_mask();
|
||||
+ return field & -field;
|
||||
+}
|
||||
+
|
||||
+static __always_inline u64 field_mask(u64 field)
|
||||
+{
|
||||
+ return field / field_multiplier(field);
|
||||
+}
|
||||
+
|
||||
+#define ____MAKE_OP(type, base, to, from) \
|
||||
+static __always_inline __##type type##_encode_bits(base v, base field) \
|
||||
+{ \
|
||||
+ if (__builtin_constant_p(v) && (v & ~field_mask(field))) \
|
||||
+ __field_overflow(); \
|
||||
+ return to((v & field_mask(field)) * field_multiplier(field)); \
|
||||
+} \
|
||||
+static __always_inline __##type type##_replace_bits(__##type old, \
|
||||
+ base val, base field) \
|
||||
+{ \
|
||||
+ return (old & ~to(field)) | type##_encode_bits(val, field); \
|
||||
+} \
|
||||
+static __always_inline void type##p_replace_bits(__##type * p, \
|
||||
+ base val, base field) \
|
||||
+{ \
|
||||
+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \
|
||||
+} \
|
||||
+static __always_inline base type##_get_bits(__##type v, base field) \
|
||||
+{ \
|
||||
+ return (from(v) & field) / field_multiplier(field); \
|
||||
+}
|
||||
+
|
||||
+#define __MAKE_OP(size) \
|
||||
+ ____MAKE_OP(le##size, u##size, cpu_to_le##size, le##size##_to_cpu) \
|
||||
+ ____MAKE_OP(be##size, u##size, cpu_to_be##size, be##size##_to_cpu) \
|
||||
+ ____MAKE_OP(u##size, u##size, ,)
|
||||
+
|
||||
+____MAKE_OP(u8, u8, ,)
|
||||
+__MAKE_OP(16)
|
||||
+__MAKE_OP(32)
|
||||
+__MAKE_OP(64)
|
||||
+
|
||||
+#undef __MAKE_OP
|
||||
+#undef ____MAKE_OP
|
||||
+
|
||||
#endif
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,47 @@
|
||||
From 376bd33efa69abfc6102eb5a56b700c0f1981cf4 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <376bd33efa69abfc6102eb5a56b700c0f1981cf4.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:57 +0200
|
||||
Subject: [PATCH 08/20] pci: Add some PCI Express capability register offset
|
||||
definitions
|
||||
|
||||
Add PCI Express capability definitions required by the Broadcom
|
||||
STB PCIe controller driver.
|
||||
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
||||
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
include/pci.h | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/include/pci.h b/include/pci.h
|
||||
index 9cd8564436..281f353916 100644
|
||||
--- a/include/pci.h
|
||||
+++ b/include/pci.h
|
||||
@@ -479,11 +479,20 @@
|
||||
#define PCI_EXP_DEVCTL 8 /* Device Control */
|
||||
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
|
||||
#define PCI_EXP_LNKCAP 12 /* Link Capabilities */
|
||||
+#define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */
|
||||
+#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */
|
||||
#define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */
|
||||
#define PCI_EXP_LNKSTA 18 /* Link Status */
|
||||
+#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
|
||||
+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 /* Current Link Speed 2.5GT/s */
|
||||
+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 /* Current Link Speed 5.0GT/s */
|
||||
+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 /* Current Link Speed 8.0GT/s */
|
||||
+#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */
|
||||
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
|
||||
#define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */
|
||||
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
|
||||
#define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */
|
||||
+#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */
|
||||
|
||||
/* Include the ID list */
|
||||
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,686 @@
|
||||
From 21a9b72b4a28398c9511f3d9e3c1adc1439a8870 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <21a9b72b4a28398c9511f3d9e3c1adc1439a8870.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:58 +0200
|
||||
Subject: [PATCH 09/20] pci: Add driver for Broadcom BCM2711 SoC PCIe
|
||||
controller
|
||||
|
||||
This patch adds basic driver PCI Express controller found on Broadcom
|
||||
set-top-box SoCs, e.g. BCM2711.
|
||||
The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
|
||||
handling removed. The inbound access memory region is not currently
|
||||
parsed from dma-ranges DT property and a fixed 3GB region is used.
|
||||
|
||||
The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
|
||||
USB Host Controller.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
---
|
||||
drivers/pci/Kconfig | 9 +
|
||||
drivers/pci/Makefile | 1 +
|
||||
drivers/pci/pcie_brcmstb.c | 623 +++++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 633 insertions(+)
|
||||
create mode 100644 drivers/pci/pcie_brcmstb.c
|
||||
|
||||
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
|
||||
index 6d8c22aacf..7e1e51d9ea 100644
|
||||
--- a/drivers/pci/Kconfig
|
||||
+++ b/drivers/pci/Kconfig
|
||||
@@ -205,4 +205,13 @@ config PCIE_ROCKCHIP
|
||||
Say Y here if you want to enable PCIe controller support on
|
||||
Rockchip SoCs.
|
||||
|
||||
+config PCI_BRCMSTB
|
||||
+ bool "Broadcom STB PCIe controller"
|
||||
+ depends on DM_PCI
|
||||
+ depends on ARCH_BCM283X
|
||||
+ help
|
||||
+ Say Y here if you want to enable support for PCIe controller
|
||||
+ on Broadcom set-top-box (STB) SoCs.
|
||||
+ This driver currently supports only BCM2711 SoC and RC mode
|
||||
+ of the controller.
|
||||
endif
|
||||
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
|
||||
index 955351c5c2..29092916a6 100644
|
||||
--- a/drivers/pci/Makefile
|
||||
+++ b/drivers/pci/Makefile
|
||||
@@ -44,3 +44,4 @@ obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
|
||||
obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
|
||||
obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
|
||||
obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o
|
||||
+obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o
|
||||
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
|
||||
new file mode 100644
|
||||
index 0000000000..dade79e9c8
|
||||
--- /dev/null
|
||||
+++ b/drivers/pci/pcie_brcmstb.c
|
||||
@@ -0,0 +1,623 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Broadcom STB PCIe controller driver
|
||||
+ *
|
||||
+ * Copyright (C) 2020 Samsung Electronics Co., Ltd.
|
||||
+ *
|
||||
+ * Based on upstream Linux kernel driver:
|
||||
+ * drivers/pci/controller/pcie-brcmstb.c
|
||||
+ * Copyright (C) 2009 - 2017 Broadcom
|
||||
+ *
|
||||
+ * Based driver by Nicolas Saenz Julienne
|
||||
+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
+ */
|
||||
+
|
||||
+#include <common.h>
|
||||
+#include <errno.h>
|
||||
+#include <dm.h>
|
||||
+#include <dm/ofnode.h>
|
||||
+#include <pci.h>
|
||||
+#include <asm/io.h>
|
||||
+#include <linux/bitfield.h>
|
||||
+#include <linux/log2.h>
|
||||
+#include <linux/iopoll.h>
|
||||
+
|
||||
+/* Offset of the mandatory PCIe capability config registers */
|
||||
+#define BRCM_PCIE_CAP_REGS 0x00ac
|
||||
+
|
||||
+/* The PCIe controller register offsets */
|
||||
+#define PCIE_RC_CFG_VENDOR_SPECIFIC_REG1 0x0188
|
||||
+#define VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc
|
||||
+#define VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN 0x0
|
||||
+
|
||||
+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c
|
||||
+#define CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff
|
||||
+
|
||||
+#define PCIE_RC_DL_MDIO_ADDR 0x1100
|
||||
+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104
|
||||
+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108
|
||||
+
|
||||
+#define PCIE_MISC_MISC_CTRL 0x4008
|
||||
+#define MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000
|
||||
+#define MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000
|
||||
+#define MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000
|
||||
+#define MISC_CTRL_MAX_BURST_SIZE_128 0x0
|
||||
+#define MISC_CTRL_SCB0_SIZE_MASK 0xf8000000
|
||||
+
|
||||
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c
|
||||
+#define PCIE_MEM_WIN0_LO(win) \
|
||||
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
|
||||
+
|
||||
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010
|
||||
+#define PCIE_MEM_WIN0_HI(win) \
|
||||
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
|
||||
+
|
||||
+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c
|
||||
+#define RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f
|
||||
+
|
||||
+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034
|
||||
+#define RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f
|
||||
+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038
|
||||
+
|
||||
+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c
|
||||
+#define RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f
|
||||
+
|
||||
+#define PCIE_MISC_PCIE_STATUS 0x4068
|
||||
+#define STATUS_PCIE_PORT_MASK 0x80
|
||||
+#define STATUS_PCIE_PORT_SHIFT 7
|
||||
+#define STATUS_PCIE_DL_ACTIVE_MASK 0x20
|
||||
+#define STATUS_PCIE_DL_ACTIVE_SHIFT 5
|
||||
+#define STATUS_PCIE_PHYLINKUP_MASK 0x10
|
||||
+#define STATUS_PCIE_PHYLINKUP_SHIFT 4
|
||||
+
|
||||
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070
|
||||
+#define MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000
|
||||
+#define MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0
|
||||
+#define MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT 12
|
||||
+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \
|
||||
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4)
|
||||
+
|
||||
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080
|
||||
+#define MEM_WIN0_BASE_HI_BASE_MASK 0xff
|
||||
+#define PCIE_MEM_WIN0_BASE_HI(win) \
|
||||
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8)
|
||||
+
|
||||
+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084
|
||||
+#define PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff
|
||||
+#define PCIE_MEM_WIN0_LIMIT_HI(win) \
|
||||
+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
|
||||
+
|
||||
+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204
|
||||
+#define PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2
|
||||
+#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000
|
||||
+
|
||||
+#define PCIE_MSI_INTR2_CLR 0x4508
|
||||
+#define PCIE_MSI_INTR2_MASK_SET 0x4510
|
||||
+
|
||||
+#define PCIE_EXT_CFG_DATA 0x8000
|
||||
+
|
||||
+#define PCIE_EXT_CFG_INDEX 0x9000
|
||||
+#define PCIE_EXT_BUSNUM_SHIFT 20
|
||||
+#define PCIE_EXT_SLOT_SHIFT 15
|
||||
+#define PCIE_EXT_FUNC_SHIFT 12
|
||||
+
|
||||
+#define PCIE_RGR1_SW_INIT_1 0x9210
|
||||
+#define RGR1_SW_INIT_1_PERST_MASK 0x1
|
||||
+#define RGR1_SW_INIT_1_INIT_MASK 0x2
|
||||
+
|
||||
+/* PCIe parameters */
|
||||
+#define BRCM_NUM_PCIE_OUT_WINS 4
|
||||
+
|
||||
+/* MDIO registers */
|
||||
+#define MDIO_PORT0 0x0
|
||||
+#define MDIO_DATA_MASK 0x7fffffff
|
||||
+#define MDIO_DATA_SHIFT 0
|
||||
+#define MDIO_PORT_MASK 0xf0000
|
||||
+#define MDIO_PORT_SHIFT 16
|
||||
+#define MDIO_REGAD_MASK 0xffff
|
||||
+#define MDIO_REGAD_SHIFT 0
|
||||
+#define MDIO_CMD_MASK 0xfff00000
|
||||
+#define MDIO_CMD_SHIFT 20
|
||||
+#define MDIO_CMD_READ 0x1
|
||||
+#define MDIO_CMD_WRITE 0x0
|
||||
+#define MDIO_DATA_DONE_MASK 0x80000000
|
||||
+#define SSC_REGS_ADDR 0x1100
|
||||
+#define SET_ADDR_OFFSET 0x1f
|
||||
+#define SSC_CNTL_OFFSET 0x2
|
||||
+#define SSC_CNTL_OVRD_EN_MASK 0x8000
|
||||
+#define SSC_CNTL_OVRD_VAL_MASK 0x4000
|
||||
+#define SSC_STATUS_OFFSET 0x1
|
||||
+#define SSC_STATUS_SSC_MASK 0x400
|
||||
+#define SSC_STATUS_SSC_SHIFT 10
|
||||
+#define SSC_STATUS_PLL_LOCK_MASK 0x800
|
||||
+#define SSC_STATUS_PLL_LOCK_SHIFT 11
|
||||
+
|
||||
+/**
|
||||
+ * struct brcm_pcie - the PCIe controller state
|
||||
+ * @base: Base address of memory mapped IO registers of the controller
|
||||
+ * @gen: Non-zero value indicates limitation of the PCIe controller operation
|
||||
+ * to a specific generation (1, 2 or 3)
|
||||
+ * @ssc: true indicates active Spread Spectrum Clocking operation
|
||||
+ */
|
||||
+struct brcm_pcie {
|
||||
+ void __iomem *base;
|
||||
+
|
||||
+ int gen;
|
||||
+ bool ssc;
|
||||
+};
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_encode_ibar_size() - Encode the inbound "BAR" region size
|
||||
+ * @size: The inbound region size
|
||||
+ *
|
||||
+ * This function converts size of the inbound "BAR" region to the non-linear
|
||||
+ * values of the PCIE_MISC_RC_BAR[123]_CONFIG_LO register SIZE field.
|
||||
+ *
|
||||
+ * Return: The encoded inbound region size
|
||||
+ */
|
||||
+static int brcm_pcie_encode_ibar_size(u64 size)
|
||||
+{
|
||||
+ int log2_in = ilog2(size);
|
||||
+
|
||||
+ if (log2_in >= 12 && log2_in <= 15)
|
||||
+ /* Covers 4KB to 32KB (inclusive) */
|
||||
+ return (log2_in - 12) + 0x1c;
|
||||
+ else if (log2_in >= 16 && log2_in <= 37)
|
||||
+ /* Covers 64KB to 32GB, (inclusive) */
|
||||
+ return log2_in - 15;
|
||||
+
|
||||
+ /* Something is awry so disable */
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_rc_mode() - Check if PCIe controller is in RC mode
|
||||
+ * @pcie: Pointer to the PCIe controller state
|
||||
+ *
|
||||
+ * The controller is capable of serving in both RC and EP roles.
|
||||
+ *
|
||||
+ * Return: true for RC mode, false for EP mode.
|
||||
+ */
|
||||
+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie)
|
||||
+{
|
||||
+ u32 val;
|
||||
+
|
||||
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
|
||||
+
|
||||
+ return (val & STATUS_PCIE_PORT_MASK) >> STATUS_PCIE_PORT_SHIFT;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_link_up() - Check whether the PCIe link is up
|
||||
+ * @pcie: Pointer to the PCIe controller state
|
||||
+ *
|
||||
+ * Return: true if the link is up, false otherwise.
|
||||
+ */
|
||||
+static bool brcm_pcie_link_up(struct brcm_pcie *pcie)
|
||||
+{
|
||||
+ u32 val, dla, plu;
|
||||
+
|
||||
+ val = readl(pcie->base + PCIE_MISC_PCIE_STATUS);
|
||||
+ dla = (val & STATUS_PCIE_DL_ACTIVE_MASK) >> STATUS_PCIE_DL_ACTIVE_SHIFT;
|
||||
+ plu = (val & STATUS_PCIE_PHYLINKUP_MASK) >> STATUS_PCIE_PHYLINKUP_SHIFT;
|
||||
+
|
||||
+ return dla && plu;
|
||||
+}
|
||||
+
|
||||
+static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf,
|
||||
+ uint offset, void **paddress)
|
||||
+{
|
||||
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||
+ unsigned int pci_bus = PCI_BUS(bdf);
|
||||
+ unsigned int pci_dev = PCI_DEV(bdf);
|
||||
+ unsigned int pci_func = PCI_FUNC(bdf);
|
||||
+ int idx;
|
||||
+
|
||||
+ /*
|
||||
+ * Busses 0 (host PCIe bridge) and 1 (its immediate child)
|
||||
+ * are limited to a single device each
|
||||
+ */
|
||||
+ if (pci_bus < 2 && pci_dev > 0)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ /* Accesses to the RC go right to the RC registers */
|
||||
+ if (pci_bus == 0) {
|
||||
+ *paddress = pcie->base + offset;
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ /* For devices, write to the config space index register */
|
||||
+ idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT)
|
||||
+ | (pci_dev << PCIE_EXT_SLOT_SHIFT)
|
||||
+ | (pci_func << PCIE_EXT_FUNC_SHIFT);
|
||||
+
|
||||
+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX);
|
||||
+ *paddress = pcie->base + PCIE_EXT_CFG_DATA + offset;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int brcm_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
|
||||
+ uint offset, ulong *valuep,
|
||||
+ enum pci_size_t size)
|
||||
+{
|
||||
+ return pci_generic_mmap_read_config(bus, brcm_pcie_config_address,
|
||||
+ bdf, offset, valuep, size);
|
||||
+}
|
||||
+
|
||||
+static int brcm_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
|
||||
+ uint offset, ulong value,
|
||||
+ enum pci_size_t size)
|
||||
+{
|
||||
+ return pci_generic_mmap_write_config(bus, brcm_pcie_config_address,
|
||||
+ bdf, offset, value, size);
|
||||
+}
|
||||
+
|
||||
+static const char *link_speed_to_str(unsigned int cls)
|
||||
+{
|
||||
+ switch (cls) {
|
||||
+ case PCI_EXP_LNKSTA_CLS_2_5GB: return "2.5";
|
||||
+ case PCI_EXP_LNKSTA_CLS_5_0GB: return "5.0";
|
||||
+ case PCI_EXP_LNKSTA_CLS_8_0GB: return "8.0";
|
||||
+ default:
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ return "??";
|
||||
+}
|
||||
+
|
||||
+static u32 brcm_pcie_mdio_form_pkt(unsigned int port, unsigned int regad,
|
||||
+ unsigned int cmd)
|
||||
+{
|
||||
+ u32 pkt;
|
||||
+
|
||||
+ pkt = (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK;
|
||||
+ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK;
|
||||
+ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK;
|
||||
+
|
||||
+ return pkt;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_mdio_read() - Perform a register read on the internal MDIO bus
|
||||
+ * @base: Pointer to the PCIe controller IO registers
|
||||
+ * @port: The MDIO port number
|
||||
+ * @regad: The register address
|
||||
+ * @val: A pointer at which to store the read value
|
||||
+ *
|
||||
+ * Return: 0 on success and register value in @val, negative error value
|
||||
+ * on failure.
|
||||
+ */
|
||||
+static int brcm_pcie_mdio_read(void __iomem *base, unsigned int port,
|
||||
+ unsigned int regad, u32 *val)
|
||||
+{
|
||||
+ u32 data, addr;
|
||||
+ int ret;
|
||||
+
|
||||
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ);
|
||||
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
|
||||
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
|
||||
+
|
||||
+ ret = readl_poll_timeout(base + PCIE_RC_DL_MDIO_RD_DATA, data,
|
||||
+ (data & MDIO_DATA_DONE_MASK), 100);
|
||||
+
|
||||
+ *val = data & MDIO_DATA_MASK;
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_mdio_write() - Perform a register write on the internal MDIO bus
|
||||
+ * @base: Pointer to the PCIe controller IO registers
|
||||
+ * @port: The MDIO port number
|
||||
+ * @regad: Address of the register
|
||||
+ * @wrdata: The value to write
|
||||
+ *
|
||||
+ * Return: 0 on success, negative error value on failure.
|
||||
+ */
|
||||
+static int brcm_pcie_mdio_write(void __iomem *base, unsigned int port,
|
||||
+ unsigned int regad, u16 wrdata)
|
||||
+{
|
||||
+ u32 data, addr;
|
||||
+
|
||||
+ addr = brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE);
|
||||
+ writel(addr, base + PCIE_RC_DL_MDIO_ADDR);
|
||||
+ readl(base + PCIE_RC_DL_MDIO_ADDR);
|
||||
+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA);
|
||||
+
|
||||
+ return readl_poll_timeout(base + PCIE_RC_DL_MDIO_WR_DATA, data,
|
||||
+ !(data & MDIO_DATA_DONE_MASK), 100);
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_set_ssc() - Configure the controller for Spread Spectrum Clocking
|
||||
+ * @base: pointer to the PCIe controller IO registers
|
||||
+ *
|
||||
+ * Return: 0 on success, negative error value on failure.
|
||||
+ */
|
||||
+static int brcm_pcie_set_ssc(void __iomem *base)
|
||||
+{
|
||||
+ int pll, ssc;
|
||||
+ int ret;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET,
|
||||
+ SSC_REGS_ADDR);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET, &tmp);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ tmp |= (SSC_CNTL_OVRD_EN_MASK | SSC_CNTL_OVRD_VAL_MASK);
|
||||
+
|
||||
+ ret = brcm_pcie_mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, tmp);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ udelay(1000);
|
||||
+ ret = brcm_pcie_mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET, &tmp);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ssc = (tmp & SSC_STATUS_SSC_MASK) >> SSC_STATUS_SSC_SHIFT;
|
||||
+ pll = (tmp & SSC_STATUS_PLL_LOCK_MASK) >> SSC_STATUS_PLL_LOCK_SHIFT;
|
||||
+
|
||||
+ return ssc && pll ? 0 : -EIO;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * brcm_pcie_set_gen() - Limits operation to a specific generation (1, 2 or 3)
|
||||
+ * @pcie: pointer to the PCIe controller state
|
||||
+ * @gen: PCIe generation to limit the controller's operation to
|
||||
+ */
|
||||
+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, unsigned int gen)
|
||||
+{
|
||||
+ void __iomem *cap_base = pcie->base + BRCM_PCIE_CAP_REGS;
|
||||
+
|
||||
+ u16 lnkctl2 = readw(cap_base + PCI_EXP_LNKCTL2);
|
||||
+ u32 lnkcap = readl(cap_base + PCI_EXP_LNKCAP);
|
||||
+
|
||||
+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen;
|
||||
+ writel(lnkcap, cap_base + PCI_EXP_LNKCAP);
|
||||
+
|
||||
+ lnkctl2 = (lnkctl2 & ~0xf) | gen;
|
||||
+ writew(lnkctl2, cap_base + PCI_EXP_LNKCTL2);
|
||||
+}
|
||||
+
|
||||
+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie,
|
||||
+ unsigned int win, u64 phys_addr,
|
||||
+ u64 pcie_addr, u64 size)
|
||||
+{
|
||||
+ void __iomem *base = pcie->base;
|
||||
+ u32 phys_addr_mb_high, limit_addr_mb_high;
|
||||
+ phys_addr_t phys_addr_mb, limit_addr_mb;
|
||||
+ int high_addr_shift;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ /* Set the base of the pcie_addr window */
|
||||
+ writel(lower_32_bits(pcie_addr), base + PCIE_MEM_WIN0_LO(win));
|
||||
+ writel(upper_32_bits(pcie_addr), base + PCIE_MEM_WIN0_HI(win));
|
||||
+
|
||||
+ /* Write the addr base & limit lower bits (in MBs) */
|
||||
+ phys_addr_mb = phys_addr / SZ_1M;
|
||||
+ limit_addr_mb = (phys_addr + size - 1) / SZ_1M;
|
||||
+
|
||||
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_LIMIT(win));
|
||||
+ u32p_replace_bits(&tmp, phys_addr_mb,
|
||||
+ MEM_WIN0_BASE_LIMIT_BASE_MASK);
|
||||
+ u32p_replace_bits(&tmp, limit_addr_mb,
|
||||
+ MEM_WIN0_BASE_LIMIT_LIMIT_MASK);
|
||||
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_LIMIT(win));
|
||||
+
|
||||
+ /* Write the cpu & limit addr upper bits */
|
||||
+ high_addr_shift = MEM_WIN0_BASE_LIMIT_BASE_HI_SHIFT;
|
||||
+ phys_addr_mb_high = phys_addr_mb >> high_addr_shift;
|
||||
+ tmp = readl(base + PCIE_MEM_WIN0_BASE_HI(win));
|
||||
+ u32p_replace_bits(&tmp, phys_addr_mb_high,
|
||||
+ MEM_WIN0_BASE_HI_BASE_MASK);
|
||||
+ writel(tmp, base + PCIE_MEM_WIN0_BASE_HI(win));
|
||||
+
|
||||
+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift;
|
||||
+ tmp = readl(base + PCIE_MEM_WIN0_LIMIT_HI(win));
|
||||
+ u32p_replace_bits(&tmp, limit_addr_mb_high,
|
||||
+ PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK);
|
||||
+ writel(tmp, base + PCIE_MEM_WIN0_LIMIT_HI(win));
|
||||
+}
|
||||
+
|
||||
+static int brcm_pcie_probe(struct udevice *dev)
|
||||
+{
|
||||
+ struct udevice *ctlr = pci_get_controller(dev);
|
||||
+ struct pci_controller *hose = dev_get_uclass_priv(ctlr);
|
||||
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||
+ void __iomem *base = pcie->base;
|
||||
+ bool ssc_good = false;
|
||||
+ int num_out_wins = 0;
|
||||
+ u64 rc_bar2_offset, rc_bar2_size;
|
||||
+ unsigned int scb_size_val;
|
||||
+ int i, ret;
|
||||
+ u16 nlw, cls, lnksta;
|
||||
+ u32 tmp;
|
||||
+
|
||||
+ /*
|
||||
+ * Reset the bridge, assert the fundamental reset. Note for some SoCs,
|
||||
+ * e.g. BCM7278, the fundamental reset should not be asserted here.
|
||||
+ * This will need to be changed when support for other SoCs is added.
|
||||
+ */
|
||||
+ setbits_le32(base + PCIE_RGR1_SW_INIT_1,
|
||||
+ RGR1_SW_INIT_1_INIT_MASK | RGR1_SW_INIT_1_PERST_MASK);
|
||||
+ /*
|
||||
+ * The delay is a safety precaution to preclude the reset signal
|
||||
+ * from looking like a glitch.
|
||||
+ */
|
||||
+ udelay(100);
|
||||
+
|
||||
+ /* Take the bridge out of reset */
|
||||
+ clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
|
||||
+
|
||||
+ clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
|
||||
+ PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
|
||||
+
|
||||
+ /* Wait for SerDes to be stable */
|
||||
+ udelay(100);
|
||||
+
|
||||
+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
|
||||
+ clrsetbits_le32(base + PCIE_MISC_MISC_CTRL,
|
||||
+ MISC_CTRL_MAX_BURST_SIZE_MASK,
|
||||
+ MISC_CTRL_SCB_ACCESS_EN_MASK |
|
||||
+ MISC_CTRL_CFG_READ_UR_MODE_MASK |
|
||||
+ MISC_CTRL_MAX_BURST_SIZE_128);
|
||||
+ /*
|
||||
+ * TODO: When support for other SoCs than BCM2711 is added we may
|
||||
+ * need to use the base address and size(s) provided in the dma-ranges
|
||||
+ * property.
|
||||
+ */
|
||||
+ rc_bar2_offset = 0;
|
||||
+ rc_bar2_size = 0xc0000000;
|
||||
+
|
||||
+ tmp = lower_32_bits(rc_bar2_offset);
|
||||
+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size),
|
||||
+ RC_BAR2_CONFIG_LO_SIZE_MASK);
|
||||
+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO);
|
||||
+ writel(upper_32_bits(rc_bar2_offset),
|
||||
+ base + PCIE_MISC_RC_BAR2_CONFIG_HI);
|
||||
+
|
||||
+ scb_size_val = rc_bar2_size ?
|
||||
+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */
|
||||
+
|
||||
+ tmp = readl(base + PCIE_MISC_MISC_CTRL);
|
||||
+ u32p_replace_bits(&tmp, scb_size_val,
|
||||
+ MISC_CTRL_SCB0_SIZE_MASK);
|
||||
+ writel(tmp, base + PCIE_MISC_MISC_CTRL);
|
||||
+
|
||||
+ /* Disable the PCIe->GISB memory window (RC_BAR1) */
|
||||
+ clrbits_le32(base + PCIE_MISC_RC_BAR1_CONFIG_LO,
|
||||
+ RC_BAR1_CONFIG_LO_SIZE_MASK);
|
||||
+
|
||||
+ /* Disable the PCIe->SCB memory window (RC_BAR3) */
|
||||
+ clrbits_le32(base + PCIE_MISC_RC_BAR3_CONFIG_LO,
|
||||
+ RC_BAR3_CONFIG_LO_SIZE_MASK);
|
||||
+
|
||||
+ /* Mask all interrupts since we are not handling any yet */
|
||||
+ writel(0xffffffff, base + PCIE_MSI_INTR2_MASK_SET);
|
||||
+
|
||||
+ /* Clear any interrupts we find on boot */
|
||||
+ writel(0xffffffff, base + PCIE_MSI_INTR2_CLR);
|
||||
+
|
||||
+ if (pcie->gen)
|
||||
+ brcm_pcie_set_gen(pcie, pcie->gen);
|
||||
+
|
||||
+ /* Unassert the fundamental reset */
|
||||
+ clrbits_le32(pcie->base + PCIE_RGR1_SW_INIT_1,
|
||||
+ RGR1_SW_INIT_1_PERST_MASK);
|
||||
+
|
||||
+ /* Give the RC/EP time to wake up, before trying to configure RC.
|
||||
+ * Intermittently check status for link-up, up to a total of 100ms.
|
||||
+ */
|
||||
+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5)
|
||||
+ mdelay(5);
|
||||
+
|
||||
+ if (!brcm_pcie_link_up(pcie)) {
|
||||
+ printf("PCIe BRCM: link down\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ if (!brcm_pcie_rc_mode(pcie)) {
|
||||
+ printf("PCIe misconfigured; is in EP mode\n");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < hose->region_count; i++) {
|
||||
+ struct pci_region *reg = &hose->regions[i];
|
||||
+
|
||||
+ if (reg->flags != PCI_REGION_MEM)
|
||||
+ continue;
|
||||
+
|
||||
+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ brcm_pcie_set_outbound_win(pcie, num_out_wins, reg->phys_start,
|
||||
+ reg->bus_start, reg->size);
|
||||
+
|
||||
+ num_out_wins++;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * For config space accesses on the RC, show the right class for
|
||||
+ * a PCIe-PCIe bridge (the default setting is to be EP mode).
|
||||
+ */
|
||||
+ clrsetbits_le32(base + PCIE_RC_CFG_PRIV1_ID_VAL3,
|
||||
+ CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK, 0x060400);
|
||||
+
|
||||
+ if (pcie->ssc) {
|
||||
+ ret = brcm_pcie_set_ssc(pcie->base);
|
||||
+ if (!ret)
|
||||
+ ssc_good = true;
|
||||
+ else
|
||||
+ printf("PCIe BRCM: failed attempt to enter SSC mode\n");
|
||||
+ }
|
||||
+
|
||||
+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA);
|
||||
+ cls = lnksta & PCI_EXP_LNKSTA_CLS;
|
||||
+ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
|
||||
+
|
||||
+ printf("PCIe BRCM: link up, %s Gbps x%u %s\n", link_speed_to_str(cls),
|
||||
+ nlw, ssc_good ? "(SSC)" : "(!SSC)");
|
||||
+
|
||||
+ /* PCIe->SCB endian mode for BAR */
|
||||
+ clrsetbits_le32(base + PCIE_RC_CFG_VENDOR_SPECIFIC_REG1,
|
||||
+ VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK,
|
||||
+ VENDOR_SPECIFIC_REG1_LITTLE_ENDIAN);
|
||||
+ /*
|
||||
+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1
|
||||
+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1.
|
||||
+ */
|
||||
+ setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
|
||||
+ PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int brcm_pcie_ofdata_to_platdata(struct udevice *dev)
|
||||
+{
|
||||
+ struct brcm_pcie *pcie = dev_get_priv(dev);
|
||||
+ ofnode dn = dev_ofnode(dev);
|
||||
+ u32 max_link_speed;
|
||||
+ int ret;
|
||||
+
|
||||
+ /* Get the controller base address */
|
||||
+ pcie->base = dev_read_addr_ptr(dev);
|
||||
+ if (!pcie->base)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
|
||||
+
|
||||
+ ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
|
||||
+ if (ret < 0 || max_link_speed > 4)
|
||||
+ pcie->gen = 0;
|
||||
+ else
|
||||
+ pcie->gen = max_link_speed;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct dm_pci_ops brcm_pcie_ops = {
|
||||
+ .read_config = brcm_pcie_read_config,
|
||||
+ .write_config = brcm_pcie_write_config,
|
||||
+};
|
||||
+
|
||||
+static const struct udevice_id brcm_pcie_ids[] = {
|
||||
+ { .compatible = "brcm,bcm2711-pcie" },
|
||||
+ { }
|
||||
+};
|
||||
+
|
||||
+U_BOOT_DRIVER(pcie_brcm_base) = {
|
||||
+ .name = "pcie_brcm",
|
||||
+ .id = UCLASS_PCI,
|
||||
+ .ops = &brcm_pcie_ops,
|
||||
+ .of_match = brcm_pcie_ids,
|
||||
+ .probe = brcm_pcie_probe,
|
||||
+ .ofdata_to_platdata = brcm_pcie_ofdata_to_platdata,
|
||||
+ .priv_auto_alloc_size = sizeof(struct brcm_pcie),
|
||||
+};
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,102 @@
|
||||
From 66537b5984af81b5add420df9eb64c508268f581 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <66537b5984af81b5add420df9eb64c508268f581.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Mon, 25 May 2020 13:39:59 +0200
|
||||
Subject: [PATCH 10/20] configs: Enable support for the XHCI controller on RPI4
|
||||
board (ARM 64-bit)
|
||||
|
||||
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
|
||||
and USB commands. To get it working one has to call the following commands:
|
||||
"pci enum; usb start;", thus such commands have been added to the default
|
||||
"preboot" environment variable. One has to update their environment if it
|
||||
is already configured to get this feature working out of the box.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
---
|
||||
configs/rpi_4_defconfig | 9 +++++++++
|
||||
configs/rpi_arm64_defconfig | 8 +++++++-
|
||||
2 files changed, 16 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
|
||||
index f0301dc8bc..b42efe6072 100644
|
||||
--- a/configs/rpi_4_defconfig
|
||||
+++ b/configs/rpi_4_defconfig
|
||||
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_USE_PREBOOT=y
|
||||
+CONFIG_PREBOOT="pci enum; usb start;"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_PCI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_FS_UUID=y
|
||||
CONFIG_OF_BOARD=y
|
||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||
@@ -26,12 +30,17 @@ CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_BCM2835=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_BCMGENET=y
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_DM_PCI=y
|
||||
+CONFIG_PCI_BRCMSTB=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="FSL"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
|
||||
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
|
||||
index d16c2388af..0feea7f0be 100644
|
||||
--- a/configs/rpi_arm64_defconfig
|
||||
+++ b/configs/rpi_arm64_defconfig
|
||||
@@ -7,13 +7,14 @@ CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_USE_PREBOOT=y
|
||||
-CONFIG_PREBOOT="usb start"
|
||||
+CONFIG_PREBOOT="pci enum; usb start;"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_SYS_PROMPT="U-Boot> "
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_FS_UUID=y
|
||||
CONFIG_OF_BOARD=y
|
||||
@@ -26,11 +27,16 @@ CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_BCM2835=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_BCMGENET=y
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_DM_PCI=y
|
||||
+CONFIG_PCI_BRCMSTB=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_USB_HOST_ETHER=y
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,131 @@
|
||||
From 2899e2cbe5412ee6f6a01855467fa37534ffc2be Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <2899e2cbe5412ee6f6a01855467fa37534ffc2be.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:37:22 +0200
|
||||
Subject: [PATCH 11/20] arm: rpi: Add function to trigger VL805's firmware load
|
||||
|
||||
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
|
||||
may either be loaded directly from an EEPROM or, if not present, by the
|
||||
SoC's VideCore (the SoC's co-processor). Introduce the function that
|
||||
informs VideCore that VL805 may need its firmware loaded.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
arch/arm/mach-bcm283x/include/mach/mbox.h | 13 +++++++
|
||||
arch/arm/mach-bcm283x/include/mach/msg.h | 7 ++++
|
||||
arch/arm/mach-bcm283x/msg.c | 46 +++++++++++++++++++++++
|
||||
3 files changed, 66 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
index 60e226ce1d..2ae2d3d97c 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
|
||||
@@ -491,6 +491,19 @@ struct bcm2835_mbox_tag_set_palette {
|
||||
} body;
|
||||
};
|
||||
|
||||
+#define BCM2835_MBOX_TAG_NOTIFY_XHCI_RESET 0x00030058
|
||||
+
|
||||
+struct bcm2835_mbox_tag_pci_dev_addr {
|
||||
+ struct bcm2835_mbox_tag_hdr tag_hdr;
|
||||
+ union {
|
||||
+ struct {
|
||||
+ u32 dev_addr;
|
||||
+ } req;
|
||||
+ struct {
|
||||
+ } resp;
|
||||
+ } body;
|
||||
+};
|
||||
+
|
||||
/*
|
||||
* Pass a raw u32 message to the VC, and receive a raw u32 back.
|
||||
*
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/msg.h b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
index 4afb08631b..e45c1bf010 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/msg.h
|
||||
@@ -48,4 +48,11 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
|
||||
int pixel_order, int alpha_mode, ulong *fb_basep,
|
||||
ulong *fb_sizep, int *pitchp);
|
||||
|
||||
+/**
|
||||
+ * bcm2711_load_vl805_firmware() - get vl805's firmware loaded
|
||||
+ *
|
||||
+ * @return 0 if OK, -EIO on error
|
||||
+ */
|
||||
+int bcm2711_notify_vl805_reset(void);
|
||||
+
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
|
||||
index 94b75283f8..347aece3cd 100644
|
||||
--- a/arch/arm/mach-bcm283x/msg.c
|
||||
+++ b/arch/arm/mach-bcm283x/msg.c
|
||||
@@ -7,6 +7,7 @@
|
||||
#include <memalign.h>
|
||||
#include <phys2bus.h>
|
||||
#include <asm/arch/mbox.h>
|
||||
+#include <linux/delay.h>
|
||||
|
||||
struct msg_set_power_state {
|
||||
struct bcm2835_mbox_hdr hdr;
|
||||
@@ -40,6 +41,12 @@ struct msg_setup {
|
||||
u32 end_tag;
|
||||
};
|
||||
|
||||
+struct msg_notify_vl805_reset {
|
||||
+ struct bcm2835_mbox_hdr hdr;
|
||||
+ struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
|
||||
+ u32 end_tag;
|
||||
+};
|
||||
+
|
||||
int bcm2835_power_on_module(u32 module)
|
||||
{
|
||||
ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
|
||||
@@ -151,3 +158,42 @@ int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
|
||||
|
||||
return 0;
|
||||
}
|
||||
+
|
||||
+/*
|
||||
+ * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
|
||||
+ * may either be loaded directly from an EEPROM or, if not present, by the
|
||||
+ * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
|
||||
+ * loaded.
|
||||
+ */
|
||||
+int bcm2711_notify_vl805_reset(void)
|
||||
+{
|
||||
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
|
||||
+ msg_notify_vl805_reset, 1);
|
||||
+ int ret;
|
||||
+
|
||||
+ BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
|
||||
+ BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
|
||||
+ NOTIFY_XHCI_RESET);
|
||||
+
|
||||
+ /*
|
||||
+ * The pci device address is expected like this:
|
||||
+ *
|
||||
+ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
|
||||
+ *
|
||||
+ * But since RPi4's PCIe setup is hardwired, we know the address in
|
||||
+ * advance.
|
||||
+ */
|
||||
+ msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
|
||||
+
|
||||
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
|
||||
+ &msg_notify_vl805_reset->hdr);
|
||||
+ if (ret) {
|
||||
+ printf("bcm2711: Faild to load vl805's firmware, %d\n", ret);
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ udelay(200);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,140 @@
|
||||
From e9925f97c2c31253e1ff62de4049d90e19884f55 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <e9925f97c2c31253e1ff62de4049d90e19884f55.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:37:23 +0200
|
||||
Subject: [PATCH 12/20] reset: Add Raspberry Pi 4 firmware reset controller
|
||||
|
||||
Raspberry Pi 4's co-processor controls some of the board's HW
|
||||
initialization process, but it's up to Linux to trigger it when
|
||||
relevant. Introduce a reset controller capable of interfacing with
|
||||
RPi4's co-processor that models these firmware initialization routines as
|
||||
reset lines.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
drivers/reset/Kconfig | 10 ++++
|
||||
drivers/reset/Makefile | 1 +
|
||||
drivers/reset/reset-raspberrypi.c | 60 +++++++++++++++++++
|
||||
.../reset/raspberrypi,firmware-reset.h | 13 ++++
|
||||
4 files changed, 84 insertions(+)
|
||||
create mode 100644 drivers/reset/reset-raspberrypi.c
|
||||
create mode 100644 include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
|
||||
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
|
||||
index 88d3be1593..d02c1522e5 100644
|
||||
--- a/drivers/reset/Kconfig
|
||||
+++ b/drivers/reset/Kconfig
|
||||
@@ -148,4 +148,14 @@ config RESET_IMX7
|
||||
help
|
||||
Support for reset controller on i.MX7/8 SoCs.
|
||||
|
||||
+config RESET_RASPBERRYPI
|
||||
+ bool "Raspberry Pi 4 Firmware Reset Controller Driver"
|
||||
+ depends on DM_RESET && ARCH_BCM283X
|
||||
+ default USB_XHCI_PCI
|
||||
+ help
|
||||
+ Raspberry Pi 4's co-processor controls some of the board's HW
|
||||
+ initialization process, but it's up to Linux to trigger it when
|
||||
+ relevant. This driver provides a reset controller capable of
|
||||
+ interfacing with RPi4's co-processor and model these firmware
|
||||
+ initialization routines as reset lines.
|
||||
endmenu
|
||||
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
|
||||
index 0a044d5d8c..be54dae725 100644
|
||||
--- a/drivers/reset/Makefile
|
||||
+++ b/drivers/reset/Makefile
|
||||
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
|
||||
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
|
||||
obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
|
||||
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
|
||||
+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
|
||||
diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c
|
||||
new file mode 100644
|
||||
index 0000000000..e2d284e5ac
|
||||
--- /dev/null
|
||||
+++ b/drivers/reset/reset-raspberrypi.c
|
||||
@@ -0,0 +1,60 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Raspberry Pi 4 firmware reset driver
|
||||
+ *
|
||||
+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
+ */
|
||||
+#include <common.h>
|
||||
+#include <dm.h>
|
||||
+#include <reset-uclass.h>
|
||||
+#include <asm/arch/msg.h>
|
||||
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
|
||||
+
|
||||
+static int raspberrypi_reset_request(struct reset_ctl *reset_ctl)
|
||||
+{
|
||||
+ if (reset_ctl->id >= RASPBERRYPI_FIRMWARE_RESET_NUM_IDS)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int raspberrypi_reset_free(struct reset_ctl *reset_ctl)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int raspberrypi_reset_assert(struct reset_ctl *reset_ctl)
|
||||
+{
|
||||
+ switch (reset_ctl->id) {
|
||||
+ case RASPBERRYPI_FIRMWARE_RESET_ID_USB:
|
||||
+ bcm2711_notify_vl805_reset();
|
||||
+ return 0;
|
||||
+ default:
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int raspberrypi_reset_deassert(struct reset_ctl *reset_ctl)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+struct reset_ops raspberrypi_reset_ops = {
|
||||
+ .request = raspberrypi_reset_request,
|
||||
+ .rfree = raspberrypi_reset_free,
|
||||
+ .rst_assert = raspberrypi_reset_assert,
|
||||
+ .rst_deassert = raspberrypi_reset_deassert,
|
||||
+};
|
||||
+
|
||||
+static const struct udevice_id raspberrypi_reset_ids[] = {
|
||||
+ { .compatible = "raspberrypi,firmware-reset" },
|
||||
+ { }
|
||||
+};
|
||||
+
|
||||
+U_BOOT_DRIVER(raspberrypi_reset) = {
|
||||
+ .name = "raspberrypi-reset",
|
||||
+ .id = UCLASS_RESET,
|
||||
+ .of_match = raspberrypi_reset_ids,
|
||||
+ .ops = &raspberrypi_reset_ops,
|
||||
+};
|
||||
+
|
||||
diff --git a/include/dt-bindings/reset/raspberrypi,firmware-reset.h b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
new file mode 100644
|
||||
index 0000000000..1a4f4c7927
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/reset/raspberrypi,firmware-reset.h
|
||||
@@ -0,0 +1,13 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0 */
|
||||
+/*
|
||||
+ * Copyright (c) 2020 Nicolas Saenz Julienne
|
||||
+ * Author: Nicolas Saenz Julienne <nsaenzjulienne@suse.com>
|
||||
+ */
|
||||
+
|
||||
+#ifndef _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||
+#define _DT_BINDINGS_RASPBERRYPI_FIRMWARE_RESET_H
|
||||
+
|
||||
+#define RASPBERRYPI_FIRMWARE_RESET_ID_USB 0
|
||||
+#define RASPBERRYPI_FIRMWARE_RESET_NUM_IDS 1
|
||||
+
|
||||
+#endif
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,57 @@
|
||||
From d32b13ba58aa59a5ec0b71cfc2005bf1efd84ddf Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <d32b13ba58aa59a5ec0b71cfc2005bf1efd84ddf.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:37:24 +0200
|
||||
Subject: [PATCH 13/20] configs: Enable support for reset controllers on RPi4
|
||||
|
||||
This is required in order to access the reset controller used to
|
||||
initialize the board's xHCI chip.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
configs/rpi_4_32b_defconfig | 1 +
|
||||
configs/rpi_4_defconfig | 1 +
|
||||
configs/rpi_arm64_defconfig | 1 +
|
||||
3 files changed, 3 insertions(+)
|
||||
|
||||
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
|
||||
index a36a249540..0df5c17d6e 100644
|
||||
--- a/configs/rpi_4_32b_defconfig
|
||||
+++ b/configs/rpi_4_32b_defconfig
|
||||
@@ -28,6 +28,7 @@ CONFIG_DM_ETH=y
|
||||
CONFIG_BCMGENET=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
+CONFIG_DM_RESET=y
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
|
||||
index b42efe6072..f641ad3dfa 100644
|
||||
--- a/configs/rpi_4_defconfig
|
||||
+++ b/configs/rpi_4_defconfig
|
||||
@@ -35,6 +35,7 @@ CONFIG_DM_PCI=y
|
||||
CONFIG_PCI_BRCMSTB=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
+CONFIG_DM_RESET=y
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
|
||||
index 0feea7f0be..4ce8469f43 100644
|
||||
--- a/configs/rpi_arm64_defconfig
|
||||
+++ b/configs/rpi_arm64_defconfig
|
||||
@@ -32,6 +32,7 @@ CONFIG_DM_PCI=y
|
||||
CONFIG_PCI_BRCMSTB=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
+CONFIG_DM_RESET=y
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,106 @@
|
||||
From a39dcf665d8867875b104661bd6a6325f502c5f2 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <a39dcf665d8867875b104661bd6a6325f502c5f2.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
Date: Mon, 29 Jun 2020 18:37:25 +0200
|
||||
Subject: [PATCH 14/20] usb: xhci: Add reset controller support
|
||||
|
||||
Some atypical users of xhci might need to manually reset their xHCI
|
||||
controller before starting the HCD setup. Check if a reset controller
|
||||
device is available to the PCI bus and trigger a reset.
|
||||
|
||||
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
---
|
||||
drivers/usb/host/xhci-mem.c | 2 ++
|
||||
drivers/usb/host/xhci.c | 33 +++++++++++++++++++++++++++++++++
|
||||
include/usb/xhci.h | 2 ++
|
||||
3 files changed, 37 insertions(+)
|
||||
|
||||
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
|
||||
index f446520528..108f4bd8cf 100644
|
||||
--- a/drivers/usb/host/xhci-mem.c
|
||||
+++ b/drivers/usb/host/xhci-mem.c
|
||||
@@ -180,6 +180,8 @@ void xhci_cleanup(struct xhci_ctrl *ctrl)
|
||||
xhci_free_virt_devices(ctrl);
|
||||
free(ctrl->erst.entries);
|
||||
free(ctrl->dcbaa);
|
||||
+ if (reset_valid(&ctrl->reset))
|
||||
+ reset_free(&ctrl->reset);
|
||||
memset(ctrl, '\0', sizeof(struct xhci_ctrl));
|
||||
}
|
||||
|
||||
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
|
||||
index ebd2954571..e252964d0d 100644
|
||||
--- a/drivers/usb/host/xhci.c
|
||||
+++ b/drivers/usb/host/xhci.c
|
||||
@@ -190,6 +190,35 @@ static int xhci_start(struct xhci_hcor *hcor)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+/**
|
||||
+ * Resets XHCI Hardware
|
||||
+ *
|
||||
+ * @param ctrl pointer to host controller
|
||||
+ * @return 0 if OK, or a negative error code.
|
||||
+ */
|
||||
+static int xhci_reset_hw(struct xhci_ctrl *ctrl)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = reset_get_by_index(ctrl->dev, 0, &ctrl->reset);
|
||||
+ if (ret && ret != -ENOENT && ret != -ENOTSUPP) {
|
||||
+ dev_err(ctrl->dev, "failed to get reset\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ if (reset_valid(&ctrl->reset)) {
|
||||
+ ret = reset_assert(&ctrl->reset);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ret = reset_deassert(&ctrl->reset);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
/**
|
||||
* Resets the XHCI Controller
|
||||
*
|
||||
@@ -1508,6 +1537,10 @@ int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
|
||||
|
||||
ctrl->dev = dev;
|
||||
|
||||
+ ret = xhci_reset_hw(ctrl);
|
||||
+ if (ret)
|
||||
+ goto err;
|
||||
+
|
||||
/*
|
||||
* XHCI needs to issue a Address device command to setup
|
||||
* proper device context structures, before it can interact
|
||||
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
|
||||
index 1170c0ac69..7d34103fd5 100644
|
||||
--- a/include/usb/xhci.h
|
||||
+++ b/include/usb/xhci.h
|
||||
@@ -16,6 +16,7 @@
|
||||
#ifndef HOST_XHCI_H_
|
||||
#define HOST_XHCI_H_
|
||||
|
||||
+#include <reset.h>
|
||||
#include <asm/types.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/io.h>
|
||||
@@ -1209,6 +1210,7 @@ struct xhci_ctrl {
|
||||
#if CONFIG_IS_ENABLED(DM_USB)
|
||||
struct udevice *dev;
|
||||
#endif
|
||||
+ struct reset_ctl reset;
|
||||
struct xhci_hccr *hccr; /* R/O registers, not need for volatile */
|
||||
struct xhci_hcor *hcor;
|
||||
struct xhci_doorbell_array *dba;
|
||||
--
|
||||
2.27.0
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,88 @@
|
||||
From 32d72ef4331597864189b73b309490ac48f4ac05 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <32d72ef4331597864189b73b309490ac48f4ac05.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Wed, 3 Jun 2020 14:43:41 +0200
|
||||
Subject: [PATCH 16/20] arm: update comments to the common style
|
||||
|
||||
Update the comments in include/asm/system.h to the common style.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Reviewed-by: Tom Rini <trini@konsulko.com>
|
||||
---
|
||||
arch/arm/include/asm/system.h | 23 ++++++++++++++---------
|
||||
1 file changed, 14 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
|
||||
index 7a40b56acd..0243f76e76 100644
|
||||
--- a/arch/arm/include/asm/system.h
|
||||
+++ b/arch/arm/include/asm/system.h
|
||||
@@ -205,7 +205,7 @@ int __asm_invalidate_l3_icache(void);
|
||||
void __asm_switch_ttbr(u64 new_ttbr);
|
||||
|
||||
/*
|
||||
- * Switch from EL3 to EL2 for ARMv8
|
||||
+ * armv8_switch_to_el2() - switch from EL3 to EL2 for ARMv8
|
||||
*
|
||||
* @args: For loading 64-bit OS, fdt address.
|
||||
* For loading 32-bit OS, zero.
|
||||
@@ -220,7 +220,7 @@ void __asm_switch_ttbr(u64 new_ttbr);
|
||||
void __noreturn armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr,
|
||||
u64 arg4, u64 entry_point, u64 es_flag);
|
||||
/*
|
||||
- * Switch from EL2 to EL1 for ARMv8
|
||||
+ * armv8_switch_to_el1() - switch from EL2 to EL1 for ARMv8
|
||||
*
|
||||
* @args: For loading 64-bit OS, fdt address.
|
||||
* For loading 32-bit OS, zero.
|
||||
@@ -246,11 +246,12 @@ void flush_l3_cache(void);
|
||||
void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs);
|
||||
|
||||
/*
|
||||
- *Issue a secure monitor call in accordance with ARM "SMC Calling convention",
|
||||
+ * smc_call() - issue a secure monitor call
|
||||
+ *
|
||||
+ * Issue a secure monitor call in accordance with ARM "SMC Calling convention",
|
||||
* DEN0028A
|
||||
*
|
||||
* @args: input and output arguments
|
||||
- *
|
||||
*/
|
||||
void smc_call(struct pt_regs *args);
|
||||
|
||||
@@ -519,10 +520,12 @@ enum {
|
||||
#endif
|
||||
|
||||
/**
|
||||
+ * mmu_page_table_flush() - register an update to page tables
|
||||
+ *
|
||||
* Register an update to the page tables, and flush the TLB
|
||||
*
|
||||
- * \param start start address of update in page table
|
||||
- * \param stop stop address of update in page table
|
||||
+ * @start: start address of update in page table
|
||||
+ * @stop: stop address of update in page table
|
||||
*/
|
||||
void mmu_page_table_flush(unsigned long start, unsigned long stop);
|
||||
|
||||
@@ -583,11 +586,13 @@ s32 psci_features(u32 function_id, u32 psci_fid);
|
||||
void save_boot_params_ret(void);
|
||||
|
||||
/**
|
||||
+ * mmu_set_region_dcache_behaviour() - set cache settings
|
||||
+ *
|
||||
* Change the cache settings for a region.
|
||||
*
|
||||
- * \param start start address of memory region to change
|
||||
- * \param size size of memory region to change
|
||||
- * \param option dcache option to select
|
||||
+ * @start: start address of memory region to change
|
||||
+ * @size: size of memory region to change
|
||||
+ * @option: dcache option to select
|
||||
*/
|
||||
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||
enum dcache_option option);
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,130 @@
|
||||
From 82a944e4d1356e9ab3c87e6dc57b1b7213cbb233 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <82a944e4d1356e9ab3c87e6dc57b1b7213cbb233.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Wed, 3 Jun 2020 14:43:42 +0200
|
||||
Subject: [PATCH 17/20] arm: provide a function for boards init code to modify
|
||||
MMU virtual-physical map
|
||||
|
||||
Provide function for setting arbitrary virtual-physical MMU mapping
|
||||
and cache settings for the given region.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Reviewed-by: Tom Rini <trini@konsulko.com>
|
||||
---
|
||||
arch/arm/include/asm/mmu.h | 8 ++++++++
|
||||
arch/arm/include/asm/system.h | 13 +++++++++++++
|
||||
arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------
|
||||
3 files changed, 39 insertions(+), 6 deletions(-)
|
||||
create mode 100644 arch/arm/include/asm/mmu.h
|
||||
|
||||
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
|
||||
new file mode 100644
|
||||
index 0000000000..9ac16f599e
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/include/asm/mmu.h
|
||||
@@ -0,0 +1,8 @@
|
||||
+/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
+
|
||||
+#ifndef __ASM_ARM_MMU_H
|
||||
+#define __ASM_ARM_MMU_H
|
||||
+
|
||||
+void init_addr_map(void);
|
||||
+
|
||||
+#endif
|
||||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
|
||||
index 0243f76e76..f9290fa9b6 100644
|
||||
--- a/arch/arm/include/asm/system.h
|
||||
+++ b/arch/arm/include/asm/system.h
|
||||
@@ -585,6 +585,19 @@ s32 psci_features(u32 function_id, u32 psci_fid);
|
||||
*/
|
||||
void save_boot_params_ret(void);
|
||||
|
||||
+/**
|
||||
+ * mmu_set_region_dcache_behaviour_phys() - set virt/phys mapping
|
||||
+ *
|
||||
+ * Change the virt/phys mapping and cache settings for a region.
|
||||
+ *
|
||||
+ * @virt: virtual start address of memory region to change
|
||||
+ * @phys: physical address for the memory region to set
|
||||
+ * @size: size of memory region to change
|
||||
+ * @option: dcache option to select
|
||||
+ */
|
||||
+void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys,
|
||||
+ size_t size, enum dcache_option option);
|
||||
+
|
||||
/**
|
||||
* mmu_set_region_dcache_behaviour() - set cache settings
|
||||
*
|
||||
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
|
||||
index 1da2e92fe2..39717610d4 100644
|
||||
--- a/arch/arm/lib/cache-cp15.c
|
||||
+++ b/arch/arm/lib/cache-cp15.c
|
||||
@@ -25,7 +25,8 @@ __weak void arm_init_domains(void)
|
||||
{
|
||||
}
|
||||
|
||||
-void set_section_dcache(int section, enum dcache_option option)
|
||||
+static void set_section_phys(int section, phys_addr_t phys,
|
||||
+ enum dcache_option option)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7_LPAE
|
||||
u64 *page_table = (u64 *)gd->arch.tlb_addr;
|
||||
@@ -37,7 +38,7 @@ void set_section_dcache(int section, enum dcache_option option)
|
||||
#endif
|
||||
|
||||
/* Add the page offset */
|
||||
- value |= ((u32)section << MMU_SECTION_SHIFT);
|
||||
+ value |= phys;
|
||||
|
||||
/* Add caching bits */
|
||||
value |= option;
|
||||
@@ -46,13 +47,18 @@ void set_section_dcache(int section, enum dcache_option option)
|
||||
page_table[section] = value;
|
||||
}
|
||||
|
||||
+void set_section_dcache(int section, enum dcache_option option)
|
||||
+{
|
||||
+ set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option);
|
||||
+}
|
||||
+
|
||||
__weak void mmu_page_table_flush(unsigned long start, unsigned long stop)
|
||||
{
|
||||
debug("%s: Warning: not implemented\n", __func__);
|
||||
}
|
||||
|
||||
-void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||
- enum dcache_option option)
|
||||
+void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys,
|
||||
+ size_t size, enum dcache_option option)
|
||||
{
|
||||
#ifdef CONFIG_ARMV7_LPAE
|
||||
u64 *page_table = (u64 *)gd->arch.tlb_addr;
|
||||
@@ -74,8 +80,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||
debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size,
|
||||
option);
|
||||
#endif
|
||||
- for (upto = start; upto < end; upto++)
|
||||
- set_section_dcache(upto, option);
|
||||
+ for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE)
|
||||
+ set_section_phys(upto, phys, option);
|
||||
|
||||
/*
|
||||
* Make sure range is cache line aligned
|
||||
@@ -90,6 +96,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||
mmu_page_table_flush(startpt, stoppt);
|
||||
}
|
||||
|
||||
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
|
||||
+ enum dcache_option option)
|
||||
+{
|
||||
+ mmu_set_region_dcache_behaviour_phys(start, start, size, option);
|
||||
+}
|
||||
+
|
||||
__weak void dram_bank_mmu_setup(int bank)
|
||||
{
|
||||
bd_t *bd = gd->bd;
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,33 @@
|
||||
From 2904bea082a1524b13af6afed08a7f5ee9faf0ae Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <2904bea082a1524b13af6afed08a7f5ee9faf0ae.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Seung-Woo Kim <sw0312.kim@samsung.com>
|
||||
Date: Wed, 3 Jun 2020 14:43:43 +0200
|
||||
Subject: [PATCH 18/20] mmc: bcm283x: fix int to pointer cast
|
||||
|
||||
On build with 32 bit, there is a warning for int-to-pointer-cast.
|
||||
Fix the int to pointer cast by using uintptr_t.
|
||||
|
||||
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
---
|
||||
drivers/mmc/bcm2835_sdhci.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
|
||||
index dc3dffb657..5cdf3c506f 100644
|
||||
--- a/drivers/mmc/bcm2835_sdhci.c
|
||||
+++ b/drivers/mmc/bcm2835_sdhci.c
|
||||
@@ -210,7 +210,7 @@ static int bcm2835_sdhci_probe(struct udevice *dev)
|
||||
priv->last_write = 0;
|
||||
|
||||
host->name = dev->name;
|
||||
- host->ioaddr = (void *)base;
|
||||
+ host->ioaddr = (void *)(uintptr_t)base;
|
||||
host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
|
||||
SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
|
||||
host->max_clk = emmc_freq;
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,85 @@
|
||||
From a8c492ef2a3a73d435765ce28944efebce5cfa17 Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <a8c492ef2a3a73d435765ce28944efebce5cfa17.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Wed, 3 Jun 2020 14:43:44 +0200
|
||||
Subject: [PATCH 19/20] rpi4: add a mapping for the PCIe XHCI controller MMIO
|
||||
registers (ARM 32bit)
|
||||
|
||||
Create a non-cacheable mapping for the 0x600000000 physical memory region,
|
||||
where MMIO registers for the PCIe XHCI controller are instantiated by the
|
||||
PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
|
||||
32bit mode, this region is mapped at 0xff800000 CPU virtual address.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
---
|
||||
arch/arm/mach-bcm283x/Kconfig | 1 +
|
||||
arch/arm/mach-bcm283x/include/mach/base.h | 8 ++++++++
|
||||
arch/arm/mach-bcm283x/init.c | 21 +++++++++++++++++++++
|
||||
3 files changed, 30 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
|
||||
index e6eb904e7f..b3287ce8bc 100644
|
||||
--- a/arch/arm/mach-bcm283x/Kconfig
|
||||
+++ b/arch/arm/mach-bcm283x/Kconfig
|
||||
@@ -36,6 +36,7 @@ config BCM2711_32B
|
||||
select BCM2711
|
||||
select ARMV7_LPAE
|
||||
select CPU_V7A
|
||||
+ select PHYS_64BIT
|
||||
|
||||
config BCM2711_64B
|
||||
bool "Broadcom BCM2711 SoC 64-bit support"
|
||||
diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h
|
||||
index c4ae39852f..4ccaf69693 100644
|
||||
--- a/arch/arm/mach-bcm283x/include/mach/base.h
|
||||
+++ b/arch/arm/mach-bcm283x/include/mach/base.h
|
||||
@@ -8,4 +8,12 @@
|
||||
|
||||
extern unsigned long rpi_bcm283x_base;
|
||||
|
||||
+#ifdef CONFIG_ARMV7_LPAE
|
||||
+#ifdef CONFIG_TARGET_RPI_4_32B
|
||||
+#include <addr_map.h>
|
||||
+#define phys_to_virt addrmap_phys_to_virt
|
||||
+#define virt_to_phys addrmap_virt_to_phys
|
||||
+#endif
|
||||
+#endif
|
||||
+
|
||||
#endif
|
||||
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
|
||||
index cf4c5b245d..f2a5411623 100644
|
||||
--- a/arch/arm/mach-bcm283x/init.c
|
||||
+++ b/arch/arm/mach-bcm283x/init.c
|
||||
@@ -146,6 +146,27 @@ int mach_cpu_init(void)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARMV7_LPAE
|
||||
+#ifdef CONFIG_TARGET_RPI_4_32B
|
||||
+#define BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT 0xff800000UL
|
||||
+#include <addr_map.h>
|
||||
+#include <asm/system.h>
|
||||
+
|
||||
+void init_addr_map(void)
|
||||
+{
|
||||
+ mmu_set_region_dcache_behaviour_phys(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
|
||||
+ BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
|
||||
+ BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE,
|
||||
+ DCACHE_OFF);
|
||||
+
|
||||
+ /* identity mapping for 0..BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
|
||||
+ addrmap_set_entry(0, 0, BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT, 0);
|
||||
+ /* XHCI MMIO on PCIe at BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT */
|
||||
+ addrmap_set_entry(BCM2711_RPI4_PCIE_XHCI_MMIO_VIRT,
|
||||
+ BCM2711_RPI4_PCIE_XHCI_MMIO_PHYS,
|
||||
+ BCM2711_RPI4_PCIE_XHCI_MMIO_SIZE, 1);
|
||||
+}
|
||||
+#endif
|
||||
+
|
||||
void enable_caches(void)
|
||||
{
|
||||
dcache_enable();
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -0,0 +1,71 @@
|
||||
From 52d942897bcf2c775c3c5dff9f811e1a28f3fd7d Mon Sep 17 00:00:00 2001
|
||||
Message-Id: <52d942897bcf2c775c3c5dff9f811e1a28f3fd7d.1595101389.git.stefan@agner.ch>
|
||||
In-Reply-To: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
References: <040a141f84f2f84bf8be18f85b4cdb34bf066df0.1595101389.git.stefan@agner.ch>
|
||||
From: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
Date: Wed, 3 Jun 2020 14:43:45 +0200
|
||||
Subject: [PATCH 20/20] config: Enable support for the XHCI controller on RPI4
|
||||
board
|
||||
|
||||
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
|
||||
and USB commands. To get it working one has to call the following commands:
|
||||
"pci enum; usb start;", thus such commands have been added to the default
|
||||
"preboot" environment variable. One has to update their environment if it
|
||||
is already configured to get this feature working out of the box.
|
||||
|
||||
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
||||
---
|
||||
configs/rpi_4_32b_defconfig | 11 +++++++++++
|
||||
1 file changed, 11 insertions(+)
|
||||
|
||||
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
|
||||
index 0df5c17d6e..db7b781976 100644
|
||||
--- a/configs/rpi_4_32b_defconfig
|
||||
+++ b/configs/rpi_4_32b_defconfig
|
||||
@@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ENV_SIZE=0x4000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
+CONFIG_USE_PREBOOT=y
|
||||
+CONFIG_PREBOOT="pci enum; usb start;"
|
||||
CONFIG_MISC_INIT_R=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
@@ -13,6 +15,8 @@ CONFIG_SYS_PROMPT="U-Boot> "
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_PCI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_FS_UUID=y
|
||||
CONFIG_OF_BOARD=y
|
||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||
@@ -26,6 +30,9 @@ CONFIG_MMC_SDHCI_SDMA=y
|
||||
CONFIG_MMC_SDHCI_BCM2835=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_BCMGENET=y
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_DM_PCI=y
|
||||
+CONFIG_PCI_BRCMSTB=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_DM_RESET=y
|
||||
@@ -33,6 +40,8 @@ CONFIG_DM_RESET=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_PCI=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="FSL"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
|
||||
@@ -45,4 +54,6 @@ CONFIG_DM_VIDEO=y
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
CONFIG_CONSOLE_SCROLL_LINES=10
|
||||
CONFIG_PHYS_TO_BUS=y
|
||||
+CONFIG_ADDR_MAP=y
|
||||
+CONFIG_SYS_NUM_ADDR_MAP=2
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
--
|
||||
2.27.0
|
||||
|
||||
@ -11,9 +11,9 @@ StartLimitBurst=5
|
||||
Type=simple
|
||||
Restart=always
|
||||
RestartSec=5s
|
||||
ExecStartPre=-/usr/bin/docker stop hassos_supervisor
|
||||
ExecStartPre=-/usr/bin/docker stop hassio_supervisor
|
||||
ExecStart=/usr/sbin/hassos-supervisor
|
||||
ExecStop=-/usr/bin/docker stop hassos_supervisor
|
||||
ExecStop=-/usr/bin/docker stop hassio_supervisor
|
||||
|
||||
[Install]
|
||||
WantedBy=multi-user.target
|
||||
|
||||
@ -21,6 +21,20 @@ OLD_DEVICE_CHILD="$(findfs LABEL="hassos-data")"
|
||||
OLD_DEVICE_ROOT="/dev/$(lsblk -no pkname "${OLD_DEVICE_CHILD}")"
|
||||
OLD_PART_NUM="${OLD_DEVICE_CHILD: -1}"
|
||||
|
||||
# Wait for devices
|
||||
timeout 90 \
|
||||
ash -c \
|
||||
"until [ -e \"${NEW_DEVICE_ROOT}\" ]; do sleep 5; done" \
|
||||
> /dev/null 2>&1 || true;
|
||||
|
||||
# Check if block device is exists
|
||||
if [ ! -b "${NEW_DEVICE_ROOT}" ]; then
|
||||
echo "[ERROR] No block device ${NEW_DEVICE_ROOT}!"
|
||||
exit 1
|
||||
fi
|
||||
echo "[INFO] Cleanup device ${NEW_DEVICE_ROOT}!"
|
||||
sgdisk -Z "${NEW_DEVICE_ROOT}"
|
||||
|
||||
# Create new partition
|
||||
echo "[INFO] Create new hassos-data partition"
|
||||
sgdisk -o "${NEW_DEVICE_ROOT}"
|
||||
@ -51,7 +65,7 @@ if sfdisk -dq "${OLD_DEVICE_ROOT}" | grep -q 'label: gpt'; then
|
||||
sgdisk -v "${OLD_DEVICE_ROOT}"
|
||||
|
||||
else
|
||||
sfdisk --delete "${OLD_PART_NUM}" "${OLD_DEVICE_ROOT}" --force
|
||||
sfdisk --delete "${OLD_DEVICE_ROOT}" "${OLD_PART_NUM}" --force
|
||||
sfdisk -V "${OLD_DEVICE_ROOT}"
|
||||
fi
|
||||
|
||||
@ -63,6 +77,7 @@ resize2fs -f "${NEW_DEVICE_CHILD}"
|
||||
|
||||
# Fix partition layout
|
||||
partx -d "${OLD_DEVICE_CHILD}"
|
||||
partx -u "${OLD_DEVICE_ROOT}"
|
||||
partx -u "${NEW_DEVICE_ROOT}"
|
||||
|
||||
echo "[INFO] Finish hassos data movement"
|
||||
|
||||
@ -3,12 +3,18 @@
|
||||
# Run logging cli
|
||||
# ==============================================================================
|
||||
|
||||
docker container exec \
|
||||
-ti hassio_cli \
|
||||
/usr/bin/cli.sh \
|
||||
# Run CLI container
|
||||
if [ "$(docker ps -q -f name=hassio_cli)" ]; then
|
||||
docker container exec \
|
||||
-ti hassio_cli \
|
||||
/usr/bin/cli.sh \
|
||||
|
||||
# Jump to root login shell
|
||||
if [ $? -eq 10 ]; then
|
||||
# Jump to root login shell
|
||||
if [ $? -eq 10 ]; then
|
||||
/bin/ash -l
|
||||
fi
|
||||
else
|
||||
echo "[ERROR] Somethings going wrong! Jump into emergency console..."
|
||||
/bin/ash -l
|
||||
fi
|
||||
|
||||
|
||||
@ -9,16 +9,72 @@ set -e
|
||||
. /etc/os-release
|
||||
|
||||
# Init supervisor
|
||||
SUPERVISOR_MIN_RUNTIME=15
|
||||
SUPERVISOR_IMAGE="homeassistant/${SUPERVISOR_ARCH}-hassio-supervisor"
|
||||
SUPERVISOR_DATA=/mnt/data/supervisor
|
||||
SUPERVISOR_IMAGE_ID=$(docker inspect --format='{{.Id}}' "${SUPERVISOR_IMAGE}")
|
||||
SUPERVISOR_IMAGE_ID=$(docker inspect --format='{{.Id}}' "${SUPERVISOR_IMAGE}" || echo "")
|
||||
SUPERVISOR_CONTAINER_ID=$(docker inspect --format='{{.Image}}' hassio_supervisor || echo "")
|
||||
|
||||
runSupervisor() {
|
||||
docker container rm --force hassio_supervisor || true
|
||||
# Check if previous runtime of the container meets the minimal runtime
|
||||
# If not, we might be in trouble. Image or container corruption, bad release?
|
||||
# Delete the container, delete the image, pull a fresh one
|
||||
if [ -n "${SUPERVISOR_CONTAINER_ID}" ] && [ "${SUPERVISOR_IMAGE_ID}" = "${SUPERVISOR_CONTAINER_ID}" ]; then
|
||||
SUPERVISOR_START=$(docker inspect --format='{{.State.StartedAt}}' hassio_supervisor | sed -re "s/([-0-9]+)T([0-9\:]+).*/\1 \2/g")
|
||||
SUPERVISOR_STOP=$(docker inspect --format='{{.State.FinishedAt}}' hassio_supervisor | sed -re "s/([-0-9]+)T([0-9\:]+).*/\1 \2/g")
|
||||
|
||||
if [ -n "${SUPERVISOR_START}" ] && [ -n "${SUPERVISOR_STOP}" ]; then
|
||||
START=$(date --date="${SUPERVISOR_START}" +%s)
|
||||
STOP=$(date --date="${SUPERVISOR_STOP}" +%s)
|
||||
SUPERVISOR_RUNTIME=$((STOP-START))
|
||||
# Minimial runtime not met, remove container and image
|
||||
if [ "${SUPERVISOR_RUNTIME}" -lt "${SUPERVISOR_MIN_RUNTIME}" ]; then
|
||||
echo "[WARNING] Supervisor container exited too quickly, forcing a fresh image and container..."
|
||||
docker container rm --force hassio_supervisor || true
|
||||
SUPERVISOR_CONTAINER_ID=""
|
||||
docker rmi --force "${SUPERVISOR_IMAGE_ID}" || true
|
||||
SUPERVISOR_IMAGE_ID=""
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
# If Supervisor image is missing, pull it
|
||||
if [ -z "${SUPERVISOR_IMAGE_ID}" ]; then
|
||||
# Get the latest from update information
|
||||
# Using updater information instead of config. If the config version is
|
||||
# broken, this creates a way (e.g., bad release).
|
||||
SUPERVISOR_VERSION_UPDATER=$(jq -r '.version // empty' "${SUPERVISOR_DATA}/config.json" || echo "")
|
||||
SUPERVISOR_VERSION="${SUPERVISOR_VERSION_UPDATER:-latest}"
|
||||
|
||||
echo "[WARNING] Supervisor image missing, downloading a fresh one: ${SUPERVISOR_VERSION}"
|
||||
|
||||
# Pull in the Supervisor
|
||||
if docker pull "${SUPERVISOR_IMAGE}:${SUPERVISOR_VERSION}"; then
|
||||
# Tag as latest if versioned
|
||||
if [ "${SUPERVISOR_VERSION}" != "latest" ]; then
|
||||
docker tag "${SUPERVISOR_IMAGE}:${SUPERVISOR_VERSION}" "${SUPERVISOR_IMAGE}:latest"
|
||||
fi
|
||||
else
|
||||
# Pull failed, updater info might be corrupted, re-trying with latest
|
||||
echo "[WARNING] Supervisor downloading failed trying: latest"
|
||||
docker pull "${SUPERVISOR_IMAGE}:latest"
|
||||
fi
|
||||
|
||||
SUPERVISOR_IMAGE_ID=$(docker inspect --format='{{.Id}}' "${SUPERVISOR_IMAGE}" || echo "")
|
||||
fi
|
||||
|
||||
# Image changed, remove previous container
|
||||
if [ -n "${SUPERVISOR_CONTAINER_ID}" ] && [ "${SUPERVISOR_IMAGE_ID}" != "${SUPERVISOR_CONTAINER_ID}" ]; then
|
||||
echo "[INFO] Supervisor image has been updated, destroying previous container..."
|
||||
docker container rm --force hassio_supervisor || true
|
||||
SUPERVISOR_CONTAINER_ID=""
|
||||
fi
|
||||
|
||||
# If Supervisor container is missing, create it
|
||||
if [ -z "${SUPERVISOR_CONTAINER_ID}" ]; then
|
||||
echo "[INFO] Creating a new Supervisor container..."
|
||||
# shellcheck disable=SC2086
|
||||
docker container run --name hassio_supervisor \
|
||||
docker container create \
|
||||
--name hassio_supervisor \
|
||||
--privileged --security-opt apparmor="hassio-supervisor" \
|
||||
-v /var/run/docker.sock:/var/run/docker.sock \
|
||||
-v /var/run/dbus:/var/run/dbus \
|
||||
@ -27,9 +83,10 @@ runSupervisor() {
|
||||
-e SUPERVISOR_SHARE=${SUPERVISOR_DATA} \
|
||||
-e SUPERVISOR_NAME=hassio_supervisor \
|
||||
-e SUPERVISOR_MACHINE=${SUPERVISOR_MACHINE} \
|
||||
"${SUPERVISOR_IMAGE}"
|
||||
}
|
||||
"${SUPERVISOR_IMAGE}:latest"
|
||||
fi
|
||||
|
||||
# Run supervisor
|
||||
mkdir -p ${SUPERVISOR_DATA}
|
||||
([ "${SUPERVISOR_IMAGE_ID}" = "${SUPERVISOR_CONTAINER_ID}" ] && docker container start --attach hassio_supervisor) || runSupervisor
|
||||
echo "[INFO] Starting the Supervisor..."
|
||||
exec docker container start --attach hassio_supervisor
|
||||
|
||||
@ -16,7 +16,7 @@ index 59ab1da0c6..e3ba1bf99c 100644
|
||||
@@ -1,3 +1,3 @@
|
||||
# Locally computed
|
||||
-sha256 31a84340be08be319570a9d1439f25c0e3513fed73065a56aa5dd61dd605d5d9 rpi-firmware-01ecfd2ba2b7cf3a2f4aa75ada895ee4a3e729f5.tar.gz
|
||||
+sha256 77ad450dd7cabb58ca04a18fd704844df6e642374346cf006a07edca46615af1 rpi-firmware-7eff9f6774bb43bfd61e749a0b45ffddc98c2311.tar.gz
|
||||
+sha256 4789d4422b3bc7eab157471ba36aebd54efc2a6de4c937f5cfdb4392af04fe80 rpi-firmware-7caead9416f64b2d33361c703fb243b8e157eba4.tar.gz
|
||||
sha256 c7283ff51f863d93a275c66e3b4cb08021a5dd4d8c1e7acc47d872fbe52d3d6b boot/LICENCE.broadcom
|
||||
diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk
|
||||
index 6fee60b08c..2177ca9859 100644
|
||||
@ -27,7 +27,7 @@ index 6fee60b08c..2177ca9859 100644
|
||||
################################################################################
|
||||
|
||||
-RPI_FIRMWARE_VERSION = 01ecfd2ba2b7cf3a2f4aa75ada895ee4a3e729f5
|
||||
+RPI_FIRMWARE_VERSION = 7eff9f6774bb43bfd61e749a0b45ffddc98c2311
|
||||
+RPI_FIRMWARE_VERSION = 7caead9416f64b2d33361c703fb243b8e157eba4
|
||||
RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION))
|
||||
RPI_FIRMWARE_LICENSE = BSD-3-Clause
|
||||
RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom
|
||||
|
||||
38
buildroot-patches/0007-docker-proxy-Bump-version.patch
Normal file
38
buildroot-patches/0007-docker-proxy-Bump-version.patch
Normal file
@ -0,0 +1,38 @@
|
||||
From aec12d6fc55c1c444ff9d226ec4748d27673c8a2 Mon Sep 17 00:00:00 2001
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Thu, 7 May 2020 09:02:05 +0000
|
||||
Subject: [PATCH 1/1] docker-proxy: Bump version
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
package/docker-proxy/docker-proxy.hash | 2 +-
|
||||
package/docker-proxy/docker-proxy.mk | 4 ++--
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/package/docker-proxy/docker-proxy.hash b/package/docker-proxy/docker-proxy.hash
|
||||
index 58de697929..1416db4042 100644
|
||||
--- a/package/docker-proxy/docker-proxy.hash
|
||||
+++ b/package/docker-proxy/docker-proxy.hash
|
||||
@@ -1,3 +1,3 @@
|
||||
# Locally calculated
|
||||
-sha256 866c8d196b9396a383b437b0d775476459ed7c11f527c4f6bbf1fd08524b461d docker-proxy-55685ba49593e67f5e1c8180539379b16736c25e.tar.gz
|
||||
+sha256 2e1fdcc401a22d53103be6cfb5475c40af9f9a82a996ec6d508e0994dc2c5e4a docker-proxy-1ea375d2b54d2e914e41970a04553ad55ef39b62.tar.gz
|
||||
sha256 cb5e8e7e5f4a3988e1063c142c60dc2df75605f4c46515e776e3aca6df976e14 LICENSE
|
||||
diff --git a/package/docker-proxy/docker-proxy.mk b/package/docker-proxy/docker-proxy.mk
|
||||
index 8843266c30..1ab84159d1 100644
|
||||
--- a/package/docker-proxy/docker-proxy.mk
|
||||
+++ b/package/docker-proxy/docker-proxy.mk
|
||||
@@ -4,8 +4,8 @@
|
||||
#
|
||||
################################################################################
|
||||
|
||||
-DOCKER_PROXY_VERSION = 55685ba49593e67f5e1c8180539379b16736c25e
|
||||
-DOCKER_PROXY_SITE = $(call github,docker,libnetwork,$(DOCKER_PROXY_VERSION))
|
||||
+DOCKER_PROXY_VERSION = 1ea375d2b54d2e914e41970a04553ad55ef39b62
|
||||
+DOCKER_PROXY_SITE = $(call github,moby,libnetwork,$(DOCKER_PROXY_VERSION))
|
||||
|
||||
DOCKER_PROXY_LICENSE = Apache-2.0
|
||||
DOCKER_PROXY_LICENSE_FILES = LICENSE
|
||||
--
|
||||
2.17.1
|
||||
|
||||
68
buildroot-patches/0008-Linux-5.7.patch
Normal file
68
buildroot-patches/0008-Linux-5.7.patch
Normal file
@ -0,0 +1,68 @@
|
||||
From e36dc9a2a030204b5b6c6868348878b596f88de3 Mon Sep 17 00:00:00 2001
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Fri, 5 Jun 2020 14:18:26 +0000
|
||||
Subject: [PATCH 1/1] Linux 5.7
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
package/linux-headers/Config.in.host | 4 ++++
|
||||
toolchain/Config.in | 5 +++++
|
||||
.../toolchain-external-custom/Config.in.options | 4 ++++
|
||||
3 files changed, 13 insertions(+)
|
||||
|
||||
diff --git a/package/linux-headers/Config.in.host b/package/linux-headers/Config.in.host
|
||||
index 95e85a00..88b9ff99 100644
|
||||
--- a/package/linux-headers/Config.in.host
|
||||
+++ b/package/linux-headers/Config.in.host
|
||||
@@ -127,6 +127,10 @@ choice
|
||||
If your kernel headers are more recent than the latest version
|
||||
in the choice, then select the latest version.
|
||||
|
||||
+config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_7
|
||||
+ bool "5.7.x or later"
|
||||
+ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_7
|
||||
+
|
||||
config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4
|
||||
bool "5.4.x or later"
|
||||
select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4
|
||||
diff --git a/toolchain/Config.in b/toolchain/Config.in
|
||||
index bff57280..c07a92ce 100644
|
||||
--- a/toolchain/Config.in
|
||||
+++ b/toolchain/Config.in
|
||||
@@ -470,6 +470,10 @@ config BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4
|
||||
select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_3
|
||||
select BR2_TOOLCHAIN_HEADERS_LATEST
|
||||
|
||||
+config BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_7
|
||||
+ bool
|
||||
+ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4
|
||||
+
|
||||
# This should be selected by the latest version, above, to indicate that
|
||||
# Buildroot does not know of more recent headers than the ones selected.
|
||||
# This allows using toolchains with headers more recent than Buildroot
|
||||
@@ -481,6 +485,7 @@ config BR2_TOOLCHAIN_HEADERS_LATEST
|
||||
# stops affecting a value on the first matching default.
|
||||
config BR2_TOOLCHAIN_HEADERS_AT_LEAST
|
||||
string
|
||||
+ default "5.7" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_7
|
||||
default "5.4" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4
|
||||
default "5.3" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_3
|
||||
default "5.2" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_2
|
||||
diff --git a/toolchain/toolchain-external/toolchain-external-custom/Config.in.options b/toolchain/toolchain-external/toolchain-external-custom/Config.in.options
|
||||
index 8c38dd9f..b49231e1 100644
|
||||
--- a/toolchain/toolchain-external/toolchain-external-custom/Config.in.options
|
||||
+++ b/toolchain/toolchain-external/toolchain-external-custom/Config.in.options
|
||||
@@ -115,6 +115,10 @@ choice
|
||||
If your toolchain uses headers newer than the latest version
|
||||
in the choice, then select the latest version.
|
||||
|
||||
+config BR2_TOOLCHAIN_EXTERNAL_HEADERS_5_7
|
||||
+ bool "5.7.x or later"
|
||||
+ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_7
|
||||
+
|
||||
config BR2_TOOLCHAIN_EXTERNAL_HEADERS_5_4
|
||||
bool "5.4.x or later"
|
||||
select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,123 @@
|
||||
From 40e0bf4c0c36970f8e94591fdb0a5a8910bf9859 Mon Sep 17 00:00:00 2001
|
||||
From: "Yann E. MORIN" <yann.morin.1998@free.fr>
|
||||
Date: Tue, 12 May 2020 22:33:53 +0200
|
||||
Subject: [PATCH 1/1] linux: forcibly disable use of gcc plugins
|
||||
|
||||
The soon-to-be-released linux 5.7 has changed the way it detects the
|
||||
ability of gcc to use plugins, when it dropped support for gcc 4.7 or
|
||||
older [0].
|
||||
|
||||
To detect the ability to use gcc plugins, the kernel has to check
|
||||
whether the host gcc is capable enough to build them.
|
||||
|
||||
When we call one of the configurator for the Linux kernel, we explicitly
|
||||
pass a value of HOSTCC=$(HOSTCC_NOCCACHE), because there might be a
|
||||
discrepancy between the ncurses headers and libraries as found by the
|
||||
Linux kconfig build [1] [2].
|
||||
|
||||
But then, when we build the kernel, we pass another value to use [3]
|
||||
HOSTCC="$(HOSTCC) $(HOST_CFLAGS) $(HOST_LDFLAGS)" which boils down to
|
||||
roughly: gcc -I.../host/include -L.../host/lib -Wl,-rpath,.../host/lib
|
||||
This is needed so that at build time, the kernel can build host tools
|
||||
that link with our openssl et al.
|
||||
|
||||
So, the two HOSTCC we pass to the kernel may have different behaviours.
|
||||
For example, on a machine where gmp is missing in the system, it is
|
||||
available in $(O)/host/ when using an internal toolchain (and under a
|
||||
few other conditions).
|
||||
|
||||
In that case, when configuring the kernel, it decides that the host
|
||||
compiler can't build plugins, so the dependencies of CONFIG_GCC_PLUGINS
|
||||
are not met, and that option is not present in the linux' .config file
|
||||
(neither as "=y" nor as "is not set"). But then, when we build the
|
||||
kernel, the host compiler suddenly becomes capable of building the
|
||||
plugins, and the internal syncconfig run by the kernel will notice that
|
||||
the dependencies of CONFIG_GCC_PLUGINS are now met, and that the user
|
||||
shall decide on its value. And this blocks a build on an interactive
|
||||
console (abbreviated):
|
||||
|
||||
* Restart config...
|
||||
* GCC plugins
|
||||
GCC plugins (GCC_PLUGINS) [Y/n/?] (NEW) _
|
||||
|
||||
But most problematic is the behaviour when run in a shell that is not
|
||||
interactiove (e.g. a CI job or such) (abbreviated):
|
||||
|
||||
* Restart config...
|
||||
* GCC plugins
|
||||
GCC plugins (GCC_PLUGINS) [Y/n/?] (NEW)
|
||||
Error in reading or end of file.
|
||||
Generate some entropy during boot and runtime (GCC_PLUGIN_LATENT_ENTROPY) [N/y/?] (NEW)
|
||||
Error in reading or end of file.
|
||||
Randomize layout of sensitive kernel structures (GCC_PLUGIN_RANDSTRUCT) [N/y/?] (NEW)
|
||||
Error in reading or end of file.
|
||||
* Memory initialization
|
||||
Initialize kernel stack variables at function entry
|
||||
> 1. no automatic initialization (weakest) (INIT_STACK_NONE)
|
||||
2. zero-init structs marked for userspace (weak) (GCC_PLUGIN_STRUCTLEAK_USER) (NEW)
|
||||
3. zero-init structs passed by reference (strong) (GCC_PLUGIN_STRUCTLEAK_BYREF) (NEW)
|
||||
4. zero-init anything passed by reference (very strong) (GCC_PLUGIN_STRUCTLEAK_BYREF_ALL) (NEW)
|
||||
choice[1-4?]:
|
||||
Error in reading or end of file.
|
||||
Poison kernel stack before returning from syscalls (GCC_PLUGIN_STACKLEAK) [N/y/?] (NEW)
|
||||
Error in reading or end of file.
|
||||
Enable heap memory zeroing on allocation by default (INIT_ON_ALLOC_DEFAULT_ON) [N/y/?] n
|
||||
Enable heap memory zeroing on free by default (INIT_ON_FREE_DEFAULT_ON) [N/y/?] n
|
||||
|
||||
The most obvious and simple solution would be to unconditionally disable
|
||||
gcc plugins altogether, in the KCONFIG_FIXUP hook. But that can't work
|
||||
either, because after applying the fixups, we call olddefconfig (or the
|
||||
likes) with the incapable HOSTCC, so the disabled option would be removed
|
||||
anyway, and we'd be back to square one.
|
||||
|
||||
So, in addition to the above, we also forcibly hack the same call just
|
||||
before actually building the kernel.
|
||||
|
||||
Note that the two are needed: the one in the fixups is needed for those
|
||||
that have a system that already allows building gcc plugins, and the
|
||||
second is needed in the other case, where the system does not allow it
|
||||
but would work with our additional headers and libs in $(O)/host/. The
|
||||
two ensure there is a very similar experience in the two situations.
|
||||
|
||||
Forcibly disabling the use of gcc plugins is not a regression on our
|
||||
side: it has never been possible to do so so far. We're now making sure
|
||||
that can't work by accident.
|
||||
|
||||
Reported-by: Ganesh <ganesh45in@gmail.com>,
|
||||
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
|
||||
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
|
||||
Cc: Michael Walle <michael.walle@kontron.com>
|
||||
Cc: Peter Korsgaard <peter@korsgaard.com>
|
||||
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
|
||||
Cc: Arnout Vandecappelle <arnout@mind.be>
|
||||
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
|
||||
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
|
||||
---
|
||||
linux/linux.mk | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
diff --git a/linux/linux.mk b/buildroot/linux/linux.mk
|
||||
index ae1edbeb..5a1cb42e 100644
|
||||
--- a/linux/linux.mk
|
||||
+++ b/linux/linux.mk
|
||||
@@ -408,6 +408,7 @@ define LINUX_KCONFIG_FIXUP_CMDS
|
||||
$(call KCONFIG_ENABLE_OPT,CONFIG_FB,$(@D)/.config)
|
||||
$(call KCONFIG_ENABLE_OPT,CONFIG_LOGO,$(@D)/.config)
|
||||
$(call KCONFIG_ENABLE_OPT,CONFIG_LOGO_LINUX_CLUT224,$(@D)/.config))
|
||||
+ $(call KCONFIG_DISABLE_OPT,CONFIG_GCC_PLUGINS,$(@D)/.config)
|
||||
endef
|
||||
|
||||
ifeq ($(BR2_LINUX_KERNEL_DTS_SUPPORT),y)
|
||||
@@ -467,7 +468,10 @@ endif
|
||||
# '$(LINUX_TARGET_NAME)' targets separately because calling them in
|
||||
# the same $(MAKE) invocation has shown to cause parallel build
|
||||
# issues.
|
||||
+# The call to disable gcc-plugins is a stop-gap measure:
|
||||
+# http://lists.busybox.net/pipermail/buildroot/2020-May/282727.html
|
||||
define LINUX_BUILD_CMDS
|
||||
+ $(call KCONFIG_DISABLE_OPT,CONFIG_GCC_PLUGINS,$(@D)/.config)
|
||||
$(foreach dts,$(call qstrip,$(BR2_LINUX_KERNEL_CUSTOM_DTS_PATH)), \
|
||||
cp -f $(dts) $(LINUX_ARCH_PATH)/boot/dts/
|
||||
)
|
||||
--
|
||||
2.17.1
|
||||
37
buildroot-patches/0010-Bump-wireguard-linux-compat.patch
Normal file
37
buildroot-patches/0010-Bump-wireguard-linux-compat.patch
Normal file
@ -0,0 +1,37 @@
|
||||
From e7becf35dd9d78fd7be773c765904cea1199ad14 Mon Sep 17 00:00:00 2001
|
||||
From: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
Date: Sat, 6 Jun 2020 22:51:33 +0000
|
||||
Subject: [PATCH 1/1] Bump wireguard-linux-compat
|
||||
|
||||
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
|
||||
---
|
||||
package/wireguard-linux-compat/wireguard-linux-compat.hash | 2 +-
|
||||
package/wireguard-linux-compat/wireguard-linux-compat.mk | 2 +-
|
||||
2 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/package/wireguard-linux-compat/wireguard-linux-compat.hash b/package/wireguard-linux-compat/wireguard-linux-compat.hash
|
||||
index d308f47a13..6835f98d09 100644
|
||||
--- a/package/wireguard-linux-compat/wireguard-linux-compat.hash
|
||||
+++ b/package/wireguard-linux-compat/wireguard-linux-compat.hash
|
||||
@@ -1,4 +1,4 @@
|
||||
# https://lists.zx2c4.com/pipermail/wireguard/2020-April/005296.html
|
||||
-sha256 cf166348fbb67419528e73049ce001d29131aea367fa6aef9d3e223f7251e116 wireguard-linux-compat-1.0.20200413.tar.xz
|
||||
+sha256 16e7ae4bef734b243428eea07f3b3c3d4721880c3ea8eb8f98628fd6ae5b77c3 wireguard-linux-compat-1.0.20200520.tar.xz
|
||||
# Locally calculated
|
||||
sha256 8177f97513213526df2cf6184d8ff986c675afb514d4e68a404010521b880643 COPYING
|
||||
diff --git a/package/wireguard-linux-compat/wireguard-linux-compat.mk b/package/wireguard-linux-compat/wireguard-linux-compat.mk
|
||||
index 6d90245bd2..c6d79f59f9 100644
|
||||
--- a/package/wireguard-linux-compat/wireguard-linux-compat.mk
|
||||
+++ b/package/wireguard-linux-compat/wireguard-linux-compat.mk
|
||||
@@ -4,7 +4,7 @@
|
||||
#
|
||||
################################################################################
|
||||
|
||||
-WIREGUARD_LINUX_COMPAT_VERSION = 1.0.20200413
|
||||
+WIREGUARD_LINUX_COMPAT_VERSION = 1.0.20200520
|
||||
WIREGUARD_LINUX_COMPAT_SITE = https://git.zx2c4.com/wireguard-linux-compat/snapshot
|
||||
WIREGUARD_LINUX_COMPAT_SOURCE = wireguard-linux-compat-$(WIREGUARD_LINUX_COMPAT_VERSION).tar.xz
|
||||
WIREGUARD_LINUX_COMPAT_LICENSE = GPL-2.0
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -1,5 +0,0 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
#
|
||||
|
||||
# No br2-external tree defined.
|
||||
@ -1,5 +0,0 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
#
|
||||
|
||||
# No br2-external tree defined.
|
||||
@ -1,5 +0,0 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
#
|
||||
|
||||
# No br2-external tree defined.
|
||||
@ -1,5 +0,0 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
#
|
||||
|
||||
# No br2-external tree defined.
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user