From c37d0ecd769a783f8db7902e4a64ebfa9f7fd8a3 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Wed, 28 Aug 2019 15:55:12 +0200 Subject: [PATCH 01/43] Bump version 3.5 --- buildroot-external/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/buildroot-external/meta b/buildroot-external/meta index b622a6373..7bf80b4ca 100644 --- a/buildroot-external/meta +++ b/buildroot-external/meta @@ -1,5 +1,5 @@ VERSION_MAJOR=3 -VERSION_BUILD=4 +VERSION_BUILD=5 HASSOS_NAME="HassOS" HASSOS_ID="hassos" From c424b295b1dde388b005da17e5a6ea5b399aa618 Mon Sep 17 00:00:00 2001 From: Moshe Levi Date: Mon, 9 Sep 2019 17:06:53 +0300 Subject: [PATCH 02/43] create cache dir if not exist (#471) Signed-off-by: Moshe Levi --- scripts/enter.sh | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/scripts/enter.sh b/scripts/enter.sh index 7e1cfdd5d..2950f6525 100755 --- a/scripts/enter.sh +++ b/scripts/enter.sh @@ -1,9 +1,11 @@ #!/bin/bash BUILDER_UID="$(id -u)" BUILDER_GID="$(id -g)" +CACHE_DIR="${CACHE_DIR:-$HOME/hassos-cache}" +sudo mkdir -p "${CACHE_DIR}" sudo docker build -t hassos:local . sudo docker run -it --rm --privileged \ - -v "$(pwd):/build" -v "${CACHE_DIR:=$HOME/hassos-cache}:/cache" \ + -v "$(pwd):/build" -v "${CACHE_DIR}:/cache" \ -e BUILDER_UID="${BUILDER_UID}" -e BUILDER_GID="${BUILDER_GID}" \ hassos:local bash From 61516914ce94b6acd97a9b9053d5e23981f58162 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Mon, 9 Sep 2019 17:10:28 +0200 Subject: [PATCH 03/43] Fix screen issue with RPi4 (#472) --- .../board/raspberrypi/boot-env.txt | 1164 +---------------- .../board/raspberrypi/hassos-hook.sh | 2 +- 2 files changed, 50 insertions(+), 1116 deletions(-) diff --git a/buildroot-external/board/raspberrypi/boot-env.txt b/buildroot-external/board/raspberrypi/boot-env.txt index fcfe987a0..5f10cf891 100644 --- a/buildroot-external/board/raspberrypi/boot-env.txt +++ b/buildroot-external/board/raspberrypi/boot-env.txt @@ -1,1137 +1,71 @@ -################################################################################ -## Raspberry Pi Configuration Settings -## -## Revision 16, 2013/06/22 -## -## Details taken from the eLinux wiki -## For up-to-date information please refer to wiki page. -## -## Wiki Location : http://elinux.org/RPiconfig -## -## -## Description: -## Details of each setting are described with each section that begins with -## a double hashed comment ('##') -## It is up to the user to remove the single hashed comment ('#') from each -## option they want to enable, and to set the specific value of that option. -## -## Overclock settings will be disabled at runtime if the SoC reaches temp_limit -## -################################################################################ +# For more options and information see +# http://rpf.io/configtxt +# Some settings may impact device functionality. See link above for details -################################################################################ -## HassOS - don't change it! -################################################################################ +# HassOS - don't change it! +disable_splash=1 kernel=u-boot.bin -################################################################################ -## Standard Definition Video Settings -################################################################################ +# uncomment for aarch64 bit support +#arm_64bit=1 -## sdtv_mode -## defines the TV standard for composite output -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal NTSC (Default) -## 1 Japanese version of NTSC - no pedestal -## 2 Normal PAL -## 3 Brazilian version of PAL - 525/60 rather than 625/50, different -## subcarrier -## -#sdtv_mode=0 - -## sdtv_aspect -## defines the aspect ratio for composite output -## -## Value Description -## ------------------------------------------------------------------------- -## 1 4:3 (Default) -## 2 14:9 -## 3 16:9 -## -#sdtv_aspect=1 - -## sdtv_disable_colourburst -## Disables colour burst on composite output. The picture will be -## monochrome, but possibly sharper -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Colour burst is enabled (Default) -## 1 Colour burst is disabled -## -#sdtv_disable_colourburst=1 - -################################################################################ -## High Definition Video Settings -################################################################################ - -## hdmi_safe -## Use "safe mode" settings to try to boot with maximum hdmi compatibility. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Enabled (this does: hdmi_force_hotplug=1, -## hdmi_ignore_edid=0xa5000080, -## config_hdmi_boost=4, hdmi_group=2, -## hdmi_mode=4, disable_overscan=0, -## overscan_left=24, overscan_right=24, -## overscan_top=24, overscan_bottom=24) -## +# uncomment if you get no picture on HDMI for a default "safe" mode #hdmi_safe=1 -## hdmi_force_hotplug -## Pretends HDMI hotplug signal is asserted so it appears a HDMI display -## is attached -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Use HDMI mode even if no HDMI monitor is detected -## -#hdmi_force_hotplug=1 - -## hdmi_ignore_hotplug -## Pretends HDMI hotplug signal is not asserted so it appears a HDMI -## display is not attached -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Use composite mode even if HDMI monitor is detected -## -#hdmi_ignore_hotplug=1 - -## hdmi_drive -## chooses between HDMI and DVI modes -## -## Value Description -## ------------------------------------------------------------------------- -## 1 Normal DVI mode (No sound) -## 2 Normal HDMI mode (Sound will be sent if supported and enabled) -## -#hdmi_drive=2 - -## hdmi_ignore_edid -## Enables the ignoring of EDID/display data -## -#hdmi_ignore_edid=0xa5000080 - -## hdmi_edid_file -## Read the EDID data from the edid.dat file instead of from the attached -## device -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Read EDID data from attached device (Default) -## 1 Read EDID data from edid.txt file -## -#hdmi_edid_file=1 - -## hdmi_ignore_edid_audio -## Pretends all audio formats are unsupported by display. This means ALSA -## will default to analogue. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use EDID provided values (Default) -## 1 Pretend all audio formats are unsupported -## -#hdmi_ignore_edid_audio=1 - -## hdmi_force_edid_audio -## Pretends all audio formats are supported by display, allowing -## passthrough of DTS/AC3 even when not reported as supported. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use EDID provided values (Default) -## 1 Pretend all audio formats are supported -## -#hdmi_force_edid_audio=1 - -## hdmi_force_edid_3d -## Pretends all CEA modes support 3D even when edid doesn't indicate -## support for them. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use EDID provided values (Default) -## 1 Pretend 3D mode is supported -## -#hdmi_force_edid_3d=1 - -## avoid_edid_fuzzy_match -## Avoid fuzzy matching of modes described in edid. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use fuzzy matching (Default) -## 1 Avoid fuzzy matching -## -#avoid_edid_fuzzy_match=1 - -## hdmi_pixel_encoding -## Force the pixel encoding mode. -## By default it will use the mode requested from edid so shouldn't -## need changing. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use EDID provided values (Default) -## 1 RGB limited (16-235) -## 2 RGB full ( 0-255) -## 3 YCbCr limited (16-235) -## 4 YCbCr limited ( 0-255) -## -#hdmi_pixel_encoding=1 - -## hdmi_group -## Defines the HDMI type -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use the preferred group reported by the edid (Default) -## 1 CEA -## 2 DMT -## -#hdmi_group=1 - -## hdmi_mode -## defines screen resolution in CEA or DMT format -## -## H means 16:9 variant (of a normally 4:3 mode). -## 2x means pixel doubled (i.e. higher clock rate, with each pixel repeated -## twice) -## 4x means pixel quadrupled (i.e. higher clock rate, with each pixel -## repeated four times) -## reduced blanking means fewer bytes are used for blanking within the data -## stream (i.e. lower clock rate, with fewer wasted bytes) -## -## Value hdmi_group=CEA hdmi_group=DMT -## ------------------------------------------------------------------------- -## 1 VGA 640x350 85Hz -## 2 480p 60Hz 640x400 85Hz -## 3 480p 60Hz H 720x400 85Hz -## 4 720p 60Hz 640x480 60Hz -## 5 1080i 60Hz 640x480 72Hz -## 6 480i 60Hz 640x480 75Hz -## 7 480i 60Hz H 640x480 85Hz -## 8 240p 60Hz 800x600 56Hz -## 9 240p 60Hz H 800x600 60Hz -## 10 480i 60Hz 4x 800x600 72Hz -## 11 480i 60Hz 4x H 800x600 75Hz -## 12 240p 60Hz 4x 800x600 85Hz -## 13 240p 60Hz 4x H 800x600 120Hz -## 14 480p 60Hz 2x 848x480 60Hz -## 15 480p 60Hz 2x H 1024x768 43Hz DO NOT USE -## 16 1080p 60Hz 1024x768 60Hz -## 17 576p 50Hz 1024x768 70Hz -## 18 576p 50Hz H 1024x768 75Hz -## 19 720p 50Hz 1024x768 85Hz -## 20 1080i 50Hz 1024x768 120Hz -## 21 576i 50Hz 1152x864 75Hz -## 22 576i 50Hz H 1280x768 reduced blanking -## 23 288p 50Hz 1280x768 60Hz -## 24 288p 50Hz H 1280x768 75Hz -## 25 576i 50Hz 4x 1280x768 85Hz -## 26 576i 50Hz 4x H 1280x768 120Hz reduced blanking -## 27 288p 50Hz 4x 1280x800 reduced blanking -## 28 288p 50Hz 4x H 1280x800 60Hz -## 29 576p 50Hz 2x 1280x800 75Hz -## 30 576p 50Hz 2x H 1280x800 85Hz -## 31 1080p 50Hz 1280x800 120Hz reduced blanking -## 32 1080p 24Hz 1280x960 60Hz -## 33 1080p 25Hz 1280x960 85Hz -## 34 1080p 30Hz 1280x960 120Hz reduced blanking -## 35 480p 60Hz 4x 1280x1024 60Hz -## 36 480p 60Hz 4x H 1280x1024 75Hz -## 37 576p 50Hz 4x 1280x1024 85Hz -## 38 576p 50Hz 4x H 1280x1024 120Hz reduced blanking -## 39 1080i 50Hz reduced blanking 1360x768 60Hz -## 40 1080i 100Hz 1360x768 120Hz reduced blanking -## 41 720p 100Hz 1400x1050 reduced blanking -## 42 576p 100Hz 1400x1050 60Hz -## 43 576p 100Hz H 1400x1050 75Hz -## 44 576i 100Hz 1400x1050 85Hz -## 45 576i 100Hz H 1400x1050 120Hz reduced blanking -## 46 1080i 120Hz 1440x900 reduced blanking -## 47 720p 120Hz 1440x900 60Hz -## 48 480p 120Hz 1440x900 75Hz -## 49 480p 120Hz H 1440x900 85Hz -## 50 480i 120Hz 1440x900 120Hz reduced blanking -## 51 480i 120Hz H 1600x1200 60Hz -## 52 576p 200Hz 1600x1200 65Hz -## 53 576p 200Hz H 1600x1200 70Hz -## 54 576i 200Hz 1600x1200 75Hz -## 55 576i 200Hz H 1600x1200 85Hz -## 56 480p 240Hz 1600x1200 120Hz reduced blanking -## 57 480p 240Hz H 1680x1050 reduced blanking -## 58 480i 240Hz 1680x1050 60Hz -## 59 480i 240Hz H 1680x1050 75Hz -## 60 1680x1050 85Hz -## 61 1680x1050 120Hz reduced blanking -## 62 1792x1344 60Hz -## 63 1792x1344 75Hz -## 64 1792x1344 120Hz reduced blanking -## 65 1856x1392 60Hz -## 66 1856x1392 75Hz -## 67 1856x1392 120Hz reduced blanking -## 68 1920x1200 reduced blanking -## 69 1920x1200 60Hz -## 70 1920x1200 75Hz -## 71 1920x1200 85Hz -## 72 1920x1200 120Hz reduced blanking -## 73 1920x1440 60Hz -## 74 1920x1440 75Hz -## 75 1920x1440 120Hz reduced blanking -## 76 2560x1600 reduced blanking -## 77 2560x1600 60Hz -## 78 2560x1600 75Hz -## 79 2560x1600 85Hz -## 80 2560x1600 120Hz reduced blanking -## 81 1366x768 60Hz -## 82 1080p 60Hz -## 83 1600x900 reduced blanking -## 84 2048x1152 reduced blanking -## 85 720p 60Hz -## 86 1366x768 reduced blanking -## -#hdmi_mode=1 - -## config_hdmi_boost -## configure the signal strength of the HDMI interface. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 (Default) -## 1 -## 2 -## 3 -## 4 Try if you have interference issues with HDMI -## 5 -## 6 -## 7 Maximum -## -#config_hdmi_boost=0 - -## hdmi_ignore_cec_init -## Doesn't sent initial active source message. Avoids bringing -## (CEC enabled) TV out of standby and channel switch when rebooting. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal behaviour (Default) -## 1 Doesn't sent initial active source message -## -#hdmi_ignore_cec_init=1 - -## hdmi_ignore_cec -## Pretends CEC is not supported at all by TV. -## No CEC functions will be supported. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal behaviour (Default) -## 1 Pretend CEC is not supported by TV -## -#hdmi_ignore_cec=1 - -################################################################################ -## Overscan Video Settings -################################################################################ - -## overscan_left -## Number of pixels to skip on left -## -#overscan_left=0 - -## overscan_right -## Number of pixels to skip on right -## -#overscan_right=0 - -## overscan_top -## Number of pixels to skip on top -## -#overscan_top=0 - -## overscan_bottom -## Number of pixels to skip on bottom -## -#overscan_bottom=0 - -## disable_overscan -## Set to 1 to disable overscan -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Overscan Enabled (Default) -## 1 Overscan Disabled -## +# uncomment this if your display has a black border of unused pixels visible +# and your display can output without overscan #disable_overscan=1 -################################################################################ -## Framebuffer Video Settings -################################################################################ +# uncomment the following to adjust overscan. Use positive numbers if console +# goes off screen, and negative if there is too much border +#overscan_left=16 +#overscan_right=16 +#overscan_top=16 +#overscan_bottom=16 -## framebuffer_width -## Console framebuffer width in pixels. Default is display width minus -## overscan. -## -#framebuffer_width=0 +# uncomment to force a console size. By default it will be display's size minus +# overscan. +#framebuffer_width=1280 +#framebuffer_height=720 -## framebuffer_height -## Console framebuffer height in pixels. Default is display height minus -## overscan. -## -#framebuffer_height=0 +# uncomment if hdmi display is not detected and composite is being output +#hdmi_force_hotplug=1 -## framebuffer_depth -## Console framebuffer depth in bits per pixel. -## -## Value Description -## ------------------------------------------------------------------------- -## 8 Valid, but default RGB palette makes an unreadable screen -## 16 (Default) -## 24 Looks better but has corruption issues as of 2012/06/15 -## 32 Has no corruption issues but needs framebuffer_ignore_alpha=1 -## and shows the wrong colors as of 2012/06/15 -## -#framebuffer_depth=16 +# uncomment to force a specific HDMI mode (this will force VGA) +#hdmi_group=1 +#hdmi_mode=1 -## framebuffer_ignore_alpha -## Set to 1 to disable alpha channel. Helps with 32bit. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable Alpha Channel (Default) -## 1 Disable Alpha Channel -## -#framebuffer_ignore_alpha=0 +# uncomment to force a HDMI mode rather than DVI. This can make audio work in +# DMT (computer monitor) modes +#hdmi_drive=2 -################################################################################ -## General Video Settings -################################################################################ +# uncomment to increase signal to HDMI, if you have interference, blanking, or +# no display +#config_hdmi_boost=4 -## display_rotate -## Rotate the display clockwise or flip the display. -## The 90 and 270 degrees rotation options require additional memory on GPU, -## so won't work with the 16M GPU split. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 0 degrees (Default) -## 1 90 degrees -## 2 180 degrees -## 3 270 degrees -## 0x10000 Horizontal flip -## 0x20000 Vertical flip -## -#display_rotate=0 +# uncomment for composite PAL +#sdtv_mode=2 -## dispmanx_offline -## Set to "1" to enable offline compositing -## -## Default 0 -## -#dispmanx_offline=0 +#uncomment to overclock the arm. 700 MHz is the default. +#arm_freq=800 -################################################################################ -## Licensed Codecs -## -## Hardware decoding of additional codecs can be enabled by purchasing a -## license that is locked to the CPU serial number of your Raspberry Pi. -## -## Up to 8 licenses per CODEC can be specified as a comma seperated list. -## -################################################################################ +# Uncomment some or all of these to enable the optional hardware interfaces +#dtparam=i2c_arm=on +#dtparam=i2s=on +#dtparam=spi=on -## decode_MPG2 -## License key to allow hardware MPEG-2 decoding. -## -#decode_MPG2=0x12345678 +# Uncomment this to enable the lirc-rpi module +#dtoverlay=lirc-rpi -## decode_WVC1 -## License key to allow hardware VC-1 decoding. -## -#decode_WVC1=0x12345678 +# Additional overlays and parameters are documented /boot/overlays/README -################################################################################ -## Camera Settings -################################################################################ - -## start_x -## Set to "1" to enable the camera module. -## -## Enabling the camera requires gpu_mem option to be specified with a value -## of at least 128. -## -## Default 0 -## -#start_x=0 - -## disable_camera_led -## Turn off the red camera led when recording video or taking a still -## picture. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 LED enabled (Default) -## 1 LED disabled -## -#disable_camera_led=1 - -################################################################################ -## Test Settings -################################################################################ - -## test_mode -## Enable test sound/image during boot for manufacturing test. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disable Test Mod (Default) -## 1 Enable Test Mode -## -#test_mode=0 - -################################################################################ -## Memory Settings -################################################################################ - -## disable_l2cache -## Disable arm access to GPU's L2 cache. Needs corresponding L2 disabled -## kernel. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable L2 Cache (Default) -## 1 Disable L2 cache -## -#disable_l2cache=0 - -## gpu_mem -## GPU memory allocation in MB for all board revisions. -## -## Default 64 -## -#gpu_mem=128 - -## gpu_mem_256 -## GPU memory allocation in MB for 256MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_256=192 - -## gpu_mem_512 -## GPU memory allocation in MB for 512MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_512=448 - -## gpu_mem_1024 -## GPU memory allocation in MB for 1024MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_1024=944 - -## disable_pvt -## Disable adjusting the refresh rate of RAM every 500ms -## (measuring RAM temparature). -## -#disable_pvt=1 - -################################################################################ -## CMA - Dynamic Memory Split -## -## CMA enables dynamic management of the ARM and GPU memory split at runtime. -## -## The following options need to be in cmdline.txt for CMA to work: -## coherent_pool=6M smsc95xx.turbo_mode=N -## -################################################################################ - -## cma_lwm -## When GPU has less than cma_lwm (low water mark) memory available it -## will request some from ARM. -## -#cma_lwm=16 - -## cma_hwm -## When GPU has more than cma_hwm (high water mark) memory available it -## will release some to ARM. -## -#cma_hwm=32 - -################################################################################ -## Boot Option Settings -################################################################################ - -## init_uart_baud -## Initial uart baud rate. -## -## Default 115200 -## -#init_uart_baud=115200 - -## init_uart_clock -## Initial uart clock. -## -## Default 3000000 (3MHz) -## -#init_uart_clock=3000000 - -## init_emmc_clock -## Initial emmc clock, increasing this can speedup your SD-card. -## -## Default 100000000 (100mhz) -## -#init_emmc_clock=100000000 - -## boot_delay -## Wait for a given number of seconds in start.elf before loading -## kernel.img. -## -## delay = (1000 * boot_delay) + boot_delay_ms -## -## Default 1 -## -#boot_delay=0 - -## boot_delay_ms -## Wait for a given number of milliseconds in start.elf before loading -## kernel.img. -## -## delay = (1000 * boot_delay) + boot_delay_ms -## -## Default 0 -## -#boot_delay_ms=0 - -## avoid_safe_mode -## Adding a jumper between pins 5 & 6 of P1 enables a recovery Safe Mode. -## If pins 5 & 6 are used for connecting to external devices (e.g. GPIO), -## then this setting can be used to ensure Safe Mode is not triggered. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Respect Safe Mode input (Default) -## 1 Ignore Safe Mode input -## -#avoid_safe_mode=1 - -## disable_splash -## Avoids the rainbow splash screen on boot. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Splash screen enabled (Default) -## 1 Splash screen disabled -## -disable_splash=1 - -################################################################################ -## Overclocking Settings -## -## ARM, SDRAM and GPU each have their own PLLs and can have unrelated -## frequencies. -## -## The GPU core, h264, v3d and isp share a PLL, so need to have related -## frequencies. -## pll_freq = floor(2400 / (2 * core_freq)) * (2 * core_freq) -## gpu_freq = pll_freq / [even number] -## -## The effective gpu_freq is automatically rounded to nearest even integer, so -## asking for core_freq = 500 and gpu_freq = 300 will result in divisor of -## 2000/300 = 6.666 => 6 and so 333.33MHz. -## -## -## Standard Profiles: -## arm_freq core_freq sdram_freq over_voltage -## ------------------------------------------------------------------------- -## None 700 250 400 0 -## Modest 800 300 400 0 -## Medium 900 333 450 2 -## High 950 450 450 6 -## Turbo 1000 500 500 6 -## -################################################################################ - -## force_turbo -## Control the kernel "ondemand" governor. It has no effect if no overclock -## settings are specified. -## May set warrany bit. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable dynamic clocks and voltage for the ARM core, GPU core and -## SDRAM (Default). -## Overclocking of h264_freq, v3d_freq and isp_freq is ignored. -## 1 Disable dynamic clocks and voltage for the ARM core, GPU core -## and SDRAM. -## Overclocking of h264_freq, v3d_freq and isp_freq is allowed. -## -#force_turbo=0 - -## initial_turbo -## Enables turbo mode from boot for the given value in seconds (up to 60) -## or until cpufreq sets a frequency. Can help with sdcard corruption if -## overclocked. -## -## Default 0 -## -#initial_turbo=0 - -## temp_limit -## Overheat protection. Sets clocks and voltages to default when the SoC -## reaches this Celsius value. -## Setting this higher than default voids warranty. -## -## Default 85 -## -#temp_limit=85 - -## arm_freq -## Frequency of ARM in MHz. -## -## Default 700. -## -#arm_freq=700 - -## arm_freq_min -## Minimum frequency of ARM in MHz (used for dynamic clocking). -## -## Default 700. -## -#arm_freq_min=700 - -## gpu_freq -## Sets core_freq, h264_freq, isp_freq, v3d_freq together. -## -## Default 250. -## -#gpu_freq=250 - -## core_freq -## Frequency of GPU processor core in MHz. It has an impact on ARM -## performance since it drives L2 cache. -## -## Default 250. -## -#core_freq=250 - -## core_freq_min -## Minimum frequency of GPU processor core in MHz (used for dynamic -## clocking). It has an impact on ARM performance since it drives L2 cache. -## -## Default 250. -## -#core_freq_min=250 - -## h264_freq -## Frequency of hardware video block in MHz. -## -## Default 250. -## -#h264_freq=250 - -## isp_freq -## Frequency of image sensor pipeline block in MHz. -## -## Default 250. -## -#isp_freq=250 - -## v3d_freq -## Frequency of 3D block in MHz. -## -## Default 250. -## -#v3d_freq=250 - -## sdram_freq -## Frequency of SDRAM in MHz. -## -## Default 400. -## -#sdram_freq=400 - -## sdram_freq_min -## Minimum frequency of SDRAM in MHz (used for dynamic clocking). -## -## Default 400. -## -#sdram_freq_min=400 - -## avoid_pwm_pll -## Don't dedicate a pll to PWM audio. This will reduce analogue audio -## quality slightly. The spare PLL allows the core_freq to be set -## independently from the rest of the gpu allowing more control over -## overclocking. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Linked core_freq (Default) -## 1 Unlinked core_freq -## -#avoid_pwm_pll=1 - -################################################################################ -## Voltage Settings -################################################################################ - -## current_limit_override -## Disables SMPS current limit protection. Can help if you are currently -## hitting a reboot failure when overclocking too high. -## May set warrany bit. -## -#current_limit_override=0x5A000020 - -## over_voltage -## ARM/GPU core voltage adjust. -## May set warrany bit. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V (requires force_turbo=1 or current_limit_override) -## 8 1.4 V (requires force_turbo=1 or current_limit_override) -## -#over_voltage=0 - -## over_voltage_min -## Minimum ARM/GPU core voltage adjust (used for dynamic clocking). -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V (requires force_turbo=1) -## 8 1.4 V (requires force_turbo=1) -## -#over_voltage_min=0 - -## over_voltage_sdram -## Sets over_voltage_sdram_c, over_voltage_sdram_i, over_voltage_sdram_p -## together -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram=0 - -## over_voltage_sdram_c -## SDRAM controller voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_c=0 - -## over_voltage_sdram_i -## SDRAM I/O voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_i=0 - -## over_voltage_sdram_p -## SDRAM phy voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_p=0 - -################################################################################ -## USB Power -################################################################################ - -## max_usb_current -## When set to 1, change the output current limit (for all 4 USB -## ports combined) from 600mA to double that, 1200mA. -## -## This option is not available for Model A/B boards. -## -## Default 0. -## -#max_usb_current=0 - -################################################################################ -## Base Device Tree Parameters -################################################################################ - -## audio -## Enable the onboard ALSA audio -## -## Default off. -## +# Enable audio (loads snd_bcm2835) dtparam=audio=on -## i2c_arm -## Enable the ARM's i2c interface -## -## Default off. -## -dtparam=i2c_arm=on +[pi4] +# Enable DRM VC4 V3D driver on top of the dispmanx display stack +dtoverlay=vc4-fkms-v3d +max_framebuffers=2 -## i2c_vc -## Enable the i2c interface -## -## Usually reserved for the VideoCore processor -## -## Default off. -## -#dtparam=i2c_vc=off - -## i2c_arm_baudrate -## Set the baudrate of the ARM's i2c interface -## -## Default 100000. -## -#dtparam=i2c_arm_baudrate=100000 - -## i2c_vc_baudrate -## Set the baudrate of the VideoCore i2c interface -## -## Default 100000. -## -#dtparam=i2c_vc_baudrate=100000 - -## i2s -## Set to "on" to enable the i2s interface -## -## Default off. -## -#dtparam=i2s=off - -## spi -## Set to "on" to enable the spi interfaces -## -## Default off. -## -dtparam=spi=on - -## random -## Set to "on" to enable the hardware random -## -## Default off. -## -#dtparam=random=off - -## uart0 -## Set to "off" to disable uart0 -## -## Default on. -## -#dtparam=uart0=on - -## watchdog -## Set to "on" to enable the hardware watchdog -## -## Default off. -## -#dtparam=watchdog=off - -## act_led_trigger -## Choose which activity the LED tracks. -## -## Use "heartbeat" for a nice load indicator. -## -## Default mmc. -## -#dtparam=act_led_trigger=mmc - -## act_led_activelow -## Set to "on" to invert the sense of the LED -## -## Default off. -## -#dtparam=act_led_activelow=off - -## act_led_gpio -## Set which GPIO to use for the activity LED -## -## In case you want to connect it to an external device -## -## Default 16 on a non-Plus board, 47 on a Plus or Pi 2. -## -#dtparam=act_led_gpio=47 - -## pwr_led_trigger -## Choose which activity the LED tracks. -## -## Use "heartbeat" for a nice load indicator. -## -## Not available on Model A/B boards. -## -## Default mmc. -## -#dtparam=pwr_led_trigger=mmc - -## pwr_led_activelow -## Set to "on" to invert the sense of the LED -## -## Not available on Model A/B boards. -## -## Default off. -## -#dtparam=pwr_led_activelow=off - -## pwr_led_gpio -## Set which GPIO to use for the PWR LED -## -## In case you want to connect it to an external device -## -## Not available on Model A/B boards. -## -## Default 35. -## -#dtparam=pwr_led_gpio=35 +[all] +#dtoverlay=vc4-fkms-v3d diff --git a/buildroot-external/board/raspberrypi/hassos-hook.sh b/buildroot-external/board/raspberrypi/hassos-hook.sh index f9ca9df73..e591cda90 100755 --- a/buildroot-external/board/raspberrypi/hassos-hook.sh +++ b/buildroot-external/board/raspberrypi/hassos-hook.sh @@ -28,7 +28,7 @@ function hassos_pre_image() { # Enable 64bit support if [[ "${BOARD_ID}" =~ "64" ]]; then - echo "arm_64bit=1" >> "${BOOT_DATA}/config.txt" + sed -i "s|#arm_64bit|arm_64bit|g" "${BOOT_DATA}/config.txt" fi } From 49948b577e6b7aec16f12c9f187c8ff8f275a0d7 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Sep 2019 16:11:36 +0200 Subject: [PATCH 04/43] Remove ModemManager (#474) --- buildroot-external/configs/intel_nuc_defconfig | 1 - buildroot-external/configs/odroid_c2_defconfig | 1 - buildroot-external/configs/odroid_xu4_defconfig | 1 - buildroot-external/configs/opi_prime_defconfig | 1 - buildroot-external/configs/ova_defconfig | 1 - buildroot-external/configs/rpi0_w_defconfig | 1 - buildroot-external/configs/rpi2_defconfig | 1 - buildroot-external/configs/rpi3_64_defconfig | 1 - buildroot-external/configs/rpi3_defconfig | 1 - buildroot-external/configs/rpi4_64_defconfig | 1 - buildroot-external/configs/rpi4_defconfig | 1 - buildroot-external/configs/rpi_defconfig | 1 - buildroot-external/configs/tinker_defconfig | 1 - 13 files changed, 13 deletions(-) diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index 4ac5086db..df78e86ca 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -62,7 +62,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index bd6275c00..11c9c66a2 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -56,7 +56,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 3463389ed..55e66d8bc 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 6df617f4f..e0459eebc 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -78,7 +78,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index 8bb61c071..a9b4d060c 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -52,7 +52,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 377cc84cc..9fbd82481 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index c44f3515e..8d792599d 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -58,7 +58,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 0f551aa26..a60826aa9 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index d617446dd..835612849 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 08b4d0d6b..18f9d222a 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -60,7 +60,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index 5e29b0f2f..a106ca0d7 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -60,7 +60,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 31de55531..90ef94aff 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -58,7 +58,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index e46b2ec4e..f6408a10f 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -59,7 +59,6 @@ BR2_PACKAGE_DROPBEAR=y # BR2_PACKAGE_DROPBEAR_CLIENT is not set # BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y From 756a0c9b1302a27ba130f33c24545e8e01877405 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Sep 2019 14:20:36 +0000 Subject: [PATCH 05/43] RaspberryPi: Update kernel bd3452c84c206a171fa4cf5f6ddfab5687667228 --- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 9fbd82481..d77018c5c 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 8d792599d..070f7af2f 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index a60826aa9..71eea7135 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 835612849..d313c3ec8 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 18f9d222a..f576a792f 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index a106ca0d7..70f31599d 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 90ef94aff..bbb3d18a5 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $ BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="64f2b1b0a728a13373f9c74c6247ecf17af2caef" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y From dfe261a7152c27e3b36a89a510bb649781ce5270 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Sep 2019 16:34:12 +0200 Subject: [PATCH 06/43] rpi-update-firmware (#475) --- Documentation/kernel.md | 2 +- ...0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch | 4 ++-- buildroot/package/rpi-firmware/rpi-firmware.hash | 2 +- buildroot/package/rpi-firmware/rpi-firmware.mk | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/kernel.md b/Documentation/kernel.md index fd03de1a9..2c402f1c1 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -4,7 +4,7 @@ | Board | Version | |-------|---------| | Open Virtual Applicance | 4.19.68 | -| Raspberry Pi | 4.19.67 | +| Raspberry Pi | 4.19.71 | | Tinker Board | 4.19.68 | | Odroid-C2 | 4.19.68 | | Odroid-XU4 | 4.19.68 | diff --git a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch index cdcadaccc..33cba8445 100644 --- a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch +++ b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch @@ -38,7 +38,7 @@ index 9988dda717..3eae7e270b 100644 @@ -1,2 +1,2 @@ # Locally computed -sha256 f1d631920ed4ae15f368ba7b8b3caa4ed604f5223372cc6debbd39a101eb8d74 rpi-firmware-81cca1a9380c828299e884dba5efd0d4acb39e8d.tar.gz -+sha256 25d5cdeb0cf37499f8b6ca85c43a5ccaa0be55c9c33a97ceac7ba93954f890c2 rpi-firmware-0b0ec99a776f30c5b9f80e5447e9e8fecb80f71a.tar.gz ++sha256 3556ea3c611864cd1d713a12909519071775e84112d177a7ae23c0c7674256dc rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 630bc670ca..fd2970333e 100644 --- a/package/rpi-firmware/rpi-firmware.mk @@ -48,7 +48,7 @@ index 630bc670ca..fd2970333e 100644 ################################################################################ -RPI_FIRMWARE_VERSION = 81cca1a9380c828299e884dba5efd0d4acb39e8d -+RPI_FIRMWARE_VERSION = 0b0ec99a776f30c5b9f80e5447e9e8fecb80f71a ++RPI_FIRMWARE_VERSION = 3bba1909a004fb34d5b01db2c319976f33d8eb1d RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom diff --git a/buildroot/package/rpi-firmware/rpi-firmware.hash b/buildroot/package/rpi-firmware/rpi-firmware.hash index d4c69b081..48fa8c9b9 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.hash +++ b/buildroot/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 25d5cdeb0cf37499f8b6ca85c43a5ccaa0be55c9c33a97ceac7ba93954f890c2 rpi-firmware-0b0ec99a776f30c5b9f80e5447e9e8fecb80f71a.tar.gz +sha256 3556ea3c611864cd1d713a12909519071775e84112d177a7ae23c0c7674256dc rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz diff --git a/buildroot/package/rpi-firmware/rpi-firmware.mk b/buildroot/package/rpi-firmware/rpi-firmware.mk index c1356e4ca..e9aed2fad 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.mk +++ b/buildroot/package/rpi-firmware/rpi-firmware.mk @@ -4,7 +4,7 @@ # ################################################################################ -RPI_FIRMWARE_VERSION = 0b0ec99a776f30c5b9f80e5447e9e8fecb80f71a +RPI_FIRMWARE_VERSION = 3bba1909a004fb34d5b01db2c319976f33d8eb1d RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom From 629f13f3d990f302ce5e11e3aa9bb761c223f5e5 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Sep 2019 16:45:44 +0200 Subject: [PATCH 07/43] Update kernels to 4.19.72 (#476) --- Documentation/kernel.md | 12 ++++++------ buildroot-external/configs/intel_nuc_defconfig | 2 +- buildroot-external/configs/odroid_c2_defconfig | 2 +- buildroot-external/configs/odroid_xu4_defconfig | 2 +- buildroot-external/configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- 7 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/kernel.md b/Documentation/kernel.md index 2c402f1c1..e61e7fa23 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -3,10 +3,10 @@ | Board | Version | |-------|---------| -| Open Virtual Applicance | 4.19.68 | +| Open Virtual Applicance | 4.19.72 | | Raspberry Pi | 4.19.71 | -| Tinker Board | 4.19.68 | -| Odroid-C2 | 4.19.68 | -| Odroid-XU4 | 4.19.68 | -| Orangepi-Prime | 4.19.68 | -| Intel NUC | 4.19.68 | +| Tinker Board | 4.19.72 | +| Odroid-C2 | 4.19.72 | +| Odroid-XU4 | 4.19.72 | +| Orangepi-Prime | 4.19.72 | +| Intel NUC | 4.19.72 | diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index df78e86ca..7aca35f63 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_DEFCONFIG="x86_64" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 11c9c66a2..9feeb6b10 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 55e66d8bc..72d75a026 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index e0459eebc..15077fcac 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -37,7 +37,7 @@ BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/ BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot.config" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun50i-h5-orangepi-prime" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index a9b4d060c..dbbc92cb8 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_DEFCONFIG="x86_64" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index f6408a10f..b2431aa78 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -21,7 +21,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.68" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" From 6668d77b936f3fd4d127178c669de6bcd5872866 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Sep 2019 15:57:15 +0000 Subject: [PATCH 08/43] Fix rpi firmware checksum --- .../0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch | 2 +- buildroot/package/rpi-firmware/rpi-firmware.hash | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch index 33cba8445..9a251ebc4 100644 --- a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch +++ b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch @@ -38,7 +38,7 @@ index 9988dda717..3eae7e270b 100644 @@ -1,2 +1,2 @@ # Locally computed -sha256 f1d631920ed4ae15f368ba7b8b3caa4ed604f5223372cc6debbd39a101eb8d74 rpi-firmware-81cca1a9380c828299e884dba5efd0d4acb39e8d.tar.gz -+sha256 3556ea3c611864cd1d713a12909519071775e84112d177a7ae23c0c7674256dc rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz ++sha256 e2b4022441b39e5879776e7c7d45037a6feb2c849405cde37b7fd657b4a26a23 rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 630bc670ca..fd2970333e 100644 --- a/package/rpi-firmware/rpi-firmware.mk diff --git a/buildroot/package/rpi-firmware/rpi-firmware.hash b/buildroot/package/rpi-firmware/rpi-firmware.hash index 48fa8c9b9..921917e1f 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.hash +++ b/buildroot/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 3556ea3c611864cd1d713a12909519071775e84112d177a7ae23c0c7674256dc rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz +sha256 e2b4022441b39e5879776e7c7d45037a6feb2c849405cde37b7fd657b4a26a23 rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz From e71400cd5cd8ed378e92f93d56e9bfdb363f6a62 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Sep 2019 14:08:47 +0200 Subject: [PATCH 09/43] Fix handling with FB on RPi4 (#477) --- buildroot-external/board/intel/nuc/kernel.config | 2 -- buildroot-external/board/raspberrypi/boot-env.txt | 6 +----- buildroot-external/board/raspberrypi/kernel.config | 1 - buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/kernel/hassos.config | 2 ++ 6 files changed, 5 insertions(+), 10 deletions(-) diff --git a/buildroot-external/board/intel/nuc/kernel.config b/buildroot-external/board/intel/nuc/kernel.config index 6425a815d..43e1899d7 100644 --- a/buildroot-external/board/intel/nuc/kernel.config +++ b/buildroot-external/board/intel/nuc/kernel.config @@ -3,8 +3,6 @@ CONFIG_EFI_STUB=y CONFIG_SCSI_LOWLEVEL=y CONFIG_USB_XHCI_HCD=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y - CONFIG_IGB=y CONFIG_IWLWIFI=m diff --git a/buildroot-external/board/raspberrypi/boot-env.txt b/buildroot-external/board/raspberrypi/boot-env.txt index 5f10cf891..e8922832a 100644 --- a/buildroot-external/board/raspberrypi/boot-env.txt +++ b/buildroot-external/board/raspberrypi/boot-env.txt @@ -62,10 +62,6 @@ kernel=u-boot.bin # Enable audio (loads snd_bcm2835) dtparam=audio=on -[pi4] -# Enable DRM VC4 V3D driver on top of the dispmanx display stack -dtoverlay=vc4-fkms-v3d -max_framebuffers=2 - [all] #dtoverlay=vc4-fkms-v3d +#max_framebuffers=2 diff --git a/buildroot-external/board/raspberrypi/kernel.config b/buildroot-external/board/raspberrypi/kernel.config index 37e0f19f0..323b34ea8 100644 --- a/buildroot-external/board/raspberrypi/kernel.config +++ b/buildroot-external/board/raspberrypi/kernel.config @@ -1,3 +1,2 @@ -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_FB_SIMPLE=y # CONFIG_FB_BCM2708 is not set \ No newline at end of file diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index f576a792f..370bfb33a 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2711-rpi-4-b" diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index 70f31599d..e68a78417 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2711-rpi-4-b" diff --git a/buildroot-external/kernel/hassos.config b/buildroot-external/kernel/hassos.config index b55fff013..9e4a40bf0 100644 --- a/buildroot-external/kernel/hassos.config +++ b/buildroot-external/kernel/hassos.config @@ -4,6 +4,8 @@ CONFIG_CMDLINE="" CONFIG_ZRAM=y CONFIG_ZSMALLOC=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y + CONFIG_MISC_FILESYSTEMS=y CONFIG_BLOCK=y CONFIG_EXT4_FS=y From 956badb2fd30737ed1fc6802795ae919a8fe6938 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Sep 2019 14:11:53 +0200 Subject: [PATCH 10/43] Change to RC --- buildroot-external/meta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/buildroot-external/meta b/buildroot-external/meta index 7bf80b4ca..58ab9d028 100644 --- a/buildroot-external/meta +++ b/buildroot-external/meta @@ -4,4 +4,4 @@ VERSION_BUILD=5 HASSOS_NAME="HassOS" HASSOS_ID="hassos" -DEPLOYMENT="development" +DEPLOYMENT="staging" From c12ae11ed776bad70df082c9db23703e59288bb0 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Sep 2019 12:13:28 +0000 Subject: [PATCH 11/43] OS: Update supervisor 187 --- buildroot-external/configs/intel_nuc_defconfig | 2 +- buildroot-external/configs/odroid_c2_defconfig | 2 +- buildroot-external/configs/odroid_xu4_defconfig | 2 +- buildroot-external/configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index 7aca35f63..237ba0adc 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -94,7 +94,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/intel-nuc-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 9feeb6b10..2613b00f6 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -88,7 +88,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-c2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 72d75a026..136f700a4 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-xu-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 15077fcac..c970fd173 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -102,7 +102,7 @@ BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HOST_SWIG=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/orangepi-prime-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index dbbc92cb8..c40d4693b 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -84,7 +84,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qemux86-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index d77018c5c..9bfd4b661 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -91,7 +91,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 070f7af2f..3c61da2d5 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -90,7 +90,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 71eea7135..0fd2dbb7d 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -91,7 +91,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index d313c3ec8..077088194 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -91,7 +91,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 370bfb33a..8e35331d7 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index e68a78417..29dae1b38 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index bbb3d18a5..fad21e5a7 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -90,7 +90,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index b2431aa78..384d4b3ac 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -95,7 +95,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="184" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" From a13089516e817375b42e0cbf3311affe5aba2dbf Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Sep 2019 14:15:47 +0200 Subject: [PATCH 12/43] Bump version 4.0 / development --- buildroot-external/meta | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/buildroot-external/meta b/buildroot-external/meta index 58ab9d028..dcbfbbb4c 100644 --- a/buildroot-external/meta +++ b/buildroot-external/meta @@ -1,7 +1,7 @@ -VERSION_MAJOR=3 -VERSION_BUILD=5 +VERSION_MAJOR=4 +VERSION_BUILD=0 HASSOS_NAME="HassOS" HASSOS_ID="hassos" -DEPLOYMENT="staging" +DEPLOYMENT="development" From 60e4d1a3cd7476de44a80dc7e782f042f1c3aaef Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Mon, 23 Sep 2019 09:11:45 +0200 Subject: [PATCH 13/43] Don't hang on serial interupts (#483) --- buildroot-external/bootloader/uboot.config | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/buildroot-external/bootloader/uboot.config b/buildroot-external/bootloader/uboot.config index 3887259b9..c7ea69e70 100644 --- a/buildroot-external/bootloader/uboot.config +++ b/buildroot-external/bootloader/uboot.config @@ -3,7 +3,7 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_EXPERT is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_BOOTDELAY=2 +CONFIG_BOOTDELAY=-2 CONFIG_SYS_PROMPT="HassOS> " # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION=y @@ -11,6 +11,5 @@ CONFIG_FS_EXT4=y CONFIG_FS_FAT=y # CONFIG_ENV_IS_IN_FAT is not set # CONFIG_ENV_IS_IN_EXT4 is not set -CONFIG_CONSOLE_SCROLL_LINES=10 # CONFIG_EFI_LOADER is not set CONFIG_CMD_SETEXPR=y From 3e1adf8325351b49c735bc23e3b9cf68521b7e08 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Wed, 25 Sep 2019 23:03:14 +0200 Subject: [PATCH 14/43] Delete build.md --- Documentation/build.md | 21 --------------------- 1 file changed, 21 deletions(-) delete mode 100644 Documentation/build.md diff --git a/Documentation/build.md b/Documentation/build.md deleted file mode 100644 index fc66da92d..000000000 --- a/Documentation/build.md +++ /dev/null @@ -1,21 +0,0 @@ -# Building - -Running `sudo ./enter.sh` will get you into the build Docker container. -`make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig` - -## Scripts - - - -## Helpers - -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external menuconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-menuconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-menuconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-menuconfig` - -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external savedefconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-update-defconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-update-defconfig` -- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-update-config` From 4efd038805457dc861b91943d90b54dbfe079acc Mon Sep 17 00:00:00 2001 From: capstan1 Date: Thu, 26 Sep 2019 11:15:18 +0200 Subject: [PATCH 15/43] make clear the usb drive needs to be connected only while configuration (#442) --- Documentation/configuration.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/configuration.md b/Documentation/configuration.md index 84880db69..06609b785 100644 --- a/Documentation/configuration.md +++ b/Documentation/configuration.md @@ -3,7 +3,7 @@ ## Automatic You can use an USB drive with HassOS to configure network options, SSH access to the host and to install updates. -Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG`. Alternative you can create a `CONFIG` folder inside boot partition. Use the following directory structure within the USB drive: +Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG` (in all capitals). Alternative you can create a `CONFIG` folder inside boot partition. Use the following directory structure within the USB drive: ```text network/ @@ -23,8 +23,8 @@ hassos-xy.raucb - The `timesyncd.conf` file allow you to set different NTP servers. HassOS won't boot without correct working time servers! - The `hassos-*.raucb` file is a firmware OTA update which will be installed. These can be found on on the [release][hassos-release] page. -You can put this USB stick into the device and it will be read on startup. You can also trigger this process later over the -API/UI or by calling `systemctl restart hassos-config` on the host. +You can put this USB stick into the device and it will be read on startup and files written to the correct places. You can also trigger this process later over the +API/UI or by calling `systemctl restart hassos-config` on the host. *The USB Stick just needs to be insterted to the device during this setup process and can be disconnected afterwards.* ## Local From 2fd14442c7fbe4fa08f722b48502bbcdf969f07c Mon Sep 17 00:00:00 2001 From: capstan1 Date: Thu, 26 Sep 2019 11:16:14 +0200 Subject: [PATCH 16/43] new subheading 'configure network' (#443) added a new subheading to make clear what the page is about --- Documentation/network.md | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/network.md b/Documentation/network.md index 2bfae042a..81866c124 100644 --- a/Documentation/network.md +++ b/Documentation/network.md @@ -1,5 +1,6 @@ # Network +## Configure Network HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive and imported to the host as described in [Configuration][configuration-usb]. ## Configuration Examples From 501b4bd9f40d1f6a8f371f2053f7918e3c2c9ee7 Mon Sep 17 00:00:00 2001 From: mbo18 Date: Thu, 26 Sep 2019 11:29:54 +0200 Subject: [PATCH 17/43] Update network.md (#446) * Update network.md Solve https://community.home-assistant.io/t/setting-a-static-ip-on-hassio-hassos/63378 * Update network.md Forgot to update the text --- Documentation/network.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/network.md b/Documentation/network.md index 81866c124..09f3d3b95 100644 --- a/Documentation/network.md +++ b/Documentation/network.md @@ -75,10 +75,10 @@ Replace the following configuration: ```ini [ipv4] method=manual -address=192.168.1.111/24,192.168.1.1 +address=192.168.1.111/24;192.168.1.1 dns=8.8.8.8;8.8.4.4; ``` -For address, the value before the comma is the IP address and subnet prefix bitlength; the second value is the IP address of the gateway. +For address, the value before the semicolon is the IP address and subnet prefix bitlength; the second value is the IP address of the gateway. ## Tips From d44d271c28bcb27d79c0a8ba02ed9b22d0ed07e8 Mon Sep 17 00:00:00 2001 From: Oscar Calvo <2091582+ocalvo@users.noreply.github.com> Date: Mon, 30 Sep 2019 13:57:45 -0700 Subject: [PATCH 18/43] Add support for SMS integrations with USB/GSM modem dongles (#485) * Add support for USB/GSM modem dongles * Apply PR feedback --- buildroot-external/configs/intel_nuc_defconfig | 2 ++ buildroot-external/configs/odroid_c2_defconfig | 2 ++ buildroot-external/configs/odroid_xu4_defconfig | 2 ++ buildroot-external/configs/opi_prime_defconfig | 2 ++ buildroot-external/configs/ova_defconfig | 2 ++ buildroot-external/configs/rpi0_w_defconfig | 2 ++ buildroot-external/configs/rpi2_defconfig | 2 ++ buildroot-external/configs/rpi3_64_defconfig | 2 ++ buildroot-external/configs/rpi3_defconfig | 2 ++ buildroot-external/configs/rpi4_64_defconfig | 2 ++ buildroot-external/configs/rpi4_defconfig | 2 ++ buildroot-external/configs/rpi_defconfig | 2 ++ buildroot-external/configs/tinker_defconfig | 2 ++ buildroot-external/kernel/device-support.config | 3 +++ 14 files changed, 29 insertions(+) diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index 237ba0adc..aa021d7c9 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -76,6 +76,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 2613b00f6..08ef17591 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -69,6 +69,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 136f700a4..ee9b7d868 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -72,6 +72,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index c970fd173..9e0382ac9 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -90,6 +90,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index c40d4693b..8190d1d72 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -66,6 +66,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 9bfd4b661..9f9bbd762 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -72,6 +72,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 3c61da2d5..af67b284b 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -71,6 +71,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 0fd2dbb7d..501eea8f1 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -72,6 +72,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 077088194..7e151fe63 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -72,6 +72,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 8e35331d7..85286d56b 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -73,6 +73,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index 29dae1b38..c8ff54e6f 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -73,6 +73,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index fad21e5a7..7b5ededce 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -71,6 +71,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index 384d4b3ac..61ec6d224 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -72,6 +72,8 @@ BR2_PACKAGE_SYSTEMD_RANDOMSEED=y BR2_PACKAGE_SYSTEMD_COREDUMP=y BR2_PACKAGE_UTIL_LINUX_PARTX=y BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y BR2_TARGET_ROOTFS_SQUASHFS=y BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y # BR2_TARGET_ROOTFS_TAR is not set diff --git a/buildroot-external/kernel/device-support.config b/buildroot-external/kernel/device-support.config index 31edda16f..6e75350d5 100644 --- a/buildroot-external/kernel/device-support.config +++ b/buildroot-external/kernel/device-support.config @@ -1,9 +1,12 @@ CONFIG_USB_SERIAL=y CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_WWAN=m CONFIG_USB_SERIAL_SIMPLE=m CONFIG_USB_SERIAL_CP210X=m CONFIG_USB_SERIAL_FTDI_SIO=m CONFIG_USB_SERIAL_PL2303=m CONFIG_USB_SERIAL_CH341=m CONFIG_USB_ACM=m +CONFIG_USB_USBNET=m From c42dba16232fdd3cdbd58e4bf5266eb0dcfb17d4 Mon Sep 17 00:00:00 2001 From: Robin Harmsen Date: Thu, 3 Oct 2019 12:16:13 +0200 Subject: [PATCH 19/43] Update azure-pipelines-release.yml (#487) --- azure-pipelines-release.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/azure-pipelines-release.yml b/azure-pipelines-release.yml index 79ca9b74a..0c8635a09 100644 --- a/azure-pipelines-release.yml +++ b/azure-pipelines-release.yml @@ -11,7 +11,7 @@ pr: none variables: - name: versionGHR - value: 'v0.12.1' + value: 'v0.13.0' - group: github - group: hassos From 712dcf9f74497eef6a75ed1e76f8ae8817ae3ee6 Mon Sep 17 00:00:00 2001 From: Robin Harmsen Date: Thu, 3 Oct 2019 12:16:30 +0200 Subject: [PATCH 20/43] Update azure-pipelines-ci.yml (#486) --- azure-pipelines-ci.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/azure-pipelines-ci.yml b/azure-pipelines-ci.yml index 85f06f938..6b9c1e0d1 100644 --- a/azure-pipelines-ci.yml +++ b/azure-pipelines-ci.yml @@ -10,9 +10,9 @@ pr: variables: - name: versionHadolint - value: 'v1.16.3' + value: 'v1.17.2' - name: versionShellCheck - value: 'v0.6.0' + value: 'v0.7.0' jobs: From bf9795f70b17ab591585d1edcc21e5e5be19c4c3 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Tue, 10 Dec 2019 10:10:59 +0100 Subject: [PATCH 21/43] Update RPI firmware (#501) * Update RPI firmware * Update buildroot --- ...0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch | 4 ++-- buildroot/package/rpi-firmware/rpi-firmware.hash | 2 +- buildroot/package/rpi-firmware/rpi-firmware.mk | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch index 9a251ebc4..a3d2e7f7c 100644 --- a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch +++ b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch @@ -38,7 +38,7 @@ index 9988dda717..3eae7e270b 100644 @@ -1,2 +1,2 @@ # Locally computed -sha256 f1d631920ed4ae15f368ba7b8b3caa4ed604f5223372cc6debbd39a101eb8d74 rpi-firmware-81cca1a9380c828299e884dba5efd0d4acb39e8d.tar.gz -+sha256 e2b4022441b39e5879776e7c7d45037a6feb2c849405cde37b7fd657b4a26a23 rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz ++sha256 484d52caed909fcafbf593cc3e726ea44a9218db7f0aeec843b825797eb9b0fc rpi-firmware-9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 630bc670ca..fd2970333e 100644 --- a/package/rpi-firmware/rpi-firmware.mk @@ -48,7 +48,7 @@ index 630bc670ca..fd2970333e 100644 ################################################################################ -RPI_FIRMWARE_VERSION = 81cca1a9380c828299e884dba5efd0d4acb39e8d -+RPI_FIRMWARE_VERSION = 3bba1909a004fb34d5b01db2c319976f33d8eb1d ++RPI_FIRMWARE_VERSION = 9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom diff --git a/buildroot/package/rpi-firmware/rpi-firmware.hash b/buildroot/package/rpi-firmware/rpi-firmware.hash index 921917e1f..6a36a657e 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.hash +++ b/buildroot/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 e2b4022441b39e5879776e7c7d45037a6feb2c849405cde37b7fd657b4a26a23 rpi-firmware-3bba1909a004fb34d5b01db2c319976f33d8eb1d.tar.gz +sha256 484d52caed909fcafbf593cc3e726ea44a9218db7f0aeec843b825797eb9b0fc rpi-firmware-9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e.tar.gz diff --git a/buildroot/package/rpi-firmware/rpi-firmware.mk b/buildroot/package/rpi-firmware/rpi-firmware.mk index e9aed2fad..813e459bb 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.mk +++ b/buildroot/package/rpi-firmware/rpi-firmware.mk @@ -4,7 +4,7 @@ # ################################################################################ -RPI_FIRMWARE_VERSION = 3bba1909a004fb34d5b01db2c319976f33d8eb1d +RPI_FIRMWARE_VERSION = 9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom From 0ef7c459ca9e71fdba6566fd790be8e782a2b263 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Tue, 10 Dec 2019 10:13:08 +0100 Subject: [PATCH 22/43] Fix RPI bluetooth issues (#502) * Fix RPI bluetooth issues * Add to buildroot --- buildroot-patches/0007-rpi-use-latest-wifi-driver.patch | 4 ++-- buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.hash | 2 +- buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.mk | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/buildroot-patches/0007-rpi-use-latest-wifi-driver.patch b/buildroot-patches/0007-rpi-use-latest-wifi-driver.patch index a178305f1..0e57429b8 100644 --- a/buildroot-patches/0007-rpi-use-latest-wifi-driver.patch +++ b/buildroot-patches/0007-rpi-use-latest-wifi-driver.patch @@ -16,7 +16,7 @@ index c61a47e..84e02f3 100644 @@ -1,3 +1,3 @@ # Locally calculated -sha256 155ebd5f08b819e0ce4e1950fcc972b2086cee3c16d36aba348beba1910c1fd2 rpi-wifi-firmware-8c1e2bff1da9850f68efcfff3da5d939ec27a2ee.tar.gz -+sha256 0b2bbf0bcdb7eabc488cc96e418ee17efcd9803590abc64d055ea3b762e2411b rpi-wifi-firmware-130cb86fa30cafbd575d38865fa546350d4c5f9c.tar.gz ++sha256 26e6e4aace9c9d1e9b9b1447f57ebd743dc15f3a337deac9e77d964885fcb3b3 rpi-wifi-firmware-00daf85ffa373ecce7836df7543c6ebe4cf43639.tar.gz sha256 b16056fc91b82a0e3e8de8f86c2dac98201aa9dc3cbd33e8d38f1b087fcec30d LICENCE.broadcom_bcm43xx diff --git a/package/rpi-wifi-firmware/rpi-wifi-firmware.mk b/package/rpi-wifi-firmware/rpi-wifi-firmware.mk index 2eb8cee..da915bd 100644 @@ -28,7 +28,7 @@ index 2eb8cee..da915bd 100644 -RPI_WIFI_FIRMWARE_VERSION = 8c1e2bff1da9850f68efcfff3da5d939ec27a2ee -RPI_WIFI_FIRMWARE_SITE = $(call github,LibreELEC,brcmfmac_sdio-firmware-rpi,$(RPI_WIFI_FIRMWARE_VERSION)) -+RPI_WIFI_FIRMWARE_VERSION = 130cb86fa30cafbd575d38865fa546350d4c5f9c ++RPI_WIFI_FIRMWARE_VERSION = 00daf85ffa373ecce7836df7543c6ebe4cf43639 +RPI_WIFI_FIRMWARE_SITE = $(call github,RPi-Distro,firmware-nonfree,$(RPI_WIFI_FIRMWARE_VERSION)) RPI_WIFI_FIRMWARE_LICENSE = PROPRIETARY RPI_WIFI_FIRMWARE_LICENSE_FILES = LICENCE.broadcom_bcm43xx diff --git a/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.hash b/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.hash index 85bac3a61..90aa03218 100644 --- a/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.hash +++ b/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.hash @@ -1,3 +1,3 @@ # Locally calculated -sha256 0b2bbf0bcdb7eabc488cc96e418ee17efcd9803590abc64d055ea3b762e2411b rpi-wifi-firmware-130cb86fa30cafbd575d38865fa546350d4c5f9c.tar.gz +sha256 26e6e4aace9c9d1e9b9b1447f57ebd743dc15f3a337deac9e77d964885fcb3b3 rpi-wifi-firmware-00daf85ffa373ecce7836df7543c6ebe4cf43639.tar.gz sha256 b16056fc91b82a0e3e8de8f86c2dac98201aa9dc3cbd33e8d38f1b087fcec30d LICENCE.broadcom_bcm43xx diff --git a/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.mk b/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.mk index 745d83965..0c697bddb 100644 --- a/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.mk +++ b/buildroot/package/rpi-wifi-firmware/rpi-wifi-firmware.mk @@ -4,7 +4,7 @@ # ################################################################################ -RPI_WIFI_FIRMWARE_VERSION = 130cb86fa30cafbd575d38865fa546350d4c5f9c +RPI_WIFI_FIRMWARE_VERSION = 00daf85ffa373ecce7836df7543c6ebe4cf43639 RPI_WIFI_FIRMWARE_SITE = $(call github,RPi-Distro,firmware-nonfree,$(RPI_WIFI_FIRMWARE_VERSION)) RPI_WIFI_FIRMWARE_LICENSE = PROPRIETARY RPI_WIFI_FIRMWARE_LICENSE_FILES = LICENCE.broadcom_bcm43xx From 09cf67cb734684fb67183d0b62c957950f3e31b9 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Tue, 10 Dec 2019 09:14:09 +0000 Subject: [PATCH 23/43] RaspberryPi: Update kernel 988cc7beacc150756c3fbe40646afcf8438b741b --- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 9f9bbd762..dcda5482f 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index af67b284b..3b1f66783 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 501eea8f1..332f8b21a 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 7e151fe63..6f19e3137 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 85286d56b..4e2ca0ed8 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index c8ff54e6f..38e79278e 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 7b5ededce..498914f4e 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $ BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="bd3452c84c206a171fa4cf5f6ddfab5687667228" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" BR2_LINUX_KERNEL_LZ4=y From d340e79beae47c61ae9680b05314bc42595702a6 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Tue, 10 Dec 2019 19:07:16 +0100 Subject: [PATCH 24/43] Fix RPI issues with u-boot / firmware (#503) * Fix RPI issues with u-boot / firmware * Cleanup bluetooth handling * Use RC4 for u-boot on rpi4 --- .../board/raspberrypi/kernel.config | 2 - ...i-Disable-simple-framebuffer-support.patch | 62 ++++ ...FIG_OF_BOARD-instead-of-CONFIG_EMBED.patch | 82 +++++ .../usr/lib/udev/rules.d/99-rpi.rules | 21 ++ ...nfigs-rpi4-Add-defconfig-for-rpi4-64.patch | 65 ---- ...i-for-BCM2835-6-7-specific-configura.patch | 208 ----------- ...-dts-Add-initial-support-for-bcm2838.patch | 337 ------------------ ...83x-Define-configs-for-RaspberryPi-4.patch | 66 ---- ...283x-Define-mbox-address-for-BCM2838.patch | 34 -- ...dd-rpi_model-entry-for-RaspberryPi-4.patch | 29 -- ...ne-BCM2838_CLOCK_EMMC2-needed-for-Ra.patch | 27 -- ...ude-definition-for-additional-emmc-c.patch | 31 -- ...sdhci-Add-support-for-bcm2711-device.patch | 51 --- ...ne-device-base-addresses-for-bcm2835.patch | 63 ---- ...il-out-early-if-querying-video-infor.patch | 36 -- ...box-Correctly-wait-for-space-to-send.patch | 65 ---- ...onfig-rpi4-Add-defconfig-for-rpi4-32.patch | 63 ---- ...4-b-Use-the-emmc2-interface-for-sdhc.patch | 45 --- .../0015-rpi-Add-memory-map-for-bcm2838.patch | 58 --- ...i4-Remove-DWC2-and-USB_ETHER-configs.patch | 52 --- ...4-b-Use-the-emmc2-2811-compatible-st.patch | 27 -- .../board/raspberrypi/uboot.config | 2 - buildroot-external/configs/rpi0_w_defconfig | 8 +- buildroot-external/configs/rpi2_defconfig | 8 +- buildroot-external/configs/rpi3_64_defconfig | 8 +- buildroot-external/configs/rpi3_defconfig | 8 +- buildroot-external/configs/rpi4_64_defconfig | 6 +- buildroot-external/configs/rpi4_defconfig | 6 +- buildroot-external/configs/rpi_defconfig | 8 +- .../bluetooth-bcm43xx/bluetooth-bcm43xx | 18 - .../bluetooth-bcm43xx/bluetooth-bcm43xx.mk | 15 +- .../bluetooth-bcm43xx/bluetooth-bcm43xx.rules | 22 -- .../bluetooth-bcm43xx.service | 5 +- .../bluetooth-bcm43xx/bthelper@.service | 8 + .../{hmip-rfusb.rules => 99-hmip-rfusb.rules} | 0 35 files changed, 213 insertions(+), 1333 deletions(-) delete mode 100644 buildroot-external/board/raspberrypi/kernel.config create mode 100644 buildroot-external/board/raspberrypi/patches/uboot/0001-raspberrypi-Disable-simple-framebuffer-support.patch create mode 100644 buildroot-external/board/raspberrypi/patches/uboot/0001-rpi-Use-CONFIG_OF_BOARD-instead-of-CONFIG_EMBED.patch create mode 100644 buildroot-external/board/raspberrypi/rootfs-overlay/usr/lib/udev/rules.d/99-rpi.rules delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0001-configs-rpi4-Add-defconfig-for-rpi4-64.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0002-dts-Create-a-dtsi-for-BCM2835-6-7-specific-configura.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0003-dts-Add-initial-support-for-bcm2838.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0004-arm-mach-bcm283x-Define-configs-for-RaspberryPi-4.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0005-arm-mach-bcm283x-Define-mbox-address-for-BCM2838.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0006-rpi-Add-rpi_model-entry-for-RaspberryPi-4.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0007-dt-bindings-Define-BCM2838_CLOCK_EMMC2-needed-for-Ra.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0008-arm-bcm283x-Include-definition-for-additional-emmc-c.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0009-mmc-bcm2835_sdhci-Add-support-for-bcm2711-device.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0010-arm-bcm283x-Define-device-base-addresses-for-bcm2835.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0011-bcm2835-video-Bail-out-early-if-querying-video-infor.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0012-bcm283x-mbox-Correctly-wait-for-space-to-send.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0013-config-rpi4-Add-defconfig-for-rpi4-32.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0014-dts-bcm2838-rpi-4-b-Use-the-emmc2-interface-for-sdhc.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0015-rpi-Add-memory-map-for-bcm2838.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0016-configs-rpi4-Remove-DWC2-and-USB_ETHER-configs.patch delete mode 100644 buildroot-external/board/raspberrypi/rpi4/patches/uboot/0017-dts-bcm2838-rpi-4-b-Use-the-emmc2-2811-compatible-st.patch delete mode 100755 buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx delete mode 100644 buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.rules create mode 100644 buildroot-external/package/bluetooth-bcm43xx/bthelper@.service rename buildroot-external/rootfs-overlay/usr/lib/udev/rules.d/{hmip-rfusb.rules => 99-hmip-rfusb.rules} (100%) diff --git a/buildroot-external/board/raspberrypi/kernel.config b/buildroot-external/board/raspberrypi/kernel.config deleted file mode 100644 index 323b34ea8..000000000 --- a/buildroot-external/board/raspberrypi/kernel.config +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_FB_SIMPLE=y -# CONFIG_FB_BCM2708 is not set \ No newline at end of file diff --git a/buildroot-external/board/raspberrypi/patches/uboot/0001-raspberrypi-Disable-simple-framebuffer-support.patch b/buildroot-external/board/raspberrypi/patches/uboot/0001-raspberrypi-Disable-simple-framebuffer-support.patch new file mode 100644 index 000000000..d7a02e335 --- /dev/null +++ b/buildroot-external/board/raspberrypi/patches/uboot/0001-raspberrypi-Disable-simple-framebuffer-support.patch @@ -0,0 +1,62 @@ +From 68e65b1e3859d4baf41d1e5f6525ff7ace778ba1 Mon Sep 17 00:00:00 2001 +From: Florin Sarbu +Date: Thu, 12 Sep 2019 12:31:31 +0200 +Subject: [PATCH] raspberrypi: Disable simple framebuffer support + +On 4.19 kernels this u-boot driver clashes with bcm2708_fb. +So let's disable it from here so that we have bcm2708_fb +enabled in the kernel, just as Raspbian users might expect. +See https://github.com/raspberrypi/linux/issues/3139 + +Upstream-Status: Inappropriate [configuration] +Signed-off-by: Florin Sarbu +--- + board/raspberrypi/rpi/rpi.c | 2 +- + common/Makefile | 2 +- + include/configs/rpi.h | 4 ++-- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c +index 153a1fd..c7bd399 100644 +--- a/board/raspberrypi/rpi/rpi.c ++++ b/board/raspberrypi/rpi/rpi.c +@@ -482,7 +482,7 @@ int ft_board_setup(void *blob, bd_t *bd) + * should be more intelligent, and e.g. only do this if no enabled DT + * node exists for the "real" graphics driver. + */ +- lcd_dt_simplefb_add_node(blob); ++ //lcd_dt_simplefb_add_node(blob); + + #ifdef CONFIG_EFI_LOADER + /* Reserve the spin table */ +diff --git a/common/Makefile b/common/Makefile +index 0de60b3..2848d98 100644 +--- a/common/Makefile ++++ b/common/Makefile +@@ -50,7 +50,7 @@ ifndef CONFIG_DM_VIDEO + obj-$(CONFIG_LCD) += lcd.o lcd_console.o + endif + obj-$(CONFIG_LCD_ROTATION) += lcd_console_rotation.o +-obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o ++//obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o + obj-$(CONFIG_LYNXKDI) += lynxkdi.o + obj-$(CONFIG_MENU) += menu.o + obj-$(CONFIG_UPDATE_TFTP) += update.o +diff --git a/include/configs/rpi.h b/include/configs/rpi.h +index a38bf20..e2760b0 100644 +--- a/include/configs/rpi.h ++++ b/include/configs/rpi.h +@@ -60,8 +60,8 @@ + /* GPIO */ + #define CONFIG_BCM2835_GPIO + /* LCD */ +-#define CONFIG_LCD_DT_SIMPLEFB +-#define CONFIG_VIDEO_BCM2835 ++//#define CONFIG_LCD_DT_SIMPLEFB ++//#define CONFIG_VIDEO_BCM2835 + + #ifdef CONFIG_CMD_USB + #define CONFIG_TFTP_TSIZE +-- +2.7.4 + diff --git a/buildroot-external/board/raspberrypi/patches/uboot/0001-rpi-Use-CONFIG_OF_BOARD-instead-of-CONFIG_EMBED.patch b/buildroot-external/board/raspberrypi/patches/uboot/0001-rpi-Use-CONFIG_OF_BOARD-instead-of-CONFIG_EMBED.patch new file mode 100644 index 000000000..5bd08f82a --- /dev/null +++ b/buildroot-external/board/raspberrypi/patches/uboot/0001-rpi-Use-CONFIG_OF_BOARD-instead-of-CONFIG_EMBED.patch @@ -0,0 +1,82 @@ +From 0f45c3f2f46b62f767ef225b258f927ad88ca360 Mon Sep 17 00:00:00 2001 +From: Pascal Vizeli +Date: Tue, 10 Dec 2019 09:48:46 +0000 +Subject: [PATCH 1/1] rpi: Use CONFIG_OF_BOARD instead of CONFIG_EMBED + +Signed-off-by: Pascal Vizeli +--- + configs/rpi_0_w_defconfig | 2 +- + configs/rpi_2_defconfig | 2 +- + configs/rpi_3_32b_defconfig | 2 +- + configs/rpi_3_defconfig | 2 +- + configs/rpi_defconfig | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig +index fe5a7763a6..ed7f9381e9 100644 +--- a/configs/rpi_0_w_defconfig ++++ b/configs/rpi_0_w_defconfig +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" + CONFIG_ENV_FAT_INTERFACE="mmc" + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig +index bf331c0ad0..52e3c3b234 100644 +--- a/configs/rpi_2_defconfig ++++ b/configs/rpi_2_defconfig +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" + CONFIG_ENV_FAT_INTERFACE="mmc" + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig +index c2417a0ec9..191962f0f7 100644 +--- a/configs/rpi_3_32b_defconfig ++++ b/configs/rpi_3_32b_defconfig +@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" + CONFIG_ENV_FAT_INTERFACE="mmc" + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig +index 4fa682539c..03a2356d3d 100644 +--- a/configs/rpi_3_defconfig ++++ b/configs/rpi_3_defconfig +@@ -18,7 +18,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" + CONFIG_ENV_FAT_INTERFACE="mmc" + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig +index 2c04b3334e..bf00d8b669 100644 +--- a/configs/rpi_defconfig ++++ b/configs/rpi_defconfig +@@ -17,7 +17,7 @@ CONFIG_CMD_GPIO=y + CONFIG_CMD_MMC=y + CONFIG_CMD_USB=y + CONFIG_CMD_FS_UUID=y +-CONFIG_OF_EMBED=y ++CONFIG_OF_BOARD=y + CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" + CONFIG_ENV_FAT_INTERFACE="mmc" + CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +-- +2.17.1 + diff --git a/buildroot-external/board/raspberrypi/rootfs-overlay/usr/lib/udev/rules.d/99-rpi.rules b/buildroot-external/board/raspberrypi/rootfs-overlay/usr/lib/udev/rules.d/99-rpi.rules new file mode 100644 index 000000000..6bf019bd1 --- /dev/null +++ b/buildroot-external/board/raspberrypi/rootfs-overlay/usr/lib/udev/rules.d/99-rpi.rules @@ -0,0 +1,21 @@ +KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\ + ALIASES=/proc/device-tree/aliases; \ + if cmp -s $ALIASES/uart0 $ALIASES/serial0; then \ + echo 0;\ + elif cmp -s $ALIASES/uart0 $ALIASES/serial1; then \ + echo 1; \ + else \ + exit 1; \ + fi\ +'", SYMLINK+="serial%c" + +KERNEL=="ttyS0", PROGRAM="/bin/sh -c '\ + ALIASES=/proc/device-tree/aliases; \ + if cmp -s $ALIASES/uart1 $ALIASES/serial0; then \ + echo 0; \ + elif cmp -s $ALIASES/uart1 $ALIASES/serial1; then \ + echo 1; \ + else \ + exit 1; \ + fi \ +'", SYMLINK+="serial%c" diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0001-configs-rpi4-Add-defconfig-for-rpi4-64.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0001-configs-rpi4-Add-defconfig-for-rpi4-64.patch deleted file mode 100644 index f9ef6ca53..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0001-configs-rpi4-Add-defconfig-for-rpi4-64.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 9f471bee7e230bc9b99155506388fb98903bd3c3 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sat, 6 Jul 2019 23:49:47 +0100 -Subject: [PATCH 01/17] configs: rpi4: Add defconfig for rpi4-64 - -This config is based on the the rpi3 counterpart. - -Signed-off-by: Andrei Gherzan ---- - configs/rpi_4_defconfig | 43 +++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 43 insertions(+) - create mode 100644 configs/rpi_4_defconfig - -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -new file mode 100644 -index 0000000000..83d1bd0cdb ---- /dev/null -+++ b/configs/rpi_4_defconfig -@@ -0,0 +1,43 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00080000 -+CONFIG_TARGET_RPI_4=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_OF_EMBED=y -+CONFIG_DEFAULT_DEVICE_TREE="bcm2838-rpi-4-b" -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PHYLIB=y -+CONFIG_DM_ETH=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_LAN78XX=y -+CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0002-dts-Create-a-dtsi-for-BCM2835-6-7-specific-configura.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0002-dts-Create-a-dtsi-for-BCM2835-6-7-specific-configura.patch deleted file mode 100644 index 17b09c752..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0002-dts-Create-a-dtsi-for-BCM2835-6-7-specific-configura.patch +++ /dev/null @@ -1,208 +0,0 @@ -From 24f5e0b88b88f2e47e420e6f2f123b8726c9f396 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sat, 6 Jul 2019 23:58:44 +0100 -Subject: [PATCH 02/17] dts: Create a dtsi for BCM2835/6/7 specific - configuration - -This follows a similar change in kernel[1]. The change moves -configuration that was not applicable for all bcm2835/6/7/8 out of -bcm283x.dtsi. The new file is bcm2835-common.dtsi and contains -conifguration that is common for bcm2835/6/7 (not bcm2838). - -[1] https://github.com/raspberrypi/linux/commit/769a7330aa5bebcc98b1ff12ecb767db4e5c644d#diff-5979fba23a5bab2cf66dde09db872dfc - -Signed-off-by: Andrei Gherzan ---- - arch/arm/dts/bcm2835-common.dtsi | 53 ++++++++++++++++++++++++++++++++ - arch/arm/dts/bcm2835.dtsi | 1 + - arch/arm/dts/bcm2836.dtsi | 1 + - arch/arm/dts/bcm2837.dtsi | 1 + - arch/arm/dts/bcm283x.dtsi | 45 +-------------------------- - 5 files changed, 57 insertions(+), 44 deletions(-) - create mode 100644 arch/arm/dts/bcm2835-common.dtsi - -diff --git a/arch/arm/dts/bcm2835-common.dtsi b/arch/arm/dts/bcm2835-common.dtsi -new file mode 100644 -index 0000000000..17771730a3 ---- /dev/null -+++ b/arch/arm/dts/bcm2835-common.dtsi -@@ -0,0 +1,53 @@ -+// SPDX-License-Identifier: GPL-2.0 -+ -+/* This include file covers the common peripherals and configuration between -+ * bcm2835, bcm2836 and bcm2837 implementations. -+ */ -+ -+/ { -+ soc { -+ timer@7e003000 { -+ compatible = "brcm,bcm2835-system-timer"; -+ reg = <0x7e003000 0x1000>; -+ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; -+ /* This could be a reference to BCM2835_CLOCK_TIMER, -+ * but we don't have the driver using the common clock -+ * support yet. -+ */ -+ clock-frequency = <1000000>; -+ }; -+ -+ intc: interrupt-controller@7e00b200 { -+ compatible = "brcm,bcm2835-armctrl-ic"; -+ reg = <0x7e00b200 0x200>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ thermal: thermal@7e212000 { -+ compatible = "brcm,bcm2835-thermal"; -+ reg = <0x7e212000 0x8>; -+ clocks = <&clocks BCM2835_CLOCK_TSENS>; -+ #thermal-sensor-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ v3d: v3d@7ec00000 { -+ compatible = "brcm,bcm2835-v3d"; -+ reg = <0x7ec00000 0x1000>; -+ interrupts = <1 10>; -+ }; -+ }; -+}; -+ -+&gpio { -+ i2c_slave_gpio18: i2c_slave_gpio18 { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = ; -+ }; -+ -+ jtag_gpio4: jtag_gpio4 { -+ brcm,pins = <4 5 6 12 13>; -+ brcm,function = ; -+ }; -+}; -diff --git a/arch/arm/dts/bcm2835.dtsi b/arch/arm/dts/bcm2835.dtsi -index a5c3824c80..53bf4579cc 100644 ---- a/arch/arm/dts/bcm2835.dtsi -+++ b/arch/arm/dts/bcm2835.dtsi -@@ -1,5 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - #include "bcm283x.dtsi" -+#include "bcm2835-common.dtsi" - - / { - compatible = "brcm,bcm2835"; -diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi -index c933e84138..82d6c4662a 100644 ---- a/arch/arm/dts/bcm2836.dtsi -+++ b/arch/arm/dts/bcm2836.dtsi -@@ -1,5 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - #include "bcm283x.dtsi" -+#include "bcm2835-common.dtsi" - - / { - compatible = "brcm,bcm2836"; -diff --git a/arch/arm/dts/bcm2837.dtsi b/arch/arm/dts/bcm2837.dtsi -index beb6c502da..9e95fee78e 100644 ---- a/arch/arm/dts/bcm2837.dtsi -+++ b/arch/arm/dts/bcm2837.dtsi -@@ -1,4 +1,5 @@ - #include "bcm283x.dtsi" -+#include "bcm2835-common.dtsi" - - / { - compatible = "brcm,bcm2837"; -diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi -index 9777644c6c..a024727e4d 100644 ---- a/arch/arm/dts/bcm283x.dtsi -+++ b/arch/arm/dts/bcm283x.dtsi -@@ -56,17 +56,6 @@ - #address-cells = <1>; - #size-cells = <1>; - -- timer@7e003000 { -- compatible = "brcm,bcm2835-system-timer"; -- reg = <0x7e003000 0x1000>; -- interrupts = <1 0>, <1 1>, <1 2>, <1 3>; -- /* This could be a reference to BCM2835_CLOCK_TIMER, -- * but we don't have the driver using the common clock -- * support yet. -- */ -- clock-frequency = <1000000>; -- }; -- - txp@7e004000 { - compatible = "brcm,bcm2835-txp"; - reg = <0x7e004000 0x20>; -@@ -114,13 +103,6 @@ - brcm,dma-channel-mask = <0x7f35>; - }; - -- intc: interrupt-controller@7e00b200 { -- compatible = "brcm,bcm2835-armctrl-ic"; -- reg = <0x7e00b200 0x200>; -- interrupt-controller; -- #interrupt-cells = <2>; -- }; -- - pm: watchdog@7e100000 { - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; - #power-domain-cells = <1>; -@@ -184,8 +166,7 @@ - interrupt-controller; - #interrupt-cells = <2>; - -- /* Defines pin muxing groups according to -- * BCM2835-ARM-Peripherals.pdf page 102. -+ /* Defines common pin muxing groups - * - * While each pin can have its mux selected - * for various functions individually, some -@@ -263,15 +244,6 @@ - brcm,pins = <44 45>; - brcm,function = ; - }; -- i2c_slave_gpio18: i2c_slave_gpio18 { -- brcm,pins = <18 19 20 21>; -- brcm,function = ; -- }; -- -- jtag_gpio4: jtag_gpio4 { -- brcm,pins = <4 5 6 12 13>; -- brcm,function = ; -- }; - jtag_gpio22: jtag_gpio22 { - brcm,pins = <22 23 24 25 26 27>; - brcm,function = ; -@@ -488,14 +460,6 @@ - - }; - -- thermal: thermal@7e212000 { -- compatible = "brcm,bcm2835-thermal"; -- reg = <0x7e212000 0x8>; -- clocks = <&clocks BCM2835_CLOCK_TSENS>; -- #thermal-sensor-cells = <0>; -- status = "disabled"; -- }; -- - aux: aux@7e215000 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <1>; -@@ -635,13 +599,6 @@ - phy-names = "usb2-phy"; - }; - -- v3d: v3d@7ec00000 { -- compatible = "brcm,bcm2835-v3d"; -- reg = <0x7ec00000 0x1000>; -- interrupts = <1 10>; -- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; -- }; -- - vc4: gpu { - compatible = "brcm,bcm2835-vc4"; - }; --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0003-dts-Add-initial-support-for-bcm2838.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0003-dts-Add-initial-support-for-bcm2838.patch deleted file mode 100644 index 6a8339a8b..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0003-dts-Add-initial-support-for-bcm2838.patch +++ /dev/null @@ -1,337 +0,0 @@ -From d7532dbcde253d824d4fe3d1f1f40e92e62ad291 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sun, 7 Jul 2019 00:12:36 +0100 -Subject: [PATCH 03/17] dts: Add initial support for bcm2838 - -Signed-off-by: Andrei Gherzan ---- - arch/arm/dts/Makefile | 4 +- - arch/arm/dts/bcm2838-rpi-4-b.dts | 56 ++++++++ - arch/arm/dts/bcm2838.dtsi | 237 +++++++++++++++++++++++++++++++ - 3 files changed, 296 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/dts/bcm2838-rpi-4-b.dts - create mode 100644 arch/arm/dts/bcm2838.dtsi - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index 20dbc2ff84..16790af1e1 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -749,7 +749,9 @@ dtb-$(CONFIG_ARCH_BCM283X) += \ - bcm2837-rpi-3-a-plus.dtb \ - bcm2837-rpi-3-b.dtb \ - bcm2837-rpi-3-b-plus.dtb \ -- bcm2837-rpi-cm3-io3.dtb -+ bcm2837-rpi-cm3-io3.dtb \ -+ bcm2837-rpi-3-b.dtb \ -+ bcm2838-rpi-4-b.dtb - - dtb-$(CONFIG_ARCH_BCM63158) += \ - bcm963158.dtb -diff --git a/arch/arm/dts/bcm2838-rpi-4-b.dts b/arch/arm/dts/bcm2838-rpi-4-b.dts -new file mode 100644 -index 0000000000..07e9a78e8d ---- /dev/null -+++ b/arch/arm/dts/bcm2838-rpi-4-b.dts -@@ -0,0 +1,56 @@ -+/dts-v1/; -+#include "bcm2838.dtsi" -+ -+/ { -+ compatible = "raspberrypi,4-model-b","brcm,bcm2838","brcm,bcm2837"; -+ model = "Raspberry Pi 4 Model B"; -+ -+ memory { -+ reg = <0 0 0x40000000>; -+ }; -+ -+ leds { -+ act { -+ gpios = <&gpio 47 0>; -+ }; -+ }; -+}; -+ -+/* uart0 communicates with the BT module */ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; -+ status = "okay"; -+}; -+ -+/* uart1 is mapped to the pin header */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio34>; -+ status = "okay"; -+ bus-width = <4>; -+ non-removable; -+}; -+ -+/* SDHOST is used to drive the SD card */ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; -+ bus-width = <4>; -+}; -+ -+&gpio { -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+}; -diff --git a/arch/arm/dts/bcm2838.dtsi b/arch/arm/dts/bcm2838.dtsi -new file mode 100644 -index 0000000000..19b2d7b905 ---- /dev/null -+++ b/arch/arm/dts/bcm2838.dtsi -@@ -0,0 +1,237 @@ -+#include "bcm283x.dtsi" -+#include -+#include -+ -+/ { -+ compatible = "brcm,bcm2838"; -+ -+ #address-cells = <2>; -+ #size-cells = <1>; -+ -+ interrupt-parent = <&gic>; -+ -+ soc { -+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, -+ <0x7c000000 0x0 0xfc000000 0x02000000>, -+ <0x40000000 0x0 0xff800000 0x00800000>; -+ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; -+ -+ gic: gic400@40041000 { -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ compatible = "arm,gic-400"; -+ reg = <0x40041000 0x1000>, -+ <0x40042000 0x2000>, -+ <0x40044000 0x2000>, -+ <0x40046000 0x2000>; -+ }; -+ -+ thermal: thermal@7d5d2200 { -+ compatible = "brcm,avs-tmon-bcm2838"; -+ reg = <0x7d5d2200 0x2c>; -+ interrupts = ; -+ interrupt-names = "tmon"; -+ clocks = <&clocks BCM2835_CLOCK_TSENS>; -+ #thermal-sensor-cells = <0>; -+ status = "okay"; -+ }; -+ -+ spi@7e204000 { -+ reg = <0x7e204000 0x0200>; -+ interrupts = ; -+ }; -+ -+ pixelvalve@7e206000 { -+ interrupts = ; -+ }; -+ -+ pixelvalve@7e207000 { -+ interrupts = ; -+ }; -+ -+ hvs@7e400000 { -+ interrupts = ; -+ }; -+ -+ emmc2: emmc2@7e340000 { -+ compatible = "brcm,bcm2711-emmc2"; -+ status = "okay"; -+ interrupts = ; -+ clocks = <&clocks BCM2838_CLOCK_EMMC2>; -+ reg = <0x7e340000 0x100>; -+ }; -+ -+ pixelvalve@7e807000 { -+ interrupts = ; -+ }; -+ -+ }; -+ -+ arm-pmu { -+ /* -+ * N.B. the A72 PMU support only exists in arch/arm64, hence -+ * the fallback to the A53 version. -+ */ -+ compatible = "arm,cortex-a72-pmu", "arm,cortex-a53-pmu"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ arm,cpu-registers-not-fw-configured; -+ always-on; -+ }; -+ -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000d8>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e0>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e8>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000f0>; -+ }; -+ }; -+}; -+ -+&clk_osc { -+ clock-frequency = <54000000>; -+}; -+ -+&clocks { -+ compatible = "brcm,bcm2838-cprman"; -+}; -+ -+&cpu_thermal { -+ coefficients = <(-487) 410040>; -+}; -+ -+&dsi0 { -+ interrupts = ; -+}; -+ -+&dsi1 { -+ interrupts = ; -+}; -+ -+&gpio { -+ compatible = "brcm,bcm2838-gpio", "brcm,bcm2835-gpio"; -+ interrupts = , -+ , -+ , -+ ; -+}; -+ -+&vec { -+ interrupts = ; -+}; -+ -+&usb { -+ interrupts = ; -+}; -+ -+&hdmi { -+ interrupts = , -+ ; -+}; -+ -+&uart1 { -+ interrupts = ; -+}; -+ -+&spi1 { -+ interrupts = ; -+}; -+ -+&spi2 { -+ interrupts = ; -+}; -+ -+&i2c0 { -+ interrupts = ; -+}; -+ -+&i2c1 { -+ interrupts = ; -+}; -+ -+&i2c2 { -+ interrupts = ; -+}; -+ -+&mailbox { -+ interrupts = ; -+}; -+ -+&sdhost { -+ interrupts = ; -+}; -+ -+&uart0 { -+ interrupts = ; -+}; -+ -+&dma { -+ reg = <0x7e007000 0xb00>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , /* dmalite 7 */ -+ , /* dmalite 8 */ -+ , /* dmalite 9 */ -+ ; /* dmalite 10 */ -+ interrupt-names = "dma0", -+ "dma1", -+ "dma2", -+ "dma3", -+ "dma4", -+ "dma5", -+ "dma6", -+ "dma7", -+ "dma8", -+ "dma9", -+ "dma10"; -+ brcm,dma-channel-mask = <0x07f5>; -+}; --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0004-arm-mach-bcm283x-Define-configs-for-RaspberryPi-4.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0004-arm-mach-bcm283x-Define-configs-for-RaspberryPi-4.patch deleted file mode 100644 index 9f28a9dd3..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0004-arm-mach-bcm283x-Define-configs-for-RaspberryPi-4.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 865218f2dc973492c872dac51a66cff1833c916a Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sun, 7 Jul 2019 00:21:33 +0100 -Subject: [PATCH 04/17] arm: mach-bcm283x: Define configs for RaspberryPi 4 - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/Kconfig | 35 +++++++++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig -index 3eb5a9a897..d5069fe688 100644 ---- a/arch/arm/mach-bcm283x/Kconfig -+++ b/arch/arm/mach-bcm283x/Kconfig -@@ -26,6 +26,23 @@ config BCM2837_64B - select BCM2837 - select ARM64 - -+config BCM2838 -+ bool "Broadcom BCM2838 SoC support" -+ depends on ARCH_BCM283X -+ -+config BCM2838_32B -+ bool "Broadcom BCM2838 SoC 32-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARMV7_LPAE -+ select CPU_V7A -+ -+config BCM2838_64B -+ bool "Broadcom BCM2838 SoC 64-bit support" -+ depends on ARCH_BCM283X -+ select BCM2838 -+ select ARM64 -+ - menu "Broadcom BCM283X family" - depends on ARCH_BCM283X - -@@ -127,6 +144,24 @@ config TARGET_RPI_3 - This option creates a build targeting the ARMv8/AArch64 ISA. - select BCM2837_64B - -+config TARGET_RPI_4 -+ bool "Raspberry Pi 4 64-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch64 (64-bit) mode. -+ -+ This option creates a build targeting the ARMv8/AArch64 ISA. -+ select BCM2838_64B -+ -+config TARGET_RPI_4_32B -+ bool "Raspberry Pi 4 32-bit build" -+ help -+ Support for all BCM2838-based Raspberry Pi variants, such as -+ the RPi 4 model B, in AArch32 (32-bit) mode. -+ -+ This option creates a build targeting the ARMv7/AArch32 ISA. -+ select BCM2838_32B -+ - endchoice - - config SYS_BOARD --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0005-arm-mach-bcm283x-Define-mbox-address-for-BCM2838.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0005-arm-mach-bcm283x-Define-mbox-address-for-BCM2838.patch deleted file mode 100644 index 9b221561c..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0005-arm-mach-bcm283x-Define-mbox-address-for-BCM2838.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 98ae56bf35b2102310d2e88f56639e9055aa10be Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sun, 7 Jul 2019 00:23:15 +0100 -Subject: [PATCH 05/17] arm: mach-bcm283x: Define mbox address for BCM2838 - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index e3a893e49c..2d711daaa8 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -38,11 +38,16 @@ - /* Raw mailbox HW */ - - #ifndef CONFIG_BCM2835 -+#ifdef CONFIG_BCM2838 -+#define BCM2835_MBOX_PHYSADDR 0xfe00b880 -+#else - #define BCM2835_MBOX_PHYSADDR 0x3f00b880 -+#endif - #else - #define BCM2835_MBOX_PHYSADDR 0x2000b880 - #endif - -+ - struct bcm2835_mbox_regs { - u32 read; - u32 rsvd0[5]; --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0006-rpi-Add-rpi_model-entry-for-RaspberryPi-4.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0006-rpi-Add-rpi_model-entry-for-RaspberryPi-4.patch deleted file mode 100644 index 6fd0c06e7..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0006-rpi-Add-rpi_model-entry-for-RaspberryPi-4.patch +++ /dev/null @@ -1,29 +0,0 @@ -From eef9e7760c367dd848ac90780ecce8dcd82d9bb4 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sun, 7 Jul 2019 00:25:58 +0100 -Subject: [PATCH 06/17] rpi: Add rpi_model entry for RaspberryPi 4 - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 617c892dde..6d6f1ef39a 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -148,6 +148,11 @@ static const struct rpi_model rpi_models_new_scheme[] = { - DTB_DIR "bcm2837-rpi-cm3.dtb", - false, - }, -+ [0x11] = { -+ "4 Model B", -+ DTB_DIR "bcm2711-rpi-4-b.dtb", -+ true, -+ }, - }; - - static const struct rpi_model rpi_models_old_scheme[] = { --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0007-dt-bindings-Define-BCM2838_CLOCK_EMMC2-needed-for-Ra.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0007-dt-bindings-Define-BCM2838_CLOCK_EMMC2-needed-for-Ra.patch deleted file mode 100644 index 316da99bf..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0007-dt-bindings-Define-BCM2838_CLOCK_EMMC2-needed-for-Ra.patch +++ /dev/null @@ -1,27 +0,0 @@ -From fe0cff5d5f6e6fa56d83f04166d402ca13a0f23c Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Sun, 7 Jul 2019 00:31:27 +0100 -Subject: [PATCH 07/17] dt-bindings: Define BCM2838_CLOCK_EMMC2 needed for - RaspberryPi 4 - -On BCM2838 there is an additional clock. This clock was added in the -same bcm2835-cprman driver and is used by the emmc2 dt node. - -Signed-off-by: Andrei Gherzan ---- - include/dt-bindings/clock/bcm2835.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h -index 2cec01f968..457fd4e23c 100644 ---- a/include/dt-bindings/clock/bcm2835.h -+++ b/include/dt-bindings/clock/bcm2835.h -@@ -58,3 +58,5 @@ - #define BCM2835_CLOCK_DSI1E 48 - #define BCM2835_CLOCK_DSI0P 49 - #define BCM2835_CLOCK_DSI1P 50 -+ -+#define BCM2838_CLOCK_EMMC2 51 --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0008-arm-bcm283x-Include-definition-for-additional-emmc-c.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0008-arm-bcm283x-Include-definition-for-additional-emmc-c.patch deleted file mode 100644 index 3b0fc12a8..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0008-arm-bcm283x-Include-definition-for-additional-emmc-c.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 05c24bc9579b958f637ca1497387a6149581c644 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Fri, 12 Jul 2019 11:26:10 +0100 -Subject: [PATCH 08/17] arm: bcm283x: Include definition for additional emmc - clock - -This clock has a different mbox ID[1] so have this included in the -relevant header file. - -[1] https://github.com/raspberrypi/firmware/issues/1179 - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index 2d711daaa8..cad035e8cd 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -239,6 +239,7 @@ struct bcm2835_mbox_tag_set_power_state { - #define BCM2835_MBOX_CLOCK_ID_SDRAM 8 - #define BCM2835_MBOX_CLOCK_ID_PIXEL 9 - #define BCM2835_MBOX_CLOCK_ID_PWM 10 -+#define BCM2835_MBOX_CLOCK_ID_EMMC2 12 - - struct bcm2835_mbox_tag_get_clock_rate { - struct bcm2835_mbox_tag_hdr tag_hdr; --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0009-mmc-bcm2835_sdhci-Add-support-for-bcm2711-device.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0009-mmc-bcm2835_sdhci-Add-support-for-bcm2711-device.patch deleted file mode 100644 index bd515eb5a..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0009-mmc-bcm2835_sdhci-Add-support-for-bcm2711-device.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 6e0d51199f2d089c84f45202587a9f17abd1ab0a Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Wed, 10 Jul 2019 13:24:36 +0200 -Subject: [PATCH 09/17] mmc: bcm2835_sdhci: Add support for bcm2711 device - -The bcm2711 has two emmc controller. The difference is the clocks -they use. Add support for the second emmc contoller. - -Signed-off-by: Matthias Brugger ---- - drivers/mmc/bcm2835_sdhci.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c -index 08bddd410e..e68dec3be7 100644 ---- a/drivers/mmc/bcm2835_sdhci.c -+++ b/drivers/mmc/bcm2835_sdhci.c -@@ -178,12 +178,13 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - fdt_addr_t base; - int emmc_freq; - int ret; -+ int clock_id = (int)dev_get_driver_data(dev); - - base = devfdt_get_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - -- ret = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_EMMC); -+ ret = bcm2835_get_mmc_clock(clock_id); - if (ret < 0) { - debug("%s: Failed to set MMC clock (err=%d)\n", __func__, ret); - return ret; -@@ -228,7 +229,14 @@ static int bcm2835_sdhci_probe(struct udevice *dev) - } - - static const struct udevice_id bcm2835_sdhci_match[] = { -- { .compatible = "brcm,bcm2835-sdhci" }, -+ { -+ .compatible = "brcm,bcm2835-sdhci", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC -+ }, -+ { -+ .compatible = "brcm,bcm2711-emmc2", -+ .data = BCM2835_MBOX_CLOCK_ID_EMMC2 -+ }, - { /* sentinel */ } - }; - --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0010-arm-bcm283x-Define-device-base-addresses-for-bcm2835.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0010-arm-bcm283x-Define-device-base-addresses-for-bcm2835.patch deleted file mode 100644 index 974e69ee5..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0010-arm-bcm283x-Define-device-base-addresses-for-bcm2835.patch +++ /dev/null @@ -1,63 +0,0 @@ -From c00c6048006ebe1822355b6ba4f2da8ccebb4786 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Fri, 12 Jul 2019 11:38:11 +0100 -Subject: [PATCH 10/17] arm: bcm283x: Define device base addresses for bcm2835 - -Signed-off-by: Andrei Gherzan ---- - arch/arm/mach-bcm283x/include/mach/sdhci.h | 4 ++++ - arch/arm/mach-bcm283x/include/mach/timer.h | 4 ++++ - arch/arm/mach-bcm283x/include/mach/wdog.h | 4 ++++ - 3 files changed, 12 insertions(+) - -diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h -index 5cb6ec3340..262b016a1b 100644 ---- a/arch/arm/mach-bcm283x/include/mach/sdhci.h -+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h -@@ -7,7 +7,11 @@ - #define _BCM2835_SDHCI_H_ - - #ifndef CONFIG_BCM2835 -+#ifdef CONFIG_BCM2838 -+#define BCM2835_SDHCI_BASE 0xfe300000 -+#else - #define BCM2835_SDHCI_BASE 0x3f300000 -+#endif - #else - #define BCM2835_SDHCI_BASE 0x20300000 - #endif -diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h -index 56b0c356bb..dc3ed98879 100644 ---- a/arch/arm/mach-bcm283x/include/mach/timer.h -+++ b/arch/arm/mach-bcm283x/include/mach/timer.h -@@ -7,7 +7,11 @@ - #define _BCM2835_TIMER_H - - #ifndef CONFIG_BCM2835 -+#ifdef CONFIG_BCM2838 -+#define BCM2835_TIMER_PHYSADDR 0xfe003000 -+#else - #define BCM2835_TIMER_PHYSADDR 0x3f003000 -+#endif - #else - #define BCM2835_TIMER_PHYSADDR 0x20003000 - #endif -diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h -index 99c88e5df7..ef040f385d 100644 ---- a/arch/arm/mach-bcm283x/include/mach/wdog.h -+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h -@@ -7,7 +7,11 @@ - #define _BCM2835_WDOG_H - - #ifndef CONFIG_BCM2835 -+#ifdef CONFIG_BCM2838 -+#define BCM2835_WDOG_PHYSADDR 0xfe100000 -+#else - #define BCM2835_WDOG_PHYSADDR 0x3f100000 -+#endif - #else - #define BCM2835_WDOG_PHYSADDR 0x20100000 - #endif --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0011-bcm2835-video-Bail-out-early-if-querying-video-infor.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0011-bcm2835-video-Bail-out-early-if-querying-video-infor.patch deleted file mode 100644 index 9d084ce82..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0011-bcm2835-video-Bail-out-early-if-querying-video-infor.patch +++ /dev/null @@ -1,36 +0,0 @@ -From d0357e50e58894eeb9dcbb1497689b410b667f08 Mon Sep 17 00:00:00 2001 -From: Fabian Vogt -Date: Fri, 28 Jun 2019 14:14:01 +0200 -Subject: [PATCH 11/17] bcm2835 video: Bail out early if querying video - information fails - -Otherwise there is a crash with newer RPi firmware, see -https://github.com/raspberrypi/firmware/issues/1157 ---- - drivers/video/bcm2835.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c -index bc41090aed..4c7962cad8 100644 ---- a/drivers/video/bcm2835.c -+++ b/drivers/video/bcm2835.c -@@ -19,13 +19,15 @@ static int bcm2835_video_probe(struct udevice *dev) - - debug("bcm2835: Query resolution...\n"); - ret = bcm2835_get_video_size(&w, &h); -- if (ret) -+ if (ret || w == 0 || h == 0) - return -EIO; - - debug("bcm2835: Setting up display for %d x %d\n", w, h); - ret = bcm2835_set_video_params(&w, &h, 32, BCM2835_MBOX_PIXEL_ORDER_RGB, - BCM2835_MBOX_ALPHA_MODE_IGNORED, - &fb_base, &fb_size, &pitch); -+ if(ret) -+ return -EIO; - - debug("bcm2835: Final resolution is %d x %d\n", w, h); - --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0012-bcm283x-mbox-Correctly-wait-for-space-to-send.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0012-bcm283x-mbox-Correctly-wait-for-space-to-send.patch deleted file mode 100644 index abba33b03..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0012-bcm283x-mbox-Correctly-wait-for-space-to-send.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 2cbeae8a88c3f50e322a2434cbbf37bfe0b76d9a Mon Sep 17 00:00:00 2001 -From: Fabian Vogt -Date: Fri, 28 Jun 2019 14:25:53 +0200 -Subject: [PATCH 12/17] bcm283x mbox: Correctly wait for space to send - -For sending, the second mailbox is used, but previously the status register of -the first one was read. ---- - arch/arm/mach-bcm283x/include/mach/mbox.h | 7 +++++-- - arch/arm/mach-bcm283x/mbox.c | 6 +++--- - 2 files changed, 8 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h -index cad035e8cd..cd78966150 100644 ---- a/arch/arm/mach-bcm283x/include/mach/mbox.h -+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h -@@ -51,9 +51,12 @@ - struct bcm2835_mbox_regs { - u32 read; - u32 rsvd0[5]; -- u32 status; -- u32 config; -+ u32 status_r; -+ u32 config_r; - u32 write; -+ u32 rsvd1[5]; -+ u32 status_w; -+ u32 config_w; - }; - - #define BCM2835_MBOX_STATUS_WR_FULL 0x80000000 -diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c -index 1642ebd103..f7483bf423 100644 ---- a/arch/arm/mach-bcm283x/mbox.c -+++ b/arch/arm/mach-bcm283x/mbox.c -@@ -27,7 +27,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) - /* Drain any stale responses */ - - for (;;) { -- val = readl(®s->status); -+ val = readl(®s->status_r); - if (val & BCM2835_MBOX_STATUS_RD_EMPTY) - break; - if (get_timer(0) >= endtime) { -@@ -40,7 +40,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) - /* Wait for space to send */ - - for (;;) { -- val = readl(®s->status); -+ val = readl(®s->status_w); - if (!(val & BCM2835_MBOX_STATUS_WR_FULL)) - break; - if (get_timer(0) >= endtime) { -@@ -58,7 +58,7 @@ int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv) - /* Wait for the response */ - - for (;;) { -- val = readl(®s->status); -+ val = readl(®s->status_r); - if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY)) - break; - if (get_timer(0) >= endtime) { --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0013-config-rpi4-Add-defconfig-for-rpi4-32.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0013-config-rpi4-Add-defconfig-for-rpi4-32.patch deleted file mode 100644 index 1558712bb..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0013-config-rpi4-Add-defconfig-for-rpi4-32.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 21a3e9ed27f83d83851cbee57ee6d83a58ef2775 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Fri, 12 Jul 2019 11:55:52 +0100 -Subject: [PATCH 13/17] config: rpi4: Add defconfig for rpi4-32 - -Signed-off-by: Andrei Gherzan ---- - configs/rpi_4_32b_defconfig | 43 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 43 insertions(+) - create mode 100644 configs/rpi_4_32b_defconfig - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -new file mode 100644 -index 0000000000..9f2b805d0f ---- /dev/null -+++ b/configs/rpi_4_32b_defconfig -@@ -0,0 +1,43 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_BCM283X=y -+CONFIG_SYS_TEXT_BASE=0x00008000 -+CONFIG_TARGET_RPI_4_32B=y -+CONFIG_SYS_MALLOC_F_LEN=0x2000 -+CONFIG_DISTRO_DEFAULTS=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_MISC_INIT_R=y -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_SYS_PROMPT="U-Boot> " -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_FS_UUID=y -+CONFIG_OF_EMBED=y -+CONFIG_DEFAULT_DEVICE_TREE="bcm2838-rpi-4-b" -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" -+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -+CONFIG_DM_KEYBOARD=y -+CONFIG_DM_MMC=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_BCM2835=y -+CONFIG_PHYLIB=y -+CONFIG_DM_ETH=y -+CONFIG_PINCTRL=y -+# CONFIG_PINCTRL_GENERIC is not set -+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set -+CONFIG_USB=y -+CONFIG_DM_USB=y -+CONFIG_USB_DWC2=y -+CONFIG_USB_KEYBOARD=y -+CONFIG_USB_HOST_ETHER=y -+CONFIG_USB_ETHER_LAN78XX=y -+CONFIG_USB_ETHER_SMSC95XX=y -+CONFIG_DM_VIDEO=y -+CONFIG_SYS_WHITE_ON_BLACK=y -+CONFIG_CONSOLE_SCROLL_LINES=10 -+CONFIG_PHYS_TO_BUS=y -+CONFIG_OF_LIBFDT_OVERLAY=y --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0014-dts-bcm2838-rpi-4-b-Use-the-emmc2-interface-for-sdhc.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0014-dts-bcm2838-rpi-4-b-Use-the-emmc2-interface-for-sdhc.patch deleted file mode 100644 index 7a1d33f73..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0014-dts-bcm2838-rpi-4-b-Use-the-emmc2-interface-for-sdhc.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 07801a834dfe2d53827ad5a61fe3d59776e0c5b1 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Fri, 12 Jul 2019 11:58:42 +0100 -Subject: [PATCH 14/17] dts: bcm2838-rpi-4-b: Use the emmc2 interface for sdhci - -Signed-off-by: Andrei Gherzan ---- - arch/arm/dts/bcm2838-rpi-4-b.dts | 16 ++++++---------- - 1 file changed, 6 insertions(+), 10 deletions(-) - -diff --git a/arch/arm/dts/bcm2838-rpi-4-b.dts b/arch/arm/dts/bcm2838-rpi-4-b.dts -index 07e9a78e8d..168179c17c 100644 ---- a/arch/arm/dts/bcm2838-rpi-4-b.dts -+++ b/arch/arm/dts/bcm2838-rpi-4-b.dts -@@ -30,21 +30,17 @@ - status = "okay"; - }; - --/* SDHCI is used to control the SDIO for wireless */ - &sdhci { -- pinctrl-names = "default"; -- pinctrl-0 = <&emmc_gpio34>; -- status = "okay"; -- bus-width = <4>; -- non-removable; -+ status = "disabled"; - }; - --/* SDHOST is used to drive the SD card */ - &sdhost { -- pinctrl-names = "default"; -- pinctrl-0 = <&sdhost_gpio48>; -+ status = "disabled"; -+}; -+ -+&emmc2 { -+ compatible = "brcm,bcm2835-sdhci"; - status = "okay"; -- bus-width = <4>; - }; - - &gpio { --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0015-rpi-Add-memory-map-for-bcm2838.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0015-rpi-Add-memory-map-for-bcm2838.patch deleted file mode 100644 index 8510637cc..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0015-rpi-Add-memory-map-for-bcm2838.patch +++ /dev/null @@ -1,58 +0,0 @@ -From bfa71106beb565c2f3bc2f5f948477e0d3801285 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Fri, 12 Jul 2019 14:27:31 +0100 -Subject: [PATCH 15/17] rpi: Add memory map for bcm2838 - -Signed-off-by: Andrei Gherzan ---- - board/raspberrypi/rpi/rpi.c | 27 ++++++++++++++++++++++++--- - 1 file changed, 24 insertions(+), 3 deletions(-) - -diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c -index 6d6f1ef39a..4242ef35a4 100644 ---- a/board/raspberrypi/rpi/rpi.c -+++ b/board/raspberrypi/rpi/rpi.c -@@ -249,7 +249,8 @@ static uint32_t rev_type; - static const struct rpi_model *model; - - #ifdef CONFIG_ARM64 --static struct mm_region bcm2837_mem_map[] = { -+#ifndef CONFIG_BCM2838 -+static struct mm_region bcm283x_mem_map[] = { - { - .virt = 0x00000000UL, - .phys = 0x00000000UL, -@@ -268,8 +269,28 @@ static struct mm_region bcm2837_mem_map[] = { - 0, - } - }; -- --struct mm_region *mem_map = bcm2837_mem_map; -+#else -+static struct mm_region bcm283x_mem_map[] = { -+ { -+ .virt = 0x00000000UL, -+ .phys = 0x00000000UL, -+ .size = 0xf3000000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | -+ PTE_BLOCK_INNER_SHARE -+ }, { -+ .virt = 0xfe000000UL, -+ .phys = 0xfe000000UL, -+ .size = 0x01800000UL, -+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | -+ PTE_BLOCK_NON_SHARE | -+ PTE_BLOCK_PXN | PTE_BLOCK_UXN -+ }, { -+ /* List terminator */ -+ 0, -+ } -+}; -+#endif -+struct mm_region *mem_map = bcm283x_mem_map; - #endif - - int dram_init(void) --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0016-configs-rpi4-Remove-DWC2-and-USB_ETHER-configs.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0016-configs-rpi4-Remove-DWC2-and-USB_ETHER-configs.patch deleted file mode 100644 index 0bc54c85e..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0016-configs-rpi4-Remove-DWC2-and-USB_ETHER-configs.patch +++ /dev/null @@ -1,52 +0,0 @@ -From c73747171c8a91e204405e144d0906c439d3bff3 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Mon, 15 Jul 2019 14:05:25 +0100 -Subject: [PATCH 16/17] configs: rpi4: Remove DWC2 and USB_ETHER configs - -dwc2 is only connected to the usb-c port so we don't have any real -benefit in having it enabled in uboot. - -Also, the GENET interface is connected directly to the SoC so we can -drop the USB_ETHER configs. - -Signed-off-by: Andrei Gherzan ---- - configs/rpi_4_32b_defconfig | 3 --- - configs/rpi_4_defconfig | 3 --- - 2 files changed, 6 deletions(-) - -diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig -index 9f2b805d0f..b71a14735a 100644 ---- a/configs/rpi_4_32b_defconfig -+++ b/configs/rpi_4_32b_defconfig -@@ -31,11 +31,8 @@ CONFIG_PINCTRL=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y --CONFIG_USB_DWC2=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_LAN78XX=y --CONFIG_USB_ETHER_SMSC95XX=y - CONFIG_DM_VIDEO=y - CONFIG_SYS_WHITE_ON_BLACK=y - CONFIG_CONSOLE_SCROLL_LINES=10 -diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig -index 83d1bd0cdb..b27e3f823b 100644 ---- a/configs/rpi_4_defconfig -+++ b/configs/rpi_4_defconfig -@@ -31,11 +31,8 @@ CONFIG_PINCTRL=y - # CONFIG_REQUIRE_SERIAL_CONSOLE is not set - CONFIG_USB=y - CONFIG_DM_USB=y --CONFIG_USB_DWC2=y - CONFIG_USB_KEYBOARD=y - CONFIG_USB_HOST_ETHER=y --CONFIG_USB_ETHER_LAN78XX=y --CONFIG_USB_ETHER_SMSC95XX=y - CONFIG_DM_VIDEO=y - CONFIG_SYS_WHITE_ON_BLACK=y - CONFIG_CONSOLE_SCROLL_LINES=10 --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0017-dts-bcm2838-rpi-4-b-Use-the-emmc2-2811-compatible-st.patch b/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0017-dts-bcm2838-rpi-4-b-Use-the-emmc2-2811-compatible-st.patch deleted file mode 100644 index 4481f4157..000000000 --- a/buildroot-external/board/raspberrypi/rpi4/patches/uboot/0017-dts-bcm2838-rpi-4-b-Use-the-emmc2-2811-compatible-st.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 62b6e39a53c56a9085aeab1b47b5cc6020fcdb6f Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Mon, 15 Jul 2019 14:11:10 +0100 -Subject: [PATCH 17/17] dts: bcm2838-rpi-4-b: Use the emmc2/2811 compatible - string for SDHCI - -Signed-off-by: Andrei Gherzan ---- - arch/arm/dts/bcm2838-rpi-4-b.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/dts/bcm2838-rpi-4-b.dts b/arch/arm/dts/bcm2838-rpi-4-b.dts -index 168179c17c..b7241be3fd 100644 ---- a/arch/arm/dts/bcm2838-rpi-4-b.dts -+++ b/arch/arm/dts/bcm2838-rpi-4-b.dts -@@ -39,7 +39,7 @@ - }; - - &emmc2 { -- compatible = "brcm,bcm2835-sdhci"; -+ compatible = "brcm,bcm2711-emmc2"; - status = "okay"; - }; - --- -2.17.1 - diff --git a/buildroot-external/board/raspberrypi/uboot.config b/buildroot-external/board/raspberrypi/uboot.config index f358c84db..622f91b73 100644 --- a/buildroot-external/board/raspberrypi/uboot.config +++ b/buildroot-external/board/raspberrypi/uboot.config @@ -1,4 +1,3 @@ -# CONFIG_USB_STORAGE is not set # CONFIG_DOS_PARTITION is not set CONFIG_CMD_FILEENV=y CONFIG_ENV_IS_NOWHERE=Y @@ -7,4 +6,3 @@ CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y -# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set \ No newline at end of file diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index dcda5482f..9700f4c1d 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -4,7 +4,7 @@ BR2_ARM_EABIHF=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0-w $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-zero-w" @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 3b1f66783..48e51d4e0 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b" @@ -79,7 +79,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 332f8b21a..41d031a2b 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2710-rpi-3-b broadcom/bcm2837-rpi-3-b broadcom/bcm2710-rpi-3-b-plus" @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 6f19e3137..057ba39a5 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3" @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 4e2ca0ed8..b27e1dc3f 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_NEON_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -81,7 +81,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01-rc4" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index 38e79278e..ef596ca73 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_NEON_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -81,7 +81,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01-rc4" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4_32b" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 498914f4e..8b7638cea 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -4,7 +4,7 @@ BR2_ARM_EABIHF=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -15,7 +15,7 @@ BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" BR2_INIT_SYSTEMD=y BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" @@ -24,7 +24,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm" @@ -79,7 +79,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx deleted file mode 100755 index f21193ef9..000000000 --- a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx +++ /dev/null @@ -1,18 +0,0 @@ -#!/bin/sh - -HCIATTACH=/usr/bin/hciattach -SERIAL=`cat /proc/device-tree/serial-number | cut -c9-` -B1=`echo $SERIAL | cut -c3-4` -B2=`echo $SERIAL | cut -c5-6` -B3=`echo $SERIAL | cut -c7-8` -BDADDR=`printf b8:27:eb:%02x:%02x:%02x $((0x$B1 ^ 0xaa)) $((0x$B2 ^ 0xaa)) $((0x$B3 ^ 0xaa))` - -if [ "$(cat /proc/device-tree/aliases/uart0)" = "$(cat /proc/device-tree/aliases/serial1)" ] ; then - if [ "$(wc -c /proc/device-tree/soc/gpio@7e200000/uart0_pins/brcm\,pins | cut -f 1 -d ' ')" = "16" ] ; then - $HCIATTACH /dev/serial1 bcm43xx 3000000 flow - $BDADDR - else - $HCIATTACH /dev/serial1 bcm43xx 921600 noflow - $BDADDR - fi -else - $HCIATTACH /dev/serial1 bcm43xx 460800 noflow - $BDADDR -fi diff --git a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.mk b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.mk index 65641f661..8df6d77b4 100644 --- a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.mk +++ b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.mk @@ -11,21 +11,28 @@ BLUETOOTH_BCM43XX_SITE = $(BR2_EXTERNAL_HASSOS_PATH)/package/bluetooth-bcm43xx BLUETOOTH_BCM43XX_SITE_METHOD = local define BLUETOOTH_BCM43XX_BUILD_CMDS - curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/96eefffcccc725425fd83be5e0704a5c32b79e54/broadcom/BCM43430A1.hcd - curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/96eefffcccc725425fd83be5e0704a5c32b79e54/broadcom/BCM4345C0.hcd + curl -L -o $(@D)/BCM43430A1.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM43430A1.hcd + curl -L -o $(@D)/BCM4345C0.hcd https://raw.githubusercontent.com/RPi-Distro/bluez-firmware/fff76cb15527c435ce99a9787848eacd6288282c/broadcom/BCM4345C0.hcd + curl -L -o $(@D)/btuart https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/btuart + curl -L -o $(@D)/bthelper https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/usr/bin/bthelper + curl -L -o $(@D)/90-pi-bluetooth.rules https://raw.githubusercontent.com/RPi-Distro/pi-bluetooth/cbdbcb66bcc5b9af05f1a9fffe2254c872bb0ace/lib/udev/rules.d/90-pi-bluetooth.rules endef define BLUETOOTH_BCM43XX_INSTALL_TARGET_CMDS $(INSTALL) -d $(TARGET_DIR)/etc/systemd/system/hassos-hardware.target.wants - $(INSTALL) -m 0755 $(@D)/bluetooth-bcm43xx $(TARGET_DIR)/usr/sbin/ $(INSTALL) -m 0644 $(@D)/bluetooth-bcm43xx.service $(TARGET_DIR)/usr/lib/systemd/system/ + $(INSTALL) -m 0644 $(@D)/bthelper@.service $(TARGET_DIR)/usr/lib/systemd/system/ ln -fs /usr/lib/systemd/system/bluetooth-bcm43xx.service $(TARGET_DIR)/etc/systemd/system/hassos-hardware.target.wants/ + $(INSTALL) -d $(TARGET_DIR)/usr/bin + $(INSTALL) -m 0755 $(@D)/btuart $(TARGET_DIR)/usr/bin/ + $(INSTALL) -m 0755 $(@D)/bthelper $(TARGET_DIR)/usr/bin/ + $(INSTALL) -d $(TARGET_DIR)/lib/firmware/brcm $(INSTALL) -m 0644 $(@D)/*.hcd $(TARGET_DIR)/lib/firmware/brcm/ $(INSTALL) -d $(TARGET_DIR)/usr/lib/udev/rules.d - $(INSTALL) -m 0644 $(@D)/bluetooth-bcm43xx.rules $(TARGET_DIR)/usr/lib/udev/rules.d/ + $(INSTALL) -m 0644 $(@D)/90-pi-bluetooth.rules $(TARGET_DIR)/usr/lib/udev/rules.d/ endef $(eval $(generic-package)) diff --git a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.rules b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.rules deleted file mode 100644 index 461fc1c84..000000000 --- a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.rules +++ /dev/null @@ -1,22 +0,0 @@ -KERNEL=="ttyAMA[01]", PROGRAM="/bin/sh -c '\ - ALIASES=/proc/device-tree/aliases; \ - if cmp -s $ALIASES/uart0 $ALIASES/serial0; then \ - echo 0;\ - elif cmp -s $ALIASES/uart0 $ALIASES/serial1; then \ - echo 1; \ - else \ - exit 1; \ - fi\ -'", SYMLINK+="serial%c" - -KERNEL=="ttyS0", PROGRAM="/bin/sh -c '\ - ALIASES=/proc/device-tree/aliases; \ - if cmp -s $ALIASES/uart1 $ALIASES/serial0; then \ - echo 0; \ - elif cmp -s $ALIASES/uart1 $ALIASES/serial1; then \ - echo 1; \ - else \ - exit 1; \ - fi \ -'", SYMLINK+="serial%c" - diff --git a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.service b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.service index 0fc39375f..ab006d73e 100644 --- a/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.service +++ b/buildroot-external/package/bluetooth-bcm43xx/bluetooth-bcm43xx.service @@ -1,12 +1,13 @@ [Unit] Description=Bluetooth for BCM43xx Before=bluetooth.service -After=dev-ttyAMA0.device +Requires=dev-serial1.device +After=dev-serial1.device ConditionFileNotEmpty=/proc/device-tree/soc/gpio@7e200000/bt_pins/brcm,pins [Service] Type=forking -ExecStart=/usr/sbin/bluetooth-bcm43xx +ExecStart=/usr/bin/btuart [Install] WantedBy=hassos-hardware.target diff --git a/buildroot-external/package/bluetooth-bcm43xx/bthelper@.service b/buildroot-external/package/bluetooth-bcm43xx/bthelper@.service new file mode 100644 index 000000000..c8a16c15f --- /dev/null +++ b/buildroot-external/package/bluetooth-bcm43xx/bthelper@.service @@ -0,0 +1,8 @@ +[Unit] +Description=Raspberry Pi bluetooth helper +Requires=bluetooth.service +After=bluetooth.service + +[Service] +Type=simple +ExecStart=/usr/bin/bthelper %I diff --git a/buildroot-external/rootfs-overlay/usr/lib/udev/rules.d/hmip-rfusb.rules b/buildroot-external/rootfs-overlay/usr/lib/udev/rules.d/99-hmip-rfusb.rules similarity index 100% rename from buildroot-external/rootfs-overlay/usr/lib/udev/rules.d/hmip-rfusb.rules rename to buildroot-external/rootfs-overlay/usr/lib/udev/rules.d/99-hmip-rfusb.rules From 4c9a4aadc835876cb1568e01f54d19be8671346c Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Dec 2019 10:44:41 +0100 Subject: [PATCH 25/43] Add qemu guest agent (#505) * Add qemu guest agent * Fix make file * Fix targets * Convert it to autobuild * Fix paths * fix target * Fix options * Fix startup * Update kernel * Fix state dir * Only load on kvm --- buildroot-external/Config.in | 1 + .../board/intel/ova/kernel.config | 5 + buildroot-external/configs/ova_defconfig | 1 + .../package/qemu-guest-agent/Config.in | 9 ++ .../qemu-guest-agent/qemu-guest-agent.mk | 110 ++++++++++++++++++ .../qemu-guest-agent/qemu-guest.service | 11 ++ 6 files changed, 137 insertions(+) create mode 100644 buildroot-external/package/qemu-guest-agent/Config.in create mode 100644 buildroot-external/package/qemu-guest-agent/qemu-guest-agent.mk create mode 100644 buildroot-external/package/qemu-guest-agent/qemu-guest.service diff --git a/buildroot-external/Config.in b/buildroot-external/Config.in index eb56fe71b..e57911006 100644 --- a/buildroot-external/Config.in +++ b/buildroot-external/Config.in @@ -4,3 +4,4 @@ source "$BR2_EXTERNAL_HASSOS_PATH/package/apparmor/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/hardkernel-boot/Config.in" +source "$BR2_EXTERNAL_HASSOS_PATH/package/qemu-guest-agent/Config.in" diff --git a/buildroot-external/board/intel/ova/kernel.config b/buildroot-external/board/intel/ova/kernel.config index 72e2e1300..c0806dc73 100644 --- a/buildroot-external/board/intel/ova/kernel.config +++ b/buildroot-external/board/intel/ova/kernel.config @@ -5,6 +5,7 @@ CONFIG_VMWARE_PVSCSI=y CONFIG_VMWARE_VMCI_VSOCKETS=y CONFIG_VMWARE_VMCI=y CONFIG_VMWARE_BALLOON=y +CONFIG_VMWARE_PVSCSI=y CONFIG_VIRTIO=y CONFIG_VIRTIO_PCI=y @@ -12,6 +13,9 @@ CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BALLOON=m CONFIG_VIRTIO_INPUT=m CONFIG_VIRTIO_BLK=y +CONFIG_VIRTIO_CONSOLE=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_SCSI_VIRTIO=y CONFIG_HW_RANDOM_VIRTIO=y CONFIG_SCSI_LOWLEVEL=y @@ -27,4 +31,5 @@ CONFIG_HYPERV_BALLOON=m CONFIG_HYPERV_KEYBOARD=m CONFIG_HYPERV_STORAGE=y CONFIG_HYPERV_NET=y +CONFIG_HYPERV_VSOCKETS=m CONFIG_FB_HYPERV=y diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index 8190d1d72..bbbd7a3a0 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -56,6 +56,7 @@ BR2_PACKAGE_TINI=y BR2_PACKAGE_DOCKER_ENGINE=y BR2_PACKAGE_DOCKER_CLI=y BR2_PACKAGE_OPENVMTOOLS=y +BR2_PACKAGE_QEMU_GUEST_AGENT=y BR2_PACKAGE_RAUC=y BR2_PACKAGE_RAUC_NETWORK=y BR2_PACKAGE_RNG_TOOLS=y diff --git a/buildroot-external/package/qemu-guest-agent/Config.in b/buildroot-external/package/qemu-guest-agent/Config.in new file mode 100644 index 000000000..8ec346511 --- /dev/null +++ b/buildroot-external/package/qemu-guest-agent/Config.in @@ -0,0 +1,9 @@ +config BR2_PACKAGE_QEMU_GUEST_AGENT + depends on BR2_USE_MMU # libglib2 + depends on BR2_USE_WCHAR # libglib2 + depends on BR2_TOOLCHAIN_HAS_THREADS # libglib2 + select BR2_PACKAGE_LIBGLIB2 + select BR2_PACKAGE_ZLIB + bool "QEMU Guest Agent" + help + QEMU guest agent for qemu based virtualisations \ No newline at end of file diff --git a/buildroot-external/package/qemu-guest-agent/qemu-guest-agent.mk b/buildroot-external/package/qemu-guest-agent/qemu-guest-agent.mk new file mode 100644 index 000000000..713ce9605 --- /dev/null +++ b/buildroot-external/package/qemu-guest-agent/qemu-guest-agent.mk @@ -0,0 +1,110 @@ +################################################################################ +# +# qemu-guest-agent +# +################################################################################ + +QEMU_GUEST_AGENT_VERSION = 3.1.1.1 +QEMU_GUEST_AGENT_SOURCE = qemu-$(QEMU_GUEST_AGENT_VERSION).tar.xz +QEMU_GUEST_AGENT_SITE = http://download.qemu.org +QEMU_GUEST_AGENT_LICENSE = GPL-2.0, LGPL-2.1, MIT, BSD-3-Clause, BSD-2-Clause, Others/BSD-1c +QEMU_GUEST_AGENT_LICENSE_FILES = COPYING COPYING.LIB +# NOTE: there is no top-level license file for non-(L)GPL licenses; +# the non-(L)GPL license texts are specified in the affected +# individual source files. + +QEMU_GUEST_AGENT_DEPENDENCIES = host-pkgconf libglib2 zlib + +# Need the LIBS variable because librt and libm are +# not automatically pulled. :-( +QEMU_GUEST_AGENT_LIBS = -lrt -lm + +QEMU_GUEST_AGENT_VARS = LIBTOOL=$(HOST_DIR)/bin/libtool + +QEMU_GUEST_AGENT_OPTS = --enable-guest-agent + +# Override CPP, as it expects to be able to call it like it'd +# call the compiler. +define QEMU_GUEST_AGENT_CONFIGURE_CMDS + ( cd $(@D); \ + LIBS='$(QEMU_GUEST_AGENT_LIBS)' \ + $(TARGET_CONFIGURE_OPTS) \ + $(TARGET_CONFIGURE_ARGS) \ + CPP="$(TARGET_CC) -E" \ + $(QEMU_GUEST_AGENT_VARS) \ + ./configure \ + --prefix=/usr \ + --localstatedir=/var \ + --cross-prefix=$(TARGET_CROSS) \ + --audio-drv-list= \ + --disable-kvm \ + --disable-linux-user \ + --disable-linux-aio \ + --disable-xen \ + --disable-docs \ + --disable-curl \ + --disable-gnutls \ + --disable-gtk \ + --disable-vte \ + --disable-vnc-jpeg \ + --disable-opengl \ + --disable-usb-redir \ + --disable-sdl \ + --disable-system \ + --disable-user \ + --disable-guest-agent \ + --disable-nettle \ + --disable-gcrypt \ + --disable-curses \ + --disable-vnc \ + --disable-virtfs \ + --disable-brlapi \ + --disable-fdt \ + --disable-bluez \ + --disable-kvm \ + --disable-rdma \ + --disable-vde \ + --disable-netmap \ + --disable-cap-ng \ + --disable-attr \ + --disable-vhost-net \ + --disable-spice \ + --disable-rbd \ + --disable-libiscsi \ + --disable-libnfs \ + --disable-smartcard \ + --disable-libusb \ + --disable-usb-redir \ + --disable-lzo \ + --disable-snappy \ + --disable-bzip2 \ + --disable-seccomp \ + --disable-coroutine-pool \ + --disable-glusterfs \ + --disable-tpm \ + --disable-numa \ + --disable-blobs \ + --disable-capstone \ + --disable-tools \ + --disable-tcg-interpreter \ + $(QEMU_GUEST_AGENT_OPTS) \ + ) +endef + +define QEMU_GUEST_AGENT_BUILD_CMDS + $(TARGET_MAKE_ENV) $(MAKE) -C $(@D) +endef + +define QEMU_GUEST_AGENT_INSTALL_TARGET_CMDS + $(TARGET_MAKE_ENV) $(MAKE) -C $(@D) $(QEMU_GUEST_AGENT_MAKE_ENV) DESTDIR=$(TARGET_DIR) install +endef + +define QEMU_GUEST_AGENT_INSTALL_INIT_SYSTEMD + $(INSTALL) -D -m 644 $(QEMU_GUEST_AGENT_PKGDIR)/qemu-guest.service \ + $(TARGET_DIR)/usr/lib/systemd/system/qemu-guest.service + $(INSTALL) -d $(TARGET_DIR)/etc/systemd/system/multi-user.target.wants + ln -fs ../../../../usr/lib/systemd/system/qemu-guest.service \ + $(TARGET_DIR)/etc/systemd/system/multi-user.target.wants/qemu-guest.service +endef + +$(eval $(generic-package)) diff --git a/buildroot-external/package/qemu-guest-agent/qemu-guest.service b/buildroot-external/package/qemu-guest-agent/qemu-guest.service new file mode 100644 index 000000000..7888dcb4f --- /dev/null +++ b/buildroot-external/package/qemu-guest-agent/qemu-guest.service @@ -0,0 +1,11 @@ +[Unit] +Description=QEMU Guest Agent +After=syslog.target network.target +ConditionVirtualization=kvm + +[Service] +ExecStart=/usr/bin/qemu-ga -m virtio-serial -p /dev/virtio-ports/org.qemu.guest_agent.0 +Restart=on-failure + +[Install] +WantedBy=multi-user.target From 6e7bbdbe636c3561c46a32cadcd3ab3bdea81b95 Mon Sep 17 00:00:00 2001 From: Franck Nijhof Date: Thu, 12 Dec 2019 12:12:49 +0100 Subject: [PATCH 26/43] Fix auto expand disk for GPT (#508) --- .../rootfs-overlay/usr/libexec/hassos-expand | 22 ++++++------------- 1 file changed, 7 insertions(+), 15 deletions(-) diff --git a/buildroot-external/rootfs-overlay/usr/libexec/hassos-expand b/buildroot-external/rootfs-overlay/usr/libexec/hassos-expand index 341308bbd..64554e18b 100755 --- a/buildroot-external/rootfs-overlay/usr/libexec/hassos-expand +++ b/buildroot-external/rootfs-overlay/usr/libexec/hassos-expand @@ -6,28 +6,20 @@ DEVICE_CHILD="$(findfs LABEL="hassos-data")" DEVICE_ROOT="/dev/$(lsblk -no pkname "${DEVICE_CHILD}")" PART_NUM="${DEVICE_CHILD: -1}" +# Need resize +UNUSED=$(sfdisk -Fq "${DEVICE_ROOT}" | cut -d " " -f 3 | tail -1) +if [ -z "${UNUSED}" ] || [ "${UNUSED}" -le "2048" ]; then + echo "[INFO] No resize of data partition needed" + exit 0 +fi + if sfdisk -dq "${DEVICE_ROOT}" | grep -q 'label: gpt'; then - - # Need resize - if [ "$(sgdisk -E "${DEVICE_ROOT}")" -le "2048" ]; then - echo "[INFO] No resize of data partition needed" - exit 0 - fi - # Resize & Reload partition echo "[INFO] Update hassos-data partition ${PART_NUM}" sgdisk -e "${DEVICE_ROOT}" sgdisk -d "${PART_NUM}" -n "${PART_NUM}:0:0" -c "${PART_NUM}:hassos-data" -t "${PART_NUM}:0FC63DAF-8483-4772-8E79-3D69D8477DE4" -u "${PART_NUM}:a52a4597-fa3a-4851-aefd-2fbe9f849079" "${DEVICE_ROOT}" sgdisk -v "${DEVICE_ROOT}" else - - # Need resize - UNUSED=$(sfdisk -Fq "${DEVICE_ROOT}" | cut -d " " -f 3 | tail -1) - if [ -z "${UNUSED}" ] || [ "${UNUSED}" -le "2048" ]; then - echo "[INFO] No resize of data partition needed" - exit 0 - fi - echo ", +" | sfdisk -N "${PART_NUM}" "${DEVICE_ROOT}" --force sfdisk -V "${DEVICE_ROOT}" fi From 308fccd7b1b1fc827ddf77907fd138f702b62c4c Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 12 Dec 2019 12:28:31 +0100 Subject: [PATCH 27/43] Kernel updates 4.19.88 (#509) * Update kernel 4.19.88 * Fix asus --- Documentation/kernel.md | 14 +++--- ...rockchip-dwc2-usb-partial-power-down.patch | 44 ------------------- .../configs/intel_nuc_defconfig | 2 +- .../configs/odroid_c2_defconfig | 2 +- .../configs/odroid_xu4_defconfig | 2 +- .../configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- 8 files changed, 13 insertions(+), 57 deletions(-) delete mode 100644 buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch diff --git a/Documentation/kernel.md b/Documentation/kernel.md index e61e7fa23..678ad822f 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -3,10 +3,10 @@ | Board | Version | |-------|---------| -| Open Virtual Applicance | 4.19.72 | -| Raspberry Pi | 4.19.71 | -| Tinker Board | 4.19.72 | -| Odroid-C2 | 4.19.72 | -| Odroid-XU4 | 4.19.72 | -| Orangepi-Prime | 4.19.72 | -| Intel NUC | 4.19.72 | +| Open Virtual Applicance | 4.19.88 | +| Raspberry Pi | 4.19.88 | +| Tinker Board | 4.19.88 | +| Odroid-C2 | 4.19.88 | +| Odroid-XU4 | 4.19.88 | +| Orangepi-Prime | 4.19.88 | +| Intel NUC | 4.19.88 | diff --git a/buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch b/buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch deleted file mode 100644 index 0f0f85573..000000000 --- a/buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 04fbf78e4e569bf872f1ffcb0a6f9b89569dc913 Mon Sep 17 00:00:00 2001 -From: Hal Emmerich -Date: Thu, 19 Jul 2018 21:48:08 -0500 -Subject: [PATCH] usb: dwc2: disable power_down on rockchip devices - - The bug would let the usb controller enter partial power down, - which was formally known as hibernate, upon boot if nothing was plugged - in to the port. Partial power down couldn't be exited properly, so any - usb devices plugged in after boot would not be usable. - - Before the name change, params.hibernation was false by default, so - _dwc2_hcd_suspend() would skip entering hibernation. With the - rename, _dwc2_hcd_suspend() was changed to use params.power_down - to decide whether or not to enter partial power down. - - Since params.power_down is non-zero by default, it needs to be set - to 0 for rockchip devices to restore functionality. - - This bug was reported in the linux-usb thread: - REGRESSION: usb: dwc2: USB device not seen after boot - - The commit that caused this regression is: - 6d23ee9caa6790aea047f9aca7f3c03cb8d96eb6 - -Signed-off-by: Hal Emmerich ---- - drivers/usb/dwc2/params.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c -index f03e418..492607a 100644 ---- a/drivers/usb/dwc2/params.c -+++ b/drivers/usb/dwc2/params.c -@@ -82,6 +82,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) - p->host_perio_tx_fifo_size = 256; - p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << - GAHBCFG_HBSTLEN_SHIFT; -+ p->power_down = 0; - } - - static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) --- -2.11.0 - diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index aa021d7c9..58dd9c5df 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_DEFCONFIG="x86_64" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/nuc/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 08ef17591..f776c762d 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index ee9b7d868..3c8818ad1 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 9e0382ac9..72e41d87c 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -37,7 +37,7 @@ BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/ BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot.config" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun50i-h5-orangepi-prime" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index bbbd7a3a0..e8a3d743e 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_DEFCONFIG="x86_64" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/intel/ova/kernel.config" BR2_LINUX_KERNEL_LZ4=y diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index 61ec6d224..f9d3d11d9 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -21,7 +21,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" From 30aa7754507e08d9fce16825c7fbd92a5f9cbc67 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Dec 2019 09:13:41 +0100 Subject: [PATCH 28/43] Fix Kernel For odroid XU4/C2 (#510) --- Documentation/kernel.md | 4 +- ...eson_Fix_IRQ_trigger_type_for_macirq.patch | 50 - ...ed_strobe_timing_for_emmc_hs400_mode.patch | 13 - .../board/hardkernel/patches/README.md | 2 + ...1-ARM64-defconfig-enable-CEC-support.patch | 47 + ...2-odroidhc1.dts-fix-booting-from-mmc.patch | 72 + ...oC-meson-add-meson-audio-core-driver.patch | 290 ++ ...-ASoC-meson-add-register-definitions.patch | 360 ++ ...4-ASoC-meson-add-aiu-i2s-dma-support.patch | 424 +++ ...oC-meson-add-initial-i2s-dai-support.patch | 518 +++ ...ASoC-meson-add-aiu-spdif-dma-support.patch | 445 +++ ...-meson-add-initial-spdif-dai-support.patch | 432 +++ ...enable-audio-support-for-meson-SoCs-.patch | 31 + ...-meson-gx-add-audio-controller-nodes.patch | 189 ++ ...0-snd-meson-activate-HDMI-audio-path.patch | 55 + ...ect-dw-hdmi-i2s-audio-for-meson-hdmi.patch | 22 + ...-gx-add-sound-dai-cells-to-HDMI-node.patch | 38 + ...activate-hdmi-audio-HDMI-enabled-boa.patch | 864 +++++ ...mi-Use-AUTO-CTS-setup-mode-when-non-.patch | 78 + ...rm_crtc_vblank_on-drm_crtc_vblank_of.patch | 29 + ...-soc-amlogic-add-meson-canvas-driver.patch | 316 ++ ...meson-gx-add-dmcbus-and-canvas-nodes.patch | 41 + ...m-meson-Use-optional-canvas-provider.patch | 174 + ...gx-Add-canvas-provider-node-to-the-v.patch | 28 + ...rt-Overlay-plane-for-video-rendering.patch | 1260 +++++++ ...SD-scaler-management-into-plane-atom.patch | 200 ++ ...-drm-meson-Add-primary-plane-scaling.patch | 287 ++ ...gxl-remove-invalid-GPIOX-tsin_a-pins.patch | 57 + ...gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch | 82 + ...gxl-libretech-cc-fix-GPIO-lines-name.patch | 41 + ...-gxbb-nanopi-k2-fix-GPIO-lines-names.patch | 40 + ...n-gxbb-odroidc2-fix-GPIO-lines-names.patch | 40 + ...-gxl-khadas-vim-fix-GPIO-lines-names.patch | 40 + ...dd-support-for-VIC-alternate-timings.patch | 330 ++ ...on-add-v4l2-m2m-video-decoder-driver.patch | 2971 +++++++++++++++++ ...-MAINTAINERS-Add-meson-video-decoder.patch | 34 + ...32-arm64-dts-meson-gx-add-vdec-entry.patch | 40 + ...033-arm64-dts-meson-add-vdec-entries.patch | 65 + ...duce-controls-and-V4L2_CID_MIN_BUFFE.patch | 156 + ...2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch | 51 + ...-subscribing-to-V4L2_EVENT_SOURCE_CH.patch | 273 ++ ...eson-vdec-add-H.264-decoding-support.patch | 593 ++++ ...eson-vdec-add-MPEG4-decoding-support.patch | 315 ++ ...eson-vdec-add-MJPEG-decoding-support.patch | 255 ++ ...xbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch | 44 + ...0041-drm-meson-Add-HDMI-1.4-4k-modes.patch | 167 + ...rm-meson-Use-drm_fbdev_generic_setup.patch | 94 + ...mi-Add-SCDC-and-TMDS-Scrambling-supp.patch | 150 + ...4-drm-meson-add-HDMI-div40-TMDS-mode.patch | 71 + ...-add-support-for-HDMI2.0-2160p-modes.patch | 30 + ...w-hdmi-add-support-for-YUV420-output.patch | 200 ++ ...mi-support-dynamically-get-input-out.patch | 104 + ...hdmi-allow-ycbcr420-modes-for-0x200a.patch | 48 + ...-drm-meson-Add-YUV420-output-support.patch | 584 ++++ ...Output-in-YUV444-if-sink-supports-it.patch | 33 + ...-Alpha-Primary-Plane-bug-on-Meson-GX.patch | 126 + ...eson-Fix-IRQ-trigger-type-for-macirq.patch | 51 + ...son-fix-max-mode_config-height-width.patch | 36 + .../patches/linux/mali_odroid-xu.patch | 92 + .../configs/odroid_c2_defconfig | 6 +- .../configs/odroid_xu4_defconfig | 6 +- 61 files changed, 13423 insertions(+), 71 deletions(-) delete mode 100644 buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch delete mode 100644 buildroot-external/board/hardkernel/odroid-xu4/patches/linux/000-odroid_xu4_modified_strobe_timing_for_emmc_hs400_mode.patch create mode 100644 buildroot-external/board/hardkernel/patches/README.md create mode 100644 buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0001-exynos5422-odroidhc1.dts-fix-booting-from-mmc.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch diff --git a/Documentation/kernel.md b/Documentation/kernel.md index 678ad822f..b286c69a5 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -6,7 +6,7 @@ | Open Virtual Applicance | 4.19.88 | | Raspberry Pi | 4.19.88 | | Tinker Board | 4.19.88 | -| Odroid-C2 | 4.19.88 | -| Odroid-XU4 | 4.19.88 | +| Odroid-C2 | 4.19.72 | +| Odroid-XU4 | 4.19.72 | | Orangepi-Prime | 4.19.88 | | Intel NUC | 4.19.88 | diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch deleted file mode 100644 index a3f006641..000000000 --- a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/000-arm64_dts_meson_Fix_IRQ_trigger_type_for_macirq.patch +++ /dev/null @@ -1,50 +0,0 @@ -diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -index b160bd1084de..fffd55787981 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -@@ -461,7 +461,7 @@ - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xff3f0000 0x0 0x10000 - 0x0 0xff634540 0x0 0x8>; -- interrupts = ; -+ interrupts = ; - interrupt-names = "macirq"; - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index ed336c7a98a7..44c5c51ff1fa 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -467,7 +467,7 @@ - compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xc9410000 0x0 0x10000 - 0x0 0xc8834540 0x0 0x4>; -- interrupts = ; -+ interrupts = ; - interrupt-names = "macirq"; - status = "disabled"; - }; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -index 00f7be6d83f7..2e1cd5e3a246 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -@@ -143,7 +143,6 @@ - interrupt-parent = <&gpio_intc>; - /* MAC_INTR on GPIOZ_15 */ - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; -- eee-broken-1000t; - }; - }; - }; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -index 70325b273bd2..ec09bb5792b7 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -@@ -142,7 +142,6 @@ - eth_phy0: ethernet-phy@0 { - /* Realtek RTL8211F (0x001cc916) */ - reg = <0>; -- eee-broken-1000t; - }; - }; - }; diff --git a/buildroot-external/board/hardkernel/odroid-xu4/patches/linux/000-odroid_xu4_modified_strobe_timing_for_emmc_hs400_mode.patch b/buildroot-external/board/hardkernel/odroid-xu4/patches/linux/000-odroid_xu4_modified_strobe_timing_for_emmc_hs400_mode.patch deleted file mode 100644 index 6f30398a3..000000000 --- a/buildroot-external/board/hardkernel/odroid-xu4/patches/linux/000-odroid_xu4_modified_strobe_timing_for_emmc_hs400_mode.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi -index d0ae8c5315048..3ccf2c5be034c 100755 ---- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi -+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi -@@ -402,7 +402,7 @@ - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; - samsung,dw-mshc-hs400-timing = <0 2>; -- samsung,read-strobe-delay = <90>; -+ samsung,read-strobe-delay = <150>; - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; - bus-width = <8>; diff --git a/buildroot-external/board/hardkernel/patches/README.md b/buildroot-external/board/hardkernel/patches/README.md new file mode 100644 index 000000000..09d2ff30d --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/README.md @@ -0,0 +1,2 @@ +# Kernel +https://github.com/akuster/meta-odroid diff --git a/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch b/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch new file mode 100644 index 000000000..b34666a0e --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch @@ -0,0 +1,47 @@ +From 6763c7964e9cb28e21497eee0032be053461bba5 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Mon, 13 Nov 2017 12:09:40 +0100 +Subject: [PATCH 01/53] ARM64: defconfig: enable CEC support + +Turn on CONFIG_CEC_SUPPORT and CONFIG_CEC_PLATFORM_DRIVERS +Turn on CONFIG_VIDEO_MESON_AO_CEC as module +Turn on CONFIG_DRM_DW_HDMI_CEC as module + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index db8d364f8476..ab1cb51319e7 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -413,6 +413,7 @@ CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_CEC_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y + CONFIG_VIDEO_V4L2_SUBDEV_API=y + # CONFIG_DVB_NET is not set +@@ -424,6 +425,8 @@ CONFIG_VIDEO_SAMSUNG_S5P_MFC=m + CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m + CONFIG_VIDEO_RENESAS_FCP=m + CONFIG_VIDEO_RENESAS_VSP1=m ++CONFIG_CEC_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_MESON_AO_CEC=m + CONFIG_DRM=m + CONFIG_DRM_NOUVEAU=m + CONFIG_DRM_EXYNOS=m +@@ -444,6 +447,7 @@ CONFIG_DRM_RCAR_LVDS=m + CONFIG_DRM_TEGRA=m + CONFIG_DRM_PANEL_SIMPLE=m + CONFIG_DRM_I2C_ADV7511=m ++CONFIG_DRM_DW_HDMI_CEC=m + CONFIG_DRM_VC4=m + CONFIG_DRM_HISI_HIBMC=m + CONFIG_DRM_HISI_KIRIN=m +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0001-exynos5422-odroidhc1.dts-fix-booting-from-mmc.patch b/buildroot-external/board/hardkernel/patches/linux/0001-exynos5422-odroidhc1.dts-fix-booting-from-mmc.patch new file mode 100644 index 000000000..95d35171d --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0001-exynos5422-odroidhc1.dts-fix-booting-from-mmc.patch @@ -0,0 +1,72 @@ +From 7041ca0d550d3a9caed54857365cf504eaeea756 Mon Sep 17 00:00:00 2001 +From: Armin Kuster +Date: Fri, 23 Mar 2018 09:02:44 -0700 +Subject: [PATCH] exynos5422-odroidhc1.dts: fix booting from mmc + +Signed-off-by: Armin Kuster +--- + arch/arm/boot/dts/exynos5422-odroidhc1.dts | 37 ++++++++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts +index fb8e8ae..c7adecf 100644 +--- a/arch/arm/boot/dts/exynos5422-odroidhc1.dts ++++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts +@@ -11,6 +11,7 @@ + */ + + /dts-v1/; ++#include + #include "exynos5422-odroid-core.dtsi" + + / { +@@ -30,6 +31,14 @@ + }; + }; + ++ emmc_pwrseq: pwrseq { ++ pinctrl-0 = <&emmc_nrst_pin>; ++ pinctrl-names = "default"; ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0 0>; +@@ -211,3 +220,31 @@ + &usbdrd_dwc3_1 { + dr_mode = "host"; + }; ++ ++&mmc_0 { ++ status = "okay"; ++ mmc-pwrseq = <&emmc_pwrseq>; ++ card-detect-delay = <200>; ++ samsung,dw-mshc-ciu-div = <3>; ++ samsung,dw-mshc-sdr-timing = <0 4>; ++ samsung,dw-mshc-ddr-timing = <0 2>; ++ samsung,dw-mshc-hs400-timing = <0 2>; ++ samsung,read-strobe-delay = <90>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ vmmc-supply = <&ldo18_reg>; ++ vqmmc-supply = <&ldo3_reg>; ++}; ++ ++&pinctrl_1 { ++ emmc_nrst_pin: emmc-nrst { ++ samsung,pins = "gpd1-0"; ++ samsung,pin-function = ; ++ samsung,pin-pud = ; ++ samsung,pin-drv = ; ++ }; ++}; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch new file mode 100644 index 000000000..e9a3240ab --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch @@ -0,0 +1,290 @@ +From 6b2734923e6bf1d4bd98f918400e2c7a692a8db0 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 11:49:55 +0200 +Subject: [PATCH 02/53] ASoC: meson: add meson audio core driver + +This patch adds support for the audio core driver for the Amlogic Meson SoC +family. The purpose of this driver is to properly reset the audio block and +provide register access for the different devices scattered in this address +space. This includes output and input DMAs, pcm, i2s and spdif dai, card +level routing, internal codec for the gxl variant + +For more information, please refer to the section 5 of the public datasheet +of the S905 (gxbb). This datasheet is available here: [0]. + +[0]: http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/Kconfig | 10 ++ + sound/soc/meson/Makefile | 4 + + sound/soc/meson/audio-core.c | 190 +++++++++++++++++++++++++++++++++++ + sound/soc/meson/audio-core.h | 28 ++++++ + 4 files changed, 232 insertions(+) + create mode 100644 sound/soc/meson/audio-core.c + create mode 100644 sound/soc/meson/audio-core.h + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index 8af8bc358a90..ed432d488b74 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -63,3 +63,13 @@ config SND_MESON_AXG_SPDIFOUT + in the Amlogic AXG SoC family + + endmenu ++ ++menuconfig SND_SOC_MESON ++ tristate "ASoC support for Amlogic Meson SoCs" ++ depends on ARCH_MESON ++ select MFD_CORE ++ select REGMAP_MMIO ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the Amlogic Meson SoCs Audio interfaces. You will also need to ++ select the audio interfaces to support below. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index c5e003b093db..768d7c414649 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -19,3 +19,7 @@ obj-$(CONFIG_SND_MESON_AXG_TDMIN) += snd-soc-meson-axg-tdmin.o + obj-$(CONFIG_SND_MESON_AXG_TDMOUT) += snd-soc-meson-axg-tdmout.o + obj-$(CONFIG_SND_MESON_AXG_SOUND_CARD) += snd-soc-meson-axg-sound-card.o + obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o ++ ++snd-soc-meson-audio-core-objs := audio-core.o ++ ++obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o +\ No newline at end of file +diff --git a/sound/soc/meson/audio-core.c b/sound/soc/meson/audio-core.c +new file mode 100644 +index 000000000000..99993ec4a5cc +--- /dev/null ++++ b/sound/soc/meson/audio-core.c +@@ -0,0 +1,190 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-audio-core" ++ ++static const char * const acore_clock_names[] = { "aiu_top", ++ "aiu_glue", ++ "audin" }; ++ ++static int meson_acore_init_clocks(struct device *dev) ++{ ++ struct clk *clock; ++ int i, ret; ++ ++ for (i = 0; i < ARRAY_SIZE(acore_clock_names); i++) { ++ clock = devm_clk_get(dev, acore_clock_names[i]); ++ if (IS_ERR(clock)) { ++ if (PTR_ERR(clock) != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get %s clock\n", ++ acore_clock_names[i]); ++ return PTR_ERR(clock); ++ } ++ ++ ret = clk_prepare_enable(clock); ++ if (ret) { ++ dev_err(dev, "Failed to enable %s clock\n", ++ acore_clock_names[i]); ++ return ret; ++ } ++ ++ ret = devm_add_action_or_reset(dev, ++ (void(*)(void *))clk_disable_unprepare, ++ clock); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static const char * const acore_reset_names[] = { "aiu", ++ "audin" }; ++ ++static int meson_acore_init_resets(struct device *dev) ++{ ++ struct reset_control *reset; ++ int i, ret; ++ ++ for (i = 0; i < ARRAY_SIZE(acore_reset_names); i++) { ++ reset = devm_reset_control_get_exclusive(dev, ++ acore_reset_names[i]); ++ if (IS_ERR(reset)) { ++ if (PTR_ERR(reset) != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get %s reset\n", ++ acore_reset_names[i]); ++ return PTR_ERR(reset); ++ } ++ ++ ret = reset_control_reset(reset); ++ if (ret) { ++ dev_err(dev, "Failed to pulse %s reset\n", ++ acore_reset_names[i]); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ ++static const struct regmap_config meson_acore_regmap_config = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++}; ++ ++static const struct mfd_cell meson_acore_devs[] = { ++ { ++ .name = "meson-i2s-dai", ++ .of_compatible = "amlogic,meson-i2s-dai", ++ }, ++ { ++ .name = "meson-spdif-dai", ++ .of_compatible = "amlogic,meson-spdif-dai", ++ }, ++ { ++ .name = "meson-aiu-i2s-dma", ++ .of_compatible = "amlogic,meson-aiu-i2s-dma", ++ }, ++ { ++ .name = "meson-aiu-spdif-dma", ++ .of_compatible = "amlogic,meson-aiu-spdif-dma", ++ }, ++}; ++ ++static int meson_acore_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct meson_audio_core_data *data; ++ struct resource *res; ++ void __iomem *regs; ++ int ret; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, data); ++ ++ ret = meson_acore_init_clocks(dev); ++ if (ret) ++ return ret; ++ ++ ret = meson_acore_init_resets(dev); ++ if (ret) ++ return ret; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aiu"); ++ regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); ++ ++ data->aiu = devm_regmap_init_mmio(dev, regs, ++ &meson_acore_regmap_config); ++ if (IS_ERR(data->aiu)) { ++ dev_err(dev, "Couldn't create the AIU regmap\n"); ++ return PTR_ERR(data->aiu); ++ } ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audin"); ++ regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); ++ ++ data->audin = devm_regmap_init_mmio(dev, regs, ++ &meson_acore_regmap_config); ++ if (IS_ERR(data->audin)) { ++ dev_err(dev, "Couldn't create the AUDIN regmap\n"); ++ return PTR_ERR(data->audin); ++ } ++ ++ return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, meson_acore_devs, ++ ARRAY_SIZE(meson_acore_devs), NULL, 0, ++ NULL); ++} ++ ++static const struct of_device_id meson_acore_of_match[] = { ++ { .compatible = "amlogic,meson-audio-core", }, ++ { .compatible = "amlogic,meson-gxbb-audio-core", }, ++ { .compatible = "amlogic,meson-gxl-audio-core", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, meson_acore_of_match); ++ ++static struct platform_driver meson_acore_pdrv = { ++ .probe = meson_acore_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = meson_acore_of_match, ++ }, ++}; ++module_platform_driver(meson_acore_pdrv); ++ ++MODULE_DESCRIPTION("Meson Audio Core Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +diff --git a/sound/soc/meson/audio-core.h b/sound/soc/meson/audio-core.h +new file mode 100644 +index 000000000000..6e7a24cdc4a9 +--- /dev/null ++++ b/sound/soc/meson/audio-core.h +@@ -0,0 +1,28 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _MESON_AUDIO_CORE_H_ ++#define _MESON_AUDIO_CORE_H_ ++ ++struct meson_audio_core_data { ++ struct regmap *aiu; ++ struct regmap *audin; ++}; ++ ++#endif /* _MESON_AUDIO_CORE_H_ */ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch b/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch new file mode 100644 index 000000000..7266b0dbd --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch @@ -0,0 +1,360 @@ +From 0b2aabc632854e317544bb293cbc0c63e120ddfa Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:00:10 +0200 +Subject: [PATCH 03/53] ASoC: meson: add register definitions + +Add the register definition for the AIU and AUDIN blocks + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/aiu-regs.h | 182 +++++++++++++++++++++++++++++++++++ + sound/soc/meson/audin-regs.h | 148 ++++++++++++++++++++++++++++ + 2 files changed, 330 insertions(+) + create mode 100644 sound/soc/meson/aiu-regs.h + create mode 100644 sound/soc/meson/audin-regs.h + +diff --git a/sound/soc/meson/aiu-regs.h b/sound/soc/meson/aiu-regs.h +new file mode 100644 +index 000000000000..67391e64fe1c +--- /dev/null ++++ b/sound/soc/meson/aiu-regs.h +@@ -0,0 +1,182 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _AIU_REGS_H_ ++#define _AIU_REGS_H_ ++ ++#define AIU_958_BPF 0x000 ++#define AIU_958_BRST 0x004 ++#define AIU_958_LENGTH 0x008 ++#define AIU_958_PADDSIZE 0x00C ++#define AIU_958_MISC 0x010 ++#define AIU_958_FORCE_LEFT 0x014 /* Unknown */ ++#define AIU_958_DISCARD_NUM 0x018 ++#define AIU_958_DCU_FF_CTRL 0x01C ++#define AIU_958_CHSTAT_L0 0x020 ++#define AIU_958_CHSTAT_L1 0x024 ++#define AIU_958_CTRL 0x028 ++#define AIU_958_RPT 0x02C ++#define AIU_I2S_MUTE_SWAP 0x030 ++#define AIU_I2S_SOURCE_DESC 0x034 ++#define AIU_I2S_MED_CTRL 0x038 ++#define AIU_I2S_MED_THRESH 0x03C ++#define AIU_I2S_DAC_CFG 0x040 ++#define AIU_I2S_SYNC 0x044 /* Unknown */ ++#define AIU_I2S_MISC 0x048 ++#define AIU_I2S_OUT_CFG 0x04C ++#define AIU_I2S_FF_CTRL 0x050 /* Unknown */ ++#define AIU_RST_SOFT 0x054 ++#define AIU_CLK_CTRL 0x058 ++#define AIU_MIX_ADCCFG 0x05C ++#define AIU_MIX_CTRL 0x060 ++#define AIU_CLK_CTRL_MORE 0x064 ++#define AIU_958_POP 0x068 ++#define AIU_MIX_GAIN 0x06C ++#define AIU_958_SYNWORD1 0x070 ++#define AIU_958_SYNWORD2 0x074 ++#define AIU_958_SYNWORD3 0x078 ++#define AIU_958_SYNWORD1_MASK 0x07C ++#define AIU_958_SYNWORD2_MASK 0x080 ++#define AIU_958_SYNWORD3_MASK 0x084 ++#define AIU_958_FFRDOUT_THD 0x088 ++#define AIU_958_LENGTH_PER_PAUSE 0x08C ++#define AIU_958_PAUSE_NUM 0x090 ++#define AIU_958_PAUSE_PAYLOAD 0x094 ++#define AIU_958_AUTO_PAUSE 0x098 ++#define AIU_958_PAUSE_PD_LENGTH 0x09C ++#define AIU_CODEC_DAC_LRCLK_CTRL 0x0A0 ++#define AIU_CODEC_ADC_LRCLK_CTRL 0x0A4 ++#define AIU_HDMI_CLK_DATA_CTRL 0x0A8 ++#define AIU_CODEC_CLK_DATA_CTRL 0x0AC ++#define AIU_ACODEC_CTRL 0x0B0 ++#define AIU_958_CHSTAT_R0 0x0C0 ++#define AIU_958_CHSTAT_R1 0x0C4 ++#define AIU_958_VALID_CTRL 0x0C8 ++#define AIU_AUDIO_AMP_REG0 0x0F0 /* Unknown */ ++#define AIU_AUDIO_AMP_REG1 0x0F4 /* Unknown */ ++#define AIU_AUDIO_AMP_REG2 0x0F8 /* Unknown */ ++#define AIU_AUDIO_AMP_REG3 0x0FC /* Unknown */ ++#define AIU_AIFIFO2_CTRL 0x100 ++#define AIU_AIFIFO2_STATUS 0x104 ++#define AIU_AIFIFO2_GBIT 0x108 ++#define AIU_AIFIFO2_CLB 0x10C ++#define AIU_CRC_CTRL 0x110 ++#define AIU_CRC_STATUS 0x114 ++#define AIU_CRC_SHIFT_REG 0x118 ++#define AIU_CRC_IREG 0x11C ++#define AIU_CRC_CAL_REG1 0x120 ++#define AIU_CRC_CAL_REG0 0x124 ++#define AIU_CRC_POLY_COEF1 0x128 ++#define AIU_CRC_POLY_COEF0 0x12C ++#define AIU_CRC_BIT_SIZE1 0x130 ++#define AIU_CRC_BIT_SIZE0 0x134 ++#define AIU_CRC_BIT_CNT1 0x138 ++#define AIU_CRC_BIT_CNT0 0x13C ++#define AIU_AMCLK_GATE_HI 0x140 ++#define AIU_AMCLK_GATE_LO 0x144 ++#define AIU_AMCLK_MSR 0x148 ++#define AIU_AUDAC_CTRL0 0x14C /* Unknown */ ++#define AIU_DELTA_SIGMA0 0x154 /* Unknown */ ++#define AIU_DELTA_SIGMA1 0x158 /* Unknown */ ++#define AIU_DELTA_SIGMA2 0x15C /* Unknown */ ++#define AIU_DELTA_SIGMA3 0x160 /* Unknown */ ++#define AIU_DELTA_SIGMA4 0x164 /* Unknown */ ++#define AIU_DELTA_SIGMA5 0x168 /* Unknown */ ++#define AIU_DELTA_SIGMA6 0x16C /* Unknown */ ++#define AIU_DELTA_SIGMA7 0x170 /* Unknown */ ++#define AIU_DELTA_SIGMA_LCNTS 0x174 /* Unknown */ ++#define AIU_DELTA_SIGMA_RCNTS 0x178 /* Unknown */ ++#define AIU_MEM_I2S_START_PTR 0x180 ++#define AIU_MEM_I2S_RD_PTR 0x184 ++#define AIU_MEM_I2S_END_PTR 0x188 ++#define AIU_MEM_I2S_MASKS 0x18C ++#define AIU_MEM_I2S_CONTROL 0x190 ++#define AIU_MEM_IEC958_START_PTR 0x194 ++#define AIU_MEM_IEC958_RD_PTR 0x198 ++#define AIU_MEM_IEC958_END_PTR 0x19C ++#define AIU_MEM_IEC958_MASKS 0x1A0 ++#define AIU_MEM_IEC958_CONTROL 0x1A4 ++#define AIU_MEM_AIFIFO2_START_PTR 0x1A8 ++#define AIU_MEM_AIFIFO2_CURR_PTR 0x1AC ++#define AIU_MEM_AIFIFO2_END_PTR 0x1B0 ++#define AIU_MEM_AIFIFO2_BYTES_AVAIL 0x1B4 ++#define AIU_MEM_AIFIFO2_CONTROL 0x1B8 ++#define AIU_MEM_AIFIFO2_MAN_WP 0x1BC ++#define AIU_MEM_AIFIFO2_MAN_RP 0x1C0 ++#define AIU_MEM_AIFIFO2_LEVEL 0x1C4 ++#define AIU_MEM_AIFIFO2_BUF_CNTL 0x1C8 ++#define AIU_MEM_I2S_MAN_WP 0x1CC ++#define AIU_MEM_I2S_MAN_RP 0x1D0 ++#define AIU_MEM_I2S_LEVEL 0x1D4 ++#define AIU_MEM_I2S_BUF_CNTL 0x1D8 ++#define AIU_MEM_I2S_BUF_WRAP_COUNT 0x1DC ++#define AIU_MEM_I2S_MEM_CTL 0x1E0 ++#define AIU_MEM_IEC958_MEM_CTL 0x1E4 ++#define AIU_MEM_IEC958_WRAP_COUNT 0x1E8 ++#define AIU_MEM_IEC958_IRQ_LEVEL 0x1EC ++#define AIU_MEM_IEC958_MAN_WP 0x1F0 ++#define AIU_MEM_IEC958_MAN_RP 0x1F4 ++#define AIU_MEM_IEC958_LEVEL 0x1F8 ++#define AIU_MEM_IEC958_BUF_CNTL 0x1FC ++#define AIU_AIFIFO_CTRL 0x200 ++#define AIU_AIFIFO_STATUS 0x204 ++#define AIU_AIFIFO_GBIT 0x208 ++#define AIU_AIFIFO_CLB 0x20C ++#define AIU_MEM_AIFIFO_START_PTR 0x210 ++#define AIU_MEM_AIFIFO_CURR_PTR 0x214 ++#define AIU_MEM_AIFIFO_END_PTR 0x218 ++#define AIU_MEM_AIFIFO_BYTES_AVAIL 0x21C ++#define AIU_MEM_AIFIFO_CONTROL 0x220 ++#define AIU_MEM_AIFIFO_MAN_WP 0x224 ++#define AIU_MEM_AIFIFO_MAN_RP 0x228 ++#define AIU_MEM_AIFIFO_LEVEL 0x22C ++#define AIU_MEM_AIFIFO_BUF_CNTL 0x230 ++#define AIU_MEM_AIFIFO_BUF_WRAP_COUNT 0x234 ++#define AIU_MEM_AIFIFO2_BUF_WRAP_COUNT 0x238 ++#define AIU_MEM_AIFIFO_MEM_CTL 0x23C ++#define AIFIFO_TIME_STAMP_CNTL 0x240 ++#define AIFIFO_TIME_STAMP_SYNC_0 0x244 ++#define AIFIFO_TIME_STAMP_SYNC_1 0x248 ++#define AIFIFO_TIME_STAMP_0 0x24C ++#define AIFIFO_TIME_STAMP_1 0x250 ++#define AIFIFO_TIME_STAMP_2 0x254 ++#define AIFIFO_TIME_STAMP_3 0x258 ++#define AIFIFO_TIME_STAMP_LENGTH 0x25C ++#define AIFIFO2_TIME_STAMP_CNTL 0x260 ++#define AIFIFO2_TIME_STAMP_SYNC_0 0x264 ++#define AIFIFO2_TIME_STAMP_SYNC_1 0x268 ++#define AIFIFO2_TIME_STAMP_0 0x26C ++#define AIFIFO2_TIME_STAMP_1 0x270 ++#define AIFIFO2_TIME_STAMP_2 0x274 ++#define AIFIFO2_TIME_STAMP_3 0x278 ++#define AIFIFO2_TIME_STAMP_LENGTH 0x27C ++#define IEC958_TIME_STAMP_CNTL 0x280 ++#define IEC958_TIME_STAMP_SYNC_0 0x284 ++#define IEC958_TIME_STAMP_SYNC_1 0x288 ++#define IEC958_TIME_STAMP_0 0x28C ++#define IEC958_TIME_STAMP_1 0x290 ++#define IEC958_TIME_STAMP_2 0x294 ++#define IEC958_TIME_STAMP_3 0x298 ++#define IEC958_TIME_STAMP_LENGTH 0x29C ++#define AIU_MEM_AIFIFO2_MEM_CTL 0x2A0 ++#define AIU_I2S_CBUS_DDR_CNTL 0x2A4 ++#define AIU_I2S_CBUS_DDR_WDATA 0x2A8 ++#define AIU_I2S_CBUS_DDR_ADDR 0x2AC ++ ++#endif /* _AIU_REGS_H_ */ +diff --git a/sound/soc/meson/audin-regs.h b/sound/soc/meson/audin-regs.h +new file mode 100644 +index 000000000000..f224610e80e7 +--- /dev/null ++++ b/sound/soc/meson/audin-regs.h +@@ -0,0 +1,148 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _AUDIN_REGS_H_ ++#define _AUDIN_REGS_H_ ++ ++/* ++ * Note : ++ * Datasheet issue page 196 ++ * AUDIN_MUTE_VAL 0x35 => impossible: Already assigned to AUDIN_FIFO1_PTR ++ * AUDIN_FIFO1_PTR is more likely to be correct here since surrounding registers ++ * also deal with AUDIN_FIFO1 ++ * ++ * Clarification needed from Amlogic ++ */ ++ ++#define AUDIN_SPDIF_MODE 0x000 ++#define AUDIN_SPDIF_FS_CLK_RLTN 0x004 ++#define AUDIN_SPDIF_CHNL_STS_A 0x008 ++#define AUDIN_SPDIF_CHNL_STS_B 0x00C ++#define AUDIN_SPDIF_MISC 0x010 ++#define AUDIN_SPDIF_NPCM_PCPD 0x014 ++#define AUDIN_SPDIF_END 0x03C /* Unknown */ ++#define AUDIN_I2SIN_CTRL 0x040 ++#define AUDIN_SOURCE_SEL 0x044 ++#define AUDIN_DECODE_FORMAT 0x048 ++#define AUDIN_DECODE_CONTROL_STATUS 0x04C ++#define AUDIN_DECODE_CHANNEL_STATUS_A_0 0x050 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_1 0x054 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_2 0x058 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_3 0x05C ++#define AUDIN_DECODE_CHANNEL_STATUS_A_4 0x060 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_5 0x064 ++#define AUDIN_FIFO0_START 0x080 ++#define AUDIN_FIFO0_END 0x084 ++#define AUDIN_FIFO0_PTR 0x088 ++#define AUDIN_FIFO0_INTR 0x08C ++#define AUDIN_FIFO0_RDPTR 0x090 ++#define AUDIN_FIFO0_CTRL 0x094 ++#define AUDIN_FIFO0_CTRL1 0x098 ++#define AUDIN_FIFO0_LVL0 0x09C ++#define AUDIN_FIFO0_LVL1 0x0A0 ++#define AUDIN_FIFO0_LVL2 0x0A4 ++#define AUDIN_FIFO0_REQID 0x0C0 ++#define AUDIN_FIFO0_WRAP 0x0C4 ++#define AUDIN_FIFO1_START 0x0CC ++#define AUDIN_FIFO1_END 0x0D0 ++#define AUDIN_FIFO1_PTR 0x0D4 ++#define AUDIN_FIFO1_INTR 0x0D8 ++#define AUDIN_FIFO1_RDPTR 0x0DC ++#define AUDIN_FIFO1_CTRL 0x0E0 ++#define AUDIN_FIFO1_CTRL1 0x0E4 ++#define AUDIN_FIFO1_LVL0 0x100 ++#define AUDIN_FIFO1_LVL1 0x104 ++#define AUDIN_FIFO1_LVL2 0x108 ++#define AUDIN_FIFO1_REQID 0x10C ++#define AUDIN_FIFO1_WRAP 0x110 ++#define AUDIN_FIFO2_START 0x114 ++#define AUDIN_FIFO2_END 0x118 ++#define AUDIN_FIFO2_PTR 0x11C ++#define AUDIN_FIFO2_INTR 0x120 ++#define AUDIN_FIFO2_RDPTR 0x124 ++#define AUDIN_FIFO2_CTRL 0x128 ++#define AUDIN_FIFO2_CTRL1 0x12C ++#define AUDIN_FIFO2_LVL0 0x130 ++#define AUDIN_FIFO2_LVL1 0x134 ++#define AUDIN_FIFO2_LVL2 0x138 ++#define AUDIN_FIFO2_REQID 0x13C ++#define AUDIN_FIFO2_WRAP 0x140 ++#define AUDIN_INT_CTRL 0x144 ++#define AUDIN_FIFO_INT 0x148 ++#define PCMIN_CTRL0 0x180 ++#define PCMIN_CTRL1 0x184 ++#define PCMIN1_CTRL0 0x188 ++#define PCMIN1_CTRL1 0x18C ++#define PCMOUT_CTRL0 0x1C0 ++#define PCMOUT_CTRL1 0x1C4 ++#define PCMOUT_CTRL2 0x1C8 ++#define PCMOUT_CTRL3 0x1CC ++#define PCMOUT1_CTRL0 0x1D0 ++#define PCMOUT1_CTRL1 0x1D4 ++#define PCMOUT1_CTRL2 0x1D8 ++#define PCMOUT1_CTRL3 0x1DC ++#define AUDOUT_CTRL 0x200 ++#define AUDOUT_CTRL1 0x204 ++#define AUDOUT_BUF0_STA 0x208 ++#define AUDOUT_BUF0_EDA 0x20C ++#define AUDOUT_BUF0_WPTR 0x210 ++#define AUDOUT_BUF1_STA 0x214 ++#define AUDOUT_BUF1_EDA 0x218 ++#define AUDOUT_BUF1_WPTR 0x21C ++#define AUDOUT_FIFO_RPTR 0x220 ++#define AUDOUT_INTR_PTR 0x224 ++#define AUDOUT_FIFO_STS 0x228 ++#define AUDOUT1_CTRL 0x240 ++#define AUDOUT1_CTRL1 0x244 ++#define AUDOUT1_BUF0_STA 0x248 ++#define AUDOUT1_BUF0_EDA 0x24C ++#define AUDOUT1_BUF0_WPTR 0x250 ++#define AUDOUT1_BUF1_STA 0x254 ++#define AUDOUT1_BUF1_EDA 0x258 ++#define AUDOUT1_BUF1_WPTR 0x25C ++#define AUDOUT1_FIFO_RPTR 0x260 ++#define AUDOUT1_INTR_PTR 0x264 ++#define AUDOUT1_FIFO_STS 0x268 ++#define AUDIN_HDMI_MEAS_CTRL 0x280 ++#define AUDIN_HDMI_MEAS_CYCLES_M1 0x284 ++#define AUDIN_HDMI_MEAS_INTR_MASKN 0x288 ++#define AUDIN_HDMI_MEAS_INTR_STAT 0x28C ++#define AUDIN_HDMI_REF_CYCLES_STAT_0 0x290 ++#define AUDIN_HDMI_REF_CYCLES_STAT_1 0x294 ++#define AUDIN_HDMIRX_AFIFO_STAT 0x298 ++#define AUDIN_FIFO0_PIO_STS 0x2C0 ++#define AUDIN_FIFO0_PIO_RDL 0x2C4 ++#define AUDIN_FIFO0_PIO_RDH 0x2C8 ++#define AUDIN_FIFO1_PIO_STS 0x2CC ++#define AUDIN_FIFO1_PIO_RDL 0x2D0 ++#define AUDIN_FIFO1_PIO_RDH 0x2D4 ++#define AUDIN_FIFO2_PIO_STS 0x2D8 ++#define AUDIN_FIFO2_PIO_RDL 0x2DC ++#define AUDIN_FIFO2_PIO_RDH 0x2E0 ++#define AUDOUT_FIFO_PIO_STS 0x2E4 ++#define AUDOUT_FIFO_PIO_WRL 0x2E8 ++#define AUDOUT_FIFO_PIO_WRH 0x2EC ++#define AUDOUT1_FIFO_PIO_STS 0x2F0 /* Unknown */ ++#define AUDOUT1_FIFO_PIO_WRL 0x2F4 /* Unknown */ ++#define AUDOUT1_FIFO_PIO_WRH 0x2F8 /* Unknown */ ++#define AUD_RESAMPLE_CTRL0 0x2FC ++#define AUD_RESAMPLE_CTRL1 0x300 ++#define AUD_RESAMPLE_STATUS 0x304 ++ ++#endif /* _AUDIN_REGS_H_ */ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch b/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch new file mode 100644 index 000000000..926c8182d --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch @@ -0,0 +1,424 @@ +From 61d387ffa57865531ead1a33d63b1d53a99e808b Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:14:40 +0200 +Subject: [PATCH 04/53] ASoC: meson: add aiu i2s dma support + +Add support for the i2s output dma which is part of the AIU block + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/Kconfig | 7 + + sound/soc/meson/Makefile | 4 +- + sound/soc/meson/aiu-i2s-dma.c | 370 ++++++++++++++++++++++++++++++++++ + 3 files changed, 380 insertions(+), 1 deletion(-) + create mode 100644 sound/soc/meson/aiu-i2s-dma.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index ed432d488b74..6e030b5c7804 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -73,3 +73,10 @@ menuconfig SND_SOC_MESON + Say Y or M if you want to add support for codecs attached to + the Amlogic Meson SoCs Audio interfaces. You will also need to + select the audio interfaces to support below. ++ ++config SND_SOC_MESON_I2S ++ tristate "Meson i2s interface" ++ depends on SND_SOC_MESON ++ help ++ Say Y or M if you want to add support for i2s dma driver for Amlogic ++ Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index 768d7c414649..57960077aab2 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -21,5 +21,7 @@ obj-$(CONFIG_SND_MESON_AXG_SOUND_CARD) += snd-soc-meson-axg-sound-card.o + obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o + + snd-soc-meson-audio-core-objs := audio-core.o ++snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o + +-obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o +\ No newline at end of file ++obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o +\ No newline at end of file +diff --git a/sound/soc/meson/aiu-i2s-dma.c b/sound/soc/meson/aiu-i2s-dma.c +new file mode 100644 +index 000000000000..2684bd0db19e +--- /dev/null ++++ b/sound/soc/meson/aiu-i2s-dma.c +@@ -0,0 +1,370 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-aiu-i2s-dma" ++ ++struct aiu_i2s_dma { ++ struct meson_audio_core_data *core; ++ struct clk *fast; ++ int irq; ++}; ++ ++#define AIU_MEM_I2S_BUF_CNTL_INIT BIT(0) ++#define AIU_MEM_I2S_CONTROL_INIT BIT(0) ++#define AIU_MEM_I2S_CONTROL_FILL_EN BIT(1) ++#define AIU_MEM_I2S_CONTROL_EMPTY_EN BIT(2) ++#define AIU_MEM_I2S_CONTROL_MODE_16BIT BIT(6) ++#define AIU_MEM_I2S_CONTROL_BUSY BIT(7) ++#define AIU_MEM_I2S_CONTROL_DATA_READY BIT(8) ++#define AIU_MEM_I2S_CONTROL_LEVEL_CNTL BIT(9) ++#define AIU_MEM_I2S_MASKS_IRQ_BLOCK_MASK GENMASK(31, 16) ++#define AIU_MEM_I2S_MASKS_IRQ_BLOCK(n) ((n) << 16) ++#define AIU_MEM_I2S_MASKS_CH_MEM_MASK GENMASK(15, 8) ++#define AIU_MEM_I2S_MASKS_CH_MEM(ch) ((ch) << 8) ++#define AIU_MEM_I2S_MASKS_CH_RD_MASK GENMASK(7, 0) ++#define AIU_MEM_I2S_MASKS_CH_RD(ch) ((ch) << 0) ++#define AIU_RST_SOFT_I2S_FAST_DOMAIN BIT(0) ++#define AIU_RST_SOFT_I2S_SLOW_DOMAIN BIT(1) ++ ++/* ++ * The DMA works by i2s "blocks" (or DMA burst). The burst size and the memory ++ * layout expected depends on the mode of operation. ++ * ++ * - Normal mode: The channels are expected to be packed in 32 bytes groups ++ * interleaved the buffer. AIU_MEM_I2S_MASKS_CH_MEM is a bitfield representing ++ * the channels present in memory. AIU_MEM_I2S_MASKS_CH_MEM represents the ++ * channels read by the DMA. This is very flexible but the unsual memory layout ++ * makes it less easy to deal with. The burst size is 32 bytes times the number ++ * of channels read. ++ * ++ * - Split mode: ++ * Classical channel interleaved frame organisation. In this mode, ++ * AIU_MEM_I2S_MASKS_CH_MEM and AIU_MEM_I2S_MASKS_CH_MEM must be set to 0xff and ++ * the burst size is fixed to 256 bytes. The input can be either 2 or 8 ++ * channels. ++ * ++ * The following driver implements the split mode. ++ */ ++ ++#define AIU_I2S_DMA_BURST 256 ++ ++static struct snd_pcm_hardware aiu_i2s_dma_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_PAUSE), ++ ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE | ++ SNDRV_PCM_FMTBIT_S32_LE), ++ ++ /* ++ * TODO: The DMA can change the endianness, the msb position ++ * and deal with unsigned - support this later on ++ */ ++ ++ .rate_min = 8000, ++ .rate_max = 192000, ++ .channels_min = 2, ++ .channels_max = 8, ++ .period_bytes_min = AIU_I2S_DMA_BURST, ++ .period_bytes_max = AIU_I2S_DMA_BURST * 65535, ++ .periods_min = 2, ++ .periods_max = UINT_MAX, ++ .buffer_bytes_max = 1 * 1024 * 1024, ++ .fifo_size = 0, ++}; ++ ++static struct aiu_i2s_dma *aiu_i2s_dma_priv(struct snd_pcm_substream *s) ++{ ++ struct snd_soc_pcm_runtime *rtd = s->private_data; ++ struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); ++ ++ return snd_soc_component_get_drvdata(component); ++} ++ ++static snd_pcm_uframes_t ++aiu_i2s_dma_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ unsigned int addr; ++ int ret; ++ ++ ret = regmap_read(priv->core->aiu, AIU_MEM_I2S_RD_PTR, ++ &addr); ++ if (ret) ++ return 0; ++ ++ return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); ++} ++ ++static void __dma_enable(struct aiu_i2s_dma *priv, bool enable) ++{ ++ unsigned int en_mask = (AIU_MEM_I2S_CONTROL_FILL_EN | ++ AIU_MEM_I2S_CONTROL_EMPTY_EN); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, en_mask, ++ enable ? en_mask : 0); ++ ++} ++ ++static int aiu_i2s_dma_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __dma_enable(priv, true); ++ break; ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ case SNDRV_PCM_TRIGGER_STOP: ++ __dma_enable(priv, false); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void __dma_init_mem(struct aiu_i2s_dma *priv) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_INIT, ++ AIU_MEM_I2S_CONTROL_INIT); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, ++ AIU_MEM_I2S_BUF_CNTL_INIT, ++ AIU_MEM_I2S_BUF_CNTL_INIT); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_INIT, ++ 0); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, ++ AIU_MEM_I2S_BUF_CNTL_INIT, ++ 0); ++} ++ ++static int aiu_i2s_dma_prepare(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ __dma_init_mem(priv); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ int ret; ++ u32 burst_num, mem_ctl; ++ dma_addr_t end_ptr; ++ ++ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); ++ if (ret < 0) ++ return ret; ++ ++ /* Setup memory layout */ ++ if (params_physical_width(params) == 16) ++ mem_ctl = AIU_MEM_I2S_CONTROL_MODE_16BIT; ++ else ++ mem_ctl = 0; ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_MODE_16BIT, ++ mem_ctl); ++ ++ /* Initialize memory pointers */ ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_START_PTR, runtime->dma_addr); ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_RD_PTR, runtime->dma_addr); ++ ++ /* The end pointer is the address of the last valid block */ ++ end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_I2S_DMA_BURST; ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_END_PTR, end_ptr); ++ ++ /* Memory masks */ ++ burst_num = params_period_bytes(params) / AIU_I2S_DMA_BURST; ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_MASKS, ++ AIU_MEM_I2S_MASKS_CH_RD(0xff) | ++ AIU_MEM_I2S_MASKS_CH_MEM(0xff) | ++ AIU_MEM_I2S_MASKS_IRQ_BLOCK(burst_num)); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++ ++static irqreturn_t aiu_i2s_dma_irq_block(int irq, void *dev_id) ++{ ++ struct snd_pcm_substream *playback = dev_id; ++ ++ snd_pcm_period_elapsed(playback); ++ ++ return IRQ_HANDLED; ++} ++ ++static int aiu_i2s_dma_open(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ int ret; ++ ++ snd_soc_set_runtime_hwparams(substream, &aiu_i2s_dma_hw); ++ ++ /* ++ * Make sure the buffer and period size are multiple of the DMA burst ++ * size ++ */ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, ++ AIU_I2S_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, ++ AIU_I2S_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ /* Request the I2S DDR irq */ ++ ret = request_irq(priv->irq, aiu_i2s_dma_irq_block, 0, ++ DRV_NAME, substream); ++ if (ret) ++ return ret; ++ ++ /* Power up the i2s fast domain - can't write the registers w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ return ret; ++ ++ /* Make sure the dma is initially disabled */ ++ __dma_enable(priv, false); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_close(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ clk_disable_unprepare(priv->fast); ++ free_irq(priv->irq, substream); ++ ++ return 0; ++} ++ ++static const struct snd_pcm_ops aiu_i2s_dma_ops = { ++ .open = aiu_i2s_dma_open, ++ .close = aiu_i2s_dma_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = aiu_i2s_dma_hw_params, ++ .hw_free = aiu_i2s_dma_hw_free, ++ .prepare = aiu_i2s_dma_prepare, ++ .pointer = aiu_i2s_dma_pointer, ++ .trigger = aiu_i2s_dma_trigger, ++}; ++ ++static int aiu_i2s_dma_new(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_card *card = rtd->card->snd_card; ++ size_t size = aiu_i2s_dma_hw.buffer_bytes_max; ++ ++ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, ++ SNDRV_DMA_TYPE_DEV, ++ card->dev, size, size); ++} ++ ++static const struct snd_soc_component_driver aiu_i2s_platform = { ++ .ops = &aiu_i2s_dma_ops, ++ .pcm_new = aiu_i2s_dma_new, ++ .name = DRV_NAME, ++}; ++ ++static int aiu_i2s_dma_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct aiu_i2s_dma *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get i2s fast domain clock\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->irq = platform_get_irq(pdev, 0); ++ if (priv->irq <= 0) { ++ dev_err(dev, "Can't get i2s ddr irq\n"); ++ return priv->irq; ++ } ++ ++ return devm_snd_soc_register_component(dev, &aiu_i2s_platform, ++ NULL, 0); ++} ++ ++static const struct of_device_id aiu_i2s_dma_of_match[] = { ++ { .compatible = "amlogic,meson-aiu-i2s-dma", }, ++ { .compatible = "amlogic,meson-gxbb-aiu-i2s-dma", }, ++ { .compatible = "amlogic,meson-gxl-aiu-i2s-dma", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, aiu_i2s_dma_of_match); ++ ++static struct platform_driver aiu_i2s_dma_pdrv = { ++ .probe = aiu_i2s_dma_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = aiu_i2s_dma_of_match, ++ }, ++}; ++module_platform_driver(aiu_i2s_dma_pdrv); ++ ++MODULE_DESCRIPTION("Meson AIU i2s DMA ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch b/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch new file mode 100644 index 000000000..0359ef465 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch @@ -0,0 +1,518 @@ +From 91eb80de0a4425e8856484d6480b2e347ccfa83d Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:17:27 +0200 +Subject: [PATCH 05/53] ASoC: meson: add initial i2s dai support + +Add support for the i2s dai found on Amlogic Meson SoC family. +With this initial implementation, only playback is supported. +Capture will be part of furture work. + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/Kconfig | 2 +- + sound/soc/meson/Makefile | 4 +- + sound/soc/meson/i2s-dai.c | 465 ++++++++++++++++++++++++++++++++++++++ + 3 files changed, 469 insertions(+), 2 deletions(-) + create mode 100644 sound/soc/meson/i2s-dai.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index 6e030b5c7804..5904e9e50569 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -78,5 +78,5 @@ config SND_SOC_MESON_I2S + tristate "Meson i2s interface" + depends on SND_SOC_MESON + help +- Say Y or M if you want to add support for i2s dma driver for Amlogic ++ Say Y or M if you want to add support for i2s driver for Amlogic + Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index 57960077aab2..b8641f9f7fc1 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -22,6 +22,8 @@ obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o + + snd-soc-meson-audio-core-objs := audio-core.o + snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o ++snd-soc-meson-i2s-dai-objs := i2s-dai.o + + obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o +-obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o +\ No newline at end of file ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o +\ No newline at end of file +diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c +new file mode 100644 +index 000000000000..1008af8d3972 +--- /dev/null ++++ b/sound/soc/meson/i2s-dai.c +@@ -0,0 +1,465 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-i2s-dai" ++ ++struct meson_i2s_dai { ++ struct meson_audio_core_data *core; ++ struct clk *mclk; ++ struct clk *bclks; ++ struct clk *iface; ++ struct clk *fast; ++ bool bclks_idle; ++}; ++ ++#define AIU_CLK_CTRL_I2S_DIV_EN BIT(0) ++#define AIU_CLK_CTRL_I2S_DIV_MASK GENMASK(3, 2) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_MASK BIT(6) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL (0 << 6) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED (1 << 6) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_MASK BIT(7) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL (0 << 7) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED (1 << 7) ++#define AIU_CLK_CTRL_ALRCLK_SKEW_MASK GENMASK(9, 8) ++#define AIU_CLK_CTRL_ALRCLK_LEFT_J (0 << 8) ++#define AIU_CLK_CTRL_ALRCLK_I2S (1 << 8) ++#define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) ++#define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) ++#define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) ++#define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) ++#define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) ++#define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) ++#define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) ++#define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) ++#define AIU_I2S_DAC_CFG_AOCLK_64 (3 << 0) ++#define AIU_I2S_MISC_HOLD_EN BIT(2) ++#define AIU_I2S_SOURCE_DESC_MODE_8CH BIT(0) ++#define AIU_I2S_SOURCE_DESC_MODE_24BIT BIT(5) ++#define AIU_I2S_SOURCE_DESC_MODE_32BIT BIT(9) ++#define AIU_I2S_SOURCE_DESC_MODE_SPLIT BIT(11) ++ ++static void __hold(struct meson_i2s_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_MISC, ++ AIU_I2S_MISC_HOLD_EN, ++ enable ? AIU_I2S_MISC_HOLD_EN : 0); ++} ++ ++static void __divider_enable(struct meson_i2s_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_I2S_DIV_EN, ++ enable ? AIU_CLK_CTRL_I2S_DIV_EN : 0); ++} ++ ++static void __playback_start(struct meson_i2s_dai *priv) ++{ ++ __divider_enable(priv, true); ++ __hold(priv, false); ++} ++ ++static void __playback_stop(struct meson_i2s_dai *priv, bool clk_force) ++{ ++ __hold(priv, true); ++ /* Disable the bit clks if necessary */ ++ if (clk_force || !priv->bclks_idle) ++ __divider_enable(priv, false); ++} ++ ++static int meson_i2s_dai_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ bool clk_force_stop = false; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __playback_start(priv); ++ return 0; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ clk_force_stop = true; ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ __playback_stop(priv, clk_force_stop); ++ return 0; ++ ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int __bclks_set_rate(struct meson_i2s_dai *priv, unsigned int srate, ++ unsigned int width) ++{ ++ unsigned int fs; ++ ++ /* Get the oversampling factor */ ++ fs = DIV_ROUND_CLOSEST(clk_get_rate(priv->mclk), srate); ++ ++ /* ++ * This DAI is usually connected to the dw-hdmi which does not support ++ * bclk being 32 * lrclk or 48 * lrclk ++ * Restrict to blck = 64 * lrclk ++ */ ++ if (fs % 64) ++ return -EINVAL; ++ ++ /* Set the divider between lrclk and bclk */ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_DAC_CFG, ++ AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK, ++ AIU_I2S_DAC_CFG_AOCLK_64); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CODEC_DAC_LRCLK_CTRL, ++ AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK, ++ AIU_CODEC_DAC_LRCLK_CTRL_DIV(64)); ++ ++ /* Use CLK_MORE for the i2s divider */ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_I2S_DIV_MASK, ++ 0); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, ++ AIU_CLK_CTRL_MORE_I2S_DIV_MASK, ++ AIU_CLK_CTRL_MORE_I2S_DIV(fs / 64)); ++ ++ return 0; ++} ++ ++static int __setup_desc(struct meson_i2s_dai *priv, unsigned int width, ++ unsigned int channels) ++{ ++ u32 desc = 0; ++ ++ switch (width) { ++ case 24: ++ /* ++ * For some reason, 24 bits wide audio don't play well ++ * if the 32 bits mode is not set ++ */ ++ desc |= (AIU_I2S_SOURCE_DESC_MODE_24BIT | ++ AIU_I2S_SOURCE_DESC_MODE_32BIT); ++ break; ++ case 16: ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ switch (channels) { ++ case 2: /* Nothing to do */ ++ break; ++ case 8: ++ /* TODO: Still requires testing ... */ ++ desc |= AIU_I2S_SOURCE_DESC_MODE_8CH; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, ++ AIU_I2S_SOURCE_DESC_MODE_8CH | ++ AIU_I2S_SOURCE_DESC_MODE_24BIT | ++ AIU_I2S_SOURCE_DESC_MODE_32BIT, ++ desc); ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ unsigned int width = params_width(params); ++ unsigned int channels = params_channels(params); ++ unsigned int rate = params_rate(params); ++ int ret; ++ ++ ret = __setup_desc(priv, width, channels); ++ if (ret) { ++ dev_err(dai->dev, "Unable set to set i2s description\n"); ++ return ret; ++ } ++ ++ ret = __bclks_set_rate(priv, rate, width); ++ if (ret) { ++ dev_err(dai->dev, "Unable set to the i2s clock rates\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ u32 val; ++ ++ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) ++ return -EINVAL; ++ ++ /* DAI output mode */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ val = AIU_CLK_CTRL_ALRCLK_I2S; ++ break; ++ case SND_SOC_DAIFMT_LEFT_J: ++ val = AIU_CLK_CTRL_ALRCLK_LEFT_J; ++ break; ++ case SND_SOC_DAIFMT_RIGHT_J: ++ val = AIU_CLK_CTRL_ALRCLK_RIGHT_J; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_ALRCLK_SKEW_MASK, ++ val); ++ ++ /* DAI clock polarity */ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_IB_IF: ++ /* Invert both clocks */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | ++ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; ++ break; ++ case SND_SOC_DAIFMT_IB_NF: ++ /* Invert bit clock */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | ++ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; ++ break; ++ case SND_SOC_DAIFMT_NB_IF: ++ /* Invert frame clock */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | ++ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; ++ break; ++ case SND_SOC_DAIFMT_NB_NF: ++ /* Normal clocks */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | ++ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_ALRCLK_POLARITY_MASK | ++ AIU_CLK_CTRL_AOCLK_POLARITY_MASK, ++ val); ++ ++ switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { ++ case SND_SOC_DAIFMT_CONT: ++ priv->bclks_idle = true; ++ break; ++ case SND_SOC_DAIFMT_GATED: ++ priv->bclks_idle = false; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, ++ unsigned int freq, int dir) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ if (WARN_ON(clk_id != 0)) ++ return -EINVAL; ++ ++ if (dir == SND_SOC_CLOCK_IN) ++ return 0; ++ ++ ret = clk_set_rate(priv->mclk, freq); ++ if (ret) { ++ dev_err(dai->dev, "Failed to set sysclk to %uHz", freq); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ /* Power up the i2s fast domain - can't write the registers w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ goto out_clk_fast; ++ ++ /* Make sure nothing gets out of the DAI yet */ ++ __hold(priv, true); ++ ++ /* I2S encoder needs the mixer interface gate */ ++ ret = clk_prepare_enable(priv->iface); ++ if (ret) ++ goto out_clk_iface; ++ ++ /* Enable the i2s master clock */ ++ ret = clk_prepare_enable(priv->mclk); ++ if (ret) ++ goto out_mclk; ++ ++ /* Enable the bit clock gate */ ++ ret = clk_prepare_enable(priv->bclks); ++ if (ret) ++ goto out_bclks; ++ ++ /* Make sure the interface expect a memory layout we can work with */ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, ++ AIU_I2S_SOURCE_DESC_MODE_SPLIT, ++ AIU_I2S_SOURCE_DESC_MODE_SPLIT); ++ ++ return 0; ++ ++out_bclks: ++ clk_disable_unprepare(priv->mclk); ++out_mclk: ++ clk_disable_unprepare(priv->iface); ++out_clk_iface: ++ clk_disable_unprepare(priv->fast); ++out_clk_fast: ++ return ret; ++} ++ ++static void meson_i2s_dai_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ ++ clk_disable_unprepare(priv->bclks); ++ clk_disable_unprepare(priv->mclk); ++ clk_disable_unprepare(priv->iface); ++ clk_disable_unprepare(priv->fast); ++} ++ ++static const struct snd_soc_dai_ops meson_i2s_dai_ops = { ++ .startup = meson_i2s_dai_startup, ++ .shutdown = meson_i2s_dai_shutdown, ++ .trigger = meson_i2s_dai_trigger, ++ .hw_params = meson_i2s_dai_hw_params, ++ .set_fmt = meson_i2s_dai_set_fmt, ++ .set_sysclk = meson_i2s_dai_set_sysclk, ++}; ++ ++static struct snd_soc_dai_driver meson_i2s_dai = { ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 8, ++ .rates = SNDRV_PCM_RATE_8000_192000, ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE) ++ }, ++ .ops = &meson_i2s_dai_ops, ++}; ++ ++static const struct snd_soc_component_driver meson_i2s_dai_component = { ++ .name = DRV_NAME, ++}; ++ ++static int meson_i2s_dai_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct meson_i2s_dai *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get the i2s fast domain clock\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->iface = devm_clk_get(dev, "iface"); ++ if (IS_ERR(priv->iface)) { ++ if (PTR_ERR(priv->iface) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get i2s dai clock gate\n"); ++ return PTR_ERR(priv->iface); ++ } ++ ++ priv->bclks = devm_clk_get(dev, "bclks"); ++ if (IS_ERR(priv->bclks)) { ++ if (PTR_ERR(priv->bclks) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get bit clocks gate\n"); ++ return PTR_ERR(priv->bclks); ++ } ++ ++ priv->mclk = devm_clk_get(dev, "mclk"); ++ if (IS_ERR(priv->mclk)) { ++ if (PTR_ERR(priv->mclk) != -EPROBE_DEFER) ++ dev_err(dev, "failed to get the i2s master clock\n"); ++ return PTR_ERR(priv->mclk); ++ } ++ ++ return devm_snd_soc_register_component(dev, &meson_i2s_dai_component, ++ &meson_i2s_dai, 1); ++} ++ ++static const struct of_device_id meson_i2s_dai_of_match[] = { ++ { .compatible = "amlogic,meson-i2s-dai", }, ++ { .compatible = "amlogic,meson-gxbb-i2s-dai", }, ++ { .compatible = "amlogic,meson-gxl-i2s-dai", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, meson_i2s_dai_of_match); ++ ++static struct platform_driver meson_i2s_dai_pdrv = { ++ .probe = meson_i2s_dai_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = meson_i2s_dai_of_match, ++ }, ++}; ++module_platform_driver(meson_i2s_dai_pdrv); ++ ++MODULE_DESCRIPTION("Meson i2s DAI ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch b/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch new file mode 100644 index 000000000..1e93a829f --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch @@ -0,0 +1,445 @@ +From 99e6d5ba97d0615428f88850ee8366a9dc24168e Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 13:43:52 +0200 +Subject: [PATCH 06/53] ASoC: meson: add aiu spdif dma support + +Add support for the spdif output dma which is part of the AIU block + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/Kconfig | 7 + + sound/soc/meson/Makefile | 4 +- + sound/soc/meson/aiu-spdif-dma.c | 388 ++++++++++++++++++++++++++++++++ + 3 files changed, 398 insertions(+), 1 deletion(-) + create mode 100644 sound/soc/meson/aiu-spdif-dma.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index 5904e9e50569..712303ff8970 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -80,3 +80,10 @@ config SND_SOC_MESON_I2S + help + Say Y or M if you want to add support for i2s driver for Amlogic + Meson SoCs. ++ ++config SND_SOC_MESON_SPDIF ++ tristate "Meson spdif interface" ++ depends on SND_SOC_MESON ++ help ++ Say Y or M if you want to add support for spdif dma driver for Amlogic ++ Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index b8641f9f7fc1..dc5164a7e164 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -22,8 +22,10 @@ obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o + + snd-soc-meson-audio-core-objs := audio-core.o + snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o ++snd-soc-meson-aiu-spdif-dma-objs := aiu-spdif-dma.o + snd-soc-meson-i2s-dai-objs := i2s-dai.o + + obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o + obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o +-obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o +\ No newline at end of file ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o ++obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o +\ No newline at end of file +diff --git a/sound/soc/meson/aiu-spdif-dma.c b/sound/soc/meson/aiu-spdif-dma.c +new file mode 100644 +index 000000000000..81c3b856fbf9 +--- /dev/null ++++ b/sound/soc/meson/aiu-spdif-dma.c +@@ -0,0 +1,388 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-aiu-spdif-dma" ++ ++struct aiu_spdif_dma { ++ struct meson_audio_core_data *core; ++ struct clk *fast; ++ int irq; ++}; ++ ++#define AIU_958_DCU_FF_CTRL_EN BIT(0) ++#define AIU_958_DCU_FF_CTRL_AUTO_DISABLE BIT(1) ++#define AIU_958_DCU_FF_CTRL_IRQ_MODE_MASK GENMASK(3, 2) ++#define AIU_958_DCU_FF_CTRL_IRQ_OUT_THD BIT(2) ++#define AIU_958_DCU_FF_CTRL_IRQ_FRAME_READ BIT(3) ++#define AIU_958_DCU_FF_CTRL_SYNC_HEAD_EN BIT(4) ++#define AIU_958_DCU_FF_CTRL_BYTE_SEEK BIT(5) ++#define AIU_958_DCU_FF_CTRL_CONTINUE BIT(6) ++#define AIU_MEM_IEC958_BUF_CNTL_INIT BIT(0) ++#define AIU_MEM_IEC958_CONTROL_INIT BIT(0) ++#define AIU_MEM_IEC958_CONTROL_FILL_EN BIT(1) ++#define AIU_MEM_IEC958_CONTROL_EMPTY_EN BIT(2) ++#define AIU_MEM_IEC958_CONTROL_ENDIAN_MASK GENMASK(5, 3) ++#define AIU_MEM_IEC958_CONTROL_RD_DDR BIT(6) ++#define AIU_MEM_IEC958_CONTROL_MODE_16BIT BIT(7) ++#define AIU_MEM_IEC958_MASKS_CH_MEM_MASK GENMASK(15, 8) ++#define AIU_MEM_IEC958_MASKS_CH_MEM(ch) ((ch) << 8) ++#define AIU_MEM_IEC958_MASKS_CH_RD_MASK GENMASK(7, 0) ++#define AIU_MEM_IEC958_MASKS_CH_RD(ch) ((ch) << 0) ++ ++#define AIU_SPDIF_DMA_BURST 8 ++#define AIU_SPDIF_BPF_MAX USHRT_MAX ++ ++static struct snd_pcm_hardware aiu_spdif_dma_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_PAUSE), ++ ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE | ++ SNDRV_PCM_FMTBIT_S32_LE), ++ ++ .rates = (SNDRV_PCM_RATE_32000 | ++ SNDRV_PCM_RATE_44100 | ++ SNDRV_PCM_RATE_48000 | ++ SNDRV_PCM_RATE_96000 | ++ SNDRV_PCM_RATE_192000), ++ /* ++ * TODO: The DMA can change the endianness, the msb position ++ * and deal with unsigned - support this later on ++ */ ++ ++ .channels_min = 2, ++ .channels_max = 2, ++ .period_bytes_min = AIU_SPDIF_DMA_BURST, ++ .period_bytes_max = AIU_SPDIF_BPF_MAX, ++ .periods_min = 2, ++ .periods_max = UINT_MAX, ++ .buffer_bytes_max = 1 * 1024 * 1024, ++ .fifo_size = 0, ++}; ++ ++static struct aiu_spdif_dma *aiu_spdif_dma_priv(struct snd_pcm_substream *s) ++{ ++ struct snd_soc_pcm_runtime *rtd = s->private_data; ++ struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); ++ ++ return snd_soc_component_get_drvdata(component); ++} ++ ++static snd_pcm_uframes_t ++aiu_spdif_dma_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ unsigned int addr; ++ int ret; ++ ++ ret = regmap_read(priv->core->aiu, AIU_MEM_IEC958_RD_PTR, ++ &addr); ++ if (ret) ++ return 0; ++ ++ return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); ++} ++ ++static void __dma_enable(struct aiu_spdif_dma *priv, bool enable) ++{ ++ unsigned int en_mask = (AIU_MEM_IEC958_CONTROL_FILL_EN | ++ AIU_MEM_IEC958_CONTROL_EMPTY_EN); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, en_mask, ++ enable ? en_mask : 0); ++} ++ ++static void __dcu_fifo_enable(struct aiu_spdif_dma *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_958_DCU_FF_CTRL, ++ AIU_958_DCU_FF_CTRL_EN, ++ enable ? AIU_958_DCU_FF_CTRL_EN : 0); ++} ++ ++static int aiu_spdif_dma_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __dcu_fifo_enable(priv, true); ++ __dma_enable(priv, true); ++ break; ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ case SNDRV_PCM_TRIGGER_STOP: ++ __dma_enable(priv, false); ++ __dcu_fifo_enable(priv, false); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void __dma_init_mem(struct aiu_spdif_dma *priv) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, ++ AIU_MEM_IEC958_CONTROL_INIT, ++ AIU_MEM_IEC958_CONTROL_INIT); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_BUF_CNTL, ++ AIU_MEM_IEC958_BUF_CNTL_INIT, ++ AIU_MEM_IEC958_BUF_CNTL_INIT); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, ++ AIU_MEM_IEC958_CONTROL_INIT, ++ 0); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_BUF_CNTL, ++ AIU_MEM_IEC958_BUF_CNTL_INIT, ++ 0); ++} ++ ++static int aiu_spdif_dma_prepare(struct snd_pcm_substream *substream) ++{ ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ ++ __dma_init_mem(priv); ++ ++ return 0; ++} ++ ++static int __setup_memory_layout(struct aiu_spdif_dma *priv, ++ unsigned int width) ++{ ++ u32 mem_ctl = AIU_MEM_IEC958_CONTROL_RD_DDR; ++ ++ if (width == 16) ++ mem_ctl |= AIU_MEM_IEC958_CONTROL_MODE_16BIT; ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, ++ AIU_MEM_IEC958_CONTROL_ENDIAN_MASK | ++ AIU_MEM_IEC958_CONTROL_MODE_16BIT | ++ AIU_MEM_IEC958_CONTROL_RD_DDR, ++ mem_ctl); ++ ++ return 0; ++} ++ ++static int aiu_spdif_dma_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ int ret; ++ dma_addr_t end_ptr; ++ ++ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __setup_memory_layout(priv, params_physical_width(params)); ++ if (ret) ++ return ret; ++ ++ /* Initialize memory pointers */ ++ regmap_write(priv->core->aiu, ++ AIU_MEM_IEC958_START_PTR, runtime->dma_addr); ++ regmap_write(priv->core->aiu, ++ AIU_MEM_IEC958_RD_PTR, runtime->dma_addr); ++ ++ /* The end pointer is the address of the last valid block */ ++ end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_SPDIF_DMA_BURST; ++ regmap_write(priv->core->aiu, AIU_MEM_IEC958_END_PTR, end_ptr); ++ ++ /* Memory masks */ ++ regmap_write(priv->core->aiu, AIU_MEM_IEC958_MASKS, ++ AIU_MEM_IEC958_MASKS_CH_RD(0xff) | ++ AIU_MEM_IEC958_MASKS_CH_MEM(0xff)); ++ ++ /* Setup the number bytes read by the FIFO between each IRQ */ ++ regmap_write(priv->core->aiu, AIU_958_BPF, params_period_bytes(params)); ++ ++ /* ++ * AUTO_DISABLE and SYNC_HEAD are enabled by default but ++ * this should be disabled in PCM (uncompressed) mode ++ */ ++ regmap_update_bits(priv->core->aiu, AIU_958_DCU_FF_CTRL, ++ AIU_958_DCU_FF_CTRL_AUTO_DISABLE | ++ AIU_958_DCU_FF_CTRL_IRQ_MODE_MASK | ++ AIU_958_DCU_FF_CTRL_SYNC_HEAD_EN, ++ AIU_958_DCU_FF_CTRL_IRQ_FRAME_READ); ++ ++ return 0; ++} ++ ++static int aiu_spdif_dma_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++static irqreturn_t aiu_spdif_dma_irq(int irq, void *dev_id) ++{ ++ struct snd_pcm_substream *playback = dev_id; ++ ++ snd_pcm_period_elapsed(playback); ++ ++ return IRQ_HANDLED; ++} ++ ++static int aiu_spdif_dma_open(struct snd_pcm_substream *substream) ++{ ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ int ret; ++ ++ snd_soc_set_runtime_hwparams(substream, &aiu_spdif_dma_hw); ++ ++ /* ++ * Make sure the buffer and period size are multiple of the DMA burst ++ * size ++ */ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, ++ AIU_SPDIF_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, ++ AIU_SPDIF_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ /* Request the SPDIF DDR irq */ ++ ret = request_irq(priv->irq, aiu_spdif_dma_irq, 0, ++ DRV_NAME, substream); ++ if (ret) ++ return ret; ++ ++ /* Power up the spdif fast domain - can't write the register w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ return ret; ++ ++ /* Make sure the dma is initially halted */ ++ __dma_enable(priv, false); ++ __dcu_fifo_enable(priv, false); ++ ++ return 0; ++} ++ ++static int aiu_spdif_dma_close(struct snd_pcm_substream *substream) ++{ ++ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); ++ ++ clk_disable_unprepare(priv->fast); ++ free_irq(priv->irq, substream); ++ ++ return 0; ++} ++ ++static const struct snd_pcm_ops aiu_spdif_dma_ops = { ++ .open = aiu_spdif_dma_open, ++ .close = aiu_spdif_dma_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = aiu_spdif_dma_hw_params, ++ .hw_free = aiu_spdif_dma_hw_free, ++ .prepare = aiu_spdif_dma_prepare, ++ .pointer = aiu_spdif_dma_pointer, ++ .trigger = aiu_spdif_dma_trigger, ++}; ++ ++static int aiu_spdif_dma_new(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_card *card = rtd->card->snd_card; ++ size_t size = aiu_spdif_dma_hw.buffer_bytes_max; ++ ++ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, ++ SNDRV_DMA_TYPE_DEV, ++ card->dev, size, size); ++} ++ ++static const struct snd_soc_component_driver aiu_spdif_platform = { ++ .ops = &aiu_spdif_dma_ops, ++ .pcm_new = aiu_spdif_dma_new, ++ .name = DRV_NAME, ++}; ++ ++static int aiu_spdif_dma_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct aiu_spdif_dma *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get spdif fast domain clock\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->irq = platform_get_irq(pdev, 0); ++ if (priv->irq <= 0) { ++ dev_err(dev, "Can't get spdif ddr irq\n"); ++ return priv->irq; ++ } ++ ++ return devm_snd_soc_register_component(dev, &aiu_spdif_platform, ++ NULL, 0); ++} ++ ++static const struct of_device_id aiu_spdif_dma_of_match[] = { ++ { .compatible = "amlogic,meson-aiu-spdif-dma", }, ++ { .compatible = "amlogic,meson-gxbb-aiu-spdif-dma", }, ++ { .compatible = "amlogic,meson-gxl-aiu-spdif-dma", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, aiu_spdif_dma_of_match); ++ ++static struct platform_driver aiu_spdif_dma_pdrv = { ++ .probe = aiu_spdif_dma_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = aiu_spdif_dma_of_match, ++ }, ++}; ++module_platform_driver(aiu_spdif_dma_pdrv); ++ ++MODULE_DESCRIPTION("Meson AIU spdif DMA ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL"); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch b/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch new file mode 100644 index 000000000..d39cae9b6 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch @@ -0,0 +1,432 @@ +From ecabfe253aab181bdc241cc7e16e857a3574e528 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 13:46:03 +0200 +Subject: [PATCH 07/53] ASoC: meson: add initial spdif dai support + +Add support for the spdif dai found on Amlogic Meson SoC family. +With this initial implementation, only uncompressed pcm playback +from the spdif dma is supported. Future work will add compressed +support, pcm playback from i2s dma and capture. + +Signed-off-by: Jerome Brunet +--- + sound/soc/meson/Kconfig | 3 +- + sound/soc/meson/Makefile | 4 +- + sound/soc/meson/spdif-dai.c | 374 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 379 insertions(+), 2 deletions(-) + create mode 100644 sound/soc/meson/spdif-dai.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index 712303ff8970..bc3d6f22ed88 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -84,6 +84,7 @@ config SND_SOC_MESON_I2S + config SND_SOC_MESON_SPDIF + tristate "Meson spdif interface" + depends on SND_SOC_MESON ++ select SND_PCM_IEC958 + help +- Say Y or M if you want to add support for spdif dma driver for Amlogic ++ Say Y or M if you want to add support for spdif driver for Amlogic + Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index dc5164a7e164..44f79d8b91b7 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -24,8 +24,10 @@ snd-soc-meson-audio-core-objs := audio-core.o + snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o + snd-soc-meson-aiu-spdif-dma-objs := aiu-spdif-dma.o + snd-soc-meson-i2s-dai-objs := i2s-dai.o ++snd-soc-meson-spdif-dai-objs := spdif-dai.o + + obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o + obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o + obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o +-obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o +\ No newline at end of file ++obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o ++obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-spdif-dai.o +\ No newline at end of file +diff --git a/sound/soc/meson/spdif-dai.c b/sound/soc/meson/spdif-dai.c +new file mode 100644 +index 000000000000..e7630007c84b +--- /dev/null ++++ b/sound/soc/meson/spdif-dai.c +@@ -0,0 +1,374 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-spdif-dai" ++ ++struct meson_spdif_dai { ++ struct meson_audio_core_data *core; ++ struct clk *iface; ++ struct clk *fast; ++ struct clk *mclk_i958; ++ struct clk *mclk; ++}; ++ ++#define AIU_CLK_CTRL_958_DIV_EN BIT(1) ++#define AIU_CLK_CTRL_958_DIV_MASK GENMASK(5, 4) ++#define AIU_CLK_CTRL_958_DIV_MORE BIT(12) ++#define AIU_MEM_IEC958_CONTROL_MODE_LINEAR BIT(8) ++#define AIU_958_CTRL_HOLD_EN BIT(0) ++#define AIU_958_MISC_NON_PCM BIT(0) ++#define AIU_958_MISC_MODE_16BITS BIT(1) ++#define AIU_958_MISC_16BITS_ALIGN_MASK GENMASK(6, 5) ++#define AIU_958_MISC_16BITS_ALIGN(val) ((val) << 5) ++#define AIU_958_MISC_MODE_32BITS BIT(7) ++#define AIU_958_MISC_32BITS_SHIFT_MASK GENMASK(10, 8) ++#define AIU_958_MISC_32BITS_SHIFT(val) ((val) << 8) ++#define AIU_958_MISC_U_FROM_STREAM BIT(12) ++#define AIU_958_MISC_FORCE_LR BIT(13) ++ ++#define AIU_CS_WORD_LEN 4 ++ ++static void __hold(struct meson_spdif_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_958_CTRL, ++ AIU_958_CTRL_HOLD_EN, ++ enable ? AIU_958_CTRL_HOLD_EN : 0); ++} ++ ++static void __divider_enable(struct meson_spdif_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_958_DIV_EN, ++ enable ? AIU_CLK_CTRL_958_DIV_EN : 0); ++} ++ ++static void __playback_start(struct meson_spdif_dai *priv) ++{ ++ __divider_enable(priv, true); ++ __hold(priv, false); ++} ++ ++static void __playback_stop(struct meson_spdif_dai *priv) ++{ ++ __hold(priv, true); ++ __divider_enable(priv, false); ++} ++ ++static int meson_spdif_dai_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __playback_start(priv); ++ return 0; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ __playback_stop(priv); ++ return 0; ++ ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int __setup_spdif_clk(struct meson_spdif_dai *priv, unsigned int rate) ++{ ++ unsigned int mrate; ++ ++ /* Leave the internal divisor alone */ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_958_DIV_MASK | ++ AIU_CLK_CTRL_958_DIV_MORE, ++ 0); ++ ++ /* 2 * 32bits per subframe * 2 channels = 128 */ ++ mrate = rate * 128; ++ return clk_set_rate(priv->mclk, mrate); ++} ++ ++static int __setup_cs_word(struct meson_spdif_dai *priv, ++ struct snd_pcm_hw_params *params) ++{ ++ u8 cs[AIU_CS_WORD_LEN]; ++ u32 val; ++ int ret; ++ ++ ret = snd_pcm_create_iec958_consumer_hw_params(params, cs, ++ AIU_CS_WORD_LEN); ++ if (ret < 0) ++ return -EINVAL; ++ ++ /* Write the 1st half word */ ++ val = cs[1] | cs[0] << 8; ++ regmap_write(priv->core->aiu, AIU_958_CHSTAT_L0, val); ++ regmap_write(priv->core->aiu, AIU_958_CHSTAT_R0, val); ++ ++ /* Write the 2nd half word */ ++ val = cs[3] | cs[2] << 8; ++ regmap_write(priv->core->aiu, AIU_958_CHSTAT_L1, val); ++ regmap_write(priv->core->aiu, AIU_958_CHSTAT_R1, val); ++ ++ return 0; ++} ++ ++static int __setup_pcm_fmt(struct meson_spdif_dai *priv, ++ unsigned int width) ++{ ++ u32 val = 0; ++ ++ switch (width) { ++ case 16: ++ val |= AIU_958_MISC_MODE_16BITS; ++ val |= AIU_958_MISC_16BITS_ALIGN(2); ++ break; ++ case 32: ++ case 24: ++ /* ++ * Looks like this should only be set for 32bits mode, but the ++ * vendor kernel sets it like this for 24bits as well, let's ++ * try and see ++ */ ++ val |= AIU_958_MISC_MODE_32BITS; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ /* No idea what this actually does, copying the vendor kernel for now */ ++ val |= AIU_958_MISC_FORCE_LR; ++ val |= AIU_958_MISC_U_FROM_STREAM; ++ ++ regmap_update_bits(priv->core->aiu, AIU_958_MISC, ++ AIU_958_MISC_NON_PCM | ++ AIU_958_MISC_MODE_16BITS | ++ AIU_958_MISC_16BITS_ALIGN_MASK | ++ AIU_958_MISC_MODE_32BITS | ++ AIU_958_MISC_FORCE_LR, ++ val); ++ ++ return 0; ++} ++ ++static int meson_spdif_dai_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ ret = __setup_spdif_clk(priv, params_rate(params)); ++ if (ret) { ++ dev_err(dai->dev, "Unable to set the spdif clock\n"); ++ return ret; ++ } ++ ++ ret = __setup_cs_word(priv, params); ++ if (ret) { ++ dev_err(dai->dev, "Unable to set the channel status word\n"); ++ return ret; ++ } ++ ++ ret = __setup_pcm_fmt(priv, params_width(params)); ++ if (ret) { ++ dev_err(dai->dev, "Unable to set the pcm format\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int meson_spdif_dai_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ /* Power up the spdif fast domain - can't write the registers w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ goto out_clk_fast; ++ ++ /* Make sure nothing gets out of the DAI yet*/ ++ __hold(priv, true); ++ ++ ret = clk_set_parent(priv->mclk, priv->mclk_i958); ++ if (ret) ++ return ret; ++ ++ /* Enable the clock gate */ ++ ret = clk_prepare_enable(priv->iface); ++ if (ret) ++ goto out_clk_iface; ++ ++ /* Enable the spdif clock */ ++ ret = clk_prepare_enable(priv->mclk); ++ if (ret) ++ goto out_mclk; ++ ++ /* ++ * Make sure the interface expect a memory layout we can work with ++ * MEM prefixed register usually belong to the DMA, but when the spdif ++ * DAI takes data from the i2s buffer, we need to make sure it works in ++ * split mode and not the "normal mode" (channel samples packed in ++ * 32 bytes groups) ++ */ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, ++ AIU_MEM_IEC958_CONTROL_MODE_LINEAR, ++ AIU_MEM_IEC958_CONTROL_MODE_LINEAR); ++ ++ return 0; ++ ++out_mclk: ++ clk_disable_unprepare(priv->iface); ++out_clk_iface: ++ clk_disable_unprepare(priv->fast); ++out_clk_fast: ++ return ret; ++} ++ ++static void meson_spdif_dai_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); ++ ++ clk_disable_unprepare(priv->iface); ++ clk_disable_unprepare(priv->mclk); ++ clk_disable_unprepare(priv->fast); ++} ++ ++static const struct snd_soc_dai_ops meson_spdif_dai_ops = { ++ .startup = meson_spdif_dai_startup, ++ .shutdown = meson_spdif_dai_shutdown, ++ .trigger = meson_spdif_dai_trigger, ++ .hw_params = meson_spdif_dai_hw_params, ++}; ++ ++static struct snd_soc_dai_driver meson_spdif_dai = { ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = (SNDRV_PCM_RATE_32000 | ++ SNDRV_PCM_RATE_44100 | ++ SNDRV_PCM_RATE_48000 | ++ SNDRV_PCM_RATE_96000 | ++ SNDRV_PCM_RATE_192000), ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE) ++ }, ++ .ops = &meson_spdif_dai_ops, ++}; ++ ++static const struct snd_soc_component_driver meson_spdif_dai_component = { ++ .name = DRV_NAME, ++}; ++ ++static int meson_spdif_dai_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct meson_spdif_dai *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get spdif fast domain clockt\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->iface = devm_clk_get(dev, "iface"); ++ if (IS_ERR(priv->iface)) { ++ if (PTR_ERR(priv->iface) != -EPROBE_DEFER) ++ dev_err(dev, ++ "Can't get the dai clock gate\n"); ++ return PTR_ERR(priv->iface); ++ } ++ ++ priv->mclk_i958 = devm_clk_get(dev, "mclk_i958"); ++ if (IS_ERR(priv->mclk_i958)) { ++ if (PTR_ERR(priv->mclk_i958) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get the spdif master clock\n"); ++ return PTR_ERR(priv->mclk_i958); ++ } ++ ++ /* ++ * TODO: the spdif dai can also get its data from the i2s fifo. ++ * For this use-case, the DAI driver will need to get the i2s master ++ * clock in order to reparent the spdif clock from cts_mclk_i958 to ++ * cts_amclk ++ */ ++ ++ priv->mclk = devm_clk_get(dev, "mclk"); ++ if (IS_ERR(priv->mclk)) { ++ if (PTR_ERR(priv->mclk) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get the spdif input mux clock\n"); ++ return PTR_ERR(priv->mclk); ++ } ++ ++ return devm_snd_soc_register_component(dev, &meson_spdif_dai_component, ++ &meson_spdif_dai, 1); ++} ++ ++static const struct of_device_id meson_spdif_dai_of_match[] = { ++ { .compatible = "amlogic,meson-spdif-dai", }, ++ { .compatible = "amlogic,meson-gxbb-spdif-dai", }, ++ { .compatible = "amlogic,meson-gxl-spdif-dai", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, meson_spdif_dai_of_match); ++ ++static struct platform_driver meson_spdif_dai_pdrv = { ++ .probe = meson_spdif_dai_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = meson_spdif_dai_of_match, ++ }, ++}; ++module_platform_driver(meson_spdif_dai_pdrv); ++ ++MODULE_DESCRIPTION("Meson spdif DAI ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch b/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch new file mode 100644 index 000000000..e04c08c03 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch @@ -0,0 +1,31 @@ +From eabd19b9bb8a62764dfd5290205cf7431e0329d6 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Fri, 31 Mar 2017 15:55:03 +0200 +Subject: [PATCH 08/53] ARM64: defconfig: enable audio support for meson SoCs + as module + +Add audio support for meson SoCs. This includes the audio core +driver and the i2s and spdif output interfaces + +Signed-off-by: Jerome Brunet +--- + arch/arm64/configs/defconfig | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index ab1cb51319e7..a4bf54b3b50d 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -464,6 +464,9 @@ CONFIG_SOUND=y + CONFIG_SND=y + CONFIG_SND_SOC=y + CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_SOC_MESON=m ++CONFIG_SND_SOC_MESON_I2S=m ++CONFIG_SND_SOC_MESON_SPDIF=m + CONFIG_SND_SOC_ROCKCHIP=m + CONFIG_SND_SOC_ROCKCHIP_I2S=m + CONFIG_SND_SOC_ROCKCHIP_SPDIF=m +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch b/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch new file mode 100644 index 000000000..2d5f7ec33 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch @@ -0,0 +1,189 @@ +From 8615d90edac5487f8639c5e4df40312972d7b2c9 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 15:19:04 +0200 +Subject: [PATCH 09/53] ARM64: dts: meson-gx: add audio controller nodes + +Add audio controller nodes for Amlogic meson gxbb and gxl. +This includes the audio-core node, the i2s and spdif DAIs, i2s and spdif +aiu DMAs. + +Audio on this SoC family is still a work in progress. More nodes are likely +to be added later on (pcm DAIs, input DMAs, etc ...) + +Signed-off-by: Jerome Brunet +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 35 ++++++++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 39 +++++++++++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 38 ++++++++++++++++++++ + 3 files changed, 112 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index b8dc4dbb391b..6b64b63f2a68 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -203,6 +203,41 @@ + #reset-cells = <1>; + }; + ++ audio: audio@5400 { ++ compatible = "amlogic,meson-audio-core"; ++ reg = <0x0 0x5400 0x0 0x2ac>, ++ <0x0 0xa000 0x0 0x304>; ++ reg-names = "aiu", "audin"; ++ status = "disabled"; ++ ++ aiu_i2s_dma: aiu_i2s_dma { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-aiu-i2s-dma"; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ aiu_spdif_dma: aiu_spdif_dma { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-aiu-spdif-dma"; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ i2s_dai: i2s_dai { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-i2s-dai"; ++ status = "disabled"; ++ }; ++ ++ spdif_dai: spdif_dai { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-spdif-dai"; ++ status = "disabled"; ++ }; ++ ++ }; ++ + uart_A: serial@84c0 { + compatible = "amlogic,meson-gx-uart"; + reg = <0x0 0x84c0 0x0 0x18>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 98cbba6809ca..79132496691f 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -659,6 +659,35 @@ + }; + }; + ++&audio { ++ clocks = <&clkc CLKID_AIU>, ++ <&clkc CLKID_AIU_GLUE>, ++ <&clkc CLKID_I2S_SPDIF>; ++ clock-names = "aiu_top", "aiu_glue", "audin"; ++ resets = <&reset RESET_AIU>, ++ <&reset RESET_AUDIN>; ++ reset-names = "aiu", "audin"; ++}; ++ ++&aiu_i2s_dma { ++ clocks = <&clkc CLKID_I2S_OUT>; ++ clock-names = "fast"; ++}; ++ ++&aiu_spdif_dma { ++ clocks = <&clkc CLKID_IEC958>; ++ clock-names = "fast"; ++ ++}; ++ ++&i2s_dai { ++ clocks = <&clkc CLKID_I2S_OUT>, ++ <&clkc CLKID_MIXER_IFACE>, ++ <&clkc CLKID_AOCLK_GATE>, ++ <&clkc CLKID_CTS_AMCLK>; ++ clock-names = "fast", "iface", "bclks", "mclk"; ++}; ++ + &pwrc_vpu { + resets = <&reset RESET_VIU>, + <&reset RESET_VENC>, +@@ -741,6 +770,15 @@ + num-cs = <1>; + }; + ++&spdif_dai { ++ clocks = <&clkc CLKID_IEC958>, ++ <&clkc CLKID_IEC958_GATE>, ++ <&clkc CLKID_CTS_MCLK_I958>, ++ <&clkc CLKID_CTS_AMCLK>, ++ <&clkc CLKID_CTS_I958>; ++ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; ++}; ++ + &spifc { + clocks = <&clkc CLKID_SPI>; + }; +@@ -774,3 +812,4 @@ + compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; + power-domains = <&pwrc_vpu>; + }; ++ +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index c87a80e9bcc6..20922cdc2c23 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -660,6 +660,34 @@ + }; + }; + ++&audio { ++ clocks = <&clkc CLKID_AIU>, ++ <&clkc CLKID_AIU_GLUE>, ++ <&clkc CLKID_I2S_SPDIF>; ++ clock-names = "aiu_top", "aiu_glue", "audin"; ++ resets = <&reset RESET_AIU>, ++ <&reset RESET_AUDIN>; ++ reset-names = "aiu", "audin"; ++}; ++ ++&aiu_i2s_dma { ++ clocks = <&clkc CLKID_I2S_OUT>; ++ clock-names = "fast"; ++}; ++ ++&aiu_spdif_dma { ++ clocks = <&clkc CLKID_IEC958>; ++ clock-names = "fast"; ++}; ++ ++&i2s_dai { ++ clocks = <&clkc CLKID_I2S_OUT>, ++ <&clkc CLKID_MIXER_IFACE>, ++ <&clkc CLKID_AOCLK_GATE>, ++ <&clkc CLKID_CTS_AMCLK>; ++ clock-names = "fast", "iface", "bclks", "mclk"; ++}; ++ + &pwrc_vpu { + resets = <&reset RESET_VIU>, + <&reset RESET_VENC>, +@@ -742,6 +770,15 @@ + num-cs = <1>; + }; + ++&spdif_dai { ++ clocks = <&clkc CLKID_IEC958>, ++ <&clkc CLKID_IEC958_GATE>, ++ <&clkc CLKID_CTS_MCLK_I958>, ++ <&clkc CLKID_CTS_AMCLK>, ++ <&clkc CLKID_CTS_I958>; ++ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; ++}; ++ + &spifc { + clocks = <&clkc CLKID_SPI>; + }; +@@ -775,3 +812,4 @@ + compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; + power-domains = <&pwrc_vpu>; + }; ++ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch b/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch new file mode 100644 index 000000000..b41eb405d --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch @@ -0,0 +1,55 @@ +From 5608714afb7c71054a01e4ad208b3eaa044041d4 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Fri, 7 Jul 2017 17:39:21 +0200 +Subject: [PATCH 10/53] snd: meson: activate HDMI audio path + +Signed-off-by: Neil Armstrong +--- + sound/soc/meson/i2s-dai.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c +index 1008af8d3972..63fe098ecf82 100644 +--- a/sound/soc/meson/i2s-dai.c ++++ b/sound/soc/meson/i2s-dai.c +@@ -56,8 +56,19 @@ struct meson_i2s_dai { + #define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) + #define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) + #define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK BIT(6) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_I958_CLK (0 << 6) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK (1 << 6) + #define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) + #define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK GENMASK(1, 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_DISABLE (0 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_PCM (1 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_I2S (2 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK GENMASK(5, 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_MUTE (0 << 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_PCM (1 << 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_I2S (2 << 4) + #define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) + #define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) + #define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) +@@ -221,6 +232,17 @@ static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, + return ret; + } + ++ /* Quick and dirty hack for HDMI */ ++ regmap_update_bits(priv->core->aiu, AIU_HDMI_CLK_DATA_CTRL, ++ AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK | ++ AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK, ++ AIU_HDMI_CLK_DATA_CTRL_CLK_I2S | ++ AIU_HDMI_CLK_DATA_CTRL_DATA_I2S); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, ++ AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK, ++ AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK); ++ + return 0; + } + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch b/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch new file mode 100644 index 000000000..0876bc059 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch @@ -0,0 +1,22 @@ +From 5b3d41b6ad8275d53b758d6d4b95441b53cd320b Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Tue, 14 Feb 2017 19:18:04 +0100 +Subject: [PATCH 11/53] drm/meson: select dw-hdmi i2s audio for meson hdmi + +Signed-off-by: Jerome Brunet +--- + drivers/gpu/drm/meson/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig +index 3ce51d8dfe1c..02d400b8795c 100644 +--- a/drivers/gpu/drm/meson/Kconfig ++++ b/drivers/gpu/drm/meson/Kconfig +@@ -13,3 +13,4 @@ config DRM_MESON_DW_HDMI + depends on DRM_MESON + default y if DRM_MESON + select DRM_DW_HDMI ++ select DRM_DW_HDMI_I2S_AUDIO +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch b/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch new file mode 100644 index 000000000..eb2208865 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch @@ -0,0 +1,38 @@ +From 461a8ba1e73d38b8cd8f8c931a8ae27676cdb085 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Wed, 20 Sep 2017 18:01:26 +0200 +Subject: [PATCH 12/53] ARM64: dts: meson-gx: add sound-dai-cells to HDMI node + +Signed-off-by: Jerome Brunet +--- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 79132496691f..2a4d506bad4e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -305,6 +305,7 @@ + <&clkc CLKID_CLK81>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; ++ #sound-dai-cells = <0>; + }; + + &sysctrl { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 20922cdc2c23..9f4b6185a61d 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -257,6 +257,7 @@ + <&clkc CLKID_CLK81>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; ++ #sound-dai-cells = <0>; + }; + + &sysctrl { +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch b/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch new file mode 100644 index 000000000..27760c288 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch @@ -0,0 +1,864 @@ +From dc4eb517f2800001f77bec852f8f688f0164e51b Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Wed, 20 Sep 2017 18:10:08 +0200 +Subject: [PATCH 13/53] ARM64: dts: meson: activate hdmi audio HDMI enabled + boards + +This patch activate audio over HDMI on selected boards + +Please note that this audio support is based on WIP changes +This should be considered as preview and it does not reflect +the audio I expect to see merged + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 45 +++++++++++++++++++ + .../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-odroidc2.dts | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 45 +++++++++++++++++++ + .../amlogic/meson-gxl-s905x-khadas-vim.dts | 45 +++++++++++++++++++ + .../amlogic/meson-gxl-s905x-libretech-cc.dts | 45 +++++++++++++++++++ + .../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxl-s905x-p212.dts | 45 +++++++++++++++++++ + .../dts/amlogic/meson-gxm-khadas-vim2.dts | 45 +++++++++++++++++++ + .../boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 45 +++++++++++++++++++ + 12 files changed, 540 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index 765247bc4f24..fb9ad6faa745 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -102,6 +102,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -111,6 +144,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -133,6 +174,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +index cbe99bd4e06d..5b10de9a0bad 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +@@ -88,6 +88,39 @@ + clock-names = "ext_clock"; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + vcc1v8: regulator-vcc1v8 { + compatible = "regulator-fixed"; + regulator-name = "VCC1.8V"; +@@ -131,6 +164,14 @@ + }; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cec_AO { + status = "okay"; + pinctrl-0 = <&ao_cec_pins>; +@@ -185,6 +226,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +index 4cf7f6e80c6a..ff87bdc7ddbf 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +@@ -119,6 +119,39 @@ + clock-names = "ext_clock"; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + cvbs-connector { + compatible = "composite-video-connector"; + +@@ -154,6 +187,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + ðmac { + status = "okay"; + pinctrl-0 = <ð_rmii_pins>; +@@ -190,6 +231,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index 54954b314a45..3da33090b8fe 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -110,6 +110,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -119,6 +152,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; +@@ -181,6 +222,10 @@ + pinctrl-names = "default"; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +index ce862266b9aa..84eb93b4229f 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +@@ -113,6 +113,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -122,6 +155,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -140,6 +181,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi +index 70325b273bd2..7d1f1726f29d 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi +@@ -105,6 +105,47 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; + }; + + &cec_AO { +@@ -159,6 +200,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index d32cf3846370..f053595ebdc4 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -65,6 +65,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -74,6 +107,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; +@@ -86,6 +127,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index f63bceb88caa..f56969efffba 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -84,6 +84,39 @@ + regulator-always-on; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; +@@ -130,6 +163,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -151,6 +192,10 @@ + pinctrl-names = "default"; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +index 6739697be1de..e3e777f665c0 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +@@ -102,6 +102,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -111,6 +144,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -135,6 +176,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +index 5896e8a5d86b..f8c66a7972b3 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +@@ -32,6 +32,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -41,12 +74,24 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +index 313f88f8759e..4fbfa5a850cc 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -85,6 +85,39 @@ + }; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + pwmleds { + compatible = "pwm-leds"; + +@@ -205,6 +238,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cpu0 { + #cooling-cells = <2>; + }; +@@ -279,6 +320,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +index f7a1cffab4a8..b9c5e6444daa 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +@@ -75,6 +75,39 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-audio"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -84,6 +117,14 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +@@ -129,6 +170,10 @@ + }; + }; + ++&i2s_dai { ++ status = "okay"; ++}; ++ + &ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch b/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch new file mode 100644 index 000000000..2a84e1aac --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch @@ -0,0 +1,78 @@ +From de9e307aca194c9918a3ace8d809c9f3b18000b9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 2 Jul 2018 12:21:55 +0200 +Subject: [PATCH 14/53] drm: bridge: dw-hdmi: Use AUTO CTS setup mode when + non-AHB audio + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 41 ++++++++++++++--------- + 1 file changed, 26 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 5971976284bf..1fc12708dbb5 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -430,8 +430,12 @@ static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, + /* nshift factor = 0 */ + hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); + +- hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | +- HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); ++ /* Use Auto CTS mode with CTS is unknown */ ++ if (cts) ++ hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | ++ HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); ++ else ++ hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3); + hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); + hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); + +@@ -501,24 +505,31 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, + { + unsigned long ftdms = pixel_clk; + unsigned int n, cts; ++ u8 config3; + u64 tmp; + + n = hdmi_compute_n(sample_rate, pixel_clk); + +- /* +- * Compute the CTS value from the N value. Note that CTS and N +- * can be up to 20 bits in total, so we need 64-bit math. Also +- * note that our TDMS clock is not fully accurate; it is accurate +- * to kHz. This can introduce an unnecessary remainder in the +- * calculation below, so we don't try to warn about that. +- */ +- tmp = (u64)ftdms * n; +- do_div(tmp, 128 * sample_rate); +- cts = tmp; ++ config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID); + +- dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", +- __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, +- n, cts); ++ if (config3 & HDMI_CONFIG3_AHBAUDDMA) { ++ /* ++ * Compute the CTS value from the N value. Note that CTS and N ++ * can be up to 20 bits in total, so we need 64-bit math. Also ++ * note that our TDMS clock is not fully accurate; it is ++ * accurate to kHz. This can introduce an unnecessary remainder ++ * in the calculation below, so we don't try to warn about that. ++ */ ++ tmp = (u64)ftdms * n; ++ do_div(tmp, 128 * sample_rate); ++ cts = tmp; ++ ++ dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", ++ __func__, sample_rate, ++ ftdms / 1000000, (ftdms / 1000) % 1000, ++ n, cts); ++ } else ++ cts = 0; + + spin_lock_irq(&hdmi->audio_lock); + hdmi->audio_n = n; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch b/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch new file mode 100644 index 000000000..5bef76957 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch @@ -0,0 +1,29 @@ +From ca4d7cc46fc5788da89609691ccb0b001bdbdc2d Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 28 Feb 2018 16:07:18 +0100 +Subject: [PATCH 15/53] drm/meson: Call drm_crtc_vblank_on / + drm_crtc_vblank_off + +Make sure that the CRTC code will call the enable/disable_vblank hooks. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_crtc.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index 709475d5cc30..2680be54a1d1 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -104,6 +104,8 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc, + drm_crtc_vblank_on(crtc); + + priv->viu.osd1_enabled = true; ++ ++ drm_crtc_vblank_on(crtc); + } + + static void meson_crtc_atomic_disable(struct drm_crtc *crtc, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch new file mode 100644 index 000000000..7862cb9e5 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch @@ -0,0 +1,316 @@ +From d28f2758958eff3be784b80eff63c144d342539b Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Fri, 20 Apr 2018 13:17:07 +0200 +Subject: [PATCH 16/53] soc: amlogic: add meson-canvas driver + +Amlogic SoCs have a repository of 256 canvas which they use to +describe pixel buffers. + +They contain metadata like width, height, block mode, endianness [..] + +Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write +pixels. + +Reviewed-by: Jerome Brunet +Tested-by: Neil Armstrong +Signed-off-by: Maxime Jourdan +--- + drivers/soc/amlogic/Kconfig | 7 + + drivers/soc/amlogic/Makefile | 1 + + drivers/soc/amlogic/meson-canvas.c | 185 +++++++++++++++++++++++ + include/linux/soc/amlogic/meson-canvas.h | 65 ++++++++ + 4 files changed, 258 insertions(+) + create mode 100644 drivers/soc/amlogic/meson-canvas.c + create mode 100644 include/linux/soc/amlogic/meson-canvas.h + +diff --git a/drivers/soc/amlogic/Kconfig b/drivers/soc/amlogic/Kconfig +index b04f6e4aedbc..2f282b472912 100644 +--- a/drivers/soc/amlogic/Kconfig ++++ b/drivers/soc/amlogic/Kconfig +@@ -1,5 +1,12 @@ + menu "Amlogic SoC drivers" + ++config MESON_CANVAS ++ tristate "Amlogic Meson Canvas driver" ++ depends on ARCH_MESON || COMPILE_TEST ++ default n ++ help ++ Say yes to support the canvas IP for Amlogic SoCs. ++ + config MESON_GX_SOCINFO + bool "Amlogic Meson GX SoC Information driver" + depends on ARCH_MESON || COMPILE_TEST +diff --git a/drivers/soc/amlogic/Makefile b/drivers/soc/amlogic/Makefile +index 8fa321893928..0ab16d35ac36 100644 +--- a/drivers/soc/amlogic/Makefile ++++ b/drivers/soc/amlogic/Makefile +@@ -1,3 +1,4 @@ ++obj-$(CONFIG_MESON_CANVAS) += meson-canvas.o + obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o + obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o + obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o +diff --git a/drivers/soc/amlogic/meson-canvas.c b/drivers/soc/amlogic/meson-canvas.c +new file mode 100644 +index 000000000000..fce33ca76bb6 +--- /dev/null ++++ b/drivers/soc/amlogic/meson-canvas.c +@@ -0,0 +1,185 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Copyright (C) 2015 Amlogic, Inc. All rights reserved. ++ * Copyright (C) 2014 Endless Mobile ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NUM_CANVAS 256 ++ ++/* DMC Registers */ ++#define DMC_CAV_LUT_DATAL 0x00 ++ #define CANVAS_WIDTH_LBIT 29 ++ #define CANVAS_WIDTH_LWID 3 ++#define DMC_CAV_LUT_DATAH 0x04 ++ #define CANVAS_WIDTH_HBIT 0 ++ #define CANVAS_HEIGHT_BIT 9 ++ #define CANVAS_WRAP_BIT 22 ++ #define CANVAS_BLKMODE_BIT 24 ++ #define CANVAS_ENDIAN_BIT 26 ++#define DMC_CAV_LUT_ADDR 0x08 ++ #define CANVAS_LUT_WR_EN BIT(9) ++ #define CANVAS_LUT_RD_EN BIT(8) ++ ++struct meson_canvas { ++ struct device *dev; ++ void __iomem *reg_base; ++ spinlock_t lock; /* canvas device lock */ ++ u8 used[NUM_CANVAS]; ++}; ++ ++static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val) ++{ ++ writel_relaxed(val, canvas->reg_base + reg); ++} ++ ++static u32 canvas_read(struct meson_canvas *canvas, u32 reg) ++{ ++ return readl_relaxed(canvas->reg_base + reg); ++} ++ ++struct meson_canvas *meson_canvas_get(struct device *dev) ++{ ++ struct device_node *canvas_node; ++ struct platform_device *canvas_pdev; ++ ++ canvas_node = of_parse_phandle(dev->of_node, "amlogic,canvas", 0); ++ if (!canvas_node) ++ return ERR_PTR(-ENODEV); ++ ++ canvas_pdev = of_find_device_by_node(canvas_node); ++ if (!canvas_pdev) ++ return ERR_PTR(-EPROBE_DEFER); ++ ++ return dev_get_drvdata(&canvas_pdev->dev); ++} ++EXPORT_SYMBOL_GPL(meson_canvas_get); ++ ++int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, ++ u32 addr, u32 stride, u32 height, ++ unsigned int wrap, ++ unsigned int blkmode, ++ unsigned int endian) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&canvas->lock, flags); ++ if (!canvas->used[canvas_index]) { ++ dev_err(canvas->dev, ++ "Trying to setup non allocated canvas %u\n", ++ canvas_index); ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ return -EINVAL; ++ } ++ ++ canvas_write(canvas, DMC_CAV_LUT_DATAL, ++ ((addr + 7) >> 3) | ++ (((stride + 7) >> 3) << CANVAS_WIDTH_LBIT)); ++ ++ canvas_write(canvas, DMC_CAV_LUT_DATAH, ++ ((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) << ++ CANVAS_WIDTH_HBIT) | ++ (height << CANVAS_HEIGHT_BIT) | ++ (wrap << CANVAS_WRAP_BIT) | ++ (blkmode << CANVAS_BLKMODE_BIT) | ++ (endian << CANVAS_ENDIAN_BIT)); ++ ++ canvas_write(canvas, DMC_CAV_LUT_ADDR, ++ CANVAS_LUT_WR_EN | canvas_index); ++ ++ /* Force a read-back to make sure everything is flushed. */ ++ canvas_read(canvas, DMC_CAV_LUT_DATAH); ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(meson_canvas_config); ++ ++int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index) ++{ ++ int i; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&canvas->lock, flags); ++ for (i = 0; i < NUM_CANVAS; ++i) { ++ if (!canvas->used[i]) { ++ canvas->used[i] = 1; ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ *canvas_index = i; ++ return 0; ++ } ++ } ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ ++ dev_err(canvas->dev, "No more canvas available\n"); ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(meson_canvas_alloc); ++ ++int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&canvas->lock, flags); ++ if (!canvas->used[canvas_index]) { ++ dev_err(canvas->dev, ++ "Trying to free unused canvas %u\n", canvas_index); ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ return -EINVAL; ++ } ++ canvas->used[canvas_index] = 0; ++ spin_unlock_irqrestore(&canvas->lock, flags); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(meson_canvas_free); ++ ++static int meson_canvas_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ struct meson_canvas *canvas; ++ struct device *dev = &pdev->dev; ++ ++ canvas = devm_kzalloc(dev, sizeof(*canvas), GFP_KERNEL); ++ if (!canvas) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ canvas->reg_base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(canvas->reg_base)) ++ return PTR_ERR(canvas->reg_base); ++ ++ canvas->dev = dev; ++ spin_lock_init(&canvas->lock); ++ dev_set_drvdata(dev, canvas); ++ ++ return 0; ++} ++ ++static const struct of_device_id canvas_dt_match[] = { ++ { .compatible = "amlogic,canvas" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, canvas_dt_match); ++ ++static struct platform_driver meson_canvas_driver = { ++ .probe = meson_canvas_probe, ++ .driver = { ++ .name = "amlogic-canvas", ++ .of_match_table = canvas_dt_match, ++ }, ++}; ++module_platform_driver(meson_canvas_driver); ++ ++MODULE_DESCRIPTION("Amlogic Canvas driver"); ++MODULE_AUTHOR("Maxime Jourdan "); ++MODULE_LICENSE("GPL"); +diff --git a/include/linux/soc/amlogic/meson-canvas.h b/include/linux/soc/amlogic/meson-canvas.h +new file mode 100644 +index 000000000000..b4dde2fbeb3f +--- /dev/null ++++ b/include/linux/soc/amlogic/meson-canvas.h +@@ -0,0 +1,65 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ */ ++#ifndef __SOC_MESON_CANVAS_H ++#define __SOC_MESON_CANVAS_H ++ ++#include ++ ++#define MESON_CANVAS_WRAP_NONE 0x00 ++#define MESON_CANVAS_WRAP_X 0x01 ++#define MESON_CANVAS_WRAP_Y 0x02 ++ ++#define MESON_CANVAS_BLKMODE_LINEAR 0x00 ++#define MESON_CANVAS_BLKMODE_32x32 0x01 ++#define MESON_CANVAS_BLKMODE_64x64 0x02 ++ ++#define MESON_CANVAS_ENDIAN_SWAP16 0x1 ++#define MESON_CANVAS_ENDIAN_SWAP32 0x3 ++#define MESON_CANVAS_ENDIAN_SWAP64 0x7 ++#define MESON_CANVAS_ENDIAN_SWAP128 0xf ++ ++struct meson_canvas; ++ ++/** ++ * meson_canvas_get() - get a canvas provider instance ++ * ++ * @dev: consumer device pointer ++ */ ++struct meson_canvas *meson_canvas_get(struct device *dev); ++ ++/** ++ * meson_canvas_alloc() - take ownership of a canvas ++ * ++ * @canvas: canvas provider instance retrieved from meson_canvas_get() ++ * @canvas_index: will be filled with the canvas ID ++ */ ++int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index); ++ ++/** ++ * meson_canvas_free() - remove ownership from a canvas ++ * ++ * @canvas: canvas provider instance retrieved from meson_canvas_get() ++ * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() ++ */ ++int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index); ++ ++/** ++ * meson_canvas_config() - configure a canvas ++ * ++ * @canvas: canvas provider instance retrieved from meson_canvas_get() ++ * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() ++ * @addr: physical address to the pixel buffer ++ * @stride: width of the buffer ++ * @height: height of the buffer ++ * @wrap: undocumented ++ * @blkmode: block mode (linear, 32x32, 64x64) ++ * @endian: byte swapping (swap16, swap32, swap64, swap128) ++ */ ++int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, ++ u32 addr, u32 stride, u32 height, ++ unsigned int wrap, unsigned int blkmode, ++ unsigned int endian); ++ ++#endif +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch b/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch new file mode 100644 index 000000000..b6da4467a --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch @@ -0,0 +1,41 @@ +From 83a293f5c56ec7cb763edba40c9cbf4f79ed6393 Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Fri, 20 Apr 2018 16:09:09 +0200 +Subject: [PATCH 17/53] ARM64: dts: meson-gx: add dmcbus and canvas nodes. + +DMC is a small memory region with various registers, +including the ones needed for the canvas module. + +Reviewed-by: Jerome Brunet +Signed-off-by: Maxime Jourdan +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index 6b64b63f2a68..fb6435431a94 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -458,6 +458,19 @@ + }; + }; + ++ dmcbus: bus@c8838000 { ++ compatible = "simple-bus"; ++ reg = <0x0 0xc8838000 0x0 0x400>; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>; ++ ++ canvas: video-lut@48 { ++ compatible = "amlogic,canvas"; ++ reg = <0x0 0x48 0x0 0x14>; ++ }; ++ }; ++ + hiubus: bus@c883c000 { + compatible = "simple-bus"; + reg = <0x0 0xc883c000 0x0 0x2000>; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch b/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch new file mode 100644 index 000000000..48c074fdb --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch @@ -0,0 +1,174 @@ +From b1ef71bf75024008c4221e0415f84af57cd128ac Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Mon, 15 Oct 2018 14:37:18 +0200 +Subject: [PATCH 18/53] drm/meson: Use optional canvas provider + +This is the first step into converting the meson/drm driver to use +the canvas module. + +If a canvas provider node is detected in DT, use it. Otherwise, +fall back to what is currently being done. + +Signed-off-by: Maxime Jourdan +--- + drivers/gpu/drm/meson/Kconfig | 1 + + drivers/gpu/drm/meson/meson_crtc.c | 14 ++++++--- + drivers/gpu/drm/meson/meson_drv.c | 46 ++++++++++++++++++----------- + drivers/gpu/drm/meson/meson_drv.h | 4 +++ + drivers/gpu/drm/meson/meson_plane.c | 8 ++++- + 5 files changed, 51 insertions(+), 22 deletions(-) + +diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig +index 02d400b8795c..892905825fea 100644 +--- a/drivers/gpu/drm/meson/Kconfig ++++ b/drivers/gpu/drm/meson/Kconfig +@@ -7,6 +7,7 @@ config DRM_MESON + select DRM_GEM_CMA_HELPER + select VIDEOMODE_HELPERS + select REGMAP_MMIO ++ select MESON_CANVAS + + config DRM_MESON_DW_HDMI + tristate "HDMI Synopsys Controller support for Amlogic Meson Display" +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index 2680be54a1d1..910b92def5d2 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -199,10 +199,16 @@ void meson_crtc_irq(struct meson_drm *priv) + } else + meson_vpp_disable_interlace_vscaler_osd1(priv); + +- meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, +- priv->viu.osd1_addr, priv->viu.osd1_stride, +- priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, +- MESON_CANVAS_BLKMODE_LINEAR); ++ if (priv->canvas) ++ meson_canvas_config(priv->canvas, priv->canvas_id_osd1, ++ priv->viu.osd1_addr, priv->viu.osd1_stride, ++ priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, 0); ++ else ++ meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, ++ priv->viu.osd1_addr, priv->viu.osd1_stride, ++ priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR); + + /* Enable OSD1 */ + writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index 588b3b0c8315..874c7a74a7c1 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -220,24 +220,33 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + goto free_drm; + } + +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); +- if (!res) { +- ret = -EINVAL; +- goto free_drm; +- } +- /* Simply ioremap since it may be a shared register zone */ +- regs = devm_ioremap(dev, res->start, resource_size(res)); +- if (!regs) { +- ret = -EADDRNOTAVAIL; +- goto free_drm; +- } ++ priv->canvas = meson_canvas_get(dev); ++ if (!IS_ERR(priv->canvas)) { ++ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); ++ if (ret) ++ goto free_drm; ++ } else { ++ priv->canvas = NULL; + +- priv->dmc = devm_regmap_init_mmio(dev, regs, +- &meson_regmap_config); +- if (IS_ERR(priv->dmc)) { +- dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); +- ret = PTR_ERR(priv->dmc); +- goto free_drm; ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); ++ if (!res) { ++ ret = -EINVAL; ++ goto free_drm; ++ } ++ /* Simply ioremap since it may be a shared register zone */ ++ regs = devm_ioremap(dev, res->start, resource_size(res)); ++ if (!regs) { ++ ret = -EADDRNOTAVAIL; ++ goto free_drm; ++ } ++ ++ priv->dmc = devm_regmap_init_mmio(dev, regs, ++ &meson_regmap_config); ++ if (IS_ERR(priv->dmc)) { ++ dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); ++ ret = PTR_ERR(priv->dmc); ++ goto free_drm; ++ } + } + + priv->vsync_irq = platform_get_irq(pdev, 0); +@@ -322,6 +331,9 @@ static void meson_drv_unbind(struct device *dev) + struct meson_drm *priv = dev_get_drvdata(dev); + struct drm_device *drm = priv->drm; + ++ if (priv->canvas) ++ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); ++ + drm_dev_unregister(drm); + drm_irq_uninstall(drm); + drm_kms_helper_poll_fini(drm); +diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h +index 8450d6ac8c9b..728d0ca33732 100644 +--- a/drivers/gpu/drm/meson/meson_drv.h ++++ b/drivers/gpu/drm/meson/meson_drv.h +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + #include + + struct meson_drm { +@@ -31,6 +32,9 @@ struct meson_drm { + struct regmap *dmc; + int vsync_irq; + ++ struct meson_canvas *canvas; ++ u8 canvas_id_osd1; ++ + struct drm_device *drm; + struct drm_crtc *crtc; + struct drm_fbdev_cma *fbdev; +diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c +index 12c80dfcff59..51bec8e98a39 100644 +--- a/drivers/gpu/drm/meson/meson_plane.c ++++ b/drivers/gpu/drm/meson/meson_plane.c +@@ -90,6 +90,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + .y2 = state->crtc_y + state->crtc_h, + }; + unsigned long flags; ++ u8 canvas_id_osd1; + + /* + * Update Coordinates +@@ -104,8 +105,13 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + (0xFF << OSD_GLOBAL_ALPHA_SHIFT) | + OSD_BLK0_ENABLE; + ++ if (priv->canvas) ++ canvas_id_osd1 = priv->canvas_id_osd1; ++ else ++ canvas_id_osd1 = MESON_CANVAS_ID_OSD1; ++ + /* Set up BLK0 to point to the right canvas */ +- priv->viu.osd1_blk0_cfg[0] = ((MESON_CANVAS_ID_OSD1 << OSD_CANVAS_SEL) | ++ priv->viu.osd1_blk0_cfg[0] = ((canvas_id_osd1 << OSD_CANVAS_SEL) | + OSD_ENDIANNESS_LE); + + /* On GXBB, Use the old non-HDR RGB2YUV converter */ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch b/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch new file mode 100644 index 000000000..7c1cc116a --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch @@ -0,0 +1,28 @@ +From c16450ca851dbe9b7ad58464cea210610dd0433c Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Mon, 15 Oct 2018 14:38:24 +0200 +Subject: [PATCH 19/53] arm64: dts: meson-gx: Add canvas provider node to the + vpu + +Allows the vpu driver to optionally use a canvas provider node. + +Signed-off-by: Maxime Jourdan +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index fb6435431a94..5012607c95d2 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -540,6 +540,7 @@ + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; ++ amlogic,canvas = <&canvas>; + + /* CVBS VDAC output port */ + cvbs_vdac_port: port@0 { +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch b/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch new file mode 100644 index 000000000..aca8014f4 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch @@ -0,0 +1,1260 @@ +From 6274e2adb018593aa6e5378d990fc9c9f08c3da0 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 2 Aug 2018 10:00:01 +0200 +Subject: [PATCH 20/53] drm/meson: Support Overlay plane for video rendering + +The Amlogic Meson GX SoCs support an Overlay plane behind the primary +plane for video rendering. + +This Overlay plane support various YUV layouts : +- YUYV +- NV12 / NV21 +- YUV444 / 422 / 420 / 411 / 410 + +The scaler supports a wide range of scaling ratios, but for simplicity, +plane atomic check limits the scaling from x5 to /5 in vertical and +horizontal scaling. + +The z-order is fixed and always behind the primary plane and cannot be changed. + +The scaling parameter algorithm was taken from the Amlogic vendor kernel +code and rewritten to match the atomic universal plane requirements. + +The video rendering using this overlay plane support has been tested using +the new Kodi DRM-KMS Prime rendering path along the in-review V4L2 Mem2Mem +Hardware Video Decoder up to 3840x2160 NV12 frames on various display modes. +--- + drivers/gpu/drm/meson/Makefile | 2 +- + drivers/gpu/drm/meson/meson_canvas.c | 7 +- + drivers/gpu/drm/meson/meson_canvas.h | 11 +- + drivers/gpu/drm/meson/meson_crtc.c | 216 ++++++++- + drivers/gpu/drm/meson/meson_drv.c | 29 +- + drivers/gpu/drm/meson/meson_drv.h | 52 +++ + drivers/gpu/drm/meson/meson_overlay.c | 586 ++++++++++++++++++++++++ + drivers/gpu/drm/meson/meson_overlay.h | 14 + + drivers/gpu/drm/meson/meson_registers.h | 3 + + drivers/gpu/drm/meson/meson_viu.c | 15 + + drivers/gpu/drm/meson/meson_vpp.c | 44 +- + 11 files changed, 971 insertions(+), 8 deletions(-) + create mode 100644 drivers/gpu/drm/meson/meson_overlay.c + create mode 100644 drivers/gpu/drm/meson/meson_overlay.h + +diff --git a/drivers/gpu/drm/meson/Makefile b/drivers/gpu/drm/meson/Makefile +index c5c4cc362f02..7709f2fbb9f7 100644 +--- a/drivers/gpu/drm/meson/Makefile ++++ b/drivers/gpu/drm/meson/Makefile +@@ -1,5 +1,5 @@ + meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_venc_cvbs.o +-meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o ++meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o meson_overlay.o + + obj-$(CONFIG_DRM_MESON) += meson-drm.o + obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o +diff --git a/drivers/gpu/drm/meson/meson_canvas.c b/drivers/gpu/drm/meson/meson_canvas.c +index 08f6073d967e..5de11aa7c775 100644 +--- a/drivers/gpu/drm/meson/meson_canvas.c ++++ b/drivers/gpu/drm/meson/meson_canvas.c +@@ -39,6 +39,7 @@ + #define CANVAS_WIDTH_HBIT 0 + #define CANVAS_HEIGHT_BIT 9 + #define CANVAS_BLKMODE_BIT 24 ++#define CANVAS_ENDIAN_BIT 26 + #define DMC_CAV_LUT_ADDR 0x50 /* 0x14 offset in data sheet */ + #define CANVAS_LUT_WR_EN (0x2 << 8) + #define CANVAS_LUT_RD_EN (0x1 << 8) +@@ -47,7 +48,8 @@ void meson_canvas_setup(struct meson_drm *priv, + uint32_t canvas_index, uint32_t addr, + uint32_t stride, uint32_t height, + unsigned int wrap, +- unsigned int blkmode) ++ unsigned int blkmode, ++ unsigned int endian) + { + unsigned int val; + +@@ -60,7 +62,8 @@ void meson_canvas_setup(struct meson_drm *priv, + CANVAS_WIDTH_HBIT) | + (height << CANVAS_HEIGHT_BIT) | + (wrap << 22) | +- (blkmode << CANVAS_BLKMODE_BIT)); ++ (blkmode << CANVAS_BLKMODE_BIT) | ++ (endian << CANVAS_ENDIAN_BIT)); + + regmap_write(priv->dmc, DMC_CAV_LUT_ADDR, + CANVAS_LUT_WR_EN | canvas_index); +diff --git a/drivers/gpu/drm/meson/meson_canvas.h b/drivers/gpu/drm/meson/meson_canvas.h +index af1759da4b27..85dbf26e2826 100644 +--- a/drivers/gpu/drm/meson/meson_canvas.h ++++ b/drivers/gpu/drm/meson/meson_canvas.h +@@ -23,6 +23,9 @@ + #define __MESON_CANVAS_H + + #define MESON_CANVAS_ID_OSD1 0x4e ++#define MESON_CANVAS_ID_VD1_0 0x60 ++#define MESON_CANVAS_ID_VD1_1 0x61 ++#define MESON_CANVAS_ID_VD1_2 0x62 + + /* Canvas configuration. */ + #define MESON_CANVAS_WRAP_NONE 0x00 +@@ -33,10 +36,16 @@ + #define MESON_CANVAS_BLKMODE_32x32 0x01 + #define MESON_CANVAS_BLKMODE_64x64 0x02 + ++#define MESON_CANVAS_ENDIAN_SWAP16 0x1 ++#define MESON_CANVAS_ENDIAN_SWAP32 0x3 ++#define MESON_CANVAS_ENDIAN_SWAP64 0x7 ++#define MESON_CANVAS_ENDIAN_SWAP128 0xf ++ + void meson_canvas_setup(struct meson_drm *priv, + uint32_t canvas_index, uint32_t addr, + uint32_t stride, uint32_t height, + unsigned int wrap, +- unsigned int blkmode); ++ unsigned int blkmode, ++ unsigned int endian); + + #endif /* __MESON_CANVAS_H */ +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index 910b92def5d2..b292e9aedf52 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -98,6 +99,10 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc, + writel(crtc_state->mode.hdisplay, + priv->io_base + _REG(VPP_POSTBLEND_H_SIZE)); + ++ /* VD1 Preblend vertical start/end */ ++ writel(FIELD_PREP(GENMASK(11, 0), 2303), ++ priv->io_base + _REG(VPP_PREBLEND_VD1_V_START_END)); ++ + writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE, + priv->io_base + _REG(VPP_MISC)); + +@@ -116,11 +121,17 @@ static void meson_crtc_atomic_disable(struct drm_crtc *crtc, + + drm_crtc_vblank_off(crtc); + ++ DRM_DEBUG_DRIVER("\n"); ++ + priv->viu.osd1_enabled = false; + priv->viu.osd1_commit = false; + ++ priv->viu.vd1_enabled = false; ++ priv->viu.vd1_commit = false; ++ + /* Disable VPP Postblend */ +- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0, ++ writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_VD1_POSTBLEND | ++ VPP_VD1_PREBLEND | VPP_POSTBLEND_ENABLE, 0, + priv->io_base + _REG(VPP_MISC)); + + if (crtc->state->event && !crtc->state->active) { +@@ -155,6 +166,7 @@ static void meson_crtc_atomic_flush(struct drm_crtc *crtc, + struct meson_drm *priv = meson_crtc->priv; + + priv->viu.osd1_commit = true; ++ priv->viu.vd1_commit = true; + } + + static const struct drm_crtc_helper_funcs meson_crtc_helper_funcs = { +@@ -208,7 +220,7 @@ void meson_crtc_irq(struct meson_drm *priv) + meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, + priv->viu.osd1_addr, priv->viu.osd1_stride, + priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, +- MESON_CANVAS_BLKMODE_LINEAR); ++ MESON_CANVAS_BLKMODE_LINEAR, 0); + + /* Enable OSD1 */ + writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, +@@ -217,6 +229,206 @@ void meson_crtc_irq(struct meson_drm *priv) + priv->viu.osd1_commit = false; + } + ++ /* Update the VD1 registers */ ++ if (priv->viu.vd1_enabled && priv->viu.vd1_commit) { ++ ++ switch (priv->viu.vd1_planes) { ++ case 3: ++ if (priv->canvas) ++ meson_canvas_config(priv->canvas, ++ priv->canvas_id_vd1_2, ++ priv->viu.vd1_addr2, ++ priv->viu.vd1_stride2, ++ priv->viu.vd1_height2, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ else ++ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_2, ++ priv->viu.vd1_addr2, ++ priv->viu.vd1_stride2, ++ priv->viu.vd1_height2, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ /* fallthrough */ ++ case 2: ++ if (priv->canvas) ++ meson_canvas_config(priv->canvas, ++ priv->canvas_id_vd1_1, ++ priv->viu.vd1_addr1, ++ priv->viu.vd1_stride1, ++ priv->viu.vd1_height1, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ else ++ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_1, ++ priv->viu.vd1_addr2, ++ priv->viu.vd1_stride2, ++ priv->viu.vd1_height2, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ /* fallthrough */ ++ case 1: ++ if (priv->canvas) ++ meson_canvas_config(priv->canvas, ++ priv->canvas_id_vd1_0, ++ priv->viu.vd1_addr0, ++ priv->viu.vd1_stride0, ++ priv->viu.vd1_height0, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ else ++ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_0, ++ priv->viu.vd1_addr2, ++ priv->viu.vd1_stride2, ++ priv->viu.vd1_height2, ++ MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ }; ++ ++ writel_relaxed(priv->viu.vd1_if0_gen_reg, ++ priv->io_base + _REG(VD1_IF0_GEN_REG)); ++ writel_relaxed(priv->viu.vd1_if0_gen_reg, ++ priv->io_base + _REG(VD2_IF0_GEN_REG)); ++ writel_relaxed(priv->viu.vd1_if0_gen_reg2, ++ priv->io_base + _REG(VD1_IF0_GEN_REG2)); ++ writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, ++ priv->io_base + _REG(VIU_VD1_FMT_CTRL)); ++ writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, ++ priv->io_base + _REG(VIU_VD2_FMT_CTRL)); ++ writel_relaxed(priv->viu.viu_vd1_fmt_w, ++ priv->io_base + _REG(VIU_VD1_FMT_W)); ++ writel_relaxed(priv->viu.viu_vd1_fmt_w, ++ priv->io_base + _REG(VIU_VD2_FMT_W)); ++ writel_relaxed(priv->viu.vd1_if0_canvas0, ++ priv->io_base + _REG(VD1_IF0_CANVAS0)); ++ writel_relaxed(priv->viu.vd1_if0_canvas0, ++ priv->io_base + _REG(VD1_IF0_CANVAS1)); ++ writel_relaxed(priv->viu.vd1_if0_canvas0, ++ priv->io_base + _REG(VD2_IF0_CANVAS0)); ++ writel_relaxed(priv->viu.vd1_if0_canvas0, ++ priv->io_base + _REG(VD2_IF0_CANVAS1)); ++ writel_relaxed(priv->viu.vd1_if0_luma_x0, ++ priv->io_base + _REG(VD1_IF0_LUMA_X0)); ++ writel_relaxed(priv->viu.vd1_if0_luma_x0, ++ priv->io_base + _REG(VD1_IF0_LUMA_X1)); ++ writel_relaxed(priv->viu.vd1_if0_luma_x0, ++ priv->io_base + _REG(VD2_IF0_LUMA_X0)); ++ writel_relaxed(priv->viu.vd1_if0_luma_x0, ++ priv->io_base + _REG(VD2_IF0_LUMA_X1)); ++ writel_relaxed(priv->viu.vd1_if0_luma_y0, ++ priv->io_base + _REG(VD1_IF0_LUMA_Y0)); ++ writel_relaxed(priv->viu.vd1_if0_luma_y0, ++ priv->io_base + _REG(VD1_IF0_LUMA_Y1)); ++ writel_relaxed(priv->viu.vd1_if0_luma_y0, ++ priv->io_base + _REG(VD2_IF0_LUMA_Y0)); ++ writel_relaxed(priv->viu.vd1_if0_luma_y0, ++ priv->io_base + _REG(VD2_IF0_LUMA_Y1)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_x0, ++ priv->io_base + _REG(VD1_IF0_CHROMA_X0)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_x0, ++ priv->io_base + _REG(VD1_IF0_CHROMA_X1)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_x0, ++ priv->io_base + _REG(VD2_IF0_CHROMA_X0)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_x0, ++ priv->io_base + _REG(VD2_IF0_CHROMA_X1)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_y0, ++ priv->io_base + _REG(VD1_IF0_CHROMA_Y0)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_y0, ++ priv->io_base + _REG(VD1_IF0_CHROMA_Y1)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_y0, ++ priv->io_base + _REG(VD2_IF0_CHROMA_Y0)); ++ writel_relaxed(priv->viu.vd1_if0_chroma_y0, ++ priv->io_base + _REG(VD2_IF0_CHROMA_Y1)); ++ writel_relaxed(priv->viu.vd1_if0_repeat_loop, ++ priv->io_base + _REG(VD1_IF0_RPT_LOOP)); ++ writel_relaxed(priv->viu.vd1_if0_repeat_loop, ++ priv->io_base + _REG(VD2_IF0_RPT_LOOP)); ++ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, ++ priv->io_base + _REG(VD1_IF0_LUMA0_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, ++ priv->io_base + _REG(VD2_IF0_LUMA0_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, ++ priv->io_base + _REG(VD1_IF0_LUMA1_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, ++ priv->io_base + _REG(VD2_IF0_LUMA1_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, ++ priv->io_base + _REG(VD1_IF0_CHROMA0_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, ++ priv->io_base + _REG(VD2_IF0_CHROMA0_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, ++ priv->io_base + _REG(VD1_IF0_CHROMA1_RPT_PAT)); ++ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, ++ priv->io_base + _REG(VD2_IF0_CHROMA1_RPT_PAT)); ++ writel_relaxed(0, priv->io_base + _REG(VD1_IF0_LUMA_PSEL)); ++ writel_relaxed(0, priv->io_base + _REG(VD1_IF0_CHROMA_PSEL)); ++ writel_relaxed(0, priv->io_base + _REG(VD2_IF0_LUMA_PSEL)); ++ writel_relaxed(0, priv->io_base + _REG(VD2_IF0_CHROMA_PSEL)); ++ writel_relaxed(priv->viu.vd1_range_map_y, ++ priv->io_base + _REG(VD1_IF0_RANGE_MAP_Y)); ++ writel_relaxed(priv->viu.vd1_range_map_cb, ++ priv->io_base + _REG(VD1_IF0_RANGE_MAP_CB)); ++ writel_relaxed(priv->viu.vd1_range_map_cr, ++ priv->io_base + _REG(VD1_IF0_RANGE_MAP_CR)); ++ writel_relaxed(0x78404, ++ priv->io_base + _REG(VPP_SC_MISC)); ++ writel_relaxed(priv->viu.vpp_pic_in_height, ++ priv->io_base + _REG(VPP_PIC_IN_HEIGHT)); ++ writel_relaxed(priv->viu.vpp_postblend_vd1_h_start_end, ++ priv->io_base + _REG(VPP_POSTBLEND_VD1_H_START_END)); ++ writel_relaxed(priv->viu.vpp_blend_vd2_h_start_end, ++ priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); ++ writel_relaxed(priv->viu.vpp_postblend_vd1_v_start_end, ++ priv->io_base + _REG(VPP_POSTBLEND_VD1_V_START_END)); ++ writel_relaxed(priv->viu.vpp_blend_vd2_v_start_end, ++ priv->io_base + _REG(VPP_BLEND_VD2_V_START_END)); ++ writel_relaxed(priv->viu.vpp_hsc_region12_startp, ++ priv->io_base + _REG(VPP_HSC_REGION12_STARTP)); ++ writel_relaxed(priv->viu.vpp_hsc_region34_startp, ++ priv->io_base + _REG(VPP_HSC_REGION34_STARTP)); ++ writel_relaxed(priv->viu.vpp_hsc_region4_endp, ++ priv->io_base + _REG(VPP_HSC_REGION4_ENDP)); ++ writel_relaxed(priv->viu.vpp_hsc_start_phase_step, ++ priv->io_base + _REG(VPP_HSC_START_PHASE_STEP)); ++ writel_relaxed(priv->viu.vpp_hsc_region1_phase_slope, ++ priv->io_base + _REG(VPP_HSC_REGION1_PHASE_SLOPE)); ++ writel_relaxed(priv->viu.vpp_hsc_region3_phase_slope, ++ priv->io_base + _REG(VPP_HSC_REGION3_PHASE_SLOPE)); ++ writel_relaxed(priv->viu.vpp_line_in_length, ++ priv->io_base + _REG(VPP_LINE_IN_LENGTH)); ++ writel_relaxed(priv->viu.vpp_preblend_h_size, ++ priv->io_base + _REG(VPP_PREBLEND_H_SIZE)); ++ writel_relaxed(priv->viu.vpp_vsc_region12_startp, ++ priv->io_base + _REG(VPP_VSC_REGION12_STARTP)); ++ writel_relaxed(priv->viu.vpp_vsc_region34_startp, ++ priv->io_base + _REG(VPP_VSC_REGION34_STARTP)); ++ writel_relaxed(priv->viu.vpp_vsc_region4_endp, ++ priv->io_base + _REG(VPP_VSC_REGION4_ENDP)); ++ writel_relaxed(priv->viu.vpp_vsc_start_phase_step, ++ priv->io_base + _REG(VPP_VSC_START_PHASE_STEP)); ++ writel_relaxed(priv->viu.vpp_vsc_ini_phase, ++ priv->io_base + _REG(VPP_VSC_INI_PHASE)); ++ writel_relaxed(priv->viu.vpp_vsc_phase_ctrl, ++ priv->io_base + _REG(VPP_VSC_PHASE_CTRL)); ++ writel_relaxed(priv->viu.vpp_hsc_phase_ctrl, ++ priv->io_base + _REG(VPP_HSC_PHASE_CTRL)); ++ writel_relaxed(0x42, priv->io_base + _REG(VPP_SCALE_COEF_IDX)); ++ ++ /* Enable VD1 */ ++ writel_bits_relaxed(VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND | ++ VPP_COLOR_MNG_ENABLE, ++ VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND | ++ VPP_COLOR_MNG_ENABLE, ++ priv->io_base + _REG(VPP_MISC)); ++ ++ priv->viu.vd1_commit = false; ++ } ++ + drm_crtc_handle_vblank(priv->crtc); + + spin_lock_irqsave(&priv->drm->event_lock, flags); +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index 874c7a74a7c1..63bb2727b183 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -41,6 +41,7 @@ + + #include "meson_drv.h" + #include "meson_plane.h" ++#include "meson_overlay.h" + #include "meson_crtc.h" + #include "meson_venc_cvbs.h" + +@@ -225,6 +226,24 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); + if (ret) + goto free_drm; ++ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); ++ if (ret) { ++ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); ++ goto free_drm; ++ } ++ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); ++ if (ret) { ++ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); ++ goto free_drm; ++ } ++ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); ++ if (ret) { ++ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); ++ goto free_drm; ++ } + } else { + priv->canvas = NULL; + +@@ -286,6 +305,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + if (ret) + goto free_drm; + ++ ret = meson_overlay_create(priv); ++ if (ret) ++ goto free_drm; ++ + ret = meson_crtc_create(priv); + if (ret) + goto free_drm; +@@ -331,8 +354,12 @@ static void meson_drv_unbind(struct device *dev) + struct meson_drm *priv = dev_get_drvdata(dev); + struct drm_device *drm = priv->drm; + +- if (priv->canvas) ++ if (priv->canvas) { + meson_canvas_free(priv->canvas, priv->canvas_id_osd1); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); ++ } + + drm_dev_unregister(drm); + drm_irq_uninstall(drm); +diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h +index 728d0ca33732..c971557d4a48 100644 +--- a/drivers/gpu/drm/meson/meson_drv.h ++++ b/drivers/gpu/drm/meson/meson_drv.h +@@ -34,11 +34,15 @@ struct meson_drm { + + struct meson_canvas *canvas; + u8 canvas_id_osd1; ++ u8 canvas_id_vd1_0; ++ u8 canvas_id_vd1_1; ++ u8 canvas_id_vd1_2; + + struct drm_device *drm; + struct drm_crtc *crtc; + struct drm_fbdev_cma *fbdev; + struct drm_plane *primary_plane; ++ struct drm_plane *overlay_plane; + + /* Components Data */ + struct { +@@ -50,6 +54,54 @@ struct meson_drm { + uint32_t osd1_addr; + uint32_t osd1_stride; + uint32_t osd1_height; ++ ++ bool vd1_enabled; ++ bool vd1_commit; ++ unsigned int vd1_planes; ++ uint32_t vd1_if0_gen_reg; ++ uint32_t vd1_if0_luma_x0; ++ uint32_t vd1_if0_luma_y0; ++ uint32_t vd1_if0_chroma_x0; ++ uint32_t vd1_if0_chroma_y0; ++ uint32_t vd1_if0_repeat_loop; ++ uint32_t vd1_if0_luma0_rpt_pat; ++ uint32_t vd1_if0_chroma0_rpt_pat; ++ uint32_t vd1_range_map_y; ++ uint32_t vd1_range_map_cb; ++ uint32_t vd1_range_map_cr; ++ uint32_t viu_vd1_fmt_w; ++ uint32_t vd1_if0_canvas0; ++ uint32_t vd1_if0_gen_reg2; ++ uint32_t viu_vd1_fmt_ctrl; ++ uint32_t vd1_addr0; ++ uint32_t vd1_addr1; ++ uint32_t vd1_addr2; ++ uint32_t vd1_stride0; ++ uint32_t vd1_stride1; ++ uint32_t vd1_stride2; ++ uint32_t vd1_height0; ++ uint32_t vd1_height1; ++ uint32_t vd1_height2; ++ uint32_t vpp_pic_in_height; ++ uint32_t vpp_postblend_vd1_h_start_end; ++ uint32_t vpp_postblend_vd1_v_start_end; ++ uint32_t vpp_hsc_region12_startp; ++ uint32_t vpp_hsc_region34_startp; ++ uint32_t vpp_hsc_region4_endp; ++ uint32_t vpp_hsc_start_phase_step; ++ uint32_t vpp_hsc_region1_phase_slope; ++ uint32_t vpp_hsc_region3_phase_slope; ++ uint32_t vpp_line_in_length; ++ uint32_t vpp_preblend_h_size; ++ uint32_t vpp_vsc_region12_startp; ++ uint32_t vpp_vsc_region34_startp; ++ uint32_t vpp_vsc_region4_endp; ++ uint32_t vpp_vsc_start_phase_step; ++ uint32_t vpp_vsc_ini_phase; ++ uint32_t vpp_vsc_phase_ctrl; ++ uint32_t vpp_hsc_phase_ctrl; ++ uint32_t vpp_blend_vd2_h_start_end; ++ uint32_t vpp_blend_vd2_v_start_end; + } viu; + + struct { +diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c +new file mode 100644 +index 000000000000..9aebc5e4b418 +--- /dev/null ++++ b/drivers/gpu/drm/meson/meson_overlay.c +@@ -0,0 +1,586 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Neil Armstrong ++ * Copyright (C) 2015 Amlogic, Inc. All rights reserved. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "meson_overlay.h" ++#include "meson_vpp.h" ++#include "meson_viu.h" ++#include "meson_canvas.h" ++#include "meson_registers.h" ++ ++/* VD1_IF0_GEN_REG */ ++#define VD_URGENT_CHROMA BIT(28) ++#define VD_URGENT_LUMA BIT(27) ++#define VD_HOLD_LINES(lines) FIELD_PREP(GENMASK(24, 19), lines) ++#define VD_DEMUX_MODE_RGB BIT(16) ++#define VD_BYTES_PER_PIXEL(val) FIELD_PREP(GENMASK(15, 14), val) ++#define VD_CHRO_RPT_LASTL_CTRL BIT(6) ++#define VD_LITTLE_ENDIAN BIT(4) ++#define VD_SEPARATE_EN BIT(1) ++#define VD_ENABLE BIT(0) ++ ++/* VD1_IF0_CANVAS0 */ ++#define CANVAS_ADDR2(addr) FIELD_PREP(GENMASK(23, 16), addr) ++#define CANVAS_ADDR1(addr) FIELD_PREP(GENMASK(15, 8), addr) ++#define CANVAS_ADDR0(addr) FIELD_PREP(GENMASK(7, 0), addr) ++ ++/* VD1_IF0_LUMA_X0 VD1_IF0_CHROMA_X0 */ ++#define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value) ++#define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value) ++ ++/* VD1_IF0_LUMA_Y0 VD1_IF0_CHROMA_Y0 */ ++#define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value) ++#define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value) ++ ++/* VD1_IF0_GEN_REG2 */ ++#define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value) ++ ++/* VIU_VD1_FMT_CTRL */ ++#define VD_HORZ_Y_C_RATIO(value) FIELD_PREP(GENMASK(22, 21), value) ++#define VD_HORZ_FMT_EN BIT(20) ++#define VD_VERT_RPT_LINE0 BIT(16) ++#define VD_VERT_INITIAL_PHASE(value) FIELD_PREP(GENMASK(11, 8), value) ++#define VD_VERT_PHASE_STEP(value) FIELD_PREP(GENMASK(7, 1), value) ++#define VD_VERT_FMT_EN BIT(0) ++ ++/* VPP_POSTBLEND_VD1_H_START_END */ ++#define VD_H_END(value) FIELD_PREP(GENMASK(11, 0), value) ++#define VD_H_START(value) FIELD_PREP(GENMASK(27, 16), value) ++ ++/* VPP_POSTBLEND_VD1_V_START_END */ ++#define VD_V_END(value) FIELD_PREP(GENMASK(11, 0), value) ++#define VD_V_START(value) FIELD_PREP(GENMASK(27, 16), value) ++ ++/* VPP_BLEND_VD2_V_START_END */ ++#define VD2_V_END(value) FIELD_PREP(GENMASK(11, 0), value) ++#define VD2_V_START(value) FIELD_PREP(GENMASK(27, 16), value) ++ ++/* VIU_VD1_FMT_W */ ++#define VD_V_WIDTH(value) FIELD_PREP(GENMASK(11, 0), value) ++#define VD_H_WIDTH(value) FIELD_PREP(GENMASK(27, 16), value) ++ ++/* VPP_HSC_REGION12_STARTP VPP_HSC_REGION34_STARTP */ ++#define VD_REGION24_START(value) FIELD_PREP(GENMASK(11, 0), value) ++#define VD_REGION13_END(value) FIELD_PREP(GENMASK(27, 16), value) ++ ++struct meson_overlay { ++ struct drm_plane base; ++ struct meson_drm *priv; ++}; ++#define to_meson_overlay(x) container_of(x, struct meson_overlay, base) ++ ++#define FRAC_16_16(mult, div) (((mult) << 16) / (div)) ++ ++static int meson_overlay_atomic_check(struct drm_plane *plane, ++ struct drm_plane_state *state) ++{ ++ struct drm_crtc_state *crtc_state; ++ ++ if (!state->crtc) ++ return 0; ++ ++ crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); ++ if (IS_ERR(crtc_state)) ++ return PTR_ERR(crtc_state); ++ ++ return drm_atomic_helper_check_plane_state(state, crtc_state, ++ FRAC_16_16(1, 5), ++ FRAC_16_16(5, 1), ++ true, true); ++} ++ ++/* Takes a fixed 16.16 number and converts it to integer. */ ++static inline int64_t fixed16_to_int(int64_t value) ++{ ++ return value >> 16; ++} ++ ++static const uint8_t skip_tab[6] = { ++ 0x24, 0x04, 0x68, 0x48, 0x28, 0x08, ++}; ++ ++static void meson_overlay_get_vertical_phase(unsigned int ratio_y, int *phase, ++ int *repeat, bool interlace) ++{ ++ int offset_in = 0; ++ int offset_out = 0; ++ int repeat_skip = 0; ++ ++ if (!interlace && ratio_y > (1 << 18)) ++ offset_out = (1 * ratio_y) >> 10; ++ ++ while ((offset_in + (4 << 8)) <= offset_out) { ++ repeat_skip++; ++ offset_in += 4 << 8; ++ } ++ ++ *phase = (offset_out - offset_in) >> 2; ++ ++ if (*phase > 0x100) ++ repeat_skip++; ++ ++ *phase = *phase & 0xff; ++ ++ if (repeat_skip > 5) ++ repeat_skip = 5; ++ ++ *repeat = skip_tab[repeat_skip]; ++} ++ ++static void meson_overlay_setup_scaler_params(struct meson_drm *priv, ++ struct drm_plane *plane, ++ bool interlace_mode) ++{ ++ struct drm_crtc_state *crtc_state = priv->crtc->state; ++ int video_top, video_left, video_width, video_height; ++ struct drm_plane_state *state = plane->state; ++ unsigned int vd_start_lines, vd_end_lines; ++ unsigned int hd_start_lines, hd_end_lines; ++ unsigned int crtc_height, crtc_width; ++ unsigned int vsc_startp, vsc_endp; ++ unsigned int hsc_startp, hsc_endp; ++ unsigned int crop_top, crop_left; ++ int vphase, vphase_repeat_skip; ++ unsigned int ratio_x, ratio_y; ++ int temp_height, temp_width; ++ unsigned int w_in, h_in; ++ int temp, start, end; ++ ++ if (!crtc_state) { ++ DRM_ERROR("Invalid crtc_state\n"); ++ return; ++ } ++ ++ crtc_height = crtc_state->mode.vdisplay; ++ crtc_width = crtc_state->mode.hdisplay; ++ ++ w_in = fixed16_to_int(state->src_w); ++ h_in = fixed16_to_int(state->src_h); ++ crop_top = fixed16_to_int(state->src_x); ++ crop_left = fixed16_to_int(state->src_x); ++ ++ video_top = state->crtc_y; ++ video_left = state->crtc_x; ++ video_width = state->crtc_w; ++ video_height = state->crtc_h; ++ ++ DRM_DEBUG("crtc_width %d crtc_height %d interlace %d\n", ++ crtc_width, crtc_height, interlace_mode); ++ DRM_DEBUG("w_in %d h_in %d crop_top %d crop_left %d\n", ++ w_in, h_in, crop_top, crop_left); ++ DRM_DEBUG("video top %d left %d width %d height %d\n", ++ video_top, video_left, video_width, video_height); ++ ++ ratio_x = (w_in << 18) / video_width; ++ ratio_y = (h_in << 18) / video_height; ++ ++ if (ratio_x * video_width < (w_in << 18)) ++ ratio_x++; ++ ++ DRM_DEBUG("ratio x 0x%x y 0x%x\n", ratio_x, ratio_y); ++ ++ meson_overlay_get_vertical_phase(ratio_y, &vphase, &vphase_repeat_skip, ++ interlace_mode); ++ ++ DRM_DEBUG("vphase 0x%x skip %d\n", vphase, vphase_repeat_skip); ++ ++ /* Vertical */ ++ ++ start = video_top + video_height / 2 - ((h_in << 17) / ratio_y); ++ end = (h_in << 18) / ratio_y + start - 1; ++ ++ if (video_top < 0 && start < 0) ++ vd_start_lines = (-(start) * ratio_y) >> 18; ++ else if (start < video_top) ++ vd_start_lines = ((video_top - start) * ratio_y) >> 18; ++ else ++ vd_start_lines = 0; ++ ++ if (video_top < 0) ++ temp_height = min_t(unsigned int, ++ video_top + video_height - 1, ++ crtc_height - 1); ++ else ++ temp_height = min_t(unsigned int, ++ video_top + video_height - 1, ++ crtc_height - 1) - video_top + 1; ++ ++ temp = vd_start_lines + (temp_height * ratio_y >> 18); ++ vd_end_lines = (temp <= (h_in - 1)) ? temp : (h_in - 1); ++ ++ vd_start_lines += crop_left; ++ vd_end_lines += crop_left; ++ ++ /* ++ * TOFIX: Input frames are handled and scaled like progressive frames, ++ * proper handling of interlaced field input frames need to be figured ++ * out using the proper framebuffer flags set by userspace. ++ */ ++ if (interlace_mode) { ++ start >>= 1; ++ end >>= 1; ++ } ++ ++ vsc_startp = max_t(int, start, ++ max_t(int, 0, video_top)); ++ vsc_endp = min_t(int, end, ++ min_t(int, crtc_height - 1, ++ video_top + video_height - 1)); ++ ++ DRM_DEBUG("vsc startp %d endp %d start_lines %d end_lines %d\n", ++ vsc_startp, vsc_endp, vd_start_lines, vd_end_lines); ++ ++ /* Horizontal */ ++ ++ start = video_left + video_width / 2 - ((w_in << 17) / ratio_x); ++ end = (w_in << 18) / ratio_x + start - 1; ++ ++ if (video_left < 0 && start < 0) ++ hd_start_lines = (-(start) * ratio_x) >> 18; ++ else if (start < video_left) ++ hd_start_lines = ((video_left - start) * ratio_x) >> 18; ++ else ++ hd_start_lines = 0; ++ ++ if (video_left < 0) ++ temp_width = min_t(unsigned int, ++ video_left + video_width - 1, ++ crtc_width - 1); ++ else ++ temp_width = min_t(unsigned int, ++ video_left + video_width - 1, ++ crtc_width - 1) - video_left + 1; ++ ++ temp = hd_start_lines + (temp_width * ratio_x >> 18); ++ hd_end_lines = (temp <= (w_in - 1)) ? temp : (w_in - 1); ++ ++ priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1; ++ hsc_startp = max_t(int, start, max_t(int, 0, video_left)); ++ hsc_endp = min_t(int, end, min_t(int, crtc_width - 1, ++ video_left + video_width - 1)); ++ ++ hd_start_lines += crop_top; ++ hd_end_lines += crop_top; ++ ++ DRM_DEBUG("hsc startp %d endp %d start_lines %d end_lines %d\n", ++ hsc_startp, hsc_endp, hd_start_lines, hd_end_lines); ++ ++ priv->viu.vpp_vsc_start_phase_step = ratio_y << 6; ++ ++ priv->viu.vpp_vsc_ini_phase = vphase << 8; ++ priv->viu.vpp_vsc_phase_ctrl = (1 << 13) | (4 << 8) | ++ vphase_repeat_skip; ++ ++ priv->viu.vd1_if0_luma_x0 = VD_X_START(hd_start_lines) | ++ VD_X_END(hd_end_lines); ++ priv->viu.vd1_if0_chroma_x0 = VD_X_START(hd_start_lines >> 1) | ++ VD_X_END(hd_end_lines >> 1); ++ ++ priv->viu.viu_vd1_fmt_w = ++ VD_H_WIDTH(hd_end_lines - hd_start_lines + 1) | ++ VD_V_WIDTH(hd_end_lines/2 - hd_start_lines/2 + 1); ++ ++ priv->viu.vd1_if0_luma_y0 = VD_Y_START(vd_start_lines) | ++ VD_Y_END(vd_end_lines); ++ ++ priv->viu.vd1_if0_chroma_y0 = VD_Y_START(vd_start_lines >> 1) | ++ VD_Y_END(vd_end_lines >> 1); ++ ++ priv->viu.vpp_pic_in_height = h_in; ++ ++ priv->viu.vpp_postblend_vd1_h_start_end = VD_H_START(hsc_startp) | ++ VD_H_END(hsc_endp); ++ priv->viu.vpp_blend_vd2_h_start_end = VD_H_START(hd_start_lines) | ++ VD_H_END(hd_end_lines); ++ priv->viu.vpp_hsc_region12_startp = VD_REGION13_END(0) | ++ VD_REGION24_START(hsc_startp); ++ priv->viu.vpp_hsc_region34_startp = ++ VD_REGION13_END(hsc_startp) | ++ VD_REGION24_START(hsc_endp - hsc_startp); ++ priv->viu.vpp_hsc_region4_endp = hsc_endp - hsc_startp; ++ priv->viu.vpp_hsc_start_phase_step = ratio_x << 6; ++ priv->viu.vpp_hsc_region1_phase_slope = 0; ++ priv->viu.vpp_hsc_region3_phase_slope = 0; ++ priv->viu.vpp_hsc_phase_ctrl = (1 << 21) | (4 << 16); ++ ++ priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1; ++ priv->viu.vpp_preblend_h_size = hd_end_lines - hd_start_lines + 1; ++ ++ priv->viu.vpp_postblend_vd1_v_start_end = VD_V_START(vsc_startp) | ++ VD_V_END(vsc_endp); ++ priv->viu.vpp_blend_vd2_v_start_end = ++ VD2_V_START((vd_end_lines + 1) >> 1) | ++ VD2_V_END(vd_end_lines); ++ ++ priv->viu.vpp_vsc_region12_startp = 0; ++ priv->viu.vpp_vsc_region34_startp = ++ VD_REGION13_END(vsc_endp - vsc_startp) | ++ VD_REGION24_START(vsc_endp - vsc_startp); ++ priv->viu.vpp_vsc_region4_endp = vsc_endp - vsc_startp; ++ priv->viu.vpp_vsc_start_phase_step = ratio_y << 6; ++} ++ ++static void meson_overlay_atomic_update(struct drm_plane *plane, ++ struct drm_plane_state *old_state) ++{ ++ struct meson_overlay *meson_overlay = to_meson_overlay(plane); ++ struct drm_plane_state *state = plane->state; ++ struct drm_framebuffer *fb = state->fb; ++ struct meson_drm *priv = meson_overlay->priv; ++ struct drm_gem_cma_object *gem; ++ unsigned long flags; ++ bool interlace_mode; ++ ++ DRM_DEBUG_DRIVER("\n"); ++ ++ /* Fallback is canvas provider is not available */ ++ if (!priv->canvas) { ++ priv->canvas_id_vd1_0 = MESON_CANVAS_ID_VD1_0; ++ priv->canvas_id_vd1_1 = MESON_CANVAS_ID_VD1_1; ++ priv->canvas_id_vd1_2 = MESON_CANVAS_ID_VD1_2; ++ } ++ ++ interlace_mode = state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE; ++ ++ spin_lock_irqsave(&priv->drm->event_lock, flags); ++ ++ priv->viu.vd1_if0_gen_reg = VD_URGENT_CHROMA | ++ VD_URGENT_LUMA | ++ VD_HOLD_LINES(9) | ++ VD_CHRO_RPT_LASTL_CTRL | ++ VD_ENABLE; ++ ++ /* Setup scaler params */ ++ meson_overlay_setup_scaler_params(priv, plane, interlace_mode); ++ ++ priv->viu.vd1_if0_repeat_loop = 0; ++ priv->viu.vd1_if0_luma0_rpt_pat = interlace_mode ? 8 : 0; ++ priv->viu.vd1_if0_chroma0_rpt_pat = interlace_mode ? 8 : 0; ++ priv->viu.vd1_range_map_y = 0; ++ priv->viu.vd1_range_map_cb = 0; ++ priv->viu.vd1_range_map_cr = 0; ++ ++ /* Default values for RGB888/YUV444 */ ++ priv->viu.vd1_if0_gen_reg2 = 0; ++ priv->viu.viu_vd1_fmt_ctrl = 0; ++ ++ switch (fb->format->format) { ++ /* TOFIX DRM_FORMAT_RGB888 should be supported */ ++ case DRM_FORMAT_YUYV: ++ priv->viu.vd1_if0_gen_reg |= VD_BYTES_PER_PIXEL(1); ++ priv->viu.vd1_if0_canvas0 = ++ CANVAS_ADDR2(priv->canvas_id_vd1_0) | ++ CANVAS_ADDR1(priv->canvas_id_vd1_0) | ++ CANVAS_ADDR0(priv->canvas_id_vd1_0); ++ priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(16) | /* /2 */ ++ VD_VERT_FMT_EN; ++ break; ++ case DRM_FORMAT_NV12: ++ case DRM_FORMAT_NV21: ++ priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN; ++ priv->viu.vd1_if0_canvas0 = ++ CANVAS_ADDR2(priv->canvas_id_vd1_1) | ++ CANVAS_ADDR1(priv->canvas_id_vd1_1) | ++ CANVAS_ADDR0(priv->canvas_id_vd1_0); ++ if (fb->format->format == DRM_FORMAT_NV12) ++ priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(1); ++ else ++ priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(2); ++ priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(8) | /* /4 */ ++ VD_VERT_FMT_EN; ++ break; ++ case DRM_FORMAT_YUV444: ++ case DRM_FORMAT_YUV422: ++ case DRM_FORMAT_YUV420: ++ case DRM_FORMAT_YUV411: ++ case DRM_FORMAT_YUV410: ++ priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN; ++ priv->viu.vd1_if0_canvas0 = ++ CANVAS_ADDR2(priv->canvas_id_vd1_2) | ++ CANVAS_ADDR1(priv->canvas_id_vd1_1) | ++ CANVAS_ADDR0(priv->canvas_id_vd1_0); ++ switch (fb->format->format) { ++ case DRM_FORMAT_YUV422: ++ priv->viu.viu_vd1_fmt_ctrl = ++ VD_HORZ_Y_C_RATIO(1) | /* /2 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(16) | /* /2 */ ++ VD_VERT_FMT_EN; ++ break; ++ case DRM_FORMAT_YUV420: ++ priv->viu.viu_vd1_fmt_ctrl = ++ VD_HORZ_Y_C_RATIO(1) | /* /2 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(8) | /* /4 */ ++ VD_VERT_FMT_EN; ++ break; ++ case DRM_FORMAT_YUV411: ++ priv->viu.viu_vd1_fmt_ctrl = ++ VD_HORZ_Y_C_RATIO(2) | /* /4 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(16) | /* /2 */ ++ VD_VERT_FMT_EN; ++ break; ++ case DRM_FORMAT_YUV410: ++ priv->viu.viu_vd1_fmt_ctrl = ++ VD_HORZ_Y_C_RATIO(2) | /* /4 */ ++ VD_HORZ_FMT_EN | ++ VD_VERT_RPT_LINE0 | ++ VD_VERT_INITIAL_PHASE(12) | ++ VD_VERT_PHASE_STEP(8) | /* /4 */ ++ VD_VERT_FMT_EN; ++ break; ++ } ++ break; ++ } ++ ++ /* Update Canvas with buffer address */ ++ priv->viu.vd1_planes = drm_format_num_planes(fb->format->format); ++ ++ switch (priv->viu.vd1_planes) { ++ case 3: ++ gem = drm_fb_cma_get_gem_obj(fb, 2); ++ priv->viu.vd1_addr2 = gem->paddr + fb->offsets[2]; ++ priv->viu.vd1_stride2 = fb->pitches[2]; ++ priv->viu.vd1_height2 = ++ drm_format_plane_height(fb->height, ++ fb->format->format, 2); ++ DRM_DEBUG("plane 2 addr 0x%x stride %d height %d\n", ++ priv->viu.vd1_addr2, ++ priv->viu.vd1_stride2, ++ priv->viu.vd1_height2); ++ /* fallthrough */ ++ case 2: ++ gem = drm_fb_cma_get_gem_obj(fb, 1); ++ priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1]; ++ priv->viu.vd1_stride1 = fb->pitches[1]; ++ priv->viu.vd1_height1 = ++ drm_format_plane_height(fb->height, ++ fb->format->format, 1); ++ DRM_DEBUG("plane 1 addr 0x%x stride %d height %d\n", ++ priv->viu.vd1_addr1, ++ priv->viu.vd1_stride1, ++ priv->viu.vd1_height1); ++ /* fallthrough */ ++ case 1: ++ gem = drm_fb_cma_get_gem_obj(fb, 0); ++ priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0]; ++ priv->viu.vd1_stride0 = fb->pitches[0]; ++ priv->viu.vd1_height0 = ++ drm_format_plane_height(fb->height, ++ fb->format->format, 0); ++ DRM_DEBUG("plane 0 addr 0x%x stride %d height %d\n", ++ priv->viu.vd1_addr0, ++ priv->viu.vd1_stride0, ++ priv->viu.vd1_height0); ++ } ++ ++ priv->viu.vd1_enabled = true; ++ ++ spin_unlock_irqrestore(&priv->drm->event_lock, flags); ++ ++ DRM_DEBUG_DRIVER("\n"); ++} ++ ++static void meson_overlay_atomic_disable(struct drm_plane *plane, ++ struct drm_plane_state *old_state) ++{ ++ struct meson_overlay *meson_overlay = to_meson_overlay(plane); ++ struct meson_drm *priv = meson_overlay->priv; ++ ++ DRM_DEBUG_DRIVER("\n"); ++ ++ priv->viu.vd1_enabled = false; ++ ++ /* Disable VD1 */ ++ writel_bits_relaxed(VPP_VD1_POSTBLEND | VPP_VD1_PREBLEND, 0, ++ priv->io_base + _REG(VPP_MISC)); ++ ++} ++ ++static const struct drm_plane_helper_funcs meson_overlay_helper_funcs = { ++ .atomic_check = meson_overlay_atomic_check, ++ .atomic_disable = meson_overlay_atomic_disable, ++ .atomic_update = meson_overlay_atomic_update, ++}; ++ ++static const struct drm_plane_funcs meson_overlay_funcs = { ++ .update_plane = drm_atomic_helper_update_plane, ++ .disable_plane = drm_atomic_helper_disable_plane, ++ .destroy = drm_plane_cleanup, ++ .reset = drm_atomic_helper_plane_reset, ++ .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, ++ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, ++}; ++ ++static const uint32_t supported_drm_formats[] = { ++ DRM_FORMAT_YUYV, ++ DRM_FORMAT_NV12, ++ DRM_FORMAT_NV21, ++ DRM_FORMAT_YUV444, ++ DRM_FORMAT_YUV422, ++ DRM_FORMAT_YUV420, ++ DRM_FORMAT_YUV411, ++ DRM_FORMAT_YUV410, ++}; ++ ++int meson_overlay_create(struct meson_drm *priv) ++{ ++ struct meson_overlay *meson_overlay; ++ struct drm_plane *plane; ++ ++ DRM_DEBUG_DRIVER("\n"); ++ ++ meson_overlay = devm_kzalloc(priv->drm->dev, sizeof(*meson_overlay), ++ GFP_KERNEL); ++ if (!meson_overlay) ++ return -ENOMEM; ++ ++ meson_overlay->priv = priv; ++ plane = &meson_overlay->base; ++ ++ drm_universal_plane_init(priv->drm, plane, 0xFF, ++ &meson_overlay_funcs, ++ supported_drm_formats, ++ ARRAY_SIZE(supported_drm_formats), ++ NULL, ++ DRM_PLANE_TYPE_OVERLAY, "meson_overlay_plane"); ++ ++ drm_plane_helper_add(plane, &meson_overlay_helper_funcs); ++ ++ priv->overlay_plane = plane; ++ ++ DRM_DEBUG_DRIVER("\n"); ++ ++ return 0; ++} +diff --git a/drivers/gpu/drm/meson/meson_overlay.h b/drivers/gpu/drm/meson/meson_overlay.h +new file mode 100644 +index 000000000000..dae24f5ac63d +--- /dev/null ++++ b/drivers/gpu/drm/meson/meson_overlay.h +@@ -0,0 +1,14 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#ifndef __MESON_OVERLAY_H ++#define __MESON_OVERLAY_H ++ ++#include "meson_drv.h" ++ ++int meson_overlay_create(struct meson_drm *priv); ++ ++#endif /* __MESON_OVERLAY_H */ +diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h +index bca87143e548..5c7e02c703bc 100644 +--- a/drivers/gpu/drm/meson/meson_registers.h ++++ b/drivers/gpu/drm/meson/meson_registers.h +@@ -286,6 +286,7 @@ + #define VIU_OSD1_MATRIX_COEF22_30 0x1a9d + #define VIU_OSD1_MATRIX_COEF31_32 0x1a9e + #define VIU_OSD1_MATRIX_COEF40_41 0x1a9f ++#define VD1_IF0_GEN_REG3 0x1aa7 + #define VIU_OSD1_EOTF_CTL 0x1ad4 + #define VIU_OSD1_EOTF_COEF00_01 0x1ad5 + #define VIU_OSD1_EOTF_COEF02_10 0x1ad6 +@@ -297,6 +298,7 @@ + #define VIU_OSD1_OETF_CTL 0x1adc + #define VIU_OSD1_OETF_LUT_ADDR_PORT 0x1add + #define VIU_OSD1_OETF_LUT_DATA_PORT 0x1ade ++#define AFBC_ENABLE 0x1ae0 + + /* vpp */ + #define VPP_DUMMY_DATA 0x1d00 +@@ -349,6 +351,7 @@ + #define VPP_VD2_PREBLEND BIT(15) + #define VPP_OSD1_PREBLEND BIT(16) + #define VPP_OSD2_PREBLEND BIT(17) ++#define VPP_COLOR_MNG_ENABLE BIT(28) + #define VPP_OFIFO_SIZE 0x1d27 + #define VPP_FIFO_STATUS 0x1d28 + #define VPP_SMOKE_CTRL 0x1d29 +diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c +index 26a0857878bf..90d9ae3c2b81 100644 +--- a/drivers/gpu/drm/meson/meson_viu.c ++++ b/drivers/gpu/drm/meson/meson_viu.c +@@ -329,6 +329,21 @@ void meson_viu_init(struct meson_drm *priv) + 0xff << OSD_REPLACE_SHIFT, + priv->io_base + _REG(VIU_OSD2_CTRL_STAT2)); + ++ /* Disable VD1 AFBC */ ++ /* di_mif0_en=0 mif0_to_vpp_en=0 di_mad_en=0 */ ++ writel_bits_relaxed(0x7 << 16, 0, ++ priv->io_base + _REG(VIU_MISC_CTRL0)); ++ /* afbc vd1 set=0 */ ++ writel_bits_relaxed(BIT(20), 0, ++ priv->io_base + _REG(VIU_MISC_CTRL0)); ++ writel_relaxed(0, priv->io_base + _REG(AFBC_ENABLE)); ++ ++ writel_relaxed(0x00FF00C0, ++ priv->io_base + _REG(VD1_IF0_LUMA_FIFO_SIZE)); ++ writel_relaxed(0x00FF00C0, ++ priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE)); ++ ++ + priv->viu.osd1_enabled = false; + priv->viu.osd1_commit = false; + priv->viu.osd1_interlace = false; +diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c +index 27356f81a0ab..5dc24a99e978 100644 +--- a/drivers/gpu/drm/meson/meson_vpp.c ++++ b/drivers/gpu/drm/meson/meson_vpp.c +@@ -122,6 +122,31 @@ static void meson_vpp_write_scaling_filter_coefs(struct meson_drm *priv, + priv->io_base + _REG(VPP_OSD_SCALE_COEF)); + } + ++static const uint32_t vpp_filter_coefs_bicubic[] = { ++ 0x00800000, 0x007f0100, 0xff7f0200, 0xfe7f0300, ++ 0xfd7e0500, 0xfc7e0600, 0xfb7d0800, 0xfb7c0900, ++ 0xfa7b0b00, 0xfa7a0dff, 0xf9790fff, 0xf97711ff, ++ 0xf87613ff, 0xf87416fe, 0xf87218fe, 0xf8701afe, ++ 0xf76f1dfd, 0xf76d1ffd, 0xf76b21fd, 0xf76824fd, ++ 0xf76627fc, 0xf76429fc, 0xf7612cfc, 0xf75f2ffb, ++ 0xf75d31fb, 0xf75a34fb, 0xf75837fa, 0xf7553afa, ++ 0xf8523cfa, 0xf8503ff9, 0xf84d42f9, 0xf84a45f9, ++ 0xf84848f8 ++}; ++ ++static void meson_vpp_write_vd_scaling_filter_coefs(struct meson_drm *priv, ++ const unsigned int *coefs, ++ bool is_horizontal) ++{ ++ int i; ++ ++ writel_relaxed(is_horizontal ? BIT(8) : 0, ++ priv->io_base + _REG(VPP_SCALE_COEF_IDX)); ++ for (i = 0; i < 33; i++) ++ writel_relaxed(coefs[i], ++ priv->io_base + _REG(VPP_SCALE_COEF)); ++} ++ + void meson_vpp_init(struct meson_drm *priv) + { + /* set dummy data default YUV black */ +@@ -150,17 +175,34 @@ void meson_vpp_init(struct meson_drm *priv) + + /* Force all planes off */ + writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND | +- VPP_VD1_POSTBLEND | VPP_VD2_POSTBLEND, 0, ++ VPP_VD1_POSTBLEND | VPP_VD2_POSTBLEND | ++ VPP_VD1_PREBLEND | VPP_VD2_PREBLEND, 0, + priv->io_base + _REG(VPP_MISC)); + ++ /* Setup default VD settings */ ++ writel_relaxed(4096, ++ priv->io_base + _REG(VPP_PREBLEND_VD1_H_START_END)); ++ writel_relaxed(4096, ++ priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); ++ + /* Disable Scalers */ + writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); + writel_relaxed(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); + writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); ++ writel_relaxed(4 | (4 << 8) | BIT(15), ++ priv->io_base + _REG(VPP_SC_MISC)); ++ ++ writel_relaxed(1, priv->io_base + _REG(VPP_VADJ_CTRL)); + + /* Write in the proper filter coefficients. */ + meson_vpp_write_scaling_filter_coefs(priv, + vpp_filter_coefs_4point_bspline, false); + meson_vpp_write_scaling_filter_coefs(priv, + vpp_filter_coefs_4point_bspline, true); ++ ++ /* Write the VD proper filter coefficients. */ ++ meson_vpp_write_vd_scaling_filter_coefs(priv, vpp_filter_coefs_bicubic, ++ false); ++ meson_vpp_write_vd_scaling_filter_coefs(priv, vpp_filter_coefs_bicubic, ++ true); + } +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch b/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch new file mode 100644 index 000000000..6c2736092 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch @@ -0,0 +1,200 @@ +From 1d7b86b1151ec8ad46c689138977c57053c99608 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 29 Oct 2018 17:04:05 +0100 +Subject: [PATCH 21/53] drm/meson: move OSD scaler management into plane atomic + update + +In preparation to support the Primary Plane scaling, move the basic +OSD Interlace-Only scaler setup code into the primary plane atomic +update callback and handle the vsync scaler update like the overlay +plane scaling registers update. +--- + drivers/gpu/drm/meson/meson_crtc.c | 35 ++++++++++++---------- + drivers/gpu/drm/meson/meson_drv.h | 10 +++++++ + drivers/gpu/drm/meson/meson_plane.c | 39 +++++++++++++++++++++++- + drivers/gpu/drm/meson/meson_vpp.c | 46 ----------------------------- + 4 files changed, 68 insertions(+), 62 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index b292e9aedf52..23df4abd95c9 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -195,21 +195,26 @@ void meson_crtc_irq(struct meson_drm *priv) + priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W3)); + writel_relaxed(priv->viu.osd1_blk0_cfg[4], + priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W4)); +- +- /* If output is interlace, make use of the Scaler */ +- if (priv->viu.osd1_interlace) { +- struct drm_plane *plane = priv->primary_plane; +- struct drm_plane_state *state = plane->state; +- struct drm_rect dest = { +- .x1 = state->crtc_x, +- .y1 = state->crtc_y, +- .x2 = state->crtc_x + state->crtc_w, +- .y2 = state->crtc_y + state->crtc_h, +- }; +- +- meson_vpp_setup_interlace_vscaler_osd1(priv, &dest); +- } else +- meson_vpp_disable_interlace_vscaler_osd1(priv); ++ writel_relaxed(priv->viu.osd_sc_ctrl0, ++ priv->io_base + _REG(VPP_OSD_SC_CTRL0)); ++ writel_relaxed(priv->viu.osd_sc_i_wh_m1, ++ priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); ++ writel_relaxed(priv->viu.osd_sc_o_h_start_end, ++ priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); ++ writel_relaxed(priv->viu.osd_sc_o_v_start_end, ++ priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); ++ writel_relaxed(priv->viu.osd_sc_v_ini_phase, ++ priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); ++ writel_relaxed(priv->viu.osd_sc_v_phase_step, ++ priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); ++ writel_relaxed(priv->viu.osd_sc_h_ini_phase, ++ priv->io_base + _REG(VPP_OSD_HSC_INI_PHASE)); ++ writel_relaxed(priv->viu.osd_sc_h_phase_step, ++ priv->io_base + _REG(VPP_OSD_HSC_PHASE_STEP)); ++ writel_relaxed(priv->viu.osd_sc_h_ctrl0, ++ priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); ++ writel_relaxed(priv->viu.osd_sc_v_ctrl0, ++ priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); + + if (priv->canvas) + meson_canvas_config(priv->canvas, priv->canvas_id_osd1, +diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h +index c971557d4a48..a955354711ce 100644 +--- a/drivers/gpu/drm/meson/meson_drv.h ++++ b/drivers/gpu/drm/meson/meson_drv.h +@@ -54,6 +54,16 @@ struct meson_drm { + uint32_t osd1_addr; + uint32_t osd1_stride; + uint32_t osd1_height; ++ uint32_t osd_sc_ctrl0; ++ uint32_t osd_sc_i_wh_m1; ++ uint32_t osd_sc_o_h_start_end; ++ uint32_t osd_sc_o_v_start_end; ++ uint32_t osd_sc_v_ini_phase; ++ uint32_t osd_sc_v_phase_step; ++ uint32_t osd_sc_h_ini_phase; ++ uint32_t osd_sc_h_phase_step; ++ uint32_t osd_sc_h_ctrl0; ++ uint32_t osd_sc_v_ctrl0; + + bool vd1_enabled; + bool vd1_commit; +diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c +index 51bec8e98a39..f915a79ae81c 100644 +--- a/drivers/gpu/drm/meson/meson_plane.c ++++ b/drivers/gpu/drm/meson/meson_plane.c +@@ -143,13 +143,50 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + break; + }; + ++ /* ++ * When the output is interlaced, the OSD must switch between ++ * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 ++ * at each vsync. ++ * But the vertical scaler can provide such funtionnality if ++ * is configured for 2:1 scaling with interlace options enabled. ++ */ + if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { + priv->viu.osd1_interlace = true; + + dest.y1 /= 2; + dest.y2 /= 2; +- } else ++ ++ priv->viu.osd_sc_ctrl0 = BIT(3)| /* Enable scaler */ ++ BIT(2); /* Select OSD1 */ ++ ++ /* 2:1 scaling */ ++ priv->viu.osd_sc_i_wh_m1 = ((drm_rect_width(&dest) - 1) << 16) | ++ (drm_rect_height(&dest) - 1); ++ priv->viu.osd_sc_o_h_start_end = (dest.x1 << 16) | dest.x2; ++ priv->viu.osd_sc_o_v_start_end = (dest.y1 << 16) | dest.y2; ++ ++ /* 2:1 vertical scaling values */ ++ priv->viu.osd_sc_v_ini_phase = BIT(16); ++ priv->viu.osd_sc_v_phase_step = BIT(25); ++ priv->viu.osd_sc_v_ctrl0 = ++ (4 << 0) | /* osd_vsc_bank_length */ ++ (4 << 3) | /* osd_vsc_top_ini_rcv_num0 */ ++ (1 << 8) | /* osd_vsc_top_rpt_p0_num0 */ ++ (6 << 11) | /* osd_vsc_bot_ini_rcv_num0 */ ++ (2 << 16) | /* osd_vsc_bot_rpt_p0_num0 */ ++ BIT(23) | /* osd_prog_interlace */ ++ BIT(24); /* Enable vertical scaler */ ++ ++ /* No horizontal scaling */ ++ priv->viu.osd_sc_h_ini_phase = 0; ++ priv->viu.osd_sc_h_phase_step = 0; ++ priv->viu.osd_sc_h_ctrl0 = 0; ++ } else { + priv->viu.osd1_interlace = false; ++ priv->viu.osd_sc_ctrl0 = 0; ++ priv->viu.osd_sc_h_ctrl0 = 0; ++ priv->viu.osd_sc_v_ctrl0 = 0; ++ } + + /* + * The format of these registers is (x2 << 16 | x1), +diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c +index 5dc24a99e978..f9efb431e953 100644 +--- a/drivers/gpu/drm/meson/meson_vpp.c ++++ b/drivers/gpu/drm/meson/meson_vpp.c +@@ -51,52 +51,6 @@ void meson_vpp_setup_mux(struct meson_drm *priv, unsigned int mux) + writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); + } + +-/* +- * When the output is interlaced, the OSD must switch between +- * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 +- * at each vsync. +- * But the vertical scaler can provide such funtionnality if +- * is configured for 2:1 scaling with interlace options enabled. +- */ +-void meson_vpp_setup_interlace_vscaler_osd1(struct meson_drm *priv, +- struct drm_rect *input) +-{ +- writel_relaxed(BIT(3) /* Enable scaler */ | +- BIT(2), /* Select OSD1 */ +- priv->io_base + _REG(VPP_OSD_SC_CTRL0)); +- +- writel_relaxed(((drm_rect_width(input) - 1) << 16) | +- (drm_rect_height(input) - 1), +- priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); +- /* 2:1 scaling */ +- writel_relaxed(((input->x1) << 16) | (input->x2), +- priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); +- writel_relaxed(((input->y1 >> 1) << 16) | (input->y2 >> 1), +- priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); +- +- /* 2:1 scaling values */ +- writel_relaxed(BIT(16), priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); +- writel_relaxed(BIT(25), priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); +- +- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); +- +- writel_relaxed((4 << 0) /* osd_vsc_bank_length */ | +- (4 << 3) /* osd_vsc_top_ini_rcv_num0 */ | +- (1 << 8) /* osd_vsc_top_rpt_p0_num0 */ | +- (6 << 11) /* osd_vsc_bot_ini_rcv_num0 */ | +- (2 << 16) /* osd_vsc_bot_rpt_p0_num0 */ | +- BIT(23) /* osd_prog_interlace */ | +- BIT(24), /* Enable vertical scaler */ +- priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); +-} +- +-void meson_vpp_disable_interlace_vscaler_osd1(struct meson_drm *priv) +-{ +- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); +- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); +- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); +-} +- + static unsigned int vpp_filter_coefs_4point_bspline[] = { + 0x15561500, 0x14561600, 0x13561700, 0x12561800, + 0x11551a00, 0x11541b00, 0x10541c00, 0x0f541d00, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch b/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch new file mode 100644 index 000000000..abbd87949 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch @@ -0,0 +1,287 @@ +From 166c3c3d19c030becc0c403cb638560d3165ff14 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Tue, 30 Oct 2018 14:29:10 +0100 +Subject: [PATCH 22/53] drm/meson: Add primary plane scaling + +This patch adds support for the Primary Plane scaling. + +On the Amlogic GX SoCs, the primary plane is used as On-Screen-Display +layer on top of video, and it's needed to keep the OSD layer to a lower +size as the physical display size to : +- lower the memory bandwidth +- lower the OSD rendering +- lower the memory usage + +This use-case is used when setting the display mode to 3840x2160 and the +OSD layer is rendered using the GPU. In this case, the GXBB & GXL cannot +work on more than 2000x2000 buffer, thus needing the OSD layer to be kept +at 1920x1080 and upscaled to 3840x2160 in hardware. + +The primary plane atomic check still allow 1:1 scaling, allowing native +3840x2160 if needed by user-space applications. +--- + drivers/gpu/drm/meson/meson_plane.c | 186 +++++++++++++++++++++------- + 1 file changed, 141 insertions(+), 45 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c +index f915a79ae81c..12a47b4f65a5 100644 +--- a/drivers/gpu/drm/meson/meson_plane.c ++++ b/drivers/gpu/drm/meson/meson_plane.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -39,12 +40,50 @@ + #include "meson_canvas.h" + #include "meson_registers.h" + ++/* OSD_SCI_WH_M1 */ ++#define SCI_WH_M1_W(w) FIELD_PREP(GENMASK(28, 16), w) ++#define SCI_WH_M1_H(h) FIELD_PREP(GENMASK(12, 0), h) ++ ++/* OSD_SCO_H_START_END */ ++/* OSD_SCO_V_START_END */ ++#define SCO_HV_START(start) FIELD_PREP(GENMASK(27, 16), start) ++#define SCO_HV_END(end) FIELD_PREP(GENMASK(11, 0), end) ++ ++/* OSD_SC_CTRL0 */ ++#define SC_CTRL0_PATH_EN BIT(3) ++#define SC_CTRL0_SEL_OSD1 BIT(2) ++ ++/* OSD_VSC_CTRL0 */ ++#define VSC_BANK_LEN(value) FIELD_PREP(GENMASK(2, 0), value) ++#define VSC_TOP_INI_RCV_NUM(value) FIELD_PREP(GENMASK(6, 3), value) ++#define VSC_TOP_RPT_L0_NUM(value) FIELD_PREP(GENMASK(9, 8), value) ++#define VSC_BOT_INI_RCV_NUM(value) FIELD_PREP(GENMASK(14, 11), value) ++#define VSC_BOT_RPT_L0_NUM(value) FIELD_PREP(GENMASK(17, 16), value) ++#define VSC_PROG_INTERLACE BIT(23) ++#define VSC_VERTICAL_SCALER_EN BIT(24) ++ ++/* OSD_VSC_INI_PHASE */ ++#define VSC_INI_PHASE_BOT(bottom) FIELD_PREP(GENMASK(31, 16), bottom) ++#define VSC_INI_PHASE_TOP(top) FIELD_PREP(GENMASK(15, 0), top) ++ ++/* OSD_HSC_CTRL0 */ ++#define HSC_BANK_LENGTH(value) FIELD_PREP(GENMASK(2, 0), value) ++#define HSC_INI_RCV_NUM0(value) FIELD_PREP(GENMASK(6, 3), value) ++#define HSC_RPT_P0_NUM0(value) FIELD_PREP(GENMASK(9, 8), value) ++#define HSC_HORIZ_SCALER_EN BIT(22) ++ ++/* VPP_OSD_VSC_PHASE_STEP */ ++/* VPP_OSD_HSC_PHASE_STEP */ ++#define SC_PHASE_STEP(value) FIELD_PREP(GENMASK(27, 0), value) ++ + struct meson_plane { + struct drm_plane base; + struct meson_drm *priv; + }; + #define to_meson_plane(x) container_of(x, struct meson_plane, base) + ++#define FRAC_16_16(mult, div) (((mult) << 16) / (div)) ++ + static int meson_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state) + { +@@ -57,10 +96,15 @@ static int meson_plane_atomic_check(struct drm_plane *plane, + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + ++ /* ++ * Only allow : ++ * - Upscaling up to 5x, vertical and horizontal ++ * - Final coordinates must match crtc size ++ */ + return drm_atomic_helper_check_plane_state(state, crtc_state, ++ FRAC_16_16(1, 5), + DRM_PLANE_HELPER_NO_SCALING, +- DRM_PLANE_HELPER_NO_SCALING, +- true, true); ++ false, true); + } + + /* Takes a fixed 16.16 number and converts it to integer. */ +@@ -74,22 +118,19 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + { + struct meson_plane *meson_plane = to_meson_plane(plane); + struct drm_plane_state *state = plane->state; +- struct drm_framebuffer *fb = state->fb; ++ struct drm_rect dest = drm_plane_state_dest(state); + struct meson_drm *priv = meson_plane->priv; ++ struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *gem; +- struct drm_rect src = { +- .x1 = (state->src_x), +- .y1 = (state->src_y), +- .x2 = (state->src_x + state->src_w), +- .y2 = (state->src_y + state->src_h), +- }; +- struct drm_rect dest = { +- .x1 = state->crtc_x, +- .y1 = state->crtc_y, +- .x2 = state->crtc_x + state->crtc_w, +- .y2 = state->crtc_y + state->crtc_h, +- }; + unsigned long flags; ++ int vsc_ini_rcv_num, vsc_ini_rpt_p0_num; ++ int vsc_bot_rcv_num, vsc_bot_rpt_p0_num; ++ int hsc_ini_rcv_num, hsc_ini_rpt_p0_num; ++ int hf_phase_step, vf_phase_step; ++ int src_w, src_h, dst_w, dst_h; ++ int bot_ini_phase; ++ int hf_bank_len; ++ int vf_bank_len; + u8 canvas_id_osd1; + + /* +@@ -143,6 +184,27 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + break; + }; + ++ /* Default scaler parameters */ ++ vsc_bot_rcv_num = 0; ++ vsc_bot_rpt_p0_num = 0; ++ hf_bank_len = 4; ++ vf_bank_len = 4; ++ ++ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { ++ vsc_bot_rcv_num = 6; ++ vsc_bot_rpt_p0_num = 2; ++ } ++ ++ hsc_ini_rcv_num = hf_bank_len; ++ vsc_ini_rcv_num = vf_bank_len; ++ hsc_ini_rpt_p0_num = (hf_bank_len / 2) - 1; ++ vsc_ini_rpt_p0_num = (vf_bank_len / 2) - 1; ++ ++ src_w = fixed16_to_int(state->src_w); ++ src_h = fixed16_to_int(state->src_h); ++ dst_w = state->crtc_w; ++ dst_h = state->crtc_h; ++ + /* + * When the output is interlaced, the OSD must switch between + * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 +@@ -151,41 +213,73 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + * is configured for 2:1 scaling with interlace options enabled. + */ + if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { +- priv->viu.osd1_interlace = true; +- + dest.y1 /= 2; + dest.y2 /= 2; ++ dst_h /= 2; ++ } + +- priv->viu.osd_sc_ctrl0 = BIT(3)| /* Enable scaler */ +- BIT(2); /* Select OSD1 */ ++ hf_phase_step = ((src_w << 18) / dst_w) << 6; ++ vf_phase_step = (src_h << 20) / dst_h; + +- /* 2:1 scaling */ +- priv->viu.osd_sc_i_wh_m1 = ((drm_rect_width(&dest) - 1) << 16) | +- (drm_rect_height(&dest) - 1); +- priv->viu.osd_sc_o_h_start_end = (dest.x1 << 16) | dest.x2; +- priv->viu.osd_sc_o_v_start_end = (dest.y1 << 16) | dest.y2; ++ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) ++ bot_ini_phase = ((vf_phase_step / 2) >> 4); ++ else ++ bot_ini_phase = 0; ++ ++ vf_phase_step = (vf_phase_step << 4); ++ ++ /* In interlaced mode, scaler is always active */ ++ if (src_h != dst_h || src_w != dst_w) { ++ priv->viu.osd_sc_i_wh_m1 = SCI_WH_M1_W(src_w - 1) | ++ SCI_WH_M1_H(src_h - 1); ++ priv->viu.osd_sc_o_h_start_end = SCO_HV_START(dest.x1) | ++ SCO_HV_END(dest.x2 - 1); ++ priv->viu.osd_sc_o_v_start_end = SCO_HV_START(dest.y1) | ++ SCO_HV_END(dest.y2 - 1); ++ /* Enable OSD Scaler */ ++ priv->viu.osd_sc_ctrl0 = SC_CTRL0_PATH_EN | SC_CTRL0_SEL_OSD1; ++ } else { ++ priv->viu.osd_sc_i_wh_m1 = 0; ++ priv->viu.osd_sc_o_h_start_end = 0; ++ priv->viu.osd_sc_o_v_start_end = 0; ++ priv->viu.osd_sc_ctrl0 = 0; ++ } + +- /* 2:1 vertical scaling values */ +- priv->viu.osd_sc_v_ini_phase = BIT(16); +- priv->viu.osd_sc_v_phase_step = BIT(25); ++ /* In interlaced mode, vertical scaler is always active */ ++ if (src_h != dst_h) { + priv->viu.osd_sc_v_ctrl0 = +- (4 << 0) | /* osd_vsc_bank_length */ +- (4 << 3) | /* osd_vsc_top_ini_rcv_num0 */ +- (1 << 8) | /* osd_vsc_top_rpt_p0_num0 */ +- (6 << 11) | /* osd_vsc_bot_ini_rcv_num0 */ +- (2 << 16) | /* osd_vsc_bot_rpt_p0_num0 */ +- BIT(23) | /* osd_prog_interlace */ +- BIT(24); /* Enable vertical scaler */ +- +- /* No horizontal scaling */ ++ VSC_BANK_LEN(vf_bank_len) | ++ VSC_TOP_INI_RCV_NUM(vsc_ini_rcv_num) | ++ VSC_TOP_RPT_L0_NUM(vsc_ini_rpt_p0_num) | ++ VSC_VERTICAL_SCALER_EN; ++ ++ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) ++ priv->viu.osd_sc_v_ctrl0 |= ++ VSC_BOT_INI_RCV_NUM(vsc_bot_rcv_num) | ++ VSC_BOT_RPT_L0_NUM(vsc_bot_rpt_p0_num) | ++ VSC_PROG_INTERLACE; ++ ++ priv->viu.osd_sc_v_phase_step = SC_PHASE_STEP(vf_phase_step); ++ priv->viu.osd_sc_v_ini_phase = VSC_INI_PHASE_BOT(bot_ini_phase); ++ } else { ++ priv->viu.osd_sc_v_ctrl0 = 0; ++ priv->viu.osd_sc_v_phase_step = 0; ++ priv->viu.osd_sc_v_ini_phase = 0; ++ } ++ ++ /* Horizontal scaler is only used if width does not match */ ++ if (src_w != dst_w) { ++ priv->viu.osd_sc_h_ctrl0 = ++ HSC_BANK_LENGTH(hf_bank_len) | ++ HSC_INI_RCV_NUM0(hsc_ini_rcv_num) | ++ HSC_RPT_P0_NUM0(hsc_ini_rpt_p0_num) | ++ HSC_HORIZ_SCALER_EN; ++ priv->viu.osd_sc_h_phase_step = SC_PHASE_STEP(hf_phase_step); + priv->viu.osd_sc_h_ini_phase = 0; +- priv->viu.osd_sc_h_phase_step = 0; +- priv->viu.osd_sc_h_ctrl0 = 0; + } else { +- priv->viu.osd1_interlace = false; +- priv->viu.osd_sc_ctrl0 = 0; + priv->viu.osd_sc_h_ctrl0 = 0; +- priv->viu.osd_sc_v_ctrl0 = 0; ++ priv->viu.osd_sc_h_phase_step = 0; ++ priv->viu.osd_sc_h_ini_phase = 0; + } + + /* +@@ -193,10 +287,12 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + * where x2 is exclusive. + * e.g. +30x1920 would be (1919 << 16) | 30 + */ +- priv->viu.osd1_blk0_cfg[1] = ((fixed16_to_int(src.x2) - 1) << 16) | +- fixed16_to_int(src.x1); +- priv->viu.osd1_blk0_cfg[2] = ((fixed16_to_int(src.y2) - 1) << 16) | +- fixed16_to_int(src.y1); ++ priv->viu.osd1_blk0_cfg[1] = ++ ((fixed16_to_int(state->src.x2) - 1) << 16) | ++ fixed16_to_int(state->src.x1); ++ priv->viu.osd1_blk0_cfg[2] = ++ ((fixed16_to_int(state->src.y2) - 1) << 16) | ++ fixed16_to_int(state->src.y1); + priv->viu.osd1_blk0_cfg[3] = ((dest.x2 - 1) << 16) | dest.x1; + priv->viu.osd1_blk0_cfg[4] = ((dest.y2 - 1) << 16) | dest.y1; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch b/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch new file mode 100644 index 000000000..6440a08d4 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch @@ -0,0 +1,57 @@ +From 47a84b0f881a1e52f95b4b31cf7ca01a88b469d4 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 7 Nov 2018 11:34:47 +0100 +Subject: [PATCH 23/53] pinctrl: meson-gxl: remove invalid GPIOX tsin_a pins + +The GPIOX tsin_a pins wrongly uses the SDCard pinctrl bits, this +patch completely removes these pins entries until we find out what +are the correct bits and registers to be used instead. + +Fixes: 5a6ae9b80139 ("pinctrl: meson-gxl: add tsin_a pins") +--- + drivers/pinctrl/meson/pinctrl-meson-gxl.c | 12 ++---------- + 1 file changed, 2 insertions(+), 10 deletions(-) + +diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c +index 158f618f1695..0c0a5018102b 100644 +--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c +@@ -239,13 +239,9 @@ static const unsigned int eth_link_led_pins[] = { GPIOZ_14 }; + static const unsigned int eth_act_led_pins[] = { GPIOZ_15 }; + + static const unsigned int tsin_a_d0_pins[] = { GPIODV_0 }; +-static const unsigned int tsin_a_d0_x_pins[] = { GPIOX_10 }; + static const unsigned int tsin_a_clk_pins[] = { GPIODV_8 }; +-static const unsigned int tsin_a_clk_x_pins[] = { GPIOX_11 }; + static const unsigned int tsin_a_sop_pins[] = { GPIODV_9 }; +-static const unsigned int tsin_a_sop_x_pins[] = { GPIOX_8 }; + static const unsigned int tsin_a_d_valid_pins[] = { GPIODV_10 }; +-static const unsigned int tsin_a_d_valid_x_pins[] = { GPIOX_9 }; + static const unsigned int tsin_a_fail_pins[] = { GPIODV_11 }; + static const unsigned int tsin_a_dp_pins[] = { + GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7, +@@ -432,10 +428,6 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = { + GROUP(spi_miso, 5, 2), + GROUP(spi_ss0, 5, 1), + GROUP(spi_sclk, 5, 0), +- GROUP(tsin_a_sop_x, 6, 3), +- GROUP(tsin_a_d_valid_x, 6, 2), +- GROUP(tsin_a_d0_x, 6, 1), +- GROUP(tsin_a_clk_x, 6, 0), + + /* Bank Z */ + GROUP(eth_mdio, 4, 23), +@@ -698,8 +690,8 @@ static const char * const eth_led_groups[] = { + }; + + static const char * const tsin_a_groups[] = { +- "tsin_a_clk", "tsin_a_clk_x", "tsin_a_sop", "tsin_a_sop_x", +- "tsin_a_d_valid", "tsin_a_d_valid_x", "tsin_a_d0", "tsin_a_d0_x", ++ "tsin_a_clk", "tsin_a_sop", ++ "tsin_a_d_valid", "tsin_a_d0", + "tsin_a_dp", "tsin_a_fail", + }; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch b/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch new file mode 100644 index 000000000..8cacd82b9 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch @@ -0,0 +1,82 @@ +From 0e580116d8afa1dcab823eb31ca415c4714bf48a Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 8 Nov 2018 14:24:38 +0100 +Subject: [PATCH 24/53] arm64: dts: meson-gx: Add hdmi_5v regulator as hdmi tx + supply + +The hdmi_5v regulator must be enabled to provide power to the physical HDMI +PHY and enables the HDMI 5V presence loopback for the monitor. + +Fixes: b409f625a6d5 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards") +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 1 + + 5 files changed, 5 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index fb9ad6faa745..774f8afd2c65 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -166,6 +166,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index f053595ebdc4..e5ef9b0b91c1 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -119,6 +119,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index f56969efffba..ca0228e0d585 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -200,6 +200,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +index f8c66a7972b3..29c9837bd7ea 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +@@ -96,6 +96,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +index 4fbfa5a850cc..fe8e726a4210 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -312,6 +312,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch b/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch new file mode 100644 index 000000000..83123dea1 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch @@ -0,0 +1,41 @@ +From 15611dee35c448dd0409a1e06a4f87f0dbf59876 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 7 Nov 2018 11:45:47 +0100 +Subject: [PATCH 25/53] arm64: dts: meson-gxl-libretech-cc: fix GPIO lines + names + +The gpio line names were set in the pinctrl node instead of the gpio node, +at the time it was merged, it worked, but was obviously wrong. +This patch moves the properties to the gpio nodes. + +Fixes: 47884c5c746e ("ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names") +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index ca0228e0d585..bb2a8c750589 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -209,7 +209,7 @@ + }; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", + "UART RX", + "Blue LED", +@@ -224,7 +224,7 @@ + "7J1 Header Pin15"; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch new file mode 100644 index 000000000..6bcde2948 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch @@ -0,0 +1,40 @@ +From 706947bf855b187bbd8d8b5786b38e84e571ca9b Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 7 Nov 2018 11:45:48 +0100 +Subject: [PATCH 26/53] arm64: dts: meson-gxbb-nanopi-k2: fix GPIO lines names + +The gpio line names were set in the pinctrl node instead of the gpio node, +at the time it was merged, it worked, but was obviously wrong. +This patch moves the properties to the gpio nodes. + +Fixes: 12ada0513d7a ("ARM64: dts: meson-gxbb-nanopi-k2: Add GPIO lines names") +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +index 5b10de9a0bad..8ea5ed5a1c62 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +@@ -236,7 +236,7 @@ + pinctrl-names = "default"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In", + "VCCK En", "CON1 Header Pin31", + "I2S Header Pin6", "IR In", "I2S Header Pin7", +@@ -246,7 +246,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", + "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch new file mode 100644 index 000000000..4da4c22f9 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch @@ -0,0 +1,40 @@ +From 62b3002dc67232b0a8cc5f51a5df991a48f062c7 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 7 Nov 2018 11:45:49 +0100 +Subject: [PATCH 27/53] arm64: dts: meson-gxbb-odroidc2: fix GPIO lines names + +The gpio line names were set in the pinctrl node instead of the gpio node, +at the time it was merged, it worked, but was obviously wrong. +This patch moves the properties to the gpio nodes. + +Fixes: b03c7d6438bb ("ARM64: dts: meson-gxbb-odroidc2: Add GPIO lines names") +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index 3da33090b8fe..73cc80143c04 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -232,7 +232,7 @@ + pinctrl-names = "default"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", + "USB HUB nRESET", "USB OTG Power En", + "J7 Header Pin2", "IR In", "J7 Header Pin4", +@@ -242,7 +242,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", + "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch new file mode 100644 index 000000000..e6ad08950 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch @@ -0,0 +1,40 @@ +From db194607c28989a307f60f2fd89a4996b6ae4f02 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 7 Nov 2018 11:45:50 +0100 +Subject: [PATCH 28/53] arm64: dts: meson-gxl-khadas-vim: fix GPIO lines names + +The gpio line names were set in the pinctrl node instead of the gpio node, +at the time it was merged, it worked, but was obviously wrong. +This patch moves the properties to the gpio nodes. + +Fixes: 60795933b709 ("ARM64: dts: meson-gxl-khadas-vim: Add GPIO lines names") +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index e5ef9b0b91c1..1a4b3f3b8ace 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -158,7 +158,7 @@ + linux,rc-map-name = "rc-geekbox"; + }; + +-&pinctrl_aobus { ++&gpio_ao { + gpio-line-names = "UART TX", + "UART RX", + "Power Key In", +@@ -173,7 +173,7 @@ + ""; + }; + +-&pinctrl_periphs { ++&gpio { + gpio-line-names = /* Bank GPIOZ */ + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch b/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch new file mode 100644 index 000000000..1ee57824d --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch @@ -0,0 +1,330 @@ +From b63cbf7b44a26e219c55da750662e1d0ae9f565b Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Tue, 6 Nov 2018 11:54:35 +0100 +Subject: [PATCH 29/53] drm/meson: Add support for VIC alternate timings + +This change is an attempt to handle the alternate clock for the CEA mode. +60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC +DRM Driver pixel clock generation. + +The actual clock generation will be moved to the Common Clock framework once +all the video clock are handled by the Amlogic Meson SoC clock driver, +then these alternate timings will be handled in the same time in a cleaner +fashion. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 12 +-- + drivers/gpu/drm/meson/meson_vclk.c | 127 +++++++++++++++++--------- + drivers/gpu/drm/meson/meson_vclk.h | 2 + + 3 files changed, 89 insertions(+), 52 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 2cb2ad26d716..807111ebfdd9 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -594,17 +594,7 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + dev_dbg(connector->dev->dev, "%s: vclk:%d venc=%d hdmi=%d\n", __func__, + vclk_freq, venc_freq, hdmi_freq); + +- /* Finally filter by configurable vclk frequencies for VIC modes */ +- switch (vclk_freq) { +- case 54000: +- case 74250: +- case 148500: +- case 297000: +- case 594000: +- return MODE_OK; +- } +- +- return MODE_CLOCK_RANGE; ++ return meson_vclk_vic_supported_freq(vclk_freq); + } + + /* Encoder */ +diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c +index ae5473257f72..5acccebd026d 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.c ++++ b/drivers/gpu/drm/meson/meson_vclk.c +@@ -117,6 +117,8 @@ + #define HDMI_PLL_RESET BIT(28) + #define HDMI_PLL_LOCK BIT(31) + ++#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001) ++ + /* VID PLL Dividers */ + enum { + VID_PLL_DIV_1 = 0, +@@ -323,7 +325,7 @@ static void meson_venci_cvbs_clock_config(struct meson_drm *priv) + enum { + /* PLL O1 O2 O3 VP DV EN TX */ + /* 4320 /4 /4 /1 /5 /1 => /2 /2 */ +- MESON_VCLK_HDMI_ENCI_54000 = 1, ++ MESON_VCLK_HDMI_ENCI_54000 = 0, + /* 4320 /4 /4 /1 /5 /1 => /1 /2 */ + MESON_VCLK_HDMI_DDR_54000, + /* 2970 /4 /1 /1 /5 /1 => /1 /2 */ +@@ -339,6 +341,7 @@ enum { + }; + + struct meson_vclk_params { ++ unsigned int pixel_freq; + unsigned int pll_base_freq; + unsigned int pll_od1; + unsigned int pll_od2; +@@ -347,6 +350,7 @@ struct meson_vclk_params { + unsigned int vclk_div; + } params[] = { + [MESON_VCLK_HDMI_ENCI_54000] = { ++ .pixel_freq = 54000, + .pll_base_freq = 4320000, + .pll_od1 = 4, + .pll_od2 = 4, +@@ -355,6 +359,7 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_DDR_54000] = { ++ .pixel_freq = 54000, + .pll_base_freq = 4320000, + .pll_od1 = 4, + .pll_od2 = 4, +@@ -363,6 +368,7 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_DDR_148500] = { ++ .pixel_freq = 148500, + .pll_base_freq = 2970000, + .pll_od1 = 4, + .pll_od2 = 1, +@@ -371,6 +377,7 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_74250] = { ++ .pixel_freq = 74250, + .pll_base_freq = 2970000, + .pll_od1 = 2, + .pll_od2 = 2, +@@ -379,6 +386,7 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_148500] = { ++ .pixel_freq = 148500, + .pll_base_freq = 2970000, + .pll_od1 = 1, + .pll_od2 = 2, +@@ -387,6 +395,7 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_297000] = { ++ .pixel_freq = 297000, + .pll_base_freq = 2970000, + .pll_od1 = 1, + .pll_od2 = 1, +@@ -395,6 +404,7 @@ struct meson_vclk_params { + .vclk_div = 2, + }, + [MESON_VCLK_HDMI_594000] = { ++ .pixel_freq = 594000, + .pll_base_freq = 5940000, + .pll_od1 = 1, + .pll_od2 = 1, +@@ -402,6 +412,7 @@ struct meson_vclk_params { + .vid_pll_div = VID_PLL_DIV_5, + .vclk_div = 1, + }, ++ { /* sentinel */ }, + }; + + static inline unsigned int pll_od_to_reg(unsigned int od) +@@ -626,12 +637,37 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, + pll_freq); + } + ++enum drm_mode_status ++meson_vclk_vic_supported_freq(unsigned int freq) ++{ ++ int i; ++ ++ DRM_DEBUG_DRIVER("freq = %d\n", freq); ++ ++ for (i = 0 ; params[i].pixel_freq ; ++i) { ++ DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n", ++ i, params[i].pixel_freq, ++ FREQ_1000_1001(params[i].pixel_freq)); ++ /* Match strict frequency */ ++ if (freq == params[i].pixel_freq) ++ return MODE_OK; ++ /* Match 1000/1001 variant */ ++ if (freq == FREQ_1000_1001(params[i].pixel_freq)) ++ return MODE_OK; ++ } ++ ++ return MODE_CLOCK_RANGE; ++} ++EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq); ++ + static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, + unsigned int od1, unsigned int od2, unsigned int od3, + unsigned int vid_pll_div, unsigned int vclk_div, + unsigned int hdmi_tx_div, unsigned int venc_div, +- bool hdmi_use_enci) ++ bool hdmi_use_enci, bool vic_alternate_clock) + { ++ unsigned int m, frac; ++ + /* Set HDMI-TX sys clock */ + regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, + CTS_HDMI_SYS_SEL_MASK, 0); +@@ -646,34 +682,38 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, + } else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxbb-vpu")) { + switch (pll_base_freq) { + case 2970000: +- meson_hdmi_pll_set_params(priv, 0x3d, 0xe00, +- od1, od2, od3); ++ m = 0x3d; ++ frac = vic_alternate_clock ? 0xd02 : 0xe00; + break; + case 4320000: +- meson_hdmi_pll_set_params(priv, 0x5a, 0, +- od1, od2, od3); ++ m = vic_alternate_clock ? 0x59 : 0x5a; ++ frac = vic_alternate_clock ? 0xe8f : 0; + break; + case 5940000: +- meson_hdmi_pll_set_params(priv, 0x7b, 0xc00, +- od1, od2, od3); ++ m = 0x7b; ++ frac = vic_alternate_clock ? 0xa05 : 0xc00; + break; + } ++ ++ meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); + } else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") || + meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) { + switch (pll_base_freq) { + case 2970000: +- meson_hdmi_pll_set_params(priv, 0x7b, 0x300, +- od1, od2, od3); ++ m = 0x7b; ++ frac = vic_alternate_clock ? 0x281 : 0x300; + break; + case 4320000: +- meson_hdmi_pll_set_params(priv, 0xb4, 0, +- od1, od2, od3); ++ m = vic_alternate_clock ? 0xb3 : 0xb4; ++ frac = vic_alternate_clock ? 0x347 : 0; + break; + case 5940000: +- meson_hdmi_pll_set_params(priv, 0xf7, 0x200, +- od1, od2, od3); ++ m = 0xf7; ++ frac = vic_alternate_clock ? 0x102 : 0x200; + break; + } ++ ++ meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); + } + + /* Setup vid_pll divider */ +@@ -826,6 +866,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + unsigned int vclk_freq, unsigned int venc_freq, + unsigned int dac_freq, bool hdmi_use_enci) + { ++ bool vic_alternate_clock = false; + unsigned int freq; + unsigned int hdmi_tx_div; + unsigned int venc_div; +@@ -843,7 +884,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + * - encp encoder + */ + meson_vclk_set(priv, vclk_freq * 10, 0, 0, 0, +- VID_PLL_DIV_5, 2, 1, 1, false); ++ VID_PLL_DIV_5, 2, 1, 1, false, false); + return; + } + +@@ -863,31 +904,35 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + return; + } + +- switch (vclk_freq) { +- case 54000: +- if (hdmi_use_enci) +- freq = MESON_VCLK_HDMI_ENCI_54000; +- else +- freq = MESON_VCLK_HDMI_DDR_54000; +- break; +- case 74250: +- freq = MESON_VCLK_HDMI_74250; +- break; +- case 148500: +- if (dac_freq != 148500) +- freq = MESON_VCLK_HDMI_DDR_148500; +- else +- freq = MESON_VCLK_HDMI_148500; +- break; +- case 297000: +- freq = MESON_VCLK_HDMI_297000; +- break; +- case 594000: +- freq = MESON_VCLK_HDMI_594000; +- break; +- default: +- pr_err("Fatal Error, invalid HDMI vclk freq %d\n", +- vclk_freq); ++ for (freq = 0 ; params[freq].pixel_freq ; ++freq) { ++ if (vclk_freq == params[freq].pixel_freq || ++ vclk_freq == FREQ_1000_1001(params[freq].pixel_freq)) { ++ if (vclk_freq != params[freq].pixel_freq) ++ vic_alternate_clock = true; ++ else ++ vic_alternate_clock = false; ++ ++ if (freq == MESON_VCLK_HDMI_ENCI_54000 && ++ !hdmi_use_enci) ++ continue; ++ ++ if (freq == MESON_VCLK_HDMI_DDR_54000 && ++ hdmi_use_enci) ++ continue; ++ ++ if (freq == MESON_VCLK_HDMI_DDR_148500 && ++ dac_freq == vclk_freq) ++ continue; ++ ++ if (freq == MESON_VCLK_HDMI_148500 && ++ dac_freq != vclk_freq) ++ continue; ++ break; ++ } ++ } ++ ++ if (!params[freq].pixel_freq) { ++ pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq); + return; + } + +@@ -895,6 +940,6 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + params[freq].pll_od1, params[freq].pll_od2, + params[freq].pll_od3, params[freq].vid_pll_div, + params[freq].vclk_div, hdmi_tx_div, venc_div, +- hdmi_use_enci); ++ hdmi_use_enci, vic_alternate_clock); + } + EXPORT_SYMBOL_GPL(meson_vclk_setup); +diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h +index 869fa3a3073e..4bd8752da02a 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.h ++++ b/drivers/gpu/drm/meson/meson_vclk.h +@@ -32,6 +32,8 @@ enum { + + enum drm_mode_status + meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); ++enum drm_mode_status ++meson_vclk_vic_supported_freq(unsigned int freq); + + void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + unsigned int vclk_freq, unsigned int venc_freq, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch new file mode 100644 index 000000000..1299b91c3 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch @@ -0,0 +1,2971 @@ +From 21a5d2da6ccf31ae511ea34c073f3218141b7a92 Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 29 Aug 2018 15:17:22 +0200 +Subject: [PATCH 30/53] media: meson: add v4l2 m2m video decoder driver + +Amlogic SoCs feature a powerful video decoder unit able to +decode many formats, with a performance of usually up to 4k60. + +This is a driver for this IP that is based around the v4l2 m2m framework. + +It features decoding for: +- MPEG 1 +- MPEG 2 + +Supported SoCs are: GXBB (S905), GXL (S905X/W/D), GXM (S912) + +There is also a hardware bitstream parser (ESPARSER) that is handled here. + +Signed-off-by: Maxime Jourdan +--- + drivers/media/platform/Kconfig | 10 + + drivers/media/platform/meson/Makefile | 1 + + drivers/media/platform/meson/vdec/Makefile | 8 + + .../media/platform/meson/vdec/codec_mpeg12.c | 209 ++++ + .../media/platform/meson/vdec/codec_mpeg12.h | 14 + + drivers/media/platform/meson/vdec/dos_regs.h | 98 ++ + drivers/media/platform/meson/vdec/esparser.c | 322 +++++ + drivers/media/platform/meson/vdec/esparser.h | 32 + + drivers/media/platform/meson/vdec/vdec.c | 1034 +++++++++++++++++ + drivers/media/platform/meson/vdec/vdec.h | 251 ++++ + drivers/media/platform/meson/vdec/vdec_1.c | 231 ++++ + drivers/media/platform/meson/vdec/vdec_1.h | 14 + + .../media/platform/meson/vdec/vdec_helpers.c | 412 +++++++ + .../media/platform/meson/vdec/vdec_helpers.h | 48 + + .../media/platform/meson/vdec/vdec_platform.c | 101 ++ + .../media/platform/meson/vdec/vdec_platform.h | 30 + + 16 files changed, 2815 insertions(+) + create mode 100644 drivers/media/platform/meson/vdec/Makefile + create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg12.c + create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg12.h + create mode 100644 drivers/media/platform/meson/vdec/dos_regs.h + create mode 100644 drivers/media/platform/meson/vdec/esparser.c + create mode 100644 drivers/media/platform/meson/vdec/esparser.h + create mode 100644 drivers/media/platform/meson/vdec/vdec.c + create mode 100644 drivers/media/platform/meson/vdec/vdec.h + create mode 100644 drivers/media/platform/meson/vdec/vdec_1.c + create mode 100644 drivers/media/platform/meson/vdec/vdec_1.h + create mode 100644 drivers/media/platform/meson/vdec/vdec_helpers.c + create mode 100644 drivers/media/platform/meson/vdec/vdec_helpers.h + create mode 100644 drivers/media/platform/meson/vdec/vdec_platform.c + create mode 100644 drivers/media/platform/meson/vdec/vdec_platform.h + +diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig +index 54fe90acb5b2..6bffb0ceff58 100644 +--- a/drivers/media/platform/Kconfig ++++ b/drivers/media/platform/Kconfig +@@ -482,6 +482,16 @@ config VIDEO_QCOM_VENUS + on various Qualcomm SoCs. + To compile this driver as a module choose m here. + ++config VIDEO_MESON_VDEC ++ tristate "Amlogic video decoder driver" ++ depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA ++ depends on ARCH_MESON || COMPILE_TEST ++ select VIDEOBUF2_DMA_CONTIG ++ select V4L2_MEM2MEM_DEV ++ select MESON_CANVAS ++ help ++ Support for the video decoder found in gxbb/gxl/gxm chips. ++ + endif # V4L_MEM2MEM_DRIVERS + + # TI VIDEO PORT Helper Modules +diff --git a/drivers/media/platform/meson/Makefile b/drivers/media/platform/meson/Makefile +index 597beb8f34d1..f7c6e1031f25 100644 +--- a/drivers/media/platform/meson/Makefile ++++ b/drivers/media/platform/meson/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_VIDEO_MESON_AO_CEC) += ao-cec.o ++obj-$(CONFIG_VIDEO_MESON_VDEC) += vdec/ +diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile +new file mode 100644 +index 000000000000..6bea129084b7 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/Makefile +@@ -0,0 +1,8 @@ ++# SPDX-License-Identifier: GPL-2.0 ++# Makefile for Amlogic meson video decoder driver ++ ++meson-vdec-objs = esparser.o vdec.o vdec_helpers.o vdec_platform.o ++meson-vdec-objs += vdec_1.o ++meson-vdec-objs += codec_mpeg12.o ++ ++obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o +diff --git a/drivers/media/platform/meson/vdec/codec_mpeg12.c b/drivers/media/platform/meson/vdec/codec_mpeg12.c +new file mode 100644 +index 000000000000..1bd6fb7d531d +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mpeg12.c +@@ -0,0 +1,209 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#include ++#include ++ ++#include "vdec_helpers.h" ++#include "dos_regs.h" ++ ++#define SIZE_WORKSPACE SZ_128K ++/* Offset substracted by the firmware from the workspace paddr */ ++#define WORKSPACE_OFFSET (5 * SZ_1K) ++ ++/* map firmware registers to known MPEG1/2 functions */ ++#define MREG_SEQ_INFO AV_SCRATCH_4 ++ #define MPEG2_SEQ_DAR_MASK GENMASK(3, 0) ++ #define MPEG2_DAR_4_3 2 ++ #define MPEG2_DAR_16_9 3 ++ #define MPEG2_DAR_221_100 4 ++#define MREG_PIC_INFO AV_SCRATCH_5 ++#define MREG_PIC_WIDTH AV_SCRATCH_6 ++#define MREG_PIC_HEIGHT AV_SCRATCH_7 ++#define MREG_BUFFERIN AV_SCRATCH_8 ++#define MREG_BUFFEROUT AV_SCRATCH_9 ++#define MREG_CMD AV_SCRATCH_A ++#define MREG_CO_MV_START AV_SCRATCH_B ++#define MREG_ERROR_COUNT AV_SCRATCH_C ++#define MREG_FRAME_OFFSET AV_SCRATCH_D ++#define MREG_WAIT_BUFFER AV_SCRATCH_E ++#define MREG_FATAL_ERROR AV_SCRATCH_F ++ ++#define PICINFO_PROG 0x00008000 ++#define PICINFO_TOP_FIRST 0x00002000 ++ ++struct codec_mpeg12 { ++ /* Buffer for the MPEG1/2 Workspace */ ++ void *workspace_vaddr; ++ dma_addr_t workspace_paddr; ++}; ++ ++static const u8 eos_sequence[SZ_1K] = { 0x00, 0x00, 0x01, 0xB7 }; ++ ++static const u8 *codec_mpeg12_eos_sequence(u32 *len) ++{ ++ *len = ARRAY_SIZE(eos_sequence); ++ return eos_sequence; ++} ++ ++static int codec_mpeg12_can_recycle(struct amvdec_core *core) ++{ ++ return !amvdec_read_dos(core, MREG_BUFFERIN); ++} ++ ++static void codec_mpeg12_recycle(struct amvdec_core *core, u32 buf_idx) ++{ ++ amvdec_write_dos(core, MREG_BUFFERIN, buf_idx + 1); ++} ++ ++static int codec_mpeg12_start(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ struct codec_mpeg12 *mpeg12 = sess->priv; ++ int ret; ++ ++ mpeg12 = kzalloc(sizeof(*mpeg12), GFP_KERNEL); ++ if (!mpeg12) ++ return -ENOMEM; ++ ++ /* Allocate some memory for the MPEG1/2 decoder's state */ ++ mpeg12->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, ++ &mpeg12->workspace_paddr, ++ GFP_KERNEL); ++ if (!mpeg12->workspace_vaddr) { ++ dev_err(core->dev, "Failed to request MPEG 1/2 Workspace\n"); ++ ret = -ENOMEM; ++ goto free_mpeg12; ++ } ++ ++ ret = amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_0, 0 }, ++ (u32[]){ 8, 0 }); ++ if (ret) ++ goto free_workspace; ++ ++ amvdec_write_dos(core, POWER_CTL_VLD, BIT(4)); ++ amvdec_write_dos(core, MREG_CO_MV_START, ++ mpeg12->workspace_paddr + WORKSPACE_OFFSET); ++ ++ amvdec_write_dos(core, MPEG1_2_REG, 0); ++ amvdec_write_dos(core, PSCALE_CTRL, 0); ++ amvdec_write_dos(core, PIC_HEAD_INFO, 0x380); ++ amvdec_write_dos(core, M4_CONTROL_REG, 0); ++ amvdec_write_dos(core, MREG_BUFFERIN, 0); ++ amvdec_write_dos(core, MREG_BUFFEROUT, 0); ++ amvdec_write_dos(core, MREG_CMD, (sess->width << 16) | sess->height); ++ amvdec_write_dos(core, MREG_ERROR_COUNT, 0); ++ amvdec_write_dos(core, MREG_FATAL_ERROR, 0); ++ amvdec_write_dos(core, MREG_WAIT_BUFFER, 0); ++ ++ sess->keyframe_found = 1; ++ sess->priv = mpeg12; ++ ++ return 0; ++ ++free_workspace: ++ dma_free_coherent(core->dev, SIZE_WORKSPACE, mpeg12->workspace_vaddr, ++ mpeg12->workspace_paddr); ++free_mpeg12: ++ kfree(mpeg12); ++ ++ return ret; ++} ++ ++static int codec_mpeg12_stop(struct amvdec_session *sess) ++{ ++ struct codec_mpeg12 *mpeg12 = sess->priv; ++ struct amvdec_core *core = sess->core; ++ ++ if (mpeg12->workspace_vaddr) ++ dma_free_coherent(core->dev, SIZE_WORKSPACE, ++ mpeg12->workspace_vaddr, ++ mpeg12->workspace_paddr); ++ ++ return 0; ++} ++ ++static void codec_mpeg12_update_dar(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 seq = amvdec_read_dos(core, MREG_SEQ_INFO); ++ u32 ar = seq & MPEG2_SEQ_DAR_MASK; ++ ++ switch (ar) { ++ case MPEG2_DAR_4_3: ++ amvdec_set_par_from_dar(sess, 4, 3); ++ break; ++ case MPEG2_DAR_16_9: ++ amvdec_set_par_from_dar(sess, 16, 9); ++ break; ++ case MPEG2_DAR_221_100: ++ amvdec_set_par_from_dar(sess, 221, 100); ++ break; ++ default: ++ sess->pixelaspect.numerator = 1; ++ sess->pixelaspect.denominator = 1; ++ break; ++ }; ++} ++ ++static irqreturn_t codec_mpeg12_threaded_isr(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 reg; ++ u32 pic_info; ++ u32 is_progressive; ++ u32 buffer_index; ++ u32 field = V4L2_FIELD_NONE; ++ u32 offset; ++ ++ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); ++ reg = amvdec_read_dos(core, MREG_FATAL_ERROR); ++ if (reg == 1) { ++ dev_err(core->dev, "MPEG1/2 fatal error\n"); ++ amvdec_abort(sess); ++ return IRQ_HANDLED; ++ } ++ ++ reg = amvdec_read_dos(core, MREG_BUFFEROUT); ++ if (!reg) ++ return IRQ_HANDLED; ++ ++ /* Unclear what this means */ ++ if ((reg & GENMASK(23, 17)) == GENMASK(23, 17)) ++ goto end; ++ ++ pic_info = amvdec_read_dos(core, MREG_PIC_INFO); ++ is_progressive = pic_info & PICINFO_PROG; ++ ++ if (!is_progressive) ++ field = (pic_info & PICINFO_TOP_FIRST) ? ++ V4L2_FIELD_INTERLACED_TB : ++ V4L2_FIELD_INTERLACED_BT; ++ ++ codec_mpeg12_update_dar(sess); ++ buffer_index = ((reg & 0xf) - 1) & 7; ++ offset = amvdec_read_dos(core, MREG_FRAME_OFFSET); ++ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); ++ ++end: ++ amvdec_write_dos(core, MREG_BUFFEROUT, 0); ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t codec_mpeg12_isr(struct amvdec_session *sess) ++{ ++ return IRQ_WAKE_THREAD; ++} ++ ++struct amvdec_codec_ops codec_mpeg12_ops = { ++ .start = codec_mpeg12_start, ++ .stop = codec_mpeg12_stop, ++ .isr = codec_mpeg12_isr, ++ .threaded_isr = codec_mpeg12_threaded_isr, ++ .can_recycle = codec_mpeg12_can_recycle, ++ .recycle = codec_mpeg12_recycle, ++ .eos_sequence = codec_mpeg12_eos_sequence, ++}; +diff --git a/drivers/media/platform/meson/vdec/codec_mpeg12.h b/drivers/media/platform/meson/vdec/codec_mpeg12.h +new file mode 100644 +index 000000000000..43cab5f39ca0 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mpeg12.h +@@ -0,0 +1,14 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_CODEC_MPEG12_H_ ++#define __MESON_VDEC_CODEC_MPEG12_H_ ++ ++#include "vdec.h" ++ ++extern struct amvdec_codec_ops codec_mpeg12_ops; ++ ++#endif +diff --git a/drivers/media/platform/meson/vdec/dos_regs.h b/drivers/media/platform/meson/vdec/dos_regs.h +new file mode 100644 +index 000000000000..abd810542dbb +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/dos_regs.h +@@ -0,0 +1,98 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_DOS_REGS_H_ ++#define __MESON_VDEC_DOS_REGS_H_ ++ ++/* DOS registers */ ++#define VDEC_ASSIST_AMR1_INT8 0x00b4 ++ ++#define ASSIST_MBOX1_CLR_REG 0x01d4 ++#define ASSIST_MBOX1_MASK 0x01d8 ++ ++#define MPSR 0x0c04 ++#define MCPU_INTR_MSK 0x0c10 ++#define CPSR 0x0c84 ++ ++#define IMEM_DMA_CTRL 0x0d00 ++#define IMEM_DMA_ADR 0x0d04 ++#define IMEM_DMA_COUNT 0x0d08 ++#define LMEM_DMA_CTRL 0x0d40 ++ ++#define MC_STATUS0 0x2424 ++#define MC_CTRL1 0x242c ++ ++#define PSCALE_RST 0x2440 ++#define PSCALE_CTRL 0x2444 ++#define PSCALE_BMEM_ADDR 0x247c ++#define PSCALE_BMEM_DAT 0x2480 ++ ++#define DBLK_CTRL 0x2544 ++#define DBLK_STATUS 0x254c ++ ++#define GCLK_EN 0x260c ++#define MDEC_PIC_DC_CTRL 0x2638 ++#define MDEC_PIC_DC_STATUS 0x263c ++#define ANC0_CANVAS_ADDR 0x2640 ++#define MDEC_PIC_DC_THRESH 0x26e0 ++ ++/* Firmware interface registers */ ++#define AV_SCRATCH_0 0x2700 ++#define AV_SCRATCH_1 0x2704 ++#define AV_SCRATCH_2 0x2708 ++#define AV_SCRATCH_3 0x270c ++#define AV_SCRATCH_4 0x2710 ++#define AV_SCRATCH_5 0x2714 ++#define AV_SCRATCH_6 0x2718 ++#define AV_SCRATCH_7 0x271c ++#define AV_SCRATCH_8 0x2720 ++#define AV_SCRATCH_9 0x2724 ++#define AV_SCRATCH_A 0x2728 ++#define AV_SCRATCH_B 0x272c ++#define AV_SCRATCH_C 0x2730 ++#define AV_SCRATCH_D 0x2734 ++#define AV_SCRATCH_E 0x2738 ++#define AV_SCRATCH_F 0x273c ++#define AV_SCRATCH_G 0x2740 ++#define AV_SCRATCH_H 0x2744 ++#define AV_SCRATCH_I 0x2748 ++#define AV_SCRATCH_J 0x274c ++#define AV_SCRATCH_K 0x2750 ++#define AV_SCRATCH_L 0x2754 ++ ++#define MPEG1_2_REG 0x3004 ++#define PIC_HEAD_INFO 0x300c ++#define POWER_CTL_VLD 0x3020 ++#define M4_CONTROL_REG 0x30a4 ++ ++/* Stream Buffer (stbuf) regs */ ++#define VLD_MEM_VIFIFO_START_PTR 0x3100 ++#define VLD_MEM_VIFIFO_CURR_PTR 0x3104 ++#define VLD_MEM_VIFIFO_END_PTR 0x3108 ++#define VLD_MEM_VIFIFO_CONTROL 0x3110 ++ #define MEM_FIFO_CNT_BIT 16 ++ #define MEM_FILL_ON_LEVEL BIT(10) ++ #define MEM_CTRL_EMPTY_EN BIT(2) ++ #define MEM_CTRL_FILL_EN BIT(1) ++#define VLD_MEM_VIFIFO_WP 0x3114 ++#define VLD_MEM_VIFIFO_RP 0x3118 ++#define VLD_MEM_VIFIFO_LEVEL 0x311c ++#define VLD_MEM_VIFIFO_BUF_CNTL 0x3120 ++ #define MEM_BUFCTRL_MANUAL BIT(1) ++#define VLD_MEM_VIFIFO_WRAP_COUNT 0x3144 ++ ++#define DCAC_DMA_CTRL 0x3848 ++ ++#define DOS_SW_RESET0 0xfc00 ++#define DOS_GCLK_EN0 0xfc04 ++#define DOS_GEN_CTRL0 0xfc08 ++#define DOS_MEM_PD_VDEC 0xfcc0 ++#define DOS_MEM_PD_HEVC 0xfccc ++#define DOS_SW_RESET3 0xfcd0 ++#define DOS_GCLK_EN3 0xfcd4 ++#define DOS_VDEC_MCRCC_STALL_CTRL 0xfd00 ++ ++#endif +diff --git a/drivers/media/platform/meson/vdec/esparser.c b/drivers/media/platform/meson/vdec/esparser.c +new file mode 100644 +index 000000000000..9498812243ca +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/esparser.c +@@ -0,0 +1,322 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ * ++ * The Elementary Stream Parser is a HW bitstream parser. ++ * It reads bitstream buffers and feeds them to the VIFIFO ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "dos_regs.h" ++#include "esparser.h" ++#include "vdec_helpers.h" ++ ++/* PARSER REGS (CBUS) */ ++#define PARSER_CONTROL 0x00 ++ #define ES_PACK_SIZE_BIT 8 ++ #define ES_WRITE BIT(5) ++ #define ES_SEARCH BIT(1) ++ #define ES_PARSER_START BIT(0) ++#define PARSER_FETCH_ADDR 0x4 ++#define PARSER_FETCH_CMD 0x8 ++#define PARSER_CONFIG 0x14 ++ #define PS_CFG_MAX_FETCH_CYCLE_BIT 0 ++ #define PS_CFG_STARTCODE_WID_24_BIT 10 ++ #define PS_CFG_MAX_ES_WR_CYCLE_BIT 12 ++ #define PS_CFG_PFIFO_EMPTY_CNT_BIT 16 ++#define PFIFO_WR_PTR 0x18 ++#define PFIFO_RD_PTR 0x1c ++#define PARSER_SEARCH_PATTERN 0x24 ++ #define ES_START_CODE_PATTERN 0x00000100 ++#define PARSER_SEARCH_MASK 0x28 ++ #define ES_START_CODE_MASK 0xffffff00 ++ #define FETCH_ENDIAN_BIT 27 ++#define PARSER_INT_ENABLE 0x2c ++ #define PARSER_INT_HOST_EN_BIT 8 ++#define PARSER_INT_STATUS 0x30 ++ #define PARSER_INTSTAT_SC_FOUND 1 ++#define PARSER_ES_CONTROL 0x5c ++#define PARSER_VIDEO_START_PTR 0x80 ++#define PARSER_VIDEO_END_PTR 0x84 ++#define PARSER_VIDEO_WP 0x88 ++#define PARSER_VIDEO_HOLE 0x90 ++ ++#define SEARCH_PATTERN_LEN 512 ++ ++static DECLARE_WAIT_QUEUE_HEAD(wq); ++static int search_done; ++ ++static irqreturn_t esparser_isr(int irq, void *dev) ++{ ++ int int_status; ++ struct amvdec_core *core = dev; ++ ++ int_status = amvdec_read_parser(core, PARSER_INT_STATUS); ++ amvdec_write_parser(core, PARSER_INT_STATUS, int_status); ++ ++ if (int_status & PARSER_INTSTAT_SC_FOUND) { ++ amvdec_write_parser(core, PFIFO_RD_PTR, 0); ++ amvdec_write_parser(core, PFIFO_WR_PTR, 0); ++ search_done = 1; ++ wake_up_interruptible(&wq); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++/* Pad the packet to at least 4KiB bytes otherwise the VDEC unit won't trigger ++ * ISRs. ++ * Also append a start code 000001ff at the end to trigger ++ * the ESPARSER interrupt. ++ */ ++static u32 esparser_pad_start_code(struct vb2_buffer *vb) ++{ ++ u32 payload_size = vb2_get_plane_payload(vb, 0); ++ u32 pad_size = 0; ++ u8 *vaddr = vb2_plane_vaddr(vb, 0) + payload_size; ++ ++ if (payload_size < ESPARSER_MIN_PACKET_SIZE) { ++ pad_size = ESPARSER_MIN_PACKET_SIZE - payload_size; ++ memset(vaddr, 0, pad_size); ++ } ++ ++ memset(vaddr + pad_size, 0, SEARCH_PATTERN_LEN); ++ vaddr[pad_size] = 0x00; ++ vaddr[pad_size + 1] = 0x00; ++ vaddr[pad_size + 2] = 0x01; ++ vaddr[pad_size + 3] = 0xff; ++ ++ return pad_size; ++} ++ ++static int ++esparser_write_data(struct amvdec_core *core, dma_addr_t addr, u32 size) ++{ ++ amvdec_write_parser(core, PFIFO_RD_PTR, 0); ++ amvdec_write_parser(core, PFIFO_WR_PTR, 0); ++ amvdec_write_parser(core, PARSER_CONTROL, ++ ES_WRITE | ++ ES_PARSER_START | ++ ES_SEARCH | ++ (size << ES_PACK_SIZE_BIT)); ++ ++ amvdec_write_parser(core, PARSER_FETCH_ADDR, addr); ++ amvdec_write_parser(core, PARSER_FETCH_CMD, ++ (7 << FETCH_ENDIAN_BIT) | ++ (size + SEARCH_PATTERN_LEN)); ++ ++ search_done = 0; ++ return wait_event_interruptible_timeout(wq, search_done, (HZ / 5)); ++} ++ ++static u32 esparser_vififo_get_free_space(struct amvdec_session *sess) ++{ ++ u32 vififo_usage; ++ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; ++ struct amvdec_core *core = sess->core; ++ ++ vififo_usage = vdec_ops->vififo_level(sess); ++ vififo_usage += amvdec_read_parser(core, PARSER_VIDEO_HOLE); ++ vififo_usage += (6 * SZ_1K); // 6 KiB internal fifo ++ ++ if (vififo_usage > sess->vififo_size) { ++ dev_warn(sess->core->dev, ++ "VIFIFO usage (%u) > VIFIFO size (%u)\n", ++ vififo_usage, sess->vififo_size); ++ return 0; ++ } ++ ++ return sess->vififo_size - vififo_usage; ++} ++ ++int esparser_queue_eos(struct amvdec_core *core, const u8 *data, u32 len) ++{ ++ struct device *dev = core->dev; ++ void *eos_vaddr; ++ dma_addr_t eos_paddr; ++ int ret; ++ ++ eos_vaddr = dma_alloc_coherent(dev, ++ len + SEARCH_PATTERN_LEN, ++ &eos_paddr, GFP_KERNEL); ++ if (!eos_vaddr) ++ return -ENOMEM; ++ ++ memset(eos_vaddr, 0, len + SEARCH_PATTERN_LEN); ++ memcpy(eos_vaddr, data, len); ++ ret = esparser_write_data(core, eos_paddr, len); ++ dma_free_coherent(dev, len + SEARCH_PATTERN_LEN, ++ eos_vaddr, eos_paddr); ++ ++ return ret; ++} ++ ++static u32 esparser_get_offset(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 offset = amvdec_read_parser(core, PARSER_VIDEO_WP) - ++ sess->vififo_paddr; ++ ++ if (offset < sess->last_offset) ++ sess->wrap_count++; ++ ++ sess->last_offset = offset; ++ offset += (sess->wrap_count * sess->vififo_size); ++ ++ return offset; ++} ++ ++static int ++esparser_queue(struct amvdec_session *sess, struct vb2_v4l2_buffer *vbuf) ++{ ++ int ret; ++ struct vb2_buffer *vb = &vbuf->vb2_buf; ++ struct amvdec_core *core = sess->core; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ u32 num_dst_bufs = 0; ++ u32 payload_size = vb2_get_plane_payload(vb, 0); ++ dma_addr_t phy = vb2_dma_contig_plane_dma_addr(vb, 0); ++ u32 offset; ++ u32 pad_size; ++ ++ if (codec_ops->num_pending_bufs) ++ num_dst_bufs = codec_ops->num_pending_bufs(sess); ++ ++ num_dst_bufs += v4l2_m2m_num_dst_bufs_ready(sess->m2m_ctx); ++ ++ if (esparser_vififo_get_free_space(sess) < payload_size || ++ atomic_read(&sess->esparser_queued_bufs) >= num_dst_bufs) ++ return -EAGAIN; ++ ++ v4l2_m2m_src_buf_remove_by_buf(sess->m2m_ctx, vbuf); ++ ++ offset = esparser_get_offset(sess); ++ ++ amvdec_add_ts_reorder(sess, vb->timestamp, offset); ++ dev_dbg(core->dev, "esparser: ts = %llu pld_size = %u offset = %08X\n", ++ vb->timestamp, payload_size, offset); ++ ++ pad_size = esparser_pad_start_code(vb); ++ ret = esparser_write_data(core, phy, payload_size + pad_size); ++ ++ if (ret <= 0) { ++ dev_warn(core->dev, "esparser: input parsing error\n"); ++ amvdec_remove_ts(sess, vb->timestamp); ++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); ++ amvdec_write_parser(core, PARSER_FETCH_CMD, 0); ++ ++ return 0; ++ } ++ ++ /* We need to wait until we parse the first keyframe. ++ * All buffers prior to the first keyframe must be dropped. ++ */ ++ if (!sess->keyframe_found) ++ usleep_range(1000, 2000); ++ ++ if (sess->keyframe_found) ++ atomic_inc(&sess->esparser_queued_bufs); ++ else ++ amvdec_remove_ts(sess, vb->timestamp); ++ ++ vbuf->flags = 0; ++ vbuf->field = V4L2_FIELD_NONE; ++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); ++ ++ return 0; ++} ++ ++void esparser_queue_all_src(struct work_struct *work) ++{ ++ struct v4l2_m2m_buffer *buf, *n; ++ struct amvdec_session *sess = ++ container_of(work, struct amvdec_session, esparser_queue_work); ++ ++ mutex_lock(&sess->lock); ++ v4l2_m2m_for_each_src_buf_safe(sess->m2m_ctx, buf, n) { ++ if (esparser_queue(sess, &buf->vb) < 0) ++ break; ++ } ++ mutex_unlock(&sess->lock); ++} ++ ++int esparser_power_up(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; ++ ++ reset_control_reset(core->esparser_reset); ++ amvdec_write_parser(core, PARSER_CONFIG, ++ (10 << PS_CFG_PFIFO_EMPTY_CNT_BIT) | ++ (1 << PS_CFG_MAX_ES_WR_CYCLE_BIT) | ++ (16 << PS_CFG_MAX_FETCH_CYCLE_BIT)); ++ ++ amvdec_write_parser(core, PFIFO_RD_PTR, 0); ++ amvdec_write_parser(core, PFIFO_WR_PTR, 0); ++ ++ amvdec_write_parser(core, PARSER_SEARCH_PATTERN, ++ ES_START_CODE_PATTERN); ++ amvdec_write_parser(core, PARSER_SEARCH_MASK, ES_START_CODE_MASK); ++ ++ amvdec_write_parser(core, PARSER_CONFIG, ++ (10 << PS_CFG_PFIFO_EMPTY_CNT_BIT) | ++ (1 << PS_CFG_MAX_ES_WR_CYCLE_BIT) | ++ (16 << PS_CFG_MAX_FETCH_CYCLE_BIT) | ++ (2 << PS_CFG_STARTCODE_WID_24_BIT)); ++ ++ amvdec_write_parser(core, PARSER_CONTROL, ++ (ES_SEARCH | ES_PARSER_START)); ++ ++ amvdec_write_parser(core, PARSER_VIDEO_START_PTR, sess->vififo_paddr); ++ amvdec_write_parser(core, PARSER_VIDEO_END_PTR, ++ sess->vififo_paddr + sess->vififo_size - 8); ++ amvdec_write_parser(core, PARSER_ES_CONTROL, ++ amvdec_read_parser(core, PARSER_ES_CONTROL) & ~1); ++ ++ if (vdec_ops->conf_esparser) ++ vdec_ops->conf_esparser(sess); ++ ++ amvdec_write_parser(core, PARSER_INT_STATUS, 0xffff); ++ amvdec_write_parser(core, PARSER_INT_ENABLE, ++ BIT(PARSER_INT_HOST_EN_BIT)); ++ ++ return 0; ++} ++ ++int esparser_init(struct platform_device *pdev, struct amvdec_core *core) ++{ ++ struct device *dev = &pdev->dev; ++ int ret; ++ int irq; ++ ++ irq = platform_get_irq_byname(pdev, "esparser"); ++ if (irq < 0) { ++ dev_err(dev, "Failed getting ESPARSER IRQ from dtb\n"); ++ return irq; ++ } ++ ++ ret = devm_request_irq(dev, irq, esparser_isr, IRQF_SHARED, ++ "esparserirq", core); ++ if (ret) { ++ dev_err(dev, "Failed requesting ESPARSER IRQ\n"); ++ return ret; ++ } ++ ++ core->esparser_reset = ++ devm_reset_control_get_exclusive(dev, "esparser"); ++ if (IS_ERR(core->esparser_reset)) { ++ dev_err(dev, "Failed to get esparser_reset\n"); ++ return PTR_ERR(core->esparser_reset); ++ } ++ ++ return 0; ++} +diff --git a/drivers/media/platform/meson/vdec/esparser.h b/drivers/media/platform/meson/vdec/esparser.h +new file mode 100644 +index 000000000000..ff51fe7fda66 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/esparser.h +@@ -0,0 +1,32 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_ESPARSER_H_ ++#define __MESON_VDEC_ESPARSER_H_ ++ ++#include ++ ++#include "vdec.h" ++ ++int esparser_init(struct platform_device *pdev, struct amvdec_core *core); ++int esparser_power_up(struct amvdec_session *sess); ++ ++/** ++ * esparser_queue_eos() - write End Of Stream sequence to the ESPARSER ++ * ++ * @core vdec core struct ++ */ ++int esparser_queue_eos(struct amvdec_core *core, const u8 *data, u32 len); ++ ++/** ++ * esparser_queue_all_src() - work handler that writes as many src buffers ++ * as possible to the ESPARSER ++ */ ++void esparser_queue_all_src(struct work_struct *work); ++ ++#define ESPARSER_MIN_PACKET_SIZE SZ_4K ++ ++#endif +diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c +new file mode 100644 +index 000000000000..d8db52c01fbe +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec.c +@@ -0,0 +1,1034 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vdec.h" ++#include "esparser.h" ++#include "vdec_helpers.h" ++ ++struct dummy_buf { ++ struct vb2_v4l2_buffer vb; ++ struct list_head list; ++}; ++ ++/* 16 MiB for parsed bitstream swap exchange */ ++#define SIZE_VIFIFO SZ_16M ++ ++static u32 get_output_size(u32 width, u32 height) ++{ ++ return ALIGN(width * height, SZ_64K); ++} ++ ++u32 amvdec_get_output_size(struct amvdec_session *sess) ++{ ++ return get_output_size(sess->width, sess->height); ++} ++EXPORT_SYMBOL_GPL(amvdec_get_output_size); ++ ++static int vdec_codec_needs_recycle(struct amvdec_session *sess) ++{ ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ ++ return codec_ops->can_recycle && codec_ops->recycle; ++} ++ ++static int vdec_recycle_thread(void *data) ++{ ++ struct amvdec_session *sess = data; ++ struct amvdec_core *core = sess->core; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ struct amvdec_buffer *tmp, *n; ++ ++ while (!kthread_should_stop()) { ++ mutex_lock(&sess->bufs_recycle_lock); ++ list_for_each_entry_safe(tmp, n, &sess->bufs_recycle, list) { ++ if (!codec_ops->can_recycle(core)) ++ break; ++ ++ codec_ops->recycle(core, tmp->vb->index); ++ list_del(&tmp->list); ++ kfree(tmp); ++ } ++ mutex_unlock(&sess->bufs_recycle_lock); ++ ++ usleep_range(5000, 10000); ++ } ++ ++ return 0; ++} ++ ++static int vdec_poweron(struct amvdec_session *sess) ++{ ++ int ret; ++ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; ++ ++ ret = clk_prepare_enable(sess->core->dos_parser_clk); ++ if (ret) ++ return ret; ++ ++ ret = clk_prepare_enable(sess->core->dos_clk); ++ if (ret) ++ goto disable_dos_parser; ++ ++ ret = vdec_ops->start(sess); ++ if (ret) ++ goto disable_dos; ++ ++ esparser_power_up(sess); ++ ++ return 0; ++ ++disable_dos: ++ clk_disable_unprepare(sess->core->dos_clk); ++disable_dos_parser: ++ clk_disable_unprepare(sess->core->dos_parser_clk); ++ ++ return ret; ++} ++ ++static void vdec_wait_inactive(struct amvdec_session *sess) ++{ ++ /* We consider 50ms with no IRQ to be inactive. */ ++ while (time_is_after_jiffies64(sess->last_irq_jiffies + ++ msecs_to_jiffies(50))) ++ msleep(25); ++} ++ ++static void vdec_poweroff(struct amvdec_session *sess) ++{ ++ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ ++ vdec_wait_inactive(sess); ++ if (codec_ops->drain) ++ codec_ops->drain(sess); ++ ++ vdec_ops->stop(sess); ++ clk_disable_unprepare(sess->core->dos_clk); ++ clk_disable_unprepare(sess->core->dos_parser_clk); ++} ++ ++static void ++vdec_queue_recycle(struct amvdec_session *sess, struct vb2_buffer *vb) ++{ ++ struct amvdec_buffer *new_buf; ++ ++ new_buf = kmalloc(sizeof(*new_buf), GFP_KERNEL); ++ new_buf->vb = vb; ++ ++ mutex_lock(&sess->bufs_recycle_lock); ++ list_add_tail(&new_buf->list, &sess->bufs_recycle); ++ mutex_unlock(&sess->bufs_recycle_lock); ++} ++ ++static void vdec_m2m_device_run(void *priv) ++{ ++ struct amvdec_session *sess = priv; ++ ++ schedule_work(&sess->esparser_queue_work); ++} ++ ++static void vdec_m2m_job_abort(void *priv) ++{ ++ struct amvdec_session *sess = priv; ++ ++ v4l2_m2m_job_finish(sess->m2m_dev, sess->m2m_ctx); ++} ++ ++static const struct v4l2_m2m_ops vdec_m2m_ops = { ++ .device_run = vdec_m2m_device_run, ++ .job_abort = vdec_m2m_job_abort, ++}; ++ ++static int vdec_queue_setup(struct vb2_queue *q, ++ unsigned int *num_buffers, unsigned int *num_planes, ++ unsigned int sizes[], struct device *alloc_devs[]) ++{ ++ struct amvdec_session *sess = vb2_get_drv_priv(q); ++ const struct amvdec_format *fmt_out = sess->fmt_out; ++ u32 output_size = amvdec_get_output_size(sess); ++ u32 buffers_total; ++ ++ if (*num_planes) { ++ switch (q->type) { ++ case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: ++ if (*num_planes != 1 || sizes[0] < output_size) ++ return -EINVAL; ++ break; ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: ++ switch (sess->pixfmt_cap) { ++ case V4L2_PIX_FMT_NV12M: ++ if (*num_planes != 2 || ++ sizes[0] < output_size || ++ sizes[1] < output_size / 2) ++ return -EINVAL; ++ break; ++ case V4L2_PIX_FMT_YUV420M: ++ if (*num_planes != 3 || ++ sizes[0] < output_size || ++ sizes[1] < output_size / 4 || ++ sizes[2] < output_size / 4) ++ return -EINVAL; ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ } ++ ++ return 0; ++ } ++ ++ switch (q->type) { ++ case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: ++ sizes[0] = amvdec_get_output_size(sess); ++ *num_planes = 1; ++ break; ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: ++ switch (sess->pixfmt_cap) { ++ case V4L2_PIX_FMT_NV12M: ++ sizes[0] = output_size; ++ sizes[1] = output_size / 2; ++ *num_planes = 2; ++ break; ++ case V4L2_PIX_FMT_YUV420M: ++ sizes[0] = output_size; ++ sizes[1] = output_size / 4; ++ sizes[2] = output_size / 4; ++ *num_planes = 3; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ buffers_total = q->num_buffers + *num_buffers; ++ ++ if (buffers_total < fmt_out->min_buffers) ++ *num_buffers = fmt_out->min_buffers - q->num_buffers; ++ if (buffers_total > fmt_out->max_buffers) ++ *num_buffers = fmt_out->max_buffers - q->num_buffers; ++ ++ /* We need to program the complete CAPTURE buffer list ++ * in registers during start_streaming, and the firmwares ++ * are free to choose any of them to write frames to. As such, ++ * we need all of them to be queued into the driver ++ */ ++ q->min_buffers_needed = q->num_buffers + *num_buffers; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void vdec_vb2_buf_queue(struct vb2_buffer *vb) ++{ ++ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); ++ struct amvdec_session *sess = vb2_get_drv_priv(vb->vb2_queue); ++ struct v4l2_m2m_ctx *m2m_ctx = sess->m2m_ctx; ++ ++ v4l2_m2m_buf_queue(m2m_ctx, vbuf); ++ ++ if (!sess->streamon_out || !sess->streamon_cap) ++ return; ++ ++ if (vb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && ++ vdec_codec_needs_recycle(sess)) ++ vdec_queue_recycle(sess, vb); ++ ++ schedule_work(&sess->esparser_queue_work); ++} ++ ++static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) ++{ ++ struct amvdec_session *sess = vb2_get_drv_priv(q); ++ struct amvdec_core *core = sess->core; ++ struct vb2_v4l2_buffer *buf; ++ int ret; ++ ++ if (core->cur_sess && core->cur_sess != sess) { ++ ret = -EBUSY; ++ goto bufs_done; ++ } ++ ++ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ++ sess->streamon_out = 1; ++ else ++ sess->streamon_cap = 1; ++ ++ if (!sess->streamon_out || !sess->streamon_cap) ++ return 0; ++ ++ sess->vififo_size = SIZE_VIFIFO; ++ sess->vififo_vaddr = ++ dma_alloc_coherent(sess->core->dev, sess->vififo_size, ++ &sess->vififo_paddr, GFP_KERNEL); ++ if (!sess->vififo_vaddr) { ++ dev_err(sess->core->dev, "Failed to request VIFIFO buffer\n"); ++ ret = -ENOMEM; ++ goto bufs_done; ++ } ++ ++ sess->should_stop = 0; ++ sess->keyframe_found = 0; ++ sess->last_offset = 0; ++ sess->wrap_count = 0; ++ sess->pixelaspect.numerator = 1; ++ sess->pixelaspect.denominator = 1; ++ atomic_set(&sess->esparser_queued_bufs, 0); ++ ++ ret = vdec_poweron(sess); ++ if (ret) ++ goto vififo_free; ++ ++ sess->sequence_cap = 0; ++ if (vdec_codec_needs_recycle(sess)) ++ sess->recycle_thread = kthread_run(vdec_recycle_thread, sess, ++ "vdec_recycle"); ++ ++ core->cur_sess = sess; ++ ++ return 0; ++ ++vififo_free: ++ dma_free_coherent(sess->core->dev, sess->vififo_size, ++ sess->vififo_vaddr, sess->vififo_paddr); ++bufs_done: ++ while ((buf = v4l2_m2m_src_buf_remove(sess->m2m_ctx))) ++ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED); ++ while ((buf = v4l2_m2m_dst_buf_remove(sess->m2m_ctx))) ++ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED); ++ ++ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ++ sess->streamon_out = 0; ++ else ++ sess->streamon_cap = 0; ++ ++ return ret; ++} ++ ++static void vdec_free_canvas(struct amvdec_session *sess) ++{ ++ int i; ++ ++ for (i = 0; i < sess->canvas_num; ++i) ++ meson_canvas_free(sess->core->canvas, sess->canvas_alloc[i]); ++ ++ sess->canvas_num = 0; ++} ++ ++static void vdec_reset_timestamps(struct amvdec_session *sess) ++{ ++ struct amvdec_timestamp *tmp, *n; ++ ++ list_for_each_entry_safe(tmp, n, &sess->timestamps, list) { ++ list_del(&tmp->list); ++ kfree(tmp); ++ } ++} ++ ++static void vdec_reset_bufs_recycle(struct amvdec_session *sess) ++{ ++ struct amvdec_buffer *tmp, *n; ++ ++ list_for_each_entry_safe(tmp, n, &sess->bufs_recycle, list) { ++ list_del(&tmp->list); ++ kfree(tmp); ++ } ++} ++ ++static void vdec_stop_streaming(struct vb2_queue *q) ++{ ++ struct amvdec_session *sess = vb2_get_drv_priv(q); ++ struct amvdec_core *core = sess->core; ++ struct vb2_v4l2_buffer *buf; ++ ++ if (sess->streamon_out && sess->streamon_cap) { ++ if (vdec_codec_needs_recycle(sess)) ++ kthread_stop(sess->recycle_thread); ++ ++ vdec_poweroff(sess); ++ vdec_free_canvas(sess); ++ dma_free_coherent(sess->core->dev, sess->vififo_size, ++ sess->vififo_vaddr, sess->vififo_paddr); ++ vdec_reset_timestamps(sess); ++ vdec_reset_bufs_recycle(sess); ++ kfree(sess->priv); ++ sess->priv = NULL; ++ core->cur_sess = NULL; ++ } ++ ++ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ while ((buf = v4l2_m2m_src_buf_remove(sess->m2m_ctx))) ++ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR); ++ ++ sess->streamon_out = 0; ++ } else { ++ while ((buf = v4l2_m2m_dst_buf_remove(sess->m2m_ctx))) ++ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR); ++ ++ sess->streamon_cap = 0; ++ } ++} ++ ++static const struct vb2_ops vdec_vb2_ops = { ++ .queue_setup = vdec_queue_setup, ++ .start_streaming = vdec_start_streaming, ++ .stop_streaming = vdec_stop_streaming, ++ .buf_queue = vdec_vb2_buf_queue, ++ .wait_prepare = vb2_ops_wait_prepare, ++ .wait_finish = vb2_ops_wait_finish, ++}; ++ ++static int ++vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap) ++{ ++ strscpy(cap->driver, "meson-vdec", sizeof(cap->driver)); ++ strscpy(cap->card, "Amlogic Video Decoder", sizeof(cap->card)); ++ strscpy(cap->bus_info, "platform:meson-vdec", sizeof(cap->bus_info)); ++ ++ return 0; ++} ++ ++static const struct amvdec_format * ++find_format(const struct amvdec_format *fmts, u32 size, u32 pixfmt) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < size; i++) { ++ if (fmts[i].pixfmt == pixfmt) ++ return &fmts[i]; ++ } ++ ++ return NULL; ++} ++ ++static unsigned int ++vdec_supports_pixfmt_cap(const struct amvdec_format *fmt_out, u32 pixfmt_cap) ++{ ++ int i; ++ ++ for (i = 0; fmt_out->pixfmts_cap[i]; i++) ++ if (fmt_out->pixfmts_cap[i] == pixfmt_cap) ++ return 1; ++ ++ return 0; ++} ++ ++static const struct amvdec_format * ++vdec_try_fmt_common(struct amvdec_session *sess, u32 size, ++ struct v4l2_format *f) ++{ ++ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; ++ struct v4l2_plane_pix_format *pfmt = pixmp->plane_fmt; ++ const struct amvdec_format *fmts = sess->core->platform->formats; ++ const struct amvdec_format *fmt_out; ++ ++ memset(pfmt[0].reserved, 0, sizeof(pfmt[0].reserved)); ++ memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ fmt_out = find_format(fmts, size, pixmp->pixelformat); ++ if (!fmt_out) { ++ pixmp->pixelformat = V4L2_PIX_FMT_MPEG2; ++ fmt_out = find_format(fmts, size, pixmp->pixelformat); ++ } ++ ++ pfmt[0].sizeimage = ++ get_output_size(pixmp->width, pixmp->height); ++ pfmt[0].bytesperline = 0; ++ pixmp->num_planes = 1; ++ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ++ fmt_out = sess->fmt_out; ++ if (!vdec_supports_pixfmt_cap(fmt_out, pixmp->pixelformat)) ++ pixmp->pixelformat = fmt_out->pixfmts_cap[0]; ++ ++ memset(pfmt[1].reserved, 0, sizeof(pfmt[1].reserved)); ++ if (pixmp->pixelformat == V4L2_PIX_FMT_NV12M) { ++ pfmt[0].sizeimage = ++ get_output_size(pixmp->width, pixmp->height); ++ pfmt[0].bytesperline = ALIGN(pixmp->width, 64); ++ ++ pfmt[1].sizeimage = ++ get_output_size(pixmp->width, pixmp->height) / 2; ++ pfmt[1].bytesperline = ALIGN(pixmp->width, 64); ++ pixmp->num_planes = 2; ++ } else if (pixmp->pixelformat == V4L2_PIX_FMT_YUV420M) { ++ pfmt[0].sizeimage = ++ get_output_size(pixmp->width, pixmp->height); ++ pfmt[0].bytesperline = ALIGN(pixmp->width, 64); ++ ++ pfmt[1].sizeimage = ++ get_output_size(pixmp->width, pixmp->height) / 4; ++ pfmt[1].bytesperline = ALIGN(pixmp->width, 64) / 2; ++ ++ pfmt[2].sizeimage = ++ get_output_size(pixmp->width, pixmp->height) / 4; ++ pfmt[2].bytesperline = ALIGN(pixmp->width, 64) / 2; ++ pixmp->num_planes = 3; ++ } ++ } else { ++ return NULL; ++ } ++ ++ pixmp->width = clamp(pixmp->width, (u32)256, fmt_out->max_width); ++ pixmp->height = clamp(pixmp->height, (u32)144, fmt_out->max_height); ++ ++ if (pixmp->field == V4L2_FIELD_ANY) ++ pixmp->field = V4L2_FIELD_NONE; ++ ++ return fmt_out; ++} ++ ++static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ ++ vdec_try_fmt_common(sess, sess->core->platform->num_formats, f); ++ ++ return 0; ++} ++ ++static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) ++ pixmp->pixelformat = sess->pixfmt_cap; ++ else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ++ pixmp->pixelformat = sess->fmt_out->pixfmt; ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ++ pixmp->width = sess->width; ++ pixmp->height = sess->height; ++ pixmp->colorspace = sess->colorspace; ++ pixmp->ycbcr_enc = sess->ycbcr_enc; ++ pixmp->quantization = sess->quantization; ++ pixmp->xfer_func = sess->xfer_func; ++ } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ pixmp->width = sess->width; ++ pixmp->height = sess->height; ++ } ++ ++ vdec_try_fmt_common(sess, sess->core->platform->num_formats, f); ++ ++ return 0; ++} ++ ++static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; ++ u32 num_formats = sess->core->platform->num_formats; ++ const struct amvdec_format *fmt_out; ++ struct v4l2_pix_format_mplane orig_pixmp; ++ struct v4l2_format format; ++ u32 pixfmt_out = 0, pixfmt_cap = 0; ++ ++ orig_pixmp = *pixmp; ++ ++ fmt_out = vdec_try_fmt_common(sess, num_formats, f); ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ pixfmt_out = pixmp->pixelformat; ++ pixfmt_cap = sess->pixfmt_cap; ++ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ++ pixfmt_cap = pixmp->pixelformat; ++ pixfmt_out = sess->fmt_out->pixfmt; ++ } ++ ++ memset(&format, 0, sizeof(format)); ++ ++ format.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; ++ format.fmt.pix_mp.pixelformat = pixfmt_out; ++ format.fmt.pix_mp.width = orig_pixmp.width; ++ format.fmt.pix_mp.height = orig_pixmp.height; ++ vdec_try_fmt_common(sess, num_formats, &format); ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ sess->width = format.fmt.pix_mp.width; ++ sess->height = format.fmt.pix_mp.height; ++ sess->colorspace = pixmp->colorspace; ++ sess->ycbcr_enc = pixmp->ycbcr_enc; ++ sess->quantization = pixmp->quantization; ++ sess->xfer_func = pixmp->xfer_func; ++ } ++ ++ memset(&format, 0, sizeof(format)); ++ ++ format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; ++ format.fmt.pix_mp.pixelformat = pixfmt_cap; ++ format.fmt.pix_mp.width = orig_pixmp.width; ++ format.fmt.pix_mp.height = orig_pixmp.height; ++ vdec_try_fmt_common(sess, num_formats, &format); ++ ++ sess->width = format.fmt.pix_mp.width; ++ sess->height = format.fmt.pix_mp.height; ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) ++ sess->fmt_out = fmt_out; ++ else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) ++ sess->pixfmt_cap = format.fmt.pix_mp.pixelformat; ++ ++ return 0; ++} ++ ++static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ const struct vdec_platform *platform = sess->core->platform; ++ const struct amvdec_format *fmt_out; ++ ++ memset(f->reserved, 0, sizeof(f->reserved)); ++ ++ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { ++ if (f->index >= platform->num_formats) ++ return -EINVAL; ++ ++ fmt_out = &platform->formats[f->index]; ++ f->pixelformat = fmt_out->pixfmt; ++ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ++ fmt_out = sess->fmt_out; ++ if (f->index >= 4 || !fmt_out->pixfmts_cap[f->index]) ++ return -EINVAL; ++ ++ f->pixelformat = fmt_out->pixfmts_cap[f->index]; ++ } else { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int vdec_enum_framesizes(struct file *file, void *fh, ++ struct v4l2_frmsizeenum *fsize) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ const struct amvdec_format *formats = sess->core->platform->formats; ++ const struct amvdec_format *fmt; ++ u32 num_formats = sess->core->platform->num_formats; ++ ++ fmt = find_format(formats, num_formats, fsize->pixel_format); ++ if (!fmt || fsize->index) ++ return -EINVAL; ++ ++ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; ++ ++ fsize->stepwise.min_width = 256; ++ fsize->stepwise.max_width = fmt->max_width; ++ fsize->stepwise.step_width = 1; ++ fsize->stepwise.min_height = 144; ++ fsize->stepwise.max_height = fmt->max_height; ++ fsize->stepwise.step_height = 1; ++ ++ return 0; ++} ++ ++static int ++vdec_try_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) ++{ ++ switch (cmd->cmd) { ++ case V4L2_DEC_CMD_STOP: ++ if (cmd->flags & V4L2_DEC_CMD_STOP_TO_BLACK) ++ return -EINVAL; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int ++vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ struct device *dev = sess->core->dev; ++ int ret; ++ ++ ret = vdec_try_decoder_cmd(file, fh, cmd); ++ if (ret) ++ return ret; ++ ++ if (!(sess->streamon_out & sess->streamon_cap)) ++ return 0; ++ ++ dev_dbg(dev, "Received V4L2_DEC_CMD_STOP\n"); ++ sess->should_stop = 1; ++ ++ vdec_wait_inactive(sess); ++ ++ if (codec_ops->drain) { ++ codec_ops->drain(sess); ++ } else if (codec_ops->eos_sequence) { ++ u32 len; ++ const u8 *data = codec_ops->eos_sequence(&len); ++ ++ esparser_queue_eos(sess->core, data, len); ++ } ++ ++ return ret; ++} ++ ++static int vdec_subscribe_event(struct v4l2_fh *fh, ++ const struct v4l2_event_subscription *sub) ++{ ++ switch (sub->type) { ++ case V4L2_EVENT_EOS: ++ return v4l2_event_subscribe(fh, sub, 2, NULL); ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int vdec_cropcap(struct file *file, void *fh, ++ struct v4l2_cropcap *crop) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ ++ if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) ++ return -EINVAL; ++ ++ crop->pixelaspect = sess->pixelaspect; ++ return 0; ++} ++ ++static const struct v4l2_ioctl_ops vdec_ioctl_ops = { ++ .vidioc_querycap = vdec_querycap, ++ .vidioc_enum_fmt_vid_cap_mplane = vdec_enum_fmt, ++ .vidioc_enum_fmt_vid_out_mplane = vdec_enum_fmt, ++ .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt, ++ .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt, ++ .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt, ++ .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt, ++ .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt, ++ .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt, ++ .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, ++ .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, ++ .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, ++ .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, ++ .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, ++ .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, ++ .vidioc_streamon = v4l2_m2m_ioctl_streamon, ++ .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, ++ .vidioc_enum_framesizes = vdec_enum_framesizes, ++ .vidioc_subscribe_event = vdec_subscribe_event, ++ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, ++ .vidioc_try_decoder_cmd = vdec_try_decoder_cmd, ++ .vidioc_decoder_cmd = vdec_decoder_cmd, ++ .vidioc_cropcap = vdec_cropcap, ++}; ++ ++static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, ++ struct vb2_queue *dst_vq) ++{ ++ struct amvdec_session *sess = priv; ++ int ret; ++ ++ src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; ++ src_vq->io_modes = VB2_MMAP | VB2_DMABUF; ++ src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; ++ src_vq->ops = &vdec_vb2_ops; ++ src_vq->mem_ops = &vb2_dma_contig_memops; ++ src_vq->drv_priv = sess; ++ src_vq->buf_struct_size = sizeof(struct dummy_buf); ++ src_vq->min_buffers_needed = 1; ++ src_vq->dev = sess->core->dev; ++ src_vq->lock = &sess->lock; ++ ret = vb2_queue_init(src_vq); ++ if (ret) ++ return ret; ++ ++ dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; ++ dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; ++ dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; ++ dst_vq->ops = &vdec_vb2_ops; ++ dst_vq->mem_ops = &vb2_dma_contig_memops; ++ dst_vq->drv_priv = sess; ++ dst_vq->buf_struct_size = sizeof(struct dummy_buf); ++ dst_vq->min_buffers_needed = 1; ++ dst_vq->dev = sess->core->dev; ++ dst_vq->lock = &sess->lock; ++ ret = vb2_queue_init(dst_vq); ++ if (ret) { ++ vb2_queue_release(src_vq); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int vdec_open(struct file *file) ++{ ++ struct amvdec_core *core = video_drvdata(file); ++ struct device *dev = core->dev; ++ const struct amvdec_format *formats = core->platform->formats; ++ struct amvdec_session *sess; ++ int ret; ++ ++ sess = kzalloc(sizeof(*sess), GFP_KERNEL); ++ if (!sess) ++ return -ENOMEM; ++ ++ sess->core = core; ++ ++ sess->m2m_dev = v4l2_m2m_init(&vdec_m2m_ops); ++ if (IS_ERR(sess->m2m_dev)) { ++ dev_err(dev, "Fail to v4l2_m2m_init\n"); ++ ret = PTR_ERR(sess->m2m_dev); ++ goto err_free_sess; ++ } ++ ++ sess->m2m_ctx = v4l2_m2m_ctx_init(sess->m2m_dev, sess, m2m_queue_init); ++ if (IS_ERR(sess->m2m_ctx)) { ++ dev_err(dev, "Fail to v4l2_m2m_ctx_init\n"); ++ ret = PTR_ERR(sess->m2m_ctx); ++ goto err_m2m_release; ++ } ++ ++ sess->pixfmt_cap = formats[0].pixfmts_cap[0]; ++ sess->fmt_out = &formats[0]; ++ sess->width = 1280; ++ sess->height = 720; ++ sess->pixelaspect.numerator = 1; ++ sess->pixelaspect.denominator = 1; ++ ++ INIT_LIST_HEAD(&sess->timestamps); ++ INIT_LIST_HEAD(&sess->bufs_recycle); ++ INIT_WORK(&sess->esparser_queue_work, esparser_queue_all_src); ++ mutex_init(&sess->lock); ++ mutex_init(&sess->bufs_recycle_lock); ++ spin_lock_init(&sess->ts_spinlock); ++ ++ v4l2_fh_init(&sess->fh, core->vdev_dec); ++ v4l2_fh_add(&sess->fh); ++ sess->fh.m2m_ctx = sess->m2m_ctx; ++ file->private_data = &sess->fh; ++ ++ return 0; ++ ++err_m2m_release: ++ v4l2_m2m_release(sess->m2m_dev); ++err_free_sess: ++ kfree(sess); ++ return ret; ++} ++ ++static int vdec_close(struct file *file) ++{ ++ struct amvdec_session *sess = ++ container_of(file->private_data, struct amvdec_session, fh); ++ ++ v4l2_m2m_ctx_release(sess->m2m_ctx); ++ v4l2_m2m_release(sess->m2m_dev); ++ v4l2_fh_del(&sess->fh); ++ v4l2_fh_exit(&sess->fh); ++ ++ mutex_destroy(&sess->lock); ++ mutex_destroy(&sess->bufs_recycle_lock); ++ ++ kfree(sess); ++ ++ return 0; ++} ++ ++static const struct v4l2_file_operations vdec_fops = { ++ .owner = THIS_MODULE, ++ .open = vdec_open, ++ .release = vdec_close, ++ .unlocked_ioctl = video_ioctl2, ++ .poll = v4l2_m2m_fop_poll, ++ .mmap = v4l2_m2m_fop_mmap, ++}; ++ ++static irqreturn_t vdec_isr(int irq, void *data) ++{ ++ struct amvdec_core *core = data; ++ struct amvdec_session *sess = core->cur_sess; ++ ++ sess->last_irq_jiffies = get_jiffies_64(); ++ ++ return sess->fmt_out->codec_ops->isr(sess); ++} ++ ++static irqreturn_t vdec_threaded_isr(int irq, void *data) ++{ ++ struct amvdec_core *core = data; ++ struct amvdec_session *sess = core->cur_sess; ++ ++ return sess->fmt_out->codec_ops->threaded_isr(sess); ++} ++ ++static const struct of_device_id vdec_dt_match[] = { ++ { .compatible = "amlogic,gxbb-vdec", ++ .data = &vdec_platform_gxbb }, ++ { .compatible = "amlogic,gxm-vdec", ++ .data = &vdec_platform_gxm }, ++ { .compatible = "amlogic,gxl-vdec", ++ .data = &vdec_platform_gxl }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, vdec_dt_match); ++ ++static int vdec_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct video_device *vdev; ++ struct amvdec_core *core; ++ struct resource *r; ++ const struct of_device_id *of_id; ++ int irq; ++ int ret; ++ ++ core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); ++ if (!core) ++ return -ENOMEM; ++ ++ core->dev = dev; ++ platform_set_drvdata(pdev, core); ++ ++ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dos"); ++ core->dos_base = devm_ioremap_resource(dev, r); ++ if (IS_ERR(core->dos_base)) { ++ dev_err(dev, "Couldn't remap DOS memory\n"); ++ return PTR_ERR(core->dos_base); ++ } ++ ++ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "esparser"); ++ core->esparser_base = devm_ioremap_resource(dev, r); ++ if (IS_ERR(core->esparser_base)) { ++ dev_err(dev, "Couldn't remap ESPARSER memory\n"); ++ return PTR_ERR(core->esparser_base); ++ } ++ ++ core->regmap_ao = syscon_regmap_lookup_by_phandle(dev->of_node, ++ "amlogic,ao-sysctrl"); ++ if (IS_ERR(core->regmap_ao)) { ++ dev_err(dev, "Couldn't regmap AO sysctrl\n"); ++ return PTR_ERR(core->regmap_ao); ++ } ++ ++ core->canvas = meson_canvas_get(dev); ++ if (!core->canvas) ++ return PTR_ERR(core->canvas); ++ ++ core->dos_parser_clk = devm_clk_get(dev, "dos_parser"); ++ if (IS_ERR(core->dos_parser_clk)) ++ return -EPROBE_DEFER; ++ ++ core->dos_clk = devm_clk_get(dev, "dos"); ++ if (IS_ERR(core->dos_clk)) ++ return -EPROBE_DEFER; ++ ++ core->vdec_1_clk = devm_clk_get(dev, "vdec_1"); ++ if (IS_ERR(core->vdec_1_clk)) ++ return -EPROBE_DEFER; ++ ++ core->vdec_hevc_clk = devm_clk_get(dev, "vdec_hevc"); ++ if (IS_ERR(core->vdec_hevc_clk)) ++ return -EPROBE_DEFER; ++ ++ irq = platform_get_irq_byname(pdev, "vdec"); ++ if (irq < 0) ++ return irq; ++ ++ ret = devm_request_threaded_irq(core->dev, irq, vdec_isr, ++ vdec_threaded_isr, IRQF_ONESHOT, ++ "vdec", core); ++ if (ret) ++ return ret; ++ ++ ret = esparser_init(pdev, core); ++ if (ret) ++ return ret; ++ ++ ret = v4l2_device_register(dev, &core->v4l2_dev); ++ if (ret) { ++ dev_err(dev, "Couldn't register v4l2 device\n"); ++ return -ENOMEM; ++ } ++ ++ vdev = video_device_alloc(); ++ if (!vdev) { ++ ret = -ENOMEM; ++ goto err_vdev_release; ++ } ++ ++ of_id = of_match_node(vdec_dt_match, dev->of_node); ++ core->platform = of_id->data; ++ core->vdev_dec = vdev; ++ core->dev_dec = dev; ++ mutex_init(&core->lock); ++ ++ strscpy(vdev->name, "meson-video-decoder", sizeof(vdev->name)); ++ vdev->release = video_device_release; ++ vdev->fops = &vdec_fops; ++ vdev->ioctl_ops = &vdec_ioctl_ops; ++ vdev->vfl_dir = VFL_DIR_M2M; ++ vdev->v4l2_dev = &core->v4l2_dev; ++ vdev->lock = &core->lock; ++ vdev->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING; ++ ++ video_set_drvdata(vdev, core); ++ ++ ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); ++ if (ret) { ++ dev_err(dev, "Failed registering video device\n"); ++ goto err_vdev_release; ++ } ++ ++ return 0; ++ ++err_vdev_release: ++ video_device_release(vdev); ++ return ret; ++} ++ ++static int vdec_remove(struct platform_device *pdev) ++{ ++ struct amvdec_core *core = platform_get_drvdata(pdev); ++ ++ video_unregister_device(core->vdev_dec); ++ ++ return 0; ++} ++ ++static struct platform_driver meson_vdec_driver = { ++ .probe = vdec_probe, ++ .remove = vdec_remove, ++ .driver = { ++ .name = "meson-vdec", ++ .of_match_table = vdec_dt_match, ++ }, ++}; ++module_platform_driver(meson_vdec_driver); ++ ++MODULE_DESCRIPTION("Meson video decoder driver for GXBB/GXL/GXM"); ++MODULE_AUTHOR("Maxime Jourdan "); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h +new file mode 100644 +index 000000000000..4e8c3f1742ac +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec.h +@@ -0,0 +1,251 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_CORE_H_ ++#define __MESON_VDEC_CORE_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vdec_platform.h" ++ ++/* 32 buffers in 3-plane YUV420 */ ++#define MAX_CANVAS (32 * 3) ++ ++struct amvdec_buffer { ++ struct list_head list; ++ struct vb2_buffer *vb; ++}; ++ ++/** ++ * struct amvdec_timestamp - stores a src timestamp along with a VIFIFO offset ++ * ++ * @list: used to make lists out of this struct ++ * @ts: timestamp ++ * @offset: offset in the VIFIFO where the associated packet was written ++ */ ++struct amvdec_timestamp { ++ struct list_head list; ++ u64 ts; ++ u32 offset; ++}; ++ ++struct amvdec_session; ++ ++/** ++ * struct amvdec_core - device parameters, singleton ++ * ++ * @dos_base: DOS memory base address ++ * @esparser_base: PARSER memory base address ++ * @regmap_ao: regmap for the AO bus ++ * @dev: core device ++ * @dev_dec: decoder device ++ * @platform: platform-specific data ++ * @canvas: canvas provider reference ++ * @dos_parser_clk: DOS_PARSER clock ++ * @dos_clk: DOS clock ++ * @vdec_1_clk: VDEC_1 clock ++ * @vdec_hevc_clk: VDEC_HEVC clock ++ * @esparser_reset: RESET for the PARSER ++ * @vdec_dec: video device for the decoder ++ * @v4l2_dev: v4l2 device ++ * @cur_sess: current decoding session ++ * @lock: lock for this structure ++ */ ++struct amvdec_core { ++ void __iomem *dos_base; ++ void __iomem *esparser_base; ++ struct regmap *regmap_ao; ++ ++ struct device *dev; ++ struct device *dev_dec; ++ const struct vdec_platform *platform; ++ ++ struct meson_canvas *canvas; ++ ++ struct clk *dos_parser_clk; ++ struct clk *dos_clk; ++ struct clk *vdec_1_clk; ++ struct clk *vdec_hevc_clk; ++ ++ struct reset_control *esparser_reset; ++ ++ struct video_device *vdev_dec; ++ struct v4l2_device v4l2_dev; ++ ++ struct amvdec_session *cur_sess; ++ struct mutex lock; ++}; ++ ++/** ++ * struct amvdec_ops - vdec operations ++ * ++ * @start: mandatory call when the vdec needs to initialize ++ * @stop: mandatory call when the vdec needs to stop ++ * @conf_esparser: mandatory call to let the vdec configure the ESPARSER ++ * @vififo_level: mandatory call to get the current amount of data ++ * in the VIFIFO ++ * @use_offsets: mandatory call. Returns 1 if the VDEC supports vififo offsets ++ */ ++struct amvdec_ops { ++ int (*start)(struct amvdec_session *sess); ++ int (*stop)(struct amvdec_session *sess); ++ void (*conf_esparser)(struct amvdec_session *sess); ++ u32 (*vififo_level)(struct amvdec_session *sess); ++}; ++ ++/** ++ * struct amvdec_codec_ops - codec operations ++ * ++ * @start: mandatory call when the codec needs to initialize ++ * @stop: mandatory call when the codec needs to stop ++ * @load_extended_firmware: optional call to load additional firmware bits ++ * @num_pending_bufs: optional call to get the number of dst buffers on hold ++ * @can_recycle: optional call to know if the codec is ready to recycle ++ * a dst buffer ++ * @recycle: optional call to tell the codec to recycle a dst buffer. Must go ++ * in pair with @can_recycle ++ * @drain: optional call if the codec has a custom way of draining ++ * @eos_sequence: optional call to get an end sequence to send to esparser ++ * for flush. Mutually exclusive with @drain. ++ * @isr: mandatory call when the ISR triggers ++ * @threaded_isr: mandatory call for the threaded ISR ++ */ ++struct amvdec_codec_ops { ++ int (*start)(struct amvdec_session *sess); ++ int (*stop)(struct amvdec_session *sess); ++ int (*load_extended_firmware)(struct amvdec_session *sess, ++ const u8 *data, u32 len); ++ u32 (*num_pending_bufs)(struct amvdec_session *sess); ++ int (*can_recycle)(struct amvdec_core *core); ++ void (*recycle)(struct amvdec_core *core, u32 buf_idx); ++ void (*drain)(struct amvdec_session *sess); ++ const u8 * (*eos_sequence)(u32 *len); ++ irqreturn_t (*isr)(struct amvdec_session *sess); ++ irqreturn_t (*threaded_isr)(struct amvdec_session *sess); ++}; ++ ++/** ++ * struct amvdec_format - describes one of the OUTPUT (src) format supported ++ * ++ * @pixfmt: V4L2 pixel format ++ * @min_buffers: minimum amount of CAPTURE (dst) buffers ++ * @max_buffers: maximum amount of CAPTURE (dst) buffers ++ * @max_width: maximum picture width supported ++ * @max_height: maximum picture height supported ++ * @vdec_ops: the VDEC operations that support this format ++ * @codec_ops: the codec operations that support this format ++ * @firmware_path: Path to the firmware that supports this format ++ * @pixfmts_cap: list of CAPTURE pixel formats available with pixfmt ++ */ ++struct amvdec_format { ++ u32 pixfmt; ++ u32 min_buffers; ++ u32 max_buffers; ++ u32 max_width; ++ u32 max_height; ++ ++ struct amvdec_ops *vdec_ops; ++ struct amvdec_codec_ops *codec_ops; ++ ++ char *firmware_path; ++ u32 pixfmts_cap[4]; ++}; ++ ++/** ++ * struct amvdec_session - decoding session parameters ++ * ++ * @core: reference to the vdec core struct ++ * @fh: v4l2 file handle ++ * @m2m_dev: v4l2 m2m device ++ * @m2m_ctx: v4l2 m2m context ++ * @lock: session lock ++ * @fmt_out: vdec pixel format for the OUTPUT queue ++ * @pixfmt_cap: V4L2 pixel format for the CAPTURE queue ++ * @width: current picture width ++ * @height: current picture height ++ * @colorspace: current colorspace ++ * @ycbcr_enc: current ycbcr_enc ++ * @quantization: current quantization ++ * @xfer_func: current transfer function ++ * @pixelaspect: Pixel Aspect Ratio reported by the decoder ++ * @esparser_queued_bufs: number of buffers currently queued into ESPARSER ++ * @esparser_queue_work: work struct for the ESPARSER to process src buffers ++ * @streamon_cap: stream on flag for capture queue ++ * @streamon_out: stream on flag for output queue ++ * @sequence_cap: capture sequence counter ++ * @should_stop: flag set if userspace signaled EOS via command ++ * or empty buffer ++ * @keyframe_found: flag set once a keyframe has been parsed ++ * @canvas_alloc: array of all the canvas IDs allocated ++ * @canvas_num: number of canvas IDs allocated ++ * @vififo_vaddr: virtual address for the VIFIFO ++ * @vififo_paddr: physical address for the VIFIFO ++ * @vififo_size: size of the VIFIFO dma alloc ++ * @bufs_recycle: list of buffers that need to be recycled ++ * @bufs_recycle_lock: lock for the bufs_recycle list ++ * @recycle_thread: task struct for the recycling thread ++ * @timestamps: chronological list of src timestamps ++ * @ts_spinlock: spinlock for the timestamps list ++ * @last_irq_jiffies: tracks last time the vdec triggered an IRQ ++ * @priv: codec private data ++ */ ++struct amvdec_session { ++ struct amvdec_core *core; ++ ++ struct v4l2_fh fh; ++ struct v4l2_m2m_dev *m2m_dev; ++ struct v4l2_m2m_ctx *m2m_ctx; ++ struct mutex lock; ++ ++ const struct amvdec_format *fmt_out; ++ u32 pixfmt_cap; ++ ++ u32 width; ++ u32 height; ++ u32 colorspace; ++ u8 ycbcr_enc; ++ u8 quantization; ++ u8 xfer_func; ++ ++ struct v4l2_fract pixelaspect; ++ ++ atomic_t esparser_queued_bufs; ++ struct work_struct esparser_queue_work; ++ ++ unsigned int streamon_cap, streamon_out; ++ unsigned int sequence_cap; ++ unsigned int should_stop; ++ unsigned int keyframe_found; ++ ++ u8 canvas_alloc[MAX_CANVAS]; ++ u32 canvas_num; ++ ++ void *vififo_vaddr; ++ dma_addr_t vififo_paddr; ++ u32 vififo_size; ++ ++ struct list_head bufs_recycle; ++ struct mutex bufs_recycle_lock; ++ struct task_struct *recycle_thread; ++ ++ struct list_head timestamps; ++ spinlock_t ts_spinlock; ++ ++ u64 last_irq_jiffies; ++ u32 last_offset; ++ u32 wrap_count; ++ ++ void *priv; ++}; ++ ++u32 amvdec_get_output_size(struct amvdec_session *sess); ++ ++#endif +diff --git a/drivers/media/platform/meson/vdec/vdec_1.c b/drivers/media/platform/meson/vdec/vdec_1.c +new file mode 100644 +index 000000000000..88b8bed9441e +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_1.c +@@ -0,0 +1,231 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ * ++ * VDEC_1 is a video decoding block that allows decoding of ++ * MPEG 1/2/4, H.263, H.264, MJPEG, VC1 ++ */ ++ ++#include ++#include ++ ++#include "vdec_1.h" ++#include "vdec_helpers.h" ++#include "dos_regs.h" ++ ++/* AO Registers */ ++#define AO_RTI_GEN_PWR_SLEEP0 0xe8 ++#define AO_RTI_GEN_PWR_ISO0 0xec ++ #define GEN_PWR_VDEC_1 (BIT(3) | BIT(2)) ++ ++#define MC_SIZE (4096 * 4) ++ ++static int ++vdec_1_load_firmware(struct amvdec_session *sess, const char *fwname) ++{ ++ const struct firmware *fw; ++ struct amvdec_core *core = sess->core; ++ struct device *dev = core->dev_dec; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ static void *mc_addr; ++ static dma_addr_t mc_addr_map; ++ int ret; ++ u32 i = 1000; ++ ++ ret = request_firmware(&fw, fwname, dev); ++ if (ret < 0) ++ return -EINVAL; ++ ++ if (fw->size < MC_SIZE) { ++ dev_err(dev, "Firmware size %zu is too small. Expected %u.\n", ++ fw->size, MC_SIZE); ++ ret = -EINVAL; ++ goto release_firmware; ++ } ++ ++ mc_addr = dma_alloc_coherent(core->dev, MC_SIZE, ++ &mc_addr_map, GFP_KERNEL); ++ if (!mc_addr) { ++ dev_err(dev, ++ "Failed allocating memory for firmware loading\n"); ++ ret = -ENOMEM; ++ goto release_firmware; ++ } ++ ++ memcpy(mc_addr, fw->data, MC_SIZE); ++ ++ amvdec_write_dos(core, MPSR, 0); ++ amvdec_write_dos(core, CPSR, 0); ++ ++ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(31)); ++ ++ amvdec_write_dos(core, IMEM_DMA_ADR, mc_addr_map); ++ amvdec_write_dos(core, IMEM_DMA_COUNT, MC_SIZE / 4); ++ amvdec_write_dos(core, IMEM_DMA_CTRL, (0x8000 | (7 << 16))); ++ ++ while (--i && amvdec_read_dos(core, IMEM_DMA_CTRL) & 0x8000) { } ++ ++ if (i == 0) { ++ dev_err(dev, "Firmware load fail (DMA hang?)\n"); ++ ret = -EINVAL; ++ goto free_mc; ++ } ++ ++ if (codec_ops->load_extended_firmware) ++ ret = codec_ops->load_extended_firmware(sess, ++ fw->data + MC_SIZE, ++ fw->size - MC_SIZE); ++ ++free_mc: ++ dma_free_coherent(core->dev, MC_SIZE, mc_addr, mc_addr_map); ++release_firmware: ++ release_firmware(fw); ++ return ret; ++} ++ ++int vdec_1_stbuf_power_up(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_CONTROL, 0); ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_WRAP_COUNT, 0); ++ amvdec_write_dos(core, POWER_CTL_VLD, BIT(4)); ++ ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_START_PTR, sess->vififo_paddr); ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_CURR_PTR, sess->vififo_paddr); ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_END_PTR, ++ sess->vififo_paddr + sess->vififo_size - 8); ++ ++ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, 1); ++ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, 1); ++ ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_BUF_CNTL, MEM_BUFCTRL_MANUAL); ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_WP, sess->vififo_paddr); ++ ++ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); ++ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); ++ ++ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, ++ (0x11 << MEM_FIFO_CNT_BIT) | MEM_FILL_ON_LEVEL | ++ MEM_CTRL_FILL_EN | MEM_CTRL_EMPTY_EN); ++ ++ return 0; ++} ++ ++static void vdec_1_conf_esparser(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ ++ /* VDEC_1 specific ESPARSER stuff */ ++ amvdec_write_dos(core, DOS_GEN_CTRL0, 0); ++ amvdec_write_dos(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); ++ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); ++} ++ ++static u32 vdec_1_vififo_level(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ ++ return amvdec_read_dos(core, VLD_MEM_VIFIFO_LEVEL); ++} ++ ++static int vdec_1_stop(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ ++ amvdec_write_dos(core, MPSR, 0); ++ amvdec_write_dos(core, CPSR, 0); ++ amvdec_write_dos(core, ASSIST_MBOX1_MASK, 0); ++ ++ amvdec_write_dos(core, DOS_SW_RESET0, BIT(12) | BIT(11)); ++ amvdec_write_dos(core, DOS_SW_RESET0, 0); ++ amvdec_read_dos(core, DOS_SW_RESET0); ++ ++ /* enable vdec1 isolation */ ++ regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0xc0); ++ /* power off vdec1 memories */ ++ amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0xffffffff); ++ /* power off vdec1 */ ++ regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VDEC_1, GEN_PWR_VDEC_1); ++ ++ clk_disable_unprepare(core->vdec_1_clk); ++ ++ if (sess->priv) ++ codec_ops->stop(sess); ++ ++ return 0; ++} ++ ++static int vdec_1_start(struct amvdec_session *sess) ++{ ++ int ret; ++ struct amvdec_core *core = sess->core; ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; ++ ++ /* Configure the vdec clk to the maximum available */ ++ clk_set_rate(core->vdec_1_clk, 666666666); ++ ret = clk_prepare_enable(core->vdec_1_clk); ++ if (ret) ++ return ret; ++ ++ regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VDEC_1, 0); ++ udelay(10); ++ ++ /* Reset VDEC1 */ ++ amvdec_write_dos(core, DOS_SW_RESET0, 0xfffffffc); ++ amvdec_write_dos(core, DOS_SW_RESET0, 0x00000000); ++ ++ amvdec_write_dos(core, DOS_GCLK_EN0, 0x3ff); ++ ++ /* enable VDEC Memories */ ++ amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0); ++ /* Remove VDEC1 Isolation */ ++ regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0); ++ /* Reset DOS top registers */ ++ amvdec_write_dos(core, DOS_VDEC_MCRCC_STALL_CTRL, 0); ++ ++ amvdec_write_dos(core, GCLK_EN, 0x3ff); ++ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(31)); ++ ++ vdec_1_stbuf_power_up(sess); ++ ++ ret = vdec_1_load_firmware(sess, sess->fmt_out->firmware_path); ++ if (ret) ++ goto stop; ++ ++ ret = codec_ops->start(sess); ++ if (ret) ++ goto stop; ++ ++ /* Enable IRQ */ ++ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); ++ amvdec_write_dos(core, ASSIST_MBOX1_MASK, 1); ++ ++ /* Enable 2-plane output */ ++ if (sess->pixfmt_cap == V4L2_PIX_FMT_NV12M) ++ amvdec_write_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(17)); ++ else ++ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(17)); ++ ++ /* Enable firmware processor */ ++ amvdec_write_dos(core, MPSR, 1); ++ /* Let the firmware settle */ ++ udelay(10); ++ ++ return 0; ++ ++stop: ++ vdec_1_stop(sess); ++ return ret; ++} ++ ++struct amvdec_ops vdec_1_ops = { ++ .start = vdec_1_start, ++ .stop = vdec_1_stop, ++ .conf_esparser = vdec_1_conf_esparser, ++ .vififo_level = vdec_1_vififo_level, ++}; +diff --git a/drivers/media/platform/meson/vdec/vdec_1.h b/drivers/media/platform/meson/vdec/vdec_1.h +new file mode 100644 +index 000000000000..042d930c40d7 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_1.h +@@ -0,0 +1,14 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_VDEC_1_H_ ++#define __MESON_VDEC_VDEC_1_H_ ++ ++#include "vdec.h" ++ ++extern struct amvdec_ops vdec_1_ops; ++ ++#endif +diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.c b/drivers/media/platform/meson/vdec/vdec_helpers.c +new file mode 100644 +index 000000000000..02090c5b089e +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_helpers.c +@@ -0,0 +1,412 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "vdec_helpers.h" ++ ++#define NUM_CANVAS_NV12 2 ++#define NUM_CANVAS_YUV420 3 ++ ++u32 amvdec_read_dos(struct amvdec_core *core, u32 reg) ++{ ++ return readl_relaxed(core->dos_base + reg); ++} ++EXPORT_SYMBOL_GPL(amvdec_read_dos); ++ ++void amvdec_write_dos(struct amvdec_core *core, u32 reg, u32 val) ++{ ++ writel_relaxed(val, core->dos_base + reg); ++} ++EXPORT_SYMBOL_GPL(amvdec_write_dos); ++ ++void amvdec_write_dos_bits(struct amvdec_core *core, u32 reg, u32 val) ++{ ++ amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) | val); ++} ++EXPORT_SYMBOL_GPL(amvdec_write_dos_bits); ++ ++void amvdec_clear_dos_bits(struct amvdec_core *core, u32 reg, u32 val) ++{ ++ amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) & ~val); ++} ++EXPORT_SYMBOL_GPL(amvdec_clear_dos_bits); ++ ++u32 amvdec_read_parser(struct amvdec_core *core, u32 reg) ++{ ++ return readl_relaxed(core->esparser_base + reg); ++} ++EXPORT_SYMBOL_GPL(amvdec_read_parser); ++ ++void amvdec_write_parser(struct amvdec_core *core, u32 reg, u32 val) ++{ ++ writel_relaxed(val, core->esparser_base + reg); ++} ++EXPORT_SYMBOL_GPL(amvdec_write_parser); ++ ++static int canvas_alloc(struct amvdec_session *sess, u8 *canvas_id) ++{ ++ int ret; ++ ++ if (sess->canvas_num >= MAX_CANVAS) { ++ dev_err(sess->core->dev, "Reached max number of canvas\n"); ++ return -ENOMEM; ++ } ++ ++ ret = meson_canvas_alloc(sess->core->canvas, canvas_id); ++ if (ret) ++ return ret; ++ ++ sess->canvas_alloc[sess->canvas_num++] = *canvas_id; ++ return 0; ++} ++ ++static int set_canvas_yuv420m(struct amvdec_session *sess, ++ struct vb2_buffer *vb, u32 width, ++ u32 height, u32 reg) ++{ ++ struct amvdec_core *core = sess->core; ++ u8 canvas_id[NUM_CANVAS_YUV420]; /* Y U V */ ++ dma_addr_t buf_paddr[NUM_CANVAS_YUV420]; /* Y U V */ ++ int ret, i; ++ ++ for (i = 0; i < NUM_CANVAS_YUV420; ++i) { ++ ret = canvas_alloc(sess, &canvas_id[i]); ++ if (ret) ++ return ret; ++ ++ buf_paddr[i] = ++ vb2_dma_contig_plane_dma_addr(vb, i); ++ } ++ ++ /* Y plane */ ++ meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0], ++ width, height, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ ++ /* U plane */ ++ meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1], ++ width / 2, height / 2, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ ++ /* V plane */ ++ meson_canvas_config(core->canvas, canvas_id[2], buf_paddr[2], ++ width / 2, height / 2, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ ++ amvdec_write_dos(core, reg, ++ ((canvas_id[2]) << 16) | ++ ((canvas_id[1]) << 8) | ++ (canvas_id[0])); ++ ++ return 0; ++} ++ ++static int set_canvas_nv12m(struct amvdec_session *sess, ++ struct vb2_buffer *vb, u32 width, ++ u32 height, u32 reg) ++{ ++ struct amvdec_core *core = sess->core; ++ u8 canvas_id[NUM_CANVAS_NV12]; /* Y U/V */ ++ dma_addr_t buf_paddr[NUM_CANVAS_NV12]; /* Y U/V */ ++ int ret, i; ++ ++ for (i = 0; i < NUM_CANVAS_NV12; ++i) { ++ ret = canvas_alloc(sess, &canvas_id[i]); ++ if (ret) ++ return ret; ++ ++ buf_paddr[i] = ++ vb2_dma_contig_plane_dma_addr(vb, i); ++ } ++ ++ /* Y plane */ ++ meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0], ++ width, height, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ ++ /* U/V plane */ ++ meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1], ++ width, height / 2, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR, ++ MESON_CANVAS_ENDIAN_SWAP64); ++ ++ amvdec_write_dos(core, reg, ++ ((canvas_id[1]) << 16) | ++ ((canvas_id[1]) << 8) | ++ (canvas_id[0])); ++ ++ return 0; ++} ++ ++int amvdec_set_canvases(struct amvdec_session *sess, ++ u32 reg_base[], u32 reg_num[]) ++{ ++ struct v4l2_m2m_buffer *buf; ++ u32 pixfmt = sess->pixfmt_cap; ++ u32 width = ALIGN(sess->width, 64); ++ u32 height = ALIGN(sess->height, 64); ++ u32 reg_cur = reg_base[0]; ++ u32 reg_num_cur = 0; ++ u32 reg_base_cur = 0; ++ int ret; ++ ++ v4l2_m2m_for_each_dst_buf(sess->m2m_ctx, buf) { ++ if (!reg_base[reg_base_cur]) ++ return -EINVAL; ++ ++ reg_cur = reg_base[reg_base_cur] + reg_num_cur * 4; ++ ++ switch (pixfmt) { ++ case V4L2_PIX_FMT_NV12M: ++ ret = set_canvas_nv12m(sess, &buf->vb.vb2_buf, width, ++ height, reg_cur); ++ if (ret) ++ return ret; ++ break; ++ case V4L2_PIX_FMT_YUV420M: ++ ret = set_canvas_yuv420m(sess, &buf->vb.vb2_buf, width, ++ height, reg_cur); ++ if (ret) ++ return ret; ++ break; ++ default: ++ dev_err(sess->core->dev, "Unsupported pixfmt %08X\n", ++ pixfmt); ++ return -EINVAL; ++ }; ++ ++ reg_num_cur++; ++ if (reg_num_cur >= reg_num[reg_base_cur]) { ++ reg_base_cur++; ++ reg_num_cur = 0; ++ } ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(amvdec_set_canvases); ++ ++void amvdec_add_ts_reorder(struct amvdec_session *sess, u64 ts, u32 offset) ++{ ++ struct amvdec_timestamp *new_ts, *tmp; ++ unsigned long flags; ++ ++ new_ts = kmalloc(sizeof(*new_ts), GFP_KERNEL); ++ new_ts->ts = ts; ++ new_ts->offset = offset; ++ ++ spin_lock_irqsave(&sess->ts_spinlock, flags); ++ ++ if (list_empty(&sess->timestamps)) ++ goto add_tail; ++ ++ list_for_each_entry(tmp, &sess->timestamps, list) { ++ if (ts <= tmp->ts) { ++ list_add_tail(&new_ts->list, &tmp->list); ++ goto unlock; ++ } ++ } ++ ++add_tail: ++ list_add_tail(&new_ts->list, &sess->timestamps); ++unlock: ++ spin_unlock_irqrestore(&sess->ts_spinlock, flags); ++} ++EXPORT_SYMBOL_GPL(amvdec_add_ts_reorder); ++ ++void amvdec_remove_ts(struct amvdec_session *sess, u64 ts) ++{ ++ struct amvdec_timestamp *tmp; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&sess->ts_spinlock, flags); ++ list_for_each_entry(tmp, &sess->timestamps, list) { ++ if (tmp->ts == ts) { ++ list_del(&tmp->list); ++ kfree(tmp); ++ goto unlock; ++ } ++ } ++ dev_warn(sess->core->dev_dec, ++ "Couldn't remove buffer with timestamp %llu from list\n", ts); ++ ++unlock: ++ spin_unlock_irqrestore(&sess->ts_spinlock, flags); ++} ++EXPORT_SYMBOL_GPL(amvdec_remove_ts); ++ ++static void dst_buf_done(struct amvdec_session *sess, ++ struct vb2_v4l2_buffer *vbuf, ++ u32 field, ++ u64 timestamp) ++{ ++ struct device *dev = sess->core->dev_dec; ++ u32 output_size = amvdec_get_output_size(sess); ++ ++ switch (sess->pixfmt_cap) { ++ case V4L2_PIX_FMT_NV12M: ++ vbuf->vb2_buf.planes[0].bytesused = output_size; ++ vbuf->vb2_buf.planes[1].bytesused = output_size / 2; ++ break; ++ case V4L2_PIX_FMT_YUV420M: ++ vbuf->vb2_buf.planes[0].bytesused = output_size; ++ vbuf->vb2_buf.planes[1].bytesused = output_size / 4; ++ vbuf->vb2_buf.planes[2].bytesused = output_size / 4; ++ break; ++ } ++ ++ vbuf->vb2_buf.timestamp = timestamp; ++ vbuf->sequence = sess->sequence_cap++; ++ ++ if (sess->should_stop && ++ atomic_read(&sess->esparser_queued_bufs) <= 2) { ++ const struct v4l2_event ev = { .type = V4L2_EVENT_EOS }; ++ ++ dev_dbg(dev, "Signaling EOS\n"); ++ v4l2_event_queue_fh(&sess->fh, &ev); ++ vbuf->flags |= V4L2_BUF_FLAG_LAST; ++ } else if (sess->should_stop) ++ dev_dbg(dev, "should_stop, %u bufs remain\n", ++ atomic_read(&sess->esparser_queued_bufs)); ++ ++ dev_dbg(dev, "Buffer %u done\n", vbuf->vb2_buf.index); ++ vbuf->field = field; ++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); ++ ++ /* Buffer done probably means the vififo got freed */ ++ schedule_work(&sess->esparser_queue_work); ++} ++ ++void amvdec_dst_buf_done(struct amvdec_session *sess, ++ struct vb2_v4l2_buffer *vbuf, u32 field) ++{ ++ struct device *dev = sess->core->dev_dec; ++ struct amvdec_timestamp *tmp; ++ struct list_head *timestamps = &sess->timestamps; ++ u64 timestamp; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&sess->ts_spinlock, flags); ++ if (list_empty(timestamps)) { ++ dev_err(dev, "Buffer %u done but list is empty\n", ++ vbuf->vb2_buf.index); ++ ++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); ++ spin_unlock_irqrestore(&sess->ts_spinlock, flags); ++ return; ++ } ++ ++ tmp = list_first_entry(timestamps, struct amvdec_timestamp, list); ++ timestamp = tmp->ts; ++ list_del(&tmp->list); ++ kfree(tmp); ++ spin_unlock_irqrestore(&sess->ts_spinlock, flags); ++ ++ dst_buf_done(sess, vbuf, field, timestamp); ++ atomic_dec(&sess->esparser_queued_bufs); ++} ++EXPORT_SYMBOL_GPL(amvdec_dst_buf_done); ++ ++static void amvdec_dst_buf_done_offset(struct amvdec_session *sess, ++ struct vb2_v4l2_buffer *vbuf, ++ u32 offset, ++ u32 field) ++{ ++ struct device *dev = sess->core->dev_dec; ++ struct amvdec_timestamp *match = NULL; ++ struct amvdec_timestamp *tmp, *n; ++ u64 timestamp = 0; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&sess->ts_spinlock, flags); ++ ++ /* Look for our vififo offset to get the corresponding timestamp. */ ++ list_for_each_entry_safe(tmp, n, &sess->timestamps, list) { ++ s64 delta = (s64)offset - tmp->offset; ++ ++ /* Offsets reported by codecs usually differ slightly, ++ * so we need some wiggle room. ++ * 4KiB being the minimum packet size, there is no risk here. ++ */ ++ if (delta > (-1 * (s32)SZ_4K) && delta < SZ_4K) { ++ match = tmp; ++ break; ++ } ++ ++ /* Delete any timestamp entry that appears before our target ++ * (not all src packets/timestamps lead to a frame) ++ */ ++ if (delta > 0 || delta < -1 * (s32)sess->vififo_size) { ++ atomic_dec(&sess->esparser_queued_bufs); ++ list_del(&tmp->list); ++ kfree(tmp); ++ } ++ } ++ ++ if (!match) { ++ dev_dbg(dev, "Buffer %u done but can't match offset (%08X)\n", ++ vbuf->vb2_buf.index, offset); ++ } else { ++ timestamp = match->ts; ++ list_del(&match->list); ++ kfree(match); ++ } ++ spin_unlock_irqrestore(&sess->ts_spinlock, flags); ++ ++ dst_buf_done(sess, vbuf, field, timestamp); ++ if (match) ++ atomic_dec(&sess->esparser_queued_bufs); ++} ++ ++void amvdec_dst_buf_done_idx(struct amvdec_session *sess, ++ u32 buf_idx, u32 offset, u32 field) ++{ ++ struct vb2_v4l2_buffer *vbuf; ++ struct device *dev = sess->core->dev_dec; ++ ++ vbuf = v4l2_m2m_dst_buf_remove_by_idx(sess->m2m_ctx, buf_idx); ++ if (!vbuf) { ++ dev_err(dev, ++ "Buffer %u done but it doesn't exist in m2m_ctx\n", ++ buf_idx); ++ return; ++ } ++ ++ if (offset != -1) ++ amvdec_dst_buf_done_offset(sess, vbuf, offset, field); ++ else ++ amvdec_dst_buf_done(sess, vbuf, field); ++} ++EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_idx); ++ ++void amvdec_set_par_from_dar(struct amvdec_session *sess, ++ u32 dar_num, u32 dar_den) ++{ ++ u32 div; ++ ++ sess->pixelaspect.numerator = sess->height * dar_num; ++ sess->pixelaspect.denominator = sess->width * dar_den; ++ div = gcd(sess->pixelaspect.numerator, sess->pixelaspect.denominator); ++ sess->pixelaspect.numerator /= div; ++ sess->pixelaspect.denominator /= div; ++} ++EXPORT_SYMBOL_GPL(amvdec_set_par_from_dar); ++ ++void amvdec_abort(struct amvdec_session *sess) ++{ ++ dev_info(sess->core->dev, "Aborting decoding session!\n"); ++ vb2_queue_error(&sess->m2m_ctx->cap_q_ctx.q); ++ vb2_queue_error(&sess->m2m_ctx->out_q_ctx.q); ++} ++EXPORT_SYMBOL_GPL(amvdec_abort); +diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.h b/drivers/media/platform/meson/vdec/vdec_helpers.h +new file mode 100644 +index 000000000000..b9250a8157c4 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_helpers.h +@@ -0,0 +1,48 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_HELPERS_H_ ++#define __MESON_VDEC_HELPERS_H_ ++ ++#include "vdec.h" ++ ++/** ++ * amvdec_set_canvases() - Map VB2 buffers to canvases ++ * ++ * @sess: current session ++ * @reg_base: Registry bases of where to write the canvas indexes ++ * @reg_num: number of contiguous registers after each reg_base (including it) ++ */ ++int amvdec_set_canvases(struct amvdec_session *sess, ++ u32 reg_base[], u32 reg_num[]); ++ ++u32 amvdec_read_dos(struct amvdec_core *core, u32 reg); ++void amvdec_write_dos(struct amvdec_core *core, u32 reg, u32 val); ++void amvdec_write_dos_bits(struct amvdec_core *core, u32 reg, u32 val); ++void amvdec_clear_dos_bits(struct amvdec_core *core, u32 reg, u32 val); ++u32 amvdec_read_parser(struct amvdec_core *core, u32 reg); ++void amvdec_write_parser(struct amvdec_core *core, u32 reg, u32 val); ++ ++void amvdec_dst_buf_done_idx(struct amvdec_session *sess, u32 buf_idx, ++ u32 offset, u32 field); ++void amvdec_dst_buf_done(struct amvdec_session *sess, ++ struct vb2_v4l2_buffer *vbuf, u32 field); ++ ++/** ++ * amvdec_add_ts_reorder() - Add a timestamp to the list in chronological order ++ * ++ * @sess: current session ++ * @ts: timestamp to add ++ * @offset: offset in the VIFIFO where the associated packet was written ++ */ ++void amvdec_add_ts_reorder(struct amvdec_session *sess, u64 ts, u32 offset); ++void amvdec_remove_ts(struct amvdec_session *sess, u64 ts); ++ ++void amvdec_set_par_from_dar(struct amvdec_session *sess, ++ u32 dar_num, u32 dar_den); ++ ++void amvdec_abort(struct amvdec_session *sess); ++#endif +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c +new file mode 100644 +index 000000000000..46eeb7426f54 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_platform.c +@@ -0,0 +1,101 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#include "vdec_platform.h" ++#include "vdec.h" ++ ++#include "vdec_1.h" ++#include "codec_mpeg12.h" ++ ++static const struct amvdec_format vdec_formats_gxbb[] = { ++ { ++ .pixfmt = V4L2_PIX_FMT_MPEG1, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_MPEG2, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, ++}; ++ ++static const struct amvdec_format vdec_formats_gxl[] = { ++ { ++ .pixfmt = V4L2_PIX_FMT_MPEG1, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_MPEG2, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, ++}; ++ ++static const struct amvdec_format vdec_formats_gxm[] = { ++ { ++ .pixfmt = V4L2_PIX_FMT_MPEG1, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_MPEG2, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg12_ops, ++ .firmware_path = "meson/gx/vmpeg12_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, ++}; ++ ++const struct vdec_platform vdec_platform_gxbb = { ++ .formats = vdec_formats_gxbb, ++ .num_formats = ARRAY_SIZE(vdec_formats_gxbb), ++ .revision = VDEC_REVISION_GXBB, ++}; ++ ++const struct vdec_platform vdec_platform_gxl = { ++ .formats = vdec_formats_gxl, ++ .num_formats = ARRAY_SIZE(vdec_formats_gxl), ++ .revision = VDEC_REVISION_GXL, ++}; ++ ++const struct vdec_platform vdec_platform_gxm = { ++ .formats = vdec_formats_gxm, ++ .num_formats = ARRAY_SIZE(vdec_formats_gxm), ++ .revision = VDEC_REVISION_GXM, ++}; +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.h b/drivers/media/platform/meson/vdec/vdec_platform.h +new file mode 100644 +index 000000000000..f6025326db1d +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_platform.h +@@ -0,0 +1,30 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 BayLibre, SAS ++ * Author: Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_PLATFORM_H_ ++#define __MESON_VDEC_PLATFORM_H_ ++ ++#include "vdec.h" ++ ++struct amvdec_format; ++ ++enum vdec_revision { ++ VDEC_REVISION_GXBB, ++ VDEC_REVISION_GXL, ++ VDEC_REVISION_GXM, ++}; ++ ++struct vdec_platform { ++ const struct amvdec_format *formats; ++ const u32 num_formats; ++ enum vdec_revision revision; ++}; ++ ++extern const struct vdec_platform vdec_platform_gxbb; ++extern const struct vdec_platform vdec_platform_gxm; ++extern const struct vdec_platform vdec_platform_gxl; ++ ++#endif +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch b/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch new file mode 100644 index 000000000..f243cd27b --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch @@ -0,0 +1,34 @@ +From c8482bffc8ced44e3e22f403413b23c7b20af1be Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Tue, 4 Sep 2018 10:07:08 +0200 +Subject: [PATCH 31/53] MAINTAINERS: Add meson video decoder + +Add an entry for the meson video decoder for amlogic SoCs. + +Signed-off-by: Maxime Jourdan +--- + MAINTAINERS | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/MAINTAINERS b/MAINTAINERS +index 11a59e82d92e..d2c0c0f8b406 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -9526,6 +9526,14 @@ F: drivers/media/platform/meson/ao-cec.c + F: Documentation/devicetree/bindings/media/meson-ao-cec.txt + T: git git://linuxtv.org/media_tree.git + ++MESON VIDEO DECODER DRIVER FOR AMLOGIC SOCS ++M: Maxime Jourdan ++L: linux-media@lists.freedesktop.org ++L: linux-amlogic@lists.infradead.org ++S: Supported ++F: drivers/media/platform/meson/vdec/ ++T: git git://linuxtv.org/media_tree.git ++ + MICROBLAZE ARCHITECTURE + M: Michal Simek + W: http://www.monstr.eu/fdt/ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch b/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch new file mode 100644 index 000000000..0e4dc0070 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch @@ -0,0 +1,40 @@ +From 91e2dc23af4fb673e609a4fddf2b813ea3f833b8 Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 29 Aug 2018 15:24:02 +0200 +Subject: [PATCH 32/53] arm64: dts: meson-gx: add vdec entry + +Add the video decoder dts entry + +Signed-off-by: Maxime Jourdan +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index 5012607c95d2..5d2820ef9a88 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -445,6 +445,20 @@ + }; + }; + ++ vdec: video-decoder@c8820000 { ++ compatible = "amlogic,gx-vdec"; ++ reg = <0x0 0xc8820000 0x0 0x10000>, ++ <0x0 0xc110a580 0x0 0xe4>; ++ reg-names = "dos", "esparser"; ++ ++ interrupts = , ++ ; ++ interrupt-names = "vdec", "esparser"; ++ ++ amlogic,ao-sysctrl = <&sysctrl_AO>; ++ amlogic,canvas = <&canvas>; ++ }; ++ + periphs: periphs@c8834000 { + compatible = "simple-bus"; + reg = <0x0 0xc8834000 0x0 0x2000>; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch b/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch new file mode 100644 index 000000000..06f40c051 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch @@ -0,0 +1,65 @@ +From f9f1d0b0b197f94502ea2a13a27d6d4534f8150f Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 29 Aug 2018 15:24:22 +0200 +Subject: [PATCH 33/53] arm64: dts: meson: add vdec entries + +This enables the video decoder for gxbb, gxl and gxm chips + +Signed-off-by: Maxime Jourdan +--- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 ++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 4 ++++ + 3 files changed, 24 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 2a4d506bad4e..96145e49ea44 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -814,3 +814,13 @@ + power-domains = <&pwrc_vpu>; + }; + ++&vdec { ++ compatible = "amlogic,gxbb-vdec"; ++ clocks = <&clkc CLKID_DOS_PARSER>, ++ <&clkc CLKID_DOS>, ++ <&clkc CLKID_VDEC_1>, ++ <&clkc CLKID_VDEC_HEVC>; ++ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; ++ resets = <&reset RESET_PARSER>; ++ reset-names = "esparser"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 9f4b6185a61d..6ca93ae1e496 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -814,3 +814,13 @@ + power-domains = <&pwrc_vpu>; + }; + ++&vdec { ++ compatible = "amlogic,gxl-vdec"; ++ clocks = <&clkc CLKID_DOS_PARSER>, ++ <&clkc CLKID_DOS>, ++ <&clkc CLKID_VDEC_1>, ++ <&clkc CLKID_VDEC_HEVC>; ++ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; ++ resets = <&reset RESET_PARSER>; ++ reset-names = "esparser"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +index 247888d68a3a..2f356495be5e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +@@ -117,3 +117,7 @@ + &dwc3 { + phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; + }; ++ ++&vdec { ++ compatible = "amlogic,gxm-vdec"; ++}; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch b/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch new file mode 100644 index 000000000..d9ec6cdb7 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch @@ -0,0 +1,156 @@ +From c5ad2d518874fe080e249c2a11497064c28d9b1b Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 10 Oct 2018 17:22:27 +0200 +Subject: [PATCH 34/53] meson: vdec: introduce controls and + V4L2_CID_MIN_BUFFERS_FOR_CAPTURE + +--- + drivers/media/platform/meson/vdec/Makefile | 2 +- + drivers/media/platform/meson/vdec/vdec.c | 7 +++ + drivers/media/platform/meson/vdec/vdec.h | 2 + + .../media/platform/meson/vdec/vdec_ctrls.c | 45 +++++++++++++++++++ + .../media/platform/meson/vdec/vdec_ctrls.h | 8 ++++ + 5 files changed, 63 insertions(+), 1 deletion(-) + create mode 100644 drivers/media/platform/meson/vdec/vdec_ctrls.c + create mode 100644 drivers/media/platform/meson/vdec/vdec_ctrls.h + +diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile +index 6bea129084b7..eba86083aadb 100644 +--- a/drivers/media/platform/meson/vdec/Makefile ++++ b/drivers/media/platform/meson/vdec/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + # Makefile for Amlogic meson video decoder driver + +-meson-vdec-objs = esparser.o vdec.o vdec_helpers.o vdec_platform.o ++meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o + meson-vdec-objs += vdec_1.o + meson-vdec-objs += codec_mpeg12.o + +diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c +index d8db52c01fbe..1c5d3e912bee 100644 +--- a/drivers/media/platform/meson/vdec/vdec.c ++++ b/drivers/media/platform/meson/vdec/vdec.c +@@ -21,6 +21,7 @@ + #include "vdec.h" + #include "esparser.h" + #include "vdec_helpers.h" ++#include "vdec_ctrls.h" + + struct dummy_buf { + struct vb2_v4l2_buffer vb; +@@ -290,6 +291,7 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) + sess->keyframe_found = 0; + sess->last_offset = 0; + sess->wrap_count = 0; ++ sess->dpb_size = 0; + sess->pixelaspect.numerator = 1; + sess->pixelaspect.denominator = 1; + atomic_set(&sess->esparser_queued_bufs, 0); +@@ -812,6 +814,10 @@ static int vdec_open(struct file *file) + goto err_m2m_release; + } + ++ ret = amvdec_init_ctrls(&sess->ctrl_handler); ++ if (ret) ++ goto err_m2m_release; ++ + sess->pixfmt_cap = formats[0].pixfmts_cap[0]; + sess->fmt_out = &formats[0]; + sess->width = 1280; +@@ -827,6 +833,7 @@ static int vdec_open(struct file *file) + spin_lock_init(&sess->ts_spinlock); + + v4l2_fh_init(&sess->fh, core->vdev_dec); ++ sess->fh.ctrl_handler = &sess->ctrl_handler; + v4l2_fh_add(&sess->fh); + sess->fh.m2m_ctx = sess->m2m_ctx; + file->private_data = &sess->fh; +diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h +index 4e8c3f1742ac..6be7de2849b6 100644 +--- a/drivers/media/platform/meson/vdec/vdec.h ++++ b/drivers/media/platform/meson/vdec/vdec.h +@@ -203,6 +203,7 @@ struct amvdec_session { + struct v4l2_fh fh; + struct v4l2_m2m_dev *m2m_dev; + struct v4l2_m2m_ctx *m2m_ctx; ++ struct v4l2_ctrl_handler ctrl_handler; + struct mutex lock; + + const struct amvdec_format *fmt_out; +@@ -242,6 +243,7 @@ struct amvdec_session { + u64 last_irq_jiffies; + u32 last_offset; + u32 wrap_count; ++ u32 dpb_size; + + void *priv; + }; +diff --git a/drivers/media/platform/meson/vdec/vdec_ctrls.c b/drivers/media/platform/meson/vdec/vdec_ctrls.c +new file mode 100644 +index 000000000000..cd6dd6d87172 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_ctrls.c +@@ -0,0 +1,45 @@ ++#include "vdec_ctrls.h" ++ ++static int vdec_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct amvdec_session *sess = ++ container_of(ctrl->handler, struct amvdec_session, ctrl_handler); ++ ++ switch (ctrl->id) { ++ case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: ++ ctrl->val = sess->dpb_size; ++ break; ++ default: ++ return -EINVAL; ++ }; ++ ++ return 0; ++} ++ ++static const struct v4l2_ctrl_ops vdec_ctrl_ops = { ++ .g_volatile_ctrl = vdec_op_g_volatile_ctrl, ++}; ++ ++int amvdec_init_ctrls(struct v4l2_ctrl_handler *ctrl_handler) ++{ ++ int ret; ++ struct v4l2_ctrl *ctrl; ++ ++ ret = v4l2_ctrl_handler_init(ctrl_handler, 1); ++ if (ret) ++ return ret; ++ ++ ctrl = v4l2_ctrl_new_std(ctrl_handler, &vdec_ctrl_ops, ++ V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 1); ++ if (ctrl) ++ ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; ++ ++ ret = ctrl_handler->error; ++ if (ret) { ++ v4l2_ctrl_handler_free(ctrl_handler); ++ return ret; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(amvdec_init_ctrls); +diff --git a/drivers/media/platform/meson/vdec/vdec_ctrls.h b/drivers/media/platform/meson/vdec/vdec_ctrls.h +new file mode 100644 +index 000000000000..4bcc5e68865c +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/vdec_ctrls.h +@@ -0,0 +1,8 @@ ++#ifndef __MESON_VDEC_CTRLS_H_ ++#define __MESON_VDEC_CTRLS_H_ ++ ++#include "vdec.h" ++ ++int amvdec_init_ctrls(struct v4l2_ctrl_handler *ctrl_handler); ++ ++#endif +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch b/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch new file mode 100644 index 000000000..fbda82ca1 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch @@ -0,0 +1,51 @@ +From 2688d1304cbb41d4e2c8514ec2bdcd2b48f2f88a Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Thu, 4 Oct 2018 15:37:39 +0200 +Subject: [PATCH 35/53] media: videodev2: add V4L2_FMT_FLAG_NO_SOURCE_CHANGE + +When a v4l2 driver exposes V4L2_EVENT_SOURCE_CHANGE, some (usually +OUTPUT) formats may not be able to trigger this event. + +Add a enum_fmt format flag to tag those specific formats. + +Signed-off-by: Maxime Jourdan +--- + Documentation/media/uapi/v4l/vidioc-enum-fmt.rst | 5 +++++ + include/uapi/linux/videodev2.h | 5 +++-- + 2 files changed, 8 insertions(+), 2 deletions(-) + +diff --git a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst b/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst +index 019c513df217..e0040b36ac43 100644 +--- a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst ++++ b/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst +@@ -116,6 +116,11 @@ one until ``EINVAL`` is returned. + - This format is not native to the device but emulated through + software (usually libv4l2), where possible try to use a native + format instead for better performance. ++ * - ``V4L2_FMT_FLAG_NO_SOURCE_CHANGE`` ++ - 0x0004 ++ - The event ``V4L2_EVENT_SOURCE_CHANGE`` is not supported ++ for this format. ++ + + + Return Value +diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h +index 1aae2e4b8f10..f44bdef62d0b 100644 +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -733,8 +733,9 @@ struct v4l2_fmtdesc { + __u32 reserved[4]; + }; + +-#define V4L2_FMT_FLAG_COMPRESSED 0x0001 +-#define V4L2_FMT_FLAG_EMULATED 0x0002 ++#define V4L2_FMT_FLAG_COMPRESSED 0x0001 ++#define V4L2_FMT_FLAG_EMULATED 0x0002 ++#define V4L2_FMT_FLAG_NO_SOURCE_CHANGE 0x0004 + + /* Frame Size and frame rate enumeration */ + /* +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch b/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch new file mode 100644 index 000000000..69d7299f6 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch @@ -0,0 +1,273 @@ +From b1d313fb821e3a4196bb32c86c585b8be23d491a Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 10 Oct 2018 15:44:56 +0200 +Subject: [PATCH 36/53] meson: vdec: allow subscribing to + V4L2_EVENT_SOURCE_CHANGE + +Flag MPEG1/MPEG2 as NO_SOURCE_CHANGE. +--- + drivers/media/platform/meson/vdec/vdec.c | 20 +++++++++++-- + drivers/media/platform/meson/vdec/vdec.h | 13 +++++++++ + .../media/platform/meson/vdec/vdec_helpers.c | 28 +++++++++++++++++++ + .../media/platform/meson/vdec/vdec_helpers.h | 1 + + .../media/platform/meson/vdec/vdec_platform.c | 6 ++++ + 5 files changed, 66 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c +index 1c5d3e912bee..ca6404546eb8 100644 +--- a/drivers/media/platform/meson/vdec/vdec.c ++++ b/drivers/media/platform/meson/vdec/vdec.c +@@ -230,7 +230,8 @@ static int vdec_queue_setup(struct vb2_queue *q, + * are free to choose any of them to write frames to. As such, + * we need all of them to be queued into the driver + */ +- q->min_buffers_needed = q->num_buffers + *num_buffers; ++ sess->num_dst_bufs = q->num_buffers + *num_buffers; ++ q->min_buffers_needed = sess->num_dst_bufs; + break; + default: + return -EINVAL; +@@ -260,6 +261,7 @@ static void vdec_vb2_buf_queue(struct vb2_buffer *vb) + static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) + { + struct amvdec_session *sess = vb2_get_drv_priv(q); ++ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; + struct amvdec_core *core = sess->core; + struct vb2_v4l2_buffer *buf; + int ret; +@@ -277,6 +279,13 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) + if (!sess->streamon_out || !sess->streamon_cap) + return 0; + ++ if (sess->status == STATUS_NEEDS_RESUME && ++ q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { ++ codec_ops->resume(sess); ++ sess->status = STATUS_RUNNING; ++ return 0; ++ } ++ + sess->vififo_size = SIZE_VIFIFO; + sess->vififo_vaddr = + dma_alloc_coherent(sess->core->dev, sess->vififo_size, +@@ -305,6 +314,7 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) + sess->recycle_thread = kthread_run(vdec_recycle_thread, sess, + "vdec_recycle"); + ++ sess->status = STATUS_RUNNING; + core->cur_sess = sess; + + return 0; +@@ -362,7 +372,9 @@ static void vdec_stop_streaming(struct vb2_queue *q) + struct amvdec_core *core = sess->core; + struct vb2_v4l2_buffer *buf; + +- if (sess->streamon_out && sess->streamon_cap) { ++ if (sess->status == STATUS_RUNNING || ++ (sess->status == STATUS_NEEDS_RESUME && ++ (!sess->streamon_out || !sess->streamon_cap))) { + if (vdec_codec_needs_recycle(sess)) + kthread_stop(sess->recycle_thread); + +@@ -375,6 +387,7 @@ static void vdec_stop_streaming(struct vb2_queue *q) + kfree(sess->priv); + sess->priv = NULL; + core->cur_sess = NULL; ++ sess->status = STATUS_STOPPED; + } + + if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { +@@ -611,6 +624,7 @@ static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) + + fmt_out = &platform->formats[f->index]; + f->pixelformat = fmt_out->pixfmt; ++ f->flags = fmt_out->flags; + } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { + fmt_out = sess->fmt_out; + if (f->index >= 4 || !fmt_out->pixfmts_cap[f->index]) +@@ -703,6 +717,8 @@ static int vdec_subscribe_event(struct v4l2_fh *fh, + switch (sub->type) { + case V4L2_EVENT_EOS: + return v4l2_event_subscribe(fh, sub, 2, NULL); ++ case V4L2_EVENT_SOURCE_CHANGE: ++ return v4l2_src_change_event_subscribe(fh, sub); + default: + return -EINVAL; + } +diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h +index 6be7de2849b6..8f8ce629c698 100644 +--- a/drivers/media/platform/meson/vdec/vdec.h ++++ b/drivers/media/platform/meson/vdec/vdec.h +@@ -101,6 +101,7 @@ struct amvdec_ops { + u32 (*vififo_level)(struct amvdec_session *sess); + }; + ++ + /** + * struct amvdec_codec_ops - codec operations + * +@@ -127,6 +128,7 @@ struct amvdec_codec_ops { + int (*can_recycle)(struct amvdec_core *core); + void (*recycle)(struct amvdec_core *core, u32 buf_idx); + void (*drain)(struct amvdec_session *sess); ++ void (*resume)(struct amvdec_session *sess); + const u8 * (*eos_sequence)(u32 *len); + irqreturn_t (*isr)(struct amvdec_session *sess); + irqreturn_t (*threaded_isr)(struct amvdec_session *sess); +@@ -140,6 +142,7 @@ struct amvdec_codec_ops { + * @max_buffers: maximum amount of CAPTURE (dst) buffers + * @max_width: maximum picture width supported + * @max_height: maximum picture height supported ++ * @flags: enum flags associated with this pixfmt + * @vdec_ops: the VDEC operations that support this format + * @codec_ops: the codec operations that support this format + * @firmware_path: Path to the firmware that supports this format +@@ -151,6 +154,7 @@ struct amvdec_format { + u32 max_buffers; + u32 max_width; + u32 max_height; ++ u32 flags; + + struct amvdec_ops *vdec_ops; + struct amvdec_codec_ops *codec_ops; +@@ -159,6 +163,12 @@ struct amvdec_format { + u32 pixfmts_cap[4]; + }; + ++enum amvdec_status { ++ STATUS_STOPPED, ++ STATUS_RUNNING, ++ STATUS_NEEDS_RESUME, ++}; ++ + /** + * struct amvdec_session - decoding session parameters + * +@@ -195,6 +205,7 @@ struct amvdec_format { + * @timestamps: chronological list of src timestamps + * @ts_spinlock: spinlock for the timestamps list + * @last_irq_jiffies: tracks last time the vdec triggered an IRQ ++ * @status: current decoding status + * @priv: codec private data + */ + struct amvdec_session { +@@ -225,6 +236,7 @@ struct amvdec_session { + unsigned int sequence_cap; + unsigned int should_stop; + unsigned int keyframe_found; ++ unsigned int num_dst_bufs; + + u8 canvas_alloc[MAX_CANVAS]; + u32 canvas_num; +@@ -245,6 +257,7 @@ struct amvdec_session { + u32 wrap_count; + u32 dpb_size; + ++ enum amvdec_status status; + void *priv; + }; + +diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.c b/drivers/media/platform/meson/vdec/vdec_helpers.c +index 02090c5b089e..b982b2869fd2 100644 +--- a/drivers/media/platform/meson/vdec/vdec_helpers.c ++++ b/drivers/media/platform/meson/vdec/vdec_helpers.c +@@ -403,6 +403,34 @@ void amvdec_set_par_from_dar(struct amvdec_session *sess, + } + EXPORT_SYMBOL_GPL(amvdec_set_par_from_dar); + ++void amvdec_src_change(struct amvdec_session *sess, u32 width, u32 height, u32 dpb_size) ++{ ++ static const struct v4l2_event ev = { ++ .type = V4L2_EVENT_SOURCE_CHANGE, ++ .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION }; ++ ++ sess->dpb_size = dpb_size; ++ ++ /* Check if the capture queue is already configured well for our ++ * usecase. If so, keep decoding with it and do not send the event ++ */ ++ if (sess->width == width && ++ sess->height == height && ++ dpb_size <= sess->num_dst_bufs) { ++ sess->fmt_out->codec_ops->resume(sess); ++ return; ++ } ++ ++ sess->width = width; ++ sess->height = height; ++ sess->status = STATUS_NEEDS_RESUME; ++ ++ dev_dbg(sess->core->dev, "Res. changed (%ux%u), DPB size %u\n", ++ width, height, dpb_size); ++ v4l2_event_queue_fh(&sess->fh, &ev); ++} ++EXPORT_SYMBOL_GPL(amvdec_src_change); ++ + void amvdec_abort(struct amvdec_session *sess) + { + dev_info(sess->core->dev, "Aborting decoding session!\n"); +diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.h b/drivers/media/platform/meson/vdec/vdec_helpers.h +index b9250a8157c4..060799b5e4d4 100644 +--- a/drivers/media/platform/meson/vdec/vdec_helpers.h ++++ b/drivers/media/platform/meson/vdec/vdec_helpers.h +@@ -44,5 +44,6 @@ void amvdec_remove_ts(struct amvdec_session *sess, u64 ts); + void amvdec_set_par_from_dar(struct amvdec_session *sess, + u32 dar_num, u32 dar_den); + ++void amvdec_src_change(struct amvdec_session *sess, u32 width, u32 height, u32 dpb_size); + void amvdec_abort(struct amvdec_session *sess); + #endif +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c +index 46eeb7426f54..291f1eeb27d9 100644 +--- a/drivers/media/platform/meson/vdec/vdec_platform.c ++++ b/drivers/media/platform/meson/vdec/vdec_platform.c +@@ -17,6 +17,7 @@ static const struct amvdec_format vdec_formats_gxbb[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +@@ -27,6 +28,7 @@ static const struct amvdec_format vdec_formats_gxbb[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +@@ -41,6 +43,7 @@ static const struct amvdec_format vdec_formats_gxl[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +@@ -51,6 +54,7 @@ static const struct amvdec_format vdec_formats_gxl[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +@@ -65,6 +69,7 @@ static const struct amvdec_format vdec_formats_gxm[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +@@ -75,6 +80,7 @@ static const struct amvdec_format vdec_formats_gxm[] = { + .max_buffers = 8, + .max_width = 1920, + .max_height = 1080, ++ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, + .vdec_ops = &vdec_1_ops, + .codec_ops = &codec_mpeg12_ops, + .firmware_path = "meson/gx/vmpeg12_mc", +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch new file mode 100644 index 000000000..ea4486e36 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch @@ -0,0 +1,593 @@ +From fecc45672255e63d4e99b9eaf24ac00083a5d4b6 Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 29 Aug 2018 15:42:56 +0200 +Subject: [PATCH 37/53] media: meson: vdec: add H.264 decoding support + +Add support for V4L2_PIX_FMT_H264 +--- + drivers/media/platform/meson/vdec/Makefile | 2 +- + .../media/platform/meson/vdec/codec_h264.c | 478 ++++++++++++++++++ + .../media/platform/meson/vdec/codec_h264.h | 13 + + .../media/platform/meson/vdec/vdec_platform.c | 31 ++ + 4 files changed, 523 insertions(+), 1 deletion(-) + create mode 100644 drivers/media/platform/meson/vdec/codec_h264.c + create mode 100644 drivers/media/platform/meson/vdec/codec_h264.h + +diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile +index eba86083aadb..01dc9603abdd 100644 +--- a/drivers/media/platform/meson/vdec/Makefile ++++ b/drivers/media/platform/meson/vdec/Makefile +@@ -3,6 +3,6 @@ + + meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o + meson-vdec-objs += vdec_1.o +-meson-vdec-objs += codec_mpeg12.o ++meson-vdec-objs += codec_mpeg12.o codec_h264.o + + obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o +diff --git a/drivers/media/platform/meson/vdec/codec_h264.c b/drivers/media/platform/meson/vdec/codec_h264.c +new file mode 100644 +index 000000000000..6ac0115afaa3 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_h264.c +@@ -0,0 +1,478 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#include ++#include ++ ++#include "vdec_helpers.h" ++#include "dos_regs.h" ++ ++#define SIZE_EXT_FW (20 * SZ_1K) ++#define SIZE_WORKSPACE 0x1ee000 ++#define SIZE_SEI (8 * SZ_1K) ++ ++/* Offset added by the firmware which must be substracted ++ * from the workspace phyaddr ++ */ ++#define WORKSPACE_BUF_OFFSET 0x1000000 ++ ++/* ISR status */ ++#define CMD_MASK GENMASK(7, 0) ++#define CMD_SRC_CHANGE 1 ++#define CMD_FRAMES_READY 2 ++#define CMD_FATAL_ERROR 6 ++#define CMD_BAD_WIDTH 7 ++#define CMD_BAD_HEIGHT 8 ++ ++#define SEI_DATA_READY BIT(15) ++ ++/* Picture type */ ++#define PIC_TOP_BOT 5 ++#define PIC_BOT_TOP 6 ++ ++/* Size of Motion Vector per macroblock */ ++#define MB_MV_SIZE 96 ++ ++/* Frame status data */ ++#define PIC_STRUCT_BIT 5 ++#define PIC_STRUCT_MASK GENMASK(2, 0) ++#define BUF_IDX_MASK GENMASK(4, 0) ++#define ERROR_FLAG BIT(9) ++#define OFFSET_BIT 16 ++#define OFFSET_MASK GENMASK(15, 0) ++ ++/* Bitstream parsed data */ ++#define MB_TOTAL_BIT 8 ++#define MB_TOTAL_MASK GENMASK(15, 0) ++#define MB_WIDTH_MASK GENMASK(7, 0) ++#define MAX_REF_BIT 24 ++#define MAX_REF_MASK GENMASK(6, 0) ++#define AR_IDC_BIT 16 ++#define AR_IDC_MASK GENMASK(7, 0) ++#define AR_PRESENT_FLAG BIT(0) ++#define AR_EXTEND 0xff ++ ++/* Buffer to send to the ESPARSER to signal End Of Stream for H.264. ++ * This is a 16x16 encoded picture that will trigger drain firmware-side. ++ * There is no known alternative. ++ */ ++static const u8 eos_sequence[SZ_1K] = { ++ 0x00, 0x00, 0x00, 0x01, 0x06, 0x05, 0xff, 0xe4, 0xdc, 0x45, 0xe9, 0xbd, ++ 0xe6, 0xd9, 0x48, 0xb7, 0x96, 0x2c, 0xd8, 0x20, 0xd9, 0x23, 0xee, 0xef, ++ 0x78, 0x32, 0x36, 0x34, 0x20, 0x2d, 0x20, 0x63, 0x6f, 0x72, 0x65, 0x20, ++ 0x36, 0x37, 0x20, 0x72, 0x31, 0x31, 0x33, 0x30, 0x20, 0x38, 0x34, 0x37, ++ 0x35, 0x39, 0x37, 0x37, 0x20, 0x2d, 0x20, 0x48, 0x2e, 0x32, 0x36, 0x34, ++ 0x2f, 0x4d, 0x50, 0x45, 0x47, 0x2d, 0x34, 0x20, 0x41, 0x56, 0x43, 0x20, ++ 0x63, 0x6f, 0x64, 0x65, 0x63, 0x20, 0x2d, 0x20, 0x43, 0x6f, 0x70, 0x79, ++ 0x6c, 0x65, 0x66, 0x74, 0x20, 0x32, 0x30, 0x30, 0x33, 0x2d, 0x32, 0x30, ++ 0x30, 0x39, 0x20, 0x2d, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, ++ 0x77, 0x77, 0x77, 0x2e, 0x76, 0x69, 0x64, 0x65, 0x6f, 0x6c, 0x61, 0x6e, ++ 0x2e, 0x6f, 0x72, 0x67, 0x2f, 0x78, 0x32, 0x36, 0x34, 0x2e, 0x68, 0x74, ++ 0x6d, 0x6c, 0x20, 0x2d, 0x20, 0x6f, 0x70, 0x74, 0x69, 0x6f, 0x6e, 0x73, ++ 0x3a, 0x20, 0x63, 0x61, 0x62, 0x61, 0x63, 0x3d, 0x31, 0x20, 0x72, 0x65, ++ 0x66, 0x3d, 0x31, 0x20, 0x64, 0x65, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x3d, ++ 0x31, 0x3a, 0x30, 0x3a, 0x30, 0x20, 0x61, 0x6e, 0x61, 0x6c, 0x79, 0x73, ++ 0x65, 0x3d, 0x30, 0x78, 0x31, 0x3a, 0x30, 0x78, 0x31, 0x31, 0x31, 0x20, ++ 0x6d, 0x65, 0x3d, 0x68, 0x65, 0x78, 0x20, 0x73, 0x75, 0x62, 0x6d, 0x65, ++ 0x3d, 0x36, 0x20, 0x70, 0x73, 0x79, 0x5f, 0x72, 0x64, 0x3d, 0x31, 0x2e, ++ 0x30, 0x3a, 0x30, 0x2e, 0x30, 0x20, 0x6d, 0x69, 0x78, 0x65, 0x64, 0x5f, ++ 0x72, 0x65, 0x66, 0x3d, 0x30, 0x20, 0x6d, 0x65, 0x5f, 0x72, 0x61, 0x6e, ++ 0x67, 0x65, 0x3d, 0x31, 0x36, 0x20, 0x63, 0x68, 0x72, 0x6f, 0x6d, 0x61, ++ 0x5f, 0x6d, 0x65, 0x3d, 0x31, 0x20, 0x74, 0x72, 0x65, 0x6c, 0x6c, 0x69, ++ 0x73, 0x3d, 0x30, 0x20, 0x38, 0x78, 0x38, 0x64, 0x63, 0x74, 0x3d, 0x30, ++ 0x20, 0x63, 0x71, 0x6d, 0x3d, 0x30, 0x20, 0x64, 0x65, 0x61, 0x64, 0x7a, ++ 0x6f, 0x6e, 0x65, 0x3d, 0x32, 0x31, 0x2c, 0x31, 0x31, 0x20, 0x63, 0x68, ++ 0x72, 0x6f, 0x6d, 0x61, 0x5f, 0x71, 0x70, 0x5f, 0x6f, 0x66, 0x66, 0x73, ++ 0x65, 0x74, 0x3d, 0x2d, 0x32, 0x20, 0x74, 0x68, 0x72, 0x65, 0x61, 0x64, ++ 0x73, 0x3d, 0x31, 0x20, 0x6e, 0x72, 0x3d, 0x30, 0x20, 0x64, 0x65, 0x63, ++ 0x69, 0x6d, 0x61, 0x74, 0x65, 0x3d, 0x31, 0x20, 0x6d, 0x62, 0x61, 0x66, ++ 0x66, 0x3d, 0x30, 0x20, 0x62, 0x66, 0x72, 0x61, 0x6d, 0x65, 0x73, 0x3d, ++ 0x30, 0x20, 0x6b, 0x65, 0x79, 0x69, 0x6e, 0x74, 0x3d, 0x32, 0x35, 0x30, ++ 0x20, 0x6b, 0x65, 0x79, 0x69, 0x6e, 0x74, 0x5f, 0x6d, 0x69, 0x6e, 0x3d, ++ 0x32, 0x35, 0x20, 0x73, 0x63, 0x65, 0x6e, 0x65, 0x63, 0x75, 0x74, 0x3d, ++ 0x34, 0x30, 0x20, 0x72, 0x63, 0x3d, 0x61, 0x62, 0x72, 0x20, 0x62, 0x69, ++ 0x74, 0x72, 0x61, 0x74, 0x65, 0x3d, 0x31, 0x30, 0x20, 0x72, 0x61, 0x74, ++ 0x65, 0x74, 0x6f, 0x6c, 0x3d, 0x31, 0x2e, 0x30, 0x20, 0x71, 0x63, 0x6f, ++ 0x6d, 0x70, 0x3d, 0x30, 0x2e, 0x36, 0x30, 0x20, 0x71, 0x70, 0x6d, 0x69, ++ 0x6e, 0x3d, 0x31, 0x30, 0x20, 0x71, 0x70, 0x6d, 0x61, 0x78, 0x3d, 0x35, ++ 0x31, 0x20, 0x71, 0x70, 0x73, 0x74, 0x65, 0x70, 0x3d, 0x34, 0x20, 0x69, ++ 0x70, 0x5f, 0x72, 0x61, 0x74, 0x69, 0x6f, 0x3d, 0x31, 0x2e, 0x34, 0x30, ++ 0x20, 0x61, 0x71, 0x3d, 0x31, 0x3a, 0x31, 0x2e, 0x30, 0x30, 0x00, 0x80, ++ 0x00, 0x00, 0x00, 0x01, 0x67, 0x4d, 0x40, 0x0a, 0x9a, 0x74, 0xf4, 0x20, ++ 0x00, 0x00, 0x03, 0x00, 0x20, 0x00, 0x00, 0x06, 0x51, 0xe2, 0x44, 0xd4, ++ 0x00, 0x00, 0x00, 0x01, 0x68, 0xee, 0x32, 0xc8, 0x00, 0x00, 0x00, 0x01, ++ 0x65, 0x88, 0x80, 0x20, 0x00, 0x08, 0x7f, 0xea, 0x6a, 0xe2, 0x99, 0xb6, ++ 0x57, 0xae, 0x49, 0x30, 0xf5, 0xfe, 0x5e, 0x46, 0x0b, 0x72, 0x44, 0xc4, ++ 0xe1, 0xfc, 0x62, 0xda, 0xf1, 0xfb, 0xa2, 0xdb, 0xd6, 0xbe, 0x5c, 0xd7, ++ 0x24, 0xa3, 0xf5, 0xb9, 0x2f, 0x57, 0x16, 0x49, 0x75, 0x47, 0x77, 0x09, ++ 0x5c, 0xa1, 0xb4, 0xc3, 0x4f, 0x60, 0x2b, 0xb0, 0x0c, 0xc8, 0xd6, 0x66, ++ 0xba, 0x9b, 0x82, 0x29, 0x33, 0x92, 0x26, 0x99, 0x31, 0x1c, 0x7f, 0x9b ++}; ++ ++static const u8 *codec_h264_eos_sequence(u32 *len) ++{ ++ *len = ARRAY_SIZE(eos_sequence); ++ return eos_sequence; ++} ++ ++struct codec_h264 { ++ /* H.264 decoder requires an extended firmware */ ++ void *ext_fw_vaddr; ++ dma_addr_t ext_fw_paddr; ++ ++ /* Buffer for the H.264 Workspace */ ++ void *workspace_vaddr; ++ dma_addr_t workspace_paddr; ++ ++ /* Buffer for the H.264 references MV */ ++ void *ref_vaddr; ++ dma_addr_t ref_paddr; ++ u32 ref_size; ++ ++ /* Buffer for parsed SEI data */ ++ void *sei_vaddr; ++ dma_addr_t sei_paddr; ++ ++ u32 mb_width; ++ u32 mb_height; ++ u32 max_refs; ++}; ++ ++static int codec_h264_can_recycle(struct amvdec_core *core) ++{ ++ return !amvdec_read_dos(core, AV_SCRATCH_7) || ++ !amvdec_read_dos(core, AV_SCRATCH_8); ++} ++ ++static void codec_h264_recycle(struct amvdec_core *core, u32 buf_idx) ++{ ++ /* Tell the decoder he can recycle this buffer. ++ * AV_SCRATCH_8 serves the same purpose. ++ */ ++ if (!amvdec_read_dos(core, AV_SCRATCH_7)) ++ amvdec_write_dos(core, AV_SCRATCH_7, buf_idx + 1); ++ else ++ amvdec_write_dos(core, AV_SCRATCH_8, buf_idx + 1); ++} ++ ++static int codec_h264_start(struct amvdec_session *sess) { ++ u32 workspace_offset; ++ struct amvdec_core *core = sess->core; ++ struct codec_h264 *h264 = sess->priv; ++ ++ /* Allocate some memory for the H.264 decoder's state */ ++ h264->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, ++ &h264->workspace_paddr, GFP_KERNEL); ++ if (!h264->workspace_vaddr) { ++ dev_err(core->dev, "Failed to alloc H.264 Workspace\n"); ++ return -ENOMEM; ++ } ++ ++ /* Allocate some memory for the H.264 SEI dump */ ++ h264->sei_vaddr = dma_alloc_coherent(core->dev, SIZE_SEI, ++ &h264->sei_paddr, GFP_KERNEL); ++ if (!h264->sei_vaddr) { ++ dev_err(core->dev, "Failed to alloc H.264 SEI\n"); ++ return -ENOMEM; ++ } ++ ++ amvdec_write_dos_bits(core, POWER_CTL_VLD, BIT(9) | BIT(6)); ++ ++ workspace_offset = h264->workspace_paddr - WORKSPACE_BUF_OFFSET; ++ amvdec_write_dos(core, AV_SCRATCH_1, workspace_offset); ++ amvdec_write_dos(core, AV_SCRATCH_G, h264->ext_fw_paddr); ++ amvdec_write_dos(core, AV_SCRATCH_I, h264->sei_paddr - workspace_offset); ++ ++ /* Enable "error correction" */ ++ amvdec_write_dos(core, AV_SCRATCH_F, ++ (amvdec_read_dos(core, AV_SCRATCH_F) & 0xffffffc3) | ++ BIT(4) | BIT(7)); ++ ++ amvdec_write_dos(core, MDEC_PIC_DC_THRESH, 0x404038aa); ++ ++ return 0; ++} ++ ++static int codec_h264_stop(struct amvdec_session *sess) ++{ ++ struct codec_h264 *h264 = sess->priv; ++ struct amvdec_core *core = sess->core; ++ ++ if (h264->ext_fw_vaddr) ++ dma_free_coherent(core->dev, SIZE_EXT_FW, ++ h264->ext_fw_vaddr, h264->ext_fw_paddr); ++ ++ if (h264->workspace_vaddr) ++ dma_free_coherent(core->dev, SIZE_WORKSPACE, ++ h264->workspace_vaddr, h264->workspace_paddr); ++ ++ if (h264->ref_vaddr) ++ dma_free_coherent(core->dev, h264->ref_size, ++ h264->ref_vaddr, h264->ref_paddr); ++ ++ if (h264->sei_vaddr) ++ dma_free_coherent(core->dev, SIZE_SEI, ++ h264->sei_vaddr, h264->sei_paddr); ++ ++ return 0; ++} ++ ++static int codec_h264_load_extended_firmware(struct amvdec_session *sess, ++ const u8 *data, u32 len) ++{ ++ struct codec_h264 *h264; ++ struct amvdec_core *core = sess->core; ++ ++ if (len < SIZE_EXT_FW) ++ return -EINVAL; ++ ++ h264 = kzalloc(sizeof(*h264), GFP_KERNEL); ++ if (!h264) ++ return -ENOMEM; ++ ++ h264->ext_fw_vaddr = dma_alloc_coherent(core->dev, SIZE_EXT_FW, ++ &h264->ext_fw_paddr, GFP_KERNEL); ++ if (!h264->ext_fw_vaddr) { ++ dev_err(core->dev, "Failed to alloc H.264 extended fw\n"); ++ kfree(h264); ++ return -ENOMEM; ++ } ++ ++ memcpy(h264->ext_fw_vaddr, data, SIZE_EXT_FW); ++ sess->priv = h264; ++ ++ return 0; ++} ++ ++static const struct v4l2_fract par_table[] = { ++ { 1, 1 }, { 1, 1 }, { 12, 11 }, { 10, 11 }, ++ { 16, 11 }, { 40, 33 }, { 24, 11 }, { 20, 11 }, ++ { 32, 11 }, { 80, 33 }, { 18, 11 }, { 15, 11 }, ++ { 64, 33 }, { 160, 99 }, { 4, 3 }, { 3, 2 }, ++ { 2, 1 } ++}; ++ ++static void codec_h264_set_par(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 seq_info = amvdec_read_dos(core, AV_SCRATCH_2); ++ u32 ar_idc = (seq_info >> AR_IDC_BIT) & AR_IDC_MASK; ++ ++ if (!(seq_info & AR_PRESENT_FLAG)) ++ return; ++ ++ if (ar_idc == AR_EXTEND) { ++ u32 ar_info = amvdec_read_dos(core, AV_SCRATCH_3); ++ sess->pixelaspect.numerator = ar_info & 0xffff; ++ sess->pixelaspect.denominator = (ar_info >> 16) & 0xffff; ++ return; ++ } ++ ++ if (ar_idc >= ARRAY_SIZE(par_table)) ++ return; ++ ++ sess->pixelaspect = par_table[ar_idc]; ++} ++ ++static void codec_h264_resume(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ struct codec_h264 *h264 = sess->priv; ++ u32 mb_width, mb_height, mb_total; ++ ++ amvdec_set_canvases(sess, (u32[]){ ANC0_CANVAS_ADDR, 0 }, ++ (u32[]){ 24, 0 }); ++ ++ dev_dbg(core->dev, ++ "max_refs = %u; actual_dpb_size = %u\n", ++ h264->max_refs, sess->num_dst_bufs); ++ ++ /* Align to a multiple of 4 macroblocks */ ++ mb_width = ALIGN(h264->mb_width, 4); ++ mb_height = ALIGN(h264->mb_height, 4); ++ mb_total = mb_width * mb_height; ++ ++ h264->ref_size = mb_total * MB_MV_SIZE * h264->max_refs; ++ h264->ref_vaddr = dma_alloc_coherent(core->dev, h264->ref_size, ++ &h264->ref_paddr, GFP_KERNEL); ++ if (!h264->ref_vaddr) { ++ dev_err(core->dev, "Failed to alloc refs (%u)\n", ++ h264->ref_size); ++ amvdec_abort(sess); ++ return; ++ } ++ ++ /* Address to store the references' MVs */ ++ amvdec_write_dos(core, AV_SCRATCH_1, h264->ref_paddr); ++ /* End of ref MV */ ++ amvdec_write_dos(core, AV_SCRATCH_4, h264->ref_paddr + h264->ref_size); ++ ++ amvdec_write_dos(core, AV_SCRATCH_0, (h264->max_refs << 24) | ++ (sess->num_dst_bufs << 16) | ++ ((h264->max_refs - 1) << 8)); ++} ++ ++/* Configure the H.264 decoder when the parser detected a parameter set change ++ */ ++static void codec_h264_src_change(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ struct codec_h264 *h264 = sess->priv; ++ u32 parsed_info, mb_total; ++ u32 crop_infor, crop_bottom, crop_right; ++ u32 frame_width, frame_height; ++ ++ sess->keyframe_found = 1; ++ ++ parsed_info = amvdec_read_dos(core, AV_SCRATCH_1); ++ ++ /* Total number of 16x16 macroblocks */ ++ mb_total = (parsed_info >> MB_TOTAL_BIT) & MB_TOTAL_MASK; ++ /* Number of macroblocks per line */ ++ h264->mb_width = parsed_info & MB_WIDTH_MASK; ++ /* Number of macroblock lines */ ++ h264->mb_height = mb_total / h264->mb_width; ++ ++ h264->max_refs = ((parsed_info >> MAX_REF_BIT) & MAX_REF_MASK) + 1; ++ ++ crop_infor = amvdec_read_dos(core, AV_SCRATCH_6); ++ crop_bottom = (crop_infor & 0xff); ++ crop_right = (crop_infor >> 16) & 0xff; ++ ++ frame_width = h264->mb_width * 16 - crop_right; ++ frame_height = h264->mb_height * 16 - crop_bottom; ++ ++ dev_info(core->dev, "frame: %ux%u; crop: %u %u\n", ++ frame_width, frame_height, crop_right, crop_bottom); ++ ++ codec_h264_set_par(sess); ++ amvdec_src_change(sess, frame_width, frame_height, h264->max_refs + 5); ++} ++ ++/** ++ * The offset is split in half in 2 different registers ++ */ ++static u32 get_offset_msb(struct amvdec_core *core, int frame_num) ++{ ++ int take_msb = frame_num % 2; ++ int reg_offset = (frame_num / 2) * 4; ++ u32 offset_msb = amvdec_read_dos(core, AV_SCRATCH_A + reg_offset); ++ ++ if (take_msb) ++ return offset_msb & 0xffff0000; ++ ++ return (offset_msb & 0x0000ffff) << 16; ++} ++ ++static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status) ++{ ++ struct amvdec_core *core = sess->core; ++ int error_count; ++ int num_frames; ++ int i; ++ ++ error_count = amvdec_read_dos(core, AV_SCRATCH_D); ++ num_frames = (status >> 8) & 0xff; ++ if (error_count) { ++ dev_warn(core->dev, ++ "decoder error(s) happened, count %d\n", error_count); ++ amvdec_write_dos(core, AV_SCRATCH_D, 0); ++ } ++ ++ for (i = 0; i < num_frames; i++) { ++ u32 frame_status = amvdec_read_dos(core, AV_SCRATCH_1 + i * 4); ++ u32 buffer_index = frame_status & BUF_IDX_MASK; ++ u32 pic_struct = (frame_status >> PIC_STRUCT_BIT) & ++ PIC_STRUCT_MASK; ++ u32 offset = (frame_status >> OFFSET_BIT) & OFFSET_MASK; ++ u32 field = V4L2_FIELD_NONE; ++ ++ /* A buffer decode error means it was decoded, ++ * but part of the picture will have artifacts. ++ * Typical reason is a temporarily corrupted bitstream ++ */ ++ if (frame_status & ERROR_FLAG) ++ dev_dbg(core->dev, "Buffer %d decode error\n", ++ buffer_index); ++ ++ if (pic_struct == PIC_TOP_BOT) ++ field = V4L2_FIELD_INTERLACED_TB; ++ else if (pic_struct == PIC_BOT_TOP) ++ field = V4L2_FIELD_INTERLACED_BT; ++ ++ offset |= get_offset_msb(core, i); ++ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); ++ } ++} ++ ++static irqreturn_t codec_h264_threaded_isr(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 status; ++ u32 size; ++ u8 cmd; ++ ++ status = amvdec_read_dos(core, AV_SCRATCH_0); ++ cmd = status & CMD_MASK; ++ ++ switch (cmd) { ++ case CMD_SRC_CHANGE: ++ codec_h264_src_change(sess); ++ break; ++ case CMD_FRAMES_READY: ++ codec_h264_frames_ready(sess, status); ++ break; ++ case CMD_FATAL_ERROR: ++ dev_err(core->dev, "H.264 decoder fatal error\n"); ++ goto abort; ++ case CMD_BAD_WIDTH: ++ size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16; ++ dev_err(core->dev, "Unsupported video width: %u\n", size); ++ goto abort; ++ case CMD_BAD_HEIGHT: ++ size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16; ++ dev_err(core->dev, "Unsupported video height: %u\n", size); ++ goto abort; ++ case 0: /* Unused but not worth printing for */ ++ case 9: ++ break; ++ default: ++ dev_info(core->dev, "Unexpected H264 ISR: %08X\n", cmd); ++ break; ++ } ++ ++ if (cmd && cmd != CMD_SRC_CHANGE) ++ amvdec_write_dos(core, AV_SCRATCH_0, 0); ++ ++ /* Decoder has some SEI data for us ; ignore */ ++ if (amvdec_read_dos(core, AV_SCRATCH_J) & SEI_DATA_READY) ++ amvdec_write_dos(core, AV_SCRATCH_J, 0); ++ ++ return IRQ_HANDLED; ++abort: ++ amvdec_abort(sess); ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t codec_h264_isr(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ ++ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); ++ ++ return IRQ_WAKE_THREAD; ++} ++ ++struct amvdec_codec_ops codec_h264_ops = { ++ .start = codec_h264_start, ++ .stop = codec_h264_stop, ++ .load_extended_firmware = codec_h264_load_extended_firmware, ++ .isr = codec_h264_isr, ++ .threaded_isr = codec_h264_threaded_isr, ++ .can_recycle = codec_h264_can_recycle, ++ .recycle = codec_h264_recycle, ++ .eos_sequence = codec_h264_eos_sequence, ++ .resume = codec_h264_resume, ++}; +diff --git a/drivers/media/platform/meson/vdec/codec_h264.h b/drivers/media/platform/meson/vdec/codec_h264.h +new file mode 100644 +index 000000000000..7a1597611faf +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_h264.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_CODEC_H264_H_ ++#define __MESON_VDEC_CODEC_H264_H_ ++ ++#include "vdec.h" ++ ++extern struct amvdec_codec_ops codec_h264_ops; ++ ++#endif +\ No newline at end of file +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c +index 291f1eeb27d9..baecf5921d56 100644 +--- a/drivers/media/platform/meson/vdec/vdec_platform.c ++++ b/drivers/media/platform/meson/vdec/vdec_platform.c +@@ -9,9 +9,20 @@ + + #include "vdec_1.h" + #include "codec_mpeg12.h" ++#include "codec_h264.h" + + static const struct amvdec_format vdec_formats_gxbb[] = { + { ++ .pixfmt = V4L2_PIX_FMT_H264, ++ .min_buffers = 2, ++ .max_buffers = 24, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_h264_ops, ++ .firmware_path = "meson/gxbb/vh264_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG1, + .min_buffers = 8, + .max_buffers = 8, +@@ -38,6 +49,16 @@ static const struct amvdec_format vdec_formats_gxbb[] = { + + static const struct amvdec_format vdec_formats_gxl[] = { + { ++ .pixfmt = V4L2_PIX_FMT_H264, ++ .min_buffers = 2, ++ .max_buffers = 24, ++ .max_width = 3840, ++ .max_height = 2160, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_h264_ops, ++ .firmware_path = "meson/gxl/vh264_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG1, + .min_buffers = 8, + .max_buffers = 8, +@@ -64,6 +85,16 @@ static const struct amvdec_format vdec_formats_gxl[] = { + + static const struct amvdec_format vdec_formats_gxm[] = { + { ++ .pixfmt = V4L2_PIX_FMT_H264, ++ .min_buffers = 2, ++ .max_buffers = 24, ++ .max_width = 3840, ++ .max_height = 2160, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_h264_ops, ++ .firmware_path = "meson/gxm/vh264_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG1, + .min_buffers = 8, + .max_buffers = 8, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch new file mode 100644 index 000000000..0dbac0a1b --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch @@ -0,0 +1,315 @@ +From cbb607b67a4a169b94884436208b05062bd2f93b Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Wed, 29 Aug 2018 16:01:55 +0200 +Subject: [PATCH 38/53] media: meson: vdec: add MPEG4 decoding support + +Add support for V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_XVID and +V4L2_PIX_FMT_H.263 +--- + drivers/media/platform/meson/vdec/Makefile | 2 +- + .../media/platform/meson/vdec/codec_mpeg4.c | 139 ++++++++++++++++++ + .../media/platform/meson/vdec/codec_mpeg4.h | 13 ++ + .../media/platform/meson/vdec/vdec_platform.c | 91 ++++++++++++ + 4 files changed, 244 insertions(+), 1 deletion(-) + create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg4.c + create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg4.h + +diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile +index 01dc9603abdd..bb7a134e2728 100644 +--- a/drivers/media/platform/meson/vdec/Makefile ++++ b/drivers/media/platform/meson/vdec/Makefile +@@ -3,6 +3,6 @@ + + meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o + meson-vdec-objs += vdec_1.o +-meson-vdec-objs += codec_mpeg12.o codec_h264.o ++meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o + + obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o +diff --git a/drivers/media/platform/meson/vdec/codec_mpeg4.c b/drivers/media/platform/meson/vdec/codec_mpeg4.c +new file mode 100644 +index 000000000000..1d574e576112 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mpeg4.c +@@ -0,0 +1,139 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#include ++#include ++ ++#include "vdec_helpers.h" ++#include "dos_regs.h" ++ ++#define SIZE_WORKSPACE SZ_1M ++/* Offset added by firmware, to substract from workspace paddr */ ++#define DCAC_BUFF_START_IP 0x02b00000 ++ ++/* map firmware registers to known MPEG4 functions */ ++#define MREG_BUFFERIN AV_SCRATCH_8 ++#define MREG_BUFFEROUT AV_SCRATCH_9 ++#define MP4_NOT_CODED_CNT AV_SCRATCH_A ++#define MP4_OFFSET_REG AV_SCRATCH_C ++#define MEM_OFFSET_REG AV_SCRATCH_F ++#define MREG_FATAL_ERROR AV_SCRATCH_L ++ ++#define BUF_IDX_MASK GENMASK(2, 0) ++#define INTERLACE_FLAG BIT(7) ++#define TOP_FIELD_FIRST_FLAG BIT(6) ++ ++struct codec_mpeg4 { ++ /* Buffer for the MPEG4 Workspace */ ++ void *workspace_vaddr; ++ dma_addr_t workspace_paddr; ++}; ++ ++static int codec_mpeg4_can_recycle(struct amvdec_core *core) ++{ ++ return !amvdec_read_dos(core, MREG_BUFFERIN); ++} ++ ++static void codec_mpeg4_recycle(struct amvdec_core *core, u32 buf_idx) ++{ ++ amvdec_write_dos(core, MREG_BUFFERIN, ~BIT(buf_idx)); ++} ++ ++static int codec_mpeg4_start(struct amvdec_session *sess) { ++ struct amvdec_core *core = sess->core; ++ struct codec_mpeg4 *mpeg4 = sess->priv; ++ int ret; ++ ++ mpeg4 = kzalloc(sizeof(*mpeg4), GFP_KERNEL); ++ if (!mpeg4) ++ return -ENOMEM; ++ ++ /* Allocate some memory for the MPEG4 decoder's state */ ++ mpeg4->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, ++ &mpeg4->workspace_paddr, ++ GFP_KERNEL); ++ if (!mpeg4->workspace_vaddr) { ++ dev_err(core->dev, "Failed to request MPEG4 Workspace\n"); ++ ret = -ENOMEM; ++ goto free_mpeg4; ++ } ++ ++ /* Canvas regs: AV_SCRATCH_0-AV_SCRATCH_4;AV_SCRATCH_G-AV_SCRATCH_J */ ++ amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_0, AV_SCRATCH_G, 0 }, ++ (u32[]){ 4, 4, 0 }); ++ ++ amvdec_write_dos(core, MEM_OFFSET_REG, ++ mpeg4->workspace_paddr - DCAC_BUFF_START_IP); ++ amvdec_write_dos(core, PSCALE_CTRL, 0); ++ amvdec_write_dos(core, MP4_NOT_CODED_CNT, 0); ++ amvdec_write_dos(core, MREG_BUFFERIN, 0); ++ amvdec_write_dos(core, MREG_BUFFEROUT, 0); ++ amvdec_write_dos(core, MREG_FATAL_ERROR, 0); ++ amvdec_write_dos(core, MDEC_PIC_DC_THRESH, 0x404038aa); ++ ++ sess->keyframe_found = 1; ++ sess->priv = mpeg4; ++ ++ return 0; ++ ++free_mpeg4: ++ kfree(mpeg4); ++ return ret; ++} ++ ++static int codec_mpeg4_stop(struct amvdec_session *sess) ++{ ++ struct codec_mpeg4 *mpeg4 = sess->priv; ++ struct amvdec_core *core = sess->core; ++ ++ if (mpeg4->workspace_vaddr) { ++ dma_free_coherent(core->dev, SIZE_WORKSPACE, ++ mpeg4->workspace_vaddr, ++ mpeg4->workspace_paddr); ++ mpeg4->workspace_vaddr = 0; ++ } ++ ++ return 0; ++} ++ ++static irqreturn_t codec_mpeg4_isr(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 reg; ++ u32 buffer_index; ++ u32 field = V4L2_FIELD_NONE; ++ ++ reg = amvdec_read_dos(core, MREG_FATAL_ERROR); ++ if (reg == 1) { ++ dev_err(core->dev, "mpeg4 fatal error\n"); ++ amvdec_abort(sess); ++ return IRQ_HANDLED; ++ } ++ ++ reg = amvdec_read_dos(core, MREG_BUFFEROUT); ++ if (!reg) ++ goto end; ++ ++ buffer_index = reg & BUF_IDX_MASK; ++ if (reg & INTERLACE_FLAG) ++ field = (reg & TOP_FIELD_FIRST_FLAG) ? ++ V4L2_FIELD_INTERLACED_TB : ++ V4L2_FIELD_INTERLACED_BT; ++ ++ amvdec_dst_buf_done_idx(sess, buffer_index, -1, field); ++ amvdec_write_dos(core, MREG_BUFFEROUT, 0); ++ ++end: ++ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); ++ return IRQ_HANDLED; ++} ++ ++struct amvdec_codec_ops codec_mpeg4_ops = { ++ .start = codec_mpeg4_start, ++ .stop = codec_mpeg4_stop, ++ .isr = codec_mpeg4_isr, ++ .can_recycle = codec_mpeg4_can_recycle, ++ .recycle = codec_mpeg4_recycle, ++}; +diff --git a/drivers/media/platform/meson/vdec/codec_mpeg4.h b/drivers/media/platform/meson/vdec/codec_mpeg4.h +new file mode 100644 +index 000000000000..b91b26413185 +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mpeg4.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_CODEC_MPEG4_H_ ++#define __MESON_VDEC_CODEC_MPEG4_H_ ++ ++#include "vdec.h" ++ ++extern struct amvdec_codec_ops codec_mpeg4_ops; ++ ++#endif +\ No newline at end of file +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c +index baecf5921d56..80b43fd5d01f 100644 +--- a/drivers/media/platform/meson/vdec/vdec_platform.c ++++ b/drivers/media/platform/meson/vdec/vdec_platform.c +@@ -10,9 +10,40 @@ + #include "vdec_1.h" + #include "codec_mpeg12.h" + #include "codec_h264.h" ++#include "codec_mpeg4.h" + + static const struct amvdec_format vdec_formats_gxbb[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MPEG4, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_H263, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/h263_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_XVID, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_H264, + .min_buffers = 2, + .max_buffers = 24, +@@ -49,6 +80,36 @@ static const struct amvdec_format vdec_formats_gxbb[] = { + + static const struct amvdec_format vdec_formats_gxl[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MPEG4, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_H263, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/h263_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_XVID, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_H264, + .min_buffers = 2, + .max_buffers = 24, +@@ -85,6 +146,36 @@ static const struct amvdec_format vdec_formats_gxl[] = { + + static const struct amvdec_format vdec_formats_gxm[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MPEG4, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_H263, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/h263_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { ++ .pixfmt = V4L2_PIX_FMT_XVID, ++ .min_buffers = 8, ++ .max_buffers = 8, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mpeg4_ops, ++ .firmware_path = "meson/gx/vmpeg4_mc_5", ++ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_H264, + .min_buffers = 2, + .max_buffers = 24, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch new file mode 100644 index 000000000..26f0758e6 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch @@ -0,0 +1,255 @@ +From 1434c8fcc8ae00e748225ca4922c0d0b7bd15b02 Mon Sep 17 00:00:00 2001 +From: Maxime Jourdan +Date: Sun, 21 Oct 2018 15:14:27 +0200 +Subject: [PATCH 39/53] media: meson: vdec: add MJPEG decoding support + +Add support for V4L2_PIX_FMT_MJPEG +--- + drivers/media/platform/meson/vdec/Makefile | 2 +- + .../media/platform/meson/vdec/codec_mjpeg.c | 140 ++++++++++++++++++ + .../media/platform/meson/vdec/codec_mjpeg.h | 13 ++ + .../media/platform/meson/vdec/vdec_platform.c | 31 ++++ + 4 files changed, 185 insertions(+), 1 deletion(-) + create mode 100644 drivers/media/platform/meson/vdec/codec_mjpeg.c + create mode 100644 drivers/media/platform/meson/vdec/codec_mjpeg.h + +diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile +index bb7a134e2728..acf07f3c3dac 100644 +--- a/drivers/media/platform/meson/vdec/Makefile ++++ b/drivers/media/platform/meson/vdec/Makefile +@@ -3,6 +3,6 @@ + + meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o + meson-vdec-objs += vdec_1.o +-meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o ++meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o codec_mjpeg.o + + obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o +diff --git a/drivers/media/platform/meson/vdec/codec_mjpeg.c b/drivers/media/platform/meson/vdec/codec_mjpeg.c +new file mode 100644 +index 000000000000..abea9e3f944c +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mjpeg.c +@@ -0,0 +1,140 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#include ++#include ++ ++#include "vdec_helpers.h" ++#include "dos_regs.h" ++ ++/* map FW registers to known MJPEG functions */ ++#define MREG_DECODE_PARAM AV_SCRATCH_2 ++#define MREG_TO_AMRISC AV_SCRATCH_8 ++#define MREG_FROM_AMRISC AV_SCRATCH_9 ++#define MREG_FRAME_OFFSET AV_SCRATCH_A ++ ++static int codec_mjpeg_can_recycle(struct amvdec_core *core) ++{ ++ return !amvdec_read_dos(core, MREG_TO_AMRISC); ++} ++ ++static void codec_mjpeg_recycle(struct amvdec_core *core, u32 buf_idx) ++{ ++ amvdec_write_dos(core, MREG_TO_AMRISC, buf_idx + 1); ++} ++ ++/* 4 point triangle */ ++static const uint32_t filt_coef[] = { ++ 0x20402000, 0x20402000, 0x1f3f2101, 0x1f3f2101, ++ 0x1e3e2202, 0x1e3e2202, 0x1d3d2303, 0x1d3d2303, ++ 0x1c3c2404, 0x1c3c2404, 0x1b3b2505, 0x1b3b2505, ++ 0x1a3a2606, 0x1a3a2606, 0x19392707, 0x19392707, ++ 0x18382808, 0x18382808, 0x17372909, 0x17372909, ++ 0x16362a0a, 0x16362a0a, 0x15352b0b, 0x15352b0b, ++ 0x14342c0c, 0x14342c0c, 0x13332d0d, 0x13332d0d, ++ 0x12322e0e, 0x12322e0e, 0x11312f0f, 0x11312f0f, ++ 0x10303010 ++}; ++ ++static void codec_mjpeg_init_scaler(struct amvdec_core *core) ++{ ++ int i; ++ ++ /* PSCALE cbus bmem enable */ ++ amvdec_write_dos(core, PSCALE_CTRL, 0xc000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 0); ++ for (i = 0; i < ARRAY_SIZE(filt_coef); ++i) { ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, filt_coef[i]); ++ } ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 74); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 82); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 78); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 86); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 73); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 81); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); ++ ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 77); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); ++ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 85); ++ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); ++ ++ amvdec_write_dos(core, PSCALE_RST, 0x7); ++ amvdec_write_dos(core, PSCALE_RST, 0); ++} ++ ++static int codec_mjpeg_start(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ ++ amvdec_write_dos(core, AV_SCRATCH_0, 12); ++ amvdec_write_dos(core, AV_SCRATCH_1, 0x031a); ++ ++ amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_4, 0 }, ++ (u32[]){ 4, 0 }); ++ codec_mjpeg_init_scaler(core); ++ ++ amvdec_write_dos(core, MREG_TO_AMRISC, 0); ++ amvdec_write_dos(core, MREG_FROM_AMRISC, 0); ++ amvdec_write_dos(core, MCPU_INTR_MSK, 0xffff); ++ amvdec_write_dos(core, MREG_DECODE_PARAM, ++ (sess->height << 4) | 0x8000); ++ amvdec_write_dos(core, VDEC_ASSIST_AMR1_INT8, 8); ++ ++ /* Intra-only codec */ ++ sess->keyframe_found = 1; ++ ++ return 0; ++} ++ ++static int codec_mjpeg_stop(struct amvdec_session *sess) ++{ ++ return 0; ++} ++ ++static irqreturn_t codec_mjpeg_isr(struct amvdec_session *sess) ++{ ++ struct amvdec_core *core = sess->core; ++ u32 reg; ++ u32 buffer_index; ++ u32 offset; ++ ++ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); ++ ++ reg = amvdec_read_dos(core, MREG_FROM_AMRISC); ++ if (!(reg & 0x7)) ++ return IRQ_HANDLED; ++ ++ buffer_index = ((reg & 0x7) - 1) & 3; ++ offset = amvdec_read_dos(core, MREG_FRAME_OFFSET); ++ amvdec_dst_buf_done_idx(sess, buffer_index, offset, V4L2_FIELD_NONE); ++ ++ amvdec_write_dos(core, MREG_FROM_AMRISC, 0); ++ return IRQ_HANDLED; ++} ++ ++struct amvdec_codec_ops codec_mjpeg_ops = { ++ .start = codec_mjpeg_start, ++ .stop = codec_mjpeg_stop, ++ .isr = codec_mjpeg_isr, ++ .can_recycle = codec_mjpeg_can_recycle, ++ .recycle = codec_mjpeg_recycle, ++}; +diff --git a/drivers/media/platform/meson/vdec/codec_mjpeg.h b/drivers/media/platform/meson/vdec/codec_mjpeg.h +new file mode 100644 +index 000000000000..cc1cf731050d +--- /dev/null ++++ b/drivers/media/platform/meson/vdec/codec_mjpeg.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2018 Maxime Jourdan ++ */ ++ ++#ifndef __MESON_VDEC_CODEC_MJPEG_H_ ++#define __MESON_VDEC_CODEC_MJPEG_H_ ++ ++#include "vdec.h" ++ ++extern struct amvdec_codec_ops codec_mjpeg_ops; ++ ++#endif +\ No newline at end of file +diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c +index 80b43fd5d01f..61def155a5fd 100644 +--- a/drivers/media/platform/meson/vdec/vdec_platform.c ++++ b/drivers/media/platform/meson/vdec/vdec_platform.c +@@ -11,9 +11,20 @@ + #include "codec_mpeg12.h" + #include "codec_h264.h" + #include "codec_mpeg4.h" ++#include "codec_mjpeg.h" + + static const struct amvdec_format vdec_formats_gxbb[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MJPEG, ++ .min_buffers = 4, ++ .max_buffers = 4, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mjpeg_ops, ++ .firmware_path = "meson/gx/vmjpeg_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG4, + .min_buffers = 8, + .max_buffers = 8, +@@ -80,6 +91,16 @@ static const struct amvdec_format vdec_formats_gxbb[] = { + + static const struct amvdec_format vdec_formats_gxl[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MJPEG, ++ .min_buffers = 4, ++ .max_buffers = 4, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mjpeg_ops, ++ .firmware_path = "meson/gx/vmjpeg_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG4, + .min_buffers = 8, + .max_buffers = 8, +@@ -146,6 +167,16 @@ static const struct amvdec_format vdec_formats_gxl[] = { + + static const struct amvdec_format vdec_formats_gxm[] = { + { ++ .pixfmt = V4L2_PIX_FMT_MJPEG, ++ .min_buffers = 4, ++ .max_buffers = 4, ++ .max_width = 1920, ++ .max_height = 1080, ++ .vdec_ops = &vdec_1_ops, ++ .codec_ops = &codec_mjpeg_ops, ++ .firmware_path = "meson/gx/vmjpeg_mc", ++ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, ++ }, { + .pixfmt = V4L2_PIX_FMT_MPEG4, + .min_buffers = 8, + .max_buffers = 8, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch b/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch new file mode 100644 index 000000000..8f6e7bfd9 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch @@ -0,0 +1,44 @@ +From 8bb24f445a3b532a06a1d5bde70daad0c4f3da4f Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Sat, 13 Oct 2018 14:04:46 +0400 +Subject: [PATCH 40/53] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL + +On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems +with reboot; e.g. a ~60 second delay between issuing reboot and the +board power cycling (and in some OS configurations reboot will fail +and require manual power cycling). + +Similar to 'commit c987ac6f1f088663b6dad39281071aeb31d450a8 ("clk: +meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4 +Co-Processor seems to depend on FCLK_DIV3 being operational. + +Bisect gives 'commit 05f814402d6174369b3b29832cbb5eb5ed287059 ("clk: +meson: add fdiv clock gates") between 4.16 and 4.16-rc1 as the first +bad commit. This added support for the missing clock gates before the +fixed PLL fixed dividers (FCLK_DIVx) and the clock framework which +disabled all the unused fixed dividers, thus it disabled a critical +clock path for the SCPI Co-Processor. + +This change simply sets the FCLK_DIV3 gate as critical to ensure +nothing can disable it. + +Signed-off-by: Christian Hewitt +--- + drivers/clk/meson/gxbb.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c +index 4d4f6d842c31..a6fae1c00df3 100644 +--- a/drivers/clk/meson/gxbb.c ++++ b/drivers/clk/meson/gxbb.c +@@ -513,6 +513,7 @@ static struct clk_fixed_factor gxbb_fclk_div3_div = { + .ops = &clk_fixed_factor_ops, + .parent_names = (const char *[]){ "fixed_pll" }, + .num_parents = 1, ++ .flags = CLK_IS_CRITICAL, + }, + }; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch b/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch new file mode 100644 index 000000000..4dda76064 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch @@ -0,0 +1,167 @@ +From cb1d14ed8b5d2dc67b8d7769b5314fd5b9010f23 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 20 Jul 2018 15:29:18 +0200 +Subject: [PATCH 41/53] drm/meson: Add HDMI 1.4 4k modes + +Add the timings for the HDMI 1.4 4K modes support : +- 3840x2160@30 +- 3840x2160@25 +- 3840x2160@24 + +Since the 297000Hz pixel clock is already managed and the modes are +compatible with the HDMI 1.4 current HDMI PHY+Controller support, only +the missing timings values needs to be added. +--- + drivers/gpu/drm/meson/meson_venc.c | 129 +++++++++++++++++++++++++++++ + 1 file changed, 129 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c +index 7a3a6ed9f27b..0fbe525b94c8 100644 +--- a/drivers/gpu/drm/meson/meson_venc.c ++++ b/drivers/gpu/drm/meson/meson_venc.c +@@ -698,6 +698,132 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = { + }, + }; + ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p24 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+1660-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p25 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+1440-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p30 = { ++ .encp = { ++ .dvi_settings = 0x1, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x8, ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ .video_filt_ctrl = 0x1000, ++ .video_filt_ctrl_present = true, ++ /* video_ofld_voav_ofst */ ++ .yfp1_htime = 140, ++ .yfp2_htime = 140+3840, ++ .max_pxcnt = 3840+560-1, ++ .hspuls_begin = 2156+1920, ++ .hspuls_end = 44, ++ .hspuls_switch = 44, ++ .vspuls_begin = 140, ++ .vspuls_end = 2059+1920, ++ .vspuls_bline = 0, ++ .vspuls_eline = 4, ++ .havon_begin = 148, ++ .havon_end = 3987, ++ .vavon_bline = 89, ++ .vavon_eline = 2248, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 44, ++ .hso_end = 2156+1920, ++ .vso_begin = 2100+1920, ++ .vso_end = 2164+1920, ++ .vso_bline = 51, ++ .vso_eline = 53, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 2249, ++ }, ++}; ++ + struct meson_hdmi_venc_vic_mode { + unsigned int vic; + union meson_hdmi_venc_mode *mode; +@@ -719,6 +845,9 @@ struct meson_hdmi_venc_vic_mode { + { 34, &meson_hdmi_encp_mode_1080p30 }, + { 31, &meson_hdmi_encp_mode_1080p50 }, + { 16, &meson_hdmi_encp_mode_1080p60 }, ++ { 93, &meson_hdmi_encp_mode_2160p24 }, ++ { 94, &meson_hdmi_encp_mode_2160p25 }, ++ { 95, &meson_hdmi_encp_mode_2160p30 }, + { 0, NULL}, /* sentinel */ + }; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch b/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch new file mode 100644 index 000000000..2c37cd33c --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch @@ -0,0 +1,94 @@ +From 040f80b511f207308bbd7c177e148551cbd2c110 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= +Date: Sat, 8 Sep 2018 15:46:33 +0200 +Subject: [PATCH 42/53] drm/meson: Use drm_fbdev_generic_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The CMA helper is already using the drm_fb_helper_generic_probe part of +the generic fbdev emulation. This patch makes full use of the generic +fbdev emulation by using its drm_client callbacks. This means that +drm_mode_config_funcs->output_poll_changed and drm_driver->lastclose are +now handled by the emulation code. Additionally fbdev unregister happens +automatically on drm_dev_unregister(). + +The drm_fbdev_generic_setup() call is put after drm_dev_register() in the +driver. This is done to highlight the fact that fbdev emulation is an +internal client that makes use of the driver, it is not part of the +driver as such. If fbdev setup fails, an error is printed, but the driver +succeeds probing. + +Cc: Neil Armstrong +Signed-off-by: Noralf Trønnes +--- + drivers/gpu/drm/meson/meson_drv.c | 18 ++---------------- + drivers/gpu/drm/meson/meson_drv.h | 1 - + 2 files changed, 2 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index 63bb2727b183..a13704ab5d11 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -69,15 +69,7 @@ + * - Powering Up HDMI controller and PHY + */ + +-static void meson_fb_output_poll_changed(struct drm_device *dev) +-{ +- struct meson_drm *priv = dev->dev_private; +- +- drm_fbdev_cma_hotplug_event(priv->fbdev); +-} +- + static const struct drm_mode_config_funcs meson_mode_config_funcs = { +- .output_poll_changed = meson_fb_output_poll_changed, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, + .fb_create = drm_gem_fb_create, +@@ -319,13 +311,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + + drm_mode_config_reset(drm); + +- priv->fbdev = drm_fbdev_cma_init(drm, 32, +- drm->mode_config.num_connector); +- if (IS_ERR(priv->fbdev)) { +- ret = PTR_ERR(priv->fbdev); +- goto free_drm; +- } +- + drm_kms_helper_poll_init(drm); + + platform_set_drvdata(pdev, priv); +@@ -334,6 +319,8 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + if (ret) + goto uninstall_irq; + ++ drm_fbdev_generic_setup(drm, 32); ++ + return 0; + + uninstall_irq: +@@ -364,7 +351,6 @@ static void meson_drv_unbind(struct device *dev) + drm_dev_unregister(drm); + drm_irq_uninstall(drm); + drm_kms_helper_poll_fini(drm); +- drm_fbdev_cma_fini(priv->fbdev); + drm_mode_config_cleanup(drm); + drm_dev_put(drm); + +diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h +index a955354711ce..4dccf4cd042a 100644 +--- a/drivers/gpu/drm/meson/meson_drv.h ++++ b/drivers/gpu/drm/meson/meson_drv.h +@@ -40,7 +40,6 @@ struct meson_drm { + + struct drm_device *drm; + struct drm_crtc *crtc; +- struct drm_fbdev_cma *fbdev; + struct drm_plane *primary_plane; + struct drm_plane *overlay_plane; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch b/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch new file mode 100644 index 000000000..22fa32024 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch @@ -0,0 +1,150 @@ +From 3514e950490879dcdd75c74196e26eab8f5b740d Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 14 Nov 2018 16:48:50 +0100 +Subject: [PATCH 43/53] drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling + support + +Add support for SCDC Setup for TMDS Clock > 3.4GHz and enable TMDS +Scrambling when supported or mandatory. + +This patch also adds an helper to setup the control bit to support +the hight TMDS Bit Period/TMDS Clock-Period Ratio as required with +TMDS Clock > 3.4GHz for HDMI2.0 3840x2160@60/50 modes. + +These changes were based on work done by Huicong Xu +and Nickey Yang to support HDMI2.0 modes +on the Rockchip 4.4 BSP kernel at [1] + +[1] https://github.com/rockchip-linux/kernel/tree/release-4.4 + +Cc: Nickey Yang +Cc: Huicong Xu +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 45 +++++++++++++++++++++-- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 1 + + include/drm/bridge/dw_hdmi.h | 1 + + 3 files changed, 44 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 1fc12708dbb5..2a30d8393477 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -1026,6 +1027,20 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, + } + EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write); + ++void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi) ++{ ++ unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mpixelclock; ++ ++ /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ ++ if (hdmi->connector.display_info.hdmi.scdc.supported) { ++ if (mtmdsclock > 340000000) ++ drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1); ++ else ++ drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 0); ++ } ++} ++EXPORT_SYMBOL_GPL(dw_hdmi_set_high_tmds_clock_ratio); ++ + static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable) + { + hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0, +@@ -1351,11 +1366,12 @@ static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) + + static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + { ++ bool is_hdmi2_sink = hdmi->connector.display_info.hdmi.scdc.supported; + struct hdmi_avi_infoframe frame; + u8 val; + + /* Initialise info frame from DRM mode */ +- drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false); ++ drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2_sink); + + if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) + frame.colorspace = HDMI_COLORSPACE_YUV444; +@@ -1514,7 +1530,8 @@ static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, + static void hdmi_av_composer(struct dw_hdmi *hdmi, + const struct drm_display_mode *mode) + { +- u8 inv_val; ++ u8 inv_val, bytes; ++ struct drm_hdmi_info *hdmi_info = &hdmi->connector.display_info.hdmi; + struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; + int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; + unsigned int vdisplay; +@@ -1524,7 +1541,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); + + /* Set up HDMI_FC_INVIDCONF */ +- inv_val = (hdmi->hdmi_data.hdcp_enable ? ++ inv_val = (hdmi->hdmi_data.hdcp_enable || ++ vmode->mpixelclock > 340000000 || ++ hdmi_info->scdc.scrambling.low_rates ? + HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE : + HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE); + +@@ -1573,6 +1592,26 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + vsync_len /= 2; + } + ++ /* Scrambling Control */ ++ if (hdmi_info->scdc.supported) { ++ if (vmode->mpixelclock > 340000000 || ++ hdmi_info->scdc.scrambling.low_rates) { ++ drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION, ++ &bytes); ++ drm_scdc_writeb(&hdmi->i2c->adap, SCDC_SOURCE_VERSION, ++ bytes); ++ drm_scdc_set_scrambling(&hdmi->i2c->adap, 1); ++ hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, ++ HDMI_MC_SWRSTZ); ++ hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL); ++ } else { ++ hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL); ++ hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, ++ HDMI_MC_SWRSTZ); ++ drm_scdc_set_scrambling(&hdmi->i2c->adap, 0); ++ } ++ } ++ + /* Set up horizontal active pixel width */ + hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); + hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h +index 9d90eb9c46e5..3f3c616eba97 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h +@@ -255,6 +255,7 @@ + #define HDMI_FC_MASK2 0x10DA + #define HDMI_FC_POL2 0x10DB + #define HDMI_FC_PRCONF 0x10E0 ++#define HDMI_FC_SCRAMBLER_CTRL 0x10E1 + + #define HDMI_FC_GMD_STAT 0x1100 + #define HDMI_FC_GMD_EN 0x1101 +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index ccb5aa8468e0..d7cc5d094270 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -156,6 +156,7 @@ void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); + void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); + void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); + void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); ++void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi); + + /* PHY configuration */ + void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch b/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch new file mode 100644 index 000000000..d95c48cd6 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch @@ -0,0 +1,71 @@ +From 9f4886b1df0a93a313bc8a238ca6f020fbe8ae90 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 12 Nov 2018 16:08:13 +0100 +Subject: [PATCH 44/53] drm/meson: add HDMI div40 TMDS mode + +Add support for TMDS Clock > 3.4GHz for HDMI2.0 display modes. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 24 ++++++++++++++++++++---- + 1 file changed, 20 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 807111ebfdd9..b8775102b100 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -365,7 +365,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + unsigned int wr_clk = + readl_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING)); + +- DRM_DEBUG_DRIVER("%d:\"%s\"\n", mode->base.id, mode->name); ++ DRM_DEBUG_DRIVER("%d:\"%s\" div%d\n", mode->base.id, mode->name, ++ mode->clock > 340000 ? 40 : 10); + + /* Enable clocks */ + regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); +@@ -385,9 +386,17 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + /* Enable normal output to PHY */ + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); + +- /* TMDS pattern setup (TOFIX pattern for 4k2k scrambling) */ +- dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0x001f001f); +- dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, 0x001f001f); ++ /* TMDS pattern setup (TOFIX Handle the YUV420 case) */ ++ if (mode->clock > 340000) { ++ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0); ++ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, ++ 0x03ff03ff); ++ } else { ++ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, ++ 0x001f001f); ++ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, ++ 0x001f001f); ++ } + + /* Load TMDS pattern */ + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1); +@@ -413,6 +422,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + /* Disable clock, fifo, fifo_wr */ + regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); + ++ dw_hdmi_set_high_tmds_clock_ratio(hdmi); ++ + msleep(100); + + /* Reset PHY 3 times in a row */ +@@ -562,6 +573,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + mode->vdisplay, mode->vsync_start, + mode->vsync_end, mode->vtotal, mode->type, mode->flags); + ++ /* If sink max TMDS clock < 340MHz, we reject the HDMI2.0 modes */ ++ if (mode->clock > 340000 && ++ connector->display_info.max_tmds_clock < 340000) ++ return MODE_BAD; ++ + /* Check against non-VIC supported modes */ + if (!vic) { + status = meson_venc_hdmi_supported_mode(mode); +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch b/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch new file mode 100644 index 000000000..57d6db364 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch @@ -0,0 +1,30 @@ +From 954b1e933ad1dd534c3f5b01fde7b52a62b78973 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 12 Nov 2018 16:10:07 +0100 +Subject: [PATCH 45/53] drm/meson: add support for HDMI2.0 2160p modes + +Now we support the TMDS Clock > 3.4GHz and support the SCDC Control +operation in the DW-HDMI Controller, we can enable support for the +HDMI2.0 3840x2160@60/50 RGB444 display modes. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_venc.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c +index 0fbe525b94c8..1bcd642b6e42 100644 +--- a/drivers/gpu/drm/meson/meson_venc.c ++++ b/drivers/gpu/drm/meson/meson_venc.c +@@ -848,6 +848,8 @@ struct meson_hdmi_venc_vic_mode { + { 93, &meson_hdmi_encp_mode_2160p24 }, + { 94, &meson_hdmi_encp_mode_2160p25 }, + { 95, &meson_hdmi_encp_mode_2160p30 }, ++ { 96, &meson_hdmi_encp_mode_2160p25 }, ++ { 97, &meson_hdmi_encp_mode_2160p30 }, + { 0, NULL}, /* sentinel */ + }; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch b/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch new file mode 100644 index 000000000..706544fb4 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch @@ -0,0 +1,200 @@ +From afdd89304db8f3e858ee32cefaf29ed0be12500e Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 14 Nov 2018 17:19:36 +0100 +Subject: [PATCH 46/53] drm/bridge: dw-hdmi: add support for YUV420 output + +In order to support the HDMI2.0 YUV420 display modes, this patch +adds support for the YUV420 TMDS Clock divided by 2 and the controller +passthrough mode. + +This patch is based on work from Zheng Yang in +the Rockchip Linux 4.4 BSP at [1] + +[1] https://github.com/rockchip-linux/kernel/tree/release-4.4 + +Cc: Zheng Yang +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 ++++++++++++++++++----- + 1 file changed, 50 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 2a30d8393477..c3e4ed1e2d1c 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -94,6 +94,7 @@ struct hdmi_vmode { + unsigned int mpixelclock; + unsigned int mpixelrepetitioninput; + unsigned int mpixelrepetitionoutput; ++ unsigned int mtmdsclock; + }; + + struct hdmi_data_info { +@@ -549,7 +550,7 @@ static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi) + static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi) + { + mutex_lock(&hdmi->audio_mutex); +- hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, ++ hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, + hdmi->sample_rate); + mutex_unlock(&hdmi->audio_mutex); + } +@@ -558,7 +559,7 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) + { + mutex_lock(&hdmi->audio_mutex); + hdmi->sample_rate = rate; +- hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, ++ hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, + hdmi->sample_rate); + mutex_unlock(&hdmi->audio_mutex); + } +@@ -659,6 +660,20 @@ static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format) + } + } + ++static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format) ++{ ++ switch (bus_format) { ++ case MEDIA_BUS_FMT_UYYVYY8_0_5X24: ++ case MEDIA_BUS_FMT_UYYVYY10_0_5X30: ++ case MEDIA_BUS_FMT_UYYVYY12_0_5X36: ++ case MEDIA_BUS_FMT_UYYVYY16_0_5X48: ++ return true; ++ ++ default: ++ return false; ++ } ++} ++ + static int hdmi_bus_fmt_color_depth(unsigned int bus_format) + { + switch (bus_format) { +@@ -888,7 +903,8 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi) + u8 val, vp_conf; + + if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || +- hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) { ++ hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) || ++ hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { + switch (hdmi_bus_fmt_color_depth( + hdmi->hdmi_data.enc_out_bus_format)) { + case 8: +@@ -1029,7 +1045,7 @@ EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write); + + void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi) + { +- unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mpixelclock; ++ unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; + + /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ + if (hdmi->connector.display_info.hdmi.scdc.supported) { +@@ -1370,6 +1386,9 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + struct hdmi_avi_infoframe frame; + u8 val; + ++ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) ++ is_hdmi2_sink = true; ++ + /* Initialise info frame from DRM mode */ + drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2_sink); + +@@ -1377,6 +1396,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + frame.colorspace = HDMI_COLORSPACE_YUV444; + else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) + frame.colorspace = HDMI_COLORSPACE_YUV422; ++ else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) ++ frame.colorspace = HDMI_COLORSPACE_YUV420; + else + frame.colorspace = HDMI_COLORSPACE_RGB; + +@@ -1534,15 +1555,18 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + struct drm_hdmi_info *hdmi_info = &hdmi->connector.display_info.hdmi; + struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; + int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; +- unsigned int vdisplay; ++ unsigned int vdisplay, hdisplay; + +- vmode->mpixelclock = mode->clock * 1000; ++ vmode->mtmdsclock = vmode->mpixelclock = mode->clock * 1000; + + dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); + ++ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) ++ vmode->mtmdsclock /= 2; ++ + /* Set up HDMI_FC_INVIDCONF */ + inv_val = (hdmi->hdmi_data.hdcp_enable || +- vmode->mpixelclock > 340000000 || ++ vmode->mtmdsclock > 340000000 || + hdmi_info->scdc.scrambling.low_rates ? + HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE : + HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE); +@@ -1576,6 +1600,22 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + + hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); + ++ hdisplay = mode->hdisplay; ++ hblank = mode->htotal - mode->hdisplay; ++ h_de_hs = mode->hsync_start - mode->hdisplay; ++ hsync_len = mode->hsync_end - mode->hsync_start; ++ ++ /* ++ * When we're setting a YCbCr420 mode, we need ++ * to adjust the horizontal timing to suit. ++ */ ++ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { ++ hdisplay /= 2; ++ hblank /= 2; ++ h_de_hs /= 2; ++ hsync_len /= 2; ++ } ++ + vdisplay = mode->vdisplay; + vblank = mode->vtotal - mode->vdisplay; + v_de_vs = mode->vsync_start - mode->vdisplay; +@@ -1594,7 +1634,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + + /* Scrambling Control */ + if (hdmi_info->scdc.supported) { +- if (vmode->mpixelclock > 340000000 || ++ if (vmode->mtmdsclock > 340000000 || + hdmi_info->scdc.scrambling.low_rates) { + drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION, + &bytes); +@@ -1613,15 +1653,14 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + } + + /* Set up horizontal active pixel width */ +- hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); +- hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); ++ hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1); ++ hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0); + + /* Set up vertical active lines */ + hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1); + hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0); + + /* Set up horizontal blanking pixel region width */ +- hblank = mode->htotal - mode->hdisplay; + hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1); + hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0); + +@@ -1629,7 +1668,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK); + + /* Set up HSYNC active edge delay width (in pixel clks) */ +- h_de_hs = mode->hsync_start - mode->hdisplay; + hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1); + hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0); + +@@ -1637,7 +1675,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, + hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY); + + /* Set up HSYNC active pulse width (in pixel clks) */ +- hsync_len = mode->hsync_end - mode->hsync_start; + hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1); + hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0); + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch b/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch new file mode 100644 index 000000000..1cdbe1360 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch @@ -0,0 +1,104 @@ +From c65b7b6a68ad5ccae7e861f840f1b45d79396929 Mon Sep 17 00:00:00 2001 +From: Zheng Yang +Date: Tue, 27 Jun 2017 16:22:01 +0800 +Subject: [PATCH 47/53] drm/bridge: dw-hdmi: support dynamically get input/out + color info + +To get input/output bus_format/enc_format dynamically, this patch +introduce following funstion in plat_data: + - get_input_bus_format + - get_output_bus_format + - get_enc_in_encoding + - get_enc_out_encoding + +Signed-off-by: Zheng Yang +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 28 +++++++++++++++++------ + include/drm/bridge/dw_hdmi.h | 5 ++++ + 2 files changed, 26 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index c3e4ed1e2d1c..6473df3068ce 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -1774,6 +1774,7 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) + static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + { + int ret; ++ void *data = hdmi->plat_data->phy_data; + + hdmi_disable_overflow_interrupts(hdmi); + +@@ -1785,10 +1786,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic); + } + +- if ((hdmi->vic == 6) || (hdmi->vic == 7) || +- (hdmi->vic == 21) || (hdmi->vic == 22) || +- (hdmi->vic == 2) || (hdmi->vic == 3) || +- (hdmi->vic == 17) || (hdmi->vic == 18)) ++ if (hdmi->plat_data->get_enc_out_encoding) ++ hdmi->hdmi_data.enc_out_encoding = ++ hdmi->plat_data->get_enc_out_encoding(data); ++ else if ((hdmi->vic == 6) || (hdmi->vic == 7) || ++ (hdmi->vic == 21) || (hdmi->vic == 22) || ++ (hdmi->vic == 2) || (hdmi->vic == 3) || ++ (hdmi->vic == 17) || (hdmi->vic == 18)) + hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601; + else + hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709; +@@ -1797,21 +1801,31 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) + hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; + + /* TOFIX: Get input format from plat data or fallback to RGB888 */ +- if (hdmi->plat_data->input_bus_format) ++ if (hdmi->plat_data->get_input_bus_format) ++ hdmi->hdmi_data.enc_in_bus_format = ++ hdmi->plat_data->get_input_bus_format(data); ++ else if (hdmi->plat_data->input_bus_format) + hdmi->hdmi_data.enc_in_bus_format = + hdmi->plat_data->input_bus_format; + else + hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24; + + /* TOFIX: Get input encoding from plat data or fallback to none */ +- if (hdmi->plat_data->input_bus_encoding) ++ if (hdmi->plat_data->get_enc_in_encoding) ++ hdmi->hdmi_data.enc_in_encoding = ++ hdmi->plat_data->get_enc_in_encoding(data); ++ else if (hdmi->plat_data->input_bus_encoding) + hdmi->hdmi_data.enc_in_encoding = + hdmi->plat_data->input_bus_encoding; + else + hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT; + + /* TOFIX: Default to RGB888 output format */ +- hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; ++ if (hdmi->plat_data->get_output_bus_format) ++ hdmi->hdmi_data.enc_out_bus_format = ++ hdmi->plat_data->get_output_bus_format(data); ++ else ++ hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; + + hdmi->hdmi_data.pix_repet_factor = 0; + hdmi->hdmi_data.hdcp_enable = 0; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index d7cc5d094270..27f9cce66b6a 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -141,6 +141,11 @@ struct dw_hdmi_plat_data { + int (*configure_phy)(struct dw_hdmi *hdmi, + const struct dw_hdmi_plat_data *pdata, + unsigned long mpixelclock); ++ ++ unsigned long (*get_input_bus_format)(void *data); ++ unsigned long (*get_output_bus_format)(void *data); ++ unsigned long (*get_enc_in_encoding)(void *data); ++ unsigned long (*get_enc_out_encoding)(void *data); + }; + + struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev, +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch b/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch new file mode 100644 index 000000000..7a1c4338a --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch @@ -0,0 +1,48 @@ +From 725830ef41b23e35b282ecf78f682c0c131a0042 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 14 Nov 2018 17:39:46 +0100 +Subject: [PATCH 48/53] drm/bridge: dw-hdmi: allow ycbcr420 modes for >= 0x200a + +Now the DW-HDMI Controller supports the HDMI2.0 modes, enable support +for these modes in the connector if the platform supports them. +We limit these modes to DW-HDMI IP version >= 0x200a which +are designed to support HDMI2.0 display modes. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++++ + include/drm/bridge/dw_hdmi.h | 1 + + 2 files changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +index 6473df3068ce..d10277f9ef0b 100644 +--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c ++++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +@@ -2575,6 +2575,12 @@ __dw_hdmi_probe(struct platform_device *pdev, + if (hdmi->phy.ops->setup_hpd) + hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data); + ++ if (hdmi->version >= 0x200a) ++ hdmi->connector.ycbcr_420_allowed = ++ hdmi->plat_data->ycbcr_420_allowed; ++ else ++ hdmi->connector.ycbcr_420_allowed = false; ++ + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo.parent = dev; + pdevinfo.id = PLATFORM_DEVID_AUTO; +diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h +index 27f9cce66b6a..c04f497a919b 100644 +--- a/include/drm/bridge/dw_hdmi.h ++++ b/include/drm/bridge/dw_hdmi.h +@@ -128,6 +128,7 @@ struct dw_hdmi_plat_data { + const struct drm_display_mode *mode); + unsigned long input_bus_format; + unsigned long input_bus_encoding; ++ bool ycbcr_420_allowed; + + /* Vendor PHY support */ + const struct dw_hdmi_phy_ops *phy_ops; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch b/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch new file mode 100644 index 000000000..7c98e9793 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch @@ -0,0 +1,584 @@ +From d27e2f1dac6e94f845d83725481adf9fc1c9bb21 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 15 Nov 2018 16:41:23 +0100 +Subject: [PATCH 49/53] drm/meson: Add YUV420 output support + +This patch adds support for the YUV420 output from the Amlogic Meson SoCs +Video Processing Unit to the HDMI Controller. + +The YUV420 is obtained by generating a YUV444 pixel stream like +the classic HDMI display modes, but then the Video Encoder output +can be configured to down-sample the YUV444 pixel stream to a YUV420 +stream. +In addition if pixel stream down-sampling, the Y Cb Cr components must +also be mapped differently to align with the HDMI2.0 specifications. + +This mode needs a different clock generation scheme since the TMDS PHY +clock must match the 10x ration with the YUV420 pixel clock, but +the video encoder must run at 2x the pixel clock. + +This patch adds the TMDS PHY clock value in all the video clock setup +in order to better support these specific uses cases and switch +to the Common Clock framework for clocks handling in the future. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 108 ++++++++++++++++++++---- + drivers/gpu/drm/meson/meson_vclk.c | 95 ++++++++++++++++----- + drivers/gpu/drm/meson/meson_vclk.h | 7 +- + drivers/gpu/drm/meson/meson_venc.c | 6 +- + drivers/gpu/drm/meson/meson_venc.h | 11 +++ + drivers/gpu/drm/meson/meson_venc_cvbs.c | 3 +- + 6 files changed, 184 insertions(+), 46 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index b8775102b100..83360f37d9ce 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -141,6 +141,8 @@ struct meson_dw_hdmi { + struct regulator *hdmi_supply; + u32 irq_stat; + struct dw_hdmi *hdmi; ++ unsigned long input_bus_format; ++ unsigned long output_bus_format; + }; + #define encoder_to_meson_dw_hdmi(x) \ + container_of(x, struct meson_dw_hdmi, encoder) +@@ -323,25 +325,36 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, + { + struct meson_drm *priv = dw_hdmi->priv; + int vic = drm_match_cea_mode(mode); ++ unsigned int phy_freq; + unsigned int vclk_freq; + unsigned int venc_freq; + unsigned int hdmi_freq; + + vclk_freq = mode->clock; + ++ /* For 420, pixel clock is half unlike venc clock */ ++ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) ++ vclk_freq /= 2; ++ ++ /* TMDS clock is pixel_clock * 10 */ ++ phy_freq = vclk_freq * 10; ++ + if (!vic) { +- meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, vclk_freq, +- vclk_freq, vclk_freq, false); ++ meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq, ++ vclk_freq, vclk_freq, vclk_freq, false); + return; + } + ++ /* 480i/576i needs global pixel doubling */ + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + vclk_freq *= 2; + + venc_freq = vclk_freq; + hdmi_freq = vclk_freq; + +- if (meson_venc_hdmi_venc_repeat(vic)) ++ /* VENC double pixels for 1080i, 720p and YUV420 modes */ ++ if (meson_venc_hdmi_venc_repeat(vic) || ++ dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) + venc_freq *= 2; + + vclk_freq = max(venc_freq, hdmi_freq); +@@ -349,11 +362,11 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + venc_freq /= 2; + +- DRM_DEBUG_DRIVER("vclk:%d venc=%d hdmi=%d enci=%d\n", +- vclk_freq, venc_freq, hdmi_freq, ++ DRM_DEBUG_DRIVER("vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", ++ phy_freq, vclk_freq, venc_freq, hdmi_freq, + priv->venc.hdmi_use_enci); + +- meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, vclk_freq, ++ meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq, + venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); + } + +@@ -387,7 +400,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); + + /* TMDS pattern setup (TOFIX Handle the YUV420 case) */ +- if (mode->clock > 340000) { ++ if (mode->clock > 340000 && ++ dw_hdmi->input_bus_format == MEDIA_BUS_FMT_YUV8_1X24) { + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0); + dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, + 0x03ff03ff); +@@ -560,6 +574,8 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + const struct drm_display_mode *mode) + { + struct meson_drm *priv = connector->dev->dev_private; ++ bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported; ++ unsigned int phy_freq; + unsigned int vclk_freq; + unsigned int venc_freq; + unsigned int hdmi_freq; +@@ -573,9 +589,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + mode->vdisplay, mode->vsync_start, + mode->vsync_end, mode->vtotal, mode->type, mode->flags); + +- /* If sink max TMDS clock < 340MHz, we reject the HDMI2.0 modes */ ++ /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ + if (mode->clock > 340000 && +- connector->display_info.max_tmds_clock < 340000) ++ connector->display_info.max_tmds_clock < 340000 && ++ !drm_mode_is_420_only(&connector->display_info, mode) && ++ !drm_mode_is_420_also(&connector->display_info, mode)) + return MODE_BAD; + + /* Check against non-VIC supported modes */ +@@ -591,6 +609,15 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + + vclk_freq = mode->clock; + ++ /* For 420, pixel clock is half unlike venc clock */ ++ if (drm_mode_is_420_only(&connector->display_info, mode) || ++ (!is_hdmi2_sink && ++ drm_mode_is_420_also(&connector->display_info, mode))) ++ vclk_freq /= 2; ++ ++ /* TMDS clock is pixel_clock * 10 */ ++ phy_freq = vclk_freq * 10; ++ + /* 480i/576i needs global pixel doubling */ + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + vclk_freq *= 2; +@@ -598,8 +625,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + venc_freq = vclk_freq; + hdmi_freq = vclk_freq; + +- /* VENC double pixels for 1080i and 720p modes */ +- if (meson_venc_hdmi_venc_repeat(vic)) ++ /* VENC double pixels for 1080i, 720p and YUV420 modes */ ++ if (meson_venc_hdmi_venc_repeat(vic) || ++ drm_mode_is_420_only(&connector->display_info, mode) || ++ (!is_hdmi2_sink && ++ drm_mode_is_420_also(&connector->display_info, mode))) + venc_freq *= 2; + + vclk_freq = max(venc_freq, hdmi_freq); +@@ -607,10 +637,10 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + venc_freq /= 2; + +- dev_dbg(connector->dev->dev, "%s: vclk:%d venc=%d hdmi=%d\n", __func__, +- vclk_freq, venc_freq, hdmi_freq); ++ dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", ++ __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); + +- return meson_vclk_vic_supported_freq(vclk_freq); ++ return meson_vclk_vic_supported_freq(phy_freq, vclk_freq); + } + + /* Encoder */ +@@ -628,6 +658,21 @@ static int meson_venc_hdmi_encoder_atomic_check(struct drm_encoder *encoder, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) + { ++ struct meson_dw_hdmi *dw_hdmi = encoder_to_meson_dw_hdmi(encoder); ++ struct drm_display_info *info = &conn_state->connector->display_info; ++ struct drm_display_mode *mode = &crtc_state->mode; ++ bool is_hdmi2_sink = ++ conn_state->connector->display_info.hdmi.scdc.supported; ++ ++ if (drm_mode_is_420_only(info, mode) || ++ (!is_hdmi2_sink && drm_mode_is_420_also(info, mode))) { ++ dw_hdmi->input_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; ++ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; ++ } else { ++ dw_hdmi->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; ++ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; ++ } ++ + return 0; + } + +@@ -665,18 +710,30 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_encoder *encoder, + struct meson_dw_hdmi *dw_hdmi = encoder_to_meson_dw_hdmi(encoder); + struct meson_drm *priv = dw_hdmi->priv; + int vic = drm_match_cea_mode(mode); ++ unsigned int ycrcb_map = MESON_VENC_MAP_CB_Y_CR; ++ bool yuv420_mode = false; + + DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n", + mode->base.id, mode->name, vic); + ++ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) { ++ ycrcb_map = MESON_VENC_MAP_CR_Y_CB; ++ yuv420_mode = true; ++ } ++ + /* VENC + VENC-DVI Mode setup */ +- meson_venc_hdmi_mode_set(priv, vic, mode); ++ meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode); + + /* VCLK Set clock */ + dw_hdmi_set_vclk(dw_hdmi, mode); + +- /* Setup YUV444 to HDMI-TX, no 10bit diphering */ +- writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); ++ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) ++ /* Setup YUV420 to HDMI-TX, no 10bit diphering */ ++ writel_relaxed(2 | (2 << 2), ++ priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); ++ else ++ /* Setup YUV444 to HDMI-TX, no 10bit diphering */ ++ writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); + } + + static const struct drm_encoder_helper_funcs +@@ -715,6 +772,20 @@ static const struct regmap_config meson_dw_hdmi_regmap_config = { + .fast_io = true, + }; + ++static unsigned long meson_dw_hdmi_get_in_bus_format(void *data) ++{ ++ struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; ++ ++ return dw_hdmi->input_bus_format; ++} ++ ++static unsigned long meson_dw_hdmi_get_out_bus_format(void *data) ++{ ++ struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; ++ ++ return dw_hdmi->output_bus_format; ++} ++ + static bool meson_hdmi_connector_is_available(struct device *dev) + { + struct device_node *ep, *remote; +@@ -891,6 +962,9 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master, + dw_plat_data->phy_data = meson_dw_hdmi; + dw_plat_data->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; + dw_plat_data->input_bus_encoding = V4L2_YCBCR_ENC_709; ++ dw_plat_data->get_input_bus_format = meson_dw_hdmi_get_in_bus_format; ++ dw_plat_data->get_output_bus_format = meson_dw_hdmi_get_out_bus_format; ++ dw_plat_data->ycbcr_420_allowed = true; + + platform_set_drvdata(pdev, meson_dw_hdmi); + +diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c +index 5acccebd026d..27c9c5ead234 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.c ++++ b/drivers/gpu/drm/meson/meson_vclk.c +@@ -337,12 +337,17 @@ enum { + /* 2970 /1 /1 /1 /5 /2 => /1 /1 */ + MESON_VCLK_HDMI_297000, + /* 5940 /1 /1 /2 /5 /1 => /1 /1 */ +- MESON_VCLK_HDMI_594000 ++ MESON_VCLK_HDMI_594000, ++/* 2970 /1 /1 /1 /5 /1 => /1 /2 */ ++ MESON_VCLK_HDMI_594000_YUV420, + }; + + struct meson_vclk_params { ++ unsigned int pll_freq; ++ unsigned int phy_freq; ++ unsigned int vclk_freq; ++ unsigned int venc_freq; + unsigned int pixel_freq; +- unsigned int pll_base_freq; + unsigned int pll_od1; + unsigned int pll_od2; + unsigned int pll_od3; +@@ -350,8 +355,11 @@ struct meson_vclk_params { + unsigned int vclk_div; + } params[] = { + [MESON_VCLK_HDMI_ENCI_54000] = { ++ .pll_freq = 4320000, ++ .phy_freq = 270000, ++ .vclk_freq = 54000, ++ .venc_freq = 54000, + .pixel_freq = 54000, +- .pll_base_freq = 4320000, + .pll_od1 = 4, + .pll_od2 = 4, + .pll_od3 = 1, +@@ -359,8 +367,11 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_DDR_54000] = { +- .pixel_freq = 54000, +- .pll_base_freq = 4320000, ++ .pll_freq = 4320000, ++ .phy_freq = 270000, ++ .vclk_freq = 54000, ++ .venc_freq = 54000, ++ .pixel_freq = 27000, + .pll_od1 = 4, + .pll_od2 = 4, + .pll_od3 = 1, +@@ -368,8 +379,11 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_DDR_148500] = { +- .pixel_freq = 148500, +- .pll_base_freq = 2970000, ++ .pll_freq = 2970000, ++ .phy_freq = 742500, ++ .vclk_freq = 148500, ++ .venc_freq = 148500, ++ .pixel_freq = 74250, + .pll_od1 = 4, + .pll_od2 = 1, + .pll_od3 = 1, +@@ -377,8 +391,11 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_74250] = { ++ .pll_freq = 2970000, ++ .phy_freq = 742500, ++ .vclk_freq = 74250, ++ .venc_freq = 74250, + .pixel_freq = 74250, +- .pll_base_freq = 2970000, + .pll_od1 = 2, + .pll_od2 = 2, + .pll_od3 = 2, +@@ -386,8 +403,11 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_148500] = { ++ .pll_freq = 2970000, ++ .phy_freq = 1485000, ++ .vclk_freq = 148500, ++ .venc_freq = 148500, + .pixel_freq = 148500, +- .pll_base_freq = 2970000, + .pll_od1 = 1, + .pll_od2 = 2, + .pll_od3 = 2, +@@ -395,8 +415,11 @@ struct meson_vclk_params { + .vclk_div = 1, + }, + [MESON_VCLK_HDMI_297000] = { ++ .pll_freq = 2970000, ++ .phy_freq = 2970000, ++ .venc_freq = 297000, ++ .vclk_freq = 297000, + .pixel_freq = 297000, +- .pll_base_freq = 2970000, + .pll_od1 = 1, + .pll_od2 = 1, + .pll_od3 = 1, +@@ -404,14 +427,29 @@ struct meson_vclk_params { + .vclk_div = 2, + }, + [MESON_VCLK_HDMI_594000] = { ++ .pll_freq = 5940000, ++ .phy_freq = 5940000, ++ .venc_freq = 594000, ++ .vclk_freq = 594000, + .pixel_freq = 594000, +- .pll_base_freq = 5940000, + .pll_od1 = 1, + .pll_od2 = 1, + .pll_od3 = 2, + .vid_pll_div = VID_PLL_DIV_5, + .vclk_div = 1, + }, ++ [MESON_VCLK_HDMI_594000_YUV420] = { ++ .pll_freq = 2970000, ++ .phy_freq = 2970000, ++ .venc_freq = 594000, ++ .vclk_freq = 594000, ++ .pixel_freq = 297000, ++ .pll_od1 = 1, ++ .pll_od2 = 1, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 1, ++ }, + { /* sentinel */ }, + }; + +@@ -616,6 +654,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, + unsigned int od, m, frac, od1, od2, od3; + + if (meson_hdmi_pll_find_params(priv, pll_freq, &m, &frac, &od)) { ++ /* OD2 goes to the PHY, and needs to be *10, so keep OD3=1 */ + od3 = 1; + if (od < 4) { + od1 = 2; +@@ -638,21 +677,28 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, + } + + enum drm_mode_status +-meson_vclk_vic_supported_freq(unsigned int freq) ++meson_vclk_vic_supported_freq(unsigned int phy_freq, ++ unsigned int vclk_freq) + { + int i; + +- DRM_DEBUG_DRIVER("freq = %d\n", freq); ++ DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n", ++ phy_freq, vclk_freq); + + for (i = 0 ; params[i].pixel_freq ; ++i) { + DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n", + i, params[i].pixel_freq, + FREQ_1000_1001(params[i].pixel_freq)); ++ DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n", ++ i, params[i].phy_freq, ++ FREQ_1000_1001(params[i].phy_freq/10)*10); + /* Match strict frequency */ +- if (freq == params[i].pixel_freq) ++ if (phy_freq == params[i].phy_freq && ++ vclk_freq == params[i].vclk_freq) + return MODE_OK; + /* Match 1000/1001 variant */ +- if (freq == FREQ_1000_1001(params[i].pixel_freq)) ++ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) && ++ vclk_freq == FREQ_1000_1001(params[i].vclk_freq)) + return MODE_OK; + } + +@@ -666,7 +712,7 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, + unsigned int hdmi_tx_div, unsigned int venc_div, + bool hdmi_use_enci, bool vic_alternate_clock) + { +- unsigned int m, frac; ++ unsigned int m = 0, frac = 0; + + /* Set HDMI-TX sys clock */ + regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, +@@ -863,8 +909,9 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, + } + + void meson_vclk_setup(struct meson_drm *priv, unsigned int target, +- unsigned int vclk_freq, unsigned int venc_freq, +- unsigned int dac_freq, bool hdmi_use_enci) ++ unsigned int phy_freq, unsigned int vclk_freq, ++ unsigned int venc_freq, unsigned int dac_freq, ++ bool hdmi_use_enci) + { + bool vic_alternate_clock = false; + unsigned int freq; +@@ -883,7 +930,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + * - venc_div = 1 + * - encp encoder + */ +- meson_vclk_set(priv, vclk_freq * 10, 0, 0, 0, ++ meson_vclk_set(priv, phy_freq, 0, 0, 0, + VID_PLL_DIV_5, 2, 1, 1, false, false); + return; + } +@@ -905,9 +952,11 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + } + + for (freq = 0 ; params[freq].pixel_freq ; ++freq) { +- if (vclk_freq == params[freq].pixel_freq || +- vclk_freq == FREQ_1000_1001(params[freq].pixel_freq)) { +- if (vclk_freq != params[freq].pixel_freq) ++ if ((phy_freq == params[freq].phy_freq || ++ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && ++ (vclk_freq == params[freq].vclk_freq || ++ vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) { ++ if (vclk_freq != params[freq].vclk_freq) + vic_alternate_clock = true; + else + vic_alternate_clock = false; +@@ -936,7 +985,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + return; + } + +- meson_vclk_set(priv, params[freq].pll_base_freq, ++ meson_vclk_set(priv, params[freq].pll_freq, + params[freq].pll_od1, params[freq].pll_od2, + params[freq].pll_od3, params[freq].vid_pll_div, + params[freq].vclk_div, hdmi_tx_div, venc_div, +diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h +index 4bd8752da02a..c4d19ddfcd79 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.h ++++ b/drivers/gpu/drm/meson/meson_vclk.h +@@ -33,10 +33,11 @@ enum { + enum drm_mode_status + meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); + enum drm_mode_status +-meson_vclk_vic_supported_freq(unsigned int freq); ++meson_vclk_vic_supported_freq(unsigned int phy_freq, unsigned int vclk_freq); + + void meson_vclk_setup(struct meson_drm *priv, unsigned int target, +- unsigned int vclk_freq, unsigned int venc_freq, +- unsigned int dac_freq, bool hdmi_use_enci); ++ unsigned int phy_freq, unsigned int vclk_freq, ++ unsigned int venc_freq, unsigned int dac_freq, ++ bool hdmi_use_enci); + + #endif /* __MESON_VCLK_H */ +diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c +index 1bcd642b6e42..ab72ddda242d 100644 +--- a/drivers/gpu/drm/meson/meson_venc.c ++++ b/drivers/gpu/drm/meson/meson_venc.c +@@ -956,6 +956,8 @@ bool meson_venc_hdmi_venc_repeat(int vic) + EXPORT_SYMBOL_GPL(meson_venc_hdmi_venc_repeat); + + void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, ++ unsigned int ycrcb_map, ++ bool yuv420_mode, + struct drm_display_mode *mode) + { + union meson_hdmi_venc_mode *vmode = NULL; +@@ -1505,8 +1507,8 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, + writel_relaxed((use_enci ? 1 : 2) | + (mode->flags & DRM_MODE_FLAG_PHSYNC ? 1 << 2 : 0) | + (mode->flags & DRM_MODE_FLAG_PVSYNC ? 1 << 3 : 0) | +- 4 << 5 | +- (venc_repeat ? 1 << 8 : 0) | ++ (ycrcb_map << 5) | ++ (venc_repeat || yuv420_mode ? 1 << 8 : 0) | + (hdmi_repeat ? 1 << 12 : 0), + priv->io_base + _REG(VPU_HDMI_SETTING)); + +diff --git a/drivers/gpu/drm/meson/meson_venc.h b/drivers/gpu/drm/meson/meson_venc.h +index 97eaebbfa0c4..5580bf38e381 100644 +--- a/drivers/gpu/drm/meson/meson_venc.h ++++ b/drivers/gpu/drm/meson/meson_venc.h +@@ -33,6 +33,15 @@ enum { + MESON_VENC_MODE_HDMI, + }; + ++enum { ++ MESON_VENC_MAP_CR_Y_CB = 0, ++ MESON_VENC_MAP_Y_CB_CR, ++ MESON_VENC_MAP_Y_CR_CB, ++ MESON_VENC_MAP_CB_CR_Y, ++ MESON_VENC_MAP_CB_Y_CR, ++ MESON_VENC_MAP_CR_CB_Y, ++}; ++ + struct meson_cvbs_enci_mode { + unsigned int mode_tag; + unsigned int hso_begin; /* HSO begin position */ +@@ -70,6 +79,8 @@ extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc; + void meson_venci_cvbs_mode_set(struct meson_drm *priv, + struct meson_cvbs_enci_mode *mode); + void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, ++ unsigned int ycrcb_map, ++ bool yuv420_mode, + struct drm_display_mode *mode); + unsigned int meson_venci_get_field(struct meson_drm *priv); + +diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c +index f7945bae3b4a..38a1117b1183 100644 +--- a/drivers/gpu/drm/meson/meson_venc_cvbs.c ++++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c +@@ -207,7 +207,8 @@ static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder, + /* Setup 27MHz vclk2 for ENCI and VDAC */ + meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS, + MESON_VCLK_CVBS, MESON_VCLK_CVBS, +- MESON_VCLK_CVBS, true); ++ MESON_VCLK_CVBS, MESON_VCLK_CVBS, ++ true); + break; + } + } +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch b/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch new file mode 100644 index 000000000..fe2c26c22 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch @@ -0,0 +1,33 @@ +From 2b420ad1ebade69b262cb1cf36668134d7bd785c Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Sun, 18 Nov 2018 14:06:11 +0100 +Subject: [PATCH 50/53] drm/meson: Output in YUV444 if sink supports it + +With the YUV420 handling, we can no dynamically setup the HDMI output +pixel format depending on the mode and connector info. +So now, we can output in YUV444, which is the native video pipeline +format, directly the the HDMI Sink it it's supported, without +involving the HDMI Controller CSC. +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 83360f37d9ce..1b7092ab1be8 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -670,7 +670,10 @@ static int meson_venc_hdmi_encoder_atomic_check(struct drm_encoder *encoder, + dw_hdmi->output_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; + } else { + dw_hdmi->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; +- dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; ++ if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444) ++ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_YUV8_1X24; ++ else ++ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; + } + + return 0; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch b/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch new file mode 100644 index 000000000..550a4bb9a --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch @@ -0,0 +1,126 @@ +From fa6cb8f89a7f9387a0299f6b55bc0cd54233aefd Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 22 Nov 2018 17:27:20 +0100 +Subject: [PATCH 51/53] drm/meson: Fix an Alpha Primary Plane bug on Meson + GXL/GXM SoCs + +On the Amlogic GXL & GXM SoCs, a bug occurs in the OSD1 plane when +alpha is used where the alpha is not aligned with the pixel content. + +The woraround Amlogic implemented is the reset the OSD1 plane hardware +block each time the plane is updated, solving the issue. + +In the reset, we still need to save the content of 2 registers which +depends on the status of the plane, in addition to reload the scaler +conversion matrix in the same time. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_crtc.c | 1 + + drivers/gpu/drm/meson/meson_plane.c | 12 ++++++++++++ + drivers/gpu/drm/meson/meson_viu.c | 27 +++++++++++++++++++++++++++ + drivers/gpu/drm/meson/meson_viu.h | 1 + + 4 files changed, 41 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index 23df4abd95c9..f13e5b6b7a50 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -183,6 +183,7 @@ void meson_crtc_irq(struct meson_drm *priv) + + /* Update the OSD registers */ + if (priv->viu.osd1_enabled && priv->viu.osd1_commit) { ++ + writel_relaxed(priv->viu.osd1_ctrl_stat, + priv->io_base + _REG(VIU_OSD1_CTRL_STAT)); + writel_relaxed(priv->viu.osd1_blk0_cfg[0], +diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c +index 12a47b4f65a5..837228847675 100644 +--- a/drivers/gpu/drm/meson/meson_plane.c ++++ b/drivers/gpu/drm/meson/meson_plane.c +@@ -79,6 +79,7 @@ + struct meson_plane { + struct drm_plane base; + struct meson_drm *priv; ++ bool enabled; + }; + #define to_meson_plane(x) container_of(x, struct meson_plane, base) + +@@ -303,6 +304,15 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + priv->viu.osd1_stride = fb->pitches[0]; + priv->viu.osd1_height = fb->height; + ++ if (!meson_plane->enabled) { ++ /* Reset OSD1 at updates on GXL+ SoCs */ ++ if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") || ++ meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) ++ meson_viu_reset(priv); ++ ++ meson_plane->enabled = true; ++ } ++ + spin_unlock_irqrestore(&priv->drm->event_lock, flags); + } + +@@ -316,6 +326,8 @@ static void meson_plane_atomic_disable(struct drm_plane *plane, + writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0, + priv->io_base + _REG(VPP_MISC)); + ++ meson_plane->enabled = false; ++ + } + + static const struct drm_plane_helper_funcs meson_plane_helper_funcs = { +diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c +index 90d9ae3c2b81..366f7e523d15 100644 +--- a/drivers/gpu/drm/meson/meson_viu.c ++++ b/drivers/gpu/drm/meson/meson_viu.c +@@ -296,6 +296,33 @@ static void meson_viu_load_matrix(struct meson_drm *priv) + true); + } + ++/* VIU OSD1 Reset as workaround for GXL+ Alpha OSD Bug */ ++void meson_viu_reset(struct meson_drm *priv) ++{ ++ uint32_t osd1_fifo_ctrl_stat, osd1_ctrl_stat2; ++ ++ /* Save these 2 registers state */ ++ osd1_fifo_ctrl_stat = readl_relaxed( ++ priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); ++ osd1_ctrl_stat2 = readl_relaxed( ++ priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); ++ ++ /* Reset OSD1 */ ++ writel_bits_relaxed(BIT(0), BIT(0), ++ priv->io_base + _REG(VIU_SW_RESET)); ++ writel_bits_relaxed(BIT(0), 0, ++ priv->io_base + _REG(VIU_SW_RESET)); ++ ++ /* Rewrite these registers state lost in the reset */ ++ writel_relaxed(osd1_fifo_ctrl_stat, ++ priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); ++ writel_relaxed(osd1_ctrl_stat2, ++ priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); ++ ++ /* Reload the conversion matrix */ ++ meson_viu_load_matrix(priv); ++} ++ + void meson_viu_init(struct meson_drm *priv) + { + uint32_t reg; +diff --git a/drivers/gpu/drm/meson/meson_viu.h b/drivers/gpu/drm/meson/meson_viu.h +index 073b1910bd1b..e4a6e2fba8fb 100644 +--- a/drivers/gpu/drm/meson/meson_viu.h ++++ b/drivers/gpu/drm/meson/meson_viu.h +@@ -59,6 +59,7 @@ + #define OSD_REPLACE_EN BIT(14) + #define OSD_REPLACE_SHIFT 6 + ++void meson_viu_reset(struct meson_drm *priv); + void meson_viu_init(struct meson_drm *priv); + + #endif /* __MESON_VIU_H */ +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch b/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch new file mode 100644 index 000000000..abfb0d895 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch @@ -0,0 +1,51 @@ +From 5e2e26abc73f9bfae1e5edbcdea7e53e9822f2fb Mon Sep 17 00:00:00 2001 +From: Carlo Caione +Date: Tue, 4 Dec 2018 16:04:46 +0000 +Subject: [PATCH 52/53] arm64: dts: meson: Fix IRQ trigger type for macirq + +A long running stress test on a custom board shipping an AXG SoCs and a +Realtek RTL8211F PHY revealed that after a few hours the connection +speed would drop drastically, from ~1000Mbps to ~3Mbps. At the same time +the 'macirq' (eth0) IRQ would stop being triggered at all and as +consequence the GMAC IRQs never ACKed. + +After a painful investigation the problem seemed to be due to a wrong +defined IRQ type for the GMAC IRQ that should be LEVEL_HIGH instead of +EDGE_RISING. + +Signed-off-by: Carlo Caione +Acked-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 +- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +index c518130e5ce7..81dcbde9e674 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +@@ -461,7 +461,7 @@ + compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + reg = <0x0 0xff3f0000 0x0 0x10000 + 0x0 0xff634540 0x0 0x8>; +- interrupts = ; ++ interrupts = ; + interrupt-names = "macirq"; + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index 5d2820ef9a88..d03737acbae1 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -511,7 +511,7 @@ + compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + reg = <0x0 0xc9410000 0x0 0x10000 + 0x0 0xc8834540 0x0 0x4>; +- interrupts = ; ++ interrupts = ; + interrupt-names = "macirq"; + status = "disabled"; + }; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch b/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch new file mode 100644 index 000000000..19845bf4f --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch @@ -0,0 +1,36 @@ +From 47a653adc82602d0d8b21065807164f87c89c82b Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 4 Oct 2018 10:42:43 +0200 +Subject: [PATCH 53/53] drm/meson: fix max mode_config height/width + +The mode_config max_width/max_height determines the maximum framebuffer +size the pixel reader can handle. But the values were set thinking they +were determining the maximum screen dimensions. + +This patch changes the values to the maximum height/width the CANVAS block +can handle rounded to some coherent values. + +Fixes: a41e82e6c457 ("drm/meson: Add support for components") +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_drv.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index a13704ab5d11..960b8b08756e 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -267,8 +267,8 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + goto free_drm; + + drm_mode_config_init(drm); +- drm->mode_config.max_width = 3840; +- drm->mode_config.max_height = 2160; ++ drm->mode_config.max_width = 16384; ++ drm->mode_config.max_height = 8192; + drm->mode_config.funcs = &meson_mode_config_funcs; + drm->mode_config.helper_private = &meson_mode_config_helpers; + +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch b/buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch new file mode 100644 index 000000000..9270a4e84 --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch @@ -0,0 +1,92 @@ +ARM: dts: exynos5420: add mali dt bindings and enable mali on Odroid XU3/4 + +Signed-off-by: memeka + +https://github.com/hardkernel/linux/commit/27f16b364e195daefdb8839344c02870ceaf48f2#diff-80dd4bb1cf404a3774bbe37bcfe945c2 + +Upstream-Status: Backport + +Signed-off-by: Armin Kuster + +Index: kernel-source/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +=================================================================== +--- kernel-source.orig/arch/arm/boot/dts/exynos5422-odroid-core.dtsi ++++ kernel-source/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +@@ -417,6 +417,11 @@ + vtmu-supply = <&ldo7_reg>; + }; + ++&mali { ++ mali-supply = <&buck4_reg>; ++ status = "okay"; ++}; ++ + &rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; +Index: kernel-source/arch/arm/boot/dts/exynos5420.dtsi +=================================================================== +--- kernel-source.orig/arch/arm/boot/dts/exynos5420.dtsi ++++ kernel-source/arch/arm/boot/dts/exynos5420.dtsi +@@ -1317,6 +1317,61 @@ + }; + }; + ++ mali: mali@11800000 { ++ compatible = "samsung,exynos5422-mali", "arm,malit6xx", "arm,mali-midgard"; ++ reg = <0x11800000 0x5000>; ++ interrupts = , , ; ++ interrupt-names = "JOB", "MMU", "GPU"; ++ ++ clocks = <&clock CLK_FOUT_VPLL>, <&clock CLK_DOUT_ACLK_G3D>, <&clock CLK_G3D>; ++ clock-names = "fout_vpll", "dout_aclk_g3d", "clk_mali"; ++ ++ operating-points-v2 = <&gpu_opp_table>; ++ ++ status = "disabled"; ++ ++ power_model@0 { ++ compatible = "arm,mali-simple-power-model"; ++ static-coefficient = <2427750>; ++ dynamic-coefficient = <4687>; ++ ts = <20000 2000 (-20) 2>; ++ thermal-zone = "gpu-thermal"; ++ }; ++ }; ++ ++ gpu_opp_table: opp_table0 { ++ compatible = "operating-points-v2"; ++ ++ opp@600000000 { ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt = <1150000>; ++ }; ++ opp@543000000 { ++ opp-hz = /bits/ 64 <543000000>; ++ opp-microvolt = <1037500>; ++ }; ++ opp@480000000 { ++ opp-hz = /bits/ 64 <480000000>; ++ opp-microvolt = <1000000>; ++ }; ++ opp@420000000 { ++ opp-hz = /bits/ 64 <420000000>; ++ opp-microvolt = <962500>; ++ }; ++ opp@350000000 { ++ opp-hz = /bits/ 64 <350000000>; ++ opp-microvolt = <912500>; ++ }; ++ opp@266000000 { ++ opp-hz = /bits/ 64 <266000000>; ++ opp-microvolt = <862500>; ++ }; ++ opp@177000000 { ++ opp-hz = /bits/ 64 <177000000>; ++ opp-microvolt = <812500>; ++ }; ++ }; ++ + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0>; diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index f776c762d..8ea323da0 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -2,7 +2,7 @@ BR2_aarch64=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" @@ -77,7 +77,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 3c8818ad1..92c06c739 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -3,7 +3,7 @@ BR2_cortex_a7=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-xu3" BR2_TARGET_UBOOT_NEEDS_DTC=y BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y From f87032c302da895fbc1742a22249d010ee7a498e Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Dec 2019 15:48:22 +0100 Subject: [PATCH 29/43] Some cleanups (#511) --- .../board/orangepi/kernel.config | 31 +++++++++- .../board/orangepi/patches/README.md | 5 -- ...ixup_ethernet-again-to-set-macaddr-f.patch | 41 ------------ .../uboot/4kfix-limit-screen-to-full-hd.patch | 19 ------ .../adjust-default-dram-clockspeeds.patch | 13 ---- .../uboot/do-not-relocate-initrd.patch | 27 -------- .../uboot/enable-DT-overlays-support.patch | 13 ---- .../enable-r_pio-gpio-access-h3-h5.patch | 24 ------- .../fdt-setprop-fix-unaligned-access.patch | 23 ------- ...Fix-PLL1-setup-to-never-use-dividers.patch | 32 ---------- .../patches/uboot/h3-enable-power-led.patch | 16 ----- .../h3-set-safe-axi_apb-clock-dividers.patch | 42 ------------- ...er-default-DRAM-freq-A64-H5.patch.disabled | 13 ---- .../patches/uboot/sun8i-set-machid.patch | 11 ---- .../patches/uboot/sunxi-boot-splash.patch | 62 ------------------- .../configs/opi_prime_defconfig | 4 +- 16 files changed, 32 insertions(+), 344 deletions(-) delete mode 100644 buildroot-external/board/orangepi/patches/README.md delete mode 100644 buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled delete mode 100644 buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch delete mode 100644 buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch diff --git a/buildroot-external/board/orangepi/kernel.config b/buildroot-external/board/orangepi/kernel.config index 570e83546..1953bca8c 100644 --- a/buildroot-external/board/orangepi/kernel.config +++ b/buildroot-external/board/orangepi/kernel.config @@ -1,3 +1,32 @@ CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y - +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set diff --git a/buildroot-external/board/orangepi/patches/README.md b/buildroot-external/board/orangepi/patches/README.md deleted file mode 100644 index 7b1911b5f..000000000 --- a/buildroot-external/board/orangepi/patches/README.md +++ /dev/null @@ -1,5 +0,0 @@ -## Kernel -https://github.com/armbian/build/tree/master/patch/kernel/sunxi-next - -## u-boot -https://github.com/armbian/build/tree/master/patch/u-boot/u-boot-sunxi diff --git a/buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch b/buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch deleted file mode 100644 index 45dc3ae32..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/0020-sunxi-call-fdt_fixup_ethernet-again-to-set-macaddr-f.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 55d3cc28b37000d1a3d7224c0ba4a808274e0b33 Mon Sep 17 00:00:00 2001 -From: Icenowy Zheng -Date: Fri, 27 Oct 2017 17:25:00 +0800 -Subject: [PATCH 20/20] sunxi: call fdt_fixup_ethernet again to set macaddr for - more aliases - -Sometimes some ethernet aliases do not exist in U-Boot FDT but they -exist in the FDT used to boot the system. In this situation -setup_environment is called again in ft_board_setup to generate macaddr -environment variable for them. However now the call to -fdt_fixup_ethernet is moved before the call of ft_board_setup. - -Call fdt_fixup_ethernet again to add MAC addresses for the extra -ethernet aliases. - -Signed-off-by: Icenowy Zheng ---- - board/sunxi/board.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 192cf8ca45..0fe70f47cb 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -751,10 +751,12 @@ int ft_board_setup(void *blob, bd_t *bd) - int __maybe_unused r; - - /* -- * Call setup_environment again in case the boot fdt has -- * ethernet aliases the u-boot copy does not have. -+ * Call setup_environment and fdt_fixup_ethernet again -+ * in case the boot fdt has ethernet aliases the u-boot -+ * copy does not have. - */ - setup_environment(blob); -+ fdt_fixup_ethernet(blob); - - #ifdef CONFIG_VIDEO_DT_SIMPLEFB - r = sunxi_simplefb_setup(blob); --- -2.13.6 diff --git a/buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch b/buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch deleted file mode 100644 index 7abe749fc..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/4kfix-limit-screen-to-full-hd.patch +++ /dev/null @@ -1,19 +0,0 @@ -diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c -index 92c9d06054..cd16d69e30 100644 ---- a/drivers/video/sunxi/sunxi_display.c -+++ b/drivers/video/sunxi/sunxi_display.c -@@ -1274,8 +1274,12 @@ void *video_hw_init(void) - ret = sunxi_hdmi_hpd_detect(hpd_delay); - if (ret) { - printf("HDMI connected: "); -- if (edid && sunxi_hdmi_edid_get_mode(&custom) == 0) -- mode = &custom; -+ if (edid && sunxi_hdmi_edid_get_mode(&custom) == 0) { -+ if ((custom.xres <= 1920) && (custom.yres <= 1080)) -+ mode = &custom; -+ else -+ mode = &res_mode_init[RES_MODE_1920x1080]; -+ } - } else if (hpd) { - sunxi_hdmi_shutdown(); - sunxi_display.monitor = sunxi_get_default_mon(false); diff --git a/buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch b/buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch deleted file mode 100644 index 5156fd2d6..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/adjust-default-dram-clockspeeds.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig -index 103936d772..990cf2a8c0 100644 ---- a/configs/orangepi_prime_defconfig -+++ b/configs/orangepi_prime_defconfig -@@ -1,7 +1,7 @@ - CONFIG_ARM=y - CONFIG_ARCH_SUNXI=y - CONFIG_MACH_SUN50I_H5=y --CONFIG_DRAM_CLK=672 -+CONFIG_DRAM_CLK=624 - CONFIG_DRAM_ZQ=3881977 - CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" - # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch b/buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch deleted file mode 100644 index f5020ded0..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/do-not-relocate-initrd.patch +++ /dev/null @@ -1,27 +0,0 @@ -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -index 64a190059a..bbec551cac 100644 ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -503,6 +503,12 @@ extern int soft_i2c_gpio_scl; - #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" - #endif - -+#ifdef CONFIG_MACH_SUN8I_H3 -+#define INITRD_HIGH_ENV "initrd_high=0xFFFFFFFF\0" -+#else -+#define INITRD_HIGH_ENV -+#endif -+ - #define CONFIG_EXTRA_ENV_SETTINGS \ - CONSOLE_ENV_SETTINGS \ - MEM_LAYOUT_ENV_SETTINGS \ -@@ -512,7 +518,8 @@ extern int soft_i2c_gpio_scl; - SUNXI_MTDIDS_DEFAULT \ - SUNXI_MTDPARTS_DEFAULT \ - BOOTCMD_SUNXI_COMPAT \ -- BOOTENV -+ BOOTENV \ -+ INITRD_HIGH_ENV - - #else /* ifndef CONFIG_SPL_BUILD */ - #define CONFIG_EXTRA_ENV_SETTINGS diff --git a/buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch b/buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch deleted file mode 100644 index fd5ed2039..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/enable-DT-overlays-support.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 0ed36cded..822ebb812 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -578,6 +578,8 @@ config ARCH_SUNXI - select CMD_GPIO - select CMD_MMC if MMC - select CMD_USB if DISTRO_DEFAULTS -+ select OF_LIBFDT -+ select OF_LIBFDT_OVERLAY - select DM - select DM_ETH - select DM_GPIO diff --git a/buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch b/buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch deleted file mode 100644 index 1ff273de7..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/enable-r_pio-gpio-access-h3-h5.patch +++ /dev/null @@ -1,24 +0,0 @@ -diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c -index 7ac8360..0484e7a 100644 ---- a/arch/arm/mach-sunxi/board.c -+++ b/arch/arm/mach-sunxi/board.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - - #include - -@@ -65,6 +66,11 @@ struct mm_region *mem_map = sunxi_mem_map; - - static int gpio_init(void) - { -+#if defined(CONFIG_MACH_SUNXI_H3_H5) -+ /* enable R_PIO GPIO access */ -+ prcm_apb0_enable(PRCM_APB0_GATE_PIO); -+#endif -+ - #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F) - #if defined(CONFIG_MACH_SUN4I) || \ - defined(CONFIG_MACH_SUN7I) || \ diff --git a/buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch b/buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch deleted file mode 100644 index 882ceaa08..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/fdt-setprop-fix-unaligned-access.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff --git a/cmd/fdt.c b/cmd/fdt.c -index d7654b2c4f..a71b7713a8 100644 ---- a/cmd/fdt.c -+++ b/cmd/fdt.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - - #define MAX_LEVEL 32 /* how deeply nested we will go */ - #define SCRATCHPAD 1024 /* bytes of scratchpad memory */ -@@ -781,7 +782,10 @@ static int fdt_parse_prop(char * const *newval, int count, char *data, int *len) - cp = newp; - tmp = simple_strtoul(cp, &newp, 0); - if (*cp != '?') -- *(fdt32_t *)data = cpu_to_fdt32(tmp); -+ { -+ tmp = cpu_to_fdt32(tmp); -+ put_unaligned(tmp, (fdt32_t *)data); -+ } - else - newp++; diff --git a/buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch b/buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch deleted file mode 100644 index f8163ffd3..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/h3-Fix-PLL1-setup-to-never-use-dividers.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 7f5071f906f79bdc99d6b4b0ccf0cb280abe740b Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Tue, 20 Dec 2016 11:25:12 +0100 -Subject: [PATCH] sunxi: h3: Fix PLL1 setup to never use dividers - -Kernel would lower the divider on first CLK change and cause the -lock up. ---- - arch/arm/mach-sunxi/clock_sun6i.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c -index 50fb302a19..91aa2a0478 100644 ---- a/arch/arm/mach-sunxi/clock_sun6i.c -+++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -94,11 +94,10 @@ void clock_set_pll1(unsigned int clk) - int k = 1; - int m = 1; - -- if (clk > 1152000000) { -- k = 2; -- } else if (clk > 768000000) { -+ if (clk >= 1368000000) { - k = 3; -- m = 2; -+ } else if (clk >= 768000000) { -+ k = 2; - } - - /* Switch to 24MHz clock while changing PLL1 */ --- -2.11.0 diff --git a/buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch b/buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch deleted file mode 100644 index 1082db0ba..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/h3-enable-power-led.patch +++ /dev/null @@ -1,16 +0,0 @@ -diff --git a/board/sunxi/board.c b/board/sunxi/board.c -index 3cf3614..89cf7f5 100644 ---- a/board/sunxi/board.c -+++ b/board/sunxi/board.c -@@ -478,6 +478,11 @@ void sunxi_board_init(void) - int power_failed = 0; - unsigned long ramsize; - -+#ifdef CONFIG_MACH_SUN8I_H3 -+ /* turn on power LED (PL10) on H3 boards */ -+ gpio_direction_output(SUNXI_GPL(10), 1); -+#endif -+ - #ifdef CONFIG_SY8106A_POWER - power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); - #endif diff --git a/buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch b/buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch deleted file mode 100644 index a59c4b178..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/h3-set-safe-axi_apb-clock-dividers.patch +++ /dev/null @@ -1,42 +0,0 @@ -diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c -index 15272c9..cedddc2 100644 ---- a/arch/arm/mach-sunxi/clock_sun6i.c -+++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -117,8 +117,8 @@ void clock_set_pll1(unsigned int clk) - sdelay(200); - - /* Switch CPU to PLL1 */ -- writel(AXI_DIV_3 << AXI_DIV_SHIFT | -- ATB_DIV_2 << ATB_DIV_SHIFT | -+ writel(AXI_DIV_4 << AXI_DIV_SHIFT | -+ ATB_DIV_4 << ATB_DIV_SHIFT | - CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, - &ccm->cpu_axi_cfg); - } -diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h -index f2990db..b3a8575 100644 ---- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h -+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h -@@ -180,6 +180,7 @@ struct sunxi_ccm_reg { - #define CCM_PLL1_CTRL_N(n) ((((n) - 1) & 0x1f) << 8) - #define CCM_PLL1_CTRL_P(n) (((n) & 0x3) << 16) - #define CCM_PLL1_CTRL_EN (0x1 << 31) -+#define CCM_PLL1_CTRL_LOCK (0x1 << 28) - - #define CCM_PLL3_CTRL_M_SHIFT 0 - #define CCM_PLL3_CTRL_M_MASK (0xf << CCM_PLL3_CTRL_M_SHIFT) -diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c -index cedddc2..3fe9305 100644 ---- a/arch/arm/mach-sunxi/clock_sun6i.c -+++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -114,7 +114,9 @@ void clock_set_pll1(unsigned int clk) - writel(CCM_PLL1_CTRL_EN | CCM_PLL1_CTRL_P(p) | - CCM_PLL1_CTRL_N(clk / (24000000 * k / m)) | - CCM_PLL1_CTRL_K(k) | CCM_PLL1_CTRL_M(m), &ccm->pll1_cfg); -- sdelay(200); -+ -+ while (!(readl(&ccm->pll1_cfg) & CCM_PLL1_CTRL_LOCK)) -+ ; - - /* Switch CPU to PLL1 */ - writel(AXI_DIV_4 << AXI_DIV_SHIFT | diff --git a/buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled b/buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled deleted file mode 100644 index d94120f20..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/lower-default-DRAM-freq-A64-H5.patch.disabled +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 2309f59999..716e9c5e26 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -278,7 +278,7 @@ config DRAM_CLK - default 312 if MACH_SUN6I || MACH_SUN8I - default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || \ - MACH_SUN8I_V3S -- default 672 if MACH_SUN50I -+ default 648 if MACH_SUN50I || MACH_SUN50I_H5 - ---help--- - Set the dram clock speed, valid range 240 - 480 (prior to sun9i), - must be a multiple of 24. For the sun9i (A80), the tested values diff --git a/buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch b/buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch deleted file mode 100644 index e11f4f600..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/sun8i-set-machid.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h -index a4c3fb69e..47ce2e9e6 100644 ---- a/include/configs/sun8i.h -+++ b/include/configs/sun8i.h -@@ -30,4 +30,6 @@ - */ - #include - -+#define CONFIG_MACH_TYPE (0x1029) -+ - #endif /* __CONFIG_H */ diff --git a/buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch b/buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch deleted file mode 100644 index 8577d1912..000000000 --- a/buildroot-external/board/orangepi/patches/uboot/sunxi-boot-splash.patch +++ /dev/null @@ -1,62 +0,0 @@ -diff --git a/cmd/Kconfig b/cmd/Kconfig -index d6d130edfa..92795119ea 100644 ---- a/cmd/Kconfig -+++ b/cmd/Kconfig -@@ -1029,6 +1029,7 @@ menu "Misc commands" - config CMD_BMP - bool "Enable 'bmp' command" - depends on LCD || DM_VIDEO || VIDEO -+ default y - help - This provides a way to obtain information about a BMP-format iamge - and to display it. BMP (which presumably stands for BitMaP) is a -diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h -index 9ed6b9892c..75d5176edf 100644 ---- a/include/config_distro_bootcmd.h -+++ b/include/config_distro_bootcmd.h -@@ -323,6 +323,15 @@ - BOOTENV_SHARED_UBIFS \ - BOOTENV_SHARED_EFI \ - "boot_prefixes=/ /boot/\0" \ -+ "splashpos=m,m\0" \ -+ "splashimage=66000000\0" \ -+ "loadsplash= " \ -+ "for prefix in ${boot_prefixes}; do " \ -+ "if test -e mmc 0 ${prefix}boot.bmp; then " \ -+ "load mmc 0 ${splashimage} ${prefix}boot.bmp; " \ -+ "bmp d ${splashimage}; " \ -+ "fi; " \ -+ "done\0" \ - "boot_scripts=boot.scr.uimg boot.scr\0" \ - "boot_script_dhcp=boot.scr.uimg\0" \ - BOOTENV_BOOT_TARGETS \ -diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h -index 02d7be0849..cbdea20d08 100644 ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -284,6 +284,16 @@ extern int soft_i2c_gpio_scl; - - #endif /* CONFIG_VIDEO */ - -+#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO -+#define CONFIG_VIDEO_LOGO -+#define CONFIG_SPLASH_SCREEN -+#define CONFIG_SPLASH_SCREEN_ALIGN -+#define CONFIG_BMP_16BPP -+#define CONFIG_BMP_24BPP -+#define CONFIG_BMP_32BPP -+#define CONFIG_VIDEO_BMP_RLE8 -+#endif -+ - /* Ethernet support */ - #ifdef CONFIG_SUNXI_EMAC - #define CONFIG_PHY_ADDR 1 -@@ -444,7 +454,7 @@ extern int soft_i2c_gpio_scl; - - #ifdef CONFIG_USB_KEYBOARD - #define CONSOLE_STDIN_SETTINGS \ -- "preboot=usb start\0" \ -+ "preboot=run loadsplash; usb start\0" \ - "stdin=serial,usbkbd\0" - #else - #define CONSOLE_STDIN_SETTINGS \ diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 72e41d87c..d71695277 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_GCC_VERSION_7_X=y BR2_TOOLCHAIN_BUILDROOT_CXX=y @@ -24,7 +24,7 @@ BR2_TARGET_ARM_TRUSTED_FIRMWARE_BL31=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.11" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="orangepi_prime" BR2_TARGET_UBOOT_NEEDS_DTC=y BR2_TARGET_UBOOT_NEEDS_ATF_BL31=y From 9e8cccdf820c17706a37bf5737b4d14a0162c0f0 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Dec 2019 16:13:49 +0000 Subject: [PATCH 30/43] OS: Update CLI 15 --- buildroot-external/configs/intel_nuc_defconfig | 2 +- buildroot-external/configs/odroid_c2_defconfig | 2 +- buildroot-external/configs/odroid_xu4_defconfig | 2 +- buildroot-external/configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index 58dd9c5df..d97cb632b 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -101,7 +101,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/in BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/amd64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 8ea323da0..928d323e6 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -95,7 +95,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/od BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 92c06c739..004eaab6e 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -100,7 +100,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/od BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armv7-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index d71695277..4c699c369 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -109,7 +109,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/or BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index e8a3d743e..2b24443bd 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qe BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/amd64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 9700f4c1d..041100d46 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -98,7 +98,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 48e51d4e0..d6b94e3bf 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -97,7 +97,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armv7-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 41d031a2b..f6f5aeecc 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -98,7 +98,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 057ba39a5..93c9ff7f3 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -98,7 +98,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armv7-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index b27e1dc3f..905acade4 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -99,7 +99,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index ef596ca73..a481aeba0 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -99,7 +99,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armv7-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 8b7638cea..4ab4c0be1 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -97,7 +97,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ra BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index f9d3d11d9..e52855aa6 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -102,7 +102,7 @@ BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/ti BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" BR2_PACKAGE_HASSOS_CLI="homeassistant/armv7-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="14" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" From 3839e434283f8d7254811680fe28ccae710e1b7c Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 13 Dec 2019 16:14:08 +0000 Subject: [PATCH 31/43] OS: Update supervisor 193 --- buildroot-external/configs/intel_nuc_defconfig | 2 +- buildroot-external/configs/odroid_c2_defconfig | 2 +- buildroot-external/configs/odroid_xu4_defconfig | 2 +- buildroot-external/configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index d97cb632b..4ac498771 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -96,7 +96,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/intel-nuc-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 928d323e6..23830dab8 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -90,7 +90,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-c2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 004eaab6e..1ea7c5c80 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -95,7 +95,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-xu-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 4c699c369..4f2314336 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -104,7 +104,7 @@ BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HOST_SWIG=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/orangepi-prime-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index 2b24443bd..a015ea654 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -87,7 +87,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qemux86-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 041100d46..70f49e692 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index d6b94e3bf..a66ed963f 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index f6f5aeecc..0791f7921 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 93c9ff7f3..8ee2183c8 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 905acade4..970e229ac 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -94,7 +94,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index a481aeba0..bda719a64 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -94,7 +94,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 4ab4c0be1..1ee43953c 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index e52855aa6..af663743f 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -97,7 +97,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="187" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" From e4bff62923b8412ce9ea051d43d00b2f674bad24 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Wed, 18 Dec 2019 10:27:09 +0100 Subject: [PATCH 32/43] Create ISSUE_TEMPLATE.md --- .github/ISSUE_TEMPLATE.md | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 .github/ISSUE_TEMPLATE.md diff --git a/.github/ISSUE_TEMPLATE.md b/.github/ISSUE_TEMPLATE.md new file mode 100644 index 000000000..873a76748 --- /dev/null +++ b/.github/ISSUE_TEMPLATE.md @@ -0,0 +1,32 @@ + + +**HassOS release with the issue:** + + +**Supervisor logs:** + + +**Journal logs:** + + +**Kernel logs:** + + +**Description of problem:** From 7b379e648cda97da890d91a824075738236b687b Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Tue, 7 Jan 2020 18:13:24 +0100 Subject: [PATCH 33/43] Initial support Odroid N2 / Linux 5.4 (#523) * Initial version Odroid N2 Signed-off-by: Pascal Vizeli * fix some issue * optimize * cleanup kernel config * Fix HDMI output * Migrate to upstream u-boot * Use own HA image * Add kernel for odroid xu4 * Add N2 to release pipeline * Use uboot 2020.01 / fix version hardkernel * Fix image --- .../boards/{ => hardkernel}/odroid-c2.md | 0 Documentation/boards/hardkernel/odroid-n2.md | 14 + .../boards/{ => hardkernel}/odroid-xu4.md | 0 Documentation/kernel.md | 5 +- azure-pipelines-release.yml | 2 + .../board/hardkernel/odroid-c2/boot-env.txt | 2 +- .../board/hardkernel/odroid-c2/hassos-hook.sh | 8 +- .../board/hardkernel/odroid-c2/kernel.config | 6769 ++++++++++++----- .../board/hardkernel/odroid-c2/uboot-boot.ush | 2 +- .../board/hardkernel/odroid-n2/boot-env.txt | 84 + .../board/hardkernel/odroid-n2/hassos-hook.sh | 25 + .../board/hardkernel/odroid-n2/kernel.config | 6505 ++++++++++++++++ .../board/hardkernel/odroid-n2/meta | 7 + .../board/hardkernel/odroid-n2/uboot-boot.ush | 94 + .../board/hardkernel/odroid-n2/uboot.config | 8 + .../board/hardkernel/odroid-xu4/boot-env.txt | 3 +- .../board/hardkernel/odroid-xu4/kernel.config | 5062 ++++-------- .../board/hardkernel/patches/README.md | 1 + ...1-ARM64-defconfig-enable-CEC-support.patch | 47 - ...oC-meson-add-meson-audio-core-driver.patch | 290 - ...d-parkmode_disable_ss_quirk-for-G12A.patch | 106 + ...-ASoC-meson-add-register-definitions.patch | 360 - ...oid-xu.patch => 0003-mali_odroid-xu.patch} | 0 ...4-ASoC-meson-add-aiu-i2s-dma-support.patch | 424 -- ...oC-meson-add-initial-i2s-dai-support.patch | 518 -- ...ASoC-meson-add-aiu-spdif-dma-support.patch | 445 -- ...-meson-add-initial-spdif-dai-support.patch | 432 -- ...enable-audio-support-for-meson-SoCs-.patch | 31 - ...-meson-gx-add-audio-controller-nodes.patch | 189 - ...0-snd-meson-activate-HDMI-audio-path.patch | 55 - ...ect-dw-hdmi-i2s-audio-for-meson-hdmi.patch | 22 - ...-gx-add-sound-dai-cells-to-HDMI-node.patch | 38 - ...activate-hdmi-audio-HDMI-enabled-boa.patch | 864 --- ...mi-Use-AUTO-CTS-setup-mode-when-non-.patch | 78 - ...rm_crtc_vblank_on-drm_crtc_vblank_of.patch | 29 - ...-soc-amlogic-add-meson-canvas-driver.patch | 316 - ...meson-gx-add-dmcbus-and-canvas-nodes.patch | 41 - ...m-meson-Use-optional-canvas-provider.patch | 174 - ...gx-Add-canvas-provider-node-to-the-v.patch | 28 - ...rt-Overlay-plane-for-video-rendering.patch | 1260 --- ...SD-scaler-management-into-plane-atom.patch | 200 - ...-drm-meson-Add-primary-plane-scaling.patch | 287 - ...gxl-remove-invalid-GPIOX-tsin_a-pins.patch | 57 - ...gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch | 82 - ...gxl-libretech-cc-fix-GPIO-lines-name.patch | 41 - ...-gxbb-nanopi-k2-fix-GPIO-lines-names.patch | 40 - ...n-gxbb-odroidc2-fix-GPIO-lines-names.patch | 40 - ...-gxl-khadas-vim-fix-GPIO-lines-names.patch | 40 - ...dd-support-for-VIC-alternate-timings.patch | 330 - ...on-add-v4l2-m2m-video-decoder-driver.patch | 2971 -------- ...-MAINTAINERS-Add-meson-video-decoder.patch | 34 - ...32-arm64-dts-meson-gx-add-vdec-entry.patch | 40 - ...033-arm64-dts-meson-add-vdec-entries.patch | 65 - ...duce-controls-and-V4L2_CID_MIN_BUFFE.patch | 156 - ...2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch | 51 - ...-subscribing-to-V4L2_EVENT_SOURCE_CH.patch | 273 - ...eson-vdec-add-H.264-decoding-support.patch | 593 -- ...eson-vdec-add-MPEG4-decoding-support.patch | 315 - ...eson-vdec-add-MJPEG-decoding-support.patch | 255 - ...xbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch | 44 - ...0041-drm-meson-Add-HDMI-1.4-4k-modes.patch | 167 - ...rm-meson-Use-drm_fbdev_generic_setup.patch | 94 - ...mi-Add-SCDC-and-TMDS-Scrambling-supp.patch | 150 - ...4-drm-meson-add-HDMI-div40-TMDS-mode.patch | 71 - ...-add-support-for-HDMI2.0-2160p-modes.patch | 30 - ...w-hdmi-add-support-for-YUV420-output.patch | 200 - ...mi-support-dynamically-get-input-out.patch | 104 - ...hdmi-allow-ycbcr420-modes-for-0x200a.patch | 48 - ...-drm-meson-Add-YUV420-output-support.patch | 584 -- ...Output-in-YUV444-if-sink-supports-it.patch | 33 - ...-Alpha-Primary-Plane-bug-on-Meson-GX.patch | 126 - ...eson-Fix-IRQ-trigger-type-for-macirq.patch | 51 - ...son-fix-max-mode_config-height-width.patch | 36 - .../configs/odroid_c2_defconfig | 7 +- .../configs/odroid_n2_defconfig | 104 + .../configs/odroid_xu4_defconfig | 6 +- .../bluetooth-rtl8723/bluetooth-rtl8723.mk | 6 +- .../package/hardkernel-boot/Config.in | 5 + .../hardkernel-boot/hardkernel-boot.mk | 63 +- buildroot-patches/0011-Add-kernel-5.4.patch | 65 + buildroot-patches/0012-Bump-bluez-5.52.patch | 51 + .../0013-Bump-WireGuard-20191219.patch | 37 + .../bluez5_utils-headers.mk | 2 +- .../package/bluez5_utils/bluez5_utils.hash | 2 +- .../package/bluez5_utils/bluez5_utils.mk | 2 +- .../package/linux-headers/Config.in.host | 4 + buildroot/package/wireguard/wireguard.hash | 2 +- buildroot/package/wireguard/wireguard.mk | 2 +- buildroot/toolchain/Config.in | 5 + .../Config.in.options | 4 + 90 files changed, 13788 insertions(+), 18525 deletions(-) rename Documentation/boards/{ => hardkernel}/odroid-c2.md (100%) create mode 100644 Documentation/boards/hardkernel/odroid-n2.md rename Documentation/boards/{ => hardkernel}/odroid-xu4.md (100%) create mode 100644 buildroot-external/board/hardkernel/odroid-n2/boot-env.txt create mode 100755 buildroot-external/board/hardkernel/odroid-n2/hassos-hook.sh create mode 100644 buildroot-external/board/hardkernel/odroid-n2/kernel.config create mode 100644 buildroot-external/board/hardkernel/odroid-n2/meta create mode 100644 buildroot-external/board/hardkernel/odroid-n2/uboot-boot.ush create mode 100644 buildroot-external/board/hardkernel/odroid-n2/uboot.config delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch create mode 100644 buildroot-external/board/hardkernel/patches/linux/0002-dwc3-add-parkmode_disable_ss_quirk-for-G12A.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch rename buildroot-external/board/hardkernel/patches/linux/{mali_odroid-xu.patch => 0003-mali_odroid-xu.patch} (100%) delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch delete mode 100644 buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch create mode 100644 buildroot-external/configs/odroid_n2_defconfig create mode 100644 buildroot-patches/0011-Add-kernel-5.4.patch create mode 100644 buildroot-patches/0012-Bump-bluez-5.52.patch create mode 100644 buildroot-patches/0013-Bump-WireGuard-20191219.patch diff --git a/Documentation/boards/odroid-c2.md b/Documentation/boards/hardkernel/odroid-c2.md similarity index 100% rename from Documentation/boards/odroid-c2.md rename to Documentation/boards/hardkernel/odroid-c2.md diff --git a/Documentation/boards/hardkernel/odroid-n2.md b/Documentation/boards/hardkernel/odroid-n2.md new file mode 100644 index 000000000..16316d8a0 --- /dev/null +++ b/Documentation/boards/hardkernel/odroid-n2.md @@ -0,0 +1,14 @@ +# Odroid-N2 + +## eMMC + +eMMC support is provided transparently. Just flash the image to the eMMC board as you would an SD card. + +## Console + +By default, console access is granted over the serial header and over HDMI. Certain startup messages will only appear on the serial console by default. To show the messages on the HDMI console instead, swap the order of the two consoles in the `cmdline.txt` file on the boot partition. You can also delete the AML0 console if you don't plan on using the serial adapter. +eg. `console=ttyAML0,115200n8 console=tty0` + +## GPIO + +Refer to [the odroid wiki](https://wiki.odroid.com/odroid-n2/hardware/expansion_connectors). diff --git a/Documentation/boards/odroid-xu4.md b/Documentation/boards/hardkernel/odroid-xu4.md similarity index 100% rename from Documentation/boards/odroid-xu4.md rename to Documentation/boards/hardkernel/odroid-xu4.md diff --git a/Documentation/kernel.md b/Documentation/kernel.md index b286c69a5..cbbbdefea 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -6,7 +6,8 @@ | Open Virtual Applicance | 4.19.88 | | Raspberry Pi | 4.19.88 | | Tinker Board | 4.19.88 | -| Odroid-C2 | 4.19.72 | -| Odroid-XU4 | 4.19.72 | +| Odroid-C2 | 5.4.6 | +| Odroid-N2 | 5.4.6 | +| Odroid-XU4 | 5.4.6 | | Orangepi-Prime | 4.19.88 | | Intel NUC | 4.19.88 | diff --git a/azure-pipelines-release.yml b/azure-pipelines-release.yml index 0c8635a09..44cbe0d2a 100644 --- a/azure-pipelines-release.yml +++ b/azure-pipelines-release.yml @@ -46,6 +46,8 @@ jobs: board: 'intel_nuc' OdroidC2: board: 'odroid_c2' + OdroidN2: + board: 'odroid_n2' OdroidXU4: board: 'odroid_xu4' OrangePiPrime: diff --git a/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt b/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt index f306c8bb7..ee744b3f6 100644 --- a/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt +++ b/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt @@ -77,8 +77,8 @@ m_bpp=32 # Allows you to force HDMI thinking that the cable is connected. # true = HDMI will believe that cable is always connected # false = will let board/monitor negotiate the connection status -hpd=true #hpd=false +hpd=true # Monitor output # Controls if HDMI PHY should output anything to the monitor diff --git a/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh b/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh index b85bdc9e3..547bb07d2 100755 --- a/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh +++ b/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh @@ -5,7 +5,7 @@ function hassos_pre_image() { local BOOT_DATA="$(path_boot_dir)" local BL1="${BINARIES_DIR}/bl1.bin.hardkernel" local UBOOT_GXBB="${BINARIES_DIR}/u-boot.gxbb" - local spl_img="$(path_spl_img)" + local SPL_IMG="$(path_spl_img)" cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr" cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt" @@ -16,9 +16,9 @@ function hassos_pre_image() { # SPL create_spl_image - dd if="${BL1}" of="${spl_img}" conv=notrunc bs=1 count=440 - dd if="${BL1}" of="${spl_img}" conv=notrunc bs=512 skip=1 seek=1 - dd if="${UBOOT_GXBB}" of="${spl_img}" conv=notrunc bs=512 seek=97 + dd if="${BL1}" of="${SPL_IMG}" conv=notrunc bs=1 count=440 + dd if="${BL1}" of="${SPL_IMG}" conv=notrunc bs=512 skip=1 seek=1 + dd if="${UBOOT_GXBB}" of="${SPL_IMG}" conv=notrunc bs=512 seek=97 } diff --git a/buildroot-external/board/hardkernel/odroid-c2/kernel.config b/buildroot-external/board/hardkernel/odroid-c2/kernel.config index 08fdc1b2f..17263e568 100644 --- a/buildroot-external/board/hardkernel/odroid-c2/kernel.config +++ b/buildroot-external/board/hardkernel/odroid-c2/kernel.config @@ -1,124 +1,286 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.4.0 Kernel Configuration +# + +# +# Compiler: gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=70400 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y # # General setup # -# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_HEADER_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y # # IRQ subsystem # +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y # # Timers subsystem # +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y # # CPU/Task time and stats accounting # +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y # # RCU Subsystem # +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y -CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_RSEQ=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # +CONFIG_PERF_EVENTS=y +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y # CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y -CONFIG_JUMP_LABEL=y -CONFIG_UPROBES=y +# end of General setup -# -# GCOV-based kernel profiling -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_BLK_DEV_INTEGRITY=y - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -# CONFIG_CMDLINE_PARTITION is not set - -# -# IO Schedulers -# -# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y # # Platform selection # +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set +CONFIG_ARCH_BCM_IPROC=y # CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set # CONFIG_ARCH_BRCMSTB is not set # CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_K3 is not set # CONFIG_ARCH_LAYERSCAPE is not set # CONFIG_ARCH_LG1K is not set # CONFIG_ARCH_HISI is not set # CONFIG_ARCH_MEDIATEK is not set CONFIG_ARCH_MESON=y # CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set # CONFIG_ARCH_TEGRA is not set # CONFIG_ARCH_SPRD is not set # CONFIG_ARCH_THUNDER is not set @@ -128,41 +290,7 @@ CONFIG_ARCH_MESON=y # CONFIG_ARCH_XGENE is not set # CONFIG_ARCH_ZX is not set # CONFIG_ARCH_ZYNQMP is not set - -# -# Bus support -# -CONFIG_PCI=y -# CONFIG_PCIEPORTBUS is not set -CONFIG_PCI_IOV=y -CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_ACPI=y - -# -# Cadence PCIe controllers support -# - -# -# DesignWare PCI Core Support -# -# CONFIG_PCI_HISI is not set -# CONFIG_PCIE_KIRIN is not set - -# -# PCI host controller drivers -# -CONFIG_PCI_HOST_GENERIC=y -# CONFIG_PCI_XGENE is not set -# CONFIG_PCI_HOST_THUNDER_PEM is not set -# CONFIG_PCI_HOST_THUNDER_ECAM is not set - -# -# PCI Endpoint -# - -# -# PCI switch controller drivers -# +# end of Platform selection # # Kernel Features @@ -171,50 +299,162 @@ CONFIG_PCI_HOST_GENERIC=y # # ARM errata workarounds via the alternatives framework # -# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set -# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set -# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set -# CONFIG_HISILICON_ERRATUM_161600802 is not set -# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23144=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_161600802=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_FUJITSU_ERRATUM_010001=y +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y CONFIG_NUMA=y -CONFIG_PREEMPT=y -CONFIG_KSM=y -CONFIG_MEMORY_FAILURE=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_CMA=y +CONFIG_NODES_SHIFT=2 +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_SECCOMP=y CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_KEXEC=y +# CONFIG_KEXEC_FILE is not set CONFIG_CRASH_DUMP=y +CONFIG_XEN_DOM0=y CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDEN_EL2_VECTORS=y +CONFIG_ARM64_SSBD=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_COMPAT=y +CONFIG_KUSER_HELPERS=y +# CONFIG_ARMV8_DEPRECATED is not set # # ARMv8.1 architectural features # +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features # # ARMv8.2 architectural features # +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +# end of ARMv8.3 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +# end of Kernel Features # # Boot options # +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options -# -# Userspace binary formats -# -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_BINFMT_MISC=y -CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y # # Power management options # +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options # # CPU Power Management @@ -227,12 +467,16 @@ CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set CONFIG_DT_IDLE_STATES=y # # ARM CPU Idle Drivers # CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +# end of ARM CPU Idle Drivers +# end of CPU Idle # # CPU Frequency scaling @@ -241,569 +485,684 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_ACPI_CPPC_CPUFREQ=m -CONFIG_ARM_BIG_LITTLE_CPUFREQ=y CONFIG_ARM_SCPI_CPUFREQ=y +# CONFIG_QORIQ_CPUFREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_ARMSTUB=y +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_ARM=y +CONFIG_EFI_EARLYCON=y +CONFIG_MESON_SM=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_IPMI is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_NUMA=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_SEA=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_PMIC_OPREGION is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_KVM_ARM_HOST=y +CONFIG_KVM_ARM_PMU=y +CONFIG_KVM_INDIRECT_VECTORS=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_64BIT_TIME=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_REFCOUNT_FULL=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +CONFIG_ARCH_HAS_RELR=y + +# +# GCOV-based kernel profiling +# +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_PLUGIN_HOSTCC="" +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# end of Memory Management options + CONFIG_NET=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y # # Networking options # CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=m -CONFIG_XFRM_IPCOMP=m -CONFIG_NET_KEY=y -# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -# CONFIG_IP_FIB_TRIE_STATS is not set -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_ROUTE_CLASSID=y +# CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set CONFIG_NET_IP_TUNNEL=m -CONFIG_SYN_COOKIES=y +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set CONFIG_NET_UDP_TUNNEL=m -CONFIG_INET_ESP=y -# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set CONFIG_INET_TUNNEL=m -CONFIG_INET_UDP_DIAG=m -CONFIG_INET_RAW_DIAG=m -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -# CONFIG_TCP_CONG_HYBLA is not set -# CONFIG_TCP_CONG_VEGAS is not set -# CONFIG_TCP_CONG_NV is not set -CONFIG_TCP_CONG_SCALABLE=m -# CONFIG_TCP_CONG_LP is not set -# CONFIG_TCP_CONG_VENO is not set -# CONFIG_TCP_CONG_YEAH is not set -# CONFIG_TCP_CONG_ILLINOIS is not set -# CONFIG_TCP_CONG_DCTCP is not set -# CONFIG_TCP_CONG_CDG is not set -# CONFIG_TCP_CONG_BBR is not set -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -# CONFIG_INET6_ESP_OFFLOAD is not set -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_VTI=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set CONFIG_IPV6_SIT=m -CONFIG_IPV6_SIT_6RD=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -CONFIG_IPV6_PIMSM_V2=y -CONFIG_NETLABEL=y -CONFIG_NETWORK_SECMARK=y +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m # # Core Netfilter Configuration # -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_FAMILY_ARP=y -CONFIG_NETFILTER_NETLINK_ACCT=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set CONFIG_NF_CONNTRACK=m -CONFIG_NETFILTER_CONNCOUNT=m -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_SECMARK=y -CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMEOUT=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CONNTRACK_LABELS=y -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NF_CT_NETLINK_TIMEOUT=m -# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_SIP=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_REDIRECT=y -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=y -CONFIG_NF_TABLES_NETDEV=y -CONFIG_NFT_EXTHDR=m -CONFIG_NFT_META=m -CONFIG_NFT_RT=m -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_SET_RBTREE=m -CONFIG_NFT_SET_HASH=m -CONFIG_NFT_SET_BITMAP=m -CONFIG_NFT_COUNTER=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -CONFIG_NFT_OBJREF=m -CONFIG_NFT_QUEUE=m -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -CONFIG_NFT_FIB=m -CONFIG_NFT_FIB_INET=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -# CONFIG_NFT_FIB_NETDEV is not set -# CONFIG_NF_FLOW_TABLE is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m # # Xtables combined modules # -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set # # Xtables targets # -CONFIG_NETFILTER_XT_TARGET_AUDIT=m +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_HMARK=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -CONFIG_NETFILTER_XT_TARGET_LED=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_SECMARK=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_BPF=m -CONFIG_NETFILTER_XT_MATCH_CGROUP=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ECN=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPCOMP=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_L2TP=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_NFACCT=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_SOCKET=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -CONFIG_IP_SET_HASH_IPMAC=m -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -# CONFIG_IP_VS_DEBUG is not set -CONFIG_IP_VS_TAB_BITS=12 +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -CONFIG_IP_VS_PROTO_SCTP=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -# CONFIG_IP_VS_FO is not set -# CONFIG_IP_VS_OVF is not set -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS SH scheduler -# -CONFIG_IP_VS_SH_TAB_BITS=8 - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set # # IP: Netfilter Configuration # -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_SOCKET_IPV4=m -CONFIG_NF_TABLES_IPV4=y -CONFIG_NFT_CHAIN_ROUTE_IPV4=m -CONFIG_NFT_REJECT_IPV4=m -CONFIG_NFT_DUP_IPV4=m -CONFIG_NFT_FIB_IPV4=m -CONFIG_NF_TABLES_ARP=y -CONFIG_NF_DUP_IPV4=m -CONFIG_NFT_CHAIN_NAT_IPV4=m -CONFIG_NFT_MASQ_IPV4=m -CONFIG_NFT_REDIR_IPV4=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_RPFILTER=m -CONFIG_IP_NF_MATCH_TTL=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_SYNPROXY=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set CONFIG_IP_NF_NAT=m CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_SECURITY=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_NF_SOCKET_IPV6=m -CONFIG_NF_TABLES_IPV6=y -CONFIG_NFT_CHAIN_ROUTE_IPV6=m -CONFIG_NFT_REJECT_IPV6=m -CONFIG_NFT_DUP_IPV6=m -CONFIG_NFT_FIB_IPV6=m -CONFIG_NF_DUP_IPV6=m -CONFIG_NFT_CHAIN_NAT_IPV6=m -CONFIG_NFT_MASQ_IPV6=m -CONFIG_NFT_REDIR_IPV6=m +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RPFILTER=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_TARGET_SYNPROXY=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_IP6_NF_SECURITY=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m -CONFIG_IP6_NF_TARGET_NPT=m -CONFIG_NF_TABLES_BRIDGE=y -CONFIG_NFT_BRIDGE_META=m -CONFIG_NFT_BRIDGE_REJECT=m -CONFIG_NF_LOG_BRIDGE=m -CONFIG_BRIDGE_NF_EBTABLES=m -CONFIG_BRIDGE_EBT_BROUTE=m -CONFIG_BRIDGE_EBT_T_FILTER=m -CONFIG_BRIDGE_EBT_T_NAT=m -CONFIG_BRIDGE_EBT_802_3=m -CONFIG_BRIDGE_EBT_AMONG=m -CONFIG_BRIDGE_EBT_ARP=m -CONFIG_BRIDGE_EBT_IP=m -CONFIG_BRIDGE_EBT_IP6=m -CONFIG_BRIDGE_EBT_LIMIT=m -CONFIG_BRIDGE_EBT_MARK=m -CONFIG_BRIDGE_EBT_PKTTYPE=m -CONFIG_BRIDGE_EBT_STP=m -CONFIG_BRIDGE_EBT_VLAN=m -CONFIG_BRIDGE_EBT_ARPREPLY=m -CONFIG_BRIDGE_EBT_DNAT=m -CONFIG_BRIDGE_EBT_MARK_T=m -CONFIG_BRIDGE_EBT_REDIRECT=m -CONFIG_BRIDGE_EBT_SNAT=m -CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_NFLOG=m -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_OBJCNT is not set -CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set -CONFIG_SCTP_COOKIE_HMAC_MD5=y -CONFIG_SCTP_COOKIE_HMAC_SHA1=y -CONFIG_INET_SCTP_DIAG=m -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y -CONFIG_PHONET=y -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFB=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -# CONFIG_NET_SCH_CBS is not set -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m -CONFIG_NET_SCH_QFQ=m -CONFIG_NET_SCH_CODEL=m -CONFIG_NET_SCH_FQ_CODEL=m -CONFIG_NET_SCH_FQ=m -CONFIG_NET_SCH_HHF=m -CONFIG_NET_SCH_PIE=m -CONFIG_NET_SCH_INGRESS=m -CONFIG_NET_SCH_PLUG=m -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=y -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -CONFIG_NET_CLS_BPF=m -# CONFIG_NET_CLS_FLOWER is not set -# CONFIG_NET_CLS_MATCHALL is not set -CONFIG_NET_EMATCH=y -CONFIG_NET_EMATCH_STACK=32 -CONFIG_NET_EMATCH_CMP=m -CONFIG_NET_EMATCH_NBYTE=m -CONFIG_NET_EMATCH_U32=y -CONFIG_NET_EMATCH_META=m -CONFIG_NET_EMATCH_TEXT=m -# CONFIG_NET_EMATCH_CANID is not set -CONFIG_NET_EMATCH_IPSET=m -CONFIG_NET_CLS_ACT=y -CONFIG_NET_ACT_POLICE=y -CONFIG_NET_ACT_GACT=y -CONFIG_GACT_PROB=y -CONFIG_NET_ACT_MIRRED=y -# CONFIG_NET_ACT_SAMPLE is not set -CONFIG_NET_ACT_IPT=m -CONFIG_NET_ACT_NAT=m -CONFIG_NET_ACT_PEDIT=m -CONFIG_NET_ACT_SIMP=m -CONFIG_NET_ACT_SKBEDIT=m -CONFIG_NET_ACT_CSUM=m -# CONFIG_NET_ACT_VLAN is not set -# CONFIG_NET_ACT_BPF is not set -# CONFIG_NET_ACT_CONNMARK is not set -# CONFIG_NET_ACT_SKBMOD is not set -# CONFIG_NET_ACT_IFE is not set -# CONFIG_NET_ACT_TUNNEL_KEY is not set -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y -CONFIG_CGROUP_NET_PRIO=y -CONFIG_CGROUP_NET_CLASSID=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y # # Network testing # -# CONFIG_NET_DROP_MONITOR is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m -CONFIG_CAN_GW=m +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options -# -# CAN Device Drivers -# -# CONFIG_CAN_VCAN is not set -# CONFIG_CAN_VXCAN is not set -CONFIG_CAN_SLCAN=m -CONFIG_CAN_DEV=m -CONFIG_CAN_CALC_BITTIMING=y -# CONFIG_CAN_LEDS is not set -# CONFIG_CAN_GRCAN is not set -# CONFIG_CAN_XILINXCAN is not set -# CONFIG_CAN_C_CAN is not set -# CONFIG_CAN_CC770 is not set -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -# CONFIG_CAN_SJA1000 is not set -# CONFIG_CAN_SOFTING is not set - -# -# CAN SPI interfaces -# -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_MCP251X is not set - -# -# CAN USB interfaces -# -CONFIG_CAN_EMS_USB=m -CONFIG_CAN_ESD_USB2=m -CONFIG_CAN_GS_USB=m -CONFIG_CAN_KVASER_USB=m -CONFIG_CAN_PEAK_USB=m -CONFIG_CAN_8DEV_USB=m -CONFIG_CAN_MCBA_USB=m -# CONFIG_CAN_DEBUG_DEVICES is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set CONFIG_BT=m +CONFIG_BT_BREDR=y +# CONFIG_BT_RFCOMM is not set +# CONFIG_BT_BNEP is not set CONFIG_BT_HIDP=m # CONFIG_BT_HS is not set # CONFIG_BT_LE is not set CONFIG_BT_LEDS=y -# CONFIG_BT_DEBUGFS is not set # # Bluetooth device drivers @@ -814,138 +1173,432 @@ CONFIG_BT_RTL=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_ATH3K=m -CONFIG_FIB_RULES=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y +# CONFIG_BT_HCIUART_3WIRE is not set +# CONFIG_BT_HCIUART_INTEL is not set +CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_RTL is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y CONFIG_CFG80211=m -CONFIG_CFG80211_WEXT=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set CONFIG_MAC80211=m -CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y -CONFIG_NFC=m -CONFIG_NFC_DIGITAL=m -CONFIG_NFC_NCI=m -# CONFIG_NFC_NCI_SPI is not set -# CONFIG_NFC_NCI_UART is not set -CONFIG_NFC_HCI=m -# CONFIG_NFC_SHDLC is not set - -# -# Near Field Communication (NFC) devices -# -# CONFIG_NFC_TRF7970A is not set -# CONFIG_NFC_SIM is not set -# CONFIG_NFC_PORT100 is not set -# CONFIG_NFC_FDP is not set -CONFIG_NFC_PN533=m -CONFIG_NFC_PN533_USB=m -# CONFIG_NFC_PN533_I2C is not set -CONFIG_NFC_MRVL=m -CONFIG_NFC_MRVL_USB=m -# CONFIG_NFC_MRVL_I2C is not set -# CONFIG_NFC_ST_NCI_I2C is not set -# CONFIG_NFC_ST_NCI_SPI is not set -# CONFIG_NFC_NXP_NCI is not set -# CONFIG_NFC_S3FWRN5_I2C is not set -# CONFIG_NFC_ST95HF is not set +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_HAVE_EBPF_JIT=y # # Device Drivers # +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_HOTPLUG_PCI_PCIE is not set +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +# CONFIG_PCIE_BW is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_HOST is not set +# end of Cadence PCIe controllers support + +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_IPROC=y +CONFIG_PCIE_IPROC_PLATFORM=y +CONFIG_PCIE_IPROC_MSI=y +CONFIG_PCIE_ALTERA=y +CONFIG_PCIE_ALTERA_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +CONFIG_PCI_HISI=y +CONFIG_PCIE_KIRIN=y +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set # # Generic Driver Options # -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y -CONFIG_DMA_CMA=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y # -# Default contiguous memory area size: +# Firmware loader # +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options # # Bus devices # -# CONFIG_BRCMSTB_GISB_ARB is not set +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +CONFIG_SIMPLE_PM_BUS=y CONFIG_VEXPRESS_CONFIG=y -CONFIG_CONNECTOR=m +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set # # Partition parsers # +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers # # User Modules And Translation Layers # +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set # # RAM/ROM/Flash chip drivers # +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access # # Self-contained MTD device drivers # -CONFIG_MTD_M25P80=y +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # -CONFIG_MTD_NAND=y +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_MESON is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set # # LPDDR & LPDDR2 PCM memory drivers # +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_MTK_QUADSPI is not set +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y # # Protocols # -CONFIG_CDROM=m +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set # # NVME Support # +CONFIG_NVME_CORE=m CONFIG_BLK_DEV_NVME=m +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support # # Misc devices # +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y CONFIG_VEXPRESS_SYSCFG=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_C2PORT is not set # # EEPROM support # +# CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set # # Texas Instruments shared transport line discipline # +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set # # Intel MIC & related support @@ -962,6 +1615,7 @@ CONFIG_EEPROM_AT25=m # # VOP Bus Driver # +# CONFIG_VOP_BUS is not set # # Intel MIC Host Driver @@ -982,142 +1636,278 @@ CONFIG_EEPROM_AT25=m # # VOP Driver # +# end of Intel MIC & related support + +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# end of Misc devices # # SCSI device support # -CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y # CONFIG_SCSI_PROC_FS is not set # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y -CONFIG_BLK_DEV_SR=m -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set # # SCSI Transports # -CONFIG_SCSI_FC_ATTRS=m -CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set CONFIG_SCSI_SAS_ATTRS=y CONFIG_SCSI_SAS_LIBSAS=y CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_HOST_SMP=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m -# CONFIG_SCSI_BNX2X_FCOE is not set -# CONFIG_SCSI_HISI_SAS is not set -CONFIG_LIBFC=m -CONFIG_LIBFCOE=m -# CONFIG_FCOE is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_BFA_FC is not set -# CONFIG_SCSI_CHELSIO_FCOE is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y CONFIG_ATA=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_CEVA=y -# CONFIG_AHCI_QORIQ is not set +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set # # PATA SFF controllers with BMDMA # +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set CONFIG_PATA_PLATFORM=y CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BCACHE=m -# CONFIG_BCACHE_DEBUG is not set -# CONFIG_BCACHE_CLOSURES_DEBUG is not set +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m -# CONFIG_DM_MQ_DEFAULT is not set # CONFIG_DM_DEBUG is not set -CONFIG_DM_BUFIO=m -# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set -CONFIG_DM_BIO_PRISON=m -CONFIG_DM_PERSISTENT_DATA=m # CONFIG_DM_UNSTRIPED is not set -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_THIN_PROVISIONING=m -CONFIG_DM_CACHE=m -CONFIG_DM_CACHE_SMQ=m +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set # CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=m -CONFIG_DM_LOG_USERSPACE=m -CONFIG_DM_RAID=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_DM_FLAKEY=m -CONFIG_DM_VERITY=m -# CONFIG_DM_VERITY_FEC is not set -CONFIG_DM_SWITCH=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + CONFIG_NETDEVICES=y -CONFIG_BONDING=m -CONFIG_DUMMY=m -# CONFIG_IFB is not set -CONFIG_NET_TEAM=m -CONFIG_NET_TEAM_MODE_BROADCAST=m -CONFIG_NET_TEAM_MODE_ROUNDROBIN=m -CONFIG_NET_TEAM_MODE_RANDOM=m -CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m -CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set CONFIG_MACVLAN=m CONFIG_MACVTAP=m +# CONFIG_IPVLAN is not set CONFIG_VXLAN=m # CONFIG_GENEVE is not set # CONFIG_GTP is not set -CONFIG_NETCONSOLE=y -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NET_POLL_CONTROLLER=y +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_VIRTIO_NET=y -CONFIG_NLMON=m +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set # # CAIF transport drivers @@ -1126,185 +1916,553 @@ CONFIG_NLMON=m # # Distributed Switch Architecture drivers # +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +CONFIG_BGMAC=y +CONFIG_BGMAC_PLATFORM=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y CONFIG_MACB=y -# CONFIG_THUNDER_NIC_PF is not set -# CONFIG_THUNDER_NIC_BGX is not set -# CONFIG_THUNDER_NIC_RGX is not set +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +CONFIG_NET_VENDOR_HISILICON=y +CONFIG_HIX5HD2_GMAC=y +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y CONFIG_HNS_DSAF=y CONFIG_HNS_ENET=y +CONFIG_HNS3=y +CONFIG_HNS3_HCLGE=y +# CONFIG_HNS3_HCLGEVF is not set +CONFIG_HNS3_ENET=y +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set CONFIG_E1000E=y CONFIG_IGB=y +CONFIG_IGB_HWMON=y CONFIG_IGBVF=y -# CONFIG_MVMDIO is not set +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_SKGE is not set CONFIG_SKY2=y -# CONFIG_QCOM_EMAC is not set +# CONFIG_OCTEONTX2_AF is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +# CONFIG_MLX5_CORE_IPOIB is not set +# CONFIG_MLXSW_CORE is not set +CONFIG_MLXFW=m +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y CONFIG_STMMAC_ETH=m +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=m +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=m +CONFIG_DWMAC_MESON=m +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_IPROC is not set +# CONFIG_MDIO_BCM_UNIMAC is not set CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM_IPROC=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MESON_G12A=m CONFIG_MDIO_BUS_MUX_MMIOREG=y +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +CONFIG_MDIO_CAVIUM=y # CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_THUNDER is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +CONFIG_MDIO_THUNDER=y +CONFIG_PHYLINK=m +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set # # MII PHY device drivers # +# CONFIG_SFP is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set CONFIG_AT803X_PHY=m +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_MARVELL_10G_PHY=m -CONFIG_MESON_GXL_PHY=y +# CONFIG_MESON_GXL_PHY is not set CONFIG_MICREL_PHY=y CONFIG_MICROCHIP_PHY=m -CONFIG_REALTEK_PHY=y -# CONFIG_ROCKCHIP_PHY is not set -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MPPE=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPPOE=m -CONFIG_PPPOL2TP=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_SLHC=m -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set CONFIG_USB_PEGASUS=m CONFIG_USB_RTL8150=m CONFIG_USB_RTL8152=m CONFIG_USB_LAN78XX=m CONFIG_USB_USBNET=m -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_HUAWEI_CDC_NCM=m -CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SR9700=m +# CONFIG_USB_NET_SR9700 is not set CONFIG_USB_NET_SR9800=m CONFIG_USB_NET_SMSC75XX=m CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_GL620A=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m CONFIG_USB_NET_PLUSB=m CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_CX82310_ETH=m -CONFIG_USB_NET_KALMIA=m -CONFIG_USB_NET_QMI_WWAN=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_CDC_PHONET=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -CONFIG_USB_NET_CH9200=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set CONFIG_ATH_COMMON=m -CONFIG_ATH9K_HW=m -CONFIG_ATH9K_COMMON=m -CONFIG_ATH9K_BTCOEX_SUPPORT=y -CONFIG_ATH9K_HTC=m -# CONFIG_ATH9K_HTC_DEBUGFS is not set -CONFIG_CARL9170=m -CONFIG_CARL9170_LEDS=y -CONFIG_CARL9170_WPC=y -CONFIG_CARL9170_HWRNG=y -CONFIG_ATH6KL=m -# CONFIG_ATH6KL_SDIO is not set -CONFIG_ATH6KL_USB=m -# CONFIG_ATH6KL_DEBUG is not set -# CONFIG_ATH6KL_TRACING is not set -CONFIG_AR5523=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set CONFIG_BRCMFMAC=m -CONFIG_RT2X00=m -# CONFIG_RT2400PCI is not set -# CONFIG_RT2500PCI is not set -# CONFIG_RT61PCI is not set -# CONFIG_RT2800PCI is not set -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -CONFIG_RT2800USB_UNKNOWN=y -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set CONFIG_WLCORE_SDIO=m -CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set +# CONFIG_NVM is not set # # Input device support # -CONFIG_INPUT_FF_MEMLESS=m +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y # # Userland interfaces # +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # +CONFIG_INPUT_KEYBOARD=y CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set CONFIG_KEYBOARD_CROS_EC=y -CONFIG_MOUSE_APPLETOUCH=m -CONFIG_MOUSE_BCM5974=m -CONFIG_MOUSE_SYNAPTICS_USB=m -CONFIG_INPUT_JOYSTICK=y -# CONFIG_JOYSTICK_ANALOG is not set -# CONFIG_JOYSTICK_A3D is not set -# CONFIG_JOYSTICK_ADI is not set -# CONFIG_JOYSTICK_COBRA is not set -# CONFIG_JOYSTICK_GF2K is not set -# CONFIG_JOYSTICK_GRIP is not set -# CONFIG_JOYSTICK_GRIP_MP is not set -# CONFIG_JOYSTICK_GUILLEMOT is not set -# CONFIG_JOYSTICK_INTERACT is not set -# CONFIG_JOYSTICK_SIDEWINDER is not set -# CONFIG_JOYSTICK_TMDC is not set -CONFIG_JOYSTICK_IFORCE=m -CONFIG_JOYSTICK_IFORCE_USB=y -CONFIG_JOYSTICK_IFORCE_232=y -# CONFIG_JOYSTICK_WARRIOR is not set -# CONFIG_JOYSTICK_MAGELLAN is not set -# CONFIG_JOYSTICK_SPACEORB is not set -# CONFIG_JOYSTICK_SPACEBALL is not set -# CONFIG_JOYSTICK_STINGER is not set -# CONFIG_JOYSTICK_TWIDJOY is not set -# CONFIG_JOYSTICK_ZHENHUA is not set -# CONFIG_JOYSTICK_AS5011 is not set -# CONFIG_JOYSTICK_JOYDUMP is not set -CONFIG_JOYSTICK_XPAD=m -CONFIG_JOYSTICK_XPAD_FF=y -CONFIG_JOYSTICK_XPAD_LEDS=y -# CONFIG_JOYSTICK_PSXPAD_SPI is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set # CONFIG_TOUCHSCREEN_AR1021_I2C is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set @@ -1318,6 +2476,7 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_GOODIX is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_IPROC is not set # CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_EKTF2127 is not set @@ -1339,25 +2498,7 @@ CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set -CONFIG_TOUCHSCREEN_USB_COMPOSITE=m -CONFIG_TOUCHSCREEN_USB_EGALAX=y -CONFIG_TOUCHSCREEN_USB_PANJIT=y -CONFIG_TOUCHSCREEN_USB_3M=y -CONFIG_TOUCHSCREEN_USB_ITM=y -CONFIG_TOUCHSCREEN_USB_ETURBO=y -CONFIG_TOUCHSCREEN_USB_GUNZE=y -CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y -CONFIG_TOUCHSCREEN_USB_IRTOUCH=y -CONFIG_TOUCHSCREEN_USB_IDEALTEK=y -CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y -CONFIG_TOUCHSCREEN_USB_GOTOP=y -CONFIG_TOUCHSCREEN_USB_JASTEC=y -CONFIG_TOUCHSCREEN_USB_ELO=y -CONFIG_TOUCHSCREEN_USB_E2I=y -CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y -CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y -CONFIG_TOUCHSCREEN_USB_NEXIO=y -CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set @@ -1375,70 +2516,215 @@ CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -CONFIG_TOUCHSCREEN_DWAV_USB_MT=m -CONFIG_TOUCHSCREEN_SX865X=m +# CONFIG_TOUCHSCREEN_IQS5XX is not set CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MSM_VIBRATOR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set # CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set # # Hardware I/O ports # -CONFIG_SERIO_SERPORT=m +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set CONFIG_SERIO_AMBAKMI=y -CONFIG_GAMEPORT=m -# CONFIG_GAMEPORT_NS558 is not set -# CONFIG_GAMEPORT_L4 is not set -# CONFIG_GAMEPORT_EMU10K1 is not set -# CONFIG_GAMEPORT_FM801 is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support # # Character devices # +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_NULL_TTY is not set +CONFIG_LDISC_AUTOLOAD=y +CONFIG_DEVMEM=y # # Serial drivers # +CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_OF_PLATFORM=y # # Non-8250 serial port support # +# CONFIG_SERIAL_AMBA_PL010 is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_SERIAL_KGDB_NMI is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set CONFIG_SERIAL_MESON=y CONFIG_SERIAL_MESON_CONSOLE=y -CONFIG_CONSOLE_POLL=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_DEV_BUS=y CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_IPROC_RNG200=m +# CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_MESON=y CONFIG_HW_RANDOM_CAVIUM=m +CONFIG_HW_RANDOM_OPTEE=m +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_INFINEON is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_FTPM_TEE is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set +# end of Character devices -# -# PCMCIA character devices -# +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # # I2C support # CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support @@ -1447,48 +2733,122 @@ CONFIG_I2C_MUX_PCA954x=y # # PC SMBus host controller drivers # +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set # # ACPI drivers # +# CONFIG_I2C_SCMI is not set # # I2C system bus drivers (mostly embedded / system-on-chip) # +CONFIG_I2C_BCM_IPROC=y +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y -CONFIG_I2C_MESON=y -# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_MESON is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # -CONFIG_I2C_TINY_USB=m +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set # # Other I2C/SMBus bus drivers # CONFIG_I2C_CROS_EC_TUNNEL=y +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set CONFIG_I2C_SLAVE=y # CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y # # SPI Master Controller Drivers # -CONFIG_SPI_MESON_SPICC=y -CONFIG_SPI_MESON_SPIFC=y +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BCM_QSPI=y +CONFIG_SPI_BITBANG=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +CONFIG_SPI_NXP_FLEXSPI=y +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_MESON_SPICC is not set +# CONFIG_SPI_MESON_SPIFC is not set +# CONFIG_SPI_OC_TINY is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_PXA2XX is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set # # SPI Protocol Masters # CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set # # PPS clients support # +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set # # PPS generators support @@ -1497,72 +2857,322 @@ CONFIG_SPMI=y # # PTP clock support # +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_DTE=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set CONFIG_PINCTRL_MAX77620=y -CONFIG_GPIO_SYSFS=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_IPROC_GPIO=y +CONFIG_PINCTRL_NS2_MUX=y +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_PINCTRL_MESON8_PMX=y +CONFIG_PINCTRL_MESON_AXG=y +CONFIG_PINCTRL_MESON_AXG_PMX=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_GENERIC=y # # Memory mapped GPIO drivers # +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +CONFIG_GPIO_MB86S7X=y CONFIG_GPIO_PL061=y -# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers # # I2C GPIO expanders # +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders # # MFD GPIO expanders # +# CONFIG_GPIO_BD9571MWV is not set CONFIG_GPIO_MAX77620=y +# end of MFD GPIO expanders # # PCI GPIO expanders # +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders # # SPI GPIO expanders # +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders # # USB GPIO expanders # -# CONFIG_POWER_RESET_BRCMSTB is not set -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_RESET_GPIO_RESTART=y -CONFIG_POWER_RESET_RESTART=y +# end of USB GPIO expanders + +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_AVS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set CONFIG_POWER_RESET_VEXPRESS=y -# CONFIG_POWER_RESET_XGENE is not set +CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y -CONFIG_POWER_RESET_SYSCON_POWEROFF=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +# CONFIG_CHARGER_UCS1002 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_XGENE is not set # # ACPI drivers # +# CONFIG_SENSORS_ACPI_POWER is not set CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -1573,61 +3183,196 @@ CONFIG_THERMAL_GOV_STEP_WISE=y # CONFIG_THERMAL_GOV_USER_SPACE is not set CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y -CONFIG_CLOCK_THERMAL=y -CONFIG_DEVFREQ_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_DEVFREQ_THERMAL is not set CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set # CONFIG_MAX77620_THERMAL is not set -# CONFIG_QORIQ_THERMAL is not set +CONFIG_QORIQ_THERMAL=m # -# ACPI INT340X thermal drivers +# Broadcom thermal drivers # -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set +CONFIG_BCM_NS_THERMAL=y +CONFIG_BCM_SR_THERMAL=y +# end of Broadcom thermal drivers + # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y - -# -# Watchdog Device Drivers -# -CONFIG_MESON_GXBB_WATCHDOG=y -CONFIG_MESON_WATCHDOG=y - -# -# PCI-based Watchdog Cards -# - -# -# USB-based Watchdog Cards -# +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set # # Watchdog Pretimeout Governors # +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +CONFIG_MESON_GXBB_WATCHDOG=y +CONFIG_MESON_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set # # Multifunction device drivers # -CONFIG_MFD_CROS_EC=y -CONFIG_MFD_CROS_EC_I2C=y -CONFIG_MFD_CROS_EC_SPI=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CROS_EC_DEV=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set # CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# end of Multifunction device drivers + CONFIG_REGULATOR=y # CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD718XX=y +CONFIG_REGULATOR_BD9571MWV=y # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set CONFIG_REGULATOR_HI6421V530=y # CONFIG_REGULATOR_ISL9305 is not set # CONFIG_REGULATOR_ISL6271A is not set @@ -1642,53 +3387,68 @@ CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set +CONFIG_REGULATOR_MAX8973=y +# CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MT6311 is not set -# CONFIG_REGULATOR_PFUZE100 is not set +CONFIG_REGULATOR_PFUZE100=y # CONFIG_REGULATOR_PV88060 is not set # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set CONFIG_REGULATOR_PWM=y -# CONFIG_REGULATOR_QCOM_SPMI is not set +CONFIG_REGULATOR_QCOM_SPMI=y CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_S2MPA01 is not set CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set -# CONFIG_REGULATOR_VCTRL is not set +CONFIG_REGULATOR_VCTRL=m # CONFIG_REGULATOR_VEXPRESS is not set -CONFIG_CEC_CORE=y -CONFIG_RC_CORE=y +CONFIG_CEC_CORE=m +CONFIG_RC_CORE=m CONFIG_RC_MAP=m -CONFIG_LIRC=y +# CONFIG_LIRC is not set CONFIG_RC_DECODERS=y -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_SANYO_DECODER=m -CONFIG_IR_SHARP_DECODER=m -CONFIG_IR_MCE_KBD_DECODER=m -CONFIG_IR_XMP_DECODER=m +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set CONFIG_RC_DEVICES=y -CONFIG_RC_ATI_REMOTE=m -CONFIG_IR_IMON=m -CONFIG_IR_MCEUSB=m -CONFIG_IR_MESON=y -CONFIG_IR_REDRAT3=m -# CONFIG_IR_SPI is not set -CONFIG_IR_STREAMZAP=m -CONFIG_IR_IGUANA=m -CONFIG_IR_TTUSBIR=m -# CONFIG_IR_GPIO_TX is not set -# CONFIG_IR_PWM_TX is not set -CONFIG_MEDIA_SUPPORT=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_ENE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_ITE_CIR is not set +# CONFIG_IR_FINTEK is not set +# CONFIG_IR_MESON is not set +# CONFIG_IR_NUVOTON is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_RC_XBOX_DVD is not set +CONFIG_MEDIA_SUPPORT=m # # Multimedia core support @@ -1696,24 +3456,25 @@ CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -CONFIG_MEDIA_CEC_SUPPORT=y -CONFIG_MEDIA_CEC_RC=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +# CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CONTROLLER=y -CONFIG_VIDEO_DEV=y +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_VIDEO_DEV=m CONFIG_VIDEO_V4L2_SUBDEV_API=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=y -CONFIG_V4L2_FWNODE=m -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_V4L2=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_DVB_CORE=m +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set # # Media drivers @@ -1726,194 +3487,131 @@ CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set # CONFIG_USB_GSPCA_DTCS033 is not set -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -CONFIG_USB_GSPCA_JL2005BCD=m -CONFIG_USB_GSPCA_KINECT=m -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SE401=m -CONFIG_USB_GSPCA_SN9C2028=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STK1135=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TOPRO=m -CONFIG_USB_GSPCA_TOUPTEK=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_USB_PWC=m -# CONFIG_USB_PWC_DEBUG is not set -CONFIG_USB_PWC_INPUT_EVDEV=y -CONFIG_VIDEO_CPIA2=m -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -CONFIG_VIDEO_USBTV=m +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set # # Analog TV USB devices # -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +# CONFIG_VIDEO_PVRUSB2 is not set # CONFIG_VIDEO_HDPVR is not set -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_STK1160_COMMON=m -CONFIG_VIDEO_STK1160=m -CONFIG_VIDEO_GO7007=m -CONFIG_VIDEO_GO7007_USB=m -CONFIG_VIDEO_GO7007_LOADER=m -CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set # # Analog/digital TV USB devices # -CONFIG_VIDEO_AU0828=m -CONFIG_VIDEO_AU0828_V4L2=y -# CONFIG_VIDEO_AU0828_RC is not set -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_TM6000=m -CONFIG_VIDEO_TM6000_ALSA=m -CONFIG_VIDEO_TM6000_DVB=m +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set # # Digital TV USB devices # -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_DIB3000MC=m -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_PCTV452E=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -CONFIG_DVB_USB_V2=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_AF9035=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_AZ6007=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_EC168=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_MXL111SF=m -CONFIG_DVB_USB_RTL28XXU=m -CONFIG_DVB_USB_DVBSKY=m -CONFIG_DVB_USB_ZD1301=m -CONFIG_DVB_TTUSB_BUDGET=m -CONFIG_DVB_TTUSB_DEC=m -CONFIG_SMS_USB_DRV=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set -CONFIG_DVB_AS102=m +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set # # Webcam, TV (analog/digital) USB devices # -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_V4L2=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_EM28XX_RC=m - -# -# USB HDMI CEC adapters -# -CONFIG_USB_PULSE8_CEC=m -CONFIG_USB_RAINSHADOW_CEC=m +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set CONFIG_V4L_MEM2MEM_DRIVERS=y -CONFIG_VIDEO_AML_MESON_VDEC=y -CONFIG_VIDEO_MESON_VDEC=y -CONFIG_CEC_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MESON_AO_CEC=m +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SH_VEU is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set # # Supported MMC/SDIO adapters # -CONFIG_MEDIA_COMMON_OPTIONS=y - -# -# common driver options -# -CONFIG_VIDEO_CX2341X=m -CONFIG_VIDEO_TVEEPROM=m -CONFIG_CYPRESS_FIRMWARE=m -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_SMS_SIANO_MDTV=m -CONFIG_SMS_SIANO_RC=y +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m # # Media ancillary drivers (tuners, sensors, i2c, spi, frontends) # +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# I2C drivers hidden by 'Autoselect ancillary drivers' +# # # Audio decoders, processors and mixers # -CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_CS53L32A=m -CONFIG_VIDEO_UDA1342=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_SONY_BTF_MPX=m # # RDS decoders @@ -1922,16 +3620,10 @@ CONFIG_VIDEO_SONY_BTF_MPX=m # # Video decoders # -CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_TW2804=m -CONFIG_VIDEO_TW9903=m -CONFIG_VIDEO_TW9906=m # # Video and audio decoders # -CONFIG_VIDEO_CX25840=m # # Video encoders @@ -1940,9 +3632,10 @@ CONFIG_VIDEO_CX25840=m # # Camera sensor devices # -CONFIG_VIDEO_OV2640=m -CONFIG_VIDEO_OV7640=m -CONFIG_VIDEO_MT9V011=m + +# +# Lens drivers +# # # Flash devices @@ -1965,152 +3658,78 @@ CONFIG_VIDEO_MT9V011=m # # -# Sensors used on soc_camera driver +# SPI drivers hidden by 'Autoselect ancillary drivers' +# + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Tuner drivers hidden by 'Autoselect ancillary drivers' +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MC44S803=m + +# +# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' # -CONFIG_MEDIA_TUNER_TDA18250=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2063=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_MEDIA_TUNER_FC0011=m -CONFIG_MEDIA_TUNER_FC0012=m -CONFIG_MEDIA_TUNER_FC0013=m -CONFIG_MEDIA_TUNER_TDA18212=m -CONFIG_MEDIA_TUNER_E4000=m -CONFIG_MEDIA_TUNER_FC2580=m -CONFIG_MEDIA_TUNER_TUA9001=m -CONFIG_MEDIA_TUNER_SI2157=m -CONFIG_MEDIA_TUNER_IT913X=m -CONFIG_MEDIA_TUNER_R820T=m -CONFIG_MEDIA_TUNER_QM1D1C0042=m # # Multistandard (satellite) frontends # -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m -CONFIG_DVB_M88DS3103=m # # Multistandard (cable + terrestrial) frontends # -CONFIG_DVB_DRXK=m -CONFIG_DVB_TDA18271C2DD=m -CONFIG_DVB_SI2165=m -CONFIG_DVB_MN88472=m -CONFIG_DVB_MN88473=m # # DVB-S (satellite) frontends # -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA8083=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_CX24120=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_TS2020=m -CONFIG_DVB_DS3000=m -CONFIG_DVB_TDA10071=m # # DVB-T (terrestrial) frontends # -CONFIG_DVB_CX22700=m -CONFIG_DVB_CX22702=m -CONFIG_DVB_DRXD=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_CXD2820R=m -CONFIG_DVB_RTL2830=m -CONFIG_DVB_RTL2832=m -CONFIG_DVB_SI2168=m -CONFIG_DVB_AS102_FE=m -CONFIG_DVB_ZD1301_DEMOD=m -CONFIG_DVB_GP8PSK_FE=m # # DVB-C (cable) frontends # -CONFIG_DVB_VES1820=m -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_LGDT3306A=m -CONFIG_DVB_LG2160=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_AU8522=m -CONFIG_DVB_AU8522_DTV=m -CONFIG_DVB_AU8522_V4L=m -CONFIG_DVB_S5H1411=m # # ISDB-T (terrestrial) frontends # -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # -CONFIG_DVB_TC90522=m # # Digital terrestrial only tuners/PLL # -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m # # SEC control devices for DVB-S # -CONFIG_DVB_DRX39XYJ=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LNBP22=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_ISL6423=m -CONFIG_DVB_A8293=m -CONFIG_DVB_SP2=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m -CONFIG_DVB_M88RS2000=m -CONFIG_DVB_AF9033=m + +# +# Common Interface (EN50221) controller drivers +# # # Tools to develop new frontends @@ -2119,83 +3738,373 @@ CONFIG_DVB_AF9033=m # # Graphics support # -CONFIG_DRM=y -# CONFIG_DRM_DEBUG_MM is not set -CONFIG_DRM_KMS_HELPER=y +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=m +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y -CONFIG_DRM_FBDEV_OVERALLOC=200 +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_TTM=m +CONFIG_DRM_VRAM_HELPER=m +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=y +CONFIG_DRM_VM=y +CONFIG_DRM_SCHED=m # # I2C encoder or helper chips # -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set # # ACP (Audio CoProcessor) Configuration # +# end of ACP (Audio CoProcessor) Configuration -# -# AMD Library routines -# # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +CONFIG_DRM_ATI_PCIGART=y +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +CONFIG_DRM_RCAR_LVDS=m +CONFIG_DRM_RCAR_WRITEBACK=y +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y # # Display Panels # +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_LVDS is not set CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set CONFIG_DRM_I2C_ADV7511=m -CONFIG_DRM_DW_HDMI=y -CONFIG_DRM_DW_HDMI_I2S_AUDIO=y -CONFIG_DRM_DW_HDMI_CEC=m -# CONFIG_DRM_HISI_HIBMC is not set -# CONFIG_DRM_HISI_KIRIN is not set -CONFIG_DRM_MESON=y -CONFIG_DRM_MESON_DW_HDMI=y +# CONFIG_DRM_I2C_ADV7511_AUDIO is not set +CONFIG_DRM_I2C_ADV7533=y +CONFIG_DRM_I2C_ADV7511_CEC=y +CONFIG_DRM_DW_HDMI=m +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_CEC is not set +# end of Display Interface Bridges + +CONFIG_DRM_ETNAVIV=m +CONFIG_DRM_ETNAVIV_THERMAL=y +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_HISI_HIBMC=m +CONFIG_DRM_HISI_KIRIN=m +# CONFIG_DRM_MXSFB is not set +CONFIG_DRM_MESON=m +CONFIG_DRM_MESON_DW_HDMI=m +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +CONFIG_DRM_PL111=m +# CONFIG_DRM_XEN is not set +CONFIG_DRM_LIMA=m +CONFIG_DRM_PANFROST=m +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set # # Frame buffer hardware drivers # -CONFIG_FB_ARMCLCD=y -# CONFIG_FB_UVESA is not set +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GENERIC=m CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y # # Console display driver support # +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_VMASTER=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set # # HD-Audio # -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_USB_HIFACE=m +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set CONFIG_SND_SOC=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set # # SoC Audio for Freescale CPUs @@ -2204,92 +4113,366 @@ CONFIG_SND_SOC=y # # Common SoC Audio options for Freescale CPUs: # -CONFIG_SND_SOC_MESON=y -CONFIG_SND_SOC_MESON_I2S=y +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set + +# +# ASoC support for Amlogic platforms +# +# CONFIG_SND_MESON_AXG_FRDDR is not set +# CONFIG_SND_MESON_AXG_TODDR is not set +# CONFIG_SND_MESON_AXG_TDMIN is not set +# CONFIG_SND_MESON_AXG_TDMOUT is not set +# CONFIG_SND_MESON_AXG_SOUND_CARD is not set +# CONFIG_SND_MESON_AXG_SPDIFOUT is not set +# CONFIG_SND_MESON_AXG_SPDIFIN is not set +# CONFIG_SND_MESON_AXG_PDM is not set +# CONFIG_SND_MESON_G12A_TOHDMITX is not set +# end of ASoC support for Amlogic platforms + +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set # # STMicroelectronics STM32 SOC audio support # +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y # # CODEC drivers # +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=m -CONFIG_SND_SOC_DIO2125=m -CONFIG_SND_SOC_HDMI_CODEC=y +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CROS_EC_CODEC is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=m CONFIG_SND_SOC_ES7134=m -CONFIG_SND_SOC_PCM512x=m -CONFIG_SND_SOC_PCM512x_I2C=m +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set CONFIG_SND_SOC_SPDIF=m -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SIMPLE_SCU_CARD=m +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +CONFIG_SND_SOC_TAS571X=m +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD=m +# CONFIG_SND_XEN_FRONTEND is not set # # HID support # +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y # # Special HID drivers # CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set CONFIG_HID_APPLE=y -CONFIG_HID_APPLEIR=m +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set CONFIG_HID_CYPRESS=y -CONFIG_HID_ELO=m +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set CONFIG_HID_EZKEY=y -CONFIG_HID_HOLTEK=m -CONFIG_HOLTEK_FF=y -CONFIG_HID_UCLOGIC=m +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_HAMMER is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set CONFIG_HID_LOGITECH=y # CONFIG_HID_LOGITECH_HIDPP is not set # CONFIG_LOGITECH_FF is not set # CONFIG_LOGIRUMBLEPAD2_FF is not set # CONFIG_LOGIG940_FF is not set # CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_SONY=m -CONFIG_SONY_FF=y -CONFIG_HID_WACOM=m +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# end of Special HID drivers # # USB HID support # -CONFIG_HID_PID=y -CONFIG_USB_HIDDEV=y +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support # # I2C HID support # +CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set CONFIG_USB_OTG=y -CONFIG_USB_MON=m +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set # # USB Device Class drivers # -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may @@ -2299,19 +4482,33 @@ CONFIG_USB_WDM=m # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y -CONFIG_USB_UAS=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y # # USB Imaging devices # -CONFIG_USBIP_CORE=m -CONFIG_USBIP_VHCI_HCD=m -CONFIG_USBIP_VHCI_HC_PORTS=8 -CONFIG_USBIP_VHCI_NR_HCS=1 -CONFIG_USBIP_HOST=m -# CONFIG_USBIP_VUDC is not set -# CONFIG_USBIP_DEBUG is not set +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y # # Platform Glue Layer @@ -2320,456 +4517,499 @@ CONFIG_USB_MUSB_HDRC=y # # MUSB DMA mode # +# CONFIG_MUSB_PIO_ONLY is not set CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y # # Platform Glue Driver Support # +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_DWC3_OF_SIMPLE=y CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set # # Gadget/Dual-role mode requires USB Gadget support to be enabled # +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_OF=y +CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_ULPI=y CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y # # USB port drivers # -CONFIG_USB_SERIAL=y -# CONFIG_USB_SERIAL_CONSOLE is not set -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_SIMPLE=m -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_F81232=m -CONFIG_USB_SERIAL_F8153X=m -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_METRO=m -CONFIG_USB_SERIAL_MOS7720=m -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MXUPORT=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -CONFIG_USB_SERIAL_QUALCOMM=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_SAFE=m -CONFIG_USB_SERIAL_SAFE_PADDED=y -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -CONFIG_USB_SERIAL_SYMBOL=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_XSENS_MT=m -CONFIG_USB_SERIAL_WISHBONE=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_QT2=m -CONFIG_USB_SERIAL_UPD78F0730=m -# CONFIG_USB_SERIAL_DEBUG is not set +# CONFIG_USB_SERIAL is not set # # USB Miscellaneous drivers # -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_SEVSEG=m -CONFIG_USB_RIO500=m -CONFIG_USB_LEGOTOWER=m -CONFIG_USB_LCD=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_APPLEDISPLAY=m -CONFIG_USB_SISUSBVGA=m -CONFIG_USB_SISUSBVGA_CON=y -CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m -CONFIG_USB_ISIGHTFW=m -CONFIG_USB_YUREX=m -CONFIG_USB_EZUSB_FX2=m +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set # # USB Physical Layer drivers # +CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + CONFIG_USB_GADGET=y -# CONFIG_U_SERIAL_CONSOLE is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # # USB Peripheral Controller # -# CONFIG_USB_SNP_UDC_PLAT is not set -# CONFIG_USB_BDC_UDC is not set -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_F_ACM=m -CONFIG_USB_F_SS_LB=m -CONFIG_USB_U_SERIAL=m -CONFIG_USB_U_ETHER=m -CONFIG_USB_U_AUDIO=m -CONFIG_USB_F_SERIAL=m -CONFIG_USB_F_OBEX=m -CONFIG_USB_F_NCM=m -CONFIG_USB_F_ECM=m -CONFIG_USB_F_PHONET=m -CONFIG_USB_F_EEM=m -CONFIG_USB_F_SUBSET=m -CONFIG_USB_F_RNDIS=m -CONFIG_USB_F_MASS_STORAGE=m -CONFIG_USB_F_FS=m -CONFIG_USB_F_UAC1=m -CONFIG_USB_F_UVC=m -CONFIG_USB_F_MIDI=m -CONFIG_USB_F_HID=m -CONFIG_USB_F_PRINTER=m -CONFIG_USB_CONFIGFS=m -CONFIG_USB_CONFIGFS_SERIAL=y -CONFIG_USB_CONFIGFS_ACM=y -CONFIG_USB_CONFIGFS_OBEX=y -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_ECM=y -CONFIG_USB_CONFIGFS_ECM_SUBSET=y -CONFIG_USB_CONFIGFS_RNDIS=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_PHONET=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -CONFIG_USB_CONFIGFS_F_LB_SS=y -CONFIG_USB_CONFIGFS_F_FS=y -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set -CONFIG_USB_ZERO=m -# CONFIG_USB_ZERO_HNPTEST is not set -CONFIG_USB_AUDIO=m -CONFIG_GADGET_UAC1=y -# CONFIG_GADGET_UAC1_LEGACY is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -CONFIG_USB_ETH_EEM=y -CONFIG_USB_G_NCM=m -CONFIG_USB_GADGETFS=m -CONFIG_USB_FUNCTIONFS=m -CONFIG_USB_FUNCTIONFS_ETH=y -CONFIG_USB_FUNCTIONFS_RNDIS=y -# CONFIG_USB_FUNCTIONFS_GENERIC is not set -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_MIDI_GADGET=m -CONFIG_USB_G_PRINTER=m -CONFIG_USB_CDC_COMPOSITE=m -CONFIG_USB_G_NOKIA=m -CONFIG_USB_G_ACM_MS=m -CONFIG_USB_G_MULTI=m -CONFIG_USB_G_MULTI_RNDIS=y -# CONFIG_USB_G_MULTI_CDC is not set -CONFIG_USB_G_HID=m -# CONFIG_USB_G_DBGP is not set -CONFIG_USB_G_WEBCAM=m -CONFIG_USB_ULPI_BUS=y +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +CONFIG_USB_BDC_PCI=y +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +# CONFIG_USB_CONFIGFS is not set +CONFIG_TYPEC=m +# CONFIG_TYPEC_TCPM is not set +# CONFIG_TYPEC_UCSI is not set +# CONFIG_TYPEC_TPS6598X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set # # MMC/SD/SDIO Host Controller Drivers # +# CONFIG_MMC_DEBUG is not set CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_ACPI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +CONFIG_MMC_SDHCI_IPROC=y CONFIG_MMC_MESON_GX=y +# CONFIG_MMC_MESON_MX_SDIO is not set +# CONFIG_MMC_TIFM_SD is not set CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set CONFIG_MMC_DW=y -# CONFIG_MMC_DW_EXYNOS is not set +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=y CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set CONFIG_LEDS_PWM=y # CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # +# CONFIG_LEDS_BLINKM is not set CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set # # LED Triggers # +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # # iptables trigger is under Netfilter config (LED target) # +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set CONFIG_EDAC_GHES=y +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y # # RTC interfaces # +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_MESON_VRTC=m CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers # +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set # # Platform RTC drivers # +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y # # on-CPU RTC drivers # +# CONFIG_RTC_DRV_PL030 is not set CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +CONFIG_RTC_DRV_SNVS=m +# CONFIG_RTC_DRV_R7301 is not set # # HID Sensor RTC drivers # CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set CONFIG_BCM_SBA_RAID=m +# CONFIG_DW_AXI_DMAC is not set +CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set +# CONFIG_INTEL_IDMA64 is not set CONFIG_MV_XOR_V2=y CONFIG_PL330_DMA=y -# CONFIG_QCOM_HIDMA_MGMT is not set -# CONFIG_QCOM_HIDMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set # # DMA Clients # +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y # # DMABUF options # +CONFIG_SYNC_FILE=y +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_SELFTESTS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set # # Microsoft Hyper-V guest support # +# end of Microsoft Hyper-V guest support # # Xen driver support # +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y CONFIG_XEN_GNTDEV=y CONFIG_XEN_GRANT_DEV_ALLOC=y -CONFIG_STAGING=y -# CONFIG_IRDA is not set -# CONFIG_IPX is not set -# CONFIG_NCP_FS is not set -CONFIG_PRISM2_USB=m -# CONFIG_COMEDI is not set -# CONFIG_RTL8192U is not set -# CONFIG_RTLLIB is not set -# CONFIG_RTL8723BS is not set -CONFIG_R8712U=m -CONFIG_R8188EU=m -CONFIG_88EU_AP_MODE=y -# CONFIG_R8822BE is not set -# CONFIG_RTS5208 is not set -# CONFIG_VT6655 is not set -# CONFIG_VT6656 is not set +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support -# -# IIO staging drivers -# - -# -# Accelerometers -# -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADIS16240 is not set - -# -# Analog to digital converters -# -# CONFIG_AD7606 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7280 is not set - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7152 is not set -# CONFIG_AD7746 is not set - -# -# Direct Digital Synthesis -# -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set - -# -# Digital gyroscope sensors -# -# CONFIG_ADIS16060 is not set - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set - -# -# Light sensors -# -# CONFIG_TSL2x7x is not set - -# -# Active energy metering IC -# -# CONFIG_ADE7753 is not set -# CONFIG_ADE7754 is not set -# CONFIG_ADE7758 is not set -# CONFIG_ADE7759 is not set -# CONFIG_ADE7854 is not set - -# -# Resolver to digital converters -# -# CONFIG_AD2S90 is not set -# CONFIG_AD2S1200 is not set -# CONFIG_AD2S1210 is not set - -# -# Triggers - standalone -# -# CONFIG_FB_SM750 is not set -# CONFIG_FB_XGI is not set - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_STAGING_MEDIA=y -# CONFIG_DVB_CXD2099 is not set - -# -# Android -# -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_MTD_SPINAND_MT29F is not set -# CONFIG_LNET is not set -# CONFIG_DGNC is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set -CONFIG_FB_TFT=m -CONFIG_FB_TFT_AGM1264K_FL=m -CONFIG_FB_TFT_BD663474=m -CONFIG_FB_TFT_HX8340BN=m -CONFIG_FB_TFT_HX8347D=m -CONFIG_FB_TFT_HX8353D=m -CONFIG_FB_TFT_HX8357D=m -CONFIG_FB_TFT_ILI9163=m -CONFIG_FB_TFT_ILI9320=m -CONFIG_FB_TFT_ILI9325=m -CONFIG_FB_TFT_ILI9340=m -CONFIG_FB_TFT_ILI9341=m -CONFIG_FB_TFT_ILI9481=m -CONFIG_FB_TFT_ILI9486=m -CONFIG_FB_TFT_PCD8544=m -CONFIG_FB_TFT_RA8875=m -CONFIG_FB_TFT_S6D02A1=m -CONFIG_FB_TFT_S6D1121=m -CONFIG_FB_TFT_SH1106=m -CONFIG_FB_TFT_SSD1289=m -CONFIG_FB_TFT_SSD1305=m -CONFIG_FB_TFT_SSD1306=m -CONFIG_FB_TFT_SSD1331=m -CONFIG_FB_TFT_SSD1351=m -CONFIG_FB_TFT_ST7735R=m -CONFIG_FB_TFT_ST7789V=m -CONFIG_FB_TFT_TINYLCD=m -CONFIG_FB_TFT_TLS8204=m -CONFIG_FB_TFT_UC1611=m -CONFIG_FB_TFT_UC1701=m -CONFIG_FB_TFT_UPD161704=m -CONFIG_FB_TFT_WATTEROTT=m -CONFIG_FB_FLEX=m -CONFIG_FB_TFT_FBTFT_DEVICE=m -# CONFIG_WILC1000_SDIO is not set -# CONFIG_WILC1000_SPI is not set -# CONFIG_MOST is not set -# CONFIG_KS7010 is not set # CONFIG_GREYBUS is not set -# CONFIG_CRYPTO_DEV_CCREE is not set - -# -# USB Power Delivery and Type-C drivers -# -# CONFIG_PI433 is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +CONFIG_MFD_CROS_EC=y +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_TBMC is not set +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +# CONFIG_CROS_EC_RPMSG is not set +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +# CONFIG_CROS_KBD_LED_BACKLIGHT is not set +CONFIG_CROS_EC_CHARDEV=y +CONFIG_CROS_EC_LIGHTBAR=y +CONFIG_CROS_EC_VBC=y +CONFIG_CROS_EC_SYSFS=y +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y # # Common Clock Framework @@ -2777,43 +5017,108 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m CONFIG_COMMON_CLK_VERSATILE=y CONFIG_CLK_SP810=y CONFIG_CLK_VEXPRESS_OSC=y +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set CONFIG_COMMON_CLK_RK808=y CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set CONFIG_COMMON_CLK_CS2000_CP=y CONFIG_COMMON_CLK_S2MPS11=y -# CONFIG_CLK_QORIQ is not set -# CONFIG_COMMON_CLK_XGENE is not set +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_BD718XX is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_IPROC=y +CONFIG_CLK_BCM_NS2=y +CONFIG_CLK_BCM_SR=y +CONFIG_COMMON_CLK_MESON_REGMAP=y +CONFIG_COMMON_CLK_MESON_DUALDIV=y +CONFIG_COMMON_CLK_MESON_MPLL=y +CONFIG_COMMON_CLK_MESON_PLL=y +CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y +CONFIG_COMMON_CLK_MESON_AO_CLKC=y +CONFIG_COMMON_CLK_MESON_EE_CLKC=y +CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_COMMON_CLK_AXG=y +# CONFIG_COMMON_CLK_AXG_AUDIO is not set +CONFIG_COMMON_CLK_G12A=y +# end of Common Clock Framework + CONFIG_HWSPINLOCK=y # # Clock Source drivers # +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y CONFIG_CLKSRC_MMIO=y -# CONFIG_HISILICON_ERRATUM_161010101 is not set -CONFIG_ARM_TIMER_SP804=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y CONFIG_CLKSRC_VERSATILE=y +# end of Clock Source drivers + CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set +CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set # CONFIG_MAILBOX_TEST is not set +# CONFIG_BCM_PDC_MBOX is not set +CONFIG_BCM_FLEXRM_MBOX=m +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_V3=y +# CONFIG_VIRTIO_IOMMU is not set # # Remoteproc drivers # +CONFIG_REMOTEPROC=y +# end of Remoteproc drivers # # Rpmsg drivers # -# CONFIG_RPMSG_QCOM_GLINK_RPM is not set +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set # # SOC (System On Chip) specific Drivers @@ -2822,82 +5127,270 @@ CONFIG_ARM_SMMU_V3=y # # Amlogic SoC drivers # +CONFIG_MESON_CANVAS=m +CONFIG_MESON_CLK_MEASURE=y +CONFIG_MESON_GX_SOCINFO=y +CONFIG_MESON_GX_PM_DOMAINS=y +CONFIG_MESON_EE_PM_DOMAINS=y +CONFIG_MESON_MX_SOCINFO=y +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set +CONFIG_SOC_BRCMSTB=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers # # i.MX SoC drivers # +# end of i.MX SoC drivers # # Qualcomm SoC drivers # -# CONFIG_SUNXI_SRAM is not set +# end of Qualcomm SoC drivers + +CONFIG_SOC_TI=y # # Xilinx SoC drivers # +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set # CONFIG_DEVFREQ_GOV_PASSIVE is not set # # DEVFREQ Drivers # # CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y # # Extcon Device Drivers # +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set # # Accelerometers # +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers # # Analog to digital converters # +# CONFIG_AD7124 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_BCM_IPROC_ADC is not set # CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +CONFIG_MESON_SARADC=y +# CONFIG_NAU7802 is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_QCOM_SPMI_ADC5 is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends # # Amplifiers # +# CONFIG_AD8366 is not set +# end of Amplifiers # # Chemical Sensors # +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set # # Hid Sensor IIO Common # +# end of Hid Sensor IIO Common # # SSP Sensor Common # - -# -# Counters -# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common # # Digital to analog converters # +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters # # IIO dummy driver # +# end of IIO dummy driver # # Frequency Synthesizers DDS/PLL @@ -2906,14 +5399,31 @@ CONFIG_IIO=y # # Clock Generator/Distribution # +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors # # Health Sensors @@ -2922,240 +5432,934 @@ CONFIG_IIO=y # # Heart Rate Monitors # +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors # # Humidity sensors # +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors # # Inertial measurement units # +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units # # Light sensors # +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=m +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors # # Magnetometer sensors # +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors # # Multiplexers # +# CONFIG_IIO_MUX is not set +# end of Multiplexers # # Inclinometer sensors # +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone # # Digital potentiometers # +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers # # Digital potentiostats # +# CONFIG_LMP91000 is not set +# end of Digital potentiostats # # Pressure sensors # +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +CONFIG_MPL3115=m +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors # # Lightning sensors # +# CONFIG_AS3935 is not set +# end of Lightning sensors # # Proximity and distance sensors # +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters # # Temperature sensors # +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_BCM_IPROC=y CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set CONFIG_PWM_MESON=y +# CONFIG_PWM_PCA9685 is not set # # IRQ chip support # -# CONFIG_RESET_BERLIN is not set -# CONFIG_RESET_SIMPLE is not set -# CONFIG_RESET_SUNXI is not set -# CONFIG_RESET_TEGRA_BPMP is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +CONFIG_MESON_IRQ_GPIO=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_MESON=y +# CONFIG_RESET_MESON_AUDIO_ARB is not set +# CONFIG_RESET_TI_SYSCON is not set # # PHY Subsystem # -# CONFIG_PHY_XGENE is not set -# CONFIG_PHY_QCOM_USB_HS is not set -# CONFIG_PHY_SAMSUNG_USB2 is not set +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_GXL_USB2=y +CONFIG_PHY_MESON_GXL_USB3=y +CONFIG_PHY_MESON_G12A_USB2=y +CONFIG_PHY_MESON_G12A_USB3_PCIE=y +CONFIG_PHY_BCM_SR_USB=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_BCM_NS_USB2 is not set +# CONFIG_PHY_BCM_NS_USB3 is not set +CONFIG_PHY_NS2_PCIE=y +CONFIG_PHY_NS2_USB_DRD=y +CONFIG_PHY_BRCM_SATA=y +CONFIG_PHY_BCM_SR_PCIE=y +# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set # # Performance monitor support # +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +# CONFIG_ARM_SMMU_V3_PMU is not set +# CONFIG_ARM_DSU_PMU is not set +CONFIG_HISI_PMU=y +# CONFIG_ARM_SPE_PMU is not set +# end of Performance monitor support + CONFIG_RAS=y # # Android # -CONFIG_DAX=m -# CONFIG_DEV_DAX is not set +# CONFIG_ANDROID is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set CONFIG_NVMEM=y -CONFIG_MESON_EFUSE=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_BCM_OCOTP=y +# CONFIG_MESON_EFUSE is not set +# CONFIG_MESON_MX_EFUSE is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set CONFIG_TEE=y # # TEE drivers # CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers -# -# Firmware Drivers -# -CONFIG_ARM_SCPI_PROTOCOL=y - -# -# EFI (Extensible Firmware Interface) Support -# -CONFIG_EFI_CAPSULE_LOADER=y - -# -# Tegra firmware driver -# -CONFIG_ACPI=y -CONFIG_ACPI_APEI=y -CONFIG_ACPI_APEI_GHES=y -CONFIG_ACPI_APEI_MEMORY_FAILURE=y -CONFIG_ACPI_APEI_EINJ=y +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# end of Device Drivers # # File systems # +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -# CONFIG_XFS_RT is not set -# CONFIG_XFS_ONLINE_SCRUB is not set -# CONFIG_XFS_WARN is not set -# CONFIG_XFS_DEBUG is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -CONFIG_F2FS_FS=m -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -# CONFIG_F2FS_FS_POSIX_ACL is not set -# CONFIG_F2FS_FS_SECURITY is not set -# CONFIG_F2FS_CHECK_FS is not set -# CONFIG_F2FS_FS_ENCRYPTION is not set -# CONFIG_F2FS_IO_TRACE is not set -# CONFIG_F2FS_FAULT_INJECTION is not set +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y -CONFIG_QUOTA_TREE=y -CONFIG_QFMT_V2=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set # # Caches # -CONFIG_FSCACHE=m -# CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_HISTOGRAM is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -# CONFIG_CACHEFILES is not set +# CONFIG_FSCACHE is not set +# end of Caches # # CD-ROM/DVD Filesystems # -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems # # DOS/FAT/NT Filesystems # -CONFIG_MSDOS_FS=y +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set +# end of DOS/FAT/NT Filesystems # # Pseudo filesystems # -CONFIG_PROC_KCORE=y +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y -CONFIG_ECRYPT_FS=m -CONFIG_ECRYPT_FS_MESSAGING=y -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -# CONFIG_HFSPLUS_FS_POSIX_ACL is not set -CONFIG_CRAMFS=y -CONFIG_CRAMFS_BLOCKDEV=y -# CONFIG_CRAMFS_MTD is not set +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -# CONFIG_PSTORE_FTRACE is not set +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -# CONFIG_NFSD_BLOCKLAYOUT is not set -# CONFIG_NFSD_SCSILAYOUT is not set -# CONFIG_NFSD_FLEXFILELAYOUT is not set -# CONFIG_NFSD_V4_SECURITY_LABEL is not set -# CONFIG_NFSD_FAULT_INJECTION is not set -CONFIG_NFS_ACL_SUPPORT=m -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_UPCALL is not set -CONFIG_CIFS_XATTR=y -# CONFIG_CIFS_POSIX is not set -# CONFIG_CIFS_ACL is not set -CONFIG_CIFS_DEBUG=y -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set -CONFIG_CIFS_DFS_UPCALL=y -# CONFIG_CIFS_SMB311 is not set -# CONFIG_CIFS_FSCACHE is not set +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=y -CONFIG_VIRTUALIZATION=y -CONFIG_KVM=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=m +CONFIG_CRYPTO_ECDH=m +# CONFIG_CRYPTO_ECRDSA is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_LIB_ARC4=m +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_LIB_DES=m +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_CHACHA20=m +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +CONFIG_CRYPTO_DEV_BCM_SPU=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_HISI_ZIP is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_INDIRECT_PIO=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=m +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y +CONFIG_SWIOTLB=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines # # Kernel hacking @@ -3165,160 +6369,137 @@ CONFIG_KVM=y # printk and dmesg options # CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# end of printk and dmesg options # # Compile-time checks and compiler options # -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_FS=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_INSTALL is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# end of Compile-time checks and compiler options + CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +# CONFIG_DEBUG_KERNEL is not set # # Memory Debugging # -# CONFIG_DEBUG_PAGE_REF is not set +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_CC_HAS_KASAN_GENERIC=y +# CONFIG_KASAN is not set +CONFIG_KASAN_STACK=1 +# end of Memory Debugging + +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set # # Debug Lockups and Hangs # -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHEDSTATS=y -# CONFIG_DEBUG_PREEMPT is not set +# end of Debug Lockups and Hangs + +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_INFO=y +# CONFIG_DEBUG_TIMEKEEPING is not set # # Lock Debugging (spinlocks, mutexes, etc...) # -CONFIG_STACKTRACE=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y # # RCU Debugging # -CONFIG_NOP_TRACER=y -CONFIG_TRACE_CLOCK=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_TRACING=y -CONFIG_GENERIC_TRACER=y -CONFIG_FTRACE=y -CONFIG_FUNCTION_TRACER=y -CONFIG_FUNCTION_GRAPH_TRACER=y -# CONFIG_PREEMPTIRQ_EVENTS is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_HWLAT_TRACER is not set -CONFIG_FTRACE_SYSCALLS=y -# CONFIG_TRACER_SNAPSHOT is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -CONFIG_STACK_TRACER=y -# CONFIG_BLK_DEV_IO_TRACE is not set -CONFIG_UPROBE_EVENTS=y -CONFIG_PROBE_EVENTS=y -CONFIG_DYNAMIC_FTRACE=y -CONFIG_FUNCTION_PROFILER=y -CONFIG_FTRACE_MCOUNT_RECORD=y -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_HIST_TRIGGERS is not set -# CONFIG_TRACEPOINT_BENCHMARK is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set -# CONFIG_TRACE_EVAL_MAP_FILE is not set -CONFIG_TRACING_EVENTS_GPIO=y -# CONFIG_ASYNC_RAID6_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# end of RCU Debugging + +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_BITFIELD is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set CONFIG_MEMTEST=y -CONFIG_KGDB=y -CONFIG_KGDB_SERIAL_CONSOLE=y -CONFIG_KGDB_TESTS=y -# CONFIG_KGDB_TESTS_ON_BOOT is not set -# CONFIG_KGDB_KDB is not set - -# -# Security options -# -# CONFIG_BIG_KEYS is not set -CONFIG_SECURITY=y -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m - -# -# Crypto core or helper -# -CONFIG_CRYPTO_AUTHENC=y - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTS=m - -# -# Hash modes -# - -# -# Digest -# -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA512=m - -# -# Ciphers -# -CONFIG_CRYPTO_DES=y - -# -# Compression -# -CONFIG_CRYPTO_DEFLATE=m - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=y - -# -# Certificates for signature checking -# -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m -CONFIG_CRYPTO_CRC32_ARM64_CE=m -CONFIG_CRYPTO_AES_ARM64=y -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_CRYPTO_AES_ARM64_BS=m -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_CRC_CCITT=m -CONFIG_CRC_T10DIF=y -CONFIG_CRC_ITU_T=y -CONFIG_CRC7=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_UBSAN_ALIGNMENT=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of Kernel hacking diff --git a/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush b/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush index 9f00e3b5c..0135a0744 100644 --- a/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush +++ b/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.ush @@ -24,7 +24,7 @@ fi # Board bootargs if test "${m}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi -setenv bootargs_odroidc2 "${condev} no_console_suspend hdmimode=${m} ${cmode} m_bpp=${m_bpp} vout=${vout} fsck.repair=yes net.ifnames=0 elevator=noop disablehpd=${hpd} max_freq=${max_freq} maxcpus=${maxcpus} monitor_onoff=${monitor_onoff} disableuhs=${disableuhs} mmc_removable=${mmc_removable} usbmulticam=${usbmulticam}" +setenv bootargs_odroidc2 "no_console_suspend hdmimode=${m} ${cmode} m_bpp=${m_bpp} vout=${vout} net.ifnames=0 elevator=noop disablehpd=${hpd} max_freq=${max_freq} maxcpus=${maxcpus} monitor_onoff=${monitor_onoff} disableuhs=${disableuhs} mmc_removable=${mmc_removable} usbmulticam=${usbmulticam}" # HassOS bootargs setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory" diff --git a/buildroot-external/board/hardkernel/odroid-n2/boot-env.txt b/buildroot-external/board/hardkernel/odroid-n2/boot-env.txt new file mode 100644 index 000000000..476e9cd34 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/boot-env.txt @@ -0,0 +1,84 @@ + + +# Custom modeline! +# To use custom modeline you need to disable all the below resolutions +# and setup your own! +# For more information check our wiki: +# https://wiki.odroid.com/odroid-n2/application_note/software/set_display_mode + +# HDMI Mode +# Resolution Configuration +# Symbol | Resolution +# ----------------------+------------- +# "480x320p60hz" | 480x320 Progressive 60Hz +# "480p60hz" | 720x480 Progressive 60Hz +# "576p50hz" | 720x576 Progressive 50Hz +# "720p60hz" | 1280x720 Progressive 60Hz +# "720p50hz" | 1280x720 Progressive 50Hz +# "1080p60hz" | 1920x1080 Progressive 60Hz +# "1080p50hz" | 1920x1080 Progressive 50Hz +# "1080p30hz" | 1920x1080 Progressive 30Hz +# "1080p24hz" | 1920x1080 Progressive 24Hz +# "1080i60hz" | 1920x1080 Interlaced 60Hz +# "1080i50hz" | 1920x1080 Interlaced 50Hz +# "2160p60hz" | 3840x2160 Progressive 60Hz +# "2160p50hz" | 3840x2160 Progressive 50Hz +# "2160p30hz" | 3840x2160 Progressive 30Hz +# "2160p25hz" | 3840x2160 Progressive 25Hz +# "2160p24hz" | 3840x2160 Progressive 24Hz +# "smpte24hz" | 3840x2160 Progressive 24Hz SMPTE +# "2160p60hz420" | 3840x2160 Progressive 60Hz YCbCr 4:2:0 +# "2160p50hz420" | 3840x2160 Progressive 50Hz YCbCr 4:2:0 +# "640x480p60hz" | 640x480 Progressive 60Hz +# "800x480p60hz" | 800x480 Progressive 60Hz +# "800x600p60hz" | 800x600 Progressive 60Hz +# "1024x600p60hz" | 1024x600 Progressive 60Hz +# "1024x768p60hz" | 1024x768 Progressive 60Hz +# "1280x800p60hz" | 1280x800 Progressive 60Hz +# "1280x1024p60hz" | 1280x1024 Progressive 60Hz +# "1360x768p60hz" | 1360x768 Progressive 60Hz +# "1440x900p60hz" | 1440x900 Progressive 60Hz +# "1600x900p60hz" | 1600x900 Progressive 60Hz +# "1600x1200p60hz" | 1600x1200 Progressive 60Hz +# "1680x1050p60hz" | 1680x1050 Progressive 60Hz +# "1920x1200p60hz" | 1920x1200 Progressive 60Hz +# "2560x1080p60hz" | 2560x1080 Progressive 60Hz +# "2560x1440p60hz" | 2560x1440 Progressive 60Hz +# "2560x1600p60hz" | 2560x1600 Progressive 60Hz +# "3440x1440p60hz" | 3440x1440 Progressive 60Hz +hdmimode=1080p60hz + +# Overscan percentage +# This value scales down the actual screen size by the percentage below +# valid range is 80 to 100 +overscan=100 + +### voutmode : hdmi or dvi +#voutmode=dvi +voutmode=hdmi + +# HPD enable/disable option +disablehpd="false" + +# max cpu frequency for big core, A73 in MHz unit +# 1.8 GHz, default value +#max_freq_a73=2004 # 2.004 GHz +#max_freq_a73=1908 # 1.908 GHz +#max_freq_a73=1704 # 1.704 GHz +max_freq_a73=1800 + +# max cpu frequency for little core, A53 in MHz unit +# 1.896 GHz, default value +#max_freq_a53=1992 # 1.992 GHz +#max_freq_a53=1704 # 1.704 GHz +max_freq_a53=1896 + + +# max cpu-cores +# Note: +# CPU's 0 and 1 are the A53 (small cores) +# CPU's 2 to 5 are the A73 (big cores) +# Lowering this value disables only the bigger cores (the last cores). +#maxcpus=4 +#maxcpus=5 +maxcpus=6 diff --git a/buildroot-external/board/hardkernel/odroid-n2/hassos-hook.sh b/buildroot-external/board/hardkernel/odroid-n2/hassos-hook.sh new file mode 100755 index 000000000..49347ae70 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/hassos-hook.sh @@ -0,0 +1,25 @@ +#!/bin/bash +# shellcheck disable=SC2155 + +function hassos_pre_image() { + local BOOT_DATA="$(path_boot_dir)" + local UBOOT_G12B="${BINARIES_DIR}/u-boot.g12b" + local SPL_IMG="$(path_spl_img)" + + cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr" + cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/config.txt" + cp "${BINARIES_DIR}/meson-g12b-odroid-n2.dtb" "${BOOT_DATA}/meson-g12b-odroid-n2.dtb" + + echo "console=tty0 console=ttyAML0,115200n8" > "${BOOT_DATA}/cmdline.txt" + + # SPL + create_spl_image + + dd if="${UBOOT_G12B}" of="${SPL_IMG}" conv=notrunc bs=512 seek=1 +} + + +function hassos_post_image() { + convert_disk_image_gz +} + diff --git a/buildroot-external/board/hardkernel/odroid-n2/kernel.config b/buildroot-external/board/hardkernel/odroid-n2/kernel.config new file mode 100644 index 000000000..48787dff0 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/kernel.config @@ -0,0 +1,6505 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.4.0 Kernel Configuration +# + +# +# Compiler: gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=70400 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +# CONFIG_COMPILE_TEST is not set +# CONFIG_HEADER_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y + +# +# RCU Subsystem +# +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# CONFIG_UCLAMP_TASK is not set +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_FHANDLE=y +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_IO_URING=y +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_RSEQ=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +CONFIG_SYSTEM_DATA_VERIFICATION=y +CONFIG_PROFILING=y +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +CONFIG_ARCH_BCM_IPROC=y +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +CONFIG_ARCH_MESON=y +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1024718=y +CONFIG_ARM64_ERRATUM_1418040=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1463225=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23144=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y +CONFIG_HISILICON_ERRATUM_161600802=y +CONFIG_QCOM_FALKOR_ERRATUM_E1041=y +CONFIG_FUJITSU_ERRATUM_010001=y +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=256 +CONFIG_HOTPLUG_CPU=y +CONFIG_NUMA=y +CONFIG_NODES_SHIFT=2 +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SECCOMP=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +# CONFIG_KEXEC_FILE is not set +CONFIG_CRASH_DUMP=y +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDEN_EL2_VECTORS=y +CONFIG_ARM64_SSBD=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_COMPAT=y +CONFIG_KUSER_HELPERS=y +# CONFIG_ARMV8_DEPRECATED is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_RAS_EXTN=y +CONFIG_ARM64_CNP=y +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +CONFIG_ARM64_PTR_AUTH=y +# end of ARMv8.3 architectural features + +CONFIG_ARM64_SVE=y +CONFIG_ARM64_MODULE_PLTS=y +# CONFIG_ARM64_PSEUDO_NMI is not set +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +# end of Kernel Features + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y +# end of Boot options + +CONFIG_SYSVIPC_COMPAT=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +# CONFIG_ENERGY_MODEL is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +# end of ARM CPU Idle Drivers +# end of CPU Idle + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_ARM_SCPI_CPUFREQ=y +# CONFIG_QORIQ_CPUFREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_ARM_SDE_INTERFACE is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_ISCSI_IBFT is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_ARMSTUB=y +CONFIG_EFI_ARMSTUB_DTB_LOADER=y +CONFIG_EFI_CAPSULE_LOADER=y +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_ARM=y +CONFIG_EFI_EARLYCON=y +CONFIG_MESON_SM=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_ARCH_SUPPORTS_ACPI=y +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_TAD is not set +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_CPPC_LIB=y +CONFIG_ACPI_PROCESSOR=y +# CONFIG_ACPI_IPMI is not set +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_NUMA=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_HED=y +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +# CONFIG_ACPI_HMAT is not set +CONFIG_HAVE_ACPI_APEI=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_GHES=y +CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_SEA=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +# CONFIG_ACPI_APEI_ERST_DEBUG is not set +# CONFIG_PMIC_OPREGION is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y +CONFIG_ACPI_PPTT=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_KVM_ARM_HOST=y +CONFIG_KVM_ARM_PMU=y +CONFIG_KVM_INDIRECT_VECTORS=y +# CONFIG_VHOST_NET is not set +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRYPTO_CHACHA20_NEON=m +# CONFIG_CRYPTO_NHPOLY1305_NEON is not set +CONFIG_CRYPTO_AES_ARM64_BS=m + +# +# General architecture-dependent options +# +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_64BIT_TIME=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_REFCOUNT_FULL=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +CONFIG_ARCH_HAS_RELR=y + +# +# GCOV-based kernel profiling +# +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_PLUGIN_HOSTCC="" +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +# CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=m + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_FAMILY_BRIDGE=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_TPROXY_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_TPROXY_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=m +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_STP=m +CONFIG_GARP=m +CONFIG_MRP=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_IGMP_SNOOPING=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_BT=m +CONFIG_BT_BREDR=y +# CONFIG_BT_RFCOMM is not set +# CONFIG_BT_BNEP is not set +CONFIG_BT_HIDP=m +# CONFIG_BT_HS is not set +# CONFIG_BT_LE is not set +CONFIG_BT_LEDS=y + +# +# Bluetooth device drivers +# +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_RTL=m +CONFIG_BT_HCIBTUSB=m +# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIBTUSB_MTK is not set +CONFIG_BT_HCIBTUSB_RTL=y +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_SERDEV=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_NOKIA is not set +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_ATH3K is not set +CONFIG_BT_HCIUART_LL=y +# CONFIG_BT_HCIUART_3WIRE is not set +# CONFIG_BT_HCIUART_INTEL is not set +CONFIG_BT_HCIUART_BCM=y +# CONFIG_BT_HCIUART_RTL is not set +# CONFIG_BT_HCIUART_QCA is not set +# CONFIG_BT_HCIUART_AG6XX is not set +# CONFIG_BT_HCIUART_MRVL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_ATH3K is not set +# CONFIG_BT_MTKSDIO is not set +# CONFIG_BT_MTKUART is not set +# end of Bluetooth device drivers + +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +# CONFIG_NET_9P_XEN is not set +# CONFIG_NET_9P_DEBUG is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +CONFIG_NET_DEVLINK=y +CONFIG_PAGE_POOL=y +CONFIG_FAILOVER=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_HOTPLUG_PCI_PCIE is not set +CONFIG_PCIEAER=y +# CONFIG_PCIEAER_INJECT is not set +# CONFIG_PCIE_ECRC is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +# CONFIG_PCIE_BW is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_PF_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# PCI controller drivers +# + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_HOST is not set +# end of Cadence PCIe controllers support + +# CONFIG_PCI_FTPCI100 is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +# CONFIG_PCIE_XILINX is not set +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +CONFIG_PCIE_IPROC=y +CONFIG_PCIE_IPROC_PLATFORM=y +CONFIG_PCIE_IPROC_MSI=y +CONFIG_PCIE_ALTERA=y +CONFIG_PCIE_ALTERA_MSI=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_HOST_THUNDER_ECAM=y + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +CONFIG_PCI_HISI=y +CONFIG_PCIE_KIRIN=y +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_ALLOW_DEV_COREDUMP=y +CONFIG_DEV_COREDUMP=y +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +CONFIG_BRCMSTB_GISB_ARB=y +# CONFIG_MOXTET is not set +CONFIG_SIMPLE_PM_BUS=y +CONFIG_VEXPRESS_CONFIG=y +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +CONFIG_MTD_NAND_CORE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set +CONFIG_MTD_RAW_NAND=y +# CONFIG_MTD_NAND_ECC_SW_BCH is not set + +# +# Raw/parallel NAND flash controllers +# +CONFIG_MTD_NAND_DENALI=y +# CONFIG_MTD_NAND_DENALI_PCI is not set +CONFIG_MTD_NAND_DENALI_DT=y +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_NAND_MXIC is not set +# CONFIG_MTD_NAND_MESON is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_PLATFORM is not set + +# +# Misc +# +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_RICOH is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_MTK_QUADSPI is not set +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_NUMA=y +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +CONFIG_NVME_CORE=m +CONFIG_BLK_DEV_NVME=m +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TCP is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_VEXPRESS_SYSCFG=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC & related support +# + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# +# CONFIG_VOP_BUS is not set + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# end of Intel MIC & related support + +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +CONFIG_SCSI_HISI_SAS=y +CONFIG_SCSI_HISI_SAS_PCI=y +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +CONFIG_SCSI_MPT3SAS=m +CONFIG_SCSI_MPT2SAS_MAX_SGE=128 +CONFIG_SCSI_MPT3SAS_MAX_SGE=128 +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_MYRB is not set +# CONFIG_SCSI_MYRS is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FDOMAIN_PCI is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_ATA_ACPI=y +# CONFIG_SATA_ZPODD is not set +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI=y +CONFIG_SATA_MOBILE_LPM_POLICY=0 +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_AHCI_CEVA=y +CONFIG_AHCI_XGENE=y +CONFIG_AHCI_QORIQ=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_ATA_SFF=y + +# +# SFF controllers with custom DMA interface +# +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set +CONFIG_ATA_BMDMA=y + +# +# SATA SFF controllers with BMDMA +# +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_DWC is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set + +# +# PATA SFF controllers with BMDMA +# +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# PIO-only SFF controllers +# +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_PLATFORM=y +CONFIG_PATA_OF_PLATFORM=y +# CONFIG_PATA_RZ1000 is not set + +# +# Generic fallback / legacy drivers +# +# CONFIG_PATA_ACPI is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +CONFIG_DM_MIRROR=m +# CONFIG_DM_LOG_USERSPACE is not set +# CONFIG_DM_RAID is not set +CONFIG_DM_ZERO=m +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +# CONFIG_IPVLAN is not set +CONFIG_VXLAN=m +# CONFIG_GENEVE is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +CONFIG_TAP=m +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=m +CONFIG_VIRTIO_NET=y +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +CONFIG_MDIO=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_AGERE=y +# CONFIG_ET131X is not set +CONFIG_NET_VENDOR_ALACRITECH=y +# CONFIG_SLICOSS is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +# CONFIG_ALTERA_TSE is not set +CONFIG_NET_VENDOR_AMAZON=y +# CONFIG_ENA_ETHERNET is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_AMD_XGBE=y +CONFIG_NET_VENDOR_AQUANTIA=y +# CONFIG_AQTION is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +CONFIG_ATL1C=m +# CONFIG_ALX is not set +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_BNX2 is not set +# CONFIG_CNIC is not set +# CONFIG_TIGON3 is not set +CONFIG_BNX2X=m +CONFIG_BNX2X_SRIOV=y +CONFIG_BGMAC=y +CONFIG_BGMAC_PLATFORM=y +# CONFIG_SYSTEMPORT is not set +# CONFIG_BNXT is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set +CONFIG_NET_VENDOR_CADENCE=y +CONFIG_MACB=y +CONFIG_MACB_USE_HWSTAMP=y +# CONFIG_MACB_PCI is not set +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_THUNDER_NIC_PF=y +# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_RGX=y +# CONFIG_CAVIUM_PTP is not set +# CONFIG_LIQUIDIO is not set +# CONFIG_LIQUIDIO_VF is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set +# CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_GOOGLE=y +# CONFIG_GVE is not set +CONFIG_NET_VENDOR_HISILICON=y +CONFIG_HIX5HD2_GMAC=y +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +CONFIG_HNS_MDIO=y +CONFIG_HNS=y +CONFIG_HNS_DSAF=y +CONFIG_HNS_ENET=y +CONFIG_HNS3=y +CONFIG_HNS3_HCLGE=y +# CONFIG_HNS3_HCLGEVF is not set +CONFIG_HNS3_ENET=y +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set +CONFIG_NET_VENDOR_HUAWEI=y +# CONFIG_HINIC is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +# CONFIG_E100 is not set +# CONFIG_E1000 is not set +CONFIG_E1000E=y +CONFIG_IGB=y +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=y +# CONFIG_IXGB is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGBEVF is not set +# CONFIG_I40E is not set +# CONFIG_I40EVF is not set +# CONFIG_ICE is not set +# CONFIG_FM10K is not set +# CONFIG_IGC is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_SKGE is not set +CONFIG_SKY2=y +# CONFIG_OCTEONTX2_AF is not set +CONFIG_NET_VENDOR_MELLANOX=y +CONFIG_MLX4_EN=m +CONFIG_MLX4_CORE=m +CONFIG_MLX4_DEBUG=y +CONFIG_MLX4_CORE_GEN2=y +CONFIG_MLX5_CORE=m +# CONFIG_MLX5_FPGA is not set +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_EN_ARFS=y +CONFIG_MLX5_EN_RXNFC=y +CONFIG_MLX5_MPFS=y +# CONFIG_MLX5_CORE_IPOIB is not set +# CONFIG_MLXSW_CORE is not set +CONFIG_MLXFW=m +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_KSZ884X_PCI is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_LAN743X is not set +CONFIG_NET_VENDOR_MICROSEMI=y +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set +CONFIG_NET_VENDOR_NATSEMI=y +# CONFIG_NATSEMI is not set +# CONFIG_NS83820 is not set +CONFIG_NET_VENDOR_NETERION=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set +CONFIG_NET_VENDOR_NETRONOME=y +# CONFIG_NFP is not set +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_NE2K_PCI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_ETHOC is not set +CONFIG_NET_VENDOR_PACKET_ENGINES=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_PENSANDO=y +# CONFIG_IONIC is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_QED is not set +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCA7000_UART is not set +CONFIG_QCOM_EMAC=m +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R8169 is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set +CONFIG_NET_VENDOR_SEEQ=y +CONFIG_NET_VENDOR_SOLARFLARE=y +# CONFIG_SFC is not set +# CONFIG_SFC_FALCON is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +CONFIG_NET_VENDOR_SMSC=y +CONFIG_SMC91X=y +# CONFIG_EPIC100 is not set +CONFIG_SMSC911X=y +# CONFIG_SMSC9420 is not set +CONFIG_NET_VENDOR_SOCIONEXT=y +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=m +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_PLATFORM=m +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=m +CONFIG_DWMAC_MESON=m +# CONFIG_STMMAC_PCI is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TI_CPSW_PHY_SEL is not set +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set +CONFIG_NET_VENDOR_WIZNET=y +# CONFIG_WIZNET_W5100 is not set +# CONFIG_WIZNET_W5300 is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_IPROC is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM_IPROC=y +# CONFIG_MDIO_BUS_MUX_GPIO is not set +CONFIG_MDIO_BUS_MUX_MESON_G12A=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +CONFIG_MDIO_CAVIUM=y +# CONFIG_MDIO_GPIO is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +CONFIG_MDIO_THUNDER=y +CONFIG_PHYLINK=m +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +# CONFIG_SFP is not set +# CONFIG_ADIN_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +CONFIG_AT803X_PHY=m +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +# CONFIG_MESON_GXL_PHY is not set +CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_RENESAS_PHY is not set +CONFIG_ROCKCHIP_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_CDCETHER=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=m +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +CONFIG_USB_NET_DM9601=m +# CONFIG_USB_NET_SR9700 is not set +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=m +CONFIG_USB_NET_CDC_SUBSET=m +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=m +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_ATH_COMMON=m +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +# CONFIG_ATH10K_DEBUG is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +CONFIG_MWIFIEX=m +# CONFIG_MWIFIEX_SDIO is not set +CONFIG_MWIFIEX_PCIE=m +# CONFIG_MWIFIEX_USB is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +# CONFIG_MT76x0U is not set +# CONFIG_MT76x0E is not set +# CONFIG_MT76x2E is not set +# CONFIG_MT76x2U is not set +# CONFIG_MT7603E is not set +# CONFIG_MT7615E is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +# CONFIG_RTW88 is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_XEN_NETDEV_FRONTEND=y +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +CONFIG_NET_FAILOVER=y +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_MATRIXKMAP=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ADC=m +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_CROS_EC=y +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set +# CONFIG_TOUCHSCREEN_AR1021_I2C is not set +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set +# CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set +# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set +# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set +# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set +# CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_IPROC is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set +# CONFIG_TOUCHSCREEN_MAX11801 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MMS114 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set +# CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_TSC2005 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set +# CONFIG_TOUCHSCREEN_ST1232 is not set +# CONFIG_TOUCHSCREEN_STMFTS is not set +# CONFIG_TOUCHSCREEN_SUR40 is not set +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +# CONFIG_TOUCHSCREEN_TPS6507X is not set +# CONFIG_TOUCHSCREEN_ZET6223 is not set +# CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MSM_VIBRATOR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_AXP20X_PEK is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_NULL_TTY is not set +CONFIG_LDISC_AUTOLOAD=y +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DMI_DECODE=y +CONFIG_IPMI_PLAT_DATA=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SI=m +# CONFIG_IPMI_SSIF is not set +# CONFIG_IPMI_WATCHDOG is not set +# CONFIG_IPMI_POWEROFF is not set +# CONFIG_IPMB_DEVICE_INTERFACE is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_IPROC_RNG200=m +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_MESON=y +CONFIG_HW_RANDOM_CAVIUM=m +CONFIG_HW_RANDOM_OPTEE=m +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y +# CONFIG_TCG_TIS is not set +# CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C_ATMEL is not set +CONFIG_TCG_TIS_I2C_INFINEON=y +# CONFIG_TCG_TIS_I2C_NUVOTON is not set +# CONFIG_TCG_ATMEL is not set +# CONFIG_TCG_INFINEON is not set +# CONFIG_TCG_XEN is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_VTPM_PROXY is not set +# CONFIG_TCG_FTPM_TEE is not set +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set +# CONFIG_TCG_TIS_ST33ZP24_SPI is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_AMD_MP2 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_BCM_IPROC=y +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +# CONFIG_I2C_MESON is not set +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +CONFIG_I2C_CROS_EC_TUNNEL=y +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +CONFIG_SPI_BCM_QSPI=y +CONFIG_SPI_BITBANG=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +CONFIG_SPI_NXP_FLEXSPI=y +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_MESON_SPICC is not set +# CONFIG_SPI_MESON_SPIFC is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PL022=y +# CONFIG_SPI_PXA2XX is not set +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_DTE=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_IPROC_GPIO=y +CONFIG_PINCTRL_NS2_MUX=y +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_PINCTRL_MESON8_PMX=y +CONFIG_PINCTRL_MESON_AXG=y +CONFIG_PINCTRL_MESON_AXG_PMX=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_GPIO_SYSFS is not set +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +# CONFIG_GPIO_CADENCE is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +CONFIG_GPIO_MB86S7X=y +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +CONFIG_GPIO_MAX732X=y +# CONFIG_GPIO_MAX732X_IRQ is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# CONFIG_GPIO_BD9571MWV is not set +CONFIG_GPIO_MAX77620=y +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set +CONFIG_POWER_AVS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_BRCMSTB=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_VEXPRESS=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +CONFIG_POWER_SUPPLY_HWMON=y +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +CONFIG_BATTERY_SBS=m +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_AXP20X_POWER is not set +# CONFIG_AXP288_FUEL_GAUGE is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_ISP1704 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +# CONFIG_CHARGER_CROS_USBPD is not set +# CONFIG_CHARGER_UCS1002 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IBMAEM is not set +# CONFIG_SENSORS_IBMPEX is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +CONFIG_SENSORS_PWM_FAN=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_XGENE is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set +# CONFIG_MAX77620_THERMAL is not set +CONFIG_QORIQ_THERMAL=m + +# +# Broadcom thermal drivers +# +CONFIG_BCM_NS_THERMAL=y +CONFIG_BCM_SR_THERMAL=y +# end of Broadcom thermal drivers + +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +CONFIG_ARM_SP805_WATCHDOG=y +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_DW_WATCHDOG=y +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_MESON_GXBB_WATCHDOG is not set +CONFIG_MESON_WATCHDOG=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +CONFIG_MFD_BD9571MWV=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CROS_EC_DEV=y +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +CONFIG_MFD_HI6421_PMIC=y +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_ROHM_BD718XX=y +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_VEXPRESS_SYSREG=y +# CONFIG_RAVE_SP_CORE is not set +# end of Multifunction device drivers + +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_88PG86X is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_BD718XX=y +CONFIG_REGULATOR_BD9571MWV=y +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_HI6421 is not set +CONFIG_REGULATOR_HI6421V530=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +CONFIG_REGULATOR_MAX8973=y +# CONFIG_REGULATOR_MCP16502 is not set +# CONFIG_REGULATOR_MT6311 is not set +CONFIG_REGULATOR_PFUZE100=y +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +CONFIG_REGULATOR_VCTRL=m +# CONFIG_REGULATOR_VEXPRESS is not set +CONFIG_CEC_CORE=m +CONFIG_RC_CORE=m +CONFIG_RC_MAP=m +# CONFIG_LIRC is not set +CONFIG_RC_DECODERS=y +# CONFIG_IR_NEC_DECODER is not set +# CONFIG_IR_RC5_DECODER is not set +# CONFIG_IR_RC6_DECODER is not set +# CONFIG_IR_JVC_DECODER is not set +# CONFIG_IR_SONY_DECODER is not set +# CONFIG_IR_SANYO_DECODER is not set +# CONFIG_IR_SHARP_DECODER is not set +# CONFIG_IR_MCE_KBD_DECODER is not set +# CONFIG_IR_XMP_DECODER is not set +# CONFIG_IR_IMON_DECODER is not set +# CONFIG_IR_RCMM_DECODER is not set +CONFIG_RC_DEVICES=y +# CONFIG_RC_ATI_REMOTE is not set +# CONFIG_IR_ENE is not set +# CONFIG_IR_HIX5HD2 is not set +# CONFIG_IR_IMON is not set +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MCEUSB is not set +# CONFIG_IR_ITE_CIR is not set +# CONFIG_IR_FINTEK is not set +# CONFIG_IR_MESON is not set +# CONFIG_IR_NUVOTON is not set +# CONFIG_IR_REDRAT3 is not set +# CONFIG_IR_STREAMZAP is not set +# CONFIG_IR_IGORPLUGUSB is not set +# CONFIG_IR_IGUANA is not set +# CONFIG_IR_TTUSBIR is not set +# CONFIG_RC_LOOPBACK is not set +# CONFIG_IR_GPIO_CIR is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_RC_XBOX_DVD is not set +CONFIG_MEDIA_SUPPORT=m + +# +# Multimedia core support +# +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +# CONFIG_MEDIA_CEC_RC is not set +CONFIG_MEDIA_CONTROLLER=y +# CONFIG_MEDIA_CONTROLLER_DVB is not set +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L2_I2C=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_DVB_CORE=m +# CONFIG_DVB_MMAP is not set +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=16 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_VIDEO_USBTV is not set + +# +# Analog TV USB devices +# +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set + +# +# Analog/digital TV USB devices +# +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set + +# +# Digital TV USB devices +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_USB_V2 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set +# CONFIG_VIDEO_CADENCE is not set +# CONFIG_VIDEO_ASPEED is not set +# CONFIG_VIDEO_MUX is not set +# CONFIG_VIDEO_XILINX is not set +CONFIG_V4L_MEM2MEM_DRIVERS=y +# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +# CONFIG_VIDEO_SH_VEU is not set +# CONFIG_V4L_TEST_DRIVERS is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_V4L2=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y +CONFIG_MEDIA_ATTACH=y +CONFIG_VIDEO_IR_I2C=m + +# +# I2C drivers hidden by 'Autoselect ancillary drivers' +# + +# +# Audio decoders, processors and mixers +# + +# +# RDS decoders +# + +# +# Video decoders +# + +# +# Video and audio decoders +# + +# +# Video encoders +# + +# +# Camera sensor devices +# + +# +# Lens drivers +# + +# +# Flash devices +# + +# +# Video improvement chips +# + +# +# Audio/Video compression chips +# + +# +# SDR tuner chips +# + +# +# Miscellaneous helper chips +# + +# +# SPI drivers hidden by 'Autoselect ancillary drivers' +# + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=m + +# +# Tuner drivers hidden by 'Autoselect ancillary drivers' +# +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_XC4000=m +CONFIG_MEDIA_TUNER_MC44S803=m + +# +# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' +# + +# +# Multistandard (satellite) frontends +# + +# +# Multistandard (cable + terrestrial) frontends +# + +# +# DVB-S (satellite) frontends +# + +# +# DVB-T (terrestrial) frontends +# + +# +# DVB-C (cable) frontends +# + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# + +# +# ISDB-T (terrestrial) frontends +# + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# + +# +# Digital terrestrial only tuners/PLL +# + +# +# SEC control devices for DVB-S +# + +# +# Common Interface (EN50221) controller drivers +# + +# +# Tools to develop new frontends +# + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=m +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +CONFIG_DRM_KMS_HELPER=m +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_TTM=m +CONFIG_DRM_VRAM_HELPER=m +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_GEM_SHMEM_HELPER=y +CONFIG_DRM_VM=y +CONFIG_DRM_SCHED=m + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +CONFIG_DRM_I2C_NXP_TDA998X=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices + +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# +# end of ACP (Audio CoProcessor) Configuration + +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set +CONFIG_DRM_ATI_PCIGART=y +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +CONFIG_DRM_RCAR_LVDS=m +CONFIG_DRM_RCAR_WRITEBACK=y +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set +# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set +# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set +# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set +# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set +# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TPO_TPG110 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# end of Display Panels + +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_CDNS_DSI is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +CONFIG_DRM_SII902X=m +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +CONFIG_DRM_I2C_ADV7511=m +# CONFIG_DRM_I2C_ADV7511_AUDIO is not set +CONFIG_DRM_I2C_ADV7533=y +CONFIG_DRM_I2C_ADV7511_CEC=y +CONFIG_DRM_DW_HDMI=m +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_CEC is not set +# end of Display Interface Bridges + +CONFIG_DRM_ETNAVIV=m +CONFIG_DRM_ETNAVIV_THERMAL=y +# CONFIG_DRM_ARCPGU is not set +CONFIG_DRM_HISI_HIBMC=m +CONFIG_DRM_HISI_KIRIN=m +# CONFIG_DRM_MXSFB is not set +CONFIG_DRM_MESON=m +CONFIG_DRM_MESON_DW_HDMI=m +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set +CONFIG_DRM_PL111=m +# CONFIG_DRM_XEN is not set +CONFIG_DRM_LIMA=m +CONFIG_DRM_PANFROST=m +CONFIG_DRM_LEGACY=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +CONFIG_FB_EFI=y +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_XEN_FBDEV_FRONTEND=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_MAX_CARDS=32 +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SE6X is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# HD-Audio +# +# CONFIG_SND_HDA_INTEL is not set +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_AMD_ACP is not set +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_DESIGNWARE_I2S is not set + +# +# SoC Audio for Freescale CPUs +# + +# +# Common SoC Audio options for Freescale CPUs: +# +# CONFIG_SND_SOC_FSL_ASRC is not set +# CONFIG_SND_SOC_FSL_SAI is not set +# CONFIG_SND_SOC_FSL_AUDMIX is not set +# CONFIG_SND_SOC_FSL_SSI is not set +# CONFIG_SND_SOC_FSL_SPDIF is not set +# CONFIG_SND_SOC_FSL_ESAI is not set +# CONFIG_SND_SOC_FSL_MICFIL is not set +# CONFIG_SND_SOC_IMX_AUDMUX is not set +# end of SoC Audio for Freescale CPUs + +# CONFIG_SND_I2S_HI6210_I2S is not set +# CONFIG_SND_SOC_IMG is not set +# CONFIG_SND_SOC_MTK_BTCVSD is not set + +# +# ASoC support for Amlogic platforms +# +# CONFIG_SND_MESON_AXG_FRDDR is not set +# CONFIG_SND_MESON_AXG_TODDR is not set +# CONFIG_SND_MESON_AXG_TDMIN is not set +# CONFIG_SND_MESON_AXG_TDMOUT is not set +# CONFIG_SND_MESON_AXG_SOUND_CARD is not set +# CONFIG_SND_MESON_AXG_SPDIFOUT is not set +# CONFIG_SND_MESON_AXG_SPDIFIN is not set +# CONFIG_SND_MESON_AXG_PDM is not set +# CONFIG_SND_MESON_G12A_TOHDMITX is not set +# end of ASoC support for Amlogic platforms + +# CONFIG_SND_SOC_SOF_TOPLEVEL is not set + +# +# STMicroelectronics STM32 SOC audio support +# +# end of STMicroelectronics STM32 SOC audio support + +# CONFIG_SND_SOC_XILINX_I2S is not set +# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set +# CONFIG_SND_SOC_XILINX_SPDIF is not set +# CONFIG_SND_SOC_XTFPGA_I2S is not set +# CONFIG_ZX_TDM is not set +CONFIG_SND_SOC_I2C_AND_SPI=y + +# +# CODEC drivers +# +# CONFIG_SND_SOC_AC97_CODEC is not set +# CONFIG_SND_SOC_ADAU1701 is not set +# CONFIG_SND_SOC_ADAU1761_I2C is not set +# CONFIG_SND_SOC_ADAU1761_SPI is not set +# CONFIG_SND_SOC_ADAU7002 is not set +# CONFIG_SND_SOC_AK4104 is not set +# CONFIG_SND_SOC_AK4118 is not set +# CONFIG_SND_SOC_AK4458 is not set +# CONFIG_SND_SOC_AK4554 is not set +CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4642 is not set +# CONFIG_SND_SOC_AK5386 is not set +# CONFIG_SND_SOC_AK5558 is not set +# CONFIG_SND_SOC_ALC5623 is not set +# CONFIG_SND_SOC_BD28623 is not set +# CONFIG_SND_SOC_BT_SCO is not set +# CONFIG_SND_SOC_CROS_EC_CODEC is not set +# CONFIG_SND_SOC_CS35L32 is not set +# CONFIG_SND_SOC_CS35L33 is not set +# CONFIG_SND_SOC_CS35L34 is not set +# CONFIG_SND_SOC_CS35L35 is not set +# CONFIG_SND_SOC_CS35L36 is not set +# CONFIG_SND_SOC_CS42L42 is not set +# CONFIG_SND_SOC_CS42L51_I2C is not set +# CONFIG_SND_SOC_CS42L52 is not set +# CONFIG_SND_SOC_CS42L56 is not set +# CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS4265 is not set +# CONFIG_SND_SOC_CS4270 is not set +# CONFIG_SND_SOC_CS4271_I2C is not set +# CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_CS42XX8_I2C is not set +# CONFIG_SND_SOC_CS43130 is not set +# CONFIG_SND_SOC_CS4341 is not set +# CONFIG_SND_SOC_CS4349 is not set +# CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CX2072X is not set +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_HDMI_CODEC=m +CONFIG_SND_SOC_ES7134=m +CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8328_I2C is not set +# CONFIG_SND_SOC_ES8328_SPI is not set +# CONFIG_SND_SOC_GTM601 is not set +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_MAX98088 is not set +CONFIG_SND_SOC_MAX98357A=m +# CONFIG_SND_SOC_MAX98504 is not set +# CONFIG_SND_SOC_MAX9867 is not set +# CONFIG_SND_SOC_MAX98927 is not set +# CONFIG_SND_SOC_MAX98373 is not set +# CONFIG_SND_SOC_MAX9860 is not set +# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set +# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set +# CONFIG_SND_SOC_PCM1681 is not set +# CONFIG_SND_SOC_PCM1789_I2C is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set +# CONFIG_SND_SOC_PCM186X_I2C is not set +# CONFIG_SND_SOC_PCM186X_SPI is not set +# CONFIG_SND_SOC_PCM3060_I2C is not set +# CONFIG_SND_SOC_PCM3060_SPI is not set +CONFIG_SND_SOC_PCM3168A=m +CONFIG_SND_SOC_PCM3168A_I2C=m +# CONFIG_SND_SOC_PCM3168A_SPI is not set +# CONFIG_SND_SOC_PCM512x_I2C is not set +# CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_RK3328 is not set +# CONFIG_SND_SOC_RT5616 is not set +# CONFIG_SND_SOC_RT5631 is not set +# CONFIG_SND_SOC_SGTL5000 is not set +# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set +# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set +CONFIG_SND_SOC_SPDIF=m +# CONFIG_SND_SOC_SSM2305 is not set +# CONFIG_SND_SOC_SSM2602_SPI is not set +# CONFIG_SND_SOC_SSM2602_I2C is not set +# CONFIG_SND_SOC_SSM4567 is not set +# CONFIG_SND_SOC_STA32X is not set +# CONFIG_SND_SOC_STA350 is not set +# CONFIG_SND_SOC_STI_SAS is not set +# CONFIG_SND_SOC_TAS2552 is not set +# CONFIG_SND_SOC_TAS5086 is not set +CONFIG_SND_SOC_TAS571X=m +# CONFIG_SND_SOC_TAS5720 is not set +# CONFIG_SND_SOC_TAS6424 is not set +# CONFIG_SND_SOC_TDA7419 is not set +# CONFIG_SND_SOC_TFA9879 is not set +# CONFIG_SND_SOC_TLV320AIC23_I2C is not set +# CONFIG_SND_SOC_TLV320AIC23_SPI is not set +# CONFIG_SND_SOC_TLV320AIC31XX is not set +# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set +# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set +# CONFIG_SND_SOC_TLV320AIC3X is not set +# CONFIG_SND_SOC_TS3A227E is not set +# CONFIG_SND_SOC_TSCS42XX is not set +# CONFIG_SND_SOC_TSCS454 is not set +# CONFIG_SND_SOC_UDA1334 is not set +# CONFIG_SND_SOC_WM8510 is not set +# CONFIG_SND_SOC_WM8523 is not set +# CONFIG_SND_SOC_WM8524 is not set +# CONFIG_SND_SOC_WM8580 is not set +# CONFIG_SND_SOC_WM8711 is not set +# CONFIG_SND_SOC_WM8728 is not set +# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8737 is not set +# CONFIG_SND_SOC_WM8741 is not set +# CONFIG_SND_SOC_WM8750 is not set +# CONFIG_SND_SOC_WM8753 is not set +# CONFIG_SND_SOC_WM8770 is not set +# CONFIG_SND_SOC_WM8776 is not set +# CONFIG_SND_SOC_WM8782 is not set +# CONFIG_SND_SOC_WM8804_I2C is not set +# CONFIG_SND_SOC_WM8804_SPI is not set +# CONFIG_SND_SOC_WM8903 is not set +# CONFIG_SND_SOC_WM8904 is not set +# CONFIG_SND_SOC_WM8960 is not set +# CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set +# CONFIG_SND_SOC_WM8978 is not set +# CONFIG_SND_SOC_WM8985 is not set +# CONFIG_SND_SOC_ZX_AUD96P22 is not set +# CONFIG_SND_SOC_MAX9759 is not set +# CONFIG_SND_SOC_MT6351 is not set +# CONFIG_SND_SOC_MT6358 is not set +# CONFIG_SND_SOC_NAU8540 is not set +# CONFIG_SND_SOC_NAU8810 is not set +# CONFIG_SND_SOC_NAU8822 is not set +# CONFIG_SND_SOC_NAU8824 is not set +# CONFIG_SND_SOC_TPA6130A2 is not set +# end of CODEC drivers + +CONFIG_SND_SIMPLE_CARD_UTILS=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD=m +# CONFIG_SND_XEN_FRONTEND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELAN is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOOGLE_HAMMER is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_U2FZERO is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# end of Special HID drivers + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support + +# +# I2C HID support +# +CONFIG_I2C_HID=m +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +CONFIG_USB_ULPI_BUS=y +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +# CONFIG_USB_EHCI_FSL is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +CONFIG_USB_UAS=y + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_DUAL_ROLE=y + +# +# Platform Glue Layer +# + +# +# MUSB DMA mode +# +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_ULPI is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +CONFIG_USB_DWC3_PCI=y +CONFIG_USB_DWC3_HAPS=y +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_OF=y +CONFIG_USB_CHIPIDEA_PCI=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +CONFIG_USB_PHY=y +CONFIG_NOP_USB_XCEIV=y +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +# end of USB Physical Layer drivers + +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +CONFIG_USB_BDC_UDC=y + +# +# Platform Support +# +CONFIG_USB_BDC_PCI=y +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +# end of USB Peripheral Controller + +# CONFIG_USB_CONFIGFS is not set +CONFIG_TYPEC=m +# CONFIG_TYPEC_TCPM is not set +# CONFIG_TYPEC_UCSI is not set +# CONFIG_TYPEC_TPS6598X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +# CONFIG_PWRSEQ_SD8787 is not set +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_F_SDH30=y +CONFIG_MMC_SDHCI_IPROC=y +CONFIG_MMC_MESON_GX=y +# CONFIG_MMC_MESON_MX_SDIO is not set +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_HI3798CV200=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +CONFIG_LEDS_PWM=y +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +CONFIG_LEDS_TRIGGER_DISK=y +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +CONFIG_LEDS_TRIGGER_PANIC=y +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_GHES=y +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_MESON_VRTC=m +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +CONFIG_RTC_DRV_RX8581=m +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set +# CONFIG_RTC_DRV_RV8803 is not set +CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set +CONFIG_RTC_DRV_CROS_EC=y + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_CADENCE is not set +# CONFIG_RTC_DRV_FTRTC010 is not set +CONFIG_RTC_DRV_SNVS=m +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +CONFIG_BCM_SBA_RAID=m +# CONFIG_DW_AXI_DMAC is not set +CONFIG_FSL_EDMA=y +# CONFIG_FSL_QDMA is not set +# CONFIG_INTEL_IDMA64 is not set +CONFIG_MV_XOR_V2=y +CONFIG_PL330_DMA=y +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +CONFIG_QCOM_HIDMA_MGMT=y +CONFIG_QCOM_HIDMA=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +# CONFIG_DW_EDMA is not set +# CONFIG_DW_EDMA_PCIE is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_DMA_ENGINE_RAID=y + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_SELFTESTS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +# CONFIG_VFIO_PLATFORM is not set +# CONFIG_VFIO_MDEV is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y +CONFIG_VIRTIO_MENU=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES_DEFAULT=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +# CONFIG_XEN_GRANT_DMA_ALLOC is not set +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_FRONTEND is not set +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +# end of Xen driver support + +# CONFIG_GREYBUS is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +CONFIG_MFD_CROS_EC=y +CONFIG_CHROME_PLATFORMS=y +# CONFIG_CHROMEOS_TBMC is not set +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +# CONFIG_CROS_EC_RPMSG is not set +CONFIG_CROS_EC_SPI=y +CONFIG_CROS_EC_PROTO=y +# CONFIG_CROS_KBD_LED_BACKLIGHT is not set +CONFIG_CROS_EC_CHARDEV=y +CONFIG_CROS_EC_LIGHTBAR=y +CONFIG_CROS_EC_VBC=y +CONFIG_CROS_EC_SYSFS=y +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_VERSATILE=y +CONFIG_CLK_SP810=y +CONFIG_CLK_VEXPRESS_OSC=y +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_BD718XX is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_COMMON_CLK_IPROC=y +CONFIG_CLK_BCM_NS2=y +CONFIG_CLK_BCM_SR=y +CONFIG_COMMON_CLK_MESON_REGMAP=y +CONFIG_COMMON_CLK_MESON_DUALDIV=y +CONFIG_COMMON_CLK_MESON_MPLL=y +CONFIG_COMMON_CLK_MESON_PLL=y +CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y +CONFIG_COMMON_CLK_MESON_AO_CLKC=y +CONFIG_COMMON_CLK_MESON_EE_CLKC=y +CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_COMMON_CLK_AXG=y +# CONFIG_COMMON_CLK_AXG_AUDIO is not set +CONFIG_COMMON_CLK_G12A=y +# end of Common Clock Framework + +CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_CLKSRC_VERSATILE=y +# end of Clock Source drivers + +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +CONFIG_PCC=y +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +# CONFIG_BCM_PDC_MBOX is not set +CONFIG_BCM_FLEXRM_MBOX=m +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y +CONFIG_ARM_SMMU_V3=y +# CONFIG_VIRTIO_IOMMU is not set + +# +# Remoteproc drivers +# +CONFIG_REMOTEPROC=y +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +CONFIG_RPMSG_QCOM_GLINK_NATIVE=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +CONFIG_MESON_CANVAS=m +CONFIG_MESON_CLK_MEASURE=y +CONFIG_MESON_GX_SOCINFO=y +CONFIG_MESON_GX_PM_DOMAINS=y +CONFIG_MESON_EE_PM_DOMAINS=y +CONFIG_MESON_MX_SOCINFO=y +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +CONFIG_SOC_BRCMSTB=y +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +CONFIG_SOC_TI=y + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + +# +# DEVFREQ Drivers +# +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_FSA9480 is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_PTN5150 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +CONFIG_EXTCON_USBC_CROS_EC=y +CONFIG_MEMORY=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +# CONFIG_IIO_BUFFER_CB is not set +# CONFIG_IIO_BUFFER_HW_CONSUMER is not set +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +# CONFIG_IIO_CONFIGFS is not set +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set +# end of Accelerometers + +# +# Analog to digital converters +# +# CONFIG_AD7124 is not set +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set +# CONFIG_AD799X is not set +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set +# CONFIG_BCM_IPROC_ADC is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set +CONFIG_MESON_SARADC=y +# CONFIG_NAU7802 is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_QCOM_SPMI_ADC5 is not set +# CONFIG_SD_ADC_MODULATOR is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends + +# +# Amplifiers +# +# CONFIG_AD8366 is not set +# end of Amplifiers + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_BME680 is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_PMS7003 is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set +# CONFIG_VZ89X is not set +# end of Chemical Sensors + +CONFIG_IIO_CROS_EC_SENSORS_CORE=m +CONFIG_IIO_CROS_EC_SENSORS=m +# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set + +# +# Hid Sensor IIO Common +# +# end of Hid Sensor IIO Common + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set +# end of SSP Sensor Common + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC1660 is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set +# end of Digital to analog converters + +# +# IIO dummy driver +# +# end of IIO dummy driver + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set +# end of Clock Generator/Distribution + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_FXAS21002C is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set +# end of Humidity sensors + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +CONFIG_IIO_CROS_EC_LIGHT_PROX=m +# CONFIG_GP2AP020A00F is not set +CONFIG_SENSORS_ISL29018=m +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set +# CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set +# end of Multiplexers + +# +# Inclinometer sensors +# +# end of Inclinometer sensors + +# +# Triggers - standalone +# +# CONFIG_IIO_INTERRUPT_TRIGGER is not set +# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Triggers - standalone + +# +# Digital potentiometers +# +# CONFIG_AD5272 is not set +# CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set +# CONFIG_TPL0102 is not set +# end of Digital potentiometers + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set +# end of Digital potentiostats + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +CONFIG_IIO_CROS_EC_BARO=m +# CONFIG_DPS310 is not set +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +CONFIG_MPL3115=m +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set +# end of Pressure sensors + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set +# end of Lightning sensors + +# +# Proximity and distance sensors +# +# CONFIG_ISL29501 is not set +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_RFD77402 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_PWM_BCM_IPROC=y +CONFIG_PWM_CROS_EC=m +# CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_MESON=y +# CONFIG_PWM_PCA9685 is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_PARTITION_PERCPU=y +CONFIG_MESON_IRQ_GPIO=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_MESON=y +# CONFIG_RESET_MESON_AUDIO_ARB is not set +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_GXL_USB2=y +CONFIG_PHY_MESON_GXL_USB3=y +CONFIG_PHY_MESON_G12A_USB2=y +CONFIG_PHY_MESON_G12A_USB3_PCIE=y +CONFIG_PHY_BCM_SR_USB=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_BCM_NS_USB2 is not set +# CONFIG_PHY_BCM_NS_USB3 is not set +CONFIG_PHY_NS2_PCIE=y +CONFIG_PHY_NS2_USB_DRD=y +CONFIG_PHY_BRCM_SATA=y +CONFIG_PHY_BCM_SR_PCIE=y +# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +CONFIG_PHY_FSL_IMX8MQ_USB=y +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +CONFIG_PHY_QCOM_USB_HS=y +# CONFIG_PHY_QCOM_USB_HSIC is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_TUSB1210 is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +# CONFIG_ARM_SMMU_V3_PMU is not set +# CONFIG_ARM_DSU_PMU is not set +CONFIG_HISI_PMU=y +# CONFIG_ARM_SPE_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_BCM_OCOTP=y +# CONFIG_MESON_EFUSE is not set +# CONFIG_MESON_MX_EFUSE is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +CONFIG_FPGA=y +# CONFIG_ALTERA_PR_IP_CORE is not set +# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set +# CONFIG_FPGA_MGR_ALTERA_CVP is not set +# CONFIG_FPGA_MGR_XILINX_SPI is not set +# CONFIG_FPGA_MGR_ICE40_SPI is not set +# CONFIG_FPGA_MGR_MACHXO2_SPI is not set +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +# CONFIG_XILINX_PR_DECOUPLER is not set +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m +# CONFIG_FPGA_DFL is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers + +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set +# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set +# CONFIG_BTRFS_DEBUG is not set +# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS_REF_VERIFY is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=m +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set +# end of DOS/FAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_VMCORE=y +# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_CACHE=y +# CONFIG_SQUASHFS_FILE_DIRECT is not set +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +CONFIG_SQUASHFS_ZLIB=y +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +# CONFIG_SQUASHFS_XZ is not set +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_PSTORE_RAM is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_SWAP is not set +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_BLOCK=m +CONFIG_PNFS_FLEXFILE_LAYOUT=m +CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" +# CONFIG_NFS_V4_1_MIGRATION is not set +CONFIG_NFS_V4_SECURITY_LABEL=y +CONFIG_ROOT_NFS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFSD is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_BACKCHANNEL=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=y +# CONFIG_9P_FS_POSIX_ACL is not set +# CONFIG_9P_FS_SECURITY is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +# end of File systems + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_KEYS_REQUEST_CACHE is not set +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_TRUSTED_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +# CONFIG_SECURITY_SAFESETID is not set +# CONFIG_SECURITY_LOCKDOWN_LSM is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y +CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=m +CONFIG_CRYPTO_ECDH=m +# CONFIG_CRYPTO_ECRDSA is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_LIB_ARC4=m +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_LIB_DES=m +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_CHACHA20=m +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +CONFIG_CRYPTO_DEV_BCM_SPU=m +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +# CONFIG_CRYPTO_DEV_HISI_SEC is not set +# CONFIG_CRYPTO_DEV_HISI_ZIP is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set + +# +# Certificates for signature checking +# +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=m +CONFIG_RAID6_PQ_BENCHMARK=y +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_INDIRECT_PIO=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_XXHASH=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMPRESS=m +CONFIG_ZSTD_DECOMPRESS=m +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_XARRAY_MULTI=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y +CONFIG_SWIOTLB=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +CONFIG_CLZ_TAB=y +CONFIG_IRQ_POLL=y +CONFIG_MPILIB=y +CONFIG_DIMLIB=y +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_UCS2_STRING=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_SG_POOL=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_INSTALL is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# end of Compile-time checks and compiler options + +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +# CONFIG_DEBUG_KERNEL is not set + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_CC_HAS_KASAN_GENERIC=y +# CONFIG_KASAN is not set +CONFIG_KASAN_STACK=1 +# end of Memory Debugging + +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set + +# +# Debug Lockups and Hangs +# +# end of Debug Lockups and Hangs + +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +CONFIG_SCHED_INFO=y +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y + +# +# RCU Debugging +# +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# end of RCU Debugging + +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_BITFIELD is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_UBSAN_ALIGNMENT=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +CONFIG_STRICT_DEVMEM=y +# CONFIG_IO_STRICT_DEVMEM is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of Kernel hacking diff --git a/buildroot-external/board/hardkernel/odroid-n2/meta b/buildroot-external/board/hardkernel/odroid-n2/meta new file mode 100644 index 000000000..fcf5c544b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/meta @@ -0,0 +1,7 @@ +BOARD_ID=odroid-n2 +BOARD_NAME="Hardkernel Odroid-N2" +CHASSIS=embedded +BOOTLOADER=uboot +KERNEL_FILE=Image +BOOT_SYS=mbr +BOOT_ENV_SIZE=0x2000 diff --git a/buildroot-external/board/hardkernel/odroid-n2/uboot-boot.ush b/buildroot-external/board/hardkernel/odroid-n2/uboot-boot.ush new file mode 100644 index 000000000..230a2252a --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/uboot-boot.ush @@ -0,0 +1,94 @@ + +########################################### + +part start mmc ${devnum} 9 mmc_env +mmc dev ${devnum} +setenv loadbootstate " \ + echo 'loading env...'; \ + mmc read ${ramdisk_addr_r} ${mmc_env} 0x10; \ + env import -c ${ramdisk_addr_r} 0x2000;" + +setenv storebootstate " \ + echo 'storing env...'; \ + env export -c -s 0x2000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT; \ + mmc write ${ramdisk_addr_r} ${mmc_env} 0x10;" + +run loadbootstate +test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B" +test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3 +test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3 + +if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then + env import -t ${ramdisk_addr_r} ${filesize}; +fi + +# Board bootargs +if test "${hdmimode}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi + +# Boot Args +setenv bootargs_odroidn2 "clk_ignore_unused hdmimode=${hdmimode} cvbsmode=576cvbs max_freq_a53=${max_freq_a53} max_freq_a73=${max_freq_a73} maxcpus=${maxcpus} ${cmode} voutmode=${voutmode} disablehpd=${disablehpd} overscan=${overscan}" + +# HassOS bootargs +setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory" + +# HassOS system A/B +setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait" +setenv bootargs_b "root=PARTUUID=48617373-08 rootfstype=squashfs ro rootwait" + +usb start + +# Load extraargs +fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline +fatload mmc ${devnum}:1 ${fdt_addr_r} meson-g12b-odroid-n2.dtb +#fdt addr ${fdt_addr_r} + +# logical volumes get numbered after physical ones. +# 1. boot +# 2. Extended partition +# 3. Overlay +# 4. Data +# 5. KernelA +# 6. SystemA +# 7. KernelB +# 8. SystemB +# 9. BootInfo +setenv bootargs +for BOOT_SLOT in "${BOOT_ORDER}"; do + if test "x${bootargs}" != "x"; then + # skip remaining slots + elif test "x${BOOT_SLOT}" = "xA"; then + if test ${BOOT_A_LEFT} -gt 0; then + setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1 + echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining" + setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} Image" + setenv bootargs "${bootargs_hassos} ${bootargs_odroidn2} ${bootargs_a} rauc.slot=A ${cmdline}" + fi + elif test "x${BOOT_SLOT}" = "xB"; then + if test ${BOOT_B_LEFT} -gt 0; then + setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1 + echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining" + setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} Image" + setenv bootargs "${bootargs_hassos} ${bootargs_odroidn2} ${bootargs_b} rauc.slot=B ${cmdline}" + fi + fi +done + +if test -n "${bootargs}"; then + run storebootstate +else + echo "No valid slot found, resetting tries to 3" + setenv BOOT_A_LEFT 3 + setenv BOOT_B_LEFT 3 + run storebootstate + reset +fi + +echo "Loading kernel" +run load_kernel +echo " Starting kernel" +printenv load_kernel +printenv bootargs +booti ${kernel_addr_r} - ${fdt_addr_r} + +echo "Fails on boot" +reset diff --git a/buildroot-external/board/hardkernel/odroid-n2/uboot.config b/buildroot-external/board/hardkernel/odroid-n2/uboot.config new file mode 100644 index 000000000..f276dedff --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-n2/uboot.config @@ -0,0 +1,8 @@ +# CONFIG_USB_STORAGE is not set +CONFIG_DOS_PARTITION=y +# CONFIG_EFI_PARTITION is not set +CONFIG_USB=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_CMD_FILEENV=y +CONFIG_ENV_IS_NOWHERE=Y diff --git a/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt b/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt index a15b61d8d..8792fee3a 100644 --- a/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt +++ b/buildroot-external/board/hardkernel/odroid-xu4/boot-env.txt @@ -1,7 +1,6 @@ macaddr=00:1e:06:61:7a:39 vout=hdmi -vout=hdmi # - DVI Mode (disables sound over HDMI as per DVI compat) # vout=dvi @@ -16,7 +15,7 @@ disable_vu7=false # DRAM Frequency # Sets the LPDDR3 memory frequency # Supported values: 933 825 728 633 (MHZ) -ddr_freq 825 +ddr_freq=825 # External watchdog board enable external_watchdog=false diff --git a/buildroot-external/board/hardkernel/odroid-xu4/kernel.config b/buildroot-external/board/hardkernel/odroid-xu4/kernel.config index 70f913b5d..5e29cc188 100644 --- a/buildroot-external/board/hardkernel/odroid-xu4/kernel.config +++ b/buildroot-external/board/hardkernel/odroid-xu4/kernel.config @@ -1,31 +1,17 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.14.15 Kernel Configuration +# Linux/arm 5.4.0 Kernel Configuration # -CONFIG_ARM=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_ARM_DMA_USE_IOMMU=y -CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_NO_IOPORT_MAP=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_ARCH_HAS_BANDGAP=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_GENERIC_BUG=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Compiler: gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=70400 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_EXTABLE_SORT=y @@ -33,10 +19,11 @@ CONFIG_BUILDTIME_EXTABLE_SORT=y # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" # CONFIG_COMPILE_TEST is not set +# CONFIG_HEADER_TEST is not set CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y @@ -49,18 +36,12 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_FHANDLE=y # CONFIG_USELIB is not set -CONFIG_AUDIT=y +# CONFIG_AUDIT is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_AUDITSYSCALL=y -CONFIG_AUDIT_WATCH=y -CONFIG_AUDIT_TREE=y # # IRQ subsystem @@ -69,15 +50,18 @@ CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y -CONFIG_GENERIC_IRQ_DEBUGFS=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y @@ -94,19 +78,26 @@ CONFIG_NO_HZ_IDLE=y # CONFIG_NO_HZ_FULL is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_PREEMPTION=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -CONFIG_TASKSTATS=y -CONFIG_TASK_DELAY_ACCT=y -CONFIG_TASK_XACCT=y -CONFIG_TASK_IO_ACCOUNTING=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +CONFIG_CPU_ISOLATION=y # # RCU Subsystem @@ -118,48 +109,41 @@ CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_BUILD_BIN2C=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y +# end of RCU Subsystem + +# CONFIG_IKCONFIG is not set +# CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + CONFIG_CGROUPS=y -CONFIG_PAGE_COUNTER=y -CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_SWAP_ENABLED=y -CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -CONFIG_CGROUP_WRITEBACK=y -CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_CFS_BANDWIDTH=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_CGROUP_PIDS=n -CONFIG_CGROUP_RDMA=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CPUSETS=y -CONFIG_PROC_PID_CPUSET=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_PERF=y -CONFIG_CGROUP_BPF=y -CONFIG_SOCK_CGROUP_DATA=y -# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_MEMCG is not set +# CONFIG_BLK_CGROUP is not set +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +# CONFIG_CPUSETS is not set +# CONFIG_CGROUP_DEVICE is not set +# CONFIG_CGROUP_CPUACCT is not set CONFIG_NAMESPACES=y CONFIG_UTS_NS=y -CONFIG_IPC_NS=y -CONFIG_USER_NS=y +# CONFIG_USER_NS is not set CONFIG_PID_NS=y CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set -CONFIG_RELAY=y +# CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" -# CONFIG_INITRAMFS_FORCE is not set CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y @@ -169,19 +153,14 @@ CONFIG_RD_LZ4=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y CONFIG_HAVE_UID16=y CONFIG_BPF=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y -# CONFIG_SGETMASK_SYSCALL is not set CONFIG_SYSFS_SYSCALL=y -# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_PRINTK=y CONFIG_PRINTK_NMI=y CONFIG_BUG=y @@ -193,196 +172,76 @@ CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y -CONFIG_BPF_SYSCALL=y CONFIG_SHMEM=y CONFIG_AIO=y +CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y -# CONFIG_USERFAULTFD is not set CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_RSEQ=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters # -CONFIG_PERF_EVENTS=y +# CONFIG_PERF_EVENTS is not set +# end of Kernel Performance Events And Counters + CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y -# CONFIG_SLUB_MEMCG_SYSFS_ON is not set CONFIG_COMPAT_BRK=y # CONFIG_SLAB is not set CONFIG_SLUB=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_SLUB_CPU_PARTIAL=y -# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_SYSTEM_DATA_VERIFICATION=y # CONFIG_PROFILING is not set -CONFIG_TRACEPOINTS=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -# CONFIG_JUMP_LABEL is not set -CONFIG_UPROBES=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_NMI=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_ARCH_HAS_SET_MEMORY=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_GCC_PLUGINS=y -# CONFIG_GCC_PLUGINS is not set -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_CC_STACKPROTECTOR=y -# CONFIG_CC_STACKPROTECTOR_NONE is not set -CONFIG_CC_STACKPROTECTOR_REGULAR=y -# CONFIG_CC_STACKPROTECTOR_STRONG is not set -CONFIG_THIN_ARCHIVES=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_HAVE_ARCH_MMAP_RND_BITS=y -CONFIG_HAVE_EXIT_THREAD=y -CONFIG_ARCH_MMAP_RND_BITS_MIN=8 -CONFIG_ARCH_MMAP_RND_BITS_MAX=16 -CONFIG_ARCH_MMAP_RND_BITS=8 -# CONFIG_HAVE_ARCH_HASH is not set -# CONFIG_ISA_BUS_API is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OLD_SIGACTION=y -# CONFIG_CPU_NO_EFFICIENT_FFS is not set -# CONFIG_HAVE_ARCH_VMAP_STACK is not set -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y -CONFIG_STRICT_MODULE_RWX=y -# CONFIG_REFCOUNT_FULL is not set +# end of General setup -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -# CONFIG_MODULE_COMPRESS is not set -# CONFIG_TRIM_UNUSED_KSYMS is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -# CONFIG_BLK_DEV_INTEGRITY is not set -# CONFIG_BLK_DEV_ZONED is not set -CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set -# CONFIG_BLK_CMDLINE_PARSER is not set -# CONFIG_BLK_WBT is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_SED_OPAL is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -# CONFIG_CMDLINE_PARTITION is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_CFQ_GROUP_IOSCHED=y -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -# CONFIG_IOSCHED_BFQ is not set -CONFIG_PADATA=y -CONFIG_ASN1=m -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_FREEZER=y +CONFIG_ARM=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_DMA_USE_IOMMU=y +CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_NO_IOPORT_MAP=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_GENERIC_BUG=y +CONFIG_PGTABLE_LEVELS=2 # # System Type # CONFIG_MMU=y +CONFIG_ARCH_MMAP_RND_BITS_MIN=8 +CONFIG_ARCH_MMAP_RND_BITS_MAX=16 CONFIG_ARCH_MULTIPLATFORM=y # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C24XX is not set -# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP1 is not set # @@ -395,40 +254,17 @@ CONFIG_ARCH_MULTIPLATFORM=y # CONFIG_ARCH_MULTI_V6 is not set CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_MULTI_V6_V7=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set +# end of Multiple platform selection + # CONFIG_ARCH_VIRT is not set -# CONFIG_ARCH_MVEBU is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set +# CONFIG_ARCH_ASPEED is not set # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_DIGICOLOR is not set -# CONFIG_ARCH_HIGHBANK is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_KEYSTONE is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_MEDIATEK is not set - -# -# TI OMAP/AM/DM/DRA Family -# -# CONFIG_ARCH_OMAP3 is not set -# CONFIG_ARCH_OMAP4 is not set -# CONFIG_SOC_OMAP5 is not set -# CONFIG_SOC_AM33XX is not set -# CONFIG_SOC_AM43XX is not set -# CONFIG_SOC_DRA7XX is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_SOCFPGA is not set -# CONFIG_PLAT_SPEAR is not set -# CONFIG_ARCH_STI is not set -# CONFIG_ARCH_S5PV210 is not set CONFIG_ARCH_EXYNOS=y CONFIG_S5P_DEV_MFC=y CONFIG_ARCH_EXYNOS3=y @@ -440,15 +276,13 @@ CONFIG_ARCH_EXYNOS5=y # CONFIG_SOC_EXYNOS3250=y CONFIG_CPU_EXYNOS4210=y -CONFIG_SOC_EXYNOS4212=y CONFIG_SOC_EXYNOS4412=y CONFIG_SOC_EXYNOS5250=y CONFIG_SOC_EXYNOS5260=y CONFIG_SOC_EXYNOS5410=y CONFIG_SOC_EXYNOS5420=y -CONFIG_SOC_EXYNOS5440=y CONFIG_SOC_EXYNOS5800=y -CONFIG_EXYNOS5420_MCPM=y +CONFIG_EXYNOS_MCPM=y CONFIG_EXYNOS_CPU_SUSPEND=y CONFIG_PLAT_SAMSUNG=y @@ -459,15 +293,46 @@ CONFIG_PLAT_SAMSUNG=y # # Boot options # -# CONFIG_SAMSUNG_ATAGS is not set # # Power management # -# CONFIG_SAMSUNG_PM_CHECK is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_SUNXI is not set +# end of Samsung Common options + +# CONFIG_ARCH_HIGHBANK is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_KEYSTONE is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MILBEAUT is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_NPCM is not set + +# +# TI OMAP/AM/DM/DRA Family +# +# CONFIG_ARCH_OMAP3 is not set +# CONFIG_ARCH_OMAP4 is not set +# CONFIG_SOC_OMAP5 is not set +# CONFIG_SOC_AM33XX is not set +# CONFIG_SOC_AM43XX is not set +# CONFIG_SOC_DRA7XX is not set +# end of TI OMAP/AM/DM/DRA Family + # CONFIG_ARCH_SIRF is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SOCFPGA is not set +# CONFIG_PLAT_SPEAR is not set +# CONFIG_ARCH_STI is not set +# CONFIG_ARCH_STM32 is not set +# CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_TANGO is not set # CONFIG_ARCH_TEGRA is not set # CONFIG_ARCH_UNIPHIER is not set @@ -498,21 +363,22 @@ CONFIG_CPU_CP15_MMU=y # Processor Features # # CONFIG_ARM_LPAE is not set -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set CONFIG_ARM_THUMB=y # CONFIG_ARM_THUMBEE is not set CONFIG_ARM_VIRT_EXT=y CONFIG_SWP_EMULATE=y # CONFIG_CPU_BIG_ENDIAN is not set # CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set # CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_SPECTRE=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_KUSER_HELPERS=y CONFIG_VDSO=y CONFIG_OUTER_CACHE=y CONFIG_OUTER_CACHE_SYNC=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_CACHE_L2X0=y -# CONFIG_CACHE_L2X0_PMU is not set # CONFIG_PL310_ERRATA_588369 is not set # CONFIG_PL310_ERRATA_727915 is not set # CONFIG_PL310_ERRATA_753970 is not set @@ -523,7 +389,6 @@ CONFIG_ARM_DMA_MEM_BUFFERABLE=y CONFIG_ARM_HEAVY_MB=y CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_MULTI_IRQ_HANDLER=y # CONFIG_ARM_ERRATA_430973 is not set CONFIG_ARM_ERRATA_643719=y # CONFIG_ARM_ERRATA_720789 is not set @@ -536,25 +401,17 @@ CONFIG_ARM_ERRATA_643719=y # CONFIG_ARM_ERRATA_818325_852422 is not set # CONFIG_ARM_ERRATA_821420 is not set # CONFIG_ARM_ERRATA_825619 is not set +# CONFIG_ARM_ERRATA_857271 is not set # CONFIG_ARM_ERRATA_852421 is not set # CONFIG_ARM_ERRATA_852423 is not set +# CONFIG_ARM_ERRATA_857272 is not set +# end of System Type # # Bus support # -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS_GENERIC is not set -# CONFIG_PCI_SYSCALL is not set - -# -# DesignWare PCI Core Support -# - -# -# PCI Endpoint -# -# CONFIG_PCI_ENDPOINT is not set -# CONFIG_PCCARD is not set +# CONFIG_ARM_ERRATA_814220 is not set +# end of Bus support # # Kernel Features @@ -563,17 +420,12 @@ CONFIG_HAVE_SMP=y CONFIG_SMP=y CONFIG_SMP_ON_UP=y CONFIG_ARM_CPU_TOPOLOGY=y -CONFIG_SCHED_MC=y -CONFIG_HPERF_HMP=y -# CONFIG_HPERF_HMP_DEBUG is not set -CONFIG_HMP_FAST_CPU_MASK="F0" -CONFIG_HMP_SLOW_CPU_MASK="0F" +# CONFIG_SCHED_MC is not set # CONFIG_SCHED_SMT is not set CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_MCPM=y -#CONFIG_BIG_LITTLE=y -# CONFIG_BL_SWITCHER is not set +# CONFIG_BIG_LITTLE is not set CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_3G_OPT is not set # CONFIG_VMSPLIT_2G is not set @@ -583,70 +435,34 @@ CONFIG_NR_CPUS=8 CONFIG_HOTPLUG_CPU=y # CONFIG_ARM_PSCI is not set CONFIG_ARCH_NR_GPIO=512 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y CONFIG_HZ_FIXED=0 -# CONFIG_HZ_100 is not set +CONFIG_HZ_100=y # CONFIG_HZ_200 is not set -CONFIG_HZ_250=y +# CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set # CONFIG_HZ_500 is not set # CONFIG_HZ_1000 is not set -CONFIG_HZ=250 +CONFIG_HZ=100 CONFIG_SCHED_HRTICK=y # CONFIG_THUMB2_KERNEL is not set CONFIG_ARM_PATCH_IDIV=y CONFIG_AEABI=y # CONFIG_OABI_COMPAT is not set CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y CONFIG_CPU_SW_DOMAIN_PAN=y -CONFIG_HW_PERF_EVENTS=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -# CONFIG_ARM_MODULE_PLTS is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_NO_BOOTMEM=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_BOUNCE=y -# CONFIG_KSM is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_ARCH_WANTS_THP_SWAP is not set -# CONFIG_CLEANCACHE is not set -# CONFIG_FRONTSWAP is not set -CONFIG_CMA=y -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_AREAS=7 -# CONFIG_ZPOOL is not set -# CONFIG_ZBUD is not set -CONFIG_ZSMALLOC=y -CONFIG_PGTABLE_MAPPING=y -# CONFIG_ZSMALLOC_STAT is not set -CONFIG_GENERIC_EARLY_IOREMAP=y -# CONFIG_IDLE_PAGE_TRACKING is not set -CONFIG_FRAME_VECTOR=y -# CONFIG_PERCPU_STATS is not set +CONFIG_ARM_MODULE_PLTS=y CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_ALIGNMENT_TRAP=y # CONFIG_UACCESS_WITH_MEMCPY is not set -CONFIG_SECCOMP=y -CONFIG_SWIOTLB=y -CONFIG_IOMMU_HELPER=y +# CONFIG_SECCOMP is not set # CONFIG_PARAVIRT is not set # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set # CONFIG_XEN is not set +# end of Kernel Features # # Boot options @@ -654,20 +470,15 @@ CONFIG_IOMMU_HELPER=y CONFIG_USE_OF=y CONFIG_ATAGS=y # CONFIG_DEPRECATED_PARAM_STRUCT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND=y -CONFIG_CMDLINE="s5p_mfc.mem=16M" -# CONFIG_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_CMDLINE_EXTEND=y -# CONFIG_CMDLINE_FORCE is not set +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="" # CONFIG_KEXEC is not set # CONFIG_CRASH_DUMP is not set CONFIG_AUTO_ZRELADDR=y # CONFIG_EFI is not set +# end of Boot options # # CPU Power Management @@ -676,34 +487,16 @@ CONFIG_AUTO_ZRELADDR=y # # CPU Frequency scaling # -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y - -# -# CPU frequency scaling drivers -# -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set -# CONFIG_ARM_EXYNOS5440_CPUFREQ is not set -# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set -# CONFIG_QORIQ_CPUFREQ is not set +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y -# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_CPU_IDLE_GOV_TEO is not set # # ARM CPU Idle Drivers @@ -711,7 +504,11 @@ CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_ARM_CPUIDLE is not set # CONFIG_ARM_BIG_LITTLE_CPUIDLE is not set CONFIG_ARM_EXYNOS_CPUIDLE=y +# end of ARM CPU Idle Drivers + CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y +# end of CPU Idle +# end of CPU Power Management # # Floating point emulation @@ -724,18 +521,7 @@ CONFIG_VFP=y CONFIG_VFPv3=y CONFIG_NEON=y CONFIG_KERNEL_MODE_NEON=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -CONFIG_ELFCORE=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_BINFMT_SCRIPT=y -# CONFIG_BINFMT_FLAT is not set -# CONFIG_HAVE_AOUT is not set -CONFIG_BINFMT_MISC=m -CONFIG_COREDUMP=y +# end of Floating point emulation # # Power management options @@ -748,12 +534,8 @@ CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y -CONFIG_PM_DEBUG=y -CONFIG_PM_ADVANCED_DEBUG=y -# CONFIG_PM_TEST_SUSPEND is not set -CONFIG_PM_SLEEP_DEBUG=y +# CONFIG_PM_DEBUG is not set # CONFIG_APM_EMULATION is not set -CONFIG_PM_OPP=y CONFIG_PM_CLK=y CONFIG_PM_GENERIC_DOMAINS=y # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set @@ -763,836 +545,365 @@ CONFIG_CPU_PM=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y +# end of Power management options + +# +# Firmware Drivers +# +# CONFIG_TRUSTED_FOUNDATIONS is not set +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +# CONFIG_ARM_CRYPTO is not set +# CONFIG_VIRTUALIZATION is not set + +# +# General architecture-dependent options +# +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +CONFIG_STACKPROTECTOR=y +CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_HAVE_EXIT_THREAD=y +CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y +CONFIG_64BIT_TIME=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAS_PHYS_TO_DMA=y +CONFIG_REFCOUNT_FULL=y +# CONFIG_LOCK_EVENT_COUNTS is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_PLUGIN_HOSTCC="" +CONFIG_HAVE_GCC_PLUGINS=y +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +# end of Partition Types + +CONFIG_BLK_PM=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_ELF_FDPIC is not set +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_ARCH_HAS_BINFMT_FLAT=y +# CONFIG_BINFMT_FLAT is not set +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_BOUNCE=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_FRAME_VECTOR=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +# end of Memory Management options + CONFIG_NET=y -CONFIG_NET_INGRESS=y -CONFIG_NET_EGRESS=y +CONFIG_SKB_EXTENSIONS=y # # Networking options # CONFIG_PACKET=y -CONFIG_PACKET_DIAG=m +# CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_DIAG=m +CONFIG_UNIX_SCM=y +# CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set CONFIG_XFRM=y CONFIG_XFRM_ALGO=y -CONFIG_XFRM_USER=m -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_MIGRATE=y -CONFIG_XFRM_STATISTICS=y -CONFIG_XFRM_IPCOMP=m +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_INTERFACE is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y +# CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_FIB_TRIE_STATS=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_ROUTE_CLASSID=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE_DEMUX=m -CONFIG_NET_IP_TUNNEL=m -CONFIG_NET_IPGRE=m -CONFIG_NET_IPGRE_BROADCAST=y -CONFIG_IP_MROUTE=y -CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_SYN_COOKIES=y -CONFIG_NET_IPVTI=m -CONFIG_NET_UDP_TUNNEL=m -CONFIG_NET_FOU=m -CONFIG_NET_FOU_IP_TUNNELS=y -CONFIG_INET_AH=m -CONFIG_INET_ESP=m -# CONFIG_INET_ESP_OFFLOAD is not set -CONFIG_INET_IPCOMP=m -CONFIG_INET_XFRM_TUNNEL=m -CONFIG_INET_TUNNEL=m -CONFIG_INET_XFRM_MODE_TRANSPORT=m -CONFIG_INET_XFRM_MODE_TUNNEL=m -CONFIG_INET_XFRM_MODE_BEET=m -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_INET_UDP_DIAG=m +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=y +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set # CONFIG_INET_RAW_DIAG is not set -CONFIG_INET_DIAG_DESTROY=y -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=m +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_VEGAS=m -CONFIG_TCP_CONG_NV=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_TCP_CONG_DCTCP=m -CONFIG_TCP_CONG_CDG=m -CONFIG_TCP_CONG_BBR=m -CONFIG_DEFAULT_CUBIC=y -# CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" -CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=m -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_INET6_AH=m -CONFIG_INET6_ESP=m -# CONFIG_INET6_ESP_OFFLOAD is not set -CONFIG_INET6_IPCOMP=m -CONFIG_IPV6_MIP6=m -CONFIG_IPV6_ILA=m -CONFIG_INET6_XFRM_TUNNEL=m -CONFIG_INET6_TUNNEL=m -CONFIG_INET6_XFRM_MODE_TRANSPORT=m -CONFIG_INET6_XFRM_MODE_TUNNEL=m -CONFIG_INET6_XFRM_MODE_BEET=m -CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m -CONFIG_IPV6_VTI=m -CONFIG_IPV6_SIT=m -CONFIG_IPV6_SIT_6RD=y +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=y +# CONFIG_IPV6_SIT_6RD is not set CONFIG_IPV6_NDISC_NODETYPE=y -CONFIG_IPV6_TUNNEL=m -CONFIG_IPV6_GRE=m -CONFIG_IPV6_FOU=m -CONFIG_IPV6_FOU_TUNNEL=m -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_SUBTREES=y -CONFIG_IPV6_MROUTE=y -CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -CONFIG_IPV6_PIMSM_V2=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set # CONFIG_IPV6_SEG6_LWTUNNEL is not set # CONFIG_IPV6_SEG6_HMAC is not set # CONFIG_NETWORK_SECMARK is not set -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NETWORK_PHY_TIMESTAMPING=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=m - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_INGRESS=y -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_ACCT=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=m -# CONFIG_NF_LOG_NETDEV is not set -CONFIG_NF_CONNTRACK_MARK=y -CONFIG_NF_CONNTRACK_ZONES=y -CONFIG_NF_CONNTRACK_PROCFS=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_TIMEOUT=y -CONFIG_NF_CONNTRACK_TIMESTAMP=y -CONFIG_NF_CONNTRACK_LABELS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_GRE=m -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_CONNTRACK_AMANDA=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_H323=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK_BROADCAST=m -CONFIG_NF_CONNTRACK_NETBIOS_NS=m -CONFIG_NF_CONNTRACK_SNMP=m -CONFIG_NF_CONNTRACK_PPTP=m -CONFIG_NF_CONNTRACK_SANE=m -CONFIG_NF_CONNTRACK_SIP=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_CT_NETLINK=m -CONFIG_NF_CT_NETLINK_TIMEOUT=m -CONFIG_NF_CT_NETLINK_HELPER=m -CONFIG_NETFILTER_NETLINK_GLUE_CT=y -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -CONFIG_NF_NAT_PROTO_DCCP=y -CONFIG_NF_NAT_PROTO_UDPLITE=y -CONFIG_NF_NAT_PROTO_SCTP=y -CONFIG_NF_NAT_AMANDA=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT_SIP=m -CONFIG_NF_NAT_TFTP=m -CONFIG_NF_NAT_REDIRECT=m -CONFIG_NETFILTER_SYNPROXY=m -CONFIG_NF_TABLES=m -CONFIG_NF_TABLES_INET=m -CONFIG_NF_TABLES_NETDEV=m -CONFIG_NFT_EXTHDR=m -CONFIG_NFT_META=m -# CONFIG_NFT_RT is not set -CONFIG_NFT_NUMGEN=m -CONFIG_NFT_CT=m -CONFIG_NFT_SET_RBTREE=m -CONFIG_NFT_SET_HASH=m -# CONFIG_NFT_SET_BITMAP is not set -CONFIG_NFT_COUNTER=m -CONFIG_NFT_LOG=m -CONFIG_NFT_LIMIT=m -CONFIG_NFT_MASQ=m -CONFIG_NFT_REDIR=m -CONFIG_NFT_NAT=m -# CONFIG_NFT_OBJREF is not set -CONFIG_NFT_QUEUE=m -CONFIG_NFT_QUOTA=m -CONFIG_NFT_REJECT=m -CONFIG_NFT_REJECT_INET=m -CONFIG_NFT_COMPAT=m -CONFIG_NFT_HASH=m -CONFIG_NF_DUP_NETDEV=m -CONFIG_NFT_DUP_NETDEV=m -CONFIG_NFT_FWD_NETDEV=m -CONFIG_NETFILTER_XTABLES=y - -# -# Xtables combined modules -# -CONFIG_NETFILTER_XT_MARK=m -CONFIG_NETFILTER_XT_CONNMARK=m -CONFIG_NETFILTER_XT_SET=m - -# -# Xtables targets -# -# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -CONFIG_NETFILTER_XT_TARGET_CT=m -CONFIG_NETFILTER_XT_TARGET_DSCP=m -CONFIG_NETFILTER_XT_TARGET_HL=m -CONFIG_NETFILTER_XT_TARGET_HMARK=m -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -CONFIG_NETFILTER_XT_TARGET_LED=m -CONFIG_NETFILTER_XT_TARGET_LOG=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_NAT=m -CONFIG_NETFILTER_XT_TARGET_NETMAP=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -CONFIG_NETFILTER_XT_TARGET_TEE=m -CONFIG_NETFILTER_XT_TARGET_TPROXY=m -CONFIG_NETFILTER_XT_TARGET_TRACE=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m - -# -# Xtables matches -# -CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -CONFIG_NETFILTER_XT_MATCH_BPF=m -CONFIG_NETFILTER_XT_MATCH_CGROUP=m -CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_CPU=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -CONFIG_NETFILTER_XT_MATCH_DSCP=m -CONFIG_NETFILTER_XT_MATCH_ECN=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_HL=m -CONFIG_NETFILTER_XT_MATCH_IPCOMP=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_IPVS=m -CONFIG_NETFILTER_XT_MATCH_L2TP=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_NFACCT=m -CONFIG_NETFILTER_XT_MATCH_OSF=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_POLICY=m -CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_RECENT=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NETFILTER_XT_MATCH_TIME=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_IP_SET=m -CONFIG_IP_SET_MAX=256 -CONFIG_IP_SET_BITMAP_IP=m -CONFIG_IP_SET_BITMAP_IPMAC=m -CONFIG_IP_SET_BITMAP_PORT=m -CONFIG_IP_SET_HASH_IP=m -CONFIG_IP_SET_HASH_IPMARK=m -CONFIG_IP_SET_HASH_IPPORT=m -CONFIG_IP_SET_HASH_IPPORTIP=m -CONFIG_IP_SET_HASH_IPPORTNET=m -# CONFIG_IP_SET_HASH_IPMAC is not set -CONFIG_IP_SET_HASH_MAC=m -CONFIG_IP_SET_HASH_NETPORTNET=m -CONFIG_IP_SET_HASH_NET=m -CONFIG_IP_SET_HASH_NETNET=m -CONFIG_IP_SET_HASH_NETPORT=m -CONFIG_IP_SET_HASH_NETIFACE=m -CONFIG_IP_SET_LIST_SET=m -CONFIG_IP_VS=m -CONFIG_IP_VS_IPV6=y -CONFIG_IP_VS_DEBUG=y -CONFIG_IP_VS_TAB_BITS=12 - -# -# IPVS transport protocol load balancing support -# -CONFIG_IP_VS_PROTO_TCP=y -CONFIG_IP_VS_PROTO_UDP=y -CONFIG_IP_VS_PROTO_AH_ESP=y -CONFIG_IP_VS_PROTO_ESP=y -CONFIG_IP_VS_PROTO_AH=y -CONFIG_IP_VS_PROTO_SCTP=y - -# -# IPVS scheduler -# -CONFIG_IP_VS_RR=m -CONFIG_IP_VS_WRR=m -CONFIG_IP_VS_LC=m -CONFIG_IP_VS_WLC=m -CONFIG_IP_VS_FO=m -CONFIG_IP_VS_OVF=m -CONFIG_IP_VS_LBLC=m -CONFIG_IP_VS_LBLCR=m -CONFIG_IP_VS_DH=m -CONFIG_IP_VS_SH=m -CONFIG_IP_VS_SED=m -CONFIG_IP_VS_NQ=m - -# -# IPVS SH scheduler -# -CONFIG_IP_VS_SH_TAB_BITS=8 - -# -# IPVS application helper -# -CONFIG_IP_VS_FTP=m -CONFIG_IP_VS_NFCT=y -CONFIG_IP_VS_PE_SIP=m - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m -CONFIG_NF_CONNTRACK_IPV4=m -# CONFIG_NF_SOCKET_IPV4 is not set -CONFIG_NF_TABLES_IPV4=m -CONFIG_NFT_CHAIN_ROUTE_IPV4=m -CONFIG_NFT_REJECT_IPV4=m -CONFIG_NFT_DUP_IPV4=m -# CONFIG_NFT_FIB_IPV4 is not set -CONFIG_NF_TABLES_ARP=m -CONFIG_NF_DUP_IPV4=m -CONFIG_NF_LOG_ARP=m -CONFIG_NF_LOG_IPV4=m -CONFIG_NF_REJECT_IPV4=m -CONFIG_NF_NAT_IPV4=m -CONFIG_NFT_CHAIN_NAT_IPV4=m -CONFIG_NF_NAT_MASQUERADE_IPV4=m -CONFIG_NFT_MASQ_IPV4=m -CONFIG_NFT_REDIR_IPV4=m -CONFIG_NF_NAT_SNMP_BASIC=m -CONFIG_NF_NAT_PROTO_GRE=m -CONFIG_NF_NAT_PPTP=m -CONFIG_NF_NAT_H323=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_AH=m -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_RPFILTER=m -CONFIG_IP_NF_MATCH_TTL=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_SYNPROXY=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_CLUSTERIP=m -CONFIG_IP_NF_TARGET_ECN=m -CONFIG_IP_NF_TARGET_TTL=m -CONFIG_IP_NF_RAW=m -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -CONFIG_IP_NF_ARP_MANGLE=m - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m -CONFIG_NF_CONNTRACK_IPV6=m -# CONFIG_NF_SOCKET_IPV6 is not set -CONFIG_NF_TABLES_IPV6=m -CONFIG_NFT_CHAIN_ROUTE_IPV6=m -CONFIG_NFT_REJECT_IPV6=m -CONFIG_NFT_DUP_IPV6=m -# CONFIG_NFT_FIB_IPV6 is not set -CONFIG_NF_DUP_IPV6=m -CONFIG_NF_REJECT_IPV6=m -CONFIG_NF_LOG_IPV6=m -CONFIG_NF_NAT_IPV6=m -CONFIG_NFT_CHAIN_NAT_IPV6=m -CONFIG_NF_NAT_MASQUERADE_IPV6=m -CONFIG_NFT_MASQ_IPV6=m -CONFIG_NFT_REDIR_IPV6=m -CONFIG_IP6_NF_IPTABLES=m -CONFIG_IP6_NF_MATCH_AH=m -CONFIG_IP6_NF_MATCH_EUI64=m -CONFIG_IP6_NF_MATCH_FRAG=m -CONFIG_IP6_NF_MATCH_OPTS=m -CONFIG_IP6_NF_MATCH_HL=m -CONFIG_IP6_NF_MATCH_IPV6HEADER=m -CONFIG_IP6_NF_MATCH_MH=m -CONFIG_IP6_NF_MATCH_RPFILTER=m -CONFIG_IP6_NF_MATCH_RT=m -CONFIG_IP6_NF_TARGET_HL=m -CONFIG_IP6_NF_FILTER=m -CONFIG_IP6_NF_TARGET_REJECT=m -CONFIG_IP6_NF_TARGET_SYNPROXY=m -CONFIG_IP6_NF_MANGLE=m -CONFIG_IP6_NF_RAW=m -CONFIG_IP6_NF_NAT=m -CONFIG_IP6_NF_TARGET_MASQUERADE=m -CONFIG_IP6_NF_TARGET_NPT=m - -# -# DECnet: Netfilter Configuration -# -# CONFIG_DECNET_NF_GRABULATOR is not set -CONFIG_NF_TABLES_BRIDGE=m -CONFIG_NFT_BRIDGE_META=m -CONFIG_NFT_BRIDGE_REJECT=m -CONFIG_NF_LOG_BRIDGE=m -CONFIG_BRIDGE_NF_EBTABLES=m -CONFIG_BRIDGE_EBT_BROUTE=m -CONFIG_BRIDGE_EBT_T_FILTER=m -CONFIG_BRIDGE_EBT_T_NAT=m -CONFIG_BRIDGE_EBT_802_3=m -CONFIG_BRIDGE_EBT_AMONG=m -CONFIG_BRIDGE_EBT_ARP=m -CONFIG_BRIDGE_EBT_IP=m -CONFIG_BRIDGE_EBT_IP6=m -CONFIG_BRIDGE_EBT_LIMIT=m -CONFIG_BRIDGE_EBT_MARK=m -CONFIG_BRIDGE_EBT_PKTTYPE=m -CONFIG_BRIDGE_EBT_STP=m -CONFIG_BRIDGE_EBT_VLAN=m -CONFIG_BRIDGE_EBT_ARPREPLY=m -CONFIG_BRIDGE_EBT_DNAT=m -CONFIG_BRIDGE_EBT_MARK_T=m -CONFIG_BRIDGE_EBT_REDIRECT=m -CONFIG_BRIDGE_EBT_SNAT=m -CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_NFLOG=m +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +# CONFIG_NETFILTER is not set +# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set -CONFIG_IP_SCTP=m -# CONFIG_SCTP_DBG_OBJCNT is not set -CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set -# CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set -CONFIG_SCTP_COOKIE_HMAC_MD5=y -# CONFIG_SCTP_COOKIE_HMAC_SHA1 is not set -CONFIG_INET_SCTP_DIAG=m -CONFIG_RDS=m -CONFIG_RDS_TCP=m -# CONFIG_RDS_DEBUG is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set # CONFIG_TIPC is not set -CONFIG_ATM=m -CONFIG_ATM_CLIP=m -CONFIG_ATM_CLIP_NO_ICMP=y -CONFIG_ATM_LANE=m -CONFIG_ATM_MPOA=m -CONFIG_ATM_BR2684=m -CONFIG_ATM_BR2684_IPFILTER=y -CONFIG_L2TP=m -CONFIG_L2TP_DEBUGFS=m -CONFIG_L2TP_V3=y -CONFIG_L2TP_IP=m -CONFIG_L2TP_ETH=m -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_MRP=m -CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y -CONFIG_BRIDGE_VLAN_FILTERING=y +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set -CONFIG_VLAN_8021Q=m -CONFIG_VLAN_8021Q_GVRP=y -CONFIG_VLAN_8021Q_MVRP=y -CONFIG_DECNET=m -CONFIG_DECNET_ROUTER=y -CONFIG_LLC=m -CONFIG_LLC2=m -CONFIG_IPX=m -CONFIG_IPX_INTERN=y -CONFIG_ATALK=m -CONFIG_DEV_APPLETALK=m -CONFIG_IPDDP=m -CONFIG_IPDDP_ENCAP=y +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_PHONET is not set -CONFIG_6LOWPAN=m -# CONFIG_6LOWPAN_DEBUGFS is not set -CONFIG_6LOWPAN_NHC=m -CONFIG_6LOWPAN_NHC_DEST=m -CONFIG_6LOWPAN_NHC_FRAGMENT=m -CONFIG_6LOWPAN_NHC_HOP=m -CONFIG_6LOWPAN_NHC_IPV6=m -CONFIG_6LOWPAN_NHC_MOBILITY=m -CONFIG_6LOWPAN_NHC_ROUTING=m -CONFIG_6LOWPAN_NHC_UDP=m -CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m -CONFIG_6LOWPAN_GHC_UDP=m -CONFIG_6LOWPAN_GHC_ICMPV6=m -CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m -CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m -CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m -CONFIG_IEEE802154=m -CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y -CONFIG_IEEE802154_SOCKET=m -CONFIG_IEEE802154_6LOWPAN=m -CONFIG_MAC802154=m -CONFIG_NET_SCHED=y - -# -# Queueing/Scheduling -# -CONFIG_NET_SCH_CBQ=m -CONFIG_NET_SCH_HTB=m -CONFIG_NET_SCH_HFSC=m -# CONFIG_NET_SCH_ATM is not set -CONFIG_NET_SCH_PRIO=m -CONFIG_NET_SCH_MULTIQ=m -CONFIG_NET_SCH_RED=m -CONFIG_NET_SCH_SFB=m -CONFIG_NET_SCH_SFQ=m -CONFIG_NET_SCH_TEQL=m -CONFIG_NET_SCH_TBF=m -CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m -CONFIG_NET_SCH_NETEM=m -CONFIG_NET_SCH_DRR=m -CONFIG_NET_SCH_MQPRIO=m -CONFIG_NET_SCH_CHOKE=m -CONFIG_NET_SCH_QFQ=m -CONFIG_NET_SCH_CODEL=m -CONFIG_NET_SCH_FQ_CODEL=m -CONFIG_NET_SCH_FQ=m -CONFIG_NET_SCH_HHF=m -CONFIG_NET_SCH_PIE=m -CONFIG_NET_SCH_INGRESS=m -CONFIG_NET_SCH_PLUG=m -# CONFIG_NET_SCH_DEFAULT is not set - -# -# Classification -# -CONFIG_NET_CLS=y -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_U32=m -CONFIG_CLS_U32_PERF=y -CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_CGROUP=m -CONFIG_NET_CLS_BPF=m -CONFIG_NET_CLS_FLOWER=m -CONFIG_NET_CLS_MATCHALL=m -CONFIG_NET_EMATCH=y -CONFIG_NET_EMATCH_STACK=32 -CONFIG_NET_EMATCH_CMP=m -CONFIG_NET_EMATCH_NBYTE=m -CONFIG_NET_EMATCH_U32=m -CONFIG_NET_EMATCH_META=m -CONFIG_NET_EMATCH_TEXT=m -# CONFIG_NET_EMATCH_CANID is not set -CONFIG_NET_EMATCH_IPSET=m -CONFIG_NET_CLS_ACT=y -CONFIG_NET_ACT_POLICE=m -CONFIG_NET_ACT_GACT=m -CONFIG_GACT_PROB=y -CONFIG_NET_ACT_MIRRED=m -# CONFIG_NET_ACT_SAMPLE is not set -CONFIG_NET_ACT_IPT=m -CONFIG_NET_ACT_NAT=m -CONFIG_NET_ACT_PEDIT=m -CONFIG_NET_ACT_SIMP=m -CONFIG_NET_ACT_SKBEDIT=m -CONFIG_NET_ACT_CSUM=m -CONFIG_NET_ACT_VLAN=m -CONFIG_NET_ACT_BPF=m -CONFIG_NET_ACT_CONNMARK=m -CONFIG_NET_ACT_SKBMOD=m -CONFIG_NET_ACT_IFE=m -CONFIG_NET_ACT_TUNNEL_KEY=m -CONFIG_NET_IFE_SKBMARK=m -CONFIG_NET_IFE_SKBPRIO=m -CONFIG_NET_IFE_SKBTCINDEX=m -CONFIG_NET_CLS_IND=y -CONFIG_NET_SCH_FIFO=y +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set # CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -CONFIG_BATMAN_ADV=m -CONFIG_BATMAN_ADV_BATMAN_V=y -CONFIG_BATMAN_ADV_BLA=y -CONFIG_BATMAN_ADV_DAT=y -CONFIG_BATMAN_ADV_NC=y -CONFIG_BATMAN_ADV_MCAST=y -CONFIG_BATMAN_ADV_DEBUGFS=y -# CONFIG_BATMAN_ADV_DEBUG is not set -CONFIG_OPENVSWITCH=m -CONFIG_OPENVSWITCH_GRE=m -CONFIG_OPENVSWITCH_VXLAN=m -CONFIG_VSOCKETS=m -CONFIG_NETLINK_DIAG=m -CONFIG_MPLS=y -CONFIG_NET_MPLS_GSO=m -# CONFIG_MPLS_ROUTING is not set +# CONFIG_DNS_RESOLVER is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set # CONFIG_NET_NSH is not set # CONFIG_HSR is not set # CONFIG_NET_SWITCHDEV is not set -CONFIG_NET_L3_MASTER_DEV=y +# CONFIG_NET_L3_MASTER_DEV is not set # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y -CONFIG_CGROUP_NET_PRIO=y -CONFIG_CGROUP_NET_CLASSID=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y # CONFIG_BPF_JIT is not set -# CONFIG_BPF_STREAM_PARSER is not set CONFIG_NET_FLOW_LIMIT=y # # Network testing # # CONFIG_NET_PKTGEN is not set -CONFIG_NET_DROP_MONITOR=y -CONFIG_HAMRADIO=y +# end of Network testing +# end of Networking options -# -# Packet Radio protocols -# -# CONFIG_AX25 is not set -CONFIG_CAN=m -CONFIG_CAN_RAW=m -CONFIG_CAN_BCM=m -CONFIG_CAN_GW=m - -# -# CAN Device Drivers -# -# CONFIG_CAN_VCAN is not set -# CONFIG_CAN_VXCAN is not set -CONFIG_CAN_SLCAN=m -CONFIG_CAN_DEV=m -CONFIG_CAN_CALC_BITTIMING=y -# CONFIG_CAN_LEDS is not set -# CONFIG_CAN_FLEXCAN is not set -# CONFIG_CAN_GRCAN is not set -# CONFIG_CAN_TI_HECC is not set -# CONFIG_CAN_C_CAN is not set -# CONFIG_CAN_CC770 is not set -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_RCAR is not set -# CONFIG_CAN_RCAR_CANFD is not set -# CONFIG_CAN_SJA1000 is not set -# CONFIG_CAN_SOFTING is not set - -# -# CAN SPI interfaces -# -# CONFIG_CAN_HI311X is not set -CONFIG_CAN_MCP251X=m - -# -# CAN USB interfaces -# -CONFIG_CAN_EMS_USB=m -CONFIG_CAN_ESD_USB2=m -CONFIG_CAN_GS_USB=m -CONFIG_CAN_KVASER_USB=m -CONFIG_CAN_PEAK_USB=m -CONFIG_CAN_8DEV_USB=m -# CONFIG_CAN_MCBA_USB is not set -# CONFIG_CAN_DEBUG_DEVICES is not set -CONFIG_BT=m -CONFIG_BT_BREDR=y -CONFIG_BT_RFCOMM=m -CONFIG_BT_RFCOMM_TTY=y -CONFIG_BT_BNEP=m -CONFIG_BT_BNEP_MC_FILTER=y -CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_HIDP=m -CONFIG_BT_HS=y -CONFIG_BT_LE=y -# CONFIG_BT_6LOWPAN is not set -CONFIG_BT_LEDS=y -CONFIG_BT_DEBUGFS=y - -# -# Bluetooth device drivers -# -CONFIG_BT_INTEL=m -CONFIG_BT_BCM=m -CONFIG_BT_RTL=m -CONFIG_BT_QCA=m -CONFIG_BT_HCIBTUSB=m -CONFIG_BT_HCIBTUSB_BCM=y -CONFIG_BT_HCIBTUSB_RTL=y -CONFIG_BT_HCIBTSDIO=m -CONFIG_BT_HCIUART=m -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_BCSP=y -CONFIG_BT_HCIUART_ATH3K=y -CONFIG_BT_HCIUART_3WIRE=y -CONFIG_BT_HCIUART_INTEL=y -CONFIG_BT_HCIUART_QCA=y -CONFIG_BT_HCIUART_AG6XX=y -CONFIG_BT_HCIUART_MRVL=y -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIVHCI=m -CONFIG_BT_MRVL=m -# CONFIG_BT_MRVL_SDIO is not set -CONFIG_BT_ATH3K=m +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_BT is not set # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set -# CONFIG_STREAM_PARSER is not set -CONFIG_FIB_RULES=y CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_SPY=y -CONFIG_WEXT_PRIV=y -CONFIG_CFG80211=m +CONFIG_CFG80211=y # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y +CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_CRDA_SUPPORT=y -CONFIG_CFG80211_WEXT=y -CONFIG_LIB80211=m -# CONFIG_LIB80211_DEBUG is not set -CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_MINSTREL_HT=y -# CONFIG_MAC80211_RC_MINSTREL_VHT is not set -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" -# CONFIG_MAC80211_MESH is not set -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set +# CONFIG_CFG80211_WEXT is not set +# CONFIG_MAC80211 is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 # CONFIG_WIMAX is not set -CONFIG_RFKILL=m -CONFIG_RFKILL_LEDS=y -CONFIG_RFKILL_INPUT=y -# CONFIG_RFKILL_GPIO is not set +# CONFIG_RFKILL is not set # CONFIG_NET_9P is not set # CONFIG_CAIF is not set # CONFIG_CEPH_LIB is not set -CONFIG_NFC=m -CONFIG_NFC_DIGITAL=m -# CONFIG_NFC_NCI is not set -CONFIG_NFC_HCI=m -# CONFIG_NFC_SHDLC is not set - -# -# Near Field Communication (NFC) devices -# -# CONFIG_NFC_TRF7970A is not set -# CONFIG_NFC_SIM is not set -# CONFIG_NFC_PORT100 is not set -CONFIG_NFC_PN533=m -CONFIG_NFC_PN533_USB=m -# CONFIG_NFC_PN533_I2C is not set -# CONFIG_NFC_ST95HF is not set +# CONFIG_NFC is not set # CONFIG_PSAMPLE is not set -CONFIG_NET_IFE=m -CONFIG_LWTUNNEL=y -CONFIG_LWTUNNEL_BPF=y +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y -# CONFIG_NET_DEVLINK is not set -CONFIG_MAY_USE_DEVLINK=y +# CONFIG_FAILOVER is not set CONFIG_HAVE_EBPF_JIT=y # # Device Drivers # CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +# CONFIG_PCI is not set +# CONFIG_PCCARD is not set # # Generic Driver Options # CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="" +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_STANDALONE=y -# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="s5p-mfc-v8.fw" -CONFIG_EXTRA_FIRMWARE_DIR="/build/buildroot/output/target/usr/lib/firmware/" -# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set -CONFIG_WANT_DEV_COREDUMP=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER is not set +# CONFIG_FW_LOADER_COMPRESS is not set +# end of Firmware loader + CONFIG_ALLOW_DEV_COREDUMP=y -CONFIG_DEV_COREDUMP=y # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_GENERIC_CPU_DEVICES is not set CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_SOC_BUS=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y @@ -1600,38 +911,30 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set -CONFIG_DMA_CMA=y - -# -# Default contiguous memory area size: -# -CONFIG_CMA_SIZE_MBYTES=128 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options # # Bus devices # CONFIG_ARM_CCI=y CONFIG_ARM_CCI400_COMMON=y -# CONFIG_ARM_CCI400_PMU is not set CONFIG_ARM_CCI400_PORT_CTRL=y -# CONFIG_ARM_CCI5xx_PMU is not set -# CONFIG_ARM_CCN is not set # CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set # CONFIG_SIMPLE_PM_BUS is not set # CONFIG_VEXPRESS_CONFIG is not set +# end of Bus devices + # CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set # CONFIG_MTD is not set CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_NET=y @@ -1639,35 +942,30 @@ CONFIG_OF_MDIO=y CONFIG_OF_RESERVED_MEM=y # CONFIG_OF_OVERLAY is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_PARPORT=m -# CONFIG_PARPORT_PC is not set -# CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_AX88796 is not set -# CONFIG_PARPORT_1284 is not set +# CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set -CONFIG_ZRAM=m -# CONFIG_ZRAM_WRITEBACK is not set -# CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 CONFIG_BLK_DEV_CRYPTOLOOP=y -CONFIG_BLK_DEV_DRBD=m -# CONFIG_DRBD_FAULT_INJECTION is not set +# CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=8192 # CONFIG_CDROM_PKTCDVD is not set -CONFIG_ATA_OVER_ETH=m +# CONFIG_ATA_OVER_ETH is not set # CONFIG_BLK_DEV_RBD is not set + +# +# NVME Support +# # CONFIG_NVME_FC is not set -# CONFIG_NVME_TARGET is not set +# end of NVME Support # # Misc devices # -# CONFIG_SENSORS_LIS3LV02D is not set # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_ICS932S401 is not set @@ -1680,11 +978,11 @@ CONFIG_ATA_OVER_ETH=m # CONFIG_SENSORS_APDS990X is not set # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_USB_SWITCH_FSA9480 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y CONFIG_SRAM_EXEC=y +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set # CONFIG_C2PORT is not set # @@ -1694,21 +992,25 @@ CONFIG_SRAM_EXEC=y # CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=m +# CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +# end of EEPROM support # # Texas Instruments shared transport line discipline # # CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set # -# Altera FPGA firmware download module +# Intel MIC & related support # -# CONFIG_ALTERA_STAPL is not set # # Intel MIC Bus Driver @@ -1721,6 +1023,7 @@ CONFIG_EEPROM_93CX6=m # # VOP Bus Driver # +# CONFIG_VOP_BUS is not set # # Intel MIC Host Driver @@ -1741,10 +1044,11 @@ CONFIG_EEPROM_93CX6=m # # VOP Driver # +# end of Intel MIC & related support + # CONFIG_ECHO is not set -# CONFIG_CXL_BASE is not set -# CONFIG_CXL_AFU_DRIVER_OPS is not set -# CONFIG_CXL_LIB is not set +# CONFIG_MISC_RTSX_USB is not set +# end of Misc devices # # SCSI device support @@ -1753,8 +1057,6 @@ CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y CONFIG_SCSI_DMA=y -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_MQ_DEFAULT is not set CONFIG_SCSI_PROC_FS=y # @@ -1762,9 +1064,7 @@ CONFIG_SCSI_PROC_FS=y # CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=m -CONFIG_BLK_DEV_SR_VENDOR=y +# CONFIG_BLK_DEV_SR is not set CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_CONSTANTS is not set @@ -1776,94 +1076,41 @@ CONFIG_CHR_DEV_SG=y # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set -CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set # CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + CONFIG_SCSI_LOWLEVEL=y -CONFIG_ISCSI_TCP=m -CONFIG_ISCSI_BOOT_SYSFS=m +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set # CONFIG_SCSI_UFSHCD is not set # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set +# end of SCSI device support + # CONFIG_ATA is not set -CONFIG_MD=y -CONFIG_BLK_DEV_MD=m -CONFIG_MD_LINEAR=m -CONFIG_MD_RAID0=m -CONFIG_MD_RAID1=m -CONFIG_MD_RAID10=m -CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m -CONFIG_BCACHE=m -# CONFIG_BCACHE_DEBUG is not set -# CONFIG_BCACHE_CLOSURES_DEBUG is not set -CONFIG_BLK_DEV_DM_BUILTIN=y -CONFIG_BLK_DEV_DM=y -# CONFIG_DM_MQ_DEFAULT is not set -# CONFIG_DM_DEBUG is not set -CONFIG_DM_BUFIO=m -# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set -CONFIG_DM_BIO_PRISON=m -CONFIG_DM_PERSISTENT_DATA=m -CONFIG_DM_CRYPT=m -CONFIG_DM_SNAPSHOT=m -CONFIG_DM_THIN_PROVISIONING=m -CONFIG_DM_CACHE=m -CONFIG_DM_CACHE_SMQ=m -CONFIG_DM_ERA=m -CONFIG_DM_MIRROR=m -# CONFIG_DM_LOG_USERSPACE is not set -CONFIG_DM_RAID=m -CONFIG_DM_ZERO=m -CONFIG_DM_MULTIPATH=m -CONFIG_DM_MULTIPATH_QL=m -CONFIG_DM_MULTIPATH_ST=m -CONFIG_DM_DELAY=m -CONFIG_DM_UEVENT=y -CONFIG_DM_FLAKEY=m -CONFIG_DM_VERITY=m -CONFIG_DM_VERITY_FEC=y -CONFIG_DM_SWITCH=m -CONFIG_DM_LOG_WRITES=m -# CONFIG_DM_INTEGRITY is not set +# CONFIG_MD is not set # CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y -CONFIG_BONDING=m -CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set # CONFIG_EQUALIZER is not set -# CONFIG_IFB is not set -CONFIG_NET_TEAM=m -CONFIG_NET_TEAM_MODE_BROADCAST=m -CONFIG_NET_TEAM_MODE_ROUNDROBIN=m -CONFIG_NET_TEAM_MODE_RANDOM=m -CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m -CONFIG_NET_TEAM_MODE_LOADBALANCE=m -CONFIG_MACVLAN=m -CONFIG_MACVTAP=m -CONFIG_IPVLAN=m -# CONFIG_IPVTAP is not set -CONFIG_VXLAN=m +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set # CONFIG_GENEVE is not set # CONFIG_GTP is not set -CONFIG_MACSEC=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y -CONFIG_NETPOLL=y -CONFIG_NET_POLL_CONTROLLER=y -CONFIG_TUN=m -CONFIG_TAP=m +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_TUN is not set # CONFIG_TUN_VNET_CROSS_LE is not set -CONFIG_VETH=m +# CONFIG_VETH is not set # CONFIG_NLMON is not set -# CONFIG_NET_VRF is not set -CONFIG_ATM_DRIVERS=y -CONFIG_ATM_DUMMY=m -CONFIG_ATM_TCP=m # # CAIF transport drivers @@ -1872,69 +1119,112 @@ CONFIG_ATM_TCP=m # # Distributed Switch Architecture drivers # +# end of Distributed Switch Architecture drivers + CONFIG_ETHERNET=y CONFIG_NET_VENDOR_ALACRITECH=y # CONFIG_ALTERA_TSE is not set CONFIG_NET_VENDOR_AMAZON=y CONFIG_NET_VENDOR_AQUANTIA=y -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_AURORA is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CIRRUS is not set +CONFIG_NET_VENDOR_ARC=y +CONFIG_NET_VENDOR_AURORA=y +# CONFIG_AURORA_NB8800 is not set +CONFIG_NET_VENDOR_BROADCOM=y +# CONFIG_B44 is not set +# CONFIG_BCMGENET is not set +# CONFIG_SYSTEMPORT is not set +CONFIG_NET_VENDOR_CADENCE=y +# CONFIG_MACB is not set +CONFIG_NET_VENDOR_CAVIUM=y +CONFIG_NET_VENDOR_CIRRUS=y +# CONFIG_CS89x0 is not set +CONFIG_NET_VENDOR_CORTINA=y +# CONFIG_GEMINI_ETHERNET is not set # CONFIG_DM9000 is not set # CONFIG_DNET is not set -# CONFIG_NET_VENDOR_EZCHIP is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_HISILICON is not set +CONFIG_NET_VENDOR_EZCHIP=y +# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_FARADAY=y +# CONFIG_FTMAC100 is not set +# CONFIG_FTGMAC100 is not set +CONFIG_NET_VENDOR_GOOGLE=y +CONFIG_NET_VENDOR_HISILICON=y +# CONFIG_HIX5HD2_GMAC is not set +# CONFIG_HISI_FEMAC is not set +# CONFIG_HIP04_ETH is not set +# CONFIG_HNS is not set +# CONFIG_HNS_DSAF is not set +# CONFIG_HNS_ENET is not set CONFIG_NET_VENDOR_HUAWEI=y -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set +CONFIG_NET_VENDOR_I825XX=y +CONFIG_NET_VENDOR_INTEL=y +CONFIG_NET_VENDOR_MARVELL=y +# CONFIG_MVMDIO is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_NETRONOME is not set +CONFIG_NET_VENDOR_MICREL=y +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +CONFIG_NET_VENDOR_MICROCHIP=y +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +CONFIG_NET_VENDOR_MICROSEMI=y +CONFIG_NET_VENDOR_NATSEMI=y +CONFIG_NET_VENDOR_NETRONOME=y +CONFIG_NET_VENDOR_NI=y +# CONFIG_NI_XGE_MANAGEMENT_ENET is not set +CONFIG_NET_VENDOR_8390=y +# CONFIG_AX88796 is not set # CONFIG_ETHOC is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_RENESAS is not set -# CONFIG_NET_VENDOR_ROCKER is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set +CONFIG_NET_VENDOR_PENSANDO=y +CONFIG_NET_VENDOR_QUALCOMM=y +# CONFIG_QCA7000_SPI is not set +# CONFIG_QCOM_EMAC is not set +# CONFIG_RMNET is not set +CONFIG_NET_VENDOR_RENESAS=y +CONFIG_NET_VENDOR_ROCKER=y +CONFIG_NET_VENDOR_SAMSUNG=y +# CONFIG_SXGBE_ETH is not set CONFIG_NET_VENDOR_SEEQ=y CONFIG_NET_VENDOR_SOLARFLARE=y CONFIG_NET_VENDOR_SMSC=y # CONFIG_SMC91X is not set # CONFIG_SMC911X is not set CONFIG_SMSC911X=y -# CONFIG_SMSC911X_ARCH_HOOKS is not set +CONFIG_NET_VENDOR_SOCIONEXT=y CONFIG_NET_VENDOR_STMICRO=y # CONFIG_STMMAC_ETH is not set +CONFIG_NET_VENDOR_SYNOPSYS=y +# CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_VIA=y # CONFIG_VIA_RHINE is not set # CONFIG_VIA_VELOCITY is not set CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5100 is not set # CONFIG_WIZNET_W5300 is not set -CONFIG_NET_VENDOR_SYNOPSYS=y -# CONFIG_DWC_XLGMAC is not set +CONFIG_NET_VENDOR_XILINX=y +# CONFIG_XILINX_AXI_EMAC is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y # CONFIG_MDIO_BCM_UNIMAC is not set # CONFIG_MDIO_BITBANG is not set # CONFIG_MDIO_BUS_MUX_GPIO is not set # CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_MSCC_MIIM is not set CONFIG_PHYLIB=y CONFIG_SWPHY=y -# CONFIG_LED_TRIGGER_PHY is not set # # MII PHY device drivers # +# CONFIG_ADIN_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set # CONFIG_AT803X_PHY is not set # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM87XX_PHY is not set @@ -1942,6 +1232,8 @@ CONFIG_SWPHY=y # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set # CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set # CONFIG_DP83848_PHY is not set # CONFIG_DP83867_PHY is not set CONFIG_FIXED_PHY=y @@ -1952,11 +1244,14 @@ CONFIG_FIXED_PHY=y # CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_10G_PHY is not set # CONFIG_MICREL_PHY is not set -CONFIG_MICROCHIP_PHY=m +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set # CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_QSEMI_PHY is not set -# CONFIG_REALTEK_PHY is not set +CONFIG_REALTEK_PHY=y +# CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set # CONFIG_SMSC_PHY is not set # CONFIG_STE10XP is not set @@ -1964,204 +1259,84 @@ CONFIG_MICROCHIP_PHY=m # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set -CONFIG_PLIP=m -CONFIG_PPP=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_FILTER=y -CONFIG_PPP_MPPE=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPPOATM=m -CONFIG_PPPOE=m -CONFIG_PPTP=m -CONFIG_PPPOL2TP=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m +# CONFIG_PPP is not set # CONFIG_SLIP is not set -CONFIG_SLHC=m CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_CATC=m -CONFIG_USB_KAWETH=m -CONFIG_USB_PEGASUS=m -CONFIG_USB_RTL8150=m +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +CONFIG_USB_RTL8150=y CONFIG_USB_RTL8152=y -CONFIG_USB_LAN78XX=m +# CONFIG_USB_LAN78XX is not set CONFIG_USB_USBNET=y -CONFIG_USB_NET_AX8817X=m -CONFIG_USB_NET_AX88179_178A=m +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y CONFIG_USB_NET_CDCETHER=y -CONFIG_USB_NET_CDC_EEM=m -CONFIG_USB_NET_CDC_NCM=m -CONFIG_USB_NET_HUAWEI_CDC_NCM=m -CONFIG_USB_NET_CDC_MBIM=m -CONFIG_USB_NET_DM9601=m -CONFIG_USB_NET_SR9700=m -CONFIG_USB_NET_SR9800=m -CONFIG_USB_NET_SMSC75XX=m -CONFIG_USB_NET_SMSC95XX=m -CONFIG_USB_NET_GL620A=m -CONFIG_USB_NET_NET1080=m -CONFIG_USB_NET_PLUSB=m -CONFIG_USB_NET_MCS7830=m -CONFIG_USB_NET_RNDIS_HOST=m +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set CONFIG_USB_NET_CDC_SUBSET_ENABLE=y CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_ALI_M5632=y -CONFIG_USB_AN2720=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set CONFIG_USB_BELKIN=y CONFIG_USB_ARMLINUX=y -CONFIG_USB_EPSON2888=y -CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=m -CONFIG_USB_NET_CX82310_ETH=m -CONFIG_USB_NET_KALMIA=m -CONFIG_USB_NET_QMI_WWAN=m -CONFIG_USB_HSO=m -CONFIG_USB_NET_INT51X1=m -CONFIG_USB_IPHETH=m -CONFIG_USB_SIERRA_NET=m -CONFIG_USB_VL600=m -CONFIG_USB_NET_CH9200=m +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set CONFIG_WLAN=y CONFIG_WLAN_VENDOR_ADMTEK=y -CONFIG_ATH_COMMON=m CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set -CONFIG_ATH9K_HW=m -CONFIG_ATH9K_COMMON=m -CONFIG_ATH9K_BTCOEX_SUPPORT=y -CONFIG_ATH9K=m -# CONFIG_ATH9K_AHB is not set -# CONFIG_ATH9K_DEBUGFS is not set -# CONFIG_ATH9K_DYNACK is not set -# CONFIG_ATH9K_WOW is not set -CONFIG_ATH9K_RFKILL=y -# CONFIG_ATH9K_CHANNEL_CONTEXT is not set -CONFIG_ATH9K_PCOEM=y -CONFIG_ATH9K_HTC=m -# CONFIG_ATH9K_HTC_DEBUGFS is not set -# CONFIG_ATH9K_HWRNG is not set -CONFIG_CARL9170=m -CONFIG_CARL9170_LEDS=y -CONFIG_CARL9170_WPC=y -CONFIG_CARL9170_HWRNG=y # CONFIG_ATH6KL is not set -CONFIG_AR5523=m -CONFIG_ATH10K=m -# CONFIG_ATH10K_SDIO is not set -# CONFIG_ATH10K_USB is not set -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_ATH10K_TRACING is not set -CONFIG_WCN36XX=m -# CONFIG_WCN36XX_DEBUGFS is not set CONFIG_WLAN_VENDOR_ATMEL=y -CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -CONFIG_BRCMUTIL=m -# CONFIG_BRCMSMAC is not set -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -# CONFIG_BRCMFMAC_SDIO is not set -CONFIG_BRCMFMAC_USB=y -# CONFIG_BRCM_TRACING is not set -# CONFIG_BRCMDBG is not set +# CONFIG_BRCMFMAC is not set CONFIG_WLAN_VENDOR_CISCO=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_WLAN_VENDOR_INTERSIL=y # CONFIG_HOSTAP is not set -CONFIG_P54_COMMON=m -CONFIG_P54_USB=m -# CONFIG_P54_SPI is not set -CONFIG_P54_LEDS=y CONFIG_WLAN_VENDOR_MARVELL=y -CONFIG_LIBERTAS=m -CONFIG_LIBERTAS_USB=m -# CONFIG_LIBERTAS_SDIO is not set -# CONFIG_LIBERTAS_SPI is not set -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_MESH is not set -CONFIG_LIBERTAS_THINFIRM=m -# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set -CONFIG_LIBERTAS_THINFIRM_USB=m -CONFIG_MWIFIEX=m -# CONFIG_MWIFIEX_SDIO is not set -CONFIG_MWIFIEX_USB=m +# CONFIG_LIBERTAS is not set +# CONFIG_MWIFIEX is not set CONFIG_WLAN_VENDOR_MEDIATEK=y -CONFIG_MT7601U=m CONFIG_WLAN_VENDOR_RALINK=y -CONFIG_RT2X00=m -CONFIG_RT2500USB=m -CONFIG_RT73USB=m -CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -CONFIG_RT2800USB_RT3573=y -CONFIG_RT2800USB_RT53XX=y -CONFIG_RT2800USB_RT55XX=y -CONFIG_RT2800USB_UNKNOWN=y -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set CONFIG_WLAN_VENDOR_REALTEK=y -# CONFIG_RTL8187 is not set -CONFIG_RTL_CARDS=m -CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTLWIFI_USB=m -CONFIG_RTLWIFI_DEBUG=y -CONFIG_RTL8192C_COMMON=m -CONFIG_RTL8XXXU=m -# CONFIG_RTL8XXXU_UNTESTED is not set CONFIG_WLAN_VENDOR_RSI=y -# CONFIG_RSI_91X is not set CONFIG_WLAN_VENDOR_ST=y -# CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y -# CONFIG_WL1251 is not set -# CONFIG_WL12XX is not set -# CONFIG_WL18XX is not set -# CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m -CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set +# CONFIG_USB_ZD1201 is not set CONFIG_WLAN_VENDOR_QUANTENNA=y -CONFIG_RTL8812AU=m -CONFIG_RTL8188EU=m -# CONFIG_MAC80211_HWSIM is not set -CONFIG_USB_NET_RNDIS_WLAN=m +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # -CONFIG_WAN=y -CONFIG_HDLC=m -CONFIG_HDLC_RAW=m -CONFIG_HDLC_RAW_ETH=m -CONFIG_HDLC_CISCO=m -CONFIG_HDLC_FR=m -CONFIG_HDLC_PPP=m - -# -# X.25/LAPB support is disabled -# -CONFIG_DLCI=m -CONFIG_DLCI_MAX=8 -CONFIG_IEEE802154_DRIVERS=m -# CONFIG_IEEE802154_FAKELB is not set -# CONFIG_IEEE802154_AT86RF230 is not set -# CONFIG_IEEE802154_MRF24J40 is not set -# CONFIG_IEEE802154_CC2520 is not set -# CONFIG_IEEE802154_ATUSB is not set -# CONFIG_IEEE802154_ADF7242 is not set -# CONFIG_IEEE802154_CA8210 is not set +# CONFIG_WAN is not set +# CONFIG_NETDEVSIM is not set +# CONFIG_NET_FAILOVER is not set # CONFIG_ISDN is not set # CONFIG_NVM is not set @@ -2169,9 +1344,8 @@ CONFIG_IEEE802154_DRIVERS=m # Input device support # CONFIG_INPUT=y -CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_POLLDEV=m +# CONFIG_INPUT_POLLDEV is not set # CONFIG_INPUT_SPARSEKMAP is not set CONFIG_INPUT_MATRIXKMAP=y @@ -2182,7 +1356,7 @@ CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_JOYDEV=m +# CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set @@ -2194,6 +1368,7 @@ CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1050 is not set # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set @@ -2203,7 +1378,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_TCA6416 is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MCS is not set @@ -2214,108 +1388,82 @@ CONFIG_KEYBOARD_SAMSUNG=y # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_OMAP4 is not set -# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_CROS_EC is not set # CONFIG_KEYBOARD_CAP11XX is not set # CONFIG_KEYBOARD_BCM is not set CONFIG_INPUT_MOUSE=y -# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y # CONFIG_MOUSE_SERIAL is not set -CONFIG_MOUSE_APPLETOUCH=m -CONFIG_MOUSE_BCM5974=m -CONFIG_MOUSE_CYAPA=m -CONFIG_MOUSE_ELAN_I2C=m -CONFIG_MOUSE_ELAN_I2C_I2C=y -CONFIG_MOUSE_ELAN_I2C_SMBUS=y +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_CYAPA=y +# CONFIG_MOUSE_ELAN_I2C is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_MOUSE_GPIO is not set -CONFIG_MOUSE_SYNAPTICS_I2C=m -CONFIG_MOUSE_SYNAPTICS_USB=m -CONFIG_INPUT_JOYSTICK=y -CONFIG_JOYSTICK_ANALOG=m -CONFIG_JOYSTICK_A3D=m -CONFIG_JOYSTICK_ADI=m -CONFIG_JOYSTICK_COBRA=m -CONFIG_JOYSTICK_GF2K=m -CONFIG_JOYSTICK_GRIP=m -CONFIG_JOYSTICK_GRIP_MP=m -CONFIG_JOYSTICK_GUILLEMOT=m -CONFIG_JOYSTICK_INTERACT=m -CONFIG_JOYSTICK_SIDEWINDER=m -CONFIG_JOYSTICK_TMDC=m -CONFIG_JOYSTICK_IFORCE=m -CONFIG_JOYSTICK_IFORCE_USB=y -CONFIG_JOYSTICK_IFORCE_232=y -CONFIG_JOYSTICK_WARRIOR=m -CONFIG_JOYSTICK_MAGELLAN=m -CONFIG_JOYSTICK_SPACEORB=m -CONFIG_JOYSTICK_SPACEBALL=m -CONFIG_JOYSTICK_STINGER=m -CONFIG_JOYSTICK_TWIDJOY=m -CONFIG_JOYSTICK_ZHENHUA=m -CONFIG_JOYSTICK_DB9=m -CONFIG_JOYSTICK_GAMECON=m -CONFIG_JOYSTICK_TURBOGRAFX=m -CONFIG_JOYSTICK_AS5011=m -CONFIG_JOYSTICK_JOYDUMP=m -CONFIG_JOYSTICK_XPAD=m -CONFIG_JOYSTICK_XPAD_FF=y -CONFIG_JOYSTICK_XPAD_LEDS=y -CONFIG_JOYSTICK_WALKERA0701=m -CONFIG_JOYSTICK_PSXPAD_SPI=m -CONFIG_JOYSTICK_PSXPAD_SPI_FF=y -CONFIG_INPUT_TABLET=y -CONFIG_TABLET_USB_ACECAD=m -CONFIG_TABLET_USB_AIPTEK=m -CONFIG_TABLET_USB_GTCO=m -CONFIG_TABLET_USB_HANWANG=m -CONFIG_TABLET_USB_KBTAB=m -# CONFIG_TABLET_USB_PEGASUS is not set -# CONFIG_TABLET_SERIAL_WACOM4 is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y -CONFIG_TOUCHSCREEN_ADS7846=m +# CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_ADC is not set # CONFIG_TOUCHSCREEN_AR1021_I2C is not set CONFIG_TOUCHSCREEN_ATMEL_MXT=y # CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set +# CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -CONFIG_TOUCHSCREEN_EETI=m -CONFIG_TOUCHSCREEN_EGALAX=m +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_EGALAX is not set # CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set +# CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set -CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_ILI210X is not set +# CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set -CONFIG_TOUCHSCREEN_EKTF2127=m -CONFIG_TOUCHSCREEN_ELAN=m +# CONFIG_TOUCHSCREEN_EKTF2127 is not set +# CONFIG_TOUCHSCREEN_ELAN is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -CONFIG_TOUCHSCREEN_WACOM_I2C=m +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MCS5000 is not set -CONFIG_TOUCHSCREEN_MMS114=m +# CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set -CONFIG_TOUCHSCREEN_EDT_FT5X06=m +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set -CONFIG_TOUCHSCREEN_PIXCIR=m -CONFIG_TOUCHSCREEN_WDT87XX_I2C=m -CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +# CONFIG_TOUCHSCREEN_PIXCIR is not set +# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set +CONFIG_TOUCHSCREEN_USB_COMPOSITE=y CONFIG_TOUCHSCREEN_USB_EGALAX=y CONFIG_TOUCHSCREEN_USB_PANJIT=y CONFIG_TOUCHSCREEN_USB_3M=y @@ -2339,69 +1487,26 @@ CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y # CONFIG_TOUCHSCREEN_TSC2004 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set -CONFIG_TOUCHSCREEN_RM_TS=m -CONFIG_TOUCHSCREEN_SILEAD=m -CONFIG_TOUCHSCREEN_SIS_I2C=m +# CONFIG_TOUCHSCREEN_RM_TS is not set +# CONFIG_TOUCHSCREEN_SILEAD is not set +# CONFIG_TOUCHSCREEN_SIS_I2C is not set # CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_STMFTS is not set # CONFIG_TOUCHSCREEN_SUR40 is not set -CONFIG_TOUCHSCREEN_SURFACE3_SPI=m +# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set # CONFIG_TOUCHSCREEN_SX8654 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set -CONFIG_TOUCHSCREEN_SX865X=m -CONFIG_TOUCHSCREEN_DWAV_USB_MT=m -CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_ATMEL_CAPTOUCH is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_E3X0_BUTTON is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_GP2A is not set -# CONFIG_INPUT_GPIO_BEEPER is not set -# CONFIG_INPUT_GPIO_TILT_POLLED is not set -# CONFIG_INPUT_GPIO_DECODER is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set -# CONFIG_INPUT_REGULATOR_HAPTIC is not set -CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_PWM_BEEPER is not set -# CONFIG_INPUT_PWM_VIBRA is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_CMA3000 is not set -# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set -# CONFIG_INPUT_DRV260X_HAPTICS is not set -# CONFIG_INPUT_DRV2665_HAPTICS is not set -# CONFIG_INPUT_DRV2667_HAPTICS is not set -CONFIG_RMI4_CORE=m -# CONFIG_RMI4_I2C is not set -# CONFIG_RMI4_SPI is not set -# CONFIG_RMI4_SMB is not set -CONFIG_RMI4_F03=y -CONFIG_RMI4_F03_SERIO=m -CONFIG_RMI4_2D_SENSOR=y -CONFIG_RMI4_F11=y -CONFIG_RMI4_F12=y -CONFIG_RMI4_F30=y -# CONFIG_RMI4_F34 is not set -# CONFIG_RMI4_F54 is not set -# CONFIG_RMI4_F55 is not set +# CONFIG_TOUCHSCREEN_IQS5XX is not set +# CONFIG_INPUT_MISC is not set +# CONFIG_RMI4_CORE is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PARKBD is not set # CONFIG_SERIO_AMBAKMI is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set @@ -2411,9 +1516,9 @@ CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_APBPS2 is not set # CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_USERIO is not set -CONFIG_GAMEPORT=m -# CONFIG_GAMEPORT_NS558 is not set -# CONFIG_GAMEPORT_L4 is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support # # Character devices @@ -2431,6 +1536,8 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_N_GSM is not set # CONFIG_TRACE_SINK is not set +# CONFIG_NULL_TTY is not set +CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y CONFIG_DEVKMEM=y @@ -2467,6 +1574,7 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_SIFIVE is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_BCM63XX is not set @@ -2476,19 +1584,21 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_XILINX_PS_UART is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set # CONFIG_SERIAL_ST_ASC is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_SERIAL_DEV_BUS is not set -# CONFIG_PRINTER is not set -# CONFIG_PPDEV is not set # CONFIG_HVC_DCC is not set # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set -CONFIG_HW_RANDOM_TPM=y -# CONFIG_R3964 is not set +CONFIG_HW_RANDOM_EXYNOS=y # CONFIG_RAW_DRIVER is not set CONFIG_TCG_TPM=y +CONFIG_HW_RANDOM_TPM=y # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set # CONFIG_TCG_TIS_I2C_ATMEL is not set @@ -2498,7 +1608,9 @@ CONFIG_TCG_TIS_I2C_INFINEON=y # CONFIG_TCG_TIS_ST33ZP24_I2C is not set # CONFIG_TCG_TIS_ST33ZP24_SPI is not set # CONFIG_XILLYBUS is not set -CONFIG_EXYNOS_GPIOMEM=m +# end of Character devices + +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # # I2C support @@ -2522,6 +1634,8 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y # CONFIG_I2C_MUX_REG is not set # CONFIG_I2C_DEMUX_PINCTRL is not set # CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_ALGOBIT=y @@ -2537,11 +1651,10 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_EMEV2 is not set CONFIG_I2C_EXYNOS5=y CONFIG_I2C_GPIO=y -CONFIG_I2C_GPIO_CUSTOM=m +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set # CONFIG_I2C_NOMADIK is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set # CONFIG_I2C_RK3X is not set CONFIG_HAVE_S3C2410_I2C=y CONFIG_I2C_S3C2410=y @@ -2552,7 +1665,6 @@ CONFIG_I2C_S3C2410=y # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set @@ -2561,33 +1673,38 @@ CONFIG_I2C_S3C2410=y # # Other I2C/SMBus bus drivers # -CONFIG_I2C_CROS_EC_TUNNEL=y +# end of I2C Hardware Bus support + # CONFIG_I2C_STUB is not set # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set CONFIG_SPI=y CONFIG_SPI_MASTER=y +# CONFIG_SPI_MEM is not set # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_AXI_SPI_ENGINE is not set -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_BUTTERFLY is not set +# CONFIG_SPI_BITBANG is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_DESIGNWARE is not set -CONFIG_SPI_GPIO=y -# CONFIG_SPI_LM70_LLP is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set # CONFIG_SPI_FSL_SPI is not set # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PL022 is not set -# CONFIG_SPI_PXA2XX_PCI is not set # CONFIG_SPI_ROCKCHIP is not set -CONFIG_SPI_S3C64XX=m +CONFIG_SPI_S3C64XX=y # CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set @@ -2595,172 +1712,115 @@ CONFIG_SPI_S3C64XX=m # # SPI Protocol Masters # -CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_SLAVE is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set -CONFIG_PPS=y -CONFIG_PPS_DEBUG=y - -# -# PPS clients support -# -CONFIG_PPS_CLIENT_KTIMER=m -CONFIG_PPS_CLIENT_LDISC=m -CONFIG_PPS_CLIENT_PARPORT=m -CONFIG_PPS_CLIENT_GPIO=m - -# -# PPS generators support -# +# CONFIG_PPS is not set # # PTP clock support # # CONFIG_PTP_1588_CLOCK is not set -CONFIG_PINCTRL=y # -# Pin controllers +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # +# end of PTP clock support + +CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y # CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SINGLE is not set # CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_OCELOT is not set CONFIG_PINCTRL_SAMSUNG=y CONFIG_PINCTRL_EXYNOS=y CONFIG_PINCTRL_EXYNOS_ARM=y -CONFIG_PINCTRL_EXYNOS5440=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_SYSFS=y +# CONFIG_GPIO_SYSFS is not set # # Memory mapped GPIO drivers # # CONFIG_GPIO_74XX_MMIO is not set # CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_FTGPIO010 is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set # CONFIG_GPIO_GRGPIO is not set -# CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MPC8XXX is not set # CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SAMA5D2_PIOBU is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_ZEVIO is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADP5588 is not set # CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set # CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders # # MFD GPIO expanders # # CONFIG_HTC_EGPIO is not set -# CONFIG_GPIO_WM8994 is not set +# end of MFD GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7301 is not set # CONFIG_GPIO_MC33880 is not set # CONFIG_GPIO_PISOSR is not set # CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders # # USB GPIO expanders # -CONFIG_W1=m +# end of USB GPIO expanders -# -# 1-wire Bus Masters -# -CONFIG_W1_MASTER_DS2490=m -CONFIG_W1_MASTER_DS2482=m -CONFIG_W1_MASTER_DS1WM=m -CONFIG_W1_MASTER_GPIO=m - -# -# 1-wire Slaves -# -CONFIG_W1_SLAVE_THERM=m -CONFIG_W1_SLAVE_SMEM=m -# CONFIG_W1_SLAVE_DS2405 is not set -CONFIG_W1_SLAVE_DS2408=m -# CONFIG_W1_SLAVE_DS2408_READBACK is not set -CONFIG_W1_SLAVE_DS2413=m -CONFIG_W1_SLAVE_DS2406=m -CONFIG_W1_SLAVE_DS2423=m -# CONFIG_W1_SLAVE_DS2805 is not set -CONFIG_W1_SLAVE_DS2431=m -CONFIG_W1_SLAVE_DS2433=m -CONFIG_W1_SLAVE_DS2433_CRC=y -# CONFIG_W1_SLAVE_DS2438 is not set -CONFIG_W1_SLAVE_DS2760=m -CONFIG_W1_SLAVE_DS2780=m -CONFIG_W1_SLAVE_DS2781=m -CONFIG_W1_SLAVE_DS28E04=m +# CONFIG_GPIO_MOCKUP is not set +# CONFIG_W1 is not set # CONFIG_POWER_AVS is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_BRCMKONA is not set # CONFIG_POWER_RESET_BRCMSTB is not set -CONFIG_POWER_RESET_GPIO=y -CONFIG_POWER_RESET_GPIO_RESTART=y +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set # CONFIG_POWER_RESET_RESTART is not set # CONFIG_POWER_RESET_VERSATILE is not set CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y # CONFIG_SYSCON_REBOOT_MODE is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_GENERIC_ADC_BATTERY is not set -# CONFIG_TEST_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_LEGO_EV3 is not set -CONFIG_BATTERY_SBS=y -# CONFIG_CHARGER_SBS is not set -# CONFIG_BATTERY_BQ27XXX is not set -CONFIG_BATTERY_MAX17040=y -CONFIG_BATTERY_MAX17042=y -# CONFIG_BATTERY_MAX1721X is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_LTC3651 is not set -# CONFIG_CHARGER_DETECTOR_MAX14656 is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24257 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_BQ25890 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_BATTERY_GAUGE_LTC2941 is not set -# CONFIG_CHARGER_RT9455 is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set # @@ -2781,6 +1841,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set @@ -2815,6 +1876,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set @@ -2841,11 +1903,13 @@ CONFIG_SENSORS_LM90=y # CONFIG_SENSORS_LM95245 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set -CONFIG_SENSORS_NTC_THERMISTOR=y +# CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set CONFIG_SENSORS_PWM_FAN=y @@ -2860,18 +1924,16 @@ CONFIG_SENSORS_PWM_FAN=y # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_SCH5636 is not set # CONFIG_SENSORS_STTS751 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set -# CONFIG_SENSORS_ADS1015 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set -# CONFIG_SENSORS_INA2XX is not set +CONFIG_SENSORS_INA2XX=y # CONFIG_SENSORS_INA3221 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set @@ -2881,6 +1943,7 @@ CONFIG_SENSORS_PWM_FAN=y # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83773G is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set @@ -2891,10 +1954,11 @@ CONFIG_SENSORS_PWM_FAN=y # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -2904,32 +1968,31 @@ CONFIG_THERMAL_GOV_STEP_WISE=y # CONFIG_THERMAL_GOV_BANG_BANG is not set # CONFIG_THERMAL_GOV_USER_SPACE is not set # CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set -CONFIG_CPU_THERMAL=y # CONFIG_CLOCK_THERMAL is not set # CONFIG_DEVFREQ_THERMAL is not set CONFIG_THERMAL_EMULATION=y +# CONFIG_THERMAL_MMIO is not set # CONFIG_QORIQ_THERMAL is not set -# -# ACPI INT340X thermal drivers -# - -# -# Texas Instruments thermal drivers -# -# CONFIG_TI_SOC_THERMAL is not set - # # Samsung thermal drivers # CONFIG_EXYNOS_THERMAL=y +# end of Samsung thermal drivers + # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_WATCHDOG_SYSFS is not set +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + # # Watchdog Device Drivers # @@ -2939,6 +2002,7 @@ CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y # CONFIG_ZIIRAVE_WATCHDOG is not set # CONFIG_ARM_SP805_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_FTWDT010_WATCHDOG is not set CONFIG_HAVE_S3C2410_WATCHDOG=y CONFIG_S3C2410_WATCHDOG=y # CONFIG_DW_WATCHDOG is not set @@ -2949,16 +2013,7 @@ CONFIG_S3C2410_WATCHDOG=y # USB-based Watchdog Cards # # CONFIG_USBPCWATCHDOG is not set - -# -# Watchdog Pretimeout Governors -# -# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y # CONFIG_BCMA is not set @@ -2977,9 +2032,7 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_CROS_EC=y -CONFIG_MFD_CROS_EC_I2C=y -CONFIG_MFD_CROS_EC_SPI=y +# CONFIG_MFD_MADERA is not set # CONFIG_MFD_ASIC3 is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set @@ -2999,14 +2052,15 @@ CONFIG_MFD_CROS_EC_SPI=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX14577=y # CONFIG_MFD_MAX77620 is not set -# CONFIG_MFD_MAX77686 is not set -# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77650 is not set +CONFIG_MFD_MAX77686=y +CONFIG_MFD_MAX77693=y # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set +CONFIG_MFD_MAX8997=y # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set @@ -3017,7 +2071,6 @@ CONFIG_MFD_CROS_EC_SPI=y # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_RT5033 is not set -# CONFIG_MFD_RTSX_USB is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_RK808 is not set # CONFIG_MFD_RN5T618 is not set @@ -3053,23 +2106,30 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set # CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_TC6387XB is not set # CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_LOCHNAGAR is not set # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set -CONFIG_MFD_WM8994=m +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +# end of Multifunction device drivers + CONFIG_REGULATOR=y # CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_ANATOP is not set # CONFIG_REGULATOR_DA9210 is not set @@ -3084,11 +2144,17 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LP8755 is not set # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set +CONFIG_REGULATOR_MAX14577=y # CONFIG_REGULATOR_MAX1586 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX8973 is not set +CONFIG_REGULATOR_MAX8997=y +CONFIG_REGULATOR_MAX77686=y +CONFIG_REGULATOR_MAX77693=y +CONFIG_REGULATOR_MAX77802=y +# CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set @@ -3098,6 +2164,9 @@ CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_S2MPA01=y CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y +# CONFIG_REGULATOR_SLG51000 is not set +# CONFIG_REGULATOR_SY8106A is not set +# CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set @@ -3105,77 +2174,30 @@ CONFIG_REGULATOR_S5M8767=y # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS6524X is not set # CONFIG_REGULATOR_VCTRL is not set -# CONFIG_REGULATOR_WM8994 is not set CONFIG_CEC_CORE=y CONFIG_CEC_NOTIFIER=y -CONFIG_RC_CORE=y -CONFIG_RC_MAP=y -CONFIG_RC_DECODERS=y -CONFIG_LIRC=m -CONFIG_IR_LIRC_CODEC=m -CONFIG_IR_NEC_DECODER=y -CONFIG_IR_RC5_DECODER=y -CONFIG_IR_RC6_DECODER=y -CONFIG_IR_JVC_DECODER=y -CONFIG_IR_SONY_DECODER=y -CONFIG_IR_SANYO_DECODER=y -CONFIG_IR_SHARP_DECODER=y -CONFIG_IR_MCE_KBD_DECODER=y -CONFIG_IR_XMP_DECODER=y -CONFIG_RC_DEVICES=y -CONFIG_RC_ATI_REMOTE=m -# CONFIG_IR_HIX5HD2 is not set -CONFIG_IR_IMON=m -CONFIG_IR_MCEUSB=m -CONFIG_IR_REDRAT3=m -# CONFIG_IR_SPI is not set -CONFIG_IR_STREAMZAP=m -CONFIG_IR_IGORPLUGUSB=m -CONFIG_IR_IGUANA=m -CONFIG_IR_TTUSBIR=m -# CONFIG_RC_LOOPBACK is not set -CONFIG_IR_GPIO_CIR=y -CONFIG_IR_GPIOPLUG_CIR=m -# CONFIG_IR_GPIO_TX is not set -# CONFIG_IR_PWM_TX is not set -# CONFIG_IR_SERIAL is not set -# CONFIG_IR_SIR is not set +# CONFIG_RC_CORE is not set CONFIG_MEDIA_SUPPORT=y # # Multimedia core support # CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -CONFIG_MEDIA_RADIO_SUPPORT=y -CONFIG_MEDIA_SDR_SUPPORT=y +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set CONFIG_MEDIA_CEC_SUPPORT=y -# CONFIG_MEDIA_CEC_RC is not set -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y +# CONFIG_MEDIA_CONTROLLER is not set CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L2_I2C=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m -CONFIG_V4L2_MEM2MEM_DEV=y -# CONFIG_V4L2_FLASH_LED_CLASS is not set CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_VMALLOC=m -CONFIG_VIDEOBUF_DVB=m -CONFIG_VIDEOBUF2_CORE=y -CONFIG_VIDEOBUF2_MEMOPS=y -CONFIG_VIDEOBUF2_DMA_CONTIG=y -CONFIG_VIDEOBUF2_VMALLOC=m -CONFIG_DVB_CORE=y -CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m -CONFIG_DVB_MAX_ADAPTERS=8 -# CONFIG_DVB_DYNAMIC_MINORS is not set -# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # # Media drivers @@ -3185,58 +2207,58 @@ CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # -CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y CONFIG_USB_GSPCA=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GL860=m -CONFIG_USB_GSPCA_BENQ=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_CPIA1=m -CONFIG_USB_GSPCA_DTCS033=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_JEILINJ=m -CONFIG_USB_GSPCA_JL2005BCD=m -CONFIG_USB_GSPCA_KINECT=m -CONFIG_USB_GSPCA_KONICA=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_NW80X=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_OV534_9=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7302=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SE401=m -CONFIG_USB_GSPCA_SN9C2028=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SPCA1528=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_SQ930X=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_STK1135=m -CONFIG_USB_GSPCA_STV0680=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TOPRO=m -CONFIG_USB_GSPCA_TOUPTEK=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_VICAM=m -CONFIG_USB_GSPCA_XIRLINK_CIT=m -CONFIG_USB_GSPCA_ZC3XX=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STK1135 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set CONFIG_USB_PWC=m # CONFIG_USB_PWC_DEBUG is not set CONFIG_USB_PWC_INPUT_EVDEV=y @@ -3244,189 +2266,47 @@ CONFIG_VIDEO_CPIA2=m CONFIG_USB_ZR364XX=m CONFIG_USB_STKWEBCAM=m CONFIG_USB_S2255=m -CONFIG_VIDEO_USBTV=m - -# -# Analog TV USB devices -# -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_STK1160_COMMON=m -CONFIG_VIDEO_STK1160=m -CONFIG_VIDEO_GO7007=m -CONFIG_VIDEO_GO7007_USB=m -CONFIG_VIDEO_GO7007_LOADER=m -CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m - -# -# Analog/digital TV USB devices -# -CONFIG_VIDEO_AU0828=m -CONFIG_VIDEO_AU0828_V4L2=y -CONFIG_VIDEO_AU0828_RC=y -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_TM6000=m -CONFIG_VIDEO_TM6000_ALSA=m -CONFIG_VIDEO_TM6000_DVB=m - -# -# Digital TV USB devices -# -CONFIG_DVB_USB=m -# CONFIG_DVB_USB_DEBUG is not set -CONFIG_DVB_USB_DIB3000MC=m -CONFIG_DVB_USB_A800=m -CONFIG_DVB_USB_DIBUSB_MB=m -CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -CONFIG_DVB_USB_DIBUSB_MC=m -CONFIG_DVB_USB_DIB0700=m -CONFIG_DVB_USB_UMT_010=m -CONFIG_DVB_USB_CXUSB=m -CONFIG_DVB_USB_M920X=m -CONFIG_DVB_USB_DIGITV=m -CONFIG_DVB_USB_VP7045=m -CONFIG_DVB_USB_VP702X=m -CONFIG_DVB_USB_GP8PSK=m -CONFIG_DVB_USB_NOVA_T_USB2=m -CONFIG_DVB_USB_TTUSB2=m -CONFIG_DVB_USB_DTT200U=m -CONFIG_DVB_USB_OPERA1=m -CONFIG_DVB_USB_AF9005=m -CONFIG_DVB_USB_AF9005_REMOTE=m -CONFIG_DVB_USB_PCTV452E=m -CONFIG_DVB_USB_DW2102=m -CONFIG_DVB_USB_CINERGY_T2=m -CONFIG_DVB_USB_DTV5100=m -CONFIG_DVB_USB_FRIIO=m -CONFIG_DVB_USB_AZ6027=m -CONFIG_DVB_USB_TECHNISAT_USB2=m -CONFIG_DVB_USB_V2=m -CONFIG_DVB_USB_AF9015=m -CONFIG_DVB_USB_AF9035=m -CONFIG_DVB_USB_ANYSEE=m -CONFIG_DVB_USB_AU6610=m -CONFIG_DVB_USB_AZ6007=m -CONFIG_DVB_USB_CE6230=m -CONFIG_DVB_USB_EC168=m -CONFIG_DVB_USB_GL861=m -CONFIG_DVB_USB_LME2510=m -CONFIG_DVB_USB_MXL111SF=m -CONFIG_DVB_USB_RTL28XXU=m -CONFIG_DVB_USB_DVBSKY=m -# CONFIG_DVB_USB_ZD1301 is not set -CONFIG_SMS_USB_DRV=m -CONFIG_DVB_B2C2_FLEXCOP_USB=m -# CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set -CONFIG_DVB_AS102=m # # Webcam, TV (analog/digital) USB devices # CONFIG_VIDEO_EM28XX=m CONFIG_VIDEO_EM28XX_V4L2=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_EM28XX_RC=m - -# -# Software defined radio USB devices -# -CONFIG_USB_AIRSPY=m -CONFIG_USB_HACKRF=m -CONFIG_USB_MSI2500=m # # USB HDMI CEC adapters # -# CONFIG_USB_PULSE8_CEC is not set -# CONFIG_USB_RAINSHADOW_CEC is not set -CONFIG_V4L_PLATFORM_DRIVERS=y -# CONFIG_VIDEO_MUX is not set -# CONFIG_SOC_CAMERA is not set -CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m -CONFIG_VIDEO_EXYNOS4_IS_COMMON=m -CONFIG_VIDEO_S5P_FIMC=m -CONFIG_VIDEO_S5P_MIPI_CSIS=m -CONFIG_VIDEO_EXYNOS_FIMC_LITE=m -CONFIG_VIDEO_EXYNOS4_FIMC_IS=m -CONFIG_VIDEO_EXYNOS4_ISP_DMA_CAPTURE=y -# CONFIG_VIDEO_XILINX is not set -CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set -# CONFIG_VIDEO_SAMSUNG_S5P_G2D is not set -CONFIG_VIDEO_SAMSUNG_S5P_JPEG=y -CONFIG_VIDEO_SAMSUNG_S5P_MFC=y -CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=y -# CONFIG_VIDEO_SH_VEU is not set -CONFIG_V4L_TEST_DRIVERS=y -# CONFIG_VIDEO_VIMC is not set -CONFIG_VIDEO_VIVID=m -# CONFIG_VIDEO_VIVID_CEC is not set -CONFIG_VIDEO_VIVID_MAX_DEVS=64 -# CONFIG_VIDEO_VIM2M is not set -CONFIG_DVB_PLATFORM_DRIVERS=y -# CONFIG_DVB_C8SECTPFE is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set +# CONFIG_V4L_TEST_DRIVERS is not set CONFIG_CEC_PLATFORM_DRIVERS=y +# CONFIG_CEC_GPIO is not set CONFIG_VIDEO_SAMSUNG_S5P_CEC=y -# CONFIG_SDR_PLATFORM_DRIVERS is not set # # Supported MMC/SDIO adapters # -# CONFIG_SMS_SDIO_DRV is not set -CONFIG_RADIO_ADAPTERS=y -# CONFIG_RADIO_SI470X is not set -# CONFIG_RADIO_SI4713 is not set -# CONFIG_USB_MR800 is not set -# CONFIG_USB_DSBR is not set -# CONFIG_RADIO_SHARK is not set -# CONFIG_RADIO_SHARK2 is not set -# CONFIG_USB_KEENE is not set -# CONFIG_USB_RAREMONO is not set -# CONFIG_USB_MA901 is not set -# CONFIG_RADIO_TEA5764 is not set -# CONFIG_RADIO_SAA7706H is not set -# CONFIG_RADIO_TEF6862 is not set -# CONFIG_RADIO_WL1273 is not set - -# -# Texas Instruments WL128x FM driver (ST based) -# -CONFIG_MEDIA_COMMON_OPTIONS=y - -# -# common driver options -# -CONFIG_VIDEO_CX2341X=m CONFIG_VIDEO_TVEEPROM=m -CONFIG_CYPRESS_FIRMWARE=m -CONFIG_DVB_B2C2_FLEXCOP=m -CONFIG_SMS_SIANO_MDTV=m -CONFIG_SMS_SIANO_RC=y -CONFIG_VIDEO_V4L2_TPG=m +# CONFIG_CYPRESS_FIRMWARE is not set +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_VMALLOC=y # # Media ancillary drivers (tuners, sensors, i2c, spi, frontends) # CONFIG_MEDIA_SUBDRV_AUTOSELECT=y -CONFIG_MEDIA_ATTACH=y -CONFIG_VIDEO_IR_I2C=y +CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y + +# +# I2C drivers hidden by 'Autoselect ancillary drivers' +# # # Audio decoders, processors and mixers # CONFIG_VIDEO_MSP3400=m -CONFIG_VIDEO_CS53L32A=m -CONFIG_VIDEO_UDA1342=m -CONFIG_VIDEO_WM8775=m -CONFIG_VIDEO_SONY_BTF_MPX=m # # RDS decoders @@ -3437,14 +2317,10 @@ CONFIG_VIDEO_SONY_BTF_MPX=m # CONFIG_VIDEO_SAA711X=m CONFIG_VIDEO_TVP5150=m -CONFIG_VIDEO_TW2804=m -CONFIG_VIDEO_TW9903=m -CONFIG_VIDEO_TW9906=m # # Video and audio decoders # -CONFIG_VIDEO_CX25840=m # # Video encoders @@ -3454,9 +2330,12 @@ CONFIG_VIDEO_CX25840=m # Camera sensor devices # CONFIG_VIDEO_OV2640=m -CONFIG_VIDEO_OV7640=m CONFIG_VIDEO_MT9V011=m +# +# Lens drivers +# + # # Flash devices # @@ -3478,167 +2357,21 @@ CONFIG_VIDEO_MT9V011=m # # -# Sensors used on soc_camera driver +# SPI drivers hidden by 'Autoselect ancillary drivers' # -CONFIG_MEDIA_TUNER=y -CONFIG_MEDIA_TUNER_SIMPLE=y -CONFIG_MEDIA_TUNER_TDA8290=y -CONFIG_MEDIA_TUNER_TDA827X=y -CONFIG_MEDIA_TUNER_TDA18271=y -CONFIG_MEDIA_TUNER_TDA9887=y -CONFIG_MEDIA_TUNER_TEA5761=y -CONFIG_MEDIA_TUNER_TEA5767=y -CONFIG_MEDIA_TUNER_MSI001=m -CONFIG_MEDIA_TUNER_MT20XX=y -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2063=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=y -CONFIG_MEDIA_TUNER_XC5000=y -CONFIG_MEDIA_TUNER_XC4000=y -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=y -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_MEDIA_TUNER_FC0011=m -CONFIG_MEDIA_TUNER_FC0012=m -CONFIG_MEDIA_TUNER_FC0013=m -CONFIG_MEDIA_TUNER_TDA18212=m -CONFIG_MEDIA_TUNER_E4000=m -CONFIG_MEDIA_TUNER_FC2580=m -CONFIG_MEDIA_TUNER_TUA9001=m -CONFIG_MEDIA_TUNER_SI2157=m -CONFIG_MEDIA_TUNER_IT913X=m -CONFIG_MEDIA_TUNER_R820T=m -CONFIG_MEDIA_TUNER_QM1D1C0042=m # -# Multistandard (satellite) frontends +# Media SPI Adapters # -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m -CONFIG_DVB_M88DS3103=m +# end of Media SPI Adapters # -# Multistandard (cable + terrestrial) frontends +# DVB Frontend drivers hidden by 'Autoselect ancillary drivers' # -CONFIG_DVB_DRXK=m -CONFIG_DVB_TDA18271C2DD=m -CONFIG_DVB_SI2165=m -CONFIG_DVB_MN88472=m -CONFIG_DVB_MN88473=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_CX24123=m -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_S5H1420=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TUNER_ITD1000=m -CONFIG_DVB_TUNER_CX24113=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_CX24120=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_TS2020=m -CONFIG_DVB_DS3000=m -CONFIG_DVB_TDA10071=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_DRXD=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_CXD2820R=m -CONFIG_DVB_RTL2830=m -CONFIG_DVB_RTL2832=m -CONFIG_DVB_RTL2832_SDR=m -CONFIG_DVB_SI2168=m -CONFIG_DVB_AS102_FE=m -CONFIG_DVB_GP8PSK_FE=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m -CONFIG_DVB_STV0297=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_NXT200X=m -CONFIG_DVB_BCM3510=m -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_LGDT3306A=m -CONFIG_DVB_LG2160=m -CONFIG_DVB_S5H1409=m -CONFIG_DVB_AU8522=m -CONFIG_DVB_AU8522_DTV=m -CONFIG_DVB_AU8522_V4L=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_S921=m -CONFIG_DVB_DIB8000=m -CONFIG_DVB_MB86A20S=m - -# -# ISDB-S (satellite) & ISDB-T (terrestrial) frontends -# -CONFIG_DVB_TC90522=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_DRX39XYJ=m -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LNBP22=m -CONFIG_DVB_ISL6421=m -CONFIG_DVB_ISL6423=m -CONFIG_DVB_A8293=m -CONFIG_DVB_SP2=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m -CONFIG_DVB_M88RS2000=m -CONFIG_DVB_AF9033=m # # Tools to develop new frontends # -# CONFIG_DVB_DUMMY_FE is not set # # Graphics support @@ -3653,6 +2386,7 @@ CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_LOAD_EDID_FIRMWARE=y +# CONFIG_DRM_DP_CEC is not set # # I2C encoder or helper chips @@ -3660,29 +2394,43 @@ CONFIG_DRM_LOAD_EDID_FIRMWARE=y # CONFIG_DRM_I2C_CH7006 is not set # CONFIG_DRM_I2C_SIL164 is not set # CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_I2C_NXP_TDA9950 is not set +# end of I2C encoder or helper chips + +# +# ARM devices +# # CONFIG_DRM_HDLCD is not set # CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_KOMEDA is not set +# end of ARM devices # # ACP (Audio CoProcessor) Configuration # +# end of ACP (Audio CoProcessor) Configuration + # CONFIG_DRM_VGEM is not set +# CONFIG_DRM_VKMS is not set CONFIG_DRM_EXYNOS=y -CONFIG_DRM_EXYNOS_IOMMU=y # # CRTCs # -# CONFIG_DRM_EXYNOS_FIMD is not set -# CONFIG_DRM_EXYNOS5433_DECON is not set +CONFIG_DRM_EXYNOS_FIMD=y +CONFIG_DRM_EXYNOS5433_DECON=y # CONFIG_DRM_EXYNOS7_DECON is not set CONFIG_DRM_EXYNOS_MIXER=y -# CONFIG_DRM_EXYNOS_VIDI is not set +CONFIG_DRM_EXYNOS_VIDI=y # # Encoders and Bridges # +CONFIG_DRM_EXYNOS_DPI=y +CONFIG_DRM_EXYNOS_DSI=y +CONFIG_DRM_EXYNOS_DP=y CONFIG_DRM_EXYNOS_HDMI=y +CONFIG_DRM_EXYNOS_MIC=y # # Sub-drivers @@ -3691,9 +2439,12 @@ CONFIG_DRM_EXYNOS_G2D=y CONFIG_DRM_EXYNOS_IPP=y CONFIG_DRM_EXYNOS_FIMC=y CONFIG_DRM_EXYNOS_ROTATOR=y -# CONFIG_DRM_UDL is not set +CONFIG_DRM_EXYNOS_SCALER=y +CONFIG_DRM_EXYNOS_GSC=y +CONFIG_DRM_UDL=y # CONFIG_DRM_ARMADA is not set # CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_RCAR_LVDS is not set # CONFIG_DRM_OMAP is not set # CONFIG_DRM_TILCDC is not set # CONFIG_DRM_FSL_DCU is not set @@ -3703,18 +2454,20 @@ CONFIG_DRM_PANEL=y # # Display Panels # -# CONFIG_DRM_PANEL_LVDS is not set -CONFIG_DRM_PANEL_SIMPLE=y -# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set -# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set -CONFIG_DRM_PANEL_SAMSUNG_LD9040=y +# CONFIG_DRM_PANEL_ARM_VERSATILE is not set +# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set -# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set -CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set -# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set +# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set +# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set +# end of Display Panels + CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y @@ -3722,70 +2475,62 @@ CONFIG_DRM_PANEL_BRIDGE=y # Display Interface Bridges # # CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_DUMB_VGA_DAC is not set # CONFIG_DRM_LVDS_ENCODER is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set -CONFIG_DRM_NXP_PTN3460=y -CONFIG_DRM_PARADE_PS8622=y +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set +# CONFIG_DRM_SII9234 is not set +# CONFIG_DRM_THINE_THC63LVD1024 is not set +# CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TI_TFP410 is not set +# CONFIG_DRM_TI_SN65DSI86 is not set +CONFIG_DRM_ANALOGIX_DP=y # CONFIG_DRM_I2C_ADV7511 is not set +# end of Display Interface Bridges + # CONFIG_DRM_STI is not set +# CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_MXSFB is not set -# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_GM12U320 is not set +# CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9225 is not set +# CONFIG_TINYDRM_ILI9341 is not set +# CONFIG_TINYDRM_MI0283QT is not set +# CONFIG_TINYDRM_REPAPER is not set +# CONFIG_TINYDRM_ST7586 is not set +# CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_PL111 is not set +# CONFIG_DRM_TVE200 is not set +# CONFIG_DRM_LIMA is not set +# CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_MCDE is not set # CONFIG_DRM_LEGACY is not set -# CONFIG_DRM_LIB_RANDOM is not set - -# -# ARM GPU Configuration -# -CONFIG_MALI_MIDGARD=y -# CONFIG_MALI_GATOR_SUPPORT is not set -# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set -CONFIG_MALI_DEVFREQ=y -CONFIG_MALI_DMA_FENCE=y -CONFIG_MALI_PLATFORM_NAME="devicetree" -CONFIG_MALI_EXPERT=y -# CONFIG_MALI_CORESTACK is not set -# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set -# CONFIG_MALI_DEBUG is not set -# CONFIG_MALI_FENCE_DEBUG is not set -# CONFIG_MALI_NO_MALI is not set -# CONFIG_MALI_TRACE_TIMELINE is not set -# CONFIG_MALI_SYSTEM_TRACE is not set -# CONFIG_MALI_2MB_ALLOC is not set -# CONFIG_MALI_PWRSOFT_765 is not set -CONFIG_MALI_KUTF=m +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # -CONFIG_FB=y -CONFIG_FIRMWARE_EDID=y CONFIG_FB_CMDLINE=y CONFIG_FB_NOTIFY=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y -# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set # CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYS_FOPS=y CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -CONFIG_FB_BACKLIGHT=y CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set +CONFIG_FB_TILEBLITTING=y # # Frame buffer hardware drivers @@ -3793,45 +2538,22 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_ARMCLCD is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_S3C is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_AUO_K190X is not set -# CONFIG_FB_SIMPLE is not set +CONFIG_FB_SIMPLE=y # CONFIG_FB_SSD1307 is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set -CONFIG_LCD_PLATFORM=y -# CONFIG_LCD_S6E63M0 is not set -# CONFIG_LCD_LD9040 is not set -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_HX8357 is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_PWM=y -# CONFIG_BACKLIGHT_PM8941_WLED is not set -# CONFIG_BACKLIGHT_ADP8860 is not set -# CONFIG_BACKLIGHT_ADP8870 is not set -# CONFIG_BACKLIGHT_LM3630A is not set -# CONFIG_BACKLIGHT_LM3639 is not set -# CONFIG_BACKLIGHT_LP855X is not set -# CONFIG_BACKLIGHT_GPIO is not set -# CONFIG_BACKLIGHT_LV5207LP is not set -# CONFIG_BACKLIGHT_BD6107 is not set -# CONFIG_BACKLIGHT_ARCXCNN is not set -# CONFIG_VGASTATE is not set +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set +# end of Backlight & LCD device support + CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y @@ -3842,335 +2564,130 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set +# end of Console display driver support + CONFIG_LOGO=y CONFIG_LOGO_LINUX_MONO=y CONFIG_LOGO_LINUX_VGA16=y CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set -CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_PCM_ELD=y -CONFIG_SND_PCM_IEC958=y -CONFIG_SND_DMAENGINE_PCM=y -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_JACK=y -CONFIG_SND_JACK_INPUT_DEV=y -# CONFIG_SND_OSSEMUL is not set -CONFIG_SND_PCM_TIMER=y -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_PROC_FS=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_VMASTER=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_MTS64 is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -# CONFIG_SND_PORTMAN2X4 is not set +# end of Graphics support -# -# HD-Audio -# -CONFIG_SND_HDA_PREALLOC_SIZE=64 -CONFIG_SND_ARM=y -# CONFIG_SND_ARMAACI is not set -CONFIG_SND_SPI=y -CONFIG_SND_USB=y -CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_UA101=m -CONFIG_SND_USB_CAIAQ=m -CONFIG_SND_USB_CAIAQ_INPUT=y -CONFIG_SND_USB_6FIRE=m -CONFIG_SND_USB_HIFACE=m -CONFIG_SND_BCD2000=m -CONFIG_SND_USB_LINE6=m -CONFIG_SND_USB_POD=m -CONFIG_SND_USB_PODHD=m -CONFIG_SND_USB_TONEPORT=m -CONFIG_SND_USB_VARIAX=m -CONFIG_SND_SOC=y -CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_DESIGNWARE_I2S is not set - -# -# SoC Audio for Freescale CPUs -# - -# -# Common SoC Audio options for Freescale CPUs: -# -# CONFIG_SND_SOC_FSL_ASRC is not set -# CONFIG_SND_SOC_FSL_SAI is not set -# CONFIG_SND_SOC_FSL_SSI is not set -# CONFIG_SND_SOC_FSL_SPDIF is not set -# CONFIG_SND_SOC_FSL_ESAI is not set -# CONFIG_SND_SOC_IMX_AUDMUX is not set -# CONFIG_SND_I2S_HI6210_I2S is not set -# CONFIG_SND_SOC_IMG is not set -CONFIG_SND_SOC_SAMSUNG=y -CONFIG_SND_SAMSUNG_PCM=y -CONFIG_SND_SAMSUNG_SPDIF=m -CONFIG_SND_SAMSUNG_I2S=y -CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m -CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF=m -CONFIG_SND_SOC_SMDK_WM8994_PCM=m -CONFIG_SND_SOC_SNOW=m -CONFIG_SND_SOC_ODROID=y -CONFIG_SND_SOC_ARNDALE_RT5631_ALC5631=m - -# -# STMicroelectronics STM32 SOC audio support -# -# CONFIG_SND_SOC_XTFPGA_I2S is not set -# CONFIG_ZX_TDM is not set -CONFIG_SND_SOC_I2C_AND_SPI=y - -# -# CODEC drivers -# -CONFIG_SND_SOC_WM_HUBS=m -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_ADAU1701 is not set -# CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set -# CONFIG_SND_SOC_ADAU7002 is not set -# CONFIG_SND_SOC_AK4104 is not set -# CONFIG_SND_SOC_AK4554 is not set -# CONFIG_SND_SOC_AK4613 is not set -# CONFIG_SND_SOC_AK4642 is not set -# CONFIG_SND_SOC_AK5386 is not set -# CONFIG_SND_SOC_ALC5623 is not set -# CONFIG_SND_SOC_BT_SCO is not set -# CONFIG_SND_SOC_CS35L32 is not set -# CONFIG_SND_SOC_CS35L33 is not set -# CONFIG_SND_SOC_CS35L34 is not set -# CONFIG_SND_SOC_CS35L35 is not set -# CONFIG_SND_SOC_CS42L42 is not set -# CONFIG_SND_SOC_CS42L51_I2C is not set -# CONFIG_SND_SOC_CS42L52 is not set -# CONFIG_SND_SOC_CS42L56 is not set -# CONFIG_SND_SOC_CS42L73 is not set -# CONFIG_SND_SOC_CS4265 is not set -# CONFIG_SND_SOC_CS4270 is not set -# CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set -# CONFIG_SND_SOC_CS42XX8_I2C is not set -# CONFIG_SND_SOC_CS43130 is not set -# CONFIG_SND_SOC_CS4349 is not set -# CONFIG_SND_SOC_CS53L30 is not set -# CONFIG_SND_SOC_DIO2125 is not set -CONFIG_SND_SOC_HDMI_CODEC=y -# CONFIG_SND_SOC_ES7134 is not set -# CONFIG_SND_SOC_ES8316 is not set -# CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set -# CONFIG_SND_SOC_GTM601 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set -CONFIG_SND_SOC_MAX98090=y -CONFIG_SND_SOC_MAX98095=m -# CONFIG_SND_SOC_MAX98504 is not set -# CONFIG_SND_SOC_MAX98927 is not set -# CONFIG_SND_SOC_MAX9860 is not set -# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set -# CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set -# CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set -# CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set -# CONFIG_SND_SOC_RT5616 is not set -CONFIG_SND_SOC_RT5631=m -# CONFIG_SND_SOC_RT5677_SPI is not set -# CONFIG_SND_SOC_SGTL5000 is not set -# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set -CONFIG_SND_SOC_SPDIF=y -# CONFIG_SND_SOC_SSM2602_SPI is not set -# CONFIG_SND_SOC_SSM2602_I2C is not set -# CONFIG_SND_SOC_SSM4567 is not set -# CONFIG_SND_SOC_STA32X is not set -# CONFIG_SND_SOC_STA350 is not set -# CONFIG_SND_SOC_STI_SAS is not set -# CONFIG_SND_SOC_TAS2552 is not set -# CONFIG_SND_SOC_TAS5086 is not set -# CONFIG_SND_SOC_TAS571X is not set -# CONFIG_SND_SOC_TAS5720 is not set -# CONFIG_SND_SOC_TFA9879 is not set -# CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set -# CONFIG_SND_SOC_TLV320AIC31XX is not set -# CONFIG_SND_SOC_TLV320AIC3X is not set -# CONFIG_SND_SOC_TS3A227E is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8523 is not set -# CONFIG_SND_SOC_WM8524 is not set -# CONFIG_SND_SOC_WM8580 is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8737 is not set -# CONFIG_SND_SOC_WM8741 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set -# CONFIG_SND_SOC_WM8776 is not set -# CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set -# CONFIG_SND_SOC_WM8903 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8962 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8978 is not set -# CONFIG_SND_SOC_WM8985 is not set -CONFIG_SND_SOC_WM8994=m -# CONFIG_SND_SOC_ZX_AUD96P22 is not set -# CONFIG_SND_SOC_NAU8540 is not set -# CONFIG_SND_SOC_NAU8810 is not set -# CONFIG_SND_SOC_NAU8824 is not set -# CONFIG_SND_SOC_TPA6130A2 is not set -CONFIG_SND_SIMPLE_CARD_UTILS=y -CONFIG_SND_SIMPLE_CARD=y -# CONFIG_SND_SIMPLE_SCU_CARD is not set -# CONFIG_SND_AUDIO_GRAPH_CARD is not set -# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set +# CONFIG_SOUND is not set # # HID support # CONFIG_HID=y -CONFIG_HID_BATTERY_STRENGTH=y -CONFIG_HIDRAW=y -CONFIG_UHID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set CONFIG_HID_GENERIC=y # # Special HID drivers # -CONFIG_HID_A4TECH=m -CONFIG_HID_ACCUTOUCH=m -CONFIG_HID_ACRUX=m -CONFIG_HID_ACRUX_FF=y -CONFIG_HID_APPLE=m -CONFIG_HID_APPLEIR=m -CONFIG_HID_ASUS=m -CONFIG_HID_AUREAL=m -CONFIG_HID_BELKIN=m -CONFIG_HID_BETOP_FF=m -CONFIG_HID_CHERRY=m -CONFIG_HID_CHICONY=m -CONFIG_HID_CORSAIR=m -CONFIG_HID_PRODIKEYS=m -CONFIG_HID_CMEDIA=m -CONFIG_HID_CP2112=m -CONFIG_HID_CYPRESS=m -CONFIG_HID_DRAGONRISE=m -CONFIG_DRAGONRISE_FF=y -CONFIG_HID_EMS_FF=m -CONFIG_HID_ELECOM=m -CONFIG_HID_ELO=m -CONFIG_HID_EZKEY=m -CONFIG_HID_GEMBIRD=m -CONFIG_HID_GFRM=m -CONFIG_HID_HOLTEK=m -CONFIG_HOLTEK_FF=y -CONFIG_HID_GT683R=m -CONFIG_HID_KEYTOUCH=m -CONFIG_HID_KYE=m -CONFIG_HID_UCLOGIC=m -CONFIG_HID_WALTOP=m -CONFIG_HID_GYRATION=m -CONFIG_HID_ICADE=m +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CREATIVE_SB0540 is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set CONFIG_HID_ITE=y -CONFIG_HID_TWINHAN=m +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set CONFIG_HID_KENSINGTON=y -CONFIG_HID_LCPOWER=m -CONFIG_HID_LED=m +# CONFIG_HID_LCPOWER is not set # CONFIG_HID_LENOVO is not set CONFIG_HID_LOGITECH=y -CONFIG_HID_LOGITECH_DJ=m -CONFIG_HID_LOGITECH_HIDPP=m -CONFIG_LOGITECH_FF=y -CONFIG_LOGIRUMBLEPAD2_FF=y -CONFIG_LOGIG940_FF=y -CONFIG_LOGIWHEELS_FF=y -CONFIG_HID_MAGICMOUSE=m +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set -CONFIG_HID_MICROSOFT=m -CONFIG_HID_MONTEREY=m -CONFIG_HID_MULTITOUCH=m -CONFIG_HID_NTI=m -CONFIG_HID_NTRIG=m -CONFIG_HID_ORTEK=m -CONFIG_HID_PANTHERLORD=m -CONFIG_PANTHERLORD_FF=y -CONFIG_HID_PENMOUNT=m -CONFIG_HID_PETALYNX=m -CONFIG_HID_PICOLCD=m -CONFIG_HID_PICOLCD_FB=y -CONFIG_HID_PICOLCD_BACKLIGHT=y -CONFIG_HID_PICOLCD_LCD=y -CONFIG_HID_PICOLCD_LEDS=y -CONFIG_HID_PICOLCD_CIR=y -CONFIG_HID_PLANTRONICS=m -CONFIG_HID_PRIMAX=m -CONFIG_HID_RETRODE=m -CONFIG_HID_ROCCAT=m -CONFIG_HID_SAITEK=m -CONFIG_HID_SAMSUNG=m -CONFIG_HID_SONY=m -CONFIG_SONY_FF=y -CONFIG_HID_SPEEDLINK=m -CONFIG_HID_STEELSERIES=m -CONFIG_HID_SUNPLUS=y -CONFIG_HID_RMI=m -CONFIG_HID_GREENASIA=m -CONFIG_GREENASIA_FF=y -CONFIG_HID_SMARTJOYPLUS=m -CONFIG_SMARTJOYPLUS_FF=y -CONFIG_HID_TIVO=m -CONFIG_HID_TOPSEED=m -CONFIG_HID_THINGM=m -CONFIG_HID_THRUSTMASTER=m -CONFIG_THRUSTMASTER_FF=y -CONFIG_HID_UDRAW_PS3=m -CONFIG_HID_WACOM=m -CONFIG_HID_WIIMOTE=m -CONFIG_HID_XINMO=m -CONFIG_HID_ZEROPLUS=m -CONFIG_ZEROPLUS_FF=y -CONFIG_HID_ZYDACRON=m -CONFIG_HID_SENSOR_HUB=m -CONFIG_HID_SENSOR_CUSTOM_SENSOR=m -CONFIG_HID_ALPS=m +CONFIG_HID_REDRAGON=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_MULTITOUCH=y +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# end of Special HID drivers # # USB HID support # CONFIG_USB_HID=y -CONFIG_HID_PID=y -CONFIG_USB_HIDDEV=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set +# end of USB HID support # # I2C HID support # -CONFIG_I2C_HID=m +# CONFIG_I2C_HID is not set +# end of I2C HID support +# end of HID support + CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y @@ -4180,33 +2697,31 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y +# CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_OTG_FSM is not set -# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_MON is not set -# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y +# CONFIG_USB_XHCI_DBGCAP is not set CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_EHCI_FSL is not set CONFIG_USB_EHCI_EXYNOS=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set +CONFIG_USB_EHCI_HCD_PLATFORM=y # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set # CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_EXYNOS=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set +CONFIG_USB_OHCI_HCD_PLATFORM=y # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_HCD_TEST_MODE is not set @@ -4214,9 +2729,9 @@ CONFIG_USB_OHCI_EXYNOS=y # # USB Device Class drivers # -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m -CONFIG_USB_WDM=m +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set # CONFIG_USB_TMC is not set # @@ -4228,21 +2743,20 @@ CONFIG_USB_WDM=m # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_REALTEK=m -CONFIG_REALTEK_AUTOPM=y -CONFIG_USB_STORAGE_DATAFAB=m -CONFIG_USB_STORAGE_FREECOM=m -CONFIG_USB_STORAGE_ISD200=m -CONFIG_USB_STORAGE_USBAT=m -CONFIG_USB_STORAGE_SDDR09=m -CONFIG_USB_STORAGE_SDDR55=m -CONFIG_USB_STORAGE_JUMPSHOT=m -CONFIG_USB_STORAGE_ALAUDA=m -CONFIG_USB_STORAGE_ONETOUCH=m -CONFIG_USB_STORAGE_KARMA=m -CONFIG_USB_STORAGE_CYPRESS_ATACB=m -CONFIG_USB_STORAGE_ENE_UB6250=m -CONFIG_USB_UAS=m +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set # # USB Imaging devices @@ -4250,102 +2764,25 @@ CONFIG_USB_UAS=m # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_HOST is not set +CONFIG_USB_DWC3_HOST=y # CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y # # Platform Glue Driver Support # CONFIG_USB_DWC3_EXYNOS=y CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC2=y -# CONFIG_USB_DWC2_HOST is not set - -# -# Gadget/Dual-role mode requires USB Gadget support to be enabled -# -# CONFIG_USB_DWC2_PERIPHERAL is not set -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_DEBUG is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +# CONFIG_USB_DWC2 is not set # CONFIG_USB_CHIPIDEA is not set # CONFIG_USB_ISP1760 is not set # # USB port drivers # -# CONFIG_USB_USS720 is not set -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_SIMPLE=m -CONFIG_USB_SERIAL_AIRCABLE=m -CONFIG_USB_SERIAL_ARK3116=m -CONFIG_USB_SERIAL_BELKIN=m -CONFIG_USB_SERIAL_CH341=m -CONFIG_USB_SERIAL_WHITEHEAT=m -CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -CONFIG_USB_SERIAL_CP210X=m -CONFIG_USB_SERIAL_CYPRESS_M8=m -CONFIG_USB_SERIAL_EMPEG=m -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_VISOR=m -CONFIG_USB_SERIAL_IPAQ=m -CONFIG_USB_SERIAL_IR=m -CONFIG_USB_SERIAL_EDGEPORT=m -CONFIG_USB_SERIAL_EDGEPORT_TI=m -CONFIG_USB_SERIAL_F81232=m -# CONFIG_USB_SERIAL_F8153X is not set -CONFIG_USB_SERIAL_GARMIN=m -CONFIG_USB_SERIAL_IPW=m -CONFIG_USB_SERIAL_IUU=m -CONFIG_USB_SERIAL_KEYSPAN_PDA=m -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -CONFIG_USB_SERIAL_KLSI=m -CONFIG_USB_SERIAL_KOBIL_SCT=m -CONFIG_USB_SERIAL_MCT_U232=m -CONFIG_USB_SERIAL_METRO=m -CONFIG_USB_SERIAL_MOS7720=m -# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set -CONFIG_USB_SERIAL_MOS7840=m -CONFIG_USB_SERIAL_MXUPORT=m -CONFIG_USB_SERIAL_NAVMAN=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_OTI6858=m -CONFIG_USB_SERIAL_QCAUX=m -CONFIG_USB_SERIAL_QUALCOMM=m -CONFIG_USB_SERIAL_SPCP8X5=m -CONFIG_USB_SERIAL_SAFE=m -CONFIG_USB_SERIAL_SAFE_PADDED=y -CONFIG_USB_SERIAL_SIERRAWIRELESS=m -CONFIG_USB_SERIAL_SYMBOL=m -CONFIG_USB_SERIAL_TI=m -CONFIG_USB_SERIAL_CYBERJACK=m -CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_WWAN=m -CONFIG_USB_SERIAL_OPTION=m -CONFIG_USB_SERIAL_OMNINET=m -CONFIG_USB_SERIAL_OPTICON=m -CONFIG_USB_SERIAL_XSENS_MT=m -CONFIG_USB_SERIAL_WISHBONE=m -CONFIG_USB_SERIAL_SSU100=m -CONFIG_USB_SERIAL_QT2=m -# CONFIG_USB_SERIAL_UPD78F0730 is not set -# CONFIG_USB_SERIAL_DEBUG is not set +# CONFIG_USB_SERIAL is not set # # USB Miscellaneous drivers @@ -4354,7 +2791,6 @@ CONFIG_USB_SERIAL_QT2=m # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set # CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_CYPRESS_CY7C63 is not set @@ -4370,28 +2806,27 @@ CONFIG_USB_SERIAL_QT2=m # CONFIG_USB_EHSET_TEST_FIXTURE is not set # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_YUREX is not set -CONFIG_USB_EZUSB_FX2=m +# CONFIG_USB_EZUSB_FX2 is not set # CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ATM is not set # # USB Physical Layer drivers # -# CONFIG_USB_PHY is not set # CONFIG_NOP_USB_XCEIV is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + CONFIG_USB_GADGET=y # CONFIG_USB_GADGET_DEBUG_FILES is not set # CONFIG_USB_GADGET_DEBUG_FS is not set CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 -# CONFIG_U_SERIAL_CONSOLE is not set # # USB Peripheral Controller @@ -4409,46 +2844,13 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_NET2272 is not set # CONFIG_USB_GADGET_XILINX is not set # CONFIG_USB_DUMMY_HCD is not set -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_F_ACM=m -CONFIG_USB_U_SERIAL=m -CONFIG_USB_U_ETHER=m -CONFIG_USB_F_SERIAL=m -CONFIG_USB_F_OBEX=m -CONFIG_USB_F_ECM=m -CONFIG_USB_F_SUBSET=m -CONFIG_USB_F_RNDIS=m -CONFIG_USB_F_MASS_STORAGE=m -# CONFIG_USB_CONFIGFS is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -CONFIG_USB_MASS_STORAGE=m -CONFIG_USB_G_SERIAL=m -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set -# CONFIG_USB_G_WEBCAM is not set +# end of USB Peripheral Controller -# -# USB Power Delivery and Type-C drivers -# -# CONFIG_TYPEC_UCSI is not set -# CONFIG_USB_LED_TRIG is not set -# CONFIG_USB_ULPI_BUS is not set -# CONFIG_UWB is not set +# CONFIG_USB_CONFIGFS is not set +# CONFIG_TYPEC is not set +# CONFIG_USB_ROLE_SWITCH is not set CONFIG_MMC=y CONFIG_PWRSEQ_EMMC=y -# CONFIG_PWRSEQ_SD8787 is not set CONFIG_PWRSEQ_SIMPLE=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=16 @@ -4467,76 +2869,19 @@ CONFIG_MMC_SDHCI_S3C_DMA=y # CONFIG_MMC_SPI is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y +# CONFIG_MMC_DW_HI3798CV200 is not set # CONFIG_MMC_DW_K3 is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set # CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_CLASS_FLASH=y -# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set - -# -# LED drivers -# -# CONFIG_LEDS_AAT1290 is not set -# CONFIG_LEDS_AS3645A is not set -# CONFIG_LEDS_BCM6328 is not set -# CONFIG_LEDS_BCM6358 is not set -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -# CONFIG_LEDS_LP5562 is not set -# CONFIG_LEDS_LP8501 is not set -# CONFIG_LEDS_LP8860 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_DAC124S085 is not set -CONFIG_LEDS_PWM=y -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_TLC591XX is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_KTD2692 is not set -# CONFIG_LEDS_IS31FL319X is not set -# CONFIG_LEDS_IS31FL32XX is not set - -# -# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) -# -# CONFIG_LEDS_BLINKM is not set -# CONFIG_LEDS_SYSCON is not set -# CONFIG_LEDS_USER is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_ONESHOT is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_CPU is not set -# CONFIG_LEDS_TRIGGER_GPIO is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set - -# -# iptables trigger is under Netfilter config (LED target) -# -# CONFIG_LEDS_TRIGGER_TRANSIENT is not set -# CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_NEW_LEDS is not set # CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_RTC_LIB=y @@ -4561,18 +2906,23 @@ CONFIG_RTC_INTF_DEV=y # I2C RTC drivers # # CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABEOZ9 is not set # CONFIG_RTC_DRV_ABX80X is not set # CONFIG_RTC_DRV_DS1307 is not set # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX8997 is not set +# CONFIG_RTC_DRV_MAX77686 is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_ISL12026 is not set # CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF85363 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set @@ -4583,8 +2933,10 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV8803 is not set CONFIG_RTC_DRV_S5M=y +# CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers @@ -4640,6 +2992,7 @@ CONFIG_HAVE_S3C_RTC=y CONFIG_RTC_DRV_S3C=y # CONFIG_RTC_DRV_PL030 is not set # CONFIG_RTC_DRV_PL031 is not set +# CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set # CONFIG_RTC_DRV_SNVS is not set # CONFIG_RTC_DRV_R7301 is not set @@ -4647,7 +3000,6 @@ CONFIG_RTC_DRV_S3C=y # # HID Sensor RTC drivers # -# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set @@ -4658,7 +3010,9 @@ CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y # CONFIG_ALTERA_MSGDMA is not set # CONFIG_AMBA_PL08X is not set +# CONFIG_DW_AXI_DMAC is not set # CONFIG_FSL_EDMA is not set +# CONFIG_FSL_QDMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_NBPFAXI_DMA is not set CONFIG_PL330_DMA=y @@ -4677,223 +3031,28 @@ CONFIG_PL330_DMA=y # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_SELFTESTS is not set +# end of DMABUF options + # CONFIG_AUXDISPLAY is not set -# CONFIG_PANEL is not set # CONFIG_UIO is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set - -# -# Virtio drivers -# +CONFIG_VIRTIO_MENU=y # CONFIG_VIRTIO_MMIO is not set # # Microsoft Hyper-V guest support # -# CONFIG_HYPERV_TSCPAGE is not set -CONFIG_STAGING=y -CONFIG_IRDA=m +# end of Microsoft Hyper-V guest support -# -# IrDA protocols -# -CONFIG_IRLAN=m -# CONFIG_IRNET is not set -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y - -# -# IrDA options -# -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -# CONFIG_IRDA_DEBUG is not set - -# -# Infrared-port device drivers -# - -# -# SIR device drivers -# -CONFIG_IRTTY_SIR=m - -# -# Dongle support -# -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_TOIM3232_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_KINGSUN_DONGLE=m -CONFIG_KSDAZZLE_DONGLE=m -CONFIG_KS959_DONGLE=m - -# -# FIR device drivers -# -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_MCS_FIR=m -CONFIG_PRISM2_USB=m -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -# CONFIG_RTL8723BS is not set -CONFIG_R8712U=m -# CONFIG_R8188EU is not set -# CONFIG_VT6656 is not set - -# -# IIO staging drivers -# - -# -# Accelerometers -# -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADIS16240 is not set - -# -# Analog to digital converters -# -# CONFIG_AD7606 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7280 is not set - -# -# Analog digital bi-direction converters -# -# CONFIG_ADT7316 is not set - -# -# Capacitance to digital converters -# -# CONFIG_AD7150 is not set -# CONFIG_AD7152 is not set -# CONFIG_AD7746 is not set - -# -# Direct Digital Synthesis -# -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set - -# -# Digital gyroscope sensors -# -# CONFIG_ADIS16060 is not set - -# -# Network Analyzer, Impedance Converters -# -# CONFIG_AD5933 is not set - -# -# Light sensors -# -# CONFIG_TSL2x7x is not set - -# -# Active energy metering IC -# -# CONFIG_ADE7753 is not set -# CONFIG_ADE7754 is not set -# CONFIG_ADE7758 is not set -# CONFIG_ADE7759 is not set -# CONFIG_ADE7854 is not set - -# -# Resolver to digital converters -# -# CONFIG_AD2S90 is not set -# CONFIG_AD2S1200 is not set -# CONFIG_AD2S1210 is not set - -# -# Triggers - standalone -# - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -CONFIG_STAGING_MEDIA=y -# CONFIG_I2C_BCM2048 is not set -CONFIG_LIRC_STAGING=y -# CONFIG_LIRC_ZILOG is not set -CONFIG_LIRC_ODROID=m - -# -# Android -# -# CONFIG_STAGING_BOARD is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_LNET is not set -# CONFIG_GS_FPGABOOT is not set -# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set -CONFIG_FB_TFT=m -CONFIG_FB_TFT_AGM1264K_FL=m -CONFIG_FB_TFT_BD663474=m -CONFIG_FB_TFT_HX8340BN=m -CONFIG_FB_TFT_HX8347D=m -CONFIG_FB_TFT_HX8353D=m -CONFIG_FB_TFT_HX8357D=m -CONFIG_FB_TFT_ILI9163=m -CONFIG_FB_TFT_ILI9320=m -CONFIG_FB_TFT_ILI9325=m -CONFIG_FB_TFT_ILI9340=m -CONFIG_FB_TFT_ILI9341=m -CONFIG_FB_TFT_ILI9481=m -CONFIG_FB_TFT_ILI9486=m -CONFIG_FB_TFT_PCD8544=m -CONFIG_FB_TFT_RA8875=m -CONFIG_FB_TFT_S6D02A1=m -CONFIG_FB_TFT_S6D1121=m -# CONFIG_FB_TFT_SH1106 is not set -CONFIG_FB_TFT_SSD1289=m -CONFIG_FB_TFT_SSD1305=m -CONFIG_FB_TFT_SSD1306=m -CONFIG_FB_TFT_SSD1325=m -CONFIG_FB_TFT_SSD1331=m -CONFIG_FB_TFT_SSD1351=m -CONFIG_FB_TFT_ST7735R=m -CONFIG_FB_TFT_ST7789V=m -CONFIG_FB_TFT_TINYLCD=m -CONFIG_FB_TFT_TLS8204=m -CONFIG_FB_TFT_UC1611=m -CONFIG_FB_TFT_UC1701=m -CONFIG_FB_TFT_UPD161704=m -CONFIG_FB_TFT_WATTEROTT=m -CONFIG_FB_FLEX=m -CONFIG_FB_TFT_FBTFT_DEVICE=m -# CONFIG_WILC1000_SDIO is not set -# CONFIG_WILC1000_SPI is not set -# CONFIG_MOST is not set -# CONFIG_KS7010 is not set # CONFIG_GREYBUS is not set -# CONFIG_CRYPTO_DEV_CCREE is not set - -# -# USB Power Delivery and Type-C drivers -# -# CONFIG_TYPEC_TCPM is not set -# CONFIG_PI433 is not set +# CONFIG_STAGING is not set # CONFIG_GOLDFISH is not set -CONFIG_CHROME_PLATFORMS=y -# CONFIG_CROS_EC_CHARDEV is not set -CONFIG_CROS_EC_PROTO=y +# CONFIG_MFD_CROS_EC is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -4902,21 +3061,25 @@ CONFIG_COMMON_CLK=y # Common Clock Framework # # CONFIG_CLK_HSDK is not set +CONFIG_COMMON_CLK_MAX77686=y +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set CONFIG_COMMON_CLK_S2MPS11=y # CONFIG_CLK_QORIQ is not set -# CONFIG_COMMON_CLK_NXP is not set # CONFIG_COMMON_CLK_PWM is not set -# CONFIG_COMMON_CLK_PXA is not set -# CONFIG_COMMON_CLK_PIC32 is not set # CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set CONFIG_COMMON_CLK_SAMSUNG=y CONFIG_EXYNOS_AUDSS_CLK_CON=y +# end of Common Clock Framework + # CONFIG_HWSPINLOCK is not set # @@ -4926,14 +3089,10 @@ CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_TIMER_SP804 is not set -# CONFIG_ATMEL_PIT is not set CONFIG_CLKSRC_EXYNOS_MCT=y CONFIG_CLKSRC_SAMSUNG_PWM=y -# CONFIG_SH_TIMER_CMT is not set -# CONFIG_SH_TIMER_MTU2 is not set -# CONFIG_SH_TIMER_TMU is not set -# CONFIG_EM_TIMER_STI is not set +# end of Clock Source drivers + # CONFIG_MAILBOX is not set CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y @@ -4941,8 +3100,15 @@ CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S_SELFTEST is not set +# end of Generic IOMMU Pagetable Support + +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_EXYNOS_IOMMU=y # CONFIG_EXYNOS_IOMMU_DEBUG is not set @@ -4952,10 +3118,15 @@ CONFIG_EXYNOS_IOMMU=y # Remoteproc drivers # # CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers # # Rpmsg drivers # +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set # # SOC (System On Chip) specific Drivers @@ -4964,34 +3135,57 @@ CONFIG_EXYNOS_IOMMU=y # # Amlogic SoC drivers # +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers # # Broadcom SoC drivers # # CONFIG_SOC_BRCMSTB is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers # # i.MX SoC drivers # +# end of i.MX SoC drivers # # Qualcomm SoC drivers # +# end of Qualcomm SoC drivers + CONFIG_SOC_SAMSUNG=y +CONFIG_EXYNOS_CHIPID=y CONFIG_EXYNOS_PMU=y CONFIG_EXYNOS_PMU_ARM_DRIVERS=y CONFIG_EXYNOS_PM_DOMAINS=y -# CONFIG_SUNXI_SRAM is not set # CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set CONFIG_DEVFREQ_GOV_PASSIVE=y # @@ -5001,38 +3195,28 @@ CONFIG_ARM_EXYNOS_BUS_DEVFREQ=y CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP=y CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU=y -CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -# CONFIG_EXTCON_ADC_JACK is not set -# CONFIG_EXTCON_GPIO is not set -# CONFIG_EXTCON_MAX3355 is not set -# CONFIG_EXTCON_RT8973A is not set -# CONFIG_EXTCON_SM5502 is not set -CONFIG_EXTCON_USB_GPIO=m -# CONFIG_EXTCON_USBC_CROS_EC is not set +# CONFIG_EXTCON is not set CONFIG_MEMORY=y # CONFIG_ARM_PL172_MPMC is not set +CONFIG_PL353_SMC=y CONFIG_SAMSUNG_MC=y CONFIG_EXYNOS_SROM=y CONFIG_IIO=y -CONFIG_IIO_BUFFER=y -# CONFIG_IIO_BUFFER_CB is not set -CONFIG_IIO_KFIFO_BUF=y -CONFIG_IIO_TRIGGERED_BUFFER=y +# CONFIG_IIO_BUFFER is not set # CONFIG_IIO_CONFIGFS is not set -CONFIG_IIO_TRIGGER=y -CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +# CONFIG_IIO_TRIGGER is not set # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # # Accelerometers # +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16209 is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL372_SPI is not set +# CONFIG_ADXL372_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMC150_ACCEL is not set @@ -5041,7 +3225,6 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_DMARD06 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set -# CONFIG_HID_SENSOR_ACCEL_3D is not set # CONFIG_IIO_ST_ACCEL_3AXIS is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set @@ -5057,26 +3240,32 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_SCA3000 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set +# end of Accelerometers # # Analog to digital converters # +# CONFIG_AD7124 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7298 is not set # CONFIG_AD7476 is not set +# CONFIG_AD7606_IFACE_PARALLEL is not set +# CONFIG_AD7606_IFACE_SPI is not set # CONFIG_AD7766 is not set +# CONFIG_AD7768_1 is not set +# CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_CC10001_ADC is not set # CONFIG_ENVELOPE_DETECTOR is not set CONFIG_EXYNOS_ADC=y # CONFIG_HI8435 is not set # CONFIG_HX711 is not set -# CONFIG_INA2XX_ADC is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2497 is not set @@ -5087,7 +3276,9 @@ CONFIG_EXYNOS_ADC=y # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set @@ -5097,37 +3288,48 @@ CONFIG_EXYNOS_ADC=y # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_VF610_ADC is not set +# CONFIG_XILINX_XADC is not set +# end of Analog to digital converters + +# +# Analog Front Ends +# +# CONFIG_IIO_RESCALE is not set +# end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set +# end of Amplifiers # # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set +# CONFIG_SENSIRION_SGP30 is not set +# CONFIG_SPS30 is not set # CONFIG_VZ89X is not set -# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set +# end of Chemical Sensors # # Hid Sensor IIO Common # -# CONFIG_HID_SENSOR_IIO_COMMON is not set +# end of Hid Sensor IIO Common # # SSP Sensor Common # # CONFIG_IIO_SSP_SENSORHUB is not set - -# -# Counters -# +# end of SSP Sensor Common # # Digital to analog converters @@ -5142,25 +3344,35 @@ CONFIG_EXYNOS_ADC=y # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set -# CONFIG_AD5686 is not set +# CONFIG_AD5686_SPI is not set +# CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set +# CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DPOT_DAC is not set +# CONFIG_DS4424 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4922 is not set +# CONFIG_TI_DAC082S085 is not set +# CONFIG_TI_DAC5571 is not set +# CONFIG_TI_DAC7311 is not set +# CONFIG_TI_DAC7612 is not set # CONFIG_VF610_DAC is not set +# end of Digital to analog converters # # IIO dummy driver # +# end of IIO dummy driver # # Frequency Synthesizers DDS/PLL @@ -5170,11 +3382,15 @@ CONFIG_EXYNOS_ADC=y # Clock Generator/Distribution # # CONFIG_AD9523 is not set +# end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # # CONFIG_ADF4350 is not set +# CONFIG_ADF4371 is not set +# end of Phase-Locked Loop (PLL) frequency synthesizers +# end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors @@ -5185,10 +3401,11 @@ CONFIG_EXYNOS_ADC=y # CONFIG_ADIS16260 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set -# CONFIG_HID_SENSOR_GYRO_3D is not set +# CONFIG_FXAS21002C is not set # CONFIG_MPU3050_I2C is not set # CONFIG_IIO_ST_GYRO_3AXIS is not set # CONFIG_ITG3200 is not set +# end of Digital gyroscope sensors # # Health Sensors @@ -5201,6 +3418,8 @@ CONFIG_EXYNOS_ADC=y # CONFIG_AFE4404 is not set # CONFIG_MAX30100 is not set # CONFIG_MAX30102 is not set +# end of Heart Rate Monitors +# end of Health Sensors # # Humidity sensors @@ -5208,16 +3427,17 @@ CONFIG_EXYNOS_ADC=y # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set -# CONFIG_HID_SENSOR_HUMIDITY is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set +# end of Humidity sensors # # Inertial measurement units # # CONFIG_ADIS16400 is not set +# CONFIG_ADIS16460 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set @@ -5225,6 +3445,7 @@ CONFIG_EXYNOS_ADC=y # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set +# end of Inertial measurement units # # Light sensors @@ -5239,84 +3460,93 @@ CONFIG_EXYNOS_ADC=y # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set # CONFIG_CM3605 is not set -CONFIG_CM36651=y +# CONFIG_CM36651 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set -# CONFIG_HID_SENSOR_ALS is not set -# CONFIG_HID_SENSOR_PROX is not set # CONFIG_JSA1212 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR501 is not set +# CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set +# CONFIG_MAX44009 is not set +# CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_PA12203001 is not set +# CONFIG_SI1133 is not set # CONFIG_SI1145 is not set # CONFIG_STK3310 is not set +# CONFIG_ST_UVIS25 is not set # CONFIG_TCS3414 is not set # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set +# CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set +# CONFIG_VCNL4035 is not set # CONFIG_VEML6070 is not set # CONFIG_VL6180 is not set +# CONFIG_ZOPT2201 is not set +# end of Light sensors # # Magnetometer sensors # # CONFIG_AK8974 is not set -CONFIG_AK8975=y +# CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set -# CONFIG_HID_SENSOR_MAGNETOMETER_3D is not set # CONFIG_MMC35240 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set # CONFIG_SENSORS_HMC5843_I2C is not set # CONFIG_SENSORS_HMC5843_SPI is not set +# CONFIG_SENSORS_RM3100_I2C is not set +# CONFIG_SENSORS_RM3100_SPI is not set +# end of Magnetometer sensors # # Multiplexers # # CONFIG_IIO_MUX is not set +# end of Multiplexers # # Inclinometer sensors # -# CONFIG_HID_SENSOR_INCLINOMETER_3D is not set -# CONFIG_HID_SENSOR_DEVICE_ROTATION is not set - -# -# Triggers - standalone -# -# CONFIG_IIO_INTERRUPT_TRIGGER is not set -# CONFIG_IIO_SYSFS_TRIGGER is not set +# end of Inclinometer sensors # # Digital potentiometers # +# CONFIG_AD5272 is not set # CONFIG_DS1803 is not set +# CONFIG_MAX5432 is not set # CONFIG_MAX5481 is not set # CONFIG_MAX5487 is not set +# CONFIG_MCP4018 is not set # CONFIG_MCP4131 is not set # CONFIG_MCP4531 is not set +# CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set +# end of Digital potentiometers # # Digital potentiostats # # CONFIG_LMP91000 is not set +# end of Digital potentiostats # # Pressure sensors # # CONFIG_ABP060MG is not set # CONFIG_BMP280 is not set -# CONFIG_HID_SENSOR_PRESS is not set +# CONFIG_DPS310 is not set # CONFIG_HP03 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -5327,52 +3557,80 @@ CONFIG_AK8975=y # CONFIG_T5403 is not set # CONFIG_HP206C is not set # CONFIG_ZPA2326 is not set +# end of Pressure sensors # # Lightning sensors # # CONFIG_AS3935 is not set +# end of Lightning sensors # # Proximity and distance sensors # +# CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_MB1232 is not set +# CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set +# CONFIG_VL53L0X_I2C is not set +# end of Proximity and distance sensors + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# end of Resolver to digital converters # # Temperature sensors # # CONFIG_MAXIM_THERMOCOUPLE is not set -# CONFIG_HID_SENSOR_TEMP is not set # CONFIG_MLX90614 is not set +# CONFIG_MLX90632 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set +# CONFIG_MAX31856 is not set +# end of Temperature sensors + CONFIG_PWM=y CONFIG_PWM_SYSFS=y -# CONFIG_PWM_CROS_EC is not set # CONFIG_PWM_FSL_FTM is not set # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_SAMSUNG=y + +# +# IRQ chip support +# CONFIG_IRQCHIP=y CONFIG_ARM_GIC=y CONFIG_ARM_GIC_MAX_NR=1 CONFIG_GIC_NON_BANKED=y +# CONFIG_AL_FIC is not set +# end of IRQ chip support + # CONFIG_IPACK_BUS is not set # CONFIG_RESET_CONTROLLER is not set -# CONFIG_FMC is not set # # PHY Subsystem # CONFIG_GENERIC_PHY=y # CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_CPCAP_USB is not set +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set CONFIG_PHY_EXYNOS_DP_VIDEO=y CONFIG_PHY_EXYNOS_MIPI_VIDEO=y # CONFIG_PHY_EXYNOS_PCIE is not set @@ -5382,139 +3640,91 @@ CONFIG_PHY_EXYNOS4X12_USB2=y CONFIG_PHY_EXYNOS5250_USB2=y CONFIG_PHY_EXYNOS5_USBDRD=y CONFIG_PHY_EXYNOS5250_SATA=y +# end of PHY Subsystem + # CONFIG_POWERCAP is not set # CONFIG_MCB is not set - -# -# Performance monitor support -# -CONFIG_ARM_PMU=y # CONFIG_RAS is not set # # Android # # CONFIG_ANDROID is not set +# end of Android + CONFIG_DAX=y CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y + +# +# HW tracing support +# # CONFIG_STM is not set # CONFIG_INTEL_TH is not set -# CONFIG_FPGA is not set +# end of HW tracing support -# -# FSI support -# +# CONFIG_FPGA is not set # CONFIG_FSI is not set # CONFIG_TEE is not set - -# -# ODROID Specific Hardware -# -CONFIG_ODROID_EXYNOS5_SP=m - -# -# Firmware Drivers -# -# CONFIG_FIRMWARE_MEMMAP is not set -CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_GOOGLE_FIRMWARE is not set - -# -# Tegra firmware driver -# +CONFIG_PM_OPP=y +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXT4_ENCRYPTION=y -CONFIG_EXT4_FS_ENCRYPTION=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=m -# CONFIG_REISERFS_CHECK is not set -CONFIG_REISERFS_PROC_INFO=y -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set -CONFIG_XFS_FS=m -CONFIG_XFS_QUOTA=y -CONFIG_XFS_POSIX_ACL=y -CONFIG_XFS_RT=y -# CONFIG_XFS_WARN is not set -# CONFIG_XFS_DEBUG is not set +# CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_BTRFS_FS=m -CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set +# CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set -CONFIG_F2FS_FS=m -CONFIG_F2FS_STAT_FS=y -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_FS_POSIX_ACL=y -CONFIG_F2FS_FS_SECURITY=y -CONFIG_F2FS_CHECK_FS=y -CONFIG_F2FS_FS_ENCRYPTION=y -# CONFIG_F2FS_FAULT_INJECTION is not set +# CONFIG_F2FS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y -CONFIG_EXPORTFS_BLOCK_OPS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set CONFIG_FILE_LOCKING=y CONFIG_MANDATORY_FILE_LOCKING=y -CONFIG_FS_ENCRYPTION=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set -CONFIG_QUOTA=y -CONFIG_QUOTA_NETLINK_INTERFACE=y -# CONFIG_PRINT_QUOTA_WARNING is not set -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=m -CONFIG_QFMT_V1=m -CONFIG_QFMT_V2=m -CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y -CONFIG_FUSE_FS=m -# CONFIG_CUSE is not set -CONFIG_OVERLAY_FS=m -# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set -# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_FUSE_FS is not set +# CONFIG_OVERLAY_FS is not set # # Caches # -CONFIG_FSCACHE=m -# CONFIG_FSCACHE_STATS is not set -# CONFIG_FSCACHE_HISTOGRAM is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set -# CONFIG_CACHEFILES is not set +# CONFIG_FSCACHE is not set +# end of Caches # # CD-ROM/DVD Filesystems # -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems # # DOS/FAT/NT Filesystems @@ -5524,10 +3734,9 @@ CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -CONFIG_FAT_DEFAULT_UTF8=y -CONFIG_NTFS_FS=m -# CONFIG_NTFS_DEBUG is not set -CONFIG_NTFS_RW=y +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set +# end of DOS/FAT/NT Filesystems # # Pseudo filesystems @@ -5541,39 +3750,27 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=y +CONFIG_MEMFD_CREATE=y +# CONFIG_CONFIGFS_FS is not set +# end of Pseudo filesystems + CONFIG_MISC_FILESYSTEMS=y # CONFIG_ORANGEFS_FS is not set # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -CONFIG_HFSPLUS_FS_POSIX_ACL=y +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set CONFIG_CRAMFS=y -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_XATTR=y -CONFIG_SQUASHFS_ZLIB=y -CONFIG_SQUASHFS_LZ4=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y -CONFIG_SQUASHFS_ZSTD=y -CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_CRAMFS_BLOCKDEV=y +# CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set -CONFIG_MINIX_FS=m +# CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set -CONFIG_HPFS_FS=m +# CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set CONFIG_ROMFS_FS=y @@ -5581,279 +3778,115 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y CONFIG_ROMFS_ON_BLOCK=y # CONFIG_PSTORE is not set # CONFIG_SYSV_FS is not set -CONFIG_UFS_FS=m -CONFIG_UFS_FS_WRITE=y -# CONFIG_UFS_DEBUG is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_SWAP=y -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_PNFS_FILE_LAYOUT=y -CONFIG_PNFS_BLOCK=y -CONFIG_PNFS_FLEXFILE_LAYOUT=m -CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" -CONFIG_NFS_V4_1_MIGRATION=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_SWAP is not set CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -CONFIG_NFSD_V4=y -CONFIG_NFSD_PNFS=y -CONFIG_NFSD_BLOCKLAYOUT=y -CONFIG_NFSD_SCSILAYOUT=y -CONFIG_NFSD_FLEXFILELAYOUT=y +# CONFIG_NFSD is not set CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC_BACKCHANNEL=y -CONFIG_SUNRPC_SWAP=y -CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_SUNRPC_DEBUG is not set # CONFIG_CEPH_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -CONFIG_CIFS_WEAK_PW_HASH=y -CONFIG_CIFS_UPCALL=y -CONFIG_CIFS_XATTR=y -CONFIG_CIFS_POSIX=y -CONFIG_CIFS_ACL=y -# CONFIG_CIFS_DEBUG is not set -CONFIG_CIFS_DFS_UPCALL=y -CONFIG_CIFS_SMB311=y -CONFIG_CIFS_FSCACHE=y -# CONFIG_NCP_FS is not set +# CONFIG_CIFS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_MAC_ROMAN=m -CONFIG_NLS_MAC_CELTIC=m -CONFIG_NLS_MAC_CENTEURO=m -CONFIG_NLS_MAC_CROATIAN=m -CONFIG_NLS_MAC_CYRILLIC=m -CONFIG_NLS_MAC_GAELIC=m -CONFIG_NLS_MAC_GREEK=m -CONFIG_NLS_MAC_ICELAND=m -CONFIG_NLS_MAC_INUIT=m -CONFIG_NLS_MAC_ROMANIAN=m -CONFIG_NLS_MAC_TURKISH=m -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -CONFIG_DYNAMIC_DEBUG=y - -# -# Compile-time checks and compiler options -# -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -CONFIG_MAGIC_SYSRQ_SERIAL=y -# CONFIG_DEBUG_KERNEL is not set - -# -# Memory Debugging -# -# CONFIG_PAGE_EXTENSION is not set -# CONFIG_PAGE_POISONING is not set -# CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_DEBUG_MEMORY_INIT=y - -# -# Debug Lockups and Hangs -# -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -CONFIG_SCHED_INFO=y -# CONFIG_DEBUG_TIMEKEEPING is not set - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -# CONFIG_WW_MUTEX_SELFTEST is not set -CONFIG_STACKTRACE=y -# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set -CONFIG_DEBUG_BUGVERBOSE=y - -# -# RCU Debugging -# -# CONFIG_PROVE_RCU is not set -# CONFIG_TORTURE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACE_CLOCK=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_TRACING=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_HWLAT_TRACER is not set -# CONFIG_ENABLE_DEFAULT_TRACERS is not set -# CONFIG_FTRACE_SYSCALLS is not set -# CONFIG_TRACER_SNAPSHOT is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -CONFIG_UPROBE_EVENTS=y -CONFIG_BPF_EVENTS=y -CONFIG_PROBE_EVENTS=y -# CONFIG_TRACEPOINT_BENCHMARK is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set -# CONFIG_TRACE_EVAL_MAP_FILE is not set -CONFIG_TRACING_EVENTS_GPIO=y -# CONFIG_DMA_API_DEBUG is not set - -# -# Runtime Testing -# -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_TEST_SORT is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_ASYNC_RAID6_TEST is not set -# CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_TEST_PRINTF is not set -# CONFIG_TEST_BITMAP is not set -# CONFIG_TEST_UUID is not set -# CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set -# CONFIG_TEST_LKM is not set -# CONFIG_TEST_USER_COPY is not set -# CONFIG_TEST_BPF is not set -# CONFIG_TEST_FIRMWARE is not set -# CONFIG_TEST_SYSCTL is not set -# CONFIG_TEST_UDELAY is not set -# CONFIG_TEST_STATIC_KEYS is not set -# CONFIG_TEST_KMOD is not set -# CONFIG_MEMTEST is not set -# CONFIG_BUG_ON_DATA_CORRUPTION is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set -# CONFIG_UBSAN is not set -CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y -# CONFIG_STRICT_DEVMEM is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_UART_8250 is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -# CONFIG_PID_IN_CONTEXTIDR is not set -# CONFIG_CORESIGHT is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_UNICODE is not set +# end of File systems # # Security options # CONFIG_KEYS=y +# CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set # CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set -CONFIG_ENCRYPTED_KEYS=y +# CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set # CONFIG_SECURITY is not set CONFIG_SECURITYFS=y CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y # CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_XOR_BLOCKS=m -CONFIG_ASYNC_CORE=m -CONFIG_ASYNC_MEMCPY=m -CONFIG_ASYNC_XOR=m -CONFIG_ASYNC_PQ=m -CONFIG_ASYNC_RAID6_RECOV=m +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + CONFIG_CRYPTO=y # @@ -5861,176 +3894,176 @@ CONFIG_CRYPTO=y # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AKCIPHER=m +CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_RSA=m -CONFIG_CRYPTO_DH=m -CONFIG_CRYPTO_ECDH=m CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_USER=m +# CONFIG_CRYPTO_USER is not set CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_PCRYPT=m -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_MCRYPTD=m -CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_SIMD=m +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Public-key cryptography +# +CONFIG_CRYPTO_RSA=y +# CONFIG_CRYPTO_DH is not set +# CONFIG_CRYPTO_ECDH is not set +# CONFIG_CRYPTO_ECRDSA is not set # # Authenticated Encryption with Associated Data # -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_CHACHA20POLY1305=m -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=m +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +# CONFIG_CRYPTO_SEQIV is not set +# CONFIG_CRYPTO_ECHAINIV is not set # # Block modes # CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_KEYWRAP=m +# CONFIG_CRYPTO_CFB is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +# CONFIG_CRYPTO_ESSIV is not set # # Hash modes # -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m +# CONFIG_CRYPTO_CMAC is not set +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set # # Digest # CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_CRCT10DIF=m -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_POLY1305=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3 is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set # # Ciphers # +CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_BLOWFISH=m -CONFIG_CRYPTO_BLOWFISH_COMMON=m -CONFIG_CRYPTO_CAMELLIA=m -CONFIG_CRYPTO_CAST_COMMON=m -CONFIG_CRYPTO_CAST5=m -CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_FCRYPT=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SALSA20=m -CONFIG_CRYPTO_CHACHA20=m -CONFIG_CRYPTO_SEED=m -CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m -CONFIG_CRYPTO_TWOFISH=m -CONFIG_CRYPTO_TWOFISH_COMMON=m +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # # Compression # -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_LZO=m -CONFIG_CRYPTO_842=m -CONFIG_CRYPTO_LZ4=m -CONFIG_CRYPTO_LZ4HC=m +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set # # Random Number Generation # -CONFIG_CRYPTO_ANSI_CPRNG=m -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_DRBG_HMAC=y -# CONFIG_CRYPTO_DRBG_HASH is not set -# CONFIG_CRYPTO_DRBG_CTR is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_USER_API=m -CONFIG_CRYPTO_USER_API_HASH=m -CONFIG_CRYPTO_USER_API_SKCIPHER=m -CONFIG_CRYPTO_USER_API_RNG=m -CONFIG_CRYPTO_USER_API_AEAD=m +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_DRBG_MENU is not set +# CONFIG_CRYPTO_JITTERENTROPY is not set +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HW=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set # CONFIG_CRYPTO_DEV_EXYNOS_RNG is not set -CONFIG_CRYPTO_DEV_S5P=y -CONFIG_CRYPTO_DEV_EXYNOS_HASH=y -# CONFIG_ASYMMETRIC_KEY_TYPE is not set +# CONFIG_CRYPTO_DEV_S5P is not set +# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set +# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set +# CONFIG_CRYPTO_DEV_SAFEXCEL is not set +# CONFIG_CRYPTO_DEV_CCREE is not set +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_X509_CERTIFICATE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set # # Certificates for signature checking # +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set -CONFIG_ARM_CRYPTO=y -CONFIG_CRYPTO_SHA1_ARM=m -CONFIG_CRYPTO_SHA1_ARM_NEON=m -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -CONFIG_CRYPTO_SHA256_ARM=m -CONFIG_CRYPTO_SHA512_ARM=m -CONFIG_CRYPTO_AES_ARM=m -CONFIG_CRYPTO_AES_ARM_BS=m -CONFIG_CRYPTO_AES_ARM_CE=m -CONFIG_CRYPTO_GHASH_ARM_CE=m -CONFIG_CRYPTO_CRC32_ARM_CE=m -CONFIG_CRYPTO_CHACHA20_NEON=m -CONFIG_BINARY_PRINTF=y +# end of Certificates for signature checking # # Library routines # -CONFIG_RAID6_PQ=m +# CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_RATIONAL=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_IO=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y @@ -6042,25 +4075,15 @@ CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set # CONFIG_CRC4 is not set # CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=m +# CONFIG_LIBCRC32C is not set # CONFIG_CRC8 is not set -CONFIG_XXHASH=y -CONFIG_AUDIT_GENERIC=y -# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set # CONFIG_RANDOM32_SELFTEST is not set -CONFIG_842_COMPRESS=m -CONFIG_842_DECOMPRESS=m CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=m -CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=m -CONFIG_LZ4HC_COMPRESS=m CONFIG_LZ4_DECOMPRESS=y -CONFIG_ZSTD_COMPRESS=m -CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y @@ -6077,46 +4100,183 @@ CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_LZ4=y CONFIG_GENERIC_ALLOCATOR=y -CONFIG_REED_SOLOMON=m -CONFIG_REED_SOLOMON_DEC8=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_DMA=y -# CONFIG_DMA_NOOP_OPS is not set -# CONFIG_DMA_VIRT_OPS is not set +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=64 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y -CONFIG_LRU_CACHE=m CONFIG_CLZ_TAB=y -# CONFIG_CORDIC is not set -# CONFIG_DDR is not set # CONFIG_IRQ_POLL is not set -CONFIG_MPILIB=m +CONFIG_MPILIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_FONT_SUPPORT=y -CONFIG_FONTS=y -# CONFIG_FONT_8x8 is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y -# CONFIG_FONT_6x11 is not set -CONFIG_FONT_7x14=y -# CONFIG_FONT_PEARL_8x8 is not set -# CONFIG_FONT_ACORN_8x8 is not set -# CONFIG_FONT_MINI_4x6 is not set -# CONFIG_FONT_6x10 is not set -# CONFIG_FONT_10x18 is not set -# CONFIG_FONT_SUN8x16 is not set -# CONFIG_FONT_SUN12x22 is not set -# CONFIG_SG_SPLIT is not set CONFIG_SG_POOL=y -CONFIG_ARCH_HAS_SG_CHAIN=y CONFIG_SBITMAP=y # CONFIG_STRING_SELFTEST is not set -# CONFIG_VIRTUALIZATION is not set +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_DYNAMIC_DEBUG is not set +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_STRIP_ASM_SYMS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_INSTALL is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# end of Compile-time checks and compiler options + +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +# CONFIG_DEBUG_KERNEL is not set + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_CC_HAS_KASAN_GENERIC=y +CONFIG_KASAN_STACK=1 +# end of Memory Debugging + +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set + +# +# Debug Lockups and Hangs +# +# end of Debug Lockups and Hangs + +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_DEBUG_TIMEKEEPING is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +CONFIG_DEBUG_BUGVERBOSE=y + +# +# RCU Debugging +# +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# end of RCU Debugging + +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_REED_SOLOMON_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_STRSCPY is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_BITFIELD is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_XARRAY is not set +# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_IDA is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_VMALLOC is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_BLACKHOLE_DEV is not set +# CONFIG_FIND_BIT_BENCHMARK is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +# CONFIG_TEST_MEMCAT_P is not set +# CONFIG_TEST_STACKINIT is not set +# CONFIG_TEST_MEMINIT is not set +# CONFIG_MEMTEST is not set +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_UBSAN is not set +CONFIG_UBSAN_ALIGNMENT=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_UNWINDER_FRAME_POINTER is not set +CONFIG_UNWINDER_ARM=y +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_CORESIGHT is not set +# end of Kernel hacking diff --git a/buildroot-external/board/hardkernel/patches/README.md b/buildroot-external/board/hardkernel/patches/README.md index 09d2ff30d..e6fa21ac7 100644 --- a/buildroot-external/board/hardkernel/patches/README.md +++ b/buildroot-external/board/hardkernel/patches/README.md @@ -1,2 +1,3 @@ # Kernel https://github.com/akuster/meta-odroid +https://github.com/superna9999/linux diff --git a/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch b/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch deleted file mode 100644 index b34666a0e..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0001-ARM64-defconfig-enable-CEC-support.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 6763c7964e9cb28e21497eee0032be053461bba5 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Mon, 13 Nov 2017 12:09:40 +0100 -Subject: [PATCH 01/53] ARM64: defconfig: enable CEC support - -Turn on CONFIG_CEC_SUPPORT and CONFIG_CEC_PLATFORM_DRIVERS -Turn on CONFIG_VIDEO_MESON_AO_CEC as module -Turn on CONFIG_DRM_DW_HDMI_CEC as module - -Signed-off-by: Jerome Brunet -Signed-off-by: Neil Armstrong ---- - arch/arm64/configs/defconfig | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index db8d364f8476..ab1cb51319e7 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -413,6 +413,7 @@ CONFIG_MEDIA_SUPPORT=m - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_ANALOG_TV_SUPPORT=y - CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -+CONFIG_MEDIA_CEC_SUPPORT=y - CONFIG_MEDIA_CONTROLLER=y - CONFIG_VIDEO_V4L2_SUBDEV_API=y - # CONFIG_DVB_NET is not set -@@ -424,6 +425,8 @@ CONFIG_VIDEO_SAMSUNG_S5P_MFC=m - CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m - CONFIG_VIDEO_RENESAS_FCP=m - CONFIG_VIDEO_RENESAS_VSP1=m -+CONFIG_CEC_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_MESON_AO_CEC=m - CONFIG_DRM=m - CONFIG_DRM_NOUVEAU=m - CONFIG_DRM_EXYNOS=m -@@ -444,6 +447,7 @@ CONFIG_DRM_RCAR_LVDS=m - CONFIG_DRM_TEGRA=m - CONFIG_DRM_PANEL_SIMPLE=m - CONFIG_DRM_I2C_ADV7511=m -+CONFIG_DRM_DW_HDMI_CEC=m - CONFIG_DRM_VC4=m - CONFIG_DRM_HISI_HIBMC=m - CONFIG_DRM_HISI_KIRIN=m --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch deleted file mode 100644 index e9a3240ab..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0002-ASoC-meson-add-meson-audio-core-driver.patch +++ /dev/null @@ -1,290 +0,0 @@ -From 6b2734923e6bf1d4bd98f918400e2c7a692a8db0 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 11:49:55 +0200 -Subject: [PATCH 02/53] ASoC: meson: add meson audio core driver - -This patch adds support for the audio core driver for the Amlogic Meson SoC -family. The purpose of this driver is to properly reset the audio block and -provide register access for the different devices scattered in this address -space. This includes output and input DMAs, pcm, i2s and spdif dai, card -level routing, internal codec for the gxl variant - -For more information, please refer to the section 5 of the public datasheet -of the S905 (gxbb). This datasheet is available here: [0]. - -[0]: http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/Kconfig | 10 ++ - sound/soc/meson/Makefile | 4 + - sound/soc/meson/audio-core.c | 190 +++++++++++++++++++++++++++++++++++ - sound/soc/meson/audio-core.h | 28 ++++++ - 4 files changed, 232 insertions(+) - create mode 100644 sound/soc/meson/audio-core.c - create mode 100644 sound/soc/meson/audio-core.h - -diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig -index 8af8bc358a90..ed432d488b74 100644 ---- a/sound/soc/meson/Kconfig -+++ b/sound/soc/meson/Kconfig -@@ -63,3 +63,13 @@ config SND_MESON_AXG_SPDIFOUT - in the Amlogic AXG SoC family - - endmenu -+ -+menuconfig SND_SOC_MESON -+ tristate "ASoC support for Amlogic Meson SoCs" -+ depends on ARCH_MESON -+ select MFD_CORE -+ select REGMAP_MMIO -+ help -+ Say Y or M if you want to add support for codecs attached to -+ the Amlogic Meson SoCs Audio interfaces. You will also need to -+ select the audio interfaces to support below. -diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile -index c5e003b093db..768d7c414649 100644 ---- a/sound/soc/meson/Makefile -+++ b/sound/soc/meson/Makefile -@@ -19,3 +19,7 @@ obj-$(CONFIG_SND_MESON_AXG_TDMIN) += snd-soc-meson-axg-tdmin.o - obj-$(CONFIG_SND_MESON_AXG_TDMOUT) += snd-soc-meson-axg-tdmout.o - obj-$(CONFIG_SND_MESON_AXG_SOUND_CARD) += snd-soc-meson-axg-sound-card.o - obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o -+ -+snd-soc-meson-audio-core-objs := audio-core.o -+ -+obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o -\ No newline at end of file -diff --git a/sound/soc/meson/audio-core.c b/sound/soc/meson/audio-core.c -new file mode 100644 -index 000000000000..99993ec4a5cc ---- /dev/null -+++ b/sound/soc/meson/audio-core.c -@@ -0,0 +1,190 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "audio-core.h" -+ -+#define DRV_NAME "meson-audio-core" -+ -+static const char * const acore_clock_names[] = { "aiu_top", -+ "aiu_glue", -+ "audin" }; -+ -+static int meson_acore_init_clocks(struct device *dev) -+{ -+ struct clk *clock; -+ int i, ret; -+ -+ for (i = 0; i < ARRAY_SIZE(acore_clock_names); i++) { -+ clock = devm_clk_get(dev, acore_clock_names[i]); -+ if (IS_ERR(clock)) { -+ if (PTR_ERR(clock) != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get %s clock\n", -+ acore_clock_names[i]); -+ return PTR_ERR(clock); -+ } -+ -+ ret = clk_prepare_enable(clock); -+ if (ret) { -+ dev_err(dev, "Failed to enable %s clock\n", -+ acore_clock_names[i]); -+ return ret; -+ } -+ -+ ret = devm_add_action_or_reset(dev, -+ (void(*)(void *))clk_disable_unprepare, -+ clock); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static const char * const acore_reset_names[] = { "aiu", -+ "audin" }; -+ -+static int meson_acore_init_resets(struct device *dev) -+{ -+ struct reset_control *reset; -+ int i, ret; -+ -+ for (i = 0; i < ARRAY_SIZE(acore_reset_names); i++) { -+ reset = devm_reset_control_get_exclusive(dev, -+ acore_reset_names[i]); -+ if (IS_ERR(reset)) { -+ if (PTR_ERR(reset) != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get %s reset\n", -+ acore_reset_names[i]); -+ return PTR_ERR(reset); -+ } -+ -+ ret = reset_control_reset(reset); -+ if (ret) { -+ dev_err(dev, "Failed to pulse %s reset\n", -+ acore_reset_names[i]); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+static const struct regmap_config meson_acore_regmap_config = { -+ .reg_bits = 32, -+ .val_bits = 32, -+ .reg_stride = 4, -+}; -+ -+static const struct mfd_cell meson_acore_devs[] = { -+ { -+ .name = "meson-i2s-dai", -+ .of_compatible = "amlogic,meson-i2s-dai", -+ }, -+ { -+ .name = "meson-spdif-dai", -+ .of_compatible = "amlogic,meson-spdif-dai", -+ }, -+ { -+ .name = "meson-aiu-i2s-dma", -+ .of_compatible = "amlogic,meson-aiu-i2s-dma", -+ }, -+ { -+ .name = "meson-aiu-spdif-dma", -+ .of_compatible = "amlogic,meson-aiu-spdif-dma", -+ }, -+}; -+ -+static int meson_acore_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct meson_audio_core_data *data; -+ struct resource *res; -+ void __iomem *regs; -+ int ret; -+ -+ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ platform_set_drvdata(pdev, data); -+ -+ ret = meson_acore_init_clocks(dev); -+ if (ret) -+ return ret; -+ -+ ret = meson_acore_init_resets(dev); -+ if (ret) -+ return ret; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aiu"); -+ regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(regs)) -+ return PTR_ERR(regs); -+ -+ data->aiu = devm_regmap_init_mmio(dev, regs, -+ &meson_acore_regmap_config); -+ if (IS_ERR(data->aiu)) { -+ dev_err(dev, "Couldn't create the AIU regmap\n"); -+ return PTR_ERR(data->aiu); -+ } -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audin"); -+ regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(regs)) -+ return PTR_ERR(regs); -+ -+ data->audin = devm_regmap_init_mmio(dev, regs, -+ &meson_acore_regmap_config); -+ if (IS_ERR(data->audin)) { -+ dev_err(dev, "Couldn't create the AUDIN regmap\n"); -+ return PTR_ERR(data->audin); -+ } -+ -+ return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, meson_acore_devs, -+ ARRAY_SIZE(meson_acore_devs), NULL, 0, -+ NULL); -+} -+ -+static const struct of_device_id meson_acore_of_match[] = { -+ { .compatible = "amlogic,meson-audio-core", }, -+ { .compatible = "amlogic,meson-gxbb-audio-core", }, -+ { .compatible = "amlogic,meson-gxl-audio-core", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, meson_acore_of_match); -+ -+static struct platform_driver meson_acore_pdrv = { -+ .probe = meson_acore_probe, -+ .driver = { -+ .name = DRV_NAME, -+ .of_match_table = meson_acore_of_match, -+ }, -+}; -+module_platform_driver(meson_acore_pdrv); -+ -+MODULE_DESCRIPTION("Meson Audio Core Driver"); -+MODULE_AUTHOR("Jerome Brunet "); -+MODULE_LICENSE("GPL v2"); -diff --git a/sound/soc/meson/audio-core.h b/sound/soc/meson/audio-core.h -new file mode 100644 -index 000000000000..6e7a24cdc4a9 ---- /dev/null -+++ b/sound/soc/meson/audio-core.h -@@ -0,0 +1,28 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#ifndef _MESON_AUDIO_CORE_H_ -+#define _MESON_AUDIO_CORE_H_ -+ -+struct meson_audio_core_data { -+ struct regmap *aiu; -+ struct regmap *audin; -+}; -+ -+#endif /* _MESON_AUDIO_CORE_H_ */ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0002-dwc3-add-parkmode_disable_ss_quirk-for-G12A.patch b/buildroot-external/board/hardkernel/patches/linux/0002-dwc3-add-parkmode_disable_ss_quirk-for-G12A.patch new file mode 100644 index 000000000..2d89ed9aa --- /dev/null +++ b/buildroot-external/board/hardkernel/patches/linux/0002-dwc3-add-parkmode_disable_ss_quirk-for-G12A.patch @@ -0,0 +1,106 @@ +From c669757a7564c19d042bc5ac18199bb6f3f4e928 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 27 Sep 2019 15:16:38 +0200 +Subject: [PATCH 1/1] dwc3: add parkmode_disable_ss_quirk for G12A + +Could you validate this fixes the following issue ? +[ 221.141621] xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command. +[ 221.157631] xhci-hcd xhci-hcd.0.auto: Host halt failed, -110 +[ 221.157635] xhci-hcd xhci-hcd.0.auto: xHCI host controller not responding, assume dead +[ 221.159901] xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command. +[ 221.159961] hub 2-1.1:1.0: hub_ext_port_status failed (err = -22) +[ 221.160076] xhci-hcd xhci-hcd.0.auto: HC died; cleaning up +[ 221.165946] usb 2-1.1-port1: cannot reset (err = -22) + +Cc: Tim +CC: Dongjin Kim +Cc: Jianxin Pan +CC: linux-amlogic@lists.infradead.org +Signed-off-by: Neil Armstrong +--- + Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++ + arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 1 + + drivers/usb/dwc3/core.c | 5 +++++ + drivers/usb/dwc3/core.h | 4 ++++ + 4 files changed, 12 insertions(+) + +diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt +index 66780a47ad85..c977a3ba2f35 100644 +--- a/Documentation/devicetree/bindings/usb/dwc3.txt ++++ b/Documentation/devicetree/bindings/usb/dwc3.txt +@@ -75,6 +75,8 @@ Optional properties: + from P0 to P1/P2/P3 without delay. + - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check + during HS transmit. ++ - snps,parkmode-disable-ss-quirk: when set, all SuperSpeed bus instances in ++ park mode are disabled. + - snps,dis_metastability_quirk: when set, disable metastability workaround. + CAUTION: use only if you are absolutely sure of it. + - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal +diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +index 852cf9cf121b..139f24975c0e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +@@ -2401,6 +2401,7 @@ + dr_mode = "host"; + snps,dis_u2_susphy_quirk; + snps,quirk-frame-length-adjustment; ++ snps,parkmode-disable-ss-quirk; + }; + }; + +diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c +index c9bb93a2c81e..f64dba17a50d 100644 +--- a/drivers/usb/dwc3/core.c ++++ b/drivers/usb/dwc3/core.c +@@ -983,6 +983,9 @@ static int dwc3_core_init(struct dwc3 *dwc) + if (dwc->dis_tx_ipgap_linecheck_quirk) + reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; + ++ if (dwc->parkmode_disable_ss_quirk) ++ reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS; ++ + dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); + } + +@@ -1294,6 +1297,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) + "snps,dis-del-phy-power-chg-quirk"); + dwc->dis_tx_ipgap_linecheck_quirk = device_property_read_bool(dev, + "snps,dis-tx-ipgap-linecheck-quirk"); ++ dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev, ++ "snps,parkmode-disable-ss-quirk"); + + dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, + "snps,tx_de_emphasis_quirk"); +diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h +index 3dd783b889cb..ab071163b3b8 100644 +--- a/drivers/usb/dwc3/core.h ++++ b/drivers/usb/dwc3/core.h +@@ -249,6 +249,7 @@ + #define DWC3_GUCTL_HSTINAUTORETRY BIT(14) + + /* Global User Control 1 Register */ ++#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17) + #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) + #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) + +@@ -1022,6 +1023,8 @@ struct dwc3_scratchpad_array { + * change quirk. + * @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate + * check during HS transmit. ++ * @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed ++ * instances in park mode. + * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk + * @tx_de_emphasis: Tx de-emphasis value + * 0 - -6dB de-emphasis +@@ -1211,6 +1214,7 @@ struct dwc3 { + unsigned dis_u2_freeclk_exists_quirk:1; + unsigned dis_del_phy_power_chg_quirk:1; + unsigned dis_tx_ipgap_linecheck_quirk:1; ++ unsigned parkmode_disable_ss_quirk:1; + + unsigned tx_de_emphasis_quirk:1; + unsigned tx_de_emphasis:2; +-- +2.17.1 + diff --git a/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch b/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch deleted file mode 100644 index 7266b0dbd..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0003-ASoC-meson-add-register-definitions.patch +++ /dev/null @@ -1,360 +0,0 @@ -From 0b2aabc632854e317544bb293cbc0c63e120ddfa Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 12:00:10 +0200 -Subject: [PATCH 03/53] ASoC: meson: add register definitions - -Add the register definition for the AIU and AUDIN blocks - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/aiu-regs.h | 182 +++++++++++++++++++++++++++++++++++ - sound/soc/meson/audin-regs.h | 148 ++++++++++++++++++++++++++++ - 2 files changed, 330 insertions(+) - create mode 100644 sound/soc/meson/aiu-regs.h - create mode 100644 sound/soc/meson/audin-regs.h - -diff --git a/sound/soc/meson/aiu-regs.h b/sound/soc/meson/aiu-regs.h -new file mode 100644 -index 000000000000..67391e64fe1c ---- /dev/null -+++ b/sound/soc/meson/aiu-regs.h -@@ -0,0 +1,182 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#ifndef _AIU_REGS_H_ -+#define _AIU_REGS_H_ -+ -+#define AIU_958_BPF 0x000 -+#define AIU_958_BRST 0x004 -+#define AIU_958_LENGTH 0x008 -+#define AIU_958_PADDSIZE 0x00C -+#define AIU_958_MISC 0x010 -+#define AIU_958_FORCE_LEFT 0x014 /* Unknown */ -+#define AIU_958_DISCARD_NUM 0x018 -+#define AIU_958_DCU_FF_CTRL 0x01C -+#define AIU_958_CHSTAT_L0 0x020 -+#define AIU_958_CHSTAT_L1 0x024 -+#define AIU_958_CTRL 0x028 -+#define AIU_958_RPT 0x02C -+#define AIU_I2S_MUTE_SWAP 0x030 -+#define AIU_I2S_SOURCE_DESC 0x034 -+#define AIU_I2S_MED_CTRL 0x038 -+#define AIU_I2S_MED_THRESH 0x03C -+#define AIU_I2S_DAC_CFG 0x040 -+#define AIU_I2S_SYNC 0x044 /* Unknown */ -+#define AIU_I2S_MISC 0x048 -+#define AIU_I2S_OUT_CFG 0x04C -+#define AIU_I2S_FF_CTRL 0x050 /* Unknown */ -+#define AIU_RST_SOFT 0x054 -+#define AIU_CLK_CTRL 0x058 -+#define AIU_MIX_ADCCFG 0x05C -+#define AIU_MIX_CTRL 0x060 -+#define AIU_CLK_CTRL_MORE 0x064 -+#define AIU_958_POP 0x068 -+#define AIU_MIX_GAIN 0x06C -+#define AIU_958_SYNWORD1 0x070 -+#define AIU_958_SYNWORD2 0x074 -+#define AIU_958_SYNWORD3 0x078 -+#define AIU_958_SYNWORD1_MASK 0x07C -+#define AIU_958_SYNWORD2_MASK 0x080 -+#define AIU_958_SYNWORD3_MASK 0x084 -+#define AIU_958_FFRDOUT_THD 0x088 -+#define AIU_958_LENGTH_PER_PAUSE 0x08C -+#define AIU_958_PAUSE_NUM 0x090 -+#define AIU_958_PAUSE_PAYLOAD 0x094 -+#define AIU_958_AUTO_PAUSE 0x098 -+#define AIU_958_PAUSE_PD_LENGTH 0x09C -+#define AIU_CODEC_DAC_LRCLK_CTRL 0x0A0 -+#define AIU_CODEC_ADC_LRCLK_CTRL 0x0A4 -+#define AIU_HDMI_CLK_DATA_CTRL 0x0A8 -+#define AIU_CODEC_CLK_DATA_CTRL 0x0AC -+#define AIU_ACODEC_CTRL 0x0B0 -+#define AIU_958_CHSTAT_R0 0x0C0 -+#define AIU_958_CHSTAT_R1 0x0C4 -+#define AIU_958_VALID_CTRL 0x0C8 -+#define AIU_AUDIO_AMP_REG0 0x0F0 /* Unknown */ -+#define AIU_AUDIO_AMP_REG1 0x0F4 /* Unknown */ -+#define AIU_AUDIO_AMP_REG2 0x0F8 /* Unknown */ -+#define AIU_AUDIO_AMP_REG3 0x0FC /* Unknown */ -+#define AIU_AIFIFO2_CTRL 0x100 -+#define AIU_AIFIFO2_STATUS 0x104 -+#define AIU_AIFIFO2_GBIT 0x108 -+#define AIU_AIFIFO2_CLB 0x10C -+#define AIU_CRC_CTRL 0x110 -+#define AIU_CRC_STATUS 0x114 -+#define AIU_CRC_SHIFT_REG 0x118 -+#define AIU_CRC_IREG 0x11C -+#define AIU_CRC_CAL_REG1 0x120 -+#define AIU_CRC_CAL_REG0 0x124 -+#define AIU_CRC_POLY_COEF1 0x128 -+#define AIU_CRC_POLY_COEF0 0x12C -+#define AIU_CRC_BIT_SIZE1 0x130 -+#define AIU_CRC_BIT_SIZE0 0x134 -+#define AIU_CRC_BIT_CNT1 0x138 -+#define AIU_CRC_BIT_CNT0 0x13C -+#define AIU_AMCLK_GATE_HI 0x140 -+#define AIU_AMCLK_GATE_LO 0x144 -+#define AIU_AMCLK_MSR 0x148 -+#define AIU_AUDAC_CTRL0 0x14C /* Unknown */ -+#define AIU_DELTA_SIGMA0 0x154 /* Unknown */ -+#define AIU_DELTA_SIGMA1 0x158 /* Unknown */ -+#define AIU_DELTA_SIGMA2 0x15C /* Unknown */ -+#define AIU_DELTA_SIGMA3 0x160 /* Unknown */ -+#define AIU_DELTA_SIGMA4 0x164 /* Unknown */ -+#define AIU_DELTA_SIGMA5 0x168 /* Unknown */ -+#define AIU_DELTA_SIGMA6 0x16C /* Unknown */ -+#define AIU_DELTA_SIGMA7 0x170 /* Unknown */ -+#define AIU_DELTA_SIGMA_LCNTS 0x174 /* Unknown */ -+#define AIU_DELTA_SIGMA_RCNTS 0x178 /* Unknown */ -+#define AIU_MEM_I2S_START_PTR 0x180 -+#define AIU_MEM_I2S_RD_PTR 0x184 -+#define AIU_MEM_I2S_END_PTR 0x188 -+#define AIU_MEM_I2S_MASKS 0x18C -+#define AIU_MEM_I2S_CONTROL 0x190 -+#define AIU_MEM_IEC958_START_PTR 0x194 -+#define AIU_MEM_IEC958_RD_PTR 0x198 -+#define AIU_MEM_IEC958_END_PTR 0x19C -+#define AIU_MEM_IEC958_MASKS 0x1A0 -+#define AIU_MEM_IEC958_CONTROL 0x1A4 -+#define AIU_MEM_AIFIFO2_START_PTR 0x1A8 -+#define AIU_MEM_AIFIFO2_CURR_PTR 0x1AC -+#define AIU_MEM_AIFIFO2_END_PTR 0x1B0 -+#define AIU_MEM_AIFIFO2_BYTES_AVAIL 0x1B4 -+#define AIU_MEM_AIFIFO2_CONTROL 0x1B8 -+#define AIU_MEM_AIFIFO2_MAN_WP 0x1BC -+#define AIU_MEM_AIFIFO2_MAN_RP 0x1C0 -+#define AIU_MEM_AIFIFO2_LEVEL 0x1C4 -+#define AIU_MEM_AIFIFO2_BUF_CNTL 0x1C8 -+#define AIU_MEM_I2S_MAN_WP 0x1CC -+#define AIU_MEM_I2S_MAN_RP 0x1D0 -+#define AIU_MEM_I2S_LEVEL 0x1D4 -+#define AIU_MEM_I2S_BUF_CNTL 0x1D8 -+#define AIU_MEM_I2S_BUF_WRAP_COUNT 0x1DC -+#define AIU_MEM_I2S_MEM_CTL 0x1E0 -+#define AIU_MEM_IEC958_MEM_CTL 0x1E4 -+#define AIU_MEM_IEC958_WRAP_COUNT 0x1E8 -+#define AIU_MEM_IEC958_IRQ_LEVEL 0x1EC -+#define AIU_MEM_IEC958_MAN_WP 0x1F0 -+#define AIU_MEM_IEC958_MAN_RP 0x1F4 -+#define AIU_MEM_IEC958_LEVEL 0x1F8 -+#define AIU_MEM_IEC958_BUF_CNTL 0x1FC -+#define AIU_AIFIFO_CTRL 0x200 -+#define AIU_AIFIFO_STATUS 0x204 -+#define AIU_AIFIFO_GBIT 0x208 -+#define AIU_AIFIFO_CLB 0x20C -+#define AIU_MEM_AIFIFO_START_PTR 0x210 -+#define AIU_MEM_AIFIFO_CURR_PTR 0x214 -+#define AIU_MEM_AIFIFO_END_PTR 0x218 -+#define AIU_MEM_AIFIFO_BYTES_AVAIL 0x21C -+#define AIU_MEM_AIFIFO_CONTROL 0x220 -+#define AIU_MEM_AIFIFO_MAN_WP 0x224 -+#define AIU_MEM_AIFIFO_MAN_RP 0x228 -+#define AIU_MEM_AIFIFO_LEVEL 0x22C -+#define AIU_MEM_AIFIFO_BUF_CNTL 0x230 -+#define AIU_MEM_AIFIFO_BUF_WRAP_COUNT 0x234 -+#define AIU_MEM_AIFIFO2_BUF_WRAP_COUNT 0x238 -+#define AIU_MEM_AIFIFO_MEM_CTL 0x23C -+#define AIFIFO_TIME_STAMP_CNTL 0x240 -+#define AIFIFO_TIME_STAMP_SYNC_0 0x244 -+#define AIFIFO_TIME_STAMP_SYNC_1 0x248 -+#define AIFIFO_TIME_STAMP_0 0x24C -+#define AIFIFO_TIME_STAMP_1 0x250 -+#define AIFIFO_TIME_STAMP_2 0x254 -+#define AIFIFO_TIME_STAMP_3 0x258 -+#define AIFIFO_TIME_STAMP_LENGTH 0x25C -+#define AIFIFO2_TIME_STAMP_CNTL 0x260 -+#define AIFIFO2_TIME_STAMP_SYNC_0 0x264 -+#define AIFIFO2_TIME_STAMP_SYNC_1 0x268 -+#define AIFIFO2_TIME_STAMP_0 0x26C -+#define AIFIFO2_TIME_STAMP_1 0x270 -+#define AIFIFO2_TIME_STAMP_2 0x274 -+#define AIFIFO2_TIME_STAMP_3 0x278 -+#define AIFIFO2_TIME_STAMP_LENGTH 0x27C -+#define IEC958_TIME_STAMP_CNTL 0x280 -+#define IEC958_TIME_STAMP_SYNC_0 0x284 -+#define IEC958_TIME_STAMP_SYNC_1 0x288 -+#define IEC958_TIME_STAMP_0 0x28C -+#define IEC958_TIME_STAMP_1 0x290 -+#define IEC958_TIME_STAMP_2 0x294 -+#define IEC958_TIME_STAMP_3 0x298 -+#define IEC958_TIME_STAMP_LENGTH 0x29C -+#define AIU_MEM_AIFIFO2_MEM_CTL 0x2A0 -+#define AIU_I2S_CBUS_DDR_CNTL 0x2A4 -+#define AIU_I2S_CBUS_DDR_WDATA 0x2A8 -+#define AIU_I2S_CBUS_DDR_ADDR 0x2AC -+ -+#endif /* _AIU_REGS_H_ */ -diff --git a/sound/soc/meson/audin-regs.h b/sound/soc/meson/audin-regs.h -new file mode 100644 -index 000000000000..f224610e80e7 ---- /dev/null -+++ b/sound/soc/meson/audin-regs.h -@@ -0,0 +1,148 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#ifndef _AUDIN_REGS_H_ -+#define _AUDIN_REGS_H_ -+ -+/* -+ * Note : -+ * Datasheet issue page 196 -+ * AUDIN_MUTE_VAL 0x35 => impossible: Already assigned to AUDIN_FIFO1_PTR -+ * AUDIN_FIFO1_PTR is more likely to be correct here since surrounding registers -+ * also deal with AUDIN_FIFO1 -+ * -+ * Clarification needed from Amlogic -+ */ -+ -+#define AUDIN_SPDIF_MODE 0x000 -+#define AUDIN_SPDIF_FS_CLK_RLTN 0x004 -+#define AUDIN_SPDIF_CHNL_STS_A 0x008 -+#define AUDIN_SPDIF_CHNL_STS_B 0x00C -+#define AUDIN_SPDIF_MISC 0x010 -+#define AUDIN_SPDIF_NPCM_PCPD 0x014 -+#define AUDIN_SPDIF_END 0x03C /* Unknown */ -+#define AUDIN_I2SIN_CTRL 0x040 -+#define AUDIN_SOURCE_SEL 0x044 -+#define AUDIN_DECODE_FORMAT 0x048 -+#define AUDIN_DECODE_CONTROL_STATUS 0x04C -+#define AUDIN_DECODE_CHANNEL_STATUS_A_0 0x050 -+#define AUDIN_DECODE_CHANNEL_STATUS_A_1 0x054 -+#define AUDIN_DECODE_CHANNEL_STATUS_A_2 0x058 -+#define AUDIN_DECODE_CHANNEL_STATUS_A_3 0x05C -+#define AUDIN_DECODE_CHANNEL_STATUS_A_4 0x060 -+#define AUDIN_DECODE_CHANNEL_STATUS_A_5 0x064 -+#define AUDIN_FIFO0_START 0x080 -+#define AUDIN_FIFO0_END 0x084 -+#define AUDIN_FIFO0_PTR 0x088 -+#define AUDIN_FIFO0_INTR 0x08C -+#define AUDIN_FIFO0_RDPTR 0x090 -+#define AUDIN_FIFO0_CTRL 0x094 -+#define AUDIN_FIFO0_CTRL1 0x098 -+#define AUDIN_FIFO0_LVL0 0x09C -+#define AUDIN_FIFO0_LVL1 0x0A0 -+#define AUDIN_FIFO0_LVL2 0x0A4 -+#define AUDIN_FIFO0_REQID 0x0C0 -+#define AUDIN_FIFO0_WRAP 0x0C4 -+#define AUDIN_FIFO1_START 0x0CC -+#define AUDIN_FIFO1_END 0x0D0 -+#define AUDIN_FIFO1_PTR 0x0D4 -+#define AUDIN_FIFO1_INTR 0x0D8 -+#define AUDIN_FIFO1_RDPTR 0x0DC -+#define AUDIN_FIFO1_CTRL 0x0E0 -+#define AUDIN_FIFO1_CTRL1 0x0E4 -+#define AUDIN_FIFO1_LVL0 0x100 -+#define AUDIN_FIFO1_LVL1 0x104 -+#define AUDIN_FIFO1_LVL2 0x108 -+#define AUDIN_FIFO1_REQID 0x10C -+#define AUDIN_FIFO1_WRAP 0x110 -+#define AUDIN_FIFO2_START 0x114 -+#define AUDIN_FIFO2_END 0x118 -+#define AUDIN_FIFO2_PTR 0x11C -+#define AUDIN_FIFO2_INTR 0x120 -+#define AUDIN_FIFO2_RDPTR 0x124 -+#define AUDIN_FIFO2_CTRL 0x128 -+#define AUDIN_FIFO2_CTRL1 0x12C -+#define AUDIN_FIFO2_LVL0 0x130 -+#define AUDIN_FIFO2_LVL1 0x134 -+#define AUDIN_FIFO2_LVL2 0x138 -+#define AUDIN_FIFO2_REQID 0x13C -+#define AUDIN_FIFO2_WRAP 0x140 -+#define AUDIN_INT_CTRL 0x144 -+#define AUDIN_FIFO_INT 0x148 -+#define PCMIN_CTRL0 0x180 -+#define PCMIN_CTRL1 0x184 -+#define PCMIN1_CTRL0 0x188 -+#define PCMIN1_CTRL1 0x18C -+#define PCMOUT_CTRL0 0x1C0 -+#define PCMOUT_CTRL1 0x1C4 -+#define PCMOUT_CTRL2 0x1C8 -+#define PCMOUT_CTRL3 0x1CC -+#define PCMOUT1_CTRL0 0x1D0 -+#define PCMOUT1_CTRL1 0x1D4 -+#define PCMOUT1_CTRL2 0x1D8 -+#define PCMOUT1_CTRL3 0x1DC -+#define AUDOUT_CTRL 0x200 -+#define AUDOUT_CTRL1 0x204 -+#define AUDOUT_BUF0_STA 0x208 -+#define AUDOUT_BUF0_EDA 0x20C -+#define AUDOUT_BUF0_WPTR 0x210 -+#define AUDOUT_BUF1_STA 0x214 -+#define AUDOUT_BUF1_EDA 0x218 -+#define AUDOUT_BUF1_WPTR 0x21C -+#define AUDOUT_FIFO_RPTR 0x220 -+#define AUDOUT_INTR_PTR 0x224 -+#define AUDOUT_FIFO_STS 0x228 -+#define AUDOUT1_CTRL 0x240 -+#define AUDOUT1_CTRL1 0x244 -+#define AUDOUT1_BUF0_STA 0x248 -+#define AUDOUT1_BUF0_EDA 0x24C -+#define AUDOUT1_BUF0_WPTR 0x250 -+#define AUDOUT1_BUF1_STA 0x254 -+#define AUDOUT1_BUF1_EDA 0x258 -+#define AUDOUT1_BUF1_WPTR 0x25C -+#define AUDOUT1_FIFO_RPTR 0x260 -+#define AUDOUT1_INTR_PTR 0x264 -+#define AUDOUT1_FIFO_STS 0x268 -+#define AUDIN_HDMI_MEAS_CTRL 0x280 -+#define AUDIN_HDMI_MEAS_CYCLES_M1 0x284 -+#define AUDIN_HDMI_MEAS_INTR_MASKN 0x288 -+#define AUDIN_HDMI_MEAS_INTR_STAT 0x28C -+#define AUDIN_HDMI_REF_CYCLES_STAT_0 0x290 -+#define AUDIN_HDMI_REF_CYCLES_STAT_1 0x294 -+#define AUDIN_HDMIRX_AFIFO_STAT 0x298 -+#define AUDIN_FIFO0_PIO_STS 0x2C0 -+#define AUDIN_FIFO0_PIO_RDL 0x2C4 -+#define AUDIN_FIFO0_PIO_RDH 0x2C8 -+#define AUDIN_FIFO1_PIO_STS 0x2CC -+#define AUDIN_FIFO1_PIO_RDL 0x2D0 -+#define AUDIN_FIFO1_PIO_RDH 0x2D4 -+#define AUDIN_FIFO2_PIO_STS 0x2D8 -+#define AUDIN_FIFO2_PIO_RDL 0x2DC -+#define AUDIN_FIFO2_PIO_RDH 0x2E0 -+#define AUDOUT_FIFO_PIO_STS 0x2E4 -+#define AUDOUT_FIFO_PIO_WRL 0x2E8 -+#define AUDOUT_FIFO_PIO_WRH 0x2EC -+#define AUDOUT1_FIFO_PIO_STS 0x2F0 /* Unknown */ -+#define AUDOUT1_FIFO_PIO_WRL 0x2F4 /* Unknown */ -+#define AUDOUT1_FIFO_PIO_WRH 0x2F8 /* Unknown */ -+#define AUD_RESAMPLE_CTRL0 0x2FC -+#define AUD_RESAMPLE_CTRL1 0x300 -+#define AUD_RESAMPLE_STATUS 0x304 -+ -+#endif /* _AUDIN_REGS_H_ */ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch b/buildroot-external/board/hardkernel/patches/linux/0003-mali_odroid-xu.patch similarity index 100% rename from buildroot-external/board/hardkernel/patches/linux/mali_odroid-xu.patch rename to buildroot-external/board/hardkernel/patches/linux/0003-mali_odroid-xu.patch diff --git a/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch b/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch deleted file mode 100644 index 926c8182d..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0004-ASoC-meson-add-aiu-i2s-dma-support.patch +++ /dev/null @@ -1,424 +0,0 @@ -From 61d387ffa57865531ead1a33d63b1d53a99e808b Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 12:14:40 +0200 -Subject: [PATCH 04/53] ASoC: meson: add aiu i2s dma support - -Add support for the i2s output dma which is part of the AIU block - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/Kconfig | 7 + - sound/soc/meson/Makefile | 4 +- - sound/soc/meson/aiu-i2s-dma.c | 370 ++++++++++++++++++++++++++++++++++ - 3 files changed, 380 insertions(+), 1 deletion(-) - create mode 100644 sound/soc/meson/aiu-i2s-dma.c - -diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig -index ed432d488b74..6e030b5c7804 100644 ---- a/sound/soc/meson/Kconfig -+++ b/sound/soc/meson/Kconfig -@@ -73,3 +73,10 @@ menuconfig SND_SOC_MESON - Say Y or M if you want to add support for codecs attached to - the Amlogic Meson SoCs Audio interfaces. You will also need to - select the audio interfaces to support below. -+ -+config SND_SOC_MESON_I2S -+ tristate "Meson i2s interface" -+ depends on SND_SOC_MESON -+ help -+ Say Y or M if you want to add support for i2s dma driver for Amlogic -+ Meson SoCs. -diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile -index 768d7c414649..57960077aab2 100644 ---- a/sound/soc/meson/Makefile -+++ b/sound/soc/meson/Makefile -@@ -21,5 +21,7 @@ obj-$(CONFIG_SND_MESON_AXG_SOUND_CARD) += snd-soc-meson-axg-sound-card.o - obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o - - snd-soc-meson-audio-core-objs := audio-core.o -+snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o - --obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o -\ No newline at end of file -+obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o -+obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o -\ No newline at end of file -diff --git a/sound/soc/meson/aiu-i2s-dma.c b/sound/soc/meson/aiu-i2s-dma.c -new file mode 100644 -index 000000000000..2684bd0db19e ---- /dev/null -+++ b/sound/soc/meson/aiu-i2s-dma.c -@@ -0,0 +1,370 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "aiu-regs.h" -+#include "audio-core.h" -+ -+#define DRV_NAME "meson-aiu-i2s-dma" -+ -+struct aiu_i2s_dma { -+ struct meson_audio_core_data *core; -+ struct clk *fast; -+ int irq; -+}; -+ -+#define AIU_MEM_I2S_BUF_CNTL_INIT BIT(0) -+#define AIU_MEM_I2S_CONTROL_INIT BIT(0) -+#define AIU_MEM_I2S_CONTROL_FILL_EN BIT(1) -+#define AIU_MEM_I2S_CONTROL_EMPTY_EN BIT(2) -+#define AIU_MEM_I2S_CONTROL_MODE_16BIT BIT(6) -+#define AIU_MEM_I2S_CONTROL_BUSY BIT(7) -+#define AIU_MEM_I2S_CONTROL_DATA_READY BIT(8) -+#define AIU_MEM_I2S_CONTROL_LEVEL_CNTL BIT(9) -+#define AIU_MEM_I2S_MASKS_IRQ_BLOCK_MASK GENMASK(31, 16) -+#define AIU_MEM_I2S_MASKS_IRQ_BLOCK(n) ((n) << 16) -+#define AIU_MEM_I2S_MASKS_CH_MEM_MASK GENMASK(15, 8) -+#define AIU_MEM_I2S_MASKS_CH_MEM(ch) ((ch) << 8) -+#define AIU_MEM_I2S_MASKS_CH_RD_MASK GENMASK(7, 0) -+#define AIU_MEM_I2S_MASKS_CH_RD(ch) ((ch) << 0) -+#define AIU_RST_SOFT_I2S_FAST_DOMAIN BIT(0) -+#define AIU_RST_SOFT_I2S_SLOW_DOMAIN BIT(1) -+ -+/* -+ * The DMA works by i2s "blocks" (or DMA burst). The burst size and the memory -+ * layout expected depends on the mode of operation. -+ * -+ * - Normal mode: The channels are expected to be packed in 32 bytes groups -+ * interleaved the buffer. AIU_MEM_I2S_MASKS_CH_MEM is a bitfield representing -+ * the channels present in memory. AIU_MEM_I2S_MASKS_CH_MEM represents the -+ * channels read by the DMA. This is very flexible but the unsual memory layout -+ * makes it less easy to deal with. The burst size is 32 bytes times the number -+ * of channels read. -+ * -+ * - Split mode: -+ * Classical channel interleaved frame organisation. In this mode, -+ * AIU_MEM_I2S_MASKS_CH_MEM and AIU_MEM_I2S_MASKS_CH_MEM must be set to 0xff and -+ * the burst size is fixed to 256 bytes. The input can be either 2 or 8 -+ * channels. -+ * -+ * The following driver implements the split mode. -+ */ -+ -+#define AIU_I2S_DMA_BURST 256 -+ -+static struct snd_pcm_hardware aiu_i2s_dma_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_MMAP | -+ SNDRV_PCM_INFO_MMAP_VALID | -+ SNDRV_PCM_INFO_PAUSE), -+ -+ .formats = (SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE | -+ SNDRV_PCM_FMTBIT_S32_LE), -+ -+ /* -+ * TODO: The DMA can change the endianness, the msb position -+ * and deal with unsigned - support this later on -+ */ -+ -+ .rate_min = 8000, -+ .rate_max = 192000, -+ .channels_min = 2, -+ .channels_max = 8, -+ .period_bytes_min = AIU_I2S_DMA_BURST, -+ .period_bytes_max = AIU_I2S_DMA_BURST * 65535, -+ .periods_min = 2, -+ .periods_max = UINT_MAX, -+ .buffer_bytes_max = 1 * 1024 * 1024, -+ .fifo_size = 0, -+}; -+ -+static struct aiu_i2s_dma *aiu_i2s_dma_priv(struct snd_pcm_substream *s) -+{ -+ struct snd_soc_pcm_runtime *rtd = s->private_data; -+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); -+ -+ return snd_soc_component_get_drvdata(component); -+} -+ -+static snd_pcm_uframes_t -+aiu_i2s_dma_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ unsigned int addr; -+ int ret; -+ -+ ret = regmap_read(priv->core->aiu, AIU_MEM_I2S_RD_PTR, -+ &addr); -+ if (ret) -+ return 0; -+ -+ return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); -+} -+ -+static void __dma_enable(struct aiu_i2s_dma *priv, bool enable) -+{ -+ unsigned int en_mask = (AIU_MEM_I2S_CONTROL_FILL_EN | -+ AIU_MEM_I2S_CONTROL_EMPTY_EN); -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, en_mask, -+ enable ? en_mask : 0); -+ -+} -+ -+static int aiu_i2s_dma_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ __dma_enable(priv, true); -+ break; -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ case SNDRV_PCM_TRIGGER_STOP: -+ __dma_enable(priv, false); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void __dma_init_mem(struct aiu_i2s_dma *priv) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, -+ AIU_MEM_I2S_CONTROL_INIT, -+ AIU_MEM_I2S_CONTROL_INIT); -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, -+ AIU_MEM_I2S_BUF_CNTL_INIT, -+ AIU_MEM_I2S_BUF_CNTL_INIT); -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, -+ AIU_MEM_I2S_CONTROL_INIT, -+ 0); -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, -+ AIU_MEM_I2S_BUF_CNTL_INIT, -+ 0); -+} -+ -+static int aiu_i2s_dma_prepare(struct snd_pcm_substream *substream) -+{ -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ -+ __dma_init_mem(priv); -+ -+ return 0; -+} -+ -+static int aiu_i2s_dma_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ int ret; -+ u32 burst_num, mem_ctl; -+ dma_addr_t end_ptr; -+ -+ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); -+ if (ret < 0) -+ return ret; -+ -+ /* Setup memory layout */ -+ if (params_physical_width(params) == 16) -+ mem_ctl = AIU_MEM_I2S_CONTROL_MODE_16BIT; -+ else -+ mem_ctl = 0; -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, -+ AIU_MEM_I2S_CONTROL_MODE_16BIT, -+ mem_ctl); -+ -+ /* Initialize memory pointers */ -+ regmap_write(priv->core->aiu, AIU_MEM_I2S_START_PTR, runtime->dma_addr); -+ regmap_write(priv->core->aiu, AIU_MEM_I2S_RD_PTR, runtime->dma_addr); -+ -+ /* The end pointer is the address of the last valid block */ -+ end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_I2S_DMA_BURST; -+ regmap_write(priv->core->aiu, AIU_MEM_I2S_END_PTR, end_ptr); -+ -+ /* Memory masks */ -+ burst_num = params_period_bytes(params) / AIU_I2S_DMA_BURST; -+ regmap_write(priv->core->aiu, AIU_MEM_I2S_MASKS, -+ AIU_MEM_I2S_MASKS_CH_RD(0xff) | -+ AIU_MEM_I2S_MASKS_CH_MEM(0xff) | -+ AIU_MEM_I2S_MASKS_IRQ_BLOCK(burst_num)); -+ -+ return 0; -+} -+ -+static int aiu_i2s_dma_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+ -+static irqreturn_t aiu_i2s_dma_irq_block(int irq, void *dev_id) -+{ -+ struct snd_pcm_substream *playback = dev_id; -+ -+ snd_pcm_period_elapsed(playback); -+ -+ return IRQ_HANDLED; -+} -+ -+static int aiu_i2s_dma_open(struct snd_pcm_substream *substream) -+{ -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ int ret; -+ -+ snd_soc_set_runtime_hwparams(substream, &aiu_i2s_dma_hw); -+ -+ /* -+ * Make sure the buffer and period size are multiple of the DMA burst -+ * size -+ */ -+ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, -+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, -+ AIU_I2S_DMA_BURST); -+ if (ret) -+ return ret; -+ -+ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, -+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, -+ AIU_I2S_DMA_BURST); -+ if (ret) -+ return ret; -+ -+ /* Request the I2S DDR irq */ -+ ret = request_irq(priv->irq, aiu_i2s_dma_irq_block, 0, -+ DRV_NAME, substream); -+ if (ret) -+ return ret; -+ -+ /* Power up the i2s fast domain - can't write the registers w/o it */ -+ ret = clk_prepare_enable(priv->fast); -+ if (ret) -+ return ret; -+ -+ /* Make sure the dma is initially disabled */ -+ __dma_enable(priv, false); -+ -+ return 0; -+} -+ -+static int aiu_i2s_dma_close(struct snd_pcm_substream *substream) -+{ -+ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); -+ -+ clk_disable_unprepare(priv->fast); -+ free_irq(priv->irq, substream); -+ -+ return 0; -+} -+ -+static const struct snd_pcm_ops aiu_i2s_dma_ops = { -+ .open = aiu_i2s_dma_open, -+ .close = aiu_i2s_dma_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = aiu_i2s_dma_hw_params, -+ .hw_free = aiu_i2s_dma_hw_free, -+ .prepare = aiu_i2s_dma_prepare, -+ .pointer = aiu_i2s_dma_pointer, -+ .trigger = aiu_i2s_dma_trigger, -+}; -+ -+static int aiu_i2s_dma_new(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_card *card = rtd->card->snd_card; -+ size_t size = aiu_i2s_dma_hw.buffer_bytes_max; -+ -+ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, -+ SNDRV_DMA_TYPE_DEV, -+ card->dev, size, size); -+} -+ -+static const struct snd_soc_component_driver aiu_i2s_platform = { -+ .ops = &aiu_i2s_dma_ops, -+ .pcm_new = aiu_i2s_dma_new, -+ .name = DRV_NAME, -+}; -+ -+static int aiu_i2s_dma_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct aiu_i2s_dma *priv; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, priv); -+ priv->core = dev_get_drvdata(dev->parent); -+ -+ priv->fast = devm_clk_get(dev, "fast"); -+ if (IS_ERR(priv->fast)) { -+ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get i2s fast domain clock\n"); -+ return PTR_ERR(priv->fast); -+ } -+ -+ priv->irq = platform_get_irq(pdev, 0); -+ if (priv->irq <= 0) { -+ dev_err(dev, "Can't get i2s ddr irq\n"); -+ return priv->irq; -+ } -+ -+ return devm_snd_soc_register_component(dev, &aiu_i2s_platform, -+ NULL, 0); -+} -+ -+static const struct of_device_id aiu_i2s_dma_of_match[] = { -+ { .compatible = "amlogic,meson-aiu-i2s-dma", }, -+ { .compatible = "amlogic,meson-gxbb-aiu-i2s-dma", }, -+ { .compatible = "amlogic,meson-gxl-aiu-i2s-dma", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, aiu_i2s_dma_of_match); -+ -+static struct platform_driver aiu_i2s_dma_pdrv = { -+ .probe = aiu_i2s_dma_probe, -+ .driver = { -+ .name = DRV_NAME, -+ .of_match_table = aiu_i2s_dma_of_match, -+ }, -+}; -+module_platform_driver(aiu_i2s_dma_pdrv); -+ -+MODULE_DESCRIPTION("Meson AIU i2s DMA ASoC Driver"); -+MODULE_AUTHOR("Jerome Brunet "); -+MODULE_LICENSE("GPL v2"); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch b/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch deleted file mode 100644 index 0359ef465..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0005-ASoC-meson-add-initial-i2s-dai-support.patch +++ /dev/null @@ -1,518 +0,0 @@ -From 91eb80de0a4425e8856484d6480b2e347ccfa83d Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 12:17:27 +0200 -Subject: [PATCH 05/53] ASoC: meson: add initial i2s dai support - -Add support for the i2s dai found on Amlogic Meson SoC family. -With this initial implementation, only playback is supported. -Capture will be part of furture work. - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/Kconfig | 2 +- - sound/soc/meson/Makefile | 4 +- - sound/soc/meson/i2s-dai.c | 465 ++++++++++++++++++++++++++++++++++++++ - 3 files changed, 469 insertions(+), 2 deletions(-) - create mode 100644 sound/soc/meson/i2s-dai.c - -diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig -index 6e030b5c7804..5904e9e50569 100644 ---- a/sound/soc/meson/Kconfig -+++ b/sound/soc/meson/Kconfig -@@ -78,5 +78,5 @@ config SND_SOC_MESON_I2S - tristate "Meson i2s interface" - depends on SND_SOC_MESON - help -- Say Y or M if you want to add support for i2s dma driver for Amlogic -+ Say Y or M if you want to add support for i2s driver for Amlogic - Meson SoCs. -diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile -index 57960077aab2..b8641f9f7fc1 100644 ---- a/sound/soc/meson/Makefile -+++ b/sound/soc/meson/Makefile -@@ -22,6 +22,8 @@ obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o - - snd-soc-meson-audio-core-objs := audio-core.o - snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o -+snd-soc-meson-i2s-dai-objs := i2s-dai.o - - obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o --obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o -\ No newline at end of file -+obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o -+obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o -\ No newline at end of file -diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c -new file mode 100644 -index 000000000000..1008af8d3972 ---- /dev/null -+++ b/sound/soc/meson/i2s-dai.c -@@ -0,0 +1,465 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "aiu-regs.h" -+#include "audio-core.h" -+ -+#define DRV_NAME "meson-i2s-dai" -+ -+struct meson_i2s_dai { -+ struct meson_audio_core_data *core; -+ struct clk *mclk; -+ struct clk *bclks; -+ struct clk *iface; -+ struct clk *fast; -+ bool bclks_idle; -+}; -+ -+#define AIU_CLK_CTRL_I2S_DIV_EN BIT(0) -+#define AIU_CLK_CTRL_I2S_DIV_MASK GENMASK(3, 2) -+#define AIU_CLK_CTRL_AOCLK_POLARITY_MASK BIT(6) -+#define AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL (0 << 6) -+#define AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED (1 << 6) -+#define AIU_CLK_CTRL_ALRCLK_POLARITY_MASK BIT(7) -+#define AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL (0 << 7) -+#define AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED (1 << 7) -+#define AIU_CLK_CTRL_ALRCLK_SKEW_MASK GENMASK(9, 8) -+#define AIU_CLK_CTRL_ALRCLK_LEFT_J (0 << 8) -+#define AIU_CLK_CTRL_ALRCLK_I2S (1 << 8) -+#define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) -+#define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) -+#define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) -+#define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) -+#define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) -+#define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) -+#define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) -+#define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) -+#define AIU_I2S_DAC_CFG_AOCLK_64 (3 << 0) -+#define AIU_I2S_MISC_HOLD_EN BIT(2) -+#define AIU_I2S_SOURCE_DESC_MODE_8CH BIT(0) -+#define AIU_I2S_SOURCE_DESC_MODE_24BIT BIT(5) -+#define AIU_I2S_SOURCE_DESC_MODE_32BIT BIT(9) -+#define AIU_I2S_SOURCE_DESC_MODE_SPLIT BIT(11) -+ -+static void __hold(struct meson_i2s_dai *priv, bool enable) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_I2S_MISC, -+ AIU_I2S_MISC_HOLD_EN, -+ enable ? AIU_I2S_MISC_HOLD_EN : 0); -+} -+ -+static void __divider_enable(struct meson_i2s_dai *priv, bool enable) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_I2S_DIV_EN, -+ enable ? AIU_CLK_CTRL_I2S_DIV_EN : 0); -+} -+ -+static void __playback_start(struct meson_i2s_dai *priv) -+{ -+ __divider_enable(priv, true); -+ __hold(priv, false); -+} -+ -+static void __playback_stop(struct meson_i2s_dai *priv, bool clk_force) -+{ -+ __hold(priv, true); -+ /* Disable the bit clks if necessary */ -+ if (clk_force || !priv->bclks_idle) -+ __divider_enable(priv, false); -+} -+ -+static int meson_i2s_dai_trigger(struct snd_pcm_substream *substream, int cmd, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ bool clk_force_stop = false; -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ __playback_start(priv); -+ return 0; -+ -+ case SNDRV_PCM_TRIGGER_STOP: -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ clk_force_stop = true; -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ __playback_stop(priv, clk_force_stop); -+ return 0; -+ -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int __bclks_set_rate(struct meson_i2s_dai *priv, unsigned int srate, -+ unsigned int width) -+{ -+ unsigned int fs; -+ -+ /* Get the oversampling factor */ -+ fs = DIV_ROUND_CLOSEST(clk_get_rate(priv->mclk), srate); -+ -+ /* -+ * This DAI is usually connected to the dw-hdmi which does not support -+ * bclk being 32 * lrclk or 48 * lrclk -+ * Restrict to blck = 64 * lrclk -+ */ -+ if (fs % 64) -+ return -EINVAL; -+ -+ /* Set the divider between lrclk and bclk */ -+ regmap_update_bits(priv->core->aiu, AIU_I2S_DAC_CFG, -+ AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK, -+ AIU_I2S_DAC_CFG_AOCLK_64); -+ -+ regmap_update_bits(priv->core->aiu, AIU_CODEC_DAC_LRCLK_CTRL, -+ AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK, -+ AIU_CODEC_DAC_LRCLK_CTRL_DIV(64)); -+ -+ /* Use CLK_MORE for the i2s divider */ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_I2S_DIV_MASK, -+ 0); -+ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, -+ AIU_CLK_CTRL_MORE_I2S_DIV_MASK, -+ AIU_CLK_CTRL_MORE_I2S_DIV(fs / 64)); -+ -+ return 0; -+} -+ -+static int __setup_desc(struct meson_i2s_dai *priv, unsigned int width, -+ unsigned int channels) -+{ -+ u32 desc = 0; -+ -+ switch (width) { -+ case 24: -+ /* -+ * For some reason, 24 bits wide audio don't play well -+ * if the 32 bits mode is not set -+ */ -+ desc |= (AIU_I2S_SOURCE_DESC_MODE_24BIT | -+ AIU_I2S_SOURCE_DESC_MODE_32BIT); -+ break; -+ case 16: -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ switch (channels) { -+ case 2: /* Nothing to do */ -+ break; -+ case 8: -+ /* TODO: Still requires testing ... */ -+ desc |= AIU_I2S_SOURCE_DESC_MODE_8CH; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, -+ AIU_I2S_SOURCE_DESC_MODE_8CH | -+ AIU_I2S_SOURCE_DESC_MODE_24BIT | -+ AIU_I2S_SOURCE_DESC_MODE_32BIT, -+ desc); -+ -+ return 0; -+} -+ -+static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ unsigned int width = params_width(params); -+ unsigned int channels = params_channels(params); -+ unsigned int rate = params_rate(params); -+ int ret; -+ -+ ret = __setup_desc(priv, width, channels); -+ if (ret) { -+ dev_err(dai->dev, "Unable set to set i2s description\n"); -+ return ret; -+ } -+ -+ ret = __bclks_set_rate(priv, rate, width); -+ if (ret) { -+ dev_err(dai->dev, "Unable set to the i2s clock rates\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int meson_i2s_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ u32 val; -+ -+ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) -+ return -EINVAL; -+ -+ /* DAI output mode */ -+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { -+ case SND_SOC_DAIFMT_I2S: -+ val = AIU_CLK_CTRL_ALRCLK_I2S; -+ break; -+ case SND_SOC_DAIFMT_LEFT_J: -+ val = AIU_CLK_CTRL_ALRCLK_LEFT_J; -+ break; -+ case SND_SOC_DAIFMT_RIGHT_J: -+ val = AIU_CLK_CTRL_ALRCLK_RIGHT_J; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_ALRCLK_SKEW_MASK, -+ val); -+ -+ /* DAI clock polarity */ -+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { -+ case SND_SOC_DAIFMT_IB_IF: -+ /* Invert both clocks */ -+ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | -+ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; -+ break; -+ case SND_SOC_DAIFMT_IB_NF: -+ /* Invert bit clock */ -+ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | -+ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; -+ break; -+ case SND_SOC_DAIFMT_NB_IF: -+ /* Invert frame clock */ -+ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | -+ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; -+ break; -+ case SND_SOC_DAIFMT_NB_NF: -+ /* Normal clocks */ -+ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | -+ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_ALRCLK_POLARITY_MASK | -+ AIU_CLK_CTRL_AOCLK_POLARITY_MASK, -+ val); -+ -+ switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { -+ case SND_SOC_DAIFMT_CONT: -+ priv->bclks_idle = true; -+ break; -+ case SND_SOC_DAIFMT_GATED: -+ priv->bclks_idle = false; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int meson_i2s_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, -+ unsigned int freq, int dir) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ int ret; -+ -+ if (WARN_ON(clk_id != 0)) -+ return -EINVAL; -+ -+ if (dir == SND_SOC_CLOCK_IN) -+ return 0; -+ -+ ret = clk_set_rate(priv->mclk, freq); -+ if (ret) { -+ dev_err(dai->dev, "Failed to set sysclk to %uHz", freq); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int meson_i2s_dai_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ int ret; -+ -+ /* Power up the i2s fast domain - can't write the registers w/o it */ -+ ret = clk_prepare_enable(priv->fast); -+ if (ret) -+ goto out_clk_fast; -+ -+ /* Make sure nothing gets out of the DAI yet */ -+ __hold(priv, true); -+ -+ /* I2S encoder needs the mixer interface gate */ -+ ret = clk_prepare_enable(priv->iface); -+ if (ret) -+ goto out_clk_iface; -+ -+ /* Enable the i2s master clock */ -+ ret = clk_prepare_enable(priv->mclk); -+ if (ret) -+ goto out_mclk; -+ -+ /* Enable the bit clock gate */ -+ ret = clk_prepare_enable(priv->bclks); -+ if (ret) -+ goto out_bclks; -+ -+ /* Make sure the interface expect a memory layout we can work with */ -+ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, -+ AIU_I2S_SOURCE_DESC_MODE_SPLIT, -+ AIU_I2S_SOURCE_DESC_MODE_SPLIT); -+ -+ return 0; -+ -+out_bclks: -+ clk_disable_unprepare(priv->mclk); -+out_mclk: -+ clk_disable_unprepare(priv->iface); -+out_clk_iface: -+ clk_disable_unprepare(priv->fast); -+out_clk_fast: -+ return ret; -+} -+ -+static void meson_i2s_dai_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); -+ -+ clk_disable_unprepare(priv->bclks); -+ clk_disable_unprepare(priv->mclk); -+ clk_disable_unprepare(priv->iface); -+ clk_disable_unprepare(priv->fast); -+} -+ -+static const struct snd_soc_dai_ops meson_i2s_dai_ops = { -+ .startup = meson_i2s_dai_startup, -+ .shutdown = meson_i2s_dai_shutdown, -+ .trigger = meson_i2s_dai_trigger, -+ .hw_params = meson_i2s_dai_hw_params, -+ .set_fmt = meson_i2s_dai_set_fmt, -+ .set_sysclk = meson_i2s_dai_set_sysclk, -+}; -+ -+static struct snd_soc_dai_driver meson_i2s_dai = { -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_8000_192000, -+ .formats = (SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE) -+ }, -+ .ops = &meson_i2s_dai_ops, -+}; -+ -+static const struct snd_soc_component_driver meson_i2s_dai_component = { -+ .name = DRV_NAME, -+}; -+ -+static int meson_i2s_dai_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct meson_i2s_dai *priv; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, priv); -+ priv->core = dev_get_drvdata(dev->parent); -+ -+ priv->fast = devm_clk_get(dev, "fast"); -+ if (IS_ERR(priv->fast)) { -+ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get the i2s fast domain clock\n"); -+ return PTR_ERR(priv->fast); -+ } -+ -+ priv->iface = devm_clk_get(dev, "iface"); -+ if (IS_ERR(priv->iface)) { -+ if (PTR_ERR(priv->iface) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get i2s dai clock gate\n"); -+ return PTR_ERR(priv->iface); -+ } -+ -+ priv->bclks = devm_clk_get(dev, "bclks"); -+ if (IS_ERR(priv->bclks)) { -+ if (PTR_ERR(priv->bclks) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get bit clocks gate\n"); -+ return PTR_ERR(priv->bclks); -+ } -+ -+ priv->mclk = devm_clk_get(dev, "mclk"); -+ if (IS_ERR(priv->mclk)) { -+ if (PTR_ERR(priv->mclk) != -EPROBE_DEFER) -+ dev_err(dev, "failed to get the i2s master clock\n"); -+ return PTR_ERR(priv->mclk); -+ } -+ -+ return devm_snd_soc_register_component(dev, &meson_i2s_dai_component, -+ &meson_i2s_dai, 1); -+} -+ -+static const struct of_device_id meson_i2s_dai_of_match[] = { -+ { .compatible = "amlogic,meson-i2s-dai", }, -+ { .compatible = "amlogic,meson-gxbb-i2s-dai", }, -+ { .compatible = "amlogic,meson-gxl-i2s-dai", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, meson_i2s_dai_of_match); -+ -+static struct platform_driver meson_i2s_dai_pdrv = { -+ .probe = meson_i2s_dai_probe, -+ .driver = { -+ .name = DRV_NAME, -+ .of_match_table = meson_i2s_dai_of_match, -+ }, -+}; -+module_platform_driver(meson_i2s_dai_pdrv); -+ -+MODULE_DESCRIPTION("Meson i2s DAI ASoC Driver"); -+MODULE_AUTHOR("Jerome Brunet "); -+MODULE_LICENSE("GPL v2"); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch b/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch deleted file mode 100644 index 1e93a829f..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0006-ASoC-meson-add-aiu-spdif-dma-support.patch +++ /dev/null @@ -1,445 +0,0 @@ -From 99e6d5ba97d0615428f88850ee8366a9dc24168e Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 13:43:52 +0200 -Subject: [PATCH 06/53] ASoC: meson: add aiu spdif dma support - -Add support for the spdif output dma which is part of the AIU block - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/Kconfig | 7 + - sound/soc/meson/Makefile | 4 +- - sound/soc/meson/aiu-spdif-dma.c | 388 ++++++++++++++++++++++++++++++++ - 3 files changed, 398 insertions(+), 1 deletion(-) - create mode 100644 sound/soc/meson/aiu-spdif-dma.c - -diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig -index 5904e9e50569..712303ff8970 100644 ---- a/sound/soc/meson/Kconfig -+++ b/sound/soc/meson/Kconfig -@@ -80,3 +80,10 @@ config SND_SOC_MESON_I2S - help - Say Y or M if you want to add support for i2s driver for Amlogic - Meson SoCs. -+ -+config SND_SOC_MESON_SPDIF -+ tristate "Meson spdif interface" -+ depends on SND_SOC_MESON -+ help -+ Say Y or M if you want to add support for spdif dma driver for Amlogic -+ Meson SoCs. -diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile -index b8641f9f7fc1..dc5164a7e164 100644 ---- a/sound/soc/meson/Makefile -+++ b/sound/soc/meson/Makefile -@@ -22,8 +22,10 @@ obj-$(CONFIG_SND_MESON_AXG_SPDIFOUT) += snd-soc-meson-axg-spdifout.o - - snd-soc-meson-audio-core-objs := audio-core.o - snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o -+snd-soc-meson-aiu-spdif-dma-objs := aiu-spdif-dma.o - snd-soc-meson-i2s-dai-objs := i2s-dai.o - - obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o - obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o --obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o -\ No newline at end of file -+obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o -+obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o -\ No newline at end of file -diff --git a/sound/soc/meson/aiu-spdif-dma.c b/sound/soc/meson/aiu-spdif-dma.c -new file mode 100644 -index 000000000000..81c3b856fbf9 ---- /dev/null -+++ b/sound/soc/meson/aiu-spdif-dma.c -@@ -0,0 +1,388 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "aiu-regs.h" -+#include "audio-core.h" -+ -+#define DRV_NAME "meson-aiu-spdif-dma" -+ -+struct aiu_spdif_dma { -+ struct meson_audio_core_data *core; -+ struct clk *fast; -+ int irq; -+}; -+ -+#define AIU_958_DCU_FF_CTRL_EN BIT(0) -+#define AIU_958_DCU_FF_CTRL_AUTO_DISABLE BIT(1) -+#define AIU_958_DCU_FF_CTRL_IRQ_MODE_MASK GENMASK(3, 2) -+#define AIU_958_DCU_FF_CTRL_IRQ_OUT_THD BIT(2) -+#define AIU_958_DCU_FF_CTRL_IRQ_FRAME_READ BIT(3) -+#define AIU_958_DCU_FF_CTRL_SYNC_HEAD_EN BIT(4) -+#define AIU_958_DCU_FF_CTRL_BYTE_SEEK BIT(5) -+#define AIU_958_DCU_FF_CTRL_CONTINUE BIT(6) -+#define AIU_MEM_IEC958_BUF_CNTL_INIT BIT(0) -+#define AIU_MEM_IEC958_CONTROL_INIT BIT(0) -+#define AIU_MEM_IEC958_CONTROL_FILL_EN BIT(1) -+#define AIU_MEM_IEC958_CONTROL_EMPTY_EN BIT(2) -+#define AIU_MEM_IEC958_CONTROL_ENDIAN_MASK GENMASK(5, 3) -+#define AIU_MEM_IEC958_CONTROL_RD_DDR BIT(6) -+#define AIU_MEM_IEC958_CONTROL_MODE_16BIT BIT(7) -+#define AIU_MEM_IEC958_MASKS_CH_MEM_MASK GENMASK(15, 8) -+#define AIU_MEM_IEC958_MASKS_CH_MEM(ch) ((ch) << 8) -+#define AIU_MEM_IEC958_MASKS_CH_RD_MASK GENMASK(7, 0) -+#define AIU_MEM_IEC958_MASKS_CH_RD(ch) ((ch) << 0) -+ -+#define AIU_SPDIF_DMA_BURST 8 -+#define AIU_SPDIF_BPF_MAX USHRT_MAX -+ -+static struct snd_pcm_hardware aiu_spdif_dma_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_MMAP | -+ SNDRV_PCM_INFO_MMAP_VALID | -+ SNDRV_PCM_INFO_PAUSE), -+ -+ .formats = (SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE | -+ SNDRV_PCM_FMTBIT_S32_LE), -+ -+ .rates = (SNDRV_PCM_RATE_32000 | -+ SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | -+ SNDRV_PCM_RATE_96000 | -+ SNDRV_PCM_RATE_192000), -+ /* -+ * TODO: The DMA can change the endianness, the msb position -+ * and deal with unsigned - support this later on -+ */ -+ -+ .channels_min = 2, -+ .channels_max = 2, -+ .period_bytes_min = AIU_SPDIF_DMA_BURST, -+ .period_bytes_max = AIU_SPDIF_BPF_MAX, -+ .periods_min = 2, -+ .periods_max = UINT_MAX, -+ .buffer_bytes_max = 1 * 1024 * 1024, -+ .fifo_size = 0, -+}; -+ -+static struct aiu_spdif_dma *aiu_spdif_dma_priv(struct snd_pcm_substream *s) -+{ -+ struct snd_soc_pcm_runtime *rtd = s->private_data; -+ struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME); -+ -+ return snd_soc_component_get_drvdata(component); -+} -+ -+static snd_pcm_uframes_t -+aiu_spdif_dma_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ unsigned int addr; -+ int ret; -+ -+ ret = regmap_read(priv->core->aiu, AIU_MEM_IEC958_RD_PTR, -+ &addr); -+ if (ret) -+ return 0; -+ -+ return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); -+} -+ -+static void __dma_enable(struct aiu_spdif_dma *priv, bool enable) -+{ -+ unsigned int en_mask = (AIU_MEM_IEC958_CONTROL_FILL_EN | -+ AIU_MEM_IEC958_CONTROL_EMPTY_EN); -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, en_mask, -+ enable ? en_mask : 0); -+} -+ -+static void __dcu_fifo_enable(struct aiu_spdif_dma *priv, bool enable) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_958_DCU_FF_CTRL, -+ AIU_958_DCU_FF_CTRL_EN, -+ enable ? AIU_958_DCU_FF_CTRL_EN : 0); -+} -+ -+static int aiu_spdif_dma_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ __dcu_fifo_enable(priv, true); -+ __dma_enable(priv, true); -+ break; -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ case SNDRV_PCM_TRIGGER_STOP: -+ __dma_enable(priv, false); -+ __dcu_fifo_enable(priv, false); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void __dma_init_mem(struct aiu_spdif_dma *priv) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, -+ AIU_MEM_IEC958_CONTROL_INIT, -+ AIU_MEM_IEC958_CONTROL_INIT); -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_BUF_CNTL, -+ AIU_MEM_IEC958_BUF_CNTL_INIT, -+ AIU_MEM_IEC958_BUF_CNTL_INIT); -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, -+ AIU_MEM_IEC958_CONTROL_INIT, -+ 0); -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_BUF_CNTL, -+ AIU_MEM_IEC958_BUF_CNTL_INIT, -+ 0); -+} -+ -+static int aiu_spdif_dma_prepare(struct snd_pcm_substream *substream) -+{ -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ -+ __dma_init_mem(priv); -+ -+ return 0; -+} -+ -+static int __setup_memory_layout(struct aiu_spdif_dma *priv, -+ unsigned int width) -+{ -+ u32 mem_ctl = AIU_MEM_IEC958_CONTROL_RD_DDR; -+ -+ if (width == 16) -+ mem_ctl |= AIU_MEM_IEC958_CONTROL_MODE_16BIT; -+ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, -+ AIU_MEM_IEC958_CONTROL_ENDIAN_MASK | -+ AIU_MEM_IEC958_CONTROL_MODE_16BIT | -+ AIU_MEM_IEC958_CONTROL_RD_DDR, -+ mem_ctl); -+ -+ return 0; -+} -+ -+static int aiu_spdif_dma_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ int ret; -+ dma_addr_t end_ptr; -+ -+ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); -+ if (ret < 0) -+ return ret; -+ -+ ret = __setup_memory_layout(priv, params_physical_width(params)); -+ if (ret) -+ return ret; -+ -+ /* Initialize memory pointers */ -+ regmap_write(priv->core->aiu, -+ AIU_MEM_IEC958_START_PTR, runtime->dma_addr); -+ regmap_write(priv->core->aiu, -+ AIU_MEM_IEC958_RD_PTR, runtime->dma_addr); -+ -+ /* The end pointer is the address of the last valid block */ -+ end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_SPDIF_DMA_BURST; -+ regmap_write(priv->core->aiu, AIU_MEM_IEC958_END_PTR, end_ptr); -+ -+ /* Memory masks */ -+ regmap_write(priv->core->aiu, AIU_MEM_IEC958_MASKS, -+ AIU_MEM_IEC958_MASKS_CH_RD(0xff) | -+ AIU_MEM_IEC958_MASKS_CH_MEM(0xff)); -+ -+ /* Setup the number bytes read by the FIFO between each IRQ */ -+ regmap_write(priv->core->aiu, AIU_958_BPF, params_period_bytes(params)); -+ -+ /* -+ * AUTO_DISABLE and SYNC_HEAD are enabled by default but -+ * this should be disabled in PCM (uncompressed) mode -+ */ -+ regmap_update_bits(priv->core->aiu, AIU_958_DCU_FF_CTRL, -+ AIU_958_DCU_FF_CTRL_AUTO_DISABLE | -+ AIU_958_DCU_FF_CTRL_IRQ_MODE_MASK | -+ AIU_958_DCU_FF_CTRL_SYNC_HEAD_EN, -+ AIU_958_DCU_FF_CTRL_IRQ_FRAME_READ); -+ -+ return 0; -+} -+ -+static int aiu_spdif_dma_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static irqreturn_t aiu_spdif_dma_irq(int irq, void *dev_id) -+{ -+ struct snd_pcm_substream *playback = dev_id; -+ -+ snd_pcm_period_elapsed(playback); -+ -+ return IRQ_HANDLED; -+} -+ -+static int aiu_spdif_dma_open(struct snd_pcm_substream *substream) -+{ -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ int ret; -+ -+ snd_soc_set_runtime_hwparams(substream, &aiu_spdif_dma_hw); -+ -+ /* -+ * Make sure the buffer and period size are multiple of the DMA burst -+ * size -+ */ -+ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, -+ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, -+ AIU_SPDIF_DMA_BURST); -+ if (ret) -+ return ret; -+ -+ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, -+ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, -+ AIU_SPDIF_DMA_BURST); -+ if (ret) -+ return ret; -+ -+ /* Request the SPDIF DDR irq */ -+ ret = request_irq(priv->irq, aiu_spdif_dma_irq, 0, -+ DRV_NAME, substream); -+ if (ret) -+ return ret; -+ -+ /* Power up the spdif fast domain - can't write the register w/o it */ -+ ret = clk_prepare_enable(priv->fast); -+ if (ret) -+ return ret; -+ -+ /* Make sure the dma is initially halted */ -+ __dma_enable(priv, false); -+ __dcu_fifo_enable(priv, false); -+ -+ return 0; -+} -+ -+static int aiu_spdif_dma_close(struct snd_pcm_substream *substream) -+{ -+ struct aiu_spdif_dma *priv = aiu_spdif_dma_priv(substream); -+ -+ clk_disable_unprepare(priv->fast); -+ free_irq(priv->irq, substream); -+ -+ return 0; -+} -+ -+static const struct snd_pcm_ops aiu_spdif_dma_ops = { -+ .open = aiu_spdif_dma_open, -+ .close = aiu_spdif_dma_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = aiu_spdif_dma_hw_params, -+ .hw_free = aiu_spdif_dma_hw_free, -+ .prepare = aiu_spdif_dma_prepare, -+ .pointer = aiu_spdif_dma_pointer, -+ .trigger = aiu_spdif_dma_trigger, -+}; -+ -+static int aiu_spdif_dma_new(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_card *card = rtd->card->snd_card; -+ size_t size = aiu_spdif_dma_hw.buffer_bytes_max; -+ -+ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, -+ SNDRV_DMA_TYPE_DEV, -+ card->dev, size, size); -+} -+ -+static const struct snd_soc_component_driver aiu_spdif_platform = { -+ .ops = &aiu_spdif_dma_ops, -+ .pcm_new = aiu_spdif_dma_new, -+ .name = DRV_NAME, -+}; -+ -+static int aiu_spdif_dma_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct aiu_spdif_dma *priv; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, priv); -+ priv->core = dev_get_drvdata(dev->parent); -+ -+ priv->fast = devm_clk_get(dev, "fast"); -+ if (IS_ERR(priv->fast)) { -+ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get spdif fast domain clock\n"); -+ return PTR_ERR(priv->fast); -+ } -+ -+ priv->irq = platform_get_irq(pdev, 0); -+ if (priv->irq <= 0) { -+ dev_err(dev, "Can't get spdif ddr irq\n"); -+ return priv->irq; -+ } -+ -+ return devm_snd_soc_register_component(dev, &aiu_spdif_platform, -+ NULL, 0); -+} -+ -+static const struct of_device_id aiu_spdif_dma_of_match[] = { -+ { .compatible = "amlogic,meson-aiu-spdif-dma", }, -+ { .compatible = "amlogic,meson-gxbb-aiu-spdif-dma", }, -+ { .compatible = "amlogic,meson-gxl-aiu-spdif-dma", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, aiu_spdif_dma_of_match); -+ -+static struct platform_driver aiu_spdif_dma_pdrv = { -+ .probe = aiu_spdif_dma_probe, -+ .driver = { -+ .name = DRV_NAME, -+ .of_match_table = aiu_spdif_dma_of_match, -+ }, -+}; -+module_platform_driver(aiu_spdif_dma_pdrv); -+ -+MODULE_DESCRIPTION("Meson AIU spdif DMA ASoC Driver"); -+MODULE_AUTHOR("Jerome Brunet "); -+MODULE_LICENSE("GPL"); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch b/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch deleted file mode 100644 index d39cae9b6..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0007-ASoC-meson-add-initial-spdif-dai-support.patch +++ /dev/null @@ -1,432 +0,0 @@ -From ecabfe253aab181bdc241cc7e16e857a3574e528 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 13:46:03 +0200 -Subject: [PATCH 07/53] ASoC: meson: add initial spdif dai support - -Add support for the spdif dai found on Amlogic Meson SoC family. -With this initial implementation, only uncompressed pcm playback -from the spdif dma is supported. Future work will add compressed -support, pcm playback from i2s dma and capture. - -Signed-off-by: Jerome Brunet ---- - sound/soc/meson/Kconfig | 3 +- - sound/soc/meson/Makefile | 4 +- - sound/soc/meson/spdif-dai.c | 374 ++++++++++++++++++++++++++++++++++++ - 3 files changed, 379 insertions(+), 2 deletions(-) - create mode 100644 sound/soc/meson/spdif-dai.c - -diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig -index 712303ff8970..bc3d6f22ed88 100644 ---- a/sound/soc/meson/Kconfig -+++ b/sound/soc/meson/Kconfig -@@ -84,6 +84,7 @@ config SND_SOC_MESON_I2S - config SND_SOC_MESON_SPDIF - tristate "Meson spdif interface" - depends on SND_SOC_MESON -+ select SND_PCM_IEC958 - help -- Say Y or M if you want to add support for spdif dma driver for Amlogic -+ Say Y or M if you want to add support for spdif driver for Amlogic - Meson SoCs. -diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile -index dc5164a7e164..44f79d8b91b7 100644 ---- a/sound/soc/meson/Makefile -+++ b/sound/soc/meson/Makefile -@@ -24,8 +24,10 @@ snd-soc-meson-audio-core-objs := audio-core.o - snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o - snd-soc-meson-aiu-spdif-dma-objs := aiu-spdif-dma.o - snd-soc-meson-i2s-dai-objs := i2s-dai.o -+snd-soc-meson-spdif-dai-objs := spdif-dai.o - - obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o - obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o - obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o --obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o -\ No newline at end of file -+obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-aiu-spdif-dma.o -+obj-$(CONFIG_SND_SOC_MESON_SPDIF) += snd-soc-meson-spdif-dai.o -\ No newline at end of file -diff --git a/sound/soc/meson/spdif-dai.c b/sound/soc/meson/spdif-dai.c -new file mode 100644 -index 000000000000..e7630007c84b ---- /dev/null -+++ b/sound/soc/meson/spdif-dai.c -@@ -0,0 +1,374 @@ -+/* -+ * Copyright (C) 2017 BayLibre, SAS -+ * Author: Jerome Brunet -+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "aiu-regs.h" -+#include "audio-core.h" -+ -+#define DRV_NAME "meson-spdif-dai" -+ -+struct meson_spdif_dai { -+ struct meson_audio_core_data *core; -+ struct clk *iface; -+ struct clk *fast; -+ struct clk *mclk_i958; -+ struct clk *mclk; -+}; -+ -+#define AIU_CLK_CTRL_958_DIV_EN BIT(1) -+#define AIU_CLK_CTRL_958_DIV_MASK GENMASK(5, 4) -+#define AIU_CLK_CTRL_958_DIV_MORE BIT(12) -+#define AIU_MEM_IEC958_CONTROL_MODE_LINEAR BIT(8) -+#define AIU_958_CTRL_HOLD_EN BIT(0) -+#define AIU_958_MISC_NON_PCM BIT(0) -+#define AIU_958_MISC_MODE_16BITS BIT(1) -+#define AIU_958_MISC_16BITS_ALIGN_MASK GENMASK(6, 5) -+#define AIU_958_MISC_16BITS_ALIGN(val) ((val) << 5) -+#define AIU_958_MISC_MODE_32BITS BIT(7) -+#define AIU_958_MISC_32BITS_SHIFT_MASK GENMASK(10, 8) -+#define AIU_958_MISC_32BITS_SHIFT(val) ((val) << 8) -+#define AIU_958_MISC_U_FROM_STREAM BIT(12) -+#define AIU_958_MISC_FORCE_LR BIT(13) -+ -+#define AIU_CS_WORD_LEN 4 -+ -+static void __hold(struct meson_spdif_dai *priv, bool enable) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_958_CTRL, -+ AIU_958_CTRL_HOLD_EN, -+ enable ? AIU_958_CTRL_HOLD_EN : 0); -+} -+ -+static void __divider_enable(struct meson_spdif_dai *priv, bool enable) -+{ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_958_DIV_EN, -+ enable ? AIU_CLK_CTRL_958_DIV_EN : 0); -+} -+ -+static void __playback_start(struct meson_spdif_dai *priv) -+{ -+ __divider_enable(priv, true); -+ __hold(priv, false); -+} -+ -+static void __playback_stop(struct meson_spdif_dai *priv) -+{ -+ __hold(priv, true); -+ __divider_enable(priv, false); -+} -+ -+static int meson_spdif_dai_trigger(struct snd_pcm_substream *substream, int cmd, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ __playback_start(priv); -+ return 0; -+ -+ case SNDRV_PCM_TRIGGER_STOP: -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ __playback_stop(priv); -+ return 0; -+ -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int __setup_spdif_clk(struct meson_spdif_dai *priv, unsigned int rate) -+{ -+ unsigned int mrate; -+ -+ /* Leave the internal divisor alone */ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, -+ AIU_CLK_CTRL_958_DIV_MASK | -+ AIU_CLK_CTRL_958_DIV_MORE, -+ 0); -+ -+ /* 2 * 32bits per subframe * 2 channels = 128 */ -+ mrate = rate * 128; -+ return clk_set_rate(priv->mclk, mrate); -+} -+ -+static int __setup_cs_word(struct meson_spdif_dai *priv, -+ struct snd_pcm_hw_params *params) -+{ -+ u8 cs[AIU_CS_WORD_LEN]; -+ u32 val; -+ int ret; -+ -+ ret = snd_pcm_create_iec958_consumer_hw_params(params, cs, -+ AIU_CS_WORD_LEN); -+ if (ret < 0) -+ return -EINVAL; -+ -+ /* Write the 1st half word */ -+ val = cs[1] | cs[0] << 8; -+ regmap_write(priv->core->aiu, AIU_958_CHSTAT_L0, val); -+ regmap_write(priv->core->aiu, AIU_958_CHSTAT_R0, val); -+ -+ /* Write the 2nd half word */ -+ val = cs[3] | cs[2] << 8; -+ regmap_write(priv->core->aiu, AIU_958_CHSTAT_L1, val); -+ regmap_write(priv->core->aiu, AIU_958_CHSTAT_R1, val); -+ -+ return 0; -+} -+ -+static int __setup_pcm_fmt(struct meson_spdif_dai *priv, -+ unsigned int width) -+{ -+ u32 val = 0; -+ -+ switch (width) { -+ case 16: -+ val |= AIU_958_MISC_MODE_16BITS; -+ val |= AIU_958_MISC_16BITS_ALIGN(2); -+ break; -+ case 32: -+ case 24: -+ /* -+ * Looks like this should only be set for 32bits mode, but the -+ * vendor kernel sets it like this for 24bits as well, let's -+ * try and see -+ */ -+ val |= AIU_958_MISC_MODE_32BITS; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ /* No idea what this actually does, copying the vendor kernel for now */ -+ val |= AIU_958_MISC_FORCE_LR; -+ val |= AIU_958_MISC_U_FROM_STREAM; -+ -+ regmap_update_bits(priv->core->aiu, AIU_958_MISC, -+ AIU_958_MISC_NON_PCM | -+ AIU_958_MISC_MODE_16BITS | -+ AIU_958_MISC_16BITS_ALIGN_MASK | -+ AIU_958_MISC_MODE_32BITS | -+ AIU_958_MISC_FORCE_LR, -+ val); -+ -+ return 0; -+} -+ -+static int meson_spdif_dai_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); -+ int ret; -+ -+ ret = __setup_spdif_clk(priv, params_rate(params)); -+ if (ret) { -+ dev_err(dai->dev, "Unable to set the spdif clock\n"); -+ return ret; -+ } -+ -+ ret = __setup_cs_word(priv, params); -+ if (ret) { -+ dev_err(dai->dev, "Unable to set the channel status word\n"); -+ return ret; -+ } -+ -+ ret = __setup_pcm_fmt(priv, params_width(params)); -+ if (ret) { -+ dev_err(dai->dev, "Unable to set the pcm format\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int meson_spdif_dai_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); -+ int ret; -+ -+ /* Power up the spdif fast domain - can't write the registers w/o it */ -+ ret = clk_prepare_enable(priv->fast); -+ if (ret) -+ goto out_clk_fast; -+ -+ /* Make sure nothing gets out of the DAI yet*/ -+ __hold(priv, true); -+ -+ ret = clk_set_parent(priv->mclk, priv->mclk_i958); -+ if (ret) -+ return ret; -+ -+ /* Enable the clock gate */ -+ ret = clk_prepare_enable(priv->iface); -+ if (ret) -+ goto out_clk_iface; -+ -+ /* Enable the spdif clock */ -+ ret = clk_prepare_enable(priv->mclk); -+ if (ret) -+ goto out_mclk; -+ -+ /* -+ * Make sure the interface expect a memory layout we can work with -+ * MEM prefixed register usually belong to the DMA, but when the spdif -+ * DAI takes data from the i2s buffer, we need to make sure it works in -+ * split mode and not the "normal mode" (channel samples packed in -+ * 32 bytes groups) -+ */ -+ regmap_update_bits(priv->core->aiu, AIU_MEM_IEC958_CONTROL, -+ AIU_MEM_IEC958_CONTROL_MODE_LINEAR, -+ AIU_MEM_IEC958_CONTROL_MODE_LINEAR); -+ -+ return 0; -+ -+out_mclk: -+ clk_disable_unprepare(priv->iface); -+out_clk_iface: -+ clk_disable_unprepare(priv->fast); -+out_clk_fast: -+ return ret; -+} -+ -+static void meson_spdif_dai_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct meson_spdif_dai *priv = snd_soc_dai_get_drvdata(dai); -+ -+ clk_disable_unprepare(priv->iface); -+ clk_disable_unprepare(priv->mclk); -+ clk_disable_unprepare(priv->fast); -+} -+ -+static const struct snd_soc_dai_ops meson_spdif_dai_ops = { -+ .startup = meson_spdif_dai_startup, -+ .shutdown = meson_spdif_dai_shutdown, -+ .trigger = meson_spdif_dai_trigger, -+ .hw_params = meson_spdif_dai_hw_params, -+}; -+ -+static struct snd_soc_dai_driver meson_spdif_dai = { -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = (SNDRV_PCM_RATE_32000 | -+ SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | -+ SNDRV_PCM_RATE_96000 | -+ SNDRV_PCM_RATE_192000), -+ .formats = (SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE) -+ }, -+ .ops = &meson_spdif_dai_ops, -+}; -+ -+static const struct snd_soc_component_driver meson_spdif_dai_component = { -+ .name = DRV_NAME, -+}; -+ -+static int meson_spdif_dai_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct meson_spdif_dai *priv; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, priv); -+ priv->core = dev_get_drvdata(dev->parent); -+ -+ priv->fast = devm_clk_get(dev, "fast"); -+ if (IS_ERR(priv->fast)) { -+ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get spdif fast domain clockt\n"); -+ return PTR_ERR(priv->fast); -+ } -+ -+ priv->iface = devm_clk_get(dev, "iface"); -+ if (IS_ERR(priv->iface)) { -+ if (PTR_ERR(priv->iface) != -EPROBE_DEFER) -+ dev_err(dev, -+ "Can't get the dai clock gate\n"); -+ return PTR_ERR(priv->iface); -+ } -+ -+ priv->mclk_i958 = devm_clk_get(dev, "mclk_i958"); -+ if (IS_ERR(priv->mclk_i958)) { -+ if (PTR_ERR(priv->mclk_i958) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get the spdif master clock\n"); -+ return PTR_ERR(priv->mclk_i958); -+ } -+ -+ /* -+ * TODO: the spdif dai can also get its data from the i2s fifo. -+ * For this use-case, the DAI driver will need to get the i2s master -+ * clock in order to reparent the spdif clock from cts_mclk_i958 to -+ * cts_amclk -+ */ -+ -+ priv->mclk = devm_clk_get(dev, "mclk"); -+ if (IS_ERR(priv->mclk)) { -+ if (PTR_ERR(priv->mclk) != -EPROBE_DEFER) -+ dev_err(dev, "Can't get the spdif input mux clock\n"); -+ return PTR_ERR(priv->mclk); -+ } -+ -+ return devm_snd_soc_register_component(dev, &meson_spdif_dai_component, -+ &meson_spdif_dai, 1); -+} -+ -+static const struct of_device_id meson_spdif_dai_of_match[] = { -+ { .compatible = "amlogic,meson-spdif-dai", }, -+ { .compatible = "amlogic,meson-gxbb-spdif-dai", }, -+ { .compatible = "amlogic,meson-gxl-spdif-dai", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, meson_spdif_dai_of_match); -+ -+static struct platform_driver meson_spdif_dai_pdrv = { -+ .probe = meson_spdif_dai_probe, -+ .driver = { -+ .name = DRV_NAME, -+ .of_match_table = meson_spdif_dai_of_match, -+ }, -+}; -+module_platform_driver(meson_spdif_dai_pdrv); -+ -+MODULE_DESCRIPTION("Meson spdif DAI ASoC Driver"); -+MODULE_AUTHOR("Jerome Brunet "); -+MODULE_LICENSE("GPL v2"); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch b/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch deleted file mode 100644 index e04c08c03..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0008-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch +++ /dev/null @@ -1,31 +0,0 @@ -From eabd19b9bb8a62764dfd5290205cf7431e0329d6 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 31 Mar 2017 15:55:03 +0200 -Subject: [PATCH 08/53] ARM64: defconfig: enable audio support for meson SoCs - as module - -Add audio support for meson SoCs. This includes the audio core -driver and the i2s and spdif output interfaces - -Signed-off-by: Jerome Brunet ---- - arch/arm64/configs/defconfig | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index ab1cb51319e7..a4bf54b3b50d 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -464,6 +464,9 @@ CONFIG_SOUND=y - CONFIG_SND=y - CONFIG_SND_SOC=y - CONFIG_SND_BCM2835_SOC_I2S=m -+CONFIG_SND_SOC_MESON=m -+CONFIG_SND_SOC_MESON_I2S=m -+CONFIG_SND_SOC_MESON_SPDIF=m - CONFIG_SND_SOC_ROCKCHIP=m - CONFIG_SND_SOC_ROCKCHIP_I2S=m - CONFIG_SND_SOC_ROCKCHIP_SPDIF=m --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch b/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch deleted file mode 100644 index 2d5f7ec33..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0009-ARM64-dts-meson-gx-add-audio-controller-nodes.patch +++ /dev/null @@ -1,189 +0,0 @@ -From 8615d90edac5487f8639c5e4df40312972d7b2c9 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Thu, 30 Mar 2017 15:19:04 +0200 -Subject: [PATCH 09/53] ARM64: dts: meson-gx: add audio controller nodes - -Add audio controller nodes for Amlogic meson gxbb and gxl. -This includes the audio-core node, the i2s and spdif DAIs, i2s and spdif -aiu DMAs. - -Audio on this SoC family is still a work in progress. More nodes are likely -to be added later on (pcm DAIs, input DMAs, etc ...) - -Signed-off-by: Jerome Brunet ---- - arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 35 ++++++++++++++++++ - arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 39 +++++++++++++++++++++ - arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 38 ++++++++++++++++++++ - 3 files changed, 112 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index b8dc4dbb391b..6b64b63f2a68 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -203,6 +203,41 @@ - #reset-cells = <1>; - }; - -+ audio: audio@5400 { -+ compatible = "amlogic,meson-audio-core"; -+ reg = <0x0 0x5400 0x0 0x2ac>, -+ <0x0 0xa000 0x0 0x304>; -+ reg-names = "aiu", "audin"; -+ status = "disabled"; -+ -+ aiu_i2s_dma: aiu_i2s_dma { -+ #sound-dai-cells = <0>; -+ compatible = "amlogic,meson-aiu-i2s-dma"; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ -+ aiu_spdif_dma: aiu_spdif_dma { -+ #sound-dai-cells = <0>; -+ compatible = "amlogic,meson-aiu-spdif-dma"; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ -+ i2s_dai: i2s_dai { -+ #sound-dai-cells = <0>; -+ compatible = "amlogic,meson-i2s-dai"; -+ status = "disabled"; -+ }; -+ -+ spdif_dai: spdif_dai { -+ #sound-dai-cells = <0>; -+ compatible = "amlogic,meson-spdif-dai"; -+ status = "disabled"; -+ }; -+ -+ }; -+ - uart_A: serial@84c0 { - compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x84c0 0x0 0x18>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -index 98cbba6809ca..79132496691f 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -@@ -659,6 +659,35 @@ - }; - }; - -+&audio { -+ clocks = <&clkc CLKID_AIU>, -+ <&clkc CLKID_AIU_GLUE>, -+ <&clkc CLKID_I2S_SPDIF>; -+ clock-names = "aiu_top", "aiu_glue", "audin"; -+ resets = <&reset RESET_AIU>, -+ <&reset RESET_AUDIN>; -+ reset-names = "aiu", "audin"; -+}; -+ -+&aiu_i2s_dma { -+ clocks = <&clkc CLKID_I2S_OUT>; -+ clock-names = "fast"; -+}; -+ -+&aiu_spdif_dma { -+ clocks = <&clkc CLKID_IEC958>; -+ clock-names = "fast"; -+ -+}; -+ -+&i2s_dai { -+ clocks = <&clkc CLKID_I2S_OUT>, -+ <&clkc CLKID_MIXER_IFACE>, -+ <&clkc CLKID_AOCLK_GATE>, -+ <&clkc CLKID_CTS_AMCLK>; -+ clock-names = "fast", "iface", "bclks", "mclk"; -+}; -+ - &pwrc_vpu { - resets = <&reset RESET_VIU>, - <&reset RESET_VENC>, -@@ -741,6 +770,15 @@ - num-cs = <1>; - }; - -+&spdif_dai { -+ clocks = <&clkc CLKID_IEC958>, -+ <&clkc CLKID_IEC958_GATE>, -+ <&clkc CLKID_CTS_MCLK_I958>, -+ <&clkc CLKID_CTS_AMCLK>, -+ <&clkc CLKID_CTS_I958>; -+ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; -+}; -+ - &spifc { - clocks = <&clkc CLKID_SPI>; - }; -@@ -774,3 +812,4 @@ - compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; - power-domains = <&pwrc_vpu>; - }; -+ -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -index c87a80e9bcc6..20922cdc2c23 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -@@ -660,6 +660,34 @@ - }; - }; - -+&audio { -+ clocks = <&clkc CLKID_AIU>, -+ <&clkc CLKID_AIU_GLUE>, -+ <&clkc CLKID_I2S_SPDIF>; -+ clock-names = "aiu_top", "aiu_glue", "audin"; -+ resets = <&reset RESET_AIU>, -+ <&reset RESET_AUDIN>; -+ reset-names = "aiu", "audin"; -+}; -+ -+&aiu_i2s_dma { -+ clocks = <&clkc CLKID_I2S_OUT>; -+ clock-names = "fast"; -+}; -+ -+&aiu_spdif_dma { -+ clocks = <&clkc CLKID_IEC958>; -+ clock-names = "fast"; -+}; -+ -+&i2s_dai { -+ clocks = <&clkc CLKID_I2S_OUT>, -+ <&clkc CLKID_MIXER_IFACE>, -+ <&clkc CLKID_AOCLK_GATE>, -+ <&clkc CLKID_CTS_AMCLK>; -+ clock-names = "fast", "iface", "bclks", "mclk"; -+}; -+ - &pwrc_vpu { - resets = <&reset RESET_VIU>, - <&reset RESET_VENC>, -@@ -742,6 +770,15 @@ - num-cs = <1>; - }; - -+&spdif_dai { -+ clocks = <&clkc CLKID_IEC958>, -+ <&clkc CLKID_IEC958_GATE>, -+ <&clkc CLKID_CTS_MCLK_I958>, -+ <&clkc CLKID_CTS_AMCLK>, -+ <&clkc CLKID_CTS_I958>; -+ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk"; -+}; -+ - &spifc { - clocks = <&clkc CLKID_SPI>; - }; -@@ -775,3 +812,4 @@ - compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; - power-domains = <&pwrc_vpu>; - }; -+ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch b/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch deleted file mode 100644 index b41eb405d..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0010-snd-meson-activate-HDMI-audio-path.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 5608714afb7c71054a01e4ad208b3eaa044041d4 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Fri, 7 Jul 2017 17:39:21 +0200 -Subject: [PATCH 10/53] snd: meson: activate HDMI audio path - -Signed-off-by: Neil Armstrong ---- - sound/soc/meson/i2s-dai.c | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c -index 1008af8d3972..63fe098ecf82 100644 ---- a/sound/soc/meson/i2s-dai.c -+++ b/sound/soc/meson/i2s-dai.c -@@ -56,8 +56,19 @@ struct meson_i2s_dai { - #define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) - #define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) - #define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) -+#define AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK BIT(6) -+#define AIU_CLK_CTRL_MORE_HDMI_TX_I958_CLK (0 << 6) -+#define AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK (1 << 6) - #define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) - #define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) -+#define AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK GENMASK(1, 0) -+#define AIU_HDMI_CLK_DATA_CTRL_CLK_DISABLE (0 << 0) -+#define AIU_HDMI_CLK_DATA_CTRL_CLK_PCM (1 << 0) -+#define AIU_HDMI_CLK_DATA_CTRL_CLK_I2S (2 << 0) -+#define AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK GENMASK(5, 4) -+#define AIU_HDMI_CLK_DATA_CTRL_DATA_MUTE (0 << 4) -+#define AIU_HDMI_CLK_DATA_CTRL_DATA_PCM (1 << 4) -+#define AIU_HDMI_CLK_DATA_CTRL_DATA_I2S (2 << 4) - #define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) - #define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) - #define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) -@@ -221,6 +232,17 @@ static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, - return ret; - } - -+ /* Quick and dirty hack for HDMI */ -+ regmap_update_bits(priv->core->aiu, AIU_HDMI_CLK_DATA_CTRL, -+ AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK | -+ AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK, -+ AIU_HDMI_CLK_DATA_CTRL_CLK_I2S | -+ AIU_HDMI_CLK_DATA_CTRL_DATA_I2S); -+ -+ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, -+ AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK, -+ AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK); -+ - return 0; - } - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch b/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch deleted file mode 100644 index 0876bc059..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0011-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 5b3d41b6ad8275d53b758d6d4b95441b53cd320b Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Tue, 14 Feb 2017 19:18:04 +0100 -Subject: [PATCH 11/53] drm/meson: select dw-hdmi i2s audio for meson hdmi - -Signed-off-by: Jerome Brunet ---- - drivers/gpu/drm/meson/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig -index 3ce51d8dfe1c..02d400b8795c 100644 ---- a/drivers/gpu/drm/meson/Kconfig -+++ b/drivers/gpu/drm/meson/Kconfig -@@ -13,3 +13,4 @@ config DRM_MESON_DW_HDMI - depends on DRM_MESON - default y if DRM_MESON - select DRM_DW_HDMI -+ select DRM_DW_HDMI_I2S_AUDIO --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch b/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch deleted file mode 100644 index eb2208865..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0012-ARM64-dts-meson-gx-add-sound-dai-cells-to-HDMI-node.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 461a8ba1e73d38b8cd8f8c931a8ae27676cdb085 Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Wed, 20 Sep 2017 18:01:26 +0200 -Subject: [PATCH 12/53] ARM64: dts: meson-gx: add sound-dai-cells to HDMI node - -Signed-off-by: Jerome Brunet ---- - arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 + - arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -index 79132496691f..2a4d506bad4e 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -@@ -305,6 +305,7 @@ - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; -+ #sound-dai-cells = <0>; - }; - - &sysctrl { -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -index 20922cdc2c23..9f4b6185a61d 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -@@ -257,6 +257,7 @@ - <&clkc CLKID_CLK81>, - <&clkc CLKID_GCLK_VENCI_INT0>; - clock-names = "isfr", "iahb", "venci"; -+ #sound-dai-cells = <0>; - }; - - &sysctrl { --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch b/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch deleted file mode 100644 index 27760c288..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0013-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch +++ /dev/null @@ -1,864 +0,0 @@ -From dc4eb517f2800001f77bec852f8f688f0164e51b Mon Sep 17 00:00:00 2001 -From: Jerome Brunet -Date: Wed, 20 Sep 2017 18:10:08 +0200 -Subject: [PATCH 13/53] ARM64: dts: meson: activate hdmi audio HDMI enabled - boards - -This patch activate audio over HDMI on selected boards - -Please note that this audio support is based on WIP changes -This should be considered as preview and it does not reflect -the audio I expect to see merged - -Signed-off-by: Jerome Brunet -Signed-off-by: Neil Armstrong ---- - .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 45 +++++++++++++++++++ - .../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxbb-odroidc2.dts | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 45 +++++++++++++++++++ - .../amlogic/meson-gxl-s905x-khadas-vim.dts | 45 +++++++++++++++++++ - .../amlogic/meson-gxl-s905x-libretech-cc.dts | 45 +++++++++++++++++++ - .../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxl-s905x-p212.dts | 45 +++++++++++++++++++ - .../dts/amlogic/meson-gxm-khadas-vim2.dts | 45 +++++++++++++++++++ - .../boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 45 +++++++++++++++++++ - 12 files changed, 540 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -index 765247bc4f24..fb9ad6faa745 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -@@ -102,6 +102,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -111,6 +144,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; -@@ -133,6 +174,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -index cbe99bd4e06d..5b10de9a0bad 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -@@ -88,6 +88,39 @@ - clock-names = "ext_clock"; - }; - -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+ - vcc1v8: regulator-vcc1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC1.8V"; -@@ -131,6 +164,14 @@ - }; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cec_AO { - status = "okay"; - pinctrl-0 = <&ao_cec_pins>; -@@ -185,6 +226,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -index 4cf7f6e80c6a..ff87bdc7ddbf 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts -@@ -119,6 +119,39 @@ - clock-names = "ext_clock"; - }; - -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+ - cvbs-connector { - compatible = "composite-video-connector"; - -@@ -154,6 +187,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - ðmac { - status = "okay"; - pinctrl-0 = <ð_rmii_pins>; -@@ -190,6 +231,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -index 54954b314a45..3da33090b8fe 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -@@ -110,6 +110,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -119,6 +152,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - ðmac { - status = "okay"; - pinctrl-0 = <ð_rgmii_pins>; -@@ -181,6 +222,10 @@ - pinctrl-names = "default"; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -index ce862266b9aa..84eb93b4229f 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi -@@ -113,6 +113,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -122,6 +155,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; -@@ -140,6 +181,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -index 70325b273bd2..7d1f1726f29d 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi -@@ -105,6 +105,47 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+}; -+ -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; - }; - - &cec_AO { -@@ -159,6 +200,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -index d32cf3846370..f053595ebdc4 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -@@ -65,6 +65,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -74,6 +107,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; -@@ -86,6 +127,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &i2c_A { - status = "okay"; - pinctrl-0 = <&i2c_a_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -index f63bceb88caa..f56969efffba 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -@@ -84,6 +84,39 @@ - regulator-always-on; - }; - -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+ - vcc_3v3: regulator-vcc_3v3 { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3"; -@@ -130,6 +163,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; -@@ -151,6 +192,10 @@ - pinctrl-names = "default"; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -index 6739697be1de..e3e777f665c0 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts -@@ -102,6 +102,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -111,6 +144,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; -@@ -135,6 +176,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -index 5896e8a5d86b..f8c66a7972b3 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -@@ -32,6 +32,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -41,12 +74,24 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &hdmi_tx { - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -index 313f88f8759e..4fbfa5a850cc 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -@@ -85,6 +85,39 @@ - }; - }; - -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; -+ - pwmleds { - compatible = "pwm-leds"; - -@@ -205,6 +238,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cpu0 { - #cooling-cells = <2>; - }; -@@ -279,6 +320,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &i2c_A { - status = "okay"; - pinctrl-0 = <&i2c_a_pins>; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts -index f7a1cffab4a8..b9c5e6444daa 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts -@@ -75,6 +75,39 @@ - }; - }; - }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "meson-gx-audio"; -+ -+ assigned-clocks = <&clkc CLKID_MPLL2>, -+ <&clkc CLKID_MPLL0>, -+ <&clkc CLKID_MPLL1>; -+ assigned-clock-parents = <0>, <0>, <0>; -+ assigned-clock-rates = <294912000>, -+ <270950400>, -+ <393216000>; -+ -+ simple-audio-card,dai-link@0 { -+ /* HDMI Output */ -+ format = "i2s"; -+ mclk-fs = <256>; -+ bitclock-master = <&i2s_dai>; -+ frame-master = <&i2s_dai>; -+ -+ plat { -+ sound-dai = <&aiu_i2s_dma>; -+ }; -+ -+ cpu { -+ sound-dai = <&i2s_dai>; -+ }; -+ -+ codec { -+ sound-dai = <&hdmi_tx>; -+ }; -+ }; -+ }; - }; - - &cec_AO { -@@ -84,6 +117,14 @@ - hdmi-phandle = <&hdmi_tx>; - }; - -+&audio { -+ status = "okay"; -+}; -+ -+&aiu_i2s_dma { -+ status = "okay"; -+}; -+ - &cvbs_vdac_port { - cvbs_vdac_out: endpoint { - remote-endpoint = <&cvbs_connector_in>; -@@ -129,6 +170,10 @@ - }; - }; - -+&i2s_dai { -+ status = "okay"; -+}; -+ - &ir { - status = "okay"; - pinctrl-0 = <&remote_input_ao_pins>; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch b/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch deleted file mode 100644 index 2a84e1aac..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0014-drm-bridge-dw-hdmi-Use-AUTO-CTS-setup-mode-when-non-.patch +++ /dev/null @@ -1,78 +0,0 @@ -From de9e307aca194c9918a3ace8d809c9f3b18000b9 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Mon, 2 Jul 2018 12:21:55 +0200 -Subject: [PATCH 14/53] drm: bridge: dw-hdmi: Use AUTO CTS setup mode when - non-AHB audio - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 41 ++++++++++++++--------- - 1 file changed, 26 insertions(+), 15 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 5971976284bf..1fc12708dbb5 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -430,8 +430,12 @@ static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts, - /* nshift factor = 0 */ - hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); - -- hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | -- HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); -+ /* Use Auto CTS mode with CTS is unknown */ -+ if (cts) -+ hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) | -+ HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); -+ else -+ hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3); - hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2); - hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1); - -@@ -501,24 +505,31 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, - { - unsigned long ftdms = pixel_clk; - unsigned int n, cts; -+ u8 config3; - u64 tmp; - - n = hdmi_compute_n(sample_rate, pixel_clk); - -- /* -- * Compute the CTS value from the N value. Note that CTS and N -- * can be up to 20 bits in total, so we need 64-bit math. Also -- * note that our TDMS clock is not fully accurate; it is accurate -- * to kHz. This can introduce an unnecessary remainder in the -- * calculation below, so we don't try to warn about that. -- */ -- tmp = (u64)ftdms * n; -- do_div(tmp, 128 * sample_rate); -- cts = tmp; -+ config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID); - -- dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", -- __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, -- n, cts); -+ if (config3 & HDMI_CONFIG3_AHBAUDDMA) { -+ /* -+ * Compute the CTS value from the N value. Note that CTS and N -+ * can be up to 20 bits in total, so we need 64-bit math. Also -+ * note that our TDMS clock is not fully accurate; it is -+ * accurate to kHz. This can introduce an unnecessary remainder -+ * in the calculation below, so we don't try to warn about that. -+ */ -+ tmp = (u64)ftdms * n; -+ do_div(tmp, 128 * sample_rate); -+ cts = tmp; -+ -+ dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", -+ __func__, sample_rate, -+ ftdms / 1000000, (ftdms / 1000) % 1000, -+ n, cts); -+ } else -+ cts = 0; - - spin_lock_irq(&hdmi->audio_lock); - hdmi->audio_n = n; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch b/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch deleted file mode 100644 index 5bef76957..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0015-drm-meson-Call-drm_crtc_vblank_on-drm_crtc_vblank_of.patch +++ /dev/null @@ -1,29 +0,0 @@ -From ca4d7cc46fc5788da89609691ccb0b001bdbdc2d Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 28 Feb 2018 16:07:18 +0100 -Subject: [PATCH 15/53] drm/meson: Call drm_crtc_vblank_on / - drm_crtc_vblank_off - -Make sure that the CRTC code will call the enable/disable_vblank hooks. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_crtc.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c -index 709475d5cc30..2680be54a1d1 100644 ---- a/drivers/gpu/drm/meson/meson_crtc.c -+++ b/drivers/gpu/drm/meson/meson_crtc.c -@@ -104,6 +104,8 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc, - drm_crtc_vblank_on(crtc); - - priv->viu.osd1_enabled = true; -+ -+ drm_crtc_vblank_on(crtc); - } - - static void meson_crtc_atomic_disable(struct drm_crtc *crtc, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch deleted file mode 100644 index 7862cb9e5..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0016-soc-amlogic-add-meson-canvas-driver.patch +++ /dev/null @@ -1,316 +0,0 @@ -From d28f2758958eff3be784b80eff63c144d342539b Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Fri, 20 Apr 2018 13:17:07 +0200 -Subject: [PATCH 16/53] soc: amlogic: add meson-canvas driver - -Amlogic SoCs have a repository of 256 canvas which they use to -describe pixel buffers. - -They contain metadata like width, height, block mode, endianness [..] - -Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write -pixels. - -Reviewed-by: Jerome Brunet -Tested-by: Neil Armstrong -Signed-off-by: Maxime Jourdan ---- - drivers/soc/amlogic/Kconfig | 7 + - drivers/soc/amlogic/Makefile | 1 + - drivers/soc/amlogic/meson-canvas.c | 185 +++++++++++++++++++++++ - include/linux/soc/amlogic/meson-canvas.h | 65 ++++++++ - 4 files changed, 258 insertions(+) - create mode 100644 drivers/soc/amlogic/meson-canvas.c - create mode 100644 include/linux/soc/amlogic/meson-canvas.h - -diff --git a/drivers/soc/amlogic/Kconfig b/drivers/soc/amlogic/Kconfig -index b04f6e4aedbc..2f282b472912 100644 ---- a/drivers/soc/amlogic/Kconfig -+++ b/drivers/soc/amlogic/Kconfig -@@ -1,5 +1,12 @@ - menu "Amlogic SoC drivers" - -+config MESON_CANVAS -+ tristate "Amlogic Meson Canvas driver" -+ depends on ARCH_MESON || COMPILE_TEST -+ default n -+ help -+ Say yes to support the canvas IP for Amlogic SoCs. -+ - config MESON_GX_SOCINFO - bool "Amlogic Meson GX SoC Information driver" - depends on ARCH_MESON || COMPILE_TEST -diff --git a/drivers/soc/amlogic/Makefile b/drivers/soc/amlogic/Makefile -index 8fa321893928..0ab16d35ac36 100644 ---- a/drivers/soc/amlogic/Makefile -+++ b/drivers/soc/amlogic/Makefile -@@ -1,3 +1,4 @@ -+obj-$(CONFIG_MESON_CANVAS) += meson-canvas.o - obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o - obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o - obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o -diff --git a/drivers/soc/amlogic/meson-canvas.c b/drivers/soc/amlogic/meson-canvas.c -new file mode 100644 -index 000000000000..fce33ca76bb6 ---- /dev/null -+++ b/drivers/soc/amlogic/meson-canvas.c -@@ -0,0 +1,185 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved. -+ * Copyright (C) 2014 Endless Mobile -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define NUM_CANVAS 256 -+ -+/* DMC Registers */ -+#define DMC_CAV_LUT_DATAL 0x00 -+ #define CANVAS_WIDTH_LBIT 29 -+ #define CANVAS_WIDTH_LWID 3 -+#define DMC_CAV_LUT_DATAH 0x04 -+ #define CANVAS_WIDTH_HBIT 0 -+ #define CANVAS_HEIGHT_BIT 9 -+ #define CANVAS_WRAP_BIT 22 -+ #define CANVAS_BLKMODE_BIT 24 -+ #define CANVAS_ENDIAN_BIT 26 -+#define DMC_CAV_LUT_ADDR 0x08 -+ #define CANVAS_LUT_WR_EN BIT(9) -+ #define CANVAS_LUT_RD_EN BIT(8) -+ -+struct meson_canvas { -+ struct device *dev; -+ void __iomem *reg_base; -+ spinlock_t lock; /* canvas device lock */ -+ u8 used[NUM_CANVAS]; -+}; -+ -+static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val) -+{ -+ writel_relaxed(val, canvas->reg_base + reg); -+} -+ -+static u32 canvas_read(struct meson_canvas *canvas, u32 reg) -+{ -+ return readl_relaxed(canvas->reg_base + reg); -+} -+ -+struct meson_canvas *meson_canvas_get(struct device *dev) -+{ -+ struct device_node *canvas_node; -+ struct platform_device *canvas_pdev; -+ -+ canvas_node = of_parse_phandle(dev->of_node, "amlogic,canvas", 0); -+ if (!canvas_node) -+ return ERR_PTR(-ENODEV); -+ -+ canvas_pdev = of_find_device_by_node(canvas_node); -+ if (!canvas_pdev) -+ return ERR_PTR(-EPROBE_DEFER); -+ -+ return dev_get_drvdata(&canvas_pdev->dev); -+} -+EXPORT_SYMBOL_GPL(meson_canvas_get); -+ -+int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, -+ u32 addr, u32 stride, u32 height, -+ unsigned int wrap, -+ unsigned int blkmode, -+ unsigned int endian) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&canvas->lock, flags); -+ if (!canvas->used[canvas_index]) { -+ dev_err(canvas->dev, -+ "Trying to setup non allocated canvas %u\n", -+ canvas_index); -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ return -EINVAL; -+ } -+ -+ canvas_write(canvas, DMC_CAV_LUT_DATAL, -+ ((addr + 7) >> 3) | -+ (((stride + 7) >> 3) << CANVAS_WIDTH_LBIT)); -+ -+ canvas_write(canvas, DMC_CAV_LUT_DATAH, -+ ((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) << -+ CANVAS_WIDTH_HBIT) | -+ (height << CANVAS_HEIGHT_BIT) | -+ (wrap << CANVAS_WRAP_BIT) | -+ (blkmode << CANVAS_BLKMODE_BIT) | -+ (endian << CANVAS_ENDIAN_BIT)); -+ -+ canvas_write(canvas, DMC_CAV_LUT_ADDR, -+ CANVAS_LUT_WR_EN | canvas_index); -+ -+ /* Force a read-back to make sure everything is flushed. */ -+ canvas_read(canvas, DMC_CAV_LUT_DATAH); -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(meson_canvas_config); -+ -+int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index) -+{ -+ int i; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&canvas->lock, flags); -+ for (i = 0; i < NUM_CANVAS; ++i) { -+ if (!canvas->used[i]) { -+ canvas->used[i] = 1; -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ *canvas_index = i; -+ return 0; -+ } -+ } -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ -+ dev_err(canvas->dev, "No more canvas available\n"); -+ return -ENODEV; -+} -+EXPORT_SYMBOL_GPL(meson_canvas_alloc); -+ -+int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&canvas->lock, flags); -+ if (!canvas->used[canvas_index]) { -+ dev_err(canvas->dev, -+ "Trying to free unused canvas %u\n", canvas_index); -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ return -EINVAL; -+ } -+ canvas->used[canvas_index] = 0; -+ spin_unlock_irqrestore(&canvas->lock, flags); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(meson_canvas_free); -+ -+static int meson_canvas_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ struct meson_canvas *canvas; -+ struct device *dev = &pdev->dev; -+ -+ canvas = devm_kzalloc(dev, sizeof(*canvas), GFP_KERNEL); -+ if (!canvas) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ canvas->reg_base = devm_ioremap_resource(dev, res); -+ if (IS_ERR(canvas->reg_base)) -+ return PTR_ERR(canvas->reg_base); -+ -+ canvas->dev = dev; -+ spin_lock_init(&canvas->lock); -+ dev_set_drvdata(dev, canvas); -+ -+ return 0; -+} -+ -+static const struct of_device_id canvas_dt_match[] = { -+ { .compatible = "amlogic,canvas" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, canvas_dt_match); -+ -+static struct platform_driver meson_canvas_driver = { -+ .probe = meson_canvas_probe, -+ .driver = { -+ .name = "amlogic-canvas", -+ .of_match_table = canvas_dt_match, -+ }, -+}; -+module_platform_driver(meson_canvas_driver); -+ -+MODULE_DESCRIPTION("Amlogic Canvas driver"); -+MODULE_AUTHOR("Maxime Jourdan "); -+MODULE_LICENSE("GPL"); -diff --git a/include/linux/soc/amlogic/meson-canvas.h b/include/linux/soc/amlogic/meson-canvas.h -new file mode 100644 -index 000000000000..b4dde2fbeb3f ---- /dev/null -+++ b/include/linux/soc/amlogic/meson-canvas.h -@@ -0,0 +1,65 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ */ -+#ifndef __SOC_MESON_CANVAS_H -+#define __SOC_MESON_CANVAS_H -+ -+#include -+ -+#define MESON_CANVAS_WRAP_NONE 0x00 -+#define MESON_CANVAS_WRAP_X 0x01 -+#define MESON_CANVAS_WRAP_Y 0x02 -+ -+#define MESON_CANVAS_BLKMODE_LINEAR 0x00 -+#define MESON_CANVAS_BLKMODE_32x32 0x01 -+#define MESON_CANVAS_BLKMODE_64x64 0x02 -+ -+#define MESON_CANVAS_ENDIAN_SWAP16 0x1 -+#define MESON_CANVAS_ENDIAN_SWAP32 0x3 -+#define MESON_CANVAS_ENDIAN_SWAP64 0x7 -+#define MESON_CANVAS_ENDIAN_SWAP128 0xf -+ -+struct meson_canvas; -+ -+/** -+ * meson_canvas_get() - get a canvas provider instance -+ * -+ * @dev: consumer device pointer -+ */ -+struct meson_canvas *meson_canvas_get(struct device *dev); -+ -+/** -+ * meson_canvas_alloc() - take ownership of a canvas -+ * -+ * @canvas: canvas provider instance retrieved from meson_canvas_get() -+ * @canvas_index: will be filled with the canvas ID -+ */ -+int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index); -+ -+/** -+ * meson_canvas_free() - remove ownership from a canvas -+ * -+ * @canvas: canvas provider instance retrieved from meson_canvas_get() -+ * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() -+ */ -+int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index); -+ -+/** -+ * meson_canvas_config() - configure a canvas -+ * -+ * @canvas: canvas provider instance retrieved from meson_canvas_get() -+ * @canvas_index: canvas ID that was obtained via meson_canvas_alloc() -+ * @addr: physical address to the pixel buffer -+ * @stride: width of the buffer -+ * @height: height of the buffer -+ * @wrap: undocumented -+ * @blkmode: block mode (linear, 32x32, 64x64) -+ * @endian: byte swapping (swap16, swap32, swap64, swap128) -+ */ -+int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, -+ u32 addr, u32 stride, u32 height, -+ unsigned int wrap, unsigned int blkmode, -+ unsigned int endian); -+ -+#endif --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch b/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch deleted file mode 100644 index b6da4467a..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0017-ARM64-dts-meson-gx-add-dmcbus-and-canvas-nodes.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 83a293f5c56ec7cb763edba40c9cbf4f79ed6393 Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Fri, 20 Apr 2018 16:09:09 +0200 -Subject: [PATCH 17/53] ARM64: dts: meson-gx: add dmcbus and canvas nodes. - -DMC is a small memory region with various registers, -including the ones needed for the canvas module. - -Reviewed-by: Jerome Brunet -Signed-off-by: Maxime Jourdan ---- - arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index 6b64b63f2a68..fb6435431a94 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -458,6 +458,19 @@ - }; - }; - -+ dmcbus: bus@c8838000 { -+ compatible = "simple-bus"; -+ reg = <0x0 0xc8838000 0x0 0x400>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>; -+ -+ canvas: video-lut@48 { -+ compatible = "amlogic,canvas"; -+ reg = <0x0 0x48 0x0 0x14>; -+ }; -+ }; -+ - hiubus: bus@c883c000 { - compatible = "simple-bus"; - reg = <0x0 0xc883c000 0x0 0x2000>; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch b/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch deleted file mode 100644 index 48c074fdb..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0018-drm-meson-Use-optional-canvas-provider.patch +++ /dev/null @@ -1,174 +0,0 @@ -From b1ef71bf75024008c4221e0415f84af57cd128ac Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Mon, 15 Oct 2018 14:37:18 +0200 -Subject: [PATCH 18/53] drm/meson: Use optional canvas provider - -This is the first step into converting the meson/drm driver to use -the canvas module. - -If a canvas provider node is detected in DT, use it. Otherwise, -fall back to what is currently being done. - -Signed-off-by: Maxime Jourdan ---- - drivers/gpu/drm/meson/Kconfig | 1 + - drivers/gpu/drm/meson/meson_crtc.c | 14 ++++++--- - drivers/gpu/drm/meson/meson_drv.c | 46 ++++++++++++++++++----------- - drivers/gpu/drm/meson/meson_drv.h | 4 +++ - drivers/gpu/drm/meson/meson_plane.c | 8 ++++- - 5 files changed, 51 insertions(+), 22 deletions(-) - -diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig -index 02d400b8795c..892905825fea 100644 ---- a/drivers/gpu/drm/meson/Kconfig -+++ b/drivers/gpu/drm/meson/Kconfig -@@ -7,6 +7,7 @@ config DRM_MESON - select DRM_GEM_CMA_HELPER - select VIDEOMODE_HELPERS - select REGMAP_MMIO -+ select MESON_CANVAS - - config DRM_MESON_DW_HDMI - tristate "HDMI Synopsys Controller support for Amlogic Meson Display" -diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c -index 2680be54a1d1..910b92def5d2 100644 ---- a/drivers/gpu/drm/meson/meson_crtc.c -+++ b/drivers/gpu/drm/meson/meson_crtc.c -@@ -199,10 +199,16 @@ void meson_crtc_irq(struct meson_drm *priv) - } else - meson_vpp_disable_interlace_vscaler_osd1(priv); - -- meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, -- priv->viu.osd1_addr, priv->viu.osd1_stride, -- priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, -- MESON_CANVAS_BLKMODE_LINEAR); -+ if (priv->canvas) -+ meson_canvas_config(priv->canvas, priv->canvas_id_osd1, -+ priv->viu.osd1_addr, priv->viu.osd1_stride, -+ priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, 0); -+ else -+ meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, -+ priv->viu.osd1_addr, priv->viu.osd1_stride, -+ priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR); - - /* Enable OSD1 */ - writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, -diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c -index 588b3b0c8315..874c7a74a7c1 100644 ---- a/drivers/gpu/drm/meson/meson_drv.c -+++ b/drivers/gpu/drm/meson/meson_drv.c -@@ -220,24 +220,33 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - goto free_drm; - } - -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); -- if (!res) { -- ret = -EINVAL; -- goto free_drm; -- } -- /* Simply ioremap since it may be a shared register zone */ -- regs = devm_ioremap(dev, res->start, resource_size(res)); -- if (!regs) { -- ret = -EADDRNOTAVAIL; -- goto free_drm; -- } -+ priv->canvas = meson_canvas_get(dev); -+ if (!IS_ERR(priv->canvas)) { -+ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); -+ if (ret) -+ goto free_drm; -+ } else { -+ priv->canvas = NULL; - -- priv->dmc = devm_regmap_init_mmio(dev, regs, -- &meson_regmap_config); -- if (IS_ERR(priv->dmc)) { -- dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); -- ret = PTR_ERR(priv->dmc); -- goto free_drm; -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); -+ if (!res) { -+ ret = -EINVAL; -+ goto free_drm; -+ } -+ /* Simply ioremap since it may be a shared register zone */ -+ regs = devm_ioremap(dev, res->start, resource_size(res)); -+ if (!regs) { -+ ret = -EADDRNOTAVAIL; -+ goto free_drm; -+ } -+ -+ priv->dmc = devm_regmap_init_mmio(dev, regs, -+ &meson_regmap_config); -+ if (IS_ERR(priv->dmc)) { -+ dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); -+ ret = PTR_ERR(priv->dmc); -+ goto free_drm; -+ } - } - - priv->vsync_irq = platform_get_irq(pdev, 0); -@@ -322,6 +331,9 @@ static void meson_drv_unbind(struct device *dev) - struct meson_drm *priv = dev_get_drvdata(dev); - struct drm_device *drm = priv->drm; - -+ if (priv->canvas) -+ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); -+ - drm_dev_unregister(drm); - drm_irq_uninstall(drm); - drm_kms_helper_poll_fini(drm); -diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h -index 8450d6ac8c9b..728d0ca33732 100644 ---- a/drivers/gpu/drm/meson/meson_drv.h -+++ b/drivers/gpu/drm/meson/meson_drv.h -@@ -22,6 +22,7 @@ - #include - #include - #include -+#include - #include - - struct meson_drm { -@@ -31,6 +32,9 @@ struct meson_drm { - struct regmap *dmc; - int vsync_irq; - -+ struct meson_canvas *canvas; -+ u8 canvas_id_osd1; -+ - struct drm_device *drm; - struct drm_crtc *crtc; - struct drm_fbdev_cma *fbdev; -diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c -index 12c80dfcff59..51bec8e98a39 100644 ---- a/drivers/gpu/drm/meson/meson_plane.c -+++ b/drivers/gpu/drm/meson/meson_plane.c -@@ -90,6 +90,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - .y2 = state->crtc_y + state->crtc_h, - }; - unsigned long flags; -+ u8 canvas_id_osd1; - - /* - * Update Coordinates -@@ -104,8 +105,13 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - (0xFF << OSD_GLOBAL_ALPHA_SHIFT) | - OSD_BLK0_ENABLE; - -+ if (priv->canvas) -+ canvas_id_osd1 = priv->canvas_id_osd1; -+ else -+ canvas_id_osd1 = MESON_CANVAS_ID_OSD1; -+ - /* Set up BLK0 to point to the right canvas */ -- priv->viu.osd1_blk0_cfg[0] = ((MESON_CANVAS_ID_OSD1 << OSD_CANVAS_SEL) | -+ priv->viu.osd1_blk0_cfg[0] = ((canvas_id_osd1 << OSD_CANVAS_SEL) | - OSD_ENDIANNESS_LE); - - /* On GXBB, Use the old non-HDR RGB2YUV converter */ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch b/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch deleted file mode 100644 index 7c1cc116a..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0019-arm64-dts-meson-gx-Add-canvas-provider-node-to-the-v.patch +++ /dev/null @@ -1,28 +0,0 @@ -From c16450ca851dbe9b7ad58464cea210610dd0433c Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Mon, 15 Oct 2018 14:38:24 +0200 -Subject: [PATCH 19/53] arm64: dts: meson-gx: Add canvas provider node to the - vpu - -Allows the vpu driver to optionally use a canvas provider node. - -Signed-off-by: Maxime Jourdan ---- - arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index fb6435431a94..5012607c95d2 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -540,6 +540,7 @@ - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; -+ amlogic,canvas = <&canvas>; - - /* CVBS VDAC output port */ - cvbs_vdac_port: port@0 { --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch b/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch deleted file mode 100644 index aca8014f4..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0020-drm-meson-Support-Overlay-plane-for-video-rendering.patch +++ /dev/null @@ -1,1260 +0,0 @@ -From 6274e2adb018593aa6e5378d990fc9c9f08c3da0 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 2 Aug 2018 10:00:01 +0200 -Subject: [PATCH 20/53] drm/meson: Support Overlay plane for video rendering - -The Amlogic Meson GX SoCs support an Overlay plane behind the primary -plane for video rendering. - -This Overlay plane support various YUV layouts : -- YUYV -- NV12 / NV21 -- YUV444 / 422 / 420 / 411 / 410 - -The scaler supports a wide range of scaling ratios, but for simplicity, -plane atomic check limits the scaling from x5 to /5 in vertical and -horizontal scaling. - -The z-order is fixed and always behind the primary plane and cannot be changed. - -The scaling parameter algorithm was taken from the Amlogic vendor kernel -code and rewritten to match the atomic universal plane requirements. - -The video rendering using this overlay plane support has been tested using -the new Kodi DRM-KMS Prime rendering path along the in-review V4L2 Mem2Mem -Hardware Video Decoder up to 3840x2160 NV12 frames on various display modes. ---- - drivers/gpu/drm/meson/Makefile | 2 +- - drivers/gpu/drm/meson/meson_canvas.c | 7 +- - drivers/gpu/drm/meson/meson_canvas.h | 11 +- - drivers/gpu/drm/meson/meson_crtc.c | 216 ++++++++- - drivers/gpu/drm/meson/meson_drv.c | 29 +- - drivers/gpu/drm/meson/meson_drv.h | 52 +++ - drivers/gpu/drm/meson/meson_overlay.c | 586 ++++++++++++++++++++++++ - drivers/gpu/drm/meson/meson_overlay.h | 14 + - drivers/gpu/drm/meson/meson_registers.h | 3 + - drivers/gpu/drm/meson/meson_viu.c | 15 + - drivers/gpu/drm/meson/meson_vpp.c | 44 +- - 11 files changed, 971 insertions(+), 8 deletions(-) - create mode 100644 drivers/gpu/drm/meson/meson_overlay.c - create mode 100644 drivers/gpu/drm/meson/meson_overlay.h - -diff --git a/drivers/gpu/drm/meson/Makefile b/drivers/gpu/drm/meson/Makefile -index c5c4cc362f02..7709f2fbb9f7 100644 ---- a/drivers/gpu/drm/meson/Makefile -+++ b/drivers/gpu/drm/meson/Makefile -@@ -1,5 +1,5 @@ - meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_venc_cvbs.o --meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o -+meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o meson_overlay.o - - obj-$(CONFIG_DRM_MESON) += meson-drm.o - obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o -diff --git a/drivers/gpu/drm/meson/meson_canvas.c b/drivers/gpu/drm/meson/meson_canvas.c -index 08f6073d967e..5de11aa7c775 100644 ---- a/drivers/gpu/drm/meson/meson_canvas.c -+++ b/drivers/gpu/drm/meson/meson_canvas.c -@@ -39,6 +39,7 @@ - #define CANVAS_WIDTH_HBIT 0 - #define CANVAS_HEIGHT_BIT 9 - #define CANVAS_BLKMODE_BIT 24 -+#define CANVAS_ENDIAN_BIT 26 - #define DMC_CAV_LUT_ADDR 0x50 /* 0x14 offset in data sheet */ - #define CANVAS_LUT_WR_EN (0x2 << 8) - #define CANVAS_LUT_RD_EN (0x1 << 8) -@@ -47,7 +48,8 @@ void meson_canvas_setup(struct meson_drm *priv, - uint32_t canvas_index, uint32_t addr, - uint32_t stride, uint32_t height, - unsigned int wrap, -- unsigned int blkmode) -+ unsigned int blkmode, -+ unsigned int endian) - { - unsigned int val; - -@@ -60,7 +62,8 @@ void meson_canvas_setup(struct meson_drm *priv, - CANVAS_WIDTH_HBIT) | - (height << CANVAS_HEIGHT_BIT) | - (wrap << 22) | -- (blkmode << CANVAS_BLKMODE_BIT)); -+ (blkmode << CANVAS_BLKMODE_BIT) | -+ (endian << CANVAS_ENDIAN_BIT)); - - regmap_write(priv->dmc, DMC_CAV_LUT_ADDR, - CANVAS_LUT_WR_EN | canvas_index); -diff --git a/drivers/gpu/drm/meson/meson_canvas.h b/drivers/gpu/drm/meson/meson_canvas.h -index af1759da4b27..85dbf26e2826 100644 ---- a/drivers/gpu/drm/meson/meson_canvas.h -+++ b/drivers/gpu/drm/meson/meson_canvas.h -@@ -23,6 +23,9 @@ - #define __MESON_CANVAS_H - - #define MESON_CANVAS_ID_OSD1 0x4e -+#define MESON_CANVAS_ID_VD1_0 0x60 -+#define MESON_CANVAS_ID_VD1_1 0x61 -+#define MESON_CANVAS_ID_VD1_2 0x62 - - /* Canvas configuration. */ - #define MESON_CANVAS_WRAP_NONE 0x00 -@@ -33,10 +36,16 @@ - #define MESON_CANVAS_BLKMODE_32x32 0x01 - #define MESON_CANVAS_BLKMODE_64x64 0x02 - -+#define MESON_CANVAS_ENDIAN_SWAP16 0x1 -+#define MESON_CANVAS_ENDIAN_SWAP32 0x3 -+#define MESON_CANVAS_ENDIAN_SWAP64 0x7 -+#define MESON_CANVAS_ENDIAN_SWAP128 0xf -+ - void meson_canvas_setup(struct meson_drm *priv, - uint32_t canvas_index, uint32_t addr, - uint32_t stride, uint32_t height, - unsigned int wrap, -- unsigned int blkmode); -+ unsigned int blkmode, -+ unsigned int endian); - - #endif /* __MESON_CANVAS_H */ -diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c -index 910b92def5d2..b292e9aedf52 100644 ---- a/drivers/gpu/drm/meson/meson_crtc.c -+++ b/drivers/gpu/drm/meson/meson_crtc.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -98,6 +99,10 @@ static void meson_crtc_atomic_enable(struct drm_crtc *crtc, - writel(crtc_state->mode.hdisplay, - priv->io_base + _REG(VPP_POSTBLEND_H_SIZE)); - -+ /* VD1 Preblend vertical start/end */ -+ writel(FIELD_PREP(GENMASK(11, 0), 2303), -+ priv->io_base + _REG(VPP_PREBLEND_VD1_V_START_END)); -+ - writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE, - priv->io_base + _REG(VPP_MISC)); - -@@ -116,11 +121,17 @@ static void meson_crtc_atomic_disable(struct drm_crtc *crtc, - - drm_crtc_vblank_off(crtc); - -+ DRM_DEBUG_DRIVER("\n"); -+ - priv->viu.osd1_enabled = false; - priv->viu.osd1_commit = false; - -+ priv->viu.vd1_enabled = false; -+ priv->viu.vd1_commit = false; -+ - /* Disable VPP Postblend */ -- writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0, -+ writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_VD1_POSTBLEND | -+ VPP_VD1_PREBLEND | VPP_POSTBLEND_ENABLE, 0, - priv->io_base + _REG(VPP_MISC)); - - if (crtc->state->event && !crtc->state->active) { -@@ -155,6 +166,7 @@ static void meson_crtc_atomic_flush(struct drm_crtc *crtc, - struct meson_drm *priv = meson_crtc->priv; - - priv->viu.osd1_commit = true; -+ priv->viu.vd1_commit = true; - } - - static const struct drm_crtc_helper_funcs meson_crtc_helper_funcs = { -@@ -208,7 +220,7 @@ void meson_crtc_irq(struct meson_drm *priv) - meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, - priv->viu.osd1_addr, priv->viu.osd1_stride, - priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, -- MESON_CANVAS_BLKMODE_LINEAR); -+ MESON_CANVAS_BLKMODE_LINEAR, 0); - - /* Enable OSD1 */ - writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, -@@ -217,6 +229,206 @@ void meson_crtc_irq(struct meson_drm *priv) - priv->viu.osd1_commit = false; - } - -+ /* Update the VD1 registers */ -+ if (priv->viu.vd1_enabled && priv->viu.vd1_commit) { -+ -+ switch (priv->viu.vd1_planes) { -+ case 3: -+ if (priv->canvas) -+ meson_canvas_config(priv->canvas, -+ priv->canvas_id_vd1_2, -+ priv->viu.vd1_addr2, -+ priv->viu.vd1_stride2, -+ priv->viu.vd1_height2, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ else -+ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_2, -+ priv->viu.vd1_addr2, -+ priv->viu.vd1_stride2, -+ priv->viu.vd1_height2, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ /* fallthrough */ -+ case 2: -+ if (priv->canvas) -+ meson_canvas_config(priv->canvas, -+ priv->canvas_id_vd1_1, -+ priv->viu.vd1_addr1, -+ priv->viu.vd1_stride1, -+ priv->viu.vd1_height1, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ else -+ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_1, -+ priv->viu.vd1_addr2, -+ priv->viu.vd1_stride2, -+ priv->viu.vd1_height2, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ /* fallthrough */ -+ case 1: -+ if (priv->canvas) -+ meson_canvas_config(priv->canvas, -+ priv->canvas_id_vd1_0, -+ priv->viu.vd1_addr0, -+ priv->viu.vd1_stride0, -+ priv->viu.vd1_height0, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ else -+ meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_0, -+ priv->viu.vd1_addr2, -+ priv->viu.vd1_stride2, -+ priv->viu.vd1_height2, -+ MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ }; -+ -+ writel_relaxed(priv->viu.vd1_if0_gen_reg, -+ priv->io_base + _REG(VD1_IF0_GEN_REG)); -+ writel_relaxed(priv->viu.vd1_if0_gen_reg, -+ priv->io_base + _REG(VD2_IF0_GEN_REG)); -+ writel_relaxed(priv->viu.vd1_if0_gen_reg2, -+ priv->io_base + _REG(VD1_IF0_GEN_REG2)); -+ writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, -+ priv->io_base + _REG(VIU_VD1_FMT_CTRL)); -+ writel_relaxed(priv->viu.viu_vd1_fmt_ctrl, -+ priv->io_base + _REG(VIU_VD2_FMT_CTRL)); -+ writel_relaxed(priv->viu.viu_vd1_fmt_w, -+ priv->io_base + _REG(VIU_VD1_FMT_W)); -+ writel_relaxed(priv->viu.viu_vd1_fmt_w, -+ priv->io_base + _REG(VIU_VD2_FMT_W)); -+ writel_relaxed(priv->viu.vd1_if0_canvas0, -+ priv->io_base + _REG(VD1_IF0_CANVAS0)); -+ writel_relaxed(priv->viu.vd1_if0_canvas0, -+ priv->io_base + _REG(VD1_IF0_CANVAS1)); -+ writel_relaxed(priv->viu.vd1_if0_canvas0, -+ priv->io_base + _REG(VD2_IF0_CANVAS0)); -+ writel_relaxed(priv->viu.vd1_if0_canvas0, -+ priv->io_base + _REG(VD2_IF0_CANVAS1)); -+ writel_relaxed(priv->viu.vd1_if0_luma_x0, -+ priv->io_base + _REG(VD1_IF0_LUMA_X0)); -+ writel_relaxed(priv->viu.vd1_if0_luma_x0, -+ priv->io_base + _REG(VD1_IF0_LUMA_X1)); -+ writel_relaxed(priv->viu.vd1_if0_luma_x0, -+ priv->io_base + _REG(VD2_IF0_LUMA_X0)); -+ writel_relaxed(priv->viu.vd1_if0_luma_x0, -+ priv->io_base + _REG(VD2_IF0_LUMA_X1)); -+ writel_relaxed(priv->viu.vd1_if0_luma_y0, -+ priv->io_base + _REG(VD1_IF0_LUMA_Y0)); -+ writel_relaxed(priv->viu.vd1_if0_luma_y0, -+ priv->io_base + _REG(VD1_IF0_LUMA_Y1)); -+ writel_relaxed(priv->viu.vd1_if0_luma_y0, -+ priv->io_base + _REG(VD2_IF0_LUMA_Y0)); -+ writel_relaxed(priv->viu.vd1_if0_luma_y0, -+ priv->io_base + _REG(VD2_IF0_LUMA_Y1)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_x0, -+ priv->io_base + _REG(VD1_IF0_CHROMA_X0)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_x0, -+ priv->io_base + _REG(VD1_IF0_CHROMA_X1)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_x0, -+ priv->io_base + _REG(VD2_IF0_CHROMA_X0)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_x0, -+ priv->io_base + _REG(VD2_IF0_CHROMA_X1)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_y0, -+ priv->io_base + _REG(VD1_IF0_CHROMA_Y0)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_y0, -+ priv->io_base + _REG(VD1_IF0_CHROMA_Y1)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_y0, -+ priv->io_base + _REG(VD2_IF0_CHROMA_Y0)); -+ writel_relaxed(priv->viu.vd1_if0_chroma_y0, -+ priv->io_base + _REG(VD2_IF0_CHROMA_Y1)); -+ writel_relaxed(priv->viu.vd1_if0_repeat_loop, -+ priv->io_base + _REG(VD1_IF0_RPT_LOOP)); -+ writel_relaxed(priv->viu.vd1_if0_repeat_loop, -+ priv->io_base + _REG(VD2_IF0_RPT_LOOP)); -+ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, -+ priv->io_base + _REG(VD1_IF0_LUMA0_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, -+ priv->io_base + _REG(VD2_IF0_LUMA0_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, -+ priv->io_base + _REG(VD1_IF0_LUMA1_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_luma0_rpt_pat, -+ priv->io_base + _REG(VD2_IF0_LUMA1_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, -+ priv->io_base + _REG(VD1_IF0_CHROMA0_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, -+ priv->io_base + _REG(VD2_IF0_CHROMA0_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, -+ priv->io_base + _REG(VD1_IF0_CHROMA1_RPT_PAT)); -+ writel_relaxed(priv->viu.vd1_if0_chroma0_rpt_pat, -+ priv->io_base + _REG(VD2_IF0_CHROMA1_RPT_PAT)); -+ writel_relaxed(0, priv->io_base + _REG(VD1_IF0_LUMA_PSEL)); -+ writel_relaxed(0, priv->io_base + _REG(VD1_IF0_CHROMA_PSEL)); -+ writel_relaxed(0, priv->io_base + _REG(VD2_IF0_LUMA_PSEL)); -+ writel_relaxed(0, priv->io_base + _REG(VD2_IF0_CHROMA_PSEL)); -+ writel_relaxed(priv->viu.vd1_range_map_y, -+ priv->io_base + _REG(VD1_IF0_RANGE_MAP_Y)); -+ writel_relaxed(priv->viu.vd1_range_map_cb, -+ priv->io_base + _REG(VD1_IF0_RANGE_MAP_CB)); -+ writel_relaxed(priv->viu.vd1_range_map_cr, -+ priv->io_base + _REG(VD1_IF0_RANGE_MAP_CR)); -+ writel_relaxed(0x78404, -+ priv->io_base + _REG(VPP_SC_MISC)); -+ writel_relaxed(priv->viu.vpp_pic_in_height, -+ priv->io_base + _REG(VPP_PIC_IN_HEIGHT)); -+ writel_relaxed(priv->viu.vpp_postblend_vd1_h_start_end, -+ priv->io_base + _REG(VPP_POSTBLEND_VD1_H_START_END)); -+ writel_relaxed(priv->viu.vpp_blend_vd2_h_start_end, -+ priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); -+ writel_relaxed(priv->viu.vpp_postblend_vd1_v_start_end, -+ priv->io_base + _REG(VPP_POSTBLEND_VD1_V_START_END)); -+ writel_relaxed(priv->viu.vpp_blend_vd2_v_start_end, -+ priv->io_base + _REG(VPP_BLEND_VD2_V_START_END)); -+ writel_relaxed(priv->viu.vpp_hsc_region12_startp, -+ priv->io_base + _REG(VPP_HSC_REGION12_STARTP)); -+ writel_relaxed(priv->viu.vpp_hsc_region34_startp, -+ priv->io_base + _REG(VPP_HSC_REGION34_STARTP)); -+ writel_relaxed(priv->viu.vpp_hsc_region4_endp, -+ priv->io_base + _REG(VPP_HSC_REGION4_ENDP)); -+ writel_relaxed(priv->viu.vpp_hsc_start_phase_step, -+ priv->io_base + _REG(VPP_HSC_START_PHASE_STEP)); -+ writel_relaxed(priv->viu.vpp_hsc_region1_phase_slope, -+ priv->io_base + _REG(VPP_HSC_REGION1_PHASE_SLOPE)); -+ writel_relaxed(priv->viu.vpp_hsc_region3_phase_slope, -+ priv->io_base + _REG(VPP_HSC_REGION3_PHASE_SLOPE)); -+ writel_relaxed(priv->viu.vpp_line_in_length, -+ priv->io_base + _REG(VPP_LINE_IN_LENGTH)); -+ writel_relaxed(priv->viu.vpp_preblend_h_size, -+ priv->io_base + _REG(VPP_PREBLEND_H_SIZE)); -+ writel_relaxed(priv->viu.vpp_vsc_region12_startp, -+ priv->io_base + _REG(VPP_VSC_REGION12_STARTP)); -+ writel_relaxed(priv->viu.vpp_vsc_region34_startp, -+ priv->io_base + _REG(VPP_VSC_REGION34_STARTP)); -+ writel_relaxed(priv->viu.vpp_vsc_region4_endp, -+ priv->io_base + _REG(VPP_VSC_REGION4_ENDP)); -+ writel_relaxed(priv->viu.vpp_vsc_start_phase_step, -+ priv->io_base + _REG(VPP_VSC_START_PHASE_STEP)); -+ writel_relaxed(priv->viu.vpp_vsc_ini_phase, -+ priv->io_base + _REG(VPP_VSC_INI_PHASE)); -+ writel_relaxed(priv->viu.vpp_vsc_phase_ctrl, -+ priv->io_base + _REG(VPP_VSC_PHASE_CTRL)); -+ writel_relaxed(priv->viu.vpp_hsc_phase_ctrl, -+ priv->io_base + _REG(VPP_HSC_PHASE_CTRL)); -+ writel_relaxed(0x42, priv->io_base + _REG(VPP_SCALE_COEF_IDX)); -+ -+ /* Enable VD1 */ -+ writel_bits_relaxed(VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND | -+ VPP_COLOR_MNG_ENABLE, -+ VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND | -+ VPP_COLOR_MNG_ENABLE, -+ priv->io_base + _REG(VPP_MISC)); -+ -+ priv->viu.vd1_commit = false; -+ } -+ - drm_crtc_handle_vblank(priv->crtc); - - spin_lock_irqsave(&priv->drm->event_lock, flags); -diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c -index 874c7a74a7c1..63bb2727b183 100644 ---- a/drivers/gpu/drm/meson/meson_drv.c -+++ b/drivers/gpu/drm/meson/meson_drv.c -@@ -41,6 +41,7 @@ - - #include "meson_drv.h" - #include "meson_plane.h" -+#include "meson_overlay.h" - #include "meson_crtc.h" - #include "meson_venc_cvbs.h" - -@@ -225,6 +226,24 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); - if (ret) - goto free_drm; -+ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); -+ if (ret) { -+ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); -+ goto free_drm; -+ } -+ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); -+ if (ret) { -+ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); -+ goto free_drm; -+ } -+ ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); -+ if (ret) { -+ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); -+ goto free_drm; -+ } - } else { - priv->canvas = NULL; - -@@ -286,6 +305,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - if (ret) - goto free_drm; - -+ ret = meson_overlay_create(priv); -+ if (ret) -+ goto free_drm; -+ - ret = meson_crtc_create(priv); - if (ret) - goto free_drm; -@@ -331,8 +354,12 @@ static void meson_drv_unbind(struct device *dev) - struct meson_drm *priv = dev_get_drvdata(dev); - struct drm_device *drm = priv->drm; - -- if (priv->canvas) -+ if (priv->canvas) { - meson_canvas_free(priv->canvas, priv->canvas_id_osd1); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); -+ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); -+ } - - drm_dev_unregister(drm); - drm_irq_uninstall(drm); -diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h -index 728d0ca33732..c971557d4a48 100644 ---- a/drivers/gpu/drm/meson/meson_drv.h -+++ b/drivers/gpu/drm/meson/meson_drv.h -@@ -34,11 +34,15 @@ struct meson_drm { - - struct meson_canvas *canvas; - u8 canvas_id_osd1; -+ u8 canvas_id_vd1_0; -+ u8 canvas_id_vd1_1; -+ u8 canvas_id_vd1_2; - - struct drm_device *drm; - struct drm_crtc *crtc; - struct drm_fbdev_cma *fbdev; - struct drm_plane *primary_plane; -+ struct drm_plane *overlay_plane; - - /* Components Data */ - struct { -@@ -50,6 +54,54 @@ struct meson_drm { - uint32_t osd1_addr; - uint32_t osd1_stride; - uint32_t osd1_height; -+ -+ bool vd1_enabled; -+ bool vd1_commit; -+ unsigned int vd1_planes; -+ uint32_t vd1_if0_gen_reg; -+ uint32_t vd1_if0_luma_x0; -+ uint32_t vd1_if0_luma_y0; -+ uint32_t vd1_if0_chroma_x0; -+ uint32_t vd1_if0_chroma_y0; -+ uint32_t vd1_if0_repeat_loop; -+ uint32_t vd1_if0_luma0_rpt_pat; -+ uint32_t vd1_if0_chroma0_rpt_pat; -+ uint32_t vd1_range_map_y; -+ uint32_t vd1_range_map_cb; -+ uint32_t vd1_range_map_cr; -+ uint32_t viu_vd1_fmt_w; -+ uint32_t vd1_if0_canvas0; -+ uint32_t vd1_if0_gen_reg2; -+ uint32_t viu_vd1_fmt_ctrl; -+ uint32_t vd1_addr0; -+ uint32_t vd1_addr1; -+ uint32_t vd1_addr2; -+ uint32_t vd1_stride0; -+ uint32_t vd1_stride1; -+ uint32_t vd1_stride2; -+ uint32_t vd1_height0; -+ uint32_t vd1_height1; -+ uint32_t vd1_height2; -+ uint32_t vpp_pic_in_height; -+ uint32_t vpp_postblend_vd1_h_start_end; -+ uint32_t vpp_postblend_vd1_v_start_end; -+ uint32_t vpp_hsc_region12_startp; -+ uint32_t vpp_hsc_region34_startp; -+ uint32_t vpp_hsc_region4_endp; -+ uint32_t vpp_hsc_start_phase_step; -+ uint32_t vpp_hsc_region1_phase_slope; -+ uint32_t vpp_hsc_region3_phase_slope; -+ uint32_t vpp_line_in_length; -+ uint32_t vpp_preblend_h_size; -+ uint32_t vpp_vsc_region12_startp; -+ uint32_t vpp_vsc_region34_startp; -+ uint32_t vpp_vsc_region4_endp; -+ uint32_t vpp_vsc_start_phase_step; -+ uint32_t vpp_vsc_ini_phase; -+ uint32_t vpp_vsc_phase_ctrl; -+ uint32_t vpp_hsc_phase_ctrl; -+ uint32_t vpp_blend_vd2_h_start_end; -+ uint32_t vpp_blend_vd2_v_start_end; - } viu; - - struct { -diff --git a/drivers/gpu/drm/meson/meson_overlay.c b/drivers/gpu/drm/meson/meson_overlay.c -new file mode 100644 -index 000000000000..9aebc5e4b418 ---- /dev/null -+++ b/drivers/gpu/drm/meson/meson_overlay.c -@@ -0,0 +1,586 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Neil Armstrong -+ * Copyright (C) 2015 Amlogic, Inc. All rights reserved. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "meson_overlay.h" -+#include "meson_vpp.h" -+#include "meson_viu.h" -+#include "meson_canvas.h" -+#include "meson_registers.h" -+ -+/* VD1_IF0_GEN_REG */ -+#define VD_URGENT_CHROMA BIT(28) -+#define VD_URGENT_LUMA BIT(27) -+#define VD_HOLD_LINES(lines) FIELD_PREP(GENMASK(24, 19), lines) -+#define VD_DEMUX_MODE_RGB BIT(16) -+#define VD_BYTES_PER_PIXEL(val) FIELD_PREP(GENMASK(15, 14), val) -+#define VD_CHRO_RPT_LASTL_CTRL BIT(6) -+#define VD_LITTLE_ENDIAN BIT(4) -+#define VD_SEPARATE_EN BIT(1) -+#define VD_ENABLE BIT(0) -+ -+/* VD1_IF0_CANVAS0 */ -+#define CANVAS_ADDR2(addr) FIELD_PREP(GENMASK(23, 16), addr) -+#define CANVAS_ADDR1(addr) FIELD_PREP(GENMASK(15, 8), addr) -+#define CANVAS_ADDR0(addr) FIELD_PREP(GENMASK(7, 0), addr) -+ -+/* VD1_IF0_LUMA_X0 VD1_IF0_CHROMA_X0 */ -+#define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value) -+#define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value) -+ -+/* VD1_IF0_LUMA_Y0 VD1_IF0_CHROMA_Y0 */ -+#define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value) -+#define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value) -+ -+/* VD1_IF0_GEN_REG2 */ -+#define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value) -+ -+/* VIU_VD1_FMT_CTRL */ -+#define VD_HORZ_Y_C_RATIO(value) FIELD_PREP(GENMASK(22, 21), value) -+#define VD_HORZ_FMT_EN BIT(20) -+#define VD_VERT_RPT_LINE0 BIT(16) -+#define VD_VERT_INITIAL_PHASE(value) FIELD_PREP(GENMASK(11, 8), value) -+#define VD_VERT_PHASE_STEP(value) FIELD_PREP(GENMASK(7, 1), value) -+#define VD_VERT_FMT_EN BIT(0) -+ -+/* VPP_POSTBLEND_VD1_H_START_END */ -+#define VD_H_END(value) FIELD_PREP(GENMASK(11, 0), value) -+#define VD_H_START(value) FIELD_PREP(GENMASK(27, 16), value) -+ -+/* VPP_POSTBLEND_VD1_V_START_END */ -+#define VD_V_END(value) FIELD_PREP(GENMASK(11, 0), value) -+#define VD_V_START(value) FIELD_PREP(GENMASK(27, 16), value) -+ -+/* VPP_BLEND_VD2_V_START_END */ -+#define VD2_V_END(value) FIELD_PREP(GENMASK(11, 0), value) -+#define VD2_V_START(value) FIELD_PREP(GENMASK(27, 16), value) -+ -+/* VIU_VD1_FMT_W */ -+#define VD_V_WIDTH(value) FIELD_PREP(GENMASK(11, 0), value) -+#define VD_H_WIDTH(value) FIELD_PREP(GENMASK(27, 16), value) -+ -+/* VPP_HSC_REGION12_STARTP VPP_HSC_REGION34_STARTP */ -+#define VD_REGION24_START(value) FIELD_PREP(GENMASK(11, 0), value) -+#define VD_REGION13_END(value) FIELD_PREP(GENMASK(27, 16), value) -+ -+struct meson_overlay { -+ struct drm_plane base; -+ struct meson_drm *priv; -+}; -+#define to_meson_overlay(x) container_of(x, struct meson_overlay, base) -+ -+#define FRAC_16_16(mult, div) (((mult) << 16) / (div)) -+ -+static int meson_overlay_atomic_check(struct drm_plane *plane, -+ struct drm_plane_state *state) -+{ -+ struct drm_crtc_state *crtc_state; -+ -+ if (!state->crtc) -+ return 0; -+ -+ crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); -+ if (IS_ERR(crtc_state)) -+ return PTR_ERR(crtc_state); -+ -+ return drm_atomic_helper_check_plane_state(state, crtc_state, -+ FRAC_16_16(1, 5), -+ FRAC_16_16(5, 1), -+ true, true); -+} -+ -+/* Takes a fixed 16.16 number and converts it to integer. */ -+static inline int64_t fixed16_to_int(int64_t value) -+{ -+ return value >> 16; -+} -+ -+static const uint8_t skip_tab[6] = { -+ 0x24, 0x04, 0x68, 0x48, 0x28, 0x08, -+}; -+ -+static void meson_overlay_get_vertical_phase(unsigned int ratio_y, int *phase, -+ int *repeat, bool interlace) -+{ -+ int offset_in = 0; -+ int offset_out = 0; -+ int repeat_skip = 0; -+ -+ if (!interlace && ratio_y > (1 << 18)) -+ offset_out = (1 * ratio_y) >> 10; -+ -+ while ((offset_in + (4 << 8)) <= offset_out) { -+ repeat_skip++; -+ offset_in += 4 << 8; -+ } -+ -+ *phase = (offset_out - offset_in) >> 2; -+ -+ if (*phase > 0x100) -+ repeat_skip++; -+ -+ *phase = *phase & 0xff; -+ -+ if (repeat_skip > 5) -+ repeat_skip = 5; -+ -+ *repeat = skip_tab[repeat_skip]; -+} -+ -+static void meson_overlay_setup_scaler_params(struct meson_drm *priv, -+ struct drm_plane *plane, -+ bool interlace_mode) -+{ -+ struct drm_crtc_state *crtc_state = priv->crtc->state; -+ int video_top, video_left, video_width, video_height; -+ struct drm_plane_state *state = plane->state; -+ unsigned int vd_start_lines, vd_end_lines; -+ unsigned int hd_start_lines, hd_end_lines; -+ unsigned int crtc_height, crtc_width; -+ unsigned int vsc_startp, vsc_endp; -+ unsigned int hsc_startp, hsc_endp; -+ unsigned int crop_top, crop_left; -+ int vphase, vphase_repeat_skip; -+ unsigned int ratio_x, ratio_y; -+ int temp_height, temp_width; -+ unsigned int w_in, h_in; -+ int temp, start, end; -+ -+ if (!crtc_state) { -+ DRM_ERROR("Invalid crtc_state\n"); -+ return; -+ } -+ -+ crtc_height = crtc_state->mode.vdisplay; -+ crtc_width = crtc_state->mode.hdisplay; -+ -+ w_in = fixed16_to_int(state->src_w); -+ h_in = fixed16_to_int(state->src_h); -+ crop_top = fixed16_to_int(state->src_x); -+ crop_left = fixed16_to_int(state->src_x); -+ -+ video_top = state->crtc_y; -+ video_left = state->crtc_x; -+ video_width = state->crtc_w; -+ video_height = state->crtc_h; -+ -+ DRM_DEBUG("crtc_width %d crtc_height %d interlace %d\n", -+ crtc_width, crtc_height, interlace_mode); -+ DRM_DEBUG("w_in %d h_in %d crop_top %d crop_left %d\n", -+ w_in, h_in, crop_top, crop_left); -+ DRM_DEBUG("video top %d left %d width %d height %d\n", -+ video_top, video_left, video_width, video_height); -+ -+ ratio_x = (w_in << 18) / video_width; -+ ratio_y = (h_in << 18) / video_height; -+ -+ if (ratio_x * video_width < (w_in << 18)) -+ ratio_x++; -+ -+ DRM_DEBUG("ratio x 0x%x y 0x%x\n", ratio_x, ratio_y); -+ -+ meson_overlay_get_vertical_phase(ratio_y, &vphase, &vphase_repeat_skip, -+ interlace_mode); -+ -+ DRM_DEBUG("vphase 0x%x skip %d\n", vphase, vphase_repeat_skip); -+ -+ /* Vertical */ -+ -+ start = video_top + video_height / 2 - ((h_in << 17) / ratio_y); -+ end = (h_in << 18) / ratio_y + start - 1; -+ -+ if (video_top < 0 && start < 0) -+ vd_start_lines = (-(start) * ratio_y) >> 18; -+ else if (start < video_top) -+ vd_start_lines = ((video_top - start) * ratio_y) >> 18; -+ else -+ vd_start_lines = 0; -+ -+ if (video_top < 0) -+ temp_height = min_t(unsigned int, -+ video_top + video_height - 1, -+ crtc_height - 1); -+ else -+ temp_height = min_t(unsigned int, -+ video_top + video_height - 1, -+ crtc_height - 1) - video_top + 1; -+ -+ temp = vd_start_lines + (temp_height * ratio_y >> 18); -+ vd_end_lines = (temp <= (h_in - 1)) ? temp : (h_in - 1); -+ -+ vd_start_lines += crop_left; -+ vd_end_lines += crop_left; -+ -+ /* -+ * TOFIX: Input frames are handled and scaled like progressive frames, -+ * proper handling of interlaced field input frames need to be figured -+ * out using the proper framebuffer flags set by userspace. -+ */ -+ if (interlace_mode) { -+ start >>= 1; -+ end >>= 1; -+ } -+ -+ vsc_startp = max_t(int, start, -+ max_t(int, 0, video_top)); -+ vsc_endp = min_t(int, end, -+ min_t(int, crtc_height - 1, -+ video_top + video_height - 1)); -+ -+ DRM_DEBUG("vsc startp %d endp %d start_lines %d end_lines %d\n", -+ vsc_startp, vsc_endp, vd_start_lines, vd_end_lines); -+ -+ /* Horizontal */ -+ -+ start = video_left + video_width / 2 - ((w_in << 17) / ratio_x); -+ end = (w_in << 18) / ratio_x + start - 1; -+ -+ if (video_left < 0 && start < 0) -+ hd_start_lines = (-(start) * ratio_x) >> 18; -+ else if (start < video_left) -+ hd_start_lines = ((video_left - start) * ratio_x) >> 18; -+ else -+ hd_start_lines = 0; -+ -+ if (video_left < 0) -+ temp_width = min_t(unsigned int, -+ video_left + video_width - 1, -+ crtc_width - 1); -+ else -+ temp_width = min_t(unsigned int, -+ video_left + video_width - 1, -+ crtc_width - 1) - video_left + 1; -+ -+ temp = hd_start_lines + (temp_width * ratio_x >> 18); -+ hd_end_lines = (temp <= (w_in - 1)) ? temp : (w_in - 1); -+ -+ priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1; -+ hsc_startp = max_t(int, start, max_t(int, 0, video_left)); -+ hsc_endp = min_t(int, end, min_t(int, crtc_width - 1, -+ video_left + video_width - 1)); -+ -+ hd_start_lines += crop_top; -+ hd_end_lines += crop_top; -+ -+ DRM_DEBUG("hsc startp %d endp %d start_lines %d end_lines %d\n", -+ hsc_startp, hsc_endp, hd_start_lines, hd_end_lines); -+ -+ priv->viu.vpp_vsc_start_phase_step = ratio_y << 6; -+ -+ priv->viu.vpp_vsc_ini_phase = vphase << 8; -+ priv->viu.vpp_vsc_phase_ctrl = (1 << 13) | (4 << 8) | -+ vphase_repeat_skip; -+ -+ priv->viu.vd1_if0_luma_x0 = VD_X_START(hd_start_lines) | -+ VD_X_END(hd_end_lines); -+ priv->viu.vd1_if0_chroma_x0 = VD_X_START(hd_start_lines >> 1) | -+ VD_X_END(hd_end_lines >> 1); -+ -+ priv->viu.viu_vd1_fmt_w = -+ VD_H_WIDTH(hd_end_lines - hd_start_lines + 1) | -+ VD_V_WIDTH(hd_end_lines/2 - hd_start_lines/2 + 1); -+ -+ priv->viu.vd1_if0_luma_y0 = VD_Y_START(vd_start_lines) | -+ VD_Y_END(vd_end_lines); -+ -+ priv->viu.vd1_if0_chroma_y0 = VD_Y_START(vd_start_lines >> 1) | -+ VD_Y_END(vd_end_lines >> 1); -+ -+ priv->viu.vpp_pic_in_height = h_in; -+ -+ priv->viu.vpp_postblend_vd1_h_start_end = VD_H_START(hsc_startp) | -+ VD_H_END(hsc_endp); -+ priv->viu.vpp_blend_vd2_h_start_end = VD_H_START(hd_start_lines) | -+ VD_H_END(hd_end_lines); -+ priv->viu.vpp_hsc_region12_startp = VD_REGION13_END(0) | -+ VD_REGION24_START(hsc_startp); -+ priv->viu.vpp_hsc_region34_startp = -+ VD_REGION13_END(hsc_startp) | -+ VD_REGION24_START(hsc_endp - hsc_startp); -+ priv->viu.vpp_hsc_region4_endp = hsc_endp - hsc_startp; -+ priv->viu.vpp_hsc_start_phase_step = ratio_x << 6; -+ priv->viu.vpp_hsc_region1_phase_slope = 0; -+ priv->viu.vpp_hsc_region3_phase_slope = 0; -+ priv->viu.vpp_hsc_phase_ctrl = (1 << 21) | (4 << 16); -+ -+ priv->viu.vpp_line_in_length = hd_end_lines - hd_start_lines + 1; -+ priv->viu.vpp_preblend_h_size = hd_end_lines - hd_start_lines + 1; -+ -+ priv->viu.vpp_postblend_vd1_v_start_end = VD_V_START(vsc_startp) | -+ VD_V_END(vsc_endp); -+ priv->viu.vpp_blend_vd2_v_start_end = -+ VD2_V_START((vd_end_lines + 1) >> 1) | -+ VD2_V_END(vd_end_lines); -+ -+ priv->viu.vpp_vsc_region12_startp = 0; -+ priv->viu.vpp_vsc_region34_startp = -+ VD_REGION13_END(vsc_endp - vsc_startp) | -+ VD_REGION24_START(vsc_endp - vsc_startp); -+ priv->viu.vpp_vsc_region4_endp = vsc_endp - vsc_startp; -+ priv->viu.vpp_vsc_start_phase_step = ratio_y << 6; -+} -+ -+static void meson_overlay_atomic_update(struct drm_plane *plane, -+ struct drm_plane_state *old_state) -+{ -+ struct meson_overlay *meson_overlay = to_meson_overlay(plane); -+ struct drm_plane_state *state = plane->state; -+ struct drm_framebuffer *fb = state->fb; -+ struct meson_drm *priv = meson_overlay->priv; -+ struct drm_gem_cma_object *gem; -+ unsigned long flags; -+ bool interlace_mode; -+ -+ DRM_DEBUG_DRIVER("\n"); -+ -+ /* Fallback is canvas provider is not available */ -+ if (!priv->canvas) { -+ priv->canvas_id_vd1_0 = MESON_CANVAS_ID_VD1_0; -+ priv->canvas_id_vd1_1 = MESON_CANVAS_ID_VD1_1; -+ priv->canvas_id_vd1_2 = MESON_CANVAS_ID_VD1_2; -+ } -+ -+ interlace_mode = state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE; -+ -+ spin_lock_irqsave(&priv->drm->event_lock, flags); -+ -+ priv->viu.vd1_if0_gen_reg = VD_URGENT_CHROMA | -+ VD_URGENT_LUMA | -+ VD_HOLD_LINES(9) | -+ VD_CHRO_RPT_LASTL_CTRL | -+ VD_ENABLE; -+ -+ /* Setup scaler params */ -+ meson_overlay_setup_scaler_params(priv, plane, interlace_mode); -+ -+ priv->viu.vd1_if0_repeat_loop = 0; -+ priv->viu.vd1_if0_luma0_rpt_pat = interlace_mode ? 8 : 0; -+ priv->viu.vd1_if0_chroma0_rpt_pat = interlace_mode ? 8 : 0; -+ priv->viu.vd1_range_map_y = 0; -+ priv->viu.vd1_range_map_cb = 0; -+ priv->viu.vd1_range_map_cr = 0; -+ -+ /* Default values for RGB888/YUV444 */ -+ priv->viu.vd1_if0_gen_reg2 = 0; -+ priv->viu.viu_vd1_fmt_ctrl = 0; -+ -+ switch (fb->format->format) { -+ /* TOFIX DRM_FORMAT_RGB888 should be supported */ -+ case DRM_FORMAT_YUYV: -+ priv->viu.vd1_if0_gen_reg |= VD_BYTES_PER_PIXEL(1); -+ priv->viu.vd1_if0_canvas0 = -+ CANVAS_ADDR2(priv->canvas_id_vd1_0) | -+ CANVAS_ADDR1(priv->canvas_id_vd1_0) | -+ CANVAS_ADDR0(priv->canvas_id_vd1_0); -+ priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(16) | /* /2 */ -+ VD_VERT_FMT_EN; -+ break; -+ case DRM_FORMAT_NV12: -+ case DRM_FORMAT_NV21: -+ priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN; -+ priv->viu.vd1_if0_canvas0 = -+ CANVAS_ADDR2(priv->canvas_id_vd1_1) | -+ CANVAS_ADDR1(priv->canvas_id_vd1_1) | -+ CANVAS_ADDR0(priv->canvas_id_vd1_0); -+ if (fb->format->format == DRM_FORMAT_NV12) -+ priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(1); -+ else -+ priv->viu.vd1_if0_gen_reg2 = VD_COLOR_MAP(2); -+ priv->viu.viu_vd1_fmt_ctrl = VD_HORZ_Y_C_RATIO(1) | /* /2 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(8) | /* /4 */ -+ VD_VERT_FMT_EN; -+ break; -+ case DRM_FORMAT_YUV444: -+ case DRM_FORMAT_YUV422: -+ case DRM_FORMAT_YUV420: -+ case DRM_FORMAT_YUV411: -+ case DRM_FORMAT_YUV410: -+ priv->viu.vd1_if0_gen_reg |= VD_SEPARATE_EN; -+ priv->viu.vd1_if0_canvas0 = -+ CANVAS_ADDR2(priv->canvas_id_vd1_2) | -+ CANVAS_ADDR1(priv->canvas_id_vd1_1) | -+ CANVAS_ADDR0(priv->canvas_id_vd1_0); -+ switch (fb->format->format) { -+ case DRM_FORMAT_YUV422: -+ priv->viu.viu_vd1_fmt_ctrl = -+ VD_HORZ_Y_C_RATIO(1) | /* /2 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(16) | /* /2 */ -+ VD_VERT_FMT_EN; -+ break; -+ case DRM_FORMAT_YUV420: -+ priv->viu.viu_vd1_fmt_ctrl = -+ VD_HORZ_Y_C_RATIO(1) | /* /2 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(8) | /* /4 */ -+ VD_VERT_FMT_EN; -+ break; -+ case DRM_FORMAT_YUV411: -+ priv->viu.viu_vd1_fmt_ctrl = -+ VD_HORZ_Y_C_RATIO(2) | /* /4 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(16) | /* /2 */ -+ VD_VERT_FMT_EN; -+ break; -+ case DRM_FORMAT_YUV410: -+ priv->viu.viu_vd1_fmt_ctrl = -+ VD_HORZ_Y_C_RATIO(2) | /* /4 */ -+ VD_HORZ_FMT_EN | -+ VD_VERT_RPT_LINE0 | -+ VD_VERT_INITIAL_PHASE(12) | -+ VD_VERT_PHASE_STEP(8) | /* /4 */ -+ VD_VERT_FMT_EN; -+ break; -+ } -+ break; -+ } -+ -+ /* Update Canvas with buffer address */ -+ priv->viu.vd1_planes = drm_format_num_planes(fb->format->format); -+ -+ switch (priv->viu.vd1_planes) { -+ case 3: -+ gem = drm_fb_cma_get_gem_obj(fb, 2); -+ priv->viu.vd1_addr2 = gem->paddr + fb->offsets[2]; -+ priv->viu.vd1_stride2 = fb->pitches[2]; -+ priv->viu.vd1_height2 = -+ drm_format_plane_height(fb->height, -+ fb->format->format, 2); -+ DRM_DEBUG("plane 2 addr 0x%x stride %d height %d\n", -+ priv->viu.vd1_addr2, -+ priv->viu.vd1_stride2, -+ priv->viu.vd1_height2); -+ /* fallthrough */ -+ case 2: -+ gem = drm_fb_cma_get_gem_obj(fb, 1); -+ priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1]; -+ priv->viu.vd1_stride1 = fb->pitches[1]; -+ priv->viu.vd1_height1 = -+ drm_format_plane_height(fb->height, -+ fb->format->format, 1); -+ DRM_DEBUG("plane 1 addr 0x%x stride %d height %d\n", -+ priv->viu.vd1_addr1, -+ priv->viu.vd1_stride1, -+ priv->viu.vd1_height1); -+ /* fallthrough */ -+ case 1: -+ gem = drm_fb_cma_get_gem_obj(fb, 0); -+ priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0]; -+ priv->viu.vd1_stride0 = fb->pitches[0]; -+ priv->viu.vd1_height0 = -+ drm_format_plane_height(fb->height, -+ fb->format->format, 0); -+ DRM_DEBUG("plane 0 addr 0x%x stride %d height %d\n", -+ priv->viu.vd1_addr0, -+ priv->viu.vd1_stride0, -+ priv->viu.vd1_height0); -+ } -+ -+ priv->viu.vd1_enabled = true; -+ -+ spin_unlock_irqrestore(&priv->drm->event_lock, flags); -+ -+ DRM_DEBUG_DRIVER("\n"); -+} -+ -+static void meson_overlay_atomic_disable(struct drm_plane *plane, -+ struct drm_plane_state *old_state) -+{ -+ struct meson_overlay *meson_overlay = to_meson_overlay(plane); -+ struct meson_drm *priv = meson_overlay->priv; -+ -+ DRM_DEBUG_DRIVER("\n"); -+ -+ priv->viu.vd1_enabled = false; -+ -+ /* Disable VD1 */ -+ writel_bits_relaxed(VPP_VD1_POSTBLEND | VPP_VD1_PREBLEND, 0, -+ priv->io_base + _REG(VPP_MISC)); -+ -+} -+ -+static const struct drm_plane_helper_funcs meson_overlay_helper_funcs = { -+ .atomic_check = meson_overlay_atomic_check, -+ .atomic_disable = meson_overlay_atomic_disable, -+ .atomic_update = meson_overlay_atomic_update, -+}; -+ -+static const struct drm_plane_funcs meson_overlay_funcs = { -+ .update_plane = drm_atomic_helper_update_plane, -+ .disable_plane = drm_atomic_helper_disable_plane, -+ .destroy = drm_plane_cleanup, -+ .reset = drm_atomic_helper_plane_reset, -+ .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, -+}; -+ -+static const uint32_t supported_drm_formats[] = { -+ DRM_FORMAT_YUYV, -+ DRM_FORMAT_NV12, -+ DRM_FORMAT_NV21, -+ DRM_FORMAT_YUV444, -+ DRM_FORMAT_YUV422, -+ DRM_FORMAT_YUV420, -+ DRM_FORMAT_YUV411, -+ DRM_FORMAT_YUV410, -+}; -+ -+int meson_overlay_create(struct meson_drm *priv) -+{ -+ struct meson_overlay *meson_overlay; -+ struct drm_plane *plane; -+ -+ DRM_DEBUG_DRIVER("\n"); -+ -+ meson_overlay = devm_kzalloc(priv->drm->dev, sizeof(*meson_overlay), -+ GFP_KERNEL); -+ if (!meson_overlay) -+ return -ENOMEM; -+ -+ meson_overlay->priv = priv; -+ plane = &meson_overlay->base; -+ -+ drm_universal_plane_init(priv->drm, plane, 0xFF, -+ &meson_overlay_funcs, -+ supported_drm_formats, -+ ARRAY_SIZE(supported_drm_formats), -+ NULL, -+ DRM_PLANE_TYPE_OVERLAY, "meson_overlay_plane"); -+ -+ drm_plane_helper_add(plane, &meson_overlay_helper_funcs); -+ -+ priv->overlay_plane = plane; -+ -+ DRM_DEBUG_DRIVER("\n"); -+ -+ return 0; -+} -diff --git a/drivers/gpu/drm/meson/meson_overlay.h b/drivers/gpu/drm/meson/meson_overlay.h -new file mode 100644 -index 000000000000..dae24f5ac63d ---- /dev/null -+++ b/drivers/gpu/drm/meson/meson_overlay.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Neil Armstrong -+ */ -+ -+#ifndef __MESON_OVERLAY_H -+#define __MESON_OVERLAY_H -+ -+#include "meson_drv.h" -+ -+int meson_overlay_create(struct meson_drm *priv); -+ -+#endif /* __MESON_OVERLAY_H */ -diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h -index bca87143e548..5c7e02c703bc 100644 ---- a/drivers/gpu/drm/meson/meson_registers.h -+++ b/drivers/gpu/drm/meson/meson_registers.h -@@ -286,6 +286,7 @@ - #define VIU_OSD1_MATRIX_COEF22_30 0x1a9d - #define VIU_OSD1_MATRIX_COEF31_32 0x1a9e - #define VIU_OSD1_MATRIX_COEF40_41 0x1a9f -+#define VD1_IF0_GEN_REG3 0x1aa7 - #define VIU_OSD1_EOTF_CTL 0x1ad4 - #define VIU_OSD1_EOTF_COEF00_01 0x1ad5 - #define VIU_OSD1_EOTF_COEF02_10 0x1ad6 -@@ -297,6 +298,7 @@ - #define VIU_OSD1_OETF_CTL 0x1adc - #define VIU_OSD1_OETF_LUT_ADDR_PORT 0x1add - #define VIU_OSD1_OETF_LUT_DATA_PORT 0x1ade -+#define AFBC_ENABLE 0x1ae0 - - /* vpp */ - #define VPP_DUMMY_DATA 0x1d00 -@@ -349,6 +351,7 @@ - #define VPP_VD2_PREBLEND BIT(15) - #define VPP_OSD1_PREBLEND BIT(16) - #define VPP_OSD2_PREBLEND BIT(17) -+#define VPP_COLOR_MNG_ENABLE BIT(28) - #define VPP_OFIFO_SIZE 0x1d27 - #define VPP_FIFO_STATUS 0x1d28 - #define VPP_SMOKE_CTRL 0x1d29 -diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c -index 26a0857878bf..90d9ae3c2b81 100644 ---- a/drivers/gpu/drm/meson/meson_viu.c -+++ b/drivers/gpu/drm/meson/meson_viu.c -@@ -329,6 +329,21 @@ void meson_viu_init(struct meson_drm *priv) - 0xff << OSD_REPLACE_SHIFT, - priv->io_base + _REG(VIU_OSD2_CTRL_STAT2)); - -+ /* Disable VD1 AFBC */ -+ /* di_mif0_en=0 mif0_to_vpp_en=0 di_mad_en=0 */ -+ writel_bits_relaxed(0x7 << 16, 0, -+ priv->io_base + _REG(VIU_MISC_CTRL0)); -+ /* afbc vd1 set=0 */ -+ writel_bits_relaxed(BIT(20), 0, -+ priv->io_base + _REG(VIU_MISC_CTRL0)); -+ writel_relaxed(0, priv->io_base + _REG(AFBC_ENABLE)); -+ -+ writel_relaxed(0x00FF00C0, -+ priv->io_base + _REG(VD1_IF0_LUMA_FIFO_SIZE)); -+ writel_relaxed(0x00FF00C0, -+ priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE)); -+ -+ - priv->viu.osd1_enabled = false; - priv->viu.osd1_commit = false; - priv->viu.osd1_interlace = false; -diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c -index 27356f81a0ab..5dc24a99e978 100644 ---- a/drivers/gpu/drm/meson/meson_vpp.c -+++ b/drivers/gpu/drm/meson/meson_vpp.c -@@ -122,6 +122,31 @@ static void meson_vpp_write_scaling_filter_coefs(struct meson_drm *priv, - priv->io_base + _REG(VPP_OSD_SCALE_COEF)); - } - -+static const uint32_t vpp_filter_coefs_bicubic[] = { -+ 0x00800000, 0x007f0100, 0xff7f0200, 0xfe7f0300, -+ 0xfd7e0500, 0xfc7e0600, 0xfb7d0800, 0xfb7c0900, -+ 0xfa7b0b00, 0xfa7a0dff, 0xf9790fff, 0xf97711ff, -+ 0xf87613ff, 0xf87416fe, 0xf87218fe, 0xf8701afe, -+ 0xf76f1dfd, 0xf76d1ffd, 0xf76b21fd, 0xf76824fd, -+ 0xf76627fc, 0xf76429fc, 0xf7612cfc, 0xf75f2ffb, -+ 0xf75d31fb, 0xf75a34fb, 0xf75837fa, 0xf7553afa, -+ 0xf8523cfa, 0xf8503ff9, 0xf84d42f9, 0xf84a45f9, -+ 0xf84848f8 -+}; -+ -+static void meson_vpp_write_vd_scaling_filter_coefs(struct meson_drm *priv, -+ const unsigned int *coefs, -+ bool is_horizontal) -+{ -+ int i; -+ -+ writel_relaxed(is_horizontal ? BIT(8) : 0, -+ priv->io_base + _REG(VPP_SCALE_COEF_IDX)); -+ for (i = 0; i < 33; i++) -+ writel_relaxed(coefs[i], -+ priv->io_base + _REG(VPP_SCALE_COEF)); -+} -+ - void meson_vpp_init(struct meson_drm *priv) - { - /* set dummy data default YUV black */ -@@ -150,17 +175,34 @@ void meson_vpp_init(struct meson_drm *priv) - - /* Force all planes off */ - writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND | -- VPP_VD1_POSTBLEND | VPP_VD2_POSTBLEND, 0, -+ VPP_VD1_POSTBLEND | VPP_VD2_POSTBLEND | -+ VPP_VD1_PREBLEND | VPP_VD2_PREBLEND, 0, - priv->io_base + _REG(VPP_MISC)); - -+ /* Setup default VD settings */ -+ writel_relaxed(4096, -+ priv->io_base + _REG(VPP_PREBLEND_VD1_H_START_END)); -+ writel_relaxed(4096, -+ priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); -+ - /* Disable Scalers */ - writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); - writel_relaxed(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); - writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); -+ writel_relaxed(4 | (4 << 8) | BIT(15), -+ priv->io_base + _REG(VPP_SC_MISC)); -+ -+ writel_relaxed(1, priv->io_base + _REG(VPP_VADJ_CTRL)); - - /* Write in the proper filter coefficients. */ - meson_vpp_write_scaling_filter_coefs(priv, - vpp_filter_coefs_4point_bspline, false); - meson_vpp_write_scaling_filter_coefs(priv, - vpp_filter_coefs_4point_bspline, true); -+ -+ /* Write the VD proper filter coefficients. */ -+ meson_vpp_write_vd_scaling_filter_coefs(priv, vpp_filter_coefs_bicubic, -+ false); -+ meson_vpp_write_vd_scaling_filter_coefs(priv, vpp_filter_coefs_bicubic, -+ true); - } --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch b/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch deleted file mode 100644 index 6c2736092..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0021-drm-meson-move-OSD-scaler-management-into-plane-atom.patch +++ /dev/null @@ -1,200 +0,0 @@ -From 1d7b86b1151ec8ad46c689138977c57053c99608 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Mon, 29 Oct 2018 17:04:05 +0100 -Subject: [PATCH 21/53] drm/meson: move OSD scaler management into plane atomic - update - -In preparation to support the Primary Plane scaling, move the basic -OSD Interlace-Only scaler setup code into the primary plane atomic -update callback and handle the vsync scaler update like the overlay -plane scaling registers update. ---- - drivers/gpu/drm/meson/meson_crtc.c | 35 ++++++++++++---------- - drivers/gpu/drm/meson/meson_drv.h | 10 +++++++ - drivers/gpu/drm/meson/meson_plane.c | 39 +++++++++++++++++++++++- - drivers/gpu/drm/meson/meson_vpp.c | 46 ----------------------------- - 4 files changed, 68 insertions(+), 62 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c -index b292e9aedf52..23df4abd95c9 100644 ---- a/drivers/gpu/drm/meson/meson_crtc.c -+++ b/drivers/gpu/drm/meson/meson_crtc.c -@@ -195,21 +195,26 @@ void meson_crtc_irq(struct meson_drm *priv) - priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W3)); - writel_relaxed(priv->viu.osd1_blk0_cfg[4], - priv->io_base + _REG(VIU_OSD1_BLK0_CFG_W4)); -- -- /* If output is interlace, make use of the Scaler */ -- if (priv->viu.osd1_interlace) { -- struct drm_plane *plane = priv->primary_plane; -- struct drm_plane_state *state = plane->state; -- struct drm_rect dest = { -- .x1 = state->crtc_x, -- .y1 = state->crtc_y, -- .x2 = state->crtc_x + state->crtc_w, -- .y2 = state->crtc_y + state->crtc_h, -- }; -- -- meson_vpp_setup_interlace_vscaler_osd1(priv, &dest); -- } else -- meson_vpp_disable_interlace_vscaler_osd1(priv); -+ writel_relaxed(priv->viu.osd_sc_ctrl0, -+ priv->io_base + _REG(VPP_OSD_SC_CTRL0)); -+ writel_relaxed(priv->viu.osd_sc_i_wh_m1, -+ priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); -+ writel_relaxed(priv->viu.osd_sc_o_h_start_end, -+ priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); -+ writel_relaxed(priv->viu.osd_sc_o_v_start_end, -+ priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); -+ writel_relaxed(priv->viu.osd_sc_v_ini_phase, -+ priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); -+ writel_relaxed(priv->viu.osd_sc_v_phase_step, -+ priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); -+ writel_relaxed(priv->viu.osd_sc_h_ini_phase, -+ priv->io_base + _REG(VPP_OSD_HSC_INI_PHASE)); -+ writel_relaxed(priv->viu.osd_sc_h_phase_step, -+ priv->io_base + _REG(VPP_OSD_HSC_PHASE_STEP)); -+ writel_relaxed(priv->viu.osd_sc_h_ctrl0, -+ priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); -+ writel_relaxed(priv->viu.osd_sc_v_ctrl0, -+ priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); - - if (priv->canvas) - meson_canvas_config(priv->canvas, priv->canvas_id_osd1, -diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h -index c971557d4a48..a955354711ce 100644 ---- a/drivers/gpu/drm/meson/meson_drv.h -+++ b/drivers/gpu/drm/meson/meson_drv.h -@@ -54,6 +54,16 @@ struct meson_drm { - uint32_t osd1_addr; - uint32_t osd1_stride; - uint32_t osd1_height; -+ uint32_t osd_sc_ctrl0; -+ uint32_t osd_sc_i_wh_m1; -+ uint32_t osd_sc_o_h_start_end; -+ uint32_t osd_sc_o_v_start_end; -+ uint32_t osd_sc_v_ini_phase; -+ uint32_t osd_sc_v_phase_step; -+ uint32_t osd_sc_h_ini_phase; -+ uint32_t osd_sc_h_phase_step; -+ uint32_t osd_sc_h_ctrl0; -+ uint32_t osd_sc_v_ctrl0; - - bool vd1_enabled; - bool vd1_commit; -diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c -index 51bec8e98a39..f915a79ae81c 100644 ---- a/drivers/gpu/drm/meson/meson_plane.c -+++ b/drivers/gpu/drm/meson/meson_plane.c -@@ -143,13 +143,50 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - break; - }; - -+ /* -+ * When the output is interlaced, the OSD must switch between -+ * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 -+ * at each vsync. -+ * But the vertical scaler can provide such funtionnality if -+ * is configured for 2:1 scaling with interlace options enabled. -+ */ - if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { - priv->viu.osd1_interlace = true; - - dest.y1 /= 2; - dest.y2 /= 2; -- } else -+ -+ priv->viu.osd_sc_ctrl0 = BIT(3)| /* Enable scaler */ -+ BIT(2); /* Select OSD1 */ -+ -+ /* 2:1 scaling */ -+ priv->viu.osd_sc_i_wh_m1 = ((drm_rect_width(&dest) - 1) << 16) | -+ (drm_rect_height(&dest) - 1); -+ priv->viu.osd_sc_o_h_start_end = (dest.x1 << 16) | dest.x2; -+ priv->viu.osd_sc_o_v_start_end = (dest.y1 << 16) | dest.y2; -+ -+ /* 2:1 vertical scaling values */ -+ priv->viu.osd_sc_v_ini_phase = BIT(16); -+ priv->viu.osd_sc_v_phase_step = BIT(25); -+ priv->viu.osd_sc_v_ctrl0 = -+ (4 << 0) | /* osd_vsc_bank_length */ -+ (4 << 3) | /* osd_vsc_top_ini_rcv_num0 */ -+ (1 << 8) | /* osd_vsc_top_rpt_p0_num0 */ -+ (6 << 11) | /* osd_vsc_bot_ini_rcv_num0 */ -+ (2 << 16) | /* osd_vsc_bot_rpt_p0_num0 */ -+ BIT(23) | /* osd_prog_interlace */ -+ BIT(24); /* Enable vertical scaler */ -+ -+ /* No horizontal scaling */ -+ priv->viu.osd_sc_h_ini_phase = 0; -+ priv->viu.osd_sc_h_phase_step = 0; -+ priv->viu.osd_sc_h_ctrl0 = 0; -+ } else { - priv->viu.osd1_interlace = false; -+ priv->viu.osd_sc_ctrl0 = 0; -+ priv->viu.osd_sc_h_ctrl0 = 0; -+ priv->viu.osd_sc_v_ctrl0 = 0; -+ } - - /* - * The format of these registers is (x2 << 16 | x1), -diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c -index 5dc24a99e978..f9efb431e953 100644 ---- a/drivers/gpu/drm/meson/meson_vpp.c -+++ b/drivers/gpu/drm/meson/meson_vpp.c -@@ -51,52 +51,6 @@ void meson_vpp_setup_mux(struct meson_drm *priv, unsigned int mux) - writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); - } - --/* -- * When the output is interlaced, the OSD must switch between -- * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 -- * at each vsync. -- * But the vertical scaler can provide such funtionnality if -- * is configured for 2:1 scaling with interlace options enabled. -- */ --void meson_vpp_setup_interlace_vscaler_osd1(struct meson_drm *priv, -- struct drm_rect *input) --{ -- writel_relaxed(BIT(3) /* Enable scaler */ | -- BIT(2), /* Select OSD1 */ -- priv->io_base + _REG(VPP_OSD_SC_CTRL0)); -- -- writel_relaxed(((drm_rect_width(input) - 1) << 16) | -- (drm_rect_height(input) - 1), -- priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); -- /* 2:1 scaling */ -- writel_relaxed(((input->x1) << 16) | (input->x2), -- priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); -- writel_relaxed(((input->y1 >> 1) << 16) | (input->y2 >> 1), -- priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); -- -- /* 2:1 scaling values */ -- writel_relaxed(BIT(16), priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); -- writel_relaxed(BIT(25), priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); -- -- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); -- -- writel_relaxed((4 << 0) /* osd_vsc_bank_length */ | -- (4 << 3) /* osd_vsc_top_ini_rcv_num0 */ | -- (1 << 8) /* osd_vsc_top_rpt_p0_num0 */ | -- (6 << 11) /* osd_vsc_bot_ini_rcv_num0 */ | -- (2 << 16) /* osd_vsc_bot_rpt_p0_num0 */ | -- BIT(23) /* osd_prog_interlace */ | -- BIT(24), /* Enable vertical scaler */ -- priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); --} -- --void meson_vpp_disable_interlace_vscaler_osd1(struct meson_drm *priv) --{ -- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); -- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); -- writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); --} -- - static unsigned int vpp_filter_coefs_4point_bspline[] = { - 0x15561500, 0x14561600, 0x13561700, 0x12561800, - 0x11551a00, 0x11541b00, 0x10541c00, 0x0f541d00, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch b/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch deleted file mode 100644 index abbd87949..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0022-drm-meson-Add-primary-plane-scaling.patch +++ /dev/null @@ -1,287 +0,0 @@ -From 166c3c3d19c030becc0c403cb638560d3165ff14 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Tue, 30 Oct 2018 14:29:10 +0100 -Subject: [PATCH 22/53] drm/meson: Add primary plane scaling - -This patch adds support for the Primary Plane scaling. - -On the Amlogic GX SoCs, the primary plane is used as On-Screen-Display -layer on top of video, and it's needed to keep the OSD layer to a lower -size as the physical display size to : -- lower the memory bandwidth -- lower the OSD rendering -- lower the memory usage - -This use-case is used when setting the display mode to 3840x2160 and the -OSD layer is rendered using the GPU. In this case, the GXBB & GXL cannot -work on more than 2000x2000 buffer, thus needing the OSD layer to be kept -at 1920x1080 and upscaled to 3840x2160 in hardware. - -The primary plane atomic check still allow 1:1 scaling, allowing native -3840x2160 if needed by user-space applications. ---- - drivers/gpu/drm/meson/meson_plane.c | 186 +++++++++++++++++++++------- - 1 file changed, 141 insertions(+), 45 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c -index f915a79ae81c..12a47b4f65a5 100644 ---- a/drivers/gpu/drm/meson/meson_plane.c -+++ b/drivers/gpu/drm/meson/meson_plane.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -39,12 +40,50 @@ - #include "meson_canvas.h" - #include "meson_registers.h" - -+/* OSD_SCI_WH_M1 */ -+#define SCI_WH_M1_W(w) FIELD_PREP(GENMASK(28, 16), w) -+#define SCI_WH_M1_H(h) FIELD_PREP(GENMASK(12, 0), h) -+ -+/* OSD_SCO_H_START_END */ -+/* OSD_SCO_V_START_END */ -+#define SCO_HV_START(start) FIELD_PREP(GENMASK(27, 16), start) -+#define SCO_HV_END(end) FIELD_PREP(GENMASK(11, 0), end) -+ -+/* OSD_SC_CTRL0 */ -+#define SC_CTRL0_PATH_EN BIT(3) -+#define SC_CTRL0_SEL_OSD1 BIT(2) -+ -+/* OSD_VSC_CTRL0 */ -+#define VSC_BANK_LEN(value) FIELD_PREP(GENMASK(2, 0), value) -+#define VSC_TOP_INI_RCV_NUM(value) FIELD_PREP(GENMASK(6, 3), value) -+#define VSC_TOP_RPT_L0_NUM(value) FIELD_PREP(GENMASK(9, 8), value) -+#define VSC_BOT_INI_RCV_NUM(value) FIELD_PREP(GENMASK(14, 11), value) -+#define VSC_BOT_RPT_L0_NUM(value) FIELD_PREP(GENMASK(17, 16), value) -+#define VSC_PROG_INTERLACE BIT(23) -+#define VSC_VERTICAL_SCALER_EN BIT(24) -+ -+/* OSD_VSC_INI_PHASE */ -+#define VSC_INI_PHASE_BOT(bottom) FIELD_PREP(GENMASK(31, 16), bottom) -+#define VSC_INI_PHASE_TOP(top) FIELD_PREP(GENMASK(15, 0), top) -+ -+/* OSD_HSC_CTRL0 */ -+#define HSC_BANK_LENGTH(value) FIELD_PREP(GENMASK(2, 0), value) -+#define HSC_INI_RCV_NUM0(value) FIELD_PREP(GENMASK(6, 3), value) -+#define HSC_RPT_P0_NUM0(value) FIELD_PREP(GENMASK(9, 8), value) -+#define HSC_HORIZ_SCALER_EN BIT(22) -+ -+/* VPP_OSD_VSC_PHASE_STEP */ -+/* VPP_OSD_HSC_PHASE_STEP */ -+#define SC_PHASE_STEP(value) FIELD_PREP(GENMASK(27, 0), value) -+ - struct meson_plane { - struct drm_plane base; - struct meson_drm *priv; - }; - #define to_meson_plane(x) container_of(x, struct meson_plane, base) - -+#define FRAC_16_16(mult, div) (((mult) << 16) / (div)) -+ - static int meson_plane_atomic_check(struct drm_plane *plane, - struct drm_plane_state *state) - { -@@ -57,10 +96,15 @@ static int meson_plane_atomic_check(struct drm_plane *plane, - if (IS_ERR(crtc_state)) - return PTR_ERR(crtc_state); - -+ /* -+ * Only allow : -+ * - Upscaling up to 5x, vertical and horizontal -+ * - Final coordinates must match crtc size -+ */ - return drm_atomic_helper_check_plane_state(state, crtc_state, -+ FRAC_16_16(1, 5), - DRM_PLANE_HELPER_NO_SCALING, -- DRM_PLANE_HELPER_NO_SCALING, -- true, true); -+ false, true); - } - - /* Takes a fixed 16.16 number and converts it to integer. */ -@@ -74,22 +118,19 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - { - struct meson_plane *meson_plane = to_meson_plane(plane); - struct drm_plane_state *state = plane->state; -- struct drm_framebuffer *fb = state->fb; -+ struct drm_rect dest = drm_plane_state_dest(state); - struct meson_drm *priv = meson_plane->priv; -+ struct drm_framebuffer *fb = state->fb; - struct drm_gem_cma_object *gem; -- struct drm_rect src = { -- .x1 = (state->src_x), -- .y1 = (state->src_y), -- .x2 = (state->src_x + state->src_w), -- .y2 = (state->src_y + state->src_h), -- }; -- struct drm_rect dest = { -- .x1 = state->crtc_x, -- .y1 = state->crtc_y, -- .x2 = state->crtc_x + state->crtc_w, -- .y2 = state->crtc_y + state->crtc_h, -- }; - unsigned long flags; -+ int vsc_ini_rcv_num, vsc_ini_rpt_p0_num; -+ int vsc_bot_rcv_num, vsc_bot_rpt_p0_num; -+ int hsc_ini_rcv_num, hsc_ini_rpt_p0_num; -+ int hf_phase_step, vf_phase_step; -+ int src_w, src_h, dst_w, dst_h; -+ int bot_ini_phase; -+ int hf_bank_len; -+ int vf_bank_len; - u8 canvas_id_osd1; - - /* -@@ -143,6 +184,27 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - break; - }; - -+ /* Default scaler parameters */ -+ vsc_bot_rcv_num = 0; -+ vsc_bot_rpt_p0_num = 0; -+ hf_bank_len = 4; -+ vf_bank_len = 4; -+ -+ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { -+ vsc_bot_rcv_num = 6; -+ vsc_bot_rpt_p0_num = 2; -+ } -+ -+ hsc_ini_rcv_num = hf_bank_len; -+ vsc_ini_rcv_num = vf_bank_len; -+ hsc_ini_rpt_p0_num = (hf_bank_len / 2) - 1; -+ vsc_ini_rpt_p0_num = (vf_bank_len / 2) - 1; -+ -+ src_w = fixed16_to_int(state->src_w); -+ src_h = fixed16_to_int(state->src_h); -+ dst_w = state->crtc_w; -+ dst_h = state->crtc_h; -+ - /* - * When the output is interlaced, the OSD must switch between - * each field using the INTERLACE_SEL_ODD (0) of VIU_OSD1_BLK0_CFG_W0 -@@ -151,41 +213,73 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - * is configured for 2:1 scaling with interlace options enabled. - */ - if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) { -- priv->viu.osd1_interlace = true; -- - dest.y1 /= 2; - dest.y2 /= 2; -+ dst_h /= 2; -+ } - -- priv->viu.osd_sc_ctrl0 = BIT(3)| /* Enable scaler */ -- BIT(2); /* Select OSD1 */ -+ hf_phase_step = ((src_w << 18) / dst_w) << 6; -+ vf_phase_step = (src_h << 20) / dst_h; - -- /* 2:1 scaling */ -- priv->viu.osd_sc_i_wh_m1 = ((drm_rect_width(&dest) - 1) << 16) | -- (drm_rect_height(&dest) - 1); -- priv->viu.osd_sc_o_h_start_end = (dest.x1 << 16) | dest.x2; -- priv->viu.osd_sc_o_v_start_end = (dest.y1 << 16) | dest.y2; -+ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) -+ bot_ini_phase = ((vf_phase_step / 2) >> 4); -+ else -+ bot_ini_phase = 0; -+ -+ vf_phase_step = (vf_phase_step << 4); -+ -+ /* In interlaced mode, scaler is always active */ -+ if (src_h != dst_h || src_w != dst_w) { -+ priv->viu.osd_sc_i_wh_m1 = SCI_WH_M1_W(src_w - 1) | -+ SCI_WH_M1_H(src_h - 1); -+ priv->viu.osd_sc_o_h_start_end = SCO_HV_START(dest.x1) | -+ SCO_HV_END(dest.x2 - 1); -+ priv->viu.osd_sc_o_v_start_end = SCO_HV_START(dest.y1) | -+ SCO_HV_END(dest.y2 - 1); -+ /* Enable OSD Scaler */ -+ priv->viu.osd_sc_ctrl0 = SC_CTRL0_PATH_EN | SC_CTRL0_SEL_OSD1; -+ } else { -+ priv->viu.osd_sc_i_wh_m1 = 0; -+ priv->viu.osd_sc_o_h_start_end = 0; -+ priv->viu.osd_sc_o_v_start_end = 0; -+ priv->viu.osd_sc_ctrl0 = 0; -+ } - -- /* 2:1 vertical scaling values */ -- priv->viu.osd_sc_v_ini_phase = BIT(16); -- priv->viu.osd_sc_v_phase_step = BIT(25); -+ /* In interlaced mode, vertical scaler is always active */ -+ if (src_h != dst_h) { - priv->viu.osd_sc_v_ctrl0 = -- (4 << 0) | /* osd_vsc_bank_length */ -- (4 << 3) | /* osd_vsc_top_ini_rcv_num0 */ -- (1 << 8) | /* osd_vsc_top_rpt_p0_num0 */ -- (6 << 11) | /* osd_vsc_bot_ini_rcv_num0 */ -- (2 << 16) | /* osd_vsc_bot_rpt_p0_num0 */ -- BIT(23) | /* osd_prog_interlace */ -- BIT(24); /* Enable vertical scaler */ -- -- /* No horizontal scaling */ -+ VSC_BANK_LEN(vf_bank_len) | -+ VSC_TOP_INI_RCV_NUM(vsc_ini_rcv_num) | -+ VSC_TOP_RPT_L0_NUM(vsc_ini_rpt_p0_num) | -+ VSC_VERTICAL_SCALER_EN; -+ -+ if (state->crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) -+ priv->viu.osd_sc_v_ctrl0 |= -+ VSC_BOT_INI_RCV_NUM(vsc_bot_rcv_num) | -+ VSC_BOT_RPT_L0_NUM(vsc_bot_rpt_p0_num) | -+ VSC_PROG_INTERLACE; -+ -+ priv->viu.osd_sc_v_phase_step = SC_PHASE_STEP(vf_phase_step); -+ priv->viu.osd_sc_v_ini_phase = VSC_INI_PHASE_BOT(bot_ini_phase); -+ } else { -+ priv->viu.osd_sc_v_ctrl0 = 0; -+ priv->viu.osd_sc_v_phase_step = 0; -+ priv->viu.osd_sc_v_ini_phase = 0; -+ } -+ -+ /* Horizontal scaler is only used if width does not match */ -+ if (src_w != dst_w) { -+ priv->viu.osd_sc_h_ctrl0 = -+ HSC_BANK_LENGTH(hf_bank_len) | -+ HSC_INI_RCV_NUM0(hsc_ini_rcv_num) | -+ HSC_RPT_P0_NUM0(hsc_ini_rpt_p0_num) | -+ HSC_HORIZ_SCALER_EN; -+ priv->viu.osd_sc_h_phase_step = SC_PHASE_STEP(hf_phase_step); - priv->viu.osd_sc_h_ini_phase = 0; -- priv->viu.osd_sc_h_phase_step = 0; -- priv->viu.osd_sc_h_ctrl0 = 0; - } else { -- priv->viu.osd1_interlace = false; -- priv->viu.osd_sc_ctrl0 = 0; - priv->viu.osd_sc_h_ctrl0 = 0; -- priv->viu.osd_sc_v_ctrl0 = 0; -+ priv->viu.osd_sc_h_phase_step = 0; -+ priv->viu.osd_sc_h_ini_phase = 0; - } - - /* -@@ -193,10 +287,12 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - * where x2 is exclusive. - * e.g. +30x1920 would be (1919 << 16) | 30 - */ -- priv->viu.osd1_blk0_cfg[1] = ((fixed16_to_int(src.x2) - 1) << 16) | -- fixed16_to_int(src.x1); -- priv->viu.osd1_blk0_cfg[2] = ((fixed16_to_int(src.y2) - 1) << 16) | -- fixed16_to_int(src.y1); -+ priv->viu.osd1_blk0_cfg[1] = -+ ((fixed16_to_int(state->src.x2) - 1) << 16) | -+ fixed16_to_int(state->src.x1); -+ priv->viu.osd1_blk0_cfg[2] = -+ ((fixed16_to_int(state->src.y2) - 1) << 16) | -+ fixed16_to_int(state->src.y1); - priv->viu.osd1_blk0_cfg[3] = ((dest.x2 - 1) << 16) | dest.x1; - priv->viu.osd1_blk0_cfg[4] = ((dest.y2 - 1) << 16) | dest.y1; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch b/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch deleted file mode 100644 index 6440a08d4..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0023-pinctrl-meson-gxl-remove-invalid-GPIOX-tsin_a-pins.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 47a84b0f881a1e52f95b4b31cf7ca01a88b469d4 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 7 Nov 2018 11:34:47 +0100 -Subject: [PATCH 23/53] pinctrl: meson-gxl: remove invalid GPIOX tsin_a pins - -The GPIOX tsin_a pins wrongly uses the SDCard pinctrl bits, this -patch completely removes these pins entries until we find out what -are the correct bits and registers to be used instead. - -Fixes: 5a6ae9b80139 ("pinctrl: meson-gxl: add tsin_a pins") ---- - drivers/pinctrl/meson/pinctrl-meson-gxl.c | 12 ++---------- - 1 file changed, 2 insertions(+), 10 deletions(-) - -diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c -index 158f618f1695..0c0a5018102b 100644 ---- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c -+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c -@@ -239,13 +239,9 @@ static const unsigned int eth_link_led_pins[] = { GPIOZ_14 }; - static const unsigned int eth_act_led_pins[] = { GPIOZ_15 }; - - static const unsigned int tsin_a_d0_pins[] = { GPIODV_0 }; --static const unsigned int tsin_a_d0_x_pins[] = { GPIOX_10 }; - static const unsigned int tsin_a_clk_pins[] = { GPIODV_8 }; --static const unsigned int tsin_a_clk_x_pins[] = { GPIOX_11 }; - static const unsigned int tsin_a_sop_pins[] = { GPIODV_9 }; --static const unsigned int tsin_a_sop_x_pins[] = { GPIOX_8 }; - static const unsigned int tsin_a_d_valid_pins[] = { GPIODV_10 }; --static const unsigned int tsin_a_d_valid_x_pins[] = { GPIOX_9 }; - static const unsigned int tsin_a_fail_pins[] = { GPIODV_11 }; - static const unsigned int tsin_a_dp_pins[] = { - GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7, -@@ -432,10 +428,6 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = { - GROUP(spi_miso, 5, 2), - GROUP(spi_ss0, 5, 1), - GROUP(spi_sclk, 5, 0), -- GROUP(tsin_a_sop_x, 6, 3), -- GROUP(tsin_a_d_valid_x, 6, 2), -- GROUP(tsin_a_d0_x, 6, 1), -- GROUP(tsin_a_clk_x, 6, 0), - - /* Bank Z */ - GROUP(eth_mdio, 4, 23), -@@ -698,8 +690,8 @@ static const char * const eth_led_groups[] = { - }; - - static const char * const tsin_a_groups[] = { -- "tsin_a_clk", "tsin_a_clk_x", "tsin_a_sop", "tsin_a_sop_x", -- "tsin_a_d_valid", "tsin_a_d_valid_x", "tsin_a_d0", "tsin_a_d0_x", -+ "tsin_a_clk", "tsin_a_sop", -+ "tsin_a_d_valid", "tsin_a_d0", - "tsin_a_dp", "tsin_a_fail", - }; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch b/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch deleted file mode 100644 index 8cacd82b9..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0024-arm64-dts-meson-gx-Add-hdmi_5v-regulator-as-hdmi-tx-.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 0e580116d8afa1dcab823eb31ca415c4714bf48a Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 8 Nov 2018 14:24:38 +0100 -Subject: [PATCH 24/53] arm64: dts: meson-gx: Add hdmi_5v regulator as hdmi tx - supply - -The hdmi_5v regulator must be enabled to provide power to the physical HDMI -PHY and enables the HDMI 5V presence loopback for the monitor. - -Fixes: b409f625a6d5 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards") -Signed-off-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 1 + - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 1 + - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 + - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts | 1 + - arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 1 + - 5 files changed, 5 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -index fb9ad6faa745..774f8afd2c65 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi -@@ -166,6 +166,7 @@ - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; - }; - - &hdmi_tx_tmds_port { -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -index f053595ebdc4..e5ef9b0b91c1 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -@@ -119,6 +119,7 @@ - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; - }; - - &hdmi_tx_tmds_port { -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -index f56969efffba..ca0228e0d585 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -@@ -200,6 +200,7 @@ - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; - }; - - &hdmi_tx_tmds_port { -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -index f8c66a7972b3..29c9837bd7ea 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts -@@ -96,6 +96,7 @@ - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; - }; - - &hdmi_tx_tmds_port { -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -index 4fbfa5a850cc..fe8e726a4210 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts -@@ -312,6 +312,7 @@ - status = "okay"; - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; - pinctrl-names = "default"; -+ hdmi-supply = <&hdmi_5v>; - }; - - &hdmi_tx_tmds_port { --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch b/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch deleted file mode 100644 index 83123dea1..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0025-arm64-dts-meson-gxl-libretech-cc-fix-GPIO-lines-name.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 15611dee35c448dd0409a1e06a4f87f0dbf59876 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 7 Nov 2018 11:45:47 +0100 -Subject: [PATCH 25/53] arm64: dts: meson-gxl-libretech-cc: fix GPIO lines - names - -The gpio line names were set in the pinctrl node instead of the gpio node, -at the time it was merged, it worked, but was obviously wrong. -This patch moves the properties to the gpio nodes. - -Fixes: 47884c5c746e ("ARM64: dts: meson-gxl-libretech-cc: Add GPIO lines names") -Signed-off-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -index ca0228e0d585..bb2a8c750589 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts -@@ -209,7 +209,7 @@ - }; - }; - --&pinctrl_aobus { -+&gpio_ao { - gpio-line-names = "UART TX", - "UART RX", - "Blue LED", -@@ -224,7 +224,7 @@ - "7J1 Header Pin15"; - }; - --&pinctrl_periphs { -+&gpio { - gpio-line-names = /* Bank GPIOZ */ - "", "", "", "", "", "", "", - "", "", "", "", "", "", "", --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch deleted file mode 100644 index 6bcde2948..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0026-arm64-dts-meson-gxbb-nanopi-k2-fix-GPIO-lines-names.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 706947bf855b187bbd8d8b5786b38e84e571ca9b Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 7 Nov 2018 11:45:48 +0100 -Subject: [PATCH 26/53] arm64: dts: meson-gxbb-nanopi-k2: fix GPIO lines names - -The gpio line names were set in the pinctrl node instead of the gpio node, -at the time it was merged, it worked, but was obviously wrong. -This patch moves the properties to the gpio nodes. - -Fixes: 12ada0513d7a ("ARM64: dts: meson-gxbb-nanopi-k2: Add GPIO lines names") -Signed-off-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -index 5b10de9a0bad..8ea5ed5a1c62 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts -@@ -236,7 +236,7 @@ - pinctrl-names = "default"; - }; - --&pinctrl_aobus { -+&gpio_ao { - gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In", - "VCCK En", "CON1 Header Pin31", - "I2S Header Pin6", "IR In", "I2S Header Pin7", -@@ -246,7 +246,7 @@ - ""; - }; - --&pinctrl_periphs { -+&gpio { - gpio-line-names = /* Bank GPIOZ */ - "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", - "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch deleted file mode 100644 index 4da4c22f9..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0027-arm64-dts-meson-gxbb-odroidc2-fix-GPIO-lines-names.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 62b3002dc67232b0a8cc5f51a5df991a48f062c7 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 7 Nov 2018 11:45:49 +0100 -Subject: [PATCH 27/53] arm64: dts: meson-gxbb-odroidc2: fix GPIO lines names - -The gpio line names were set in the pinctrl node instead of the gpio node, -at the time it was merged, it worked, but was obviously wrong. -This patch moves the properties to the gpio nodes. - -Fixes: b03c7d6438bb ("ARM64: dts: meson-gxbb-odroidc2: Add GPIO lines names") -Signed-off-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -index 3da33090b8fe..73cc80143c04 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts -@@ -232,7 +232,7 @@ - pinctrl-names = "default"; - }; - --&pinctrl_aobus { -+&gpio_ao { - gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En", - "USB HUB nRESET", "USB OTG Power En", - "J7 Header Pin2", "IR In", "J7 Header Pin4", -@@ -242,7 +242,7 @@ - ""; - }; - --&pinctrl_periphs { -+&gpio { - gpio-line-names = /* Bank GPIOZ */ - "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk", - "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2", --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch b/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch deleted file mode 100644 index e6ad08950..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0028-arm64-dts-meson-gxl-khadas-vim-fix-GPIO-lines-names.patch +++ /dev/null @@ -1,40 +0,0 @@ -From db194607c28989a307f60f2fd89a4996b6ae4f02 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 7 Nov 2018 11:45:50 +0100 -Subject: [PATCH 28/53] arm64: dts: meson-gxl-khadas-vim: fix GPIO lines names - -The gpio line names were set in the pinctrl node instead of the gpio node, -at the time it was merged, it worked, but was obviously wrong. -This patch moves the properties to the gpio nodes. - -Fixes: 60795933b709 ("ARM64: dts: meson-gxl-khadas-vim: Add GPIO lines names") -Signed-off-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -index e5ef9b0b91c1..1a4b3f3b8ace 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts -@@ -158,7 +158,7 @@ - linux,rc-map-name = "rc-geekbox"; - }; - --&pinctrl_aobus { -+&gpio_ao { - gpio-line-names = "UART TX", - "UART RX", - "Power Key In", -@@ -173,7 +173,7 @@ - ""; - }; - --&pinctrl_periphs { -+&gpio { - gpio-line-names = /* Bank GPIOZ */ - "", "", "", "", "", "", "", - "", "", "", "", "", "", "", --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch b/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch deleted file mode 100644 index 1ee57824d..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0029-drm-meson-Add-support-for-VIC-alternate-timings.patch +++ /dev/null @@ -1,330 +0,0 @@ -From b63cbf7b44a26e219c55da750662e1d0ae9f565b Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Tue, 6 Nov 2018 11:54:35 +0100 -Subject: [PATCH 29/53] drm/meson: Add support for VIC alternate timings - -This change is an attempt to handle the alternate clock for the CEA mode. -60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC -DRM Driver pixel clock generation. - -The actual clock generation will be moved to the Common Clock framework once -all the video clock are handled by the Amlogic Meson SoC clock driver, -then these alternate timings will be handled in the same time in a cleaner -fashion. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_dw_hdmi.c | 12 +-- - drivers/gpu/drm/meson/meson_vclk.c | 127 +++++++++++++++++--------- - drivers/gpu/drm/meson/meson_vclk.h | 2 + - 3 files changed, 89 insertions(+), 52 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c -index 2cb2ad26d716..807111ebfdd9 100644 ---- a/drivers/gpu/drm/meson/meson_dw_hdmi.c -+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c -@@ -594,17 +594,7 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - dev_dbg(connector->dev->dev, "%s: vclk:%d venc=%d hdmi=%d\n", __func__, - vclk_freq, venc_freq, hdmi_freq); - -- /* Finally filter by configurable vclk frequencies for VIC modes */ -- switch (vclk_freq) { -- case 54000: -- case 74250: -- case 148500: -- case 297000: -- case 594000: -- return MODE_OK; -- } -- -- return MODE_CLOCK_RANGE; -+ return meson_vclk_vic_supported_freq(vclk_freq); - } - - /* Encoder */ -diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c -index ae5473257f72..5acccebd026d 100644 ---- a/drivers/gpu/drm/meson/meson_vclk.c -+++ b/drivers/gpu/drm/meson/meson_vclk.c -@@ -117,6 +117,8 @@ - #define HDMI_PLL_RESET BIT(28) - #define HDMI_PLL_LOCK BIT(31) - -+#define FREQ_1000_1001(_freq) DIV_ROUND_CLOSEST(_freq * 1000, 1001) -+ - /* VID PLL Dividers */ - enum { - VID_PLL_DIV_1 = 0, -@@ -323,7 +325,7 @@ static void meson_venci_cvbs_clock_config(struct meson_drm *priv) - enum { - /* PLL O1 O2 O3 VP DV EN TX */ - /* 4320 /4 /4 /1 /5 /1 => /2 /2 */ -- MESON_VCLK_HDMI_ENCI_54000 = 1, -+ MESON_VCLK_HDMI_ENCI_54000 = 0, - /* 4320 /4 /4 /1 /5 /1 => /1 /2 */ - MESON_VCLK_HDMI_DDR_54000, - /* 2970 /4 /1 /1 /5 /1 => /1 /2 */ -@@ -339,6 +341,7 @@ enum { - }; - - struct meson_vclk_params { -+ unsigned int pixel_freq; - unsigned int pll_base_freq; - unsigned int pll_od1; - unsigned int pll_od2; -@@ -347,6 +350,7 @@ struct meson_vclk_params { - unsigned int vclk_div; - } params[] = { - [MESON_VCLK_HDMI_ENCI_54000] = { -+ .pixel_freq = 54000, - .pll_base_freq = 4320000, - .pll_od1 = 4, - .pll_od2 = 4, -@@ -355,6 +359,7 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_DDR_54000] = { -+ .pixel_freq = 54000, - .pll_base_freq = 4320000, - .pll_od1 = 4, - .pll_od2 = 4, -@@ -363,6 +368,7 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_DDR_148500] = { -+ .pixel_freq = 148500, - .pll_base_freq = 2970000, - .pll_od1 = 4, - .pll_od2 = 1, -@@ -371,6 +377,7 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_74250] = { -+ .pixel_freq = 74250, - .pll_base_freq = 2970000, - .pll_od1 = 2, - .pll_od2 = 2, -@@ -379,6 +386,7 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_148500] = { -+ .pixel_freq = 148500, - .pll_base_freq = 2970000, - .pll_od1 = 1, - .pll_od2 = 2, -@@ -387,6 +395,7 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_297000] = { -+ .pixel_freq = 297000, - .pll_base_freq = 2970000, - .pll_od1 = 1, - .pll_od2 = 1, -@@ -395,6 +404,7 @@ struct meson_vclk_params { - .vclk_div = 2, - }, - [MESON_VCLK_HDMI_594000] = { -+ .pixel_freq = 594000, - .pll_base_freq = 5940000, - .pll_od1 = 1, - .pll_od2 = 1, -@@ -402,6 +412,7 @@ struct meson_vclk_params { - .vid_pll_div = VID_PLL_DIV_5, - .vclk_div = 1, - }, -+ { /* sentinel */ }, - }; - - static inline unsigned int pll_od_to_reg(unsigned int od) -@@ -626,12 +637,37 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, - pll_freq); - } - -+enum drm_mode_status -+meson_vclk_vic_supported_freq(unsigned int freq) -+{ -+ int i; -+ -+ DRM_DEBUG_DRIVER("freq = %d\n", freq); -+ -+ for (i = 0 ; params[i].pixel_freq ; ++i) { -+ DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n", -+ i, params[i].pixel_freq, -+ FREQ_1000_1001(params[i].pixel_freq)); -+ /* Match strict frequency */ -+ if (freq == params[i].pixel_freq) -+ return MODE_OK; -+ /* Match 1000/1001 variant */ -+ if (freq == FREQ_1000_1001(params[i].pixel_freq)) -+ return MODE_OK; -+ } -+ -+ return MODE_CLOCK_RANGE; -+} -+EXPORT_SYMBOL_GPL(meson_vclk_vic_supported_freq); -+ - static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, - unsigned int od1, unsigned int od2, unsigned int od3, - unsigned int vid_pll_div, unsigned int vclk_div, - unsigned int hdmi_tx_div, unsigned int venc_div, -- bool hdmi_use_enci) -+ bool hdmi_use_enci, bool vic_alternate_clock) - { -+ unsigned int m, frac; -+ - /* Set HDMI-TX sys clock */ - regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, - CTS_HDMI_SYS_SEL_MASK, 0); -@@ -646,34 +682,38 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, - } else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxbb-vpu")) { - switch (pll_base_freq) { - case 2970000: -- meson_hdmi_pll_set_params(priv, 0x3d, 0xe00, -- od1, od2, od3); -+ m = 0x3d; -+ frac = vic_alternate_clock ? 0xd02 : 0xe00; - break; - case 4320000: -- meson_hdmi_pll_set_params(priv, 0x5a, 0, -- od1, od2, od3); -+ m = vic_alternate_clock ? 0x59 : 0x5a; -+ frac = vic_alternate_clock ? 0xe8f : 0; - break; - case 5940000: -- meson_hdmi_pll_set_params(priv, 0x7b, 0xc00, -- od1, od2, od3); -+ m = 0x7b; -+ frac = vic_alternate_clock ? 0xa05 : 0xc00; - break; - } -+ -+ meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); - } else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") || - meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) { - switch (pll_base_freq) { - case 2970000: -- meson_hdmi_pll_set_params(priv, 0x7b, 0x300, -- od1, od2, od3); -+ m = 0x7b; -+ frac = vic_alternate_clock ? 0x281 : 0x300; - break; - case 4320000: -- meson_hdmi_pll_set_params(priv, 0xb4, 0, -- od1, od2, od3); -+ m = vic_alternate_clock ? 0xb3 : 0xb4; -+ frac = vic_alternate_clock ? 0x347 : 0; - break; - case 5940000: -- meson_hdmi_pll_set_params(priv, 0xf7, 0x200, -- od1, od2, od3); -+ m = 0xf7; -+ frac = vic_alternate_clock ? 0x102 : 0x200; - break; - } -+ -+ meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); - } - - /* Setup vid_pll divider */ -@@ -826,6 +866,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - unsigned int vclk_freq, unsigned int venc_freq, - unsigned int dac_freq, bool hdmi_use_enci) - { -+ bool vic_alternate_clock = false; - unsigned int freq; - unsigned int hdmi_tx_div; - unsigned int venc_div; -@@ -843,7 +884,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - * - encp encoder - */ - meson_vclk_set(priv, vclk_freq * 10, 0, 0, 0, -- VID_PLL_DIV_5, 2, 1, 1, false); -+ VID_PLL_DIV_5, 2, 1, 1, false, false); - return; - } - -@@ -863,31 +904,35 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - return; - } - -- switch (vclk_freq) { -- case 54000: -- if (hdmi_use_enci) -- freq = MESON_VCLK_HDMI_ENCI_54000; -- else -- freq = MESON_VCLK_HDMI_DDR_54000; -- break; -- case 74250: -- freq = MESON_VCLK_HDMI_74250; -- break; -- case 148500: -- if (dac_freq != 148500) -- freq = MESON_VCLK_HDMI_DDR_148500; -- else -- freq = MESON_VCLK_HDMI_148500; -- break; -- case 297000: -- freq = MESON_VCLK_HDMI_297000; -- break; -- case 594000: -- freq = MESON_VCLK_HDMI_594000; -- break; -- default: -- pr_err("Fatal Error, invalid HDMI vclk freq %d\n", -- vclk_freq); -+ for (freq = 0 ; params[freq].pixel_freq ; ++freq) { -+ if (vclk_freq == params[freq].pixel_freq || -+ vclk_freq == FREQ_1000_1001(params[freq].pixel_freq)) { -+ if (vclk_freq != params[freq].pixel_freq) -+ vic_alternate_clock = true; -+ else -+ vic_alternate_clock = false; -+ -+ if (freq == MESON_VCLK_HDMI_ENCI_54000 && -+ !hdmi_use_enci) -+ continue; -+ -+ if (freq == MESON_VCLK_HDMI_DDR_54000 && -+ hdmi_use_enci) -+ continue; -+ -+ if (freq == MESON_VCLK_HDMI_DDR_148500 && -+ dac_freq == vclk_freq) -+ continue; -+ -+ if (freq == MESON_VCLK_HDMI_148500 && -+ dac_freq != vclk_freq) -+ continue; -+ break; -+ } -+ } -+ -+ if (!params[freq].pixel_freq) { -+ pr_err("Fatal Error, invalid HDMI vclk freq %d\n", vclk_freq); - return; - } - -@@ -895,6 +940,6 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - params[freq].pll_od1, params[freq].pll_od2, - params[freq].pll_od3, params[freq].vid_pll_div, - params[freq].vclk_div, hdmi_tx_div, venc_div, -- hdmi_use_enci); -+ hdmi_use_enci, vic_alternate_clock); - } - EXPORT_SYMBOL_GPL(meson_vclk_setup); -diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h -index 869fa3a3073e..4bd8752da02a 100644 ---- a/drivers/gpu/drm/meson/meson_vclk.h -+++ b/drivers/gpu/drm/meson/meson_vclk.h -@@ -32,6 +32,8 @@ enum { - - enum drm_mode_status - meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); -+enum drm_mode_status -+meson_vclk_vic_supported_freq(unsigned int freq); - - void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - unsigned int vclk_freq, unsigned int venc_freq, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch b/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch deleted file mode 100644 index 1299b91c3..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0030-media-meson-add-v4l2-m2m-video-decoder-driver.patch +++ /dev/null @@ -1,2971 +0,0 @@ -From 21a5d2da6ccf31ae511ea34c073f3218141b7a92 Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 29 Aug 2018 15:17:22 +0200 -Subject: [PATCH 30/53] media: meson: add v4l2 m2m video decoder driver - -Amlogic SoCs feature a powerful video decoder unit able to -decode many formats, with a performance of usually up to 4k60. - -This is a driver for this IP that is based around the v4l2 m2m framework. - -It features decoding for: -- MPEG 1 -- MPEG 2 - -Supported SoCs are: GXBB (S905), GXL (S905X/W/D), GXM (S912) - -There is also a hardware bitstream parser (ESPARSER) that is handled here. - -Signed-off-by: Maxime Jourdan ---- - drivers/media/platform/Kconfig | 10 + - drivers/media/platform/meson/Makefile | 1 + - drivers/media/platform/meson/vdec/Makefile | 8 + - .../media/platform/meson/vdec/codec_mpeg12.c | 209 ++++ - .../media/platform/meson/vdec/codec_mpeg12.h | 14 + - drivers/media/platform/meson/vdec/dos_regs.h | 98 ++ - drivers/media/platform/meson/vdec/esparser.c | 322 +++++ - drivers/media/platform/meson/vdec/esparser.h | 32 + - drivers/media/platform/meson/vdec/vdec.c | 1034 +++++++++++++++++ - drivers/media/platform/meson/vdec/vdec.h | 251 ++++ - drivers/media/platform/meson/vdec/vdec_1.c | 231 ++++ - drivers/media/platform/meson/vdec/vdec_1.h | 14 + - .../media/platform/meson/vdec/vdec_helpers.c | 412 +++++++ - .../media/platform/meson/vdec/vdec_helpers.h | 48 + - .../media/platform/meson/vdec/vdec_platform.c | 101 ++ - .../media/platform/meson/vdec/vdec_platform.h | 30 + - 16 files changed, 2815 insertions(+) - create mode 100644 drivers/media/platform/meson/vdec/Makefile - create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg12.c - create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg12.h - create mode 100644 drivers/media/platform/meson/vdec/dos_regs.h - create mode 100644 drivers/media/platform/meson/vdec/esparser.c - create mode 100644 drivers/media/platform/meson/vdec/esparser.h - create mode 100644 drivers/media/platform/meson/vdec/vdec.c - create mode 100644 drivers/media/platform/meson/vdec/vdec.h - create mode 100644 drivers/media/platform/meson/vdec/vdec_1.c - create mode 100644 drivers/media/platform/meson/vdec/vdec_1.h - create mode 100644 drivers/media/platform/meson/vdec/vdec_helpers.c - create mode 100644 drivers/media/platform/meson/vdec/vdec_helpers.h - create mode 100644 drivers/media/platform/meson/vdec/vdec_platform.c - create mode 100644 drivers/media/platform/meson/vdec/vdec_platform.h - -diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig -index 54fe90acb5b2..6bffb0ceff58 100644 ---- a/drivers/media/platform/Kconfig -+++ b/drivers/media/platform/Kconfig -@@ -482,6 +482,16 @@ config VIDEO_QCOM_VENUS - on various Qualcomm SoCs. - To compile this driver as a module choose m here. - -+config VIDEO_MESON_VDEC -+ tristate "Amlogic video decoder driver" -+ depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA -+ depends on ARCH_MESON || COMPILE_TEST -+ select VIDEOBUF2_DMA_CONTIG -+ select V4L2_MEM2MEM_DEV -+ select MESON_CANVAS -+ help -+ Support for the video decoder found in gxbb/gxl/gxm chips. -+ - endif # V4L_MEM2MEM_DRIVERS - - # TI VIDEO PORT Helper Modules -diff --git a/drivers/media/platform/meson/Makefile b/drivers/media/platform/meson/Makefile -index 597beb8f34d1..f7c6e1031f25 100644 ---- a/drivers/media/platform/meson/Makefile -+++ b/drivers/media/platform/meson/Makefile -@@ -1 +1,2 @@ - obj-$(CONFIG_VIDEO_MESON_AO_CEC) += ao-cec.o -+obj-$(CONFIG_VIDEO_MESON_VDEC) += vdec/ -diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile -new file mode 100644 -index 000000000000..6bea129084b7 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/Makefile -@@ -0,0 +1,8 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# Makefile for Amlogic meson video decoder driver -+ -+meson-vdec-objs = esparser.o vdec.o vdec_helpers.o vdec_platform.o -+meson-vdec-objs += vdec_1.o -+meson-vdec-objs += codec_mpeg12.o -+ -+obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o -diff --git a/drivers/media/platform/meson/vdec/codec_mpeg12.c b/drivers/media/platform/meson/vdec/codec_mpeg12.c -new file mode 100644 -index 000000000000..1bd6fb7d531d ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mpeg12.c -@@ -0,0 +1,209 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#include -+#include -+ -+#include "vdec_helpers.h" -+#include "dos_regs.h" -+ -+#define SIZE_WORKSPACE SZ_128K -+/* Offset substracted by the firmware from the workspace paddr */ -+#define WORKSPACE_OFFSET (5 * SZ_1K) -+ -+/* map firmware registers to known MPEG1/2 functions */ -+#define MREG_SEQ_INFO AV_SCRATCH_4 -+ #define MPEG2_SEQ_DAR_MASK GENMASK(3, 0) -+ #define MPEG2_DAR_4_3 2 -+ #define MPEG2_DAR_16_9 3 -+ #define MPEG2_DAR_221_100 4 -+#define MREG_PIC_INFO AV_SCRATCH_5 -+#define MREG_PIC_WIDTH AV_SCRATCH_6 -+#define MREG_PIC_HEIGHT AV_SCRATCH_7 -+#define MREG_BUFFERIN AV_SCRATCH_8 -+#define MREG_BUFFEROUT AV_SCRATCH_9 -+#define MREG_CMD AV_SCRATCH_A -+#define MREG_CO_MV_START AV_SCRATCH_B -+#define MREG_ERROR_COUNT AV_SCRATCH_C -+#define MREG_FRAME_OFFSET AV_SCRATCH_D -+#define MREG_WAIT_BUFFER AV_SCRATCH_E -+#define MREG_FATAL_ERROR AV_SCRATCH_F -+ -+#define PICINFO_PROG 0x00008000 -+#define PICINFO_TOP_FIRST 0x00002000 -+ -+struct codec_mpeg12 { -+ /* Buffer for the MPEG1/2 Workspace */ -+ void *workspace_vaddr; -+ dma_addr_t workspace_paddr; -+}; -+ -+static const u8 eos_sequence[SZ_1K] = { 0x00, 0x00, 0x01, 0xB7 }; -+ -+static const u8 *codec_mpeg12_eos_sequence(u32 *len) -+{ -+ *len = ARRAY_SIZE(eos_sequence); -+ return eos_sequence; -+} -+ -+static int codec_mpeg12_can_recycle(struct amvdec_core *core) -+{ -+ return !amvdec_read_dos(core, MREG_BUFFERIN); -+} -+ -+static void codec_mpeg12_recycle(struct amvdec_core *core, u32 buf_idx) -+{ -+ amvdec_write_dos(core, MREG_BUFFERIN, buf_idx + 1); -+} -+ -+static int codec_mpeg12_start(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ struct codec_mpeg12 *mpeg12 = sess->priv; -+ int ret; -+ -+ mpeg12 = kzalloc(sizeof(*mpeg12), GFP_KERNEL); -+ if (!mpeg12) -+ return -ENOMEM; -+ -+ /* Allocate some memory for the MPEG1/2 decoder's state */ -+ mpeg12->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, -+ &mpeg12->workspace_paddr, -+ GFP_KERNEL); -+ if (!mpeg12->workspace_vaddr) { -+ dev_err(core->dev, "Failed to request MPEG 1/2 Workspace\n"); -+ ret = -ENOMEM; -+ goto free_mpeg12; -+ } -+ -+ ret = amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_0, 0 }, -+ (u32[]){ 8, 0 }); -+ if (ret) -+ goto free_workspace; -+ -+ amvdec_write_dos(core, POWER_CTL_VLD, BIT(4)); -+ amvdec_write_dos(core, MREG_CO_MV_START, -+ mpeg12->workspace_paddr + WORKSPACE_OFFSET); -+ -+ amvdec_write_dos(core, MPEG1_2_REG, 0); -+ amvdec_write_dos(core, PSCALE_CTRL, 0); -+ amvdec_write_dos(core, PIC_HEAD_INFO, 0x380); -+ amvdec_write_dos(core, M4_CONTROL_REG, 0); -+ amvdec_write_dos(core, MREG_BUFFERIN, 0); -+ amvdec_write_dos(core, MREG_BUFFEROUT, 0); -+ amvdec_write_dos(core, MREG_CMD, (sess->width << 16) | sess->height); -+ amvdec_write_dos(core, MREG_ERROR_COUNT, 0); -+ amvdec_write_dos(core, MREG_FATAL_ERROR, 0); -+ amvdec_write_dos(core, MREG_WAIT_BUFFER, 0); -+ -+ sess->keyframe_found = 1; -+ sess->priv = mpeg12; -+ -+ return 0; -+ -+free_workspace: -+ dma_free_coherent(core->dev, SIZE_WORKSPACE, mpeg12->workspace_vaddr, -+ mpeg12->workspace_paddr); -+free_mpeg12: -+ kfree(mpeg12); -+ -+ return ret; -+} -+ -+static int codec_mpeg12_stop(struct amvdec_session *sess) -+{ -+ struct codec_mpeg12 *mpeg12 = sess->priv; -+ struct amvdec_core *core = sess->core; -+ -+ if (mpeg12->workspace_vaddr) -+ dma_free_coherent(core->dev, SIZE_WORKSPACE, -+ mpeg12->workspace_vaddr, -+ mpeg12->workspace_paddr); -+ -+ return 0; -+} -+ -+static void codec_mpeg12_update_dar(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 seq = amvdec_read_dos(core, MREG_SEQ_INFO); -+ u32 ar = seq & MPEG2_SEQ_DAR_MASK; -+ -+ switch (ar) { -+ case MPEG2_DAR_4_3: -+ amvdec_set_par_from_dar(sess, 4, 3); -+ break; -+ case MPEG2_DAR_16_9: -+ amvdec_set_par_from_dar(sess, 16, 9); -+ break; -+ case MPEG2_DAR_221_100: -+ amvdec_set_par_from_dar(sess, 221, 100); -+ break; -+ default: -+ sess->pixelaspect.numerator = 1; -+ sess->pixelaspect.denominator = 1; -+ break; -+ }; -+} -+ -+static irqreturn_t codec_mpeg12_threaded_isr(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 reg; -+ u32 pic_info; -+ u32 is_progressive; -+ u32 buffer_index; -+ u32 field = V4L2_FIELD_NONE; -+ u32 offset; -+ -+ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); -+ reg = amvdec_read_dos(core, MREG_FATAL_ERROR); -+ if (reg == 1) { -+ dev_err(core->dev, "MPEG1/2 fatal error\n"); -+ amvdec_abort(sess); -+ return IRQ_HANDLED; -+ } -+ -+ reg = amvdec_read_dos(core, MREG_BUFFEROUT); -+ if (!reg) -+ return IRQ_HANDLED; -+ -+ /* Unclear what this means */ -+ if ((reg & GENMASK(23, 17)) == GENMASK(23, 17)) -+ goto end; -+ -+ pic_info = amvdec_read_dos(core, MREG_PIC_INFO); -+ is_progressive = pic_info & PICINFO_PROG; -+ -+ if (!is_progressive) -+ field = (pic_info & PICINFO_TOP_FIRST) ? -+ V4L2_FIELD_INTERLACED_TB : -+ V4L2_FIELD_INTERLACED_BT; -+ -+ codec_mpeg12_update_dar(sess); -+ buffer_index = ((reg & 0xf) - 1) & 7; -+ offset = amvdec_read_dos(core, MREG_FRAME_OFFSET); -+ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); -+ -+end: -+ amvdec_write_dos(core, MREG_BUFFEROUT, 0); -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t codec_mpeg12_isr(struct amvdec_session *sess) -+{ -+ return IRQ_WAKE_THREAD; -+} -+ -+struct amvdec_codec_ops codec_mpeg12_ops = { -+ .start = codec_mpeg12_start, -+ .stop = codec_mpeg12_stop, -+ .isr = codec_mpeg12_isr, -+ .threaded_isr = codec_mpeg12_threaded_isr, -+ .can_recycle = codec_mpeg12_can_recycle, -+ .recycle = codec_mpeg12_recycle, -+ .eos_sequence = codec_mpeg12_eos_sequence, -+}; -diff --git a/drivers/media/platform/meson/vdec/codec_mpeg12.h b/drivers/media/platform/meson/vdec/codec_mpeg12.h -new file mode 100644 -index 000000000000..43cab5f39ca0 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mpeg12.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_CODEC_MPEG12_H_ -+#define __MESON_VDEC_CODEC_MPEG12_H_ -+ -+#include "vdec.h" -+ -+extern struct amvdec_codec_ops codec_mpeg12_ops; -+ -+#endif -diff --git a/drivers/media/platform/meson/vdec/dos_regs.h b/drivers/media/platform/meson/vdec/dos_regs.h -new file mode 100644 -index 000000000000..abd810542dbb ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/dos_regs.h -@@ -0,0 +1,98 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_DOS_REGS_H_ -+#define __MESON_VDEC_DOS_REGS_H_ -+ -+/* DOS registers */ -+#define VDEC_ASSIST_AMR1_INT8 0x00b4 -+ -+#define ASSIST_MBOX1_CLR_REG 0x01d4 -+#define ASSIST_MBOX1_MASK 0x01d8 -+ -+#define MPSR 0x0c04 -+#define MCPU_INTR_MSK 0x0c10 -+#define CPSR 0x0c84 -+ -+#define IMEM_DMA_CTRL 0x0d00 -+#define IMEM_DMA_ADR 0x0d04 -+#define IMEM_DMA_COUNT 0x0d08 -+#define LMEM_DMA_CTRL 0x0d40 -+ -+#define MC_STATUS0 0x2424 -+#define MC_CTRL1 0x242c -+ -+#define PSCALE_RST 0x2440 -+#define PSCALE_CTRL 0x2444 -+#define PSCALE_BMEM_ADDR 0x247c -+#define PSCALE_BMEM_DAT 0x2480 -+ -+#define DBLK_CTRL 0x2544 -+#define DBLK_STATUS 0x254c -+ -+#define GCLK_EN 0x260c -+#define MDEC_PIC_DC_CTRL 0x2638 -+#define MDEC_PIC_DC_STATUS 0x263c -+#define ANC0_CANVAS_ADDR 0x2640 -+#define MDEC_PIC_DC_THRESH 0x26e0 -+ -+/* Firmware interface registers */ -+#define AV_SCRATCH_0 0x2700 -+#define AV_SCRATCH_1 0x2704 -+#define AV_SCRATCH_2 0x2708 -+#define AV_SCRATCH_3 0x270c -+#define AV_SCRATCH_4 0x2710 -+#define AV_SCRATCH_5 0x2714 -+#define AV_SCRATCH_6 0x2718 -+#define AV_SCRATCH_7 0x271c -+#define AV_SCRATCH_8 0x2720 -+#define AV_SCRATCH_9 0x2724 -+#define AV_SCRATCH_A 0x2728 -+#define AV_SCRATCH_B 0x272c -+#define AV_SCRATCH_C 0x2730 -+#define AV_SCRATCH_D 0x2734 -+#define AV_SCRATCH_E 0x2738 -+#define AV_SCRATCH_F 0x273c -+#define AV_SCRATCH_G 0x2740 -+#define AV_SCRATCH_H 0x2744 -+#define AV_SCRATCH_I 0x2748 -+#define AV_SCRATCH_J 0x274c -+#define AV_SCRATCH_K 0x2750 -+#define AV_SCRATCH_L 0x2754 -+ -+#define MPEG1_2_REG 0x3004 -+#define PIC_HEAD_INFO 0x300c -+#define POWER_CTL_VLD 0x3020 -+#define M4_CONTROL_REG 0x30a4 -+ -+/* Stream Buffer (stbuf) regs */ -+#define VLD_MEM_VIFIFO_START_PTR 0x3100 -+#define VLD_MEM_VIFIFO_CURR_PTR 0x3104 -+#define VLD_MEM_VIFIFO_END_PTR 0x3108 -+#define VLD_MEM_VIFIFO_CONTROL 0x3110 -+ #define MEM_FIFO_CNT_BIT 16 -+ #define MEM_FILL_ON_LEVEL BIT(10) -+ #define MEM_CTRL_EMPTY_EN BIT(2) -+ #define MEM_CTRL_FILL_EN BIT(1) -+#define VLD_MEM_VIFIFO_WP 0x3114 -+#define VLD_MEM_VIFIFO_RP 0x3118 -+#define VLD_MEM_VIFIFO_LEVEL 0x311c -+#define VLD_MEM_VIFIFO_BUF_CNTL 0x3120 -+ #define MEM_BUFCTRL_MANUAL BIT(1) -+#define VLD_MEM_VIFIFO_WRAP_COUNT 0x3144 -+ -+#define DCAC_DMA_CTRL 0x3848 -+ -+#define DOS_SW_RESET0 0xfc00 -+#define DOS_GCLK_EN0 0xfc04 -+#define DOS_GEN_CTRL0 0xfc08 -+#define DOS_MEM_PD_VDEC 0xfcc0 -+#define DOS_MEM_PD_HEVC 0xfccc -+#define DOS_SW_RESET3 0xfcd0 -+#define DOS_GCLK_EN3 0xfcd4 -+#define DOS_VDEC_MCRCC_STALL_CTRL 0xfd00 -+ -+#endif -diff --git a/drivers/media/platform/meson/vdec/esparser.c b/drivers/media/platform/meson/vdec/esparser.c -new file mode 100644 -index 000000000000..9498812243ca ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/esparser.c -@@ -0,0 +1,322 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ * -+ * The Elementary Stream Parser is a HW bitstream parser. -+ * It reads bitstream buffers and feeds them to the VIFIFO -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "dos_regs.h" -+#include "esparser.h" -+#include "vdec_helpers.h" -+ -+/* PARSER REGS (CBUS) */ -+#define PARSER_CONTROL 0x00 -+ #define ES_PACK_SIZE_BIT 8 -+ #define ES_WRITE BIT(5) -+ #define ES_SEARCH BIT(1) -+ #define ES_PARSER_START BIT(0) -+#define PARSER_FETCH_ADDR 0x4 -+#define PARSER_FETCH_CMD 0x8 -+#define PARSER_CONFIG 0x14 -+ #define PS_CFG_MAX_FETCH_CYCLE_BIT 0 -+ #define PS_CFG_STARTCODE_WID_24_BIT 10 -+ #define PS_CFG_MAX_ES_WR_CYCLE_BIT 12 -+ #define PS_CFG_PFIFO_EMPTY_CNT_BIT 16 -+#define PFIFO_WR_PTR 0x18 -+#define PFIFO_RD_PTR 0x1c -+#define PARSER_SEARCH_PATTERN 0x24 -+ #define ES_START_CODE_PATTERN 0x00000100 -+#define PARSER_SEARCH_MASK 0x28 -+ #define ES_START_CODE_MASK 0xffffff00 -+ #define FETCH_ENDIAN_BIT 27 -+#define PARSER_INT_ENABLE 0x2c -+ #define PARSER_INT_HOST_EN_BIT 8 -+#define PARSER_INT_STATUS 0x30 -+ #define PARSER_INTSTAT_SC_FOUND 1 -+#define PARSER_ES_CONTROL 0x5c -+#define PARSER_VIDEO_START_PTR 0x80 -+#define PARSER_VIDEO_END_PTR 0x84 -+#define PARSER_VIDEO_WP 0x88 -+#define PARSER_VIDEO_HOLE 0x90 -+ -+#define SEARCH_PATTERN_LEN 512 -+ -+static DECLARE_WAIT_QUEUE_HEAD(wq); -+static int search_done; -+ -+static irqreturn_t esparser_isr(int irq, void *dev) -+{ -+ int int_status; -+ struct amvdec_core *core = dev; -+ -+ int_status = amvdec_read_parser(core, PARSER_INT_STATUS); -+ amvdec_write_parser(core, PARSER_INT_STATUS, int_status); -+ -+ if (int_status & PARSER_INTSTAT_SC_FOUND) { -+ amvdec_write_parser(core, PFIFO_RD_PTR, 0); -+ amvdec_write_parser(core, PFIFO_WR_PTR, 0); -+ search_done = 1; -+ wake_up_interruptible(&wq); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+/* Pad the packet to at least 4KiB bytes otherwise the VDEC unit won't trigger -+ * ISRs. -+ * Also append a start code 000001ff at the end to trigger -+ * the ESPARSER interrupt. -+ */ -+static u32 esparser_pad_start_code(struct vb2_buffer *vb) -+{ -+ u32 payload_size = vb2_get_plane_payload(vb, 0); -+ u32 pad_size = 0; -+ u8 *vaddr = vb2_plane_vaddr(vb, 0) + payload_size; -+ -+ if (payload_size < ESPARSER_MIN_PACKET_SIZE) { -+ pad_size = ESPARSER_MIN_PACKET_SIZE - payload_size; -+ memset(vaddr, 0, pad_size); -+ } -+ -+ memset(vaddr + pad_size, 0, SEARCH_PATTERN_LEN); -+ vaddr[pad_size] = 0x00; -+ vaddr[pad_size + 1] = 0x00; -+ vaddr[pad_size + 2] = 0x01; -+ vaddr[pad_size + 3] = 0xff; -+ -+ return pad_size; -+} -+ -+static int -+esparser_write_data(struct amvdec_core *core, dma_addr_t addr, u32 size) -+{ -+ amvdec_write_parser(core, PFIFO_RD_PTR, 0); -+ amvdec_write_parser(core, PFIFO_WR_PTR, 0); -+ amvdec_write_parser(core, PARSER_CONTROL, -+ ES_WRITE | -+ ES_PARSER_START | -+ ES_SEARCH | -+ (size << ES_PACK_SIZE_BIT)); -+ -+ amvdec_write_parser(core, PARSER_FETCH_ADDR, addr); -+ amvdec_write_parser(core, PARSER_FETCH_CMD, -+ (7 << FETCH_ENDIAN_BIT) | -+ (size + SEARCH_PATTERN_LEN)); -+ -+ search_done = 0; -+ return wait_event_interruptible_timeout(wq, search_done, (HZ / 5)); -+} -+ -+static u32 esparser_vififo_get_free_space(struct amvdec_session *sess) -+{ -+ u32 vififo_usage; -+ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; -+ struct amvdec_core *core = sess->core; -+ -+ vififo_usage = vdec_ops->vififo_level(sess); -+ vififo_usage += amvdec_read_parser(core, PARSER_VIDEO_HOLE); -+ vififo_usage += (6 * SZ_1K); // 6 KiB internal fifo -+ -+ if (vififo_usage > sess->vififo_size) { -+ dev_warn(sess->core->dev, -+ "VIFIFO usage (%u) > VIFIFO size (%u)\n", -+ vififo_usage, sess->vififo_size); -+ return 0; -+ } -+ -+ return sess->vififo_size - vififo_usage; -+} -+ -+int esparser_queue_eos(struct amvdec_core *core, const u8 *data, u32 len) -+{ -+ struct device *dev = core->dev; -+ void *eos_vaddr; -+ dma_addr_t eos_paddr; -+ int ret; -+ -+ eos_vaddr = dma_alloc_coherent(dev, -+ len + SEARCH_PATTERN_LEN, -+ &eos_paddr, GFP_KERNEL); -+ if (!eos_vaddr) -+ return -ENOMEM; -+ -+ memset(eos_vaddr, 0, len + SEARCH_PATTERN_LEN); -+ memcpy(eos_vaddr, data, len); -+ ret = esparser_write_data(core, eos_paddr, len); -+ dma_free_coherent(dev, len + SEARCH_PATTERN_LEN, -+ eos_vaddr, eos_paddr); -+ -+ return ret; -+} -+ -+static u32 esparser_get_offset(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 offset = amvdec_read_parser(core, PARSER_VIDEO_WP) - -+ sess->vififo_paddr; -+ -+ if (offset < sess->last_offset) -+ sess->wrap_count++; -+ -+ sess->last_offset = offset; -+ offset += (sess->wrap_count * sess->vififo_size); -+ -+ return offset; -+} -+ -+static int -+esparser_queue(struct amvdec_session *sess, struct vb2_v4l2_buffer *vbuf) -+{ -+ int ret; -+ struct vb2_buffer *vb = &vbuf->vb2_buf; -+ struct amvdec_core *core = sess->core; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ u32 num_dst_bufs = 0; -+ u32 payload_size = vb2_get_plane_payload(vb, 0); -+ dma_addr_t phy = vb2_dma_contig_plane_dma_addr(vb, 0); -+ u32 offset; -+ u32 pad_size; -+ -+ if (codec_ops->num_pending_bufs) -+ num_dst_bufs = codec_ops->num_pending_bufs(sess); -+ -+ num_dst_bufs += v4l2_m2m_num_dst_bufs_ready(sess->m2m_ctx); -+ -+ if (esparser_vififo_get_free_space(sess) < payload_size || -+ atomic_read(&sess->esparser_queued_bufs) >= num_dst_bufs) -+ return -EAGAIN; -+ -+ v4l2_m2m_src_buf_remove_by_buf(sess->m2m_ctx, vbuf); -+ -+ offset = esparser_get_offset(sess); -+ -+ amvdec_add_ts_reorder(sess, vb->timestamp, offset); -+ dev_dbg(core->dev, "esparser: ts = %llu pld_size = %u offset = %08X\n", -+ vb->timestamp, payload_size, offset); -+ -+ pad_size = esparser_pad_start_code(vb); -+ ret = esparser_write_data(core, phy, payload_size + pad_size); -+ -+ if (ret <= 0) { -+ dev_warn(core->dev, "esparser: input parsing error\n"); -+ amvdec_remove_ts(sess, vb->timestamp); -+ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); -+ amvdec_write_parser(core, PARSER_FETCH_CMD, 0); -+ -+ return 0; -+ } -+ -+ /* We need to wait until we parse the first keyframe. -+ * All buffers prior to the first keyframe must be dropped. -+ */ -+ if (!sess->keyframe_found) -+ usleep_range(1000, 2000); -+ -+ if (sess->keyframe_found) -+ atomic_inc(&sess->esparser_queued_bufs); -+ else -+ amvdec_remove_ts(sess, vb->timestamp); -+ -+ vbuf->flags = 0; -+ vbuf->field = V4L2_FIELD_NONE; -+ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); -+ -+ return 0; -+} -+ -+void esparser_queue_all_src(struct work_struct *work) -+{ -+ struct v4l2_m2m_buffer *buf, *n; -+ struct amvdec_session *sess = -+ container_of(work, struct amvdec_session, esparser_queue_work); -+ -+ mutex_lock(&sess->lock); -+ v4l2_m2m_for_each_src_buf_safe(sess->m2m_ctx, buf, n) { -+ if (esparser_queue(sess, &buf->vb) < 0) -+ break; -+ } -+ mutex_unlock(&sess->lock); -+} -+ -+int esparser_power_up(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; -+ -+ reset_control_reset(core->esparser_reset); -+ amvdec_write_parser(core, PARSER_CONFIG, -+ (10 << PS_CFG_PFIFO_EMPTY_CNT_BIT) | -+ (1 << PS_CFG_MAX_ES_WR_CYCLE_BIT) | -+ (16 << PS_CFG_MAX_FETCH_CYCLE_BIT)); -+ -+ amvdec_write_parser(core, PFIFO_RD_PTR, 0); -+ amvdec_write_parser(core, PFIFO_WR_PTR, 0); -+ -+ amvdec_write_parser(core, PARSER_SEARCH_PATTERN, -+ ES_START_CODE_PATTERN); -+ amvdec_write_parser(core, PARSER_SEARCH_MASK, ES_START_CODE_MASK); -+ -+ amvdec_write_parser(core, PARSER_CONFIG, -+ (10 << PS_CFG_PFIFO_EMPTY_CNT_BIT) | -+ (1 << PS_CFG_MAX_ES_WR_CYCLE_BIT) | -+ (16 << PS_CFG_MAX_FETCH_CYCLE_BIT) | -+ (2 << PS_CFG_STARTCODE_WID_24_BIT)); -+ -+ amvdec_write_parser(core, PARSER_CONTROL, -+ (ES_SEARCH | ES_PARSER_START)); -+ -+ amvdec_write_parser(core, PARSER_VIDEO_START_PTR, sess->vififo_paddr); -+ amvdec_write_parser(core, PARSER_VIDEO_END_PTR, -+ sess->vififo_paddr + sess->vififo_size - 8); -+ amvdec_write_parser(core, PARSER_ES_CONTROL, -+ amvdec_read_parser(core, PARSER_ES_CONTROL) & ~1); -+ -+ if (vdec_ops->conf_esparser) -+ vdec_ops->conf_esparser(sess); -+ -+ amvdec_write_parser(core, PARSER_INT_STATUS, 0xffff); -+ amvdec_write_parser(core, PARSER_INT_ENABLE, -+ BIT(PARSER_INT_HOST_EN_BIT)); -+ -+ return 0; -+} -+ -+int esparser_init(struct platform_device *pdev, struct amvdec_core *core) -+{ -+ struct device *dev = &pdev->dev; -+ int ret; -+ int irq; -+ -+ irq = platform_get_irq_byname(pdev, "esparser"); -+ if (irq < 0) { -+ dev_err(dev, "Failed getting ESPARSER IRQ from dtb\n"); -+ return irq; -+ } -+ -+ ret = devm_request_irq(dev, irq, esparser_isr, IRQF_SHARED, -+ "esparserirq", core); -+ if (ret) { -+ dev_err(dev, "Failed requesting ESPARSER IRQ\n"); -+ return ret; -+ } -+ -+ core->esparser_reset = -+ devm_reset_control_get_exclusive(dev, "esparser"); -+ if (IS_ERR(core->esparser_reset)) { -+ dev_err(dev, "Failed to get esparser_reset\n"); -+ return PTR_ERR(core->esparser_reset); -+ } -+ -+ return 0; -+} -diff --git a/drivers/media/platform/meson/vdec/esparser.h b/drivers/media/platform/meson/vdec/esparser.h -new file mode 100644 -index 000000000000..ff51fe7fda66 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/esparser.h -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_ESPARSER_H_ -+#define __MESON_VDEC_ESPARSER_H_ -+ -+#include -+ -+#include "vdec.h" -+ -+int esparser_init(struct platform_device *pdev, struct amvdec_core *core); -+int esparser_power_up(struct amvdec_session *sess); -+ -+/** -+ * esparser_queue_eos() - write End Of Stream sequence to the ESPARSER -+ * -+ * @core vdec core struct -+ */ -+int esparser_queue_eos(struct amvdec_core *core, const u8 *data, u32 len); -+ -+/** -+ * esparser_queue_all_src() - work handler that writes as many src buffers -+ * as possible to the ESPARSER -+ */ -+void esparser_queue_all_src(struct work_struct *work); -+ -+#define ESPARSER_MIN_PACKET_SIZE SZ_4K -+ -+#endif -diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c -new file mode 100644 -index 000000000000..d8db52c01fbe ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec.c -@@ -0,0 +1,1034 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "vdec.h" -+#include "esparser.h" -+#include "vdec_helpers.h" -+ -+struct dummy_buf { -+ struct vb2_v4l2_buffer vb; -+ struct list_head list; -+}; -+ -+/* 16 MiB for parsed bitstream swap exchange */ -+#define SIZE_VIFIFO SZ_16M -+ -+static u32 get_output_size(u32 width, u32 height) -+{ -+ return ALIGN(width * height, SZ_64K); -+} -+ -+u32 amvdec_get_output_size(struct amvdec_session *sess) -+{ -+ return get_output_size(sess->width, sess->height); -+} -+EXPORT_SYMBOL_GPL(amvdec_get_output_size); -+ -+static int vdec_codec_needs_recycle(struct amvdec_session *sess) -+{ -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ -+ return codec_ops->can_recycle && codec_ops->recycle; -+} -+ -+static int vdec_recycle_thread(void *data) -+{ -+ struct amvdec_session *sess = data; -+ struct amvdec_core *core = sess->core; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ struct amvdec_buffer *tmp, *n; -+ -+ while (!kthread_should_stop()) { -+ mutex_lock(&sess->bufs_recycle_lock); -+ list_for_each_entry_safe(tmp, n, &sess->bufs_recycle, list) { -+ if (!codec_ops->can_recycle(core)) -+ break; -+ -+ codec_ops->recycle(core, tmp->vb->index); -+ list_del(&tmp->list); -+ kfree(tmp); -+ } -+ mutex_unlock(&sess->bufs_recycle_lock); -+ -+ usleep_range(5000, 10000); -+ } -+ -+ return 0; -+} -+ -+static int vdec_poweron(struct amvdec_session *sess) -+{ -+ int ret; -+ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; -+ -+ ret = clk_prepare_enable(sess->core->dos_parser_clk); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(sess->core->dos_clk); -+ if (ret) -+ goto disable_dos_parser; -+ -+ ret = vdec_ops->start(sess); -+ if (ret) -+ goto disable_dos; -+ -+ esparser_power_up(sess); -+ -+ return 0; -+ -+disable_dos: -+ clk_disable_unprepare(sess->core->dos_clk); -+disable_dos_parser: -+ clk_disable_unprepare(sess->core->dos_parser_clk); -+ -+ return ret; -+} -+ -+static void vdec_wait_inactive(struct amvdec_session *sess) -+{ -+ /* We consider 50ms with no IRQ to be inactive. */ -+ while (time_is_after_jiffies64(sess->last_irq_jiffies + -+ msecs_to_jiffies(50))) -+ msleep(25); -+} -+ -+static void vdec_poweroff(struct amvdec_session *sess) -+{ -+ struct amvdec_ops *vdec_ops = sess->fmt_out->vdec_ops; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ -+ vdec_wait_inactive(sess); -+ if (codec_ops->drain) -+ codec_ops->drain(sess); -+ -+ vdec_ops->stop(sess); -+ clk_disable_unprepare(sess->core->dos_clk); -+ clk_disable_unprepare(sess->core->dos_parser_clk); -+} -+ -+static void -+vdec_queue_recycle(struct amvdec_session *sess, struct vb2_buffer *vb) -+{ -+ struct amvdec_buffer *new_buf; -+ -+ new_buf = kmalloc(sizeof(*new_buf), GFP_KERNEL); -+ new_buf->vb = vb; -+ -+ mutex_lock(&sess->bufs_recycle_lock); -+ list_add_tail(&new_buf->list, &sess->bufs_recycle); -+ mutex_unlock(&sess->bufs_recycle_lock); -+} -+ -+static void vdec_m2m_device_run(void *priv) -+{ -+ struct amvdec_session *sess = priv; -+ -+ schedule_work(&sess->esparser_queue_work); -+} -+ -+static void vdec_m2m_job_abort(void *priv) -+{ -+ struct amvdec_session *sess = priv; -+ -+ v4l2_m2m_job_finish(sess->m2m_dev, sess->m2m_ctx); -+} -+ -+static const struct v4l2_m2m_ops vdec_m2m_ops = { -+ .device_run = vdec_m2m_device_run, -+ .job_abort = vdec_m2m_job_abort, -+}; -+ -+static int vdec_queue_setup(struct vb2_queue *q, -+ unsigned int *num_buffers, unsigned int *num_planes, -+ unsigned int sizes[], struct device *alloc_devs[]) -+{ -+ struct amvdec_session *sess = vb2_get_drv_priv(q); -+ const struct amvdec_format *fmt_out = sess->fmt_out; -+ u32 output_size = amvdec_get_output_size(sess); -+ u32 buffers_total; -+ -+ if (*num_planes) { -+ switch (q->type) { -+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: -+ if (*num_planes != 1 || sizes[0] < output_size) -+ return -EINVAL; -+ break; -+ case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: -+ switch (sess->pixfmt_cap) { -+ case V4L2_PIX_FMT_NV12M: -+ if (*num_planes != 2 || -+ sizes[0] < output_size || -+ sizes[1] < output_size / 2) -+ return -EINVAL; -+ break; -+ case V4L2_PIX_FMT_YUV420M: -+ if (*num_planes != 3 || -+ sizes[0] < output_size || -+ sizes[1] < output_size / 4 || -+ sizes[2] < output_size / 4) -+ return -EINVAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ break; -+ } -+ -+ return 0; -+ } -+ -+ switch (q->type) { -+ case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: -+ sizes[0] = amvdec_get_output_size(sess); -+ *num_planes = 1; -+ break; -+ case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: -+ switch (sess->pixfmt_cap) { -+ case V4L2_PIX_FMT_NV12M: -+ sizes[0] = output_size; -+ sizes[1] = output_size / 2; -+ *num_planes = 2; -+ break; -+ case V4L2_PIX_FMT_YUV420M: -+ sizes[0] = output_size; -+ sizes[1] = output_size / 4; -+ sizes[2] = output_size / 4; -+ *num_planes = 3; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ buffers_total = q->num_buffers + *num_buffers; -+ -+ if (buffers_total < fmt_out->min_buffers) -+ *num_buffers = fmt_out->min_buffers - q->num_buffers; -+ if (buffers_total > fmt_out->max_buffers) -+ *num_buffers = fmt_out->max_buffers - q->num_buffers; -+ -+ /* We need to program the complete CAPTURE buffer list -+ * in registers during start_streaming, and the firmwares -+ * are free to choose any of them to write frames to. As such, -+ * we need all of them to be queued into the driver -+ */ -+ q->min_buffers_needed = q->num_buffers + *num_buffers; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void vdec_vb2_buf_queue(struct vb2_buffer *vb) -+{ -+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); -+ struct amvdec_session *sess = vb2_get_drv_priv(vb->vb2_queue); -+ struct v4l2_m2m_ctx *m2m_ctx = sess->m2m_ctx; -+ -+ v4l2_m2m_buf_queue(m2m_ctx, vbuf); -+ -+ if (!sess->streamon_out || !sess->streamon_cap) -+ return; -+ -+ if (vb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && -+ vdec_codec_needs_recycle(sess)) -+ vdec_queue_recycle(sess, vb); -+ -+ schedule_work(&sess->esparser_queue_work); -+} -+ -+static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) -+{ -+ struct amvdec_session *sess = vb2_get_drv_priv(q); -+ struct amvdec_core *core = sess->core; -+ struct vb2_v4l2_buffer *buf; -+ int ret; -+ -+ if (core->cur_sess && core->cur_sess != sess) { -+ ret = -EBUSY; -+ goto bufs_done; -+ } -+ -+ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) -+ sess->streamon_out = 1; -+ else -+ sess->streamon_cap = 1; -+ -+ if (!sess->streamon_out || !sess->streamon_cap) -+ return 0; -+ -+ sess->vififo_size = SIZE_VIFIFO; -+ sess->vififo_vaddr = -+ dma_alloc_coherent(sess->core->dev, sess->vififo_size, -+ &sess->vififo_paddr, GFP_KERNEL); -+ if (!sess->vififo_vaddr) { -+ dev_err(sess->core->dev, "Failed to request VIFIFO buffer\n"); -+ ret = -ENOMEM; -+ goto bufs_done; -+ } -+ -+ sess->should_stop = 0; -+ sess->keyframe_found = 0; -+ sess->last_offset = 0; -+ sess->wrap_count = 0; -+ sess->pixelaspect.numerator = 1; -+ sess->pixelaspect.denominator = 1; -+ atomic_set(&sess->esparser_queued_bufs, 0); -+ -+ ret = vdec_poweron(sess); -+ if (ret) -+ goto vififo_free; -+ -+ sess->sequence_cap = 0; -+ if (vdec_codec_needs_recycle(sess)) -+ sess->recycle_thread = kthread_run(vdec_recycle_thread, sess, -+ "vdec_recycle"); -+ -+ core->cur_sess = sess; -+ -+ return 0; -+ -+vififo_free: -+ dma_free_coherent(sess->core->dev, sess->vififo_size, -+ sess->vififo_vaddr, sess->vififo_paddr); -+bufs_done: -+ while ((buf = v4l2_m2m_src_buf_remove(sess->m2m_ctx))) -+ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED); -+ while ((buf = v4l2_m2m_dst_buf_remove(sess->m2m_ctx))) -+ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED); -+ -+ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) -+ sess->streamon_out = 0; -+ else -+ sess->streamon_cap = 0; -+ -+ return ret; -+} -+ -+static void vdec_free_canvas(struct amvdec_session *sess) -+{ -+ int i; -+ -+ for (i = 0; i < sess->canvas_num; ++i) -+ meson_canvas_free(sess->core->canvas, sess->canvas_alloc[i]); -+ -+ sess->canvas_num = 0; -+} -+ -+static void vdec_reset_timestamps(struct amvdec_session *sess) -+{ -+ struct amvdec_timestamp *tmp, *n; -+ -+ list_for_each_entry_safe(tmp, n, &sess->timestamps, list) { -+ list_del(&tmp->list); -+ kfree(tmp); -+ } -+} -+ -+static void vdec_reset_bufs_recycle(struct amvdec_session *sess) -+{ -+ struct amvdec_buffer *tmp, *n; -+ -+ list_for_each_entry_safe(tmp, n, &sess->bufs_recycle, list) { -+ list_del(&tmp->list); -+ kfree(tmp); -+ } -+} -+ -+static void vdec_stop_streaming(struct vb2_queue *q) -+{ -+ struct amvdec_session *sess = vb2_get_drv_priv(q); -+ struct amvdec_core *core = sess->core; -+ struct vb2_v4l2_buffer *buf; -+ -+ if (sess->streamon_out && sess->streamon_cap) { -+ if (vdec_codec_needs_recycle(sess)) -+ kthread_stop(sess->recycle_thread); -+ -+ vdec_poweroff(sess); -+ vdec_free_canvas(sess); -+ dma_free_coherent(sess->core->dev, sess->vififo_size, -+ sess->vififo_vaddr, sess->vififo_paddr); -+ vdec_reset_timestamps(sess); -+ vdec_reset_bufs_recycle(sess); -+ kfree(sess->priv); -+ sess->priv = NULL; -+ core->cur_sess = NULL; -+ } -+ -+ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ while ((buf = v4l2_m2m_src_buf_remove(sess->m2m_ctx))) -+ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR); -+ -+ sess->streamon_out = 0; -+ } else { -+ while ((buf = v4l2_m2m_dst_buf_remove(sess->m2m_ctx))) -+ v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR); -+ -+ sess->streamon_cap = 0; -+ } -+} -+ -+static const struct vb2_ops vdec_vb2_ops = { -+ .queue_setup = vdec_queue_setup, -+ .start_streaming = vdec_start_streaming, -+ .stop_streaming = vdec_stop_streaming, -+ .buf_queue = vdec_vb2_buf_queue, -+ .wait_prepare = vb2_ops_wait_prepare, -+ .wait_finish = vb2_ops_wait_finish, -+}; -+ -+static int -+vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap) -+{ -+ strscpy(cap->driver, "meson-vdec", sizeof(cap->driver)); -+ strscpy(cap->card, "Amlogic Video Decoder", sizeof(cap->card)); -+ strscpy(cap->bus_info, "platform:meson-vdec", sizeof(cap->bus_info)); -+ -+ return 0; -+} -+ -+static const struct amvdec_format * -+find_format(const struct amvdec_format *fmts, u32 size, u32 pixfmt) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < size; i++) { -+ if (fmts[i].pixfmt == pixfmt) -+ return &fmts[i]; -+ } -+ -+ return NULL; -+} -+ -+static unsigned int -+vdec_supports_pixfmt_cap(const struct amvdec_format *fmt_out, u32 pixfmt_cap) -+{ -+ int i; -+ -+ for (i = 0; fmt_out->pixfmts_cap[i]; i++) -+ if (fmt_out->pixfmts_cap[i] == pixfmt_cap) -+ return 1; -+ -+ return 0; -+} -+ -+static const struct amvdec_format * -+vdec_try_fmt_common(struct amvdec_session *sess, u32 size, -+ struct v4l2_format *f) -+{ -+ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; -+ struct v4l2_plane_pix_format *pfmt = pixmp->plane_fmt; -+ const struct amvdec_format *fmts = sess->core->platform->formats; -+ const struct amvdec_format *fmt_out; -+ -+ memset(pfmt[0].reserved, 0, sizeof(pfmt[0].reserved)); -+ memset(pixmp->reserved, 0, sizeof(pixmp->reserved)); -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ fmt_out = find_format(fmts, size, pixmp->pixelformat); -+ if (!fmt_out) { -+ pixmp->pixelformat = V4L2_PIX_FMT_MPEG2; -+ fmt_out = find_format(fmts, size, pixmp->pixelformat); -+ } -+ -+ pfmt[0].sizeimage = -+ get_output_size(pixmp->width, pixmp->height); -+ pfmt[0].bytesperline = 0; -+ pixmp->num_planes = 1; -+ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { -+ fmt_out = sess->fmt_out; -+ if (!vdec_supports_pixfmt_cap(fmt_out, pixmp->pixelformat)) -+ pixmp->pixelformat = fmt_out->pixfmts_cap[0]; -+ -+ memset(pfmt[1].reserved, 0, sizeof(pfmt[1].reserved)); -+ if (pixmp->pixelformat == V4L2_PIX_FMT_NV12M) { -+ pfmt[0].sizeimage = -+ get_output_size(pixmp->width, pixmp->height); -+ pfmt[0].bytesperline = ALIGN(pixmp->width, 64); -+ -+ pfmt[1].sizeimage = -+ get_output_size(pixmp->width, pixmp->height) / 2; -+ pfmt[1].bytesperline = ALIGN(pixmp->width, 64); -+ pixmp->num_planes = 2; -+ } else if (pixmp->pixelformat == V4L2_PIX_FMT_YUV420M) { -+ pfmt[0].sizeimage = -+ get_output_size(pixmp->width, pixmp->height); -+ pfmt[0].bytesperline = ALIGN(pixmp->width, 64); -+ -+ pfmt[1].sizeimage = -+ get_output_size(pixmp->width, pixmp->height) / 4; -+ pfmt[1].bytesperline = ALIGN(pixmp->width, 64) / 2; -+ -+ pfmt[2].sizeimage = -+ get_output_size(pixmp->width, pixmp->height) / 4; -+ pfmt[2].bytesperline = ALIGN(pixmp->width, 64) / 2; -+ pixmp->num_planes = 3; -+ } -+ } else { -+ return NULL; -+ } -+ -+ pixmp->width = clamp(pixmp->width, (u32)256, fmt_out->max_width); -+ pixmp->height = clamp(pixmp->height, (u32)144, fmt_out->max_height); -+ -+ if (pixmp->field == V4L2_FIELD_ANY) -+ pixmp->field = V4L2_FIELD_NONE; -+ -+ return fmt_out; -+} -+ -+static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ -+ vdec_try_fmt_common(sess, sess->core->platform->num_formats, f); -+ -+ return 0; -+} -+ -+static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) -+ pixmp->pixelformat = sess->pixfmt_cap; -+ else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) -+ pixmp->pixelformat = sess->fmt_out->pixfmt; -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { -+ pixmp->width = sess->width; -+ pixmp->height = sess->height; -+ pixmp->colorspace = sess->colorspace; -+ pixmp->ycbcr_enc = sess->ycbcr_enc; -+ pixmp->quantization = sess->quantization; -+ pixmp->xfer_func = sess->xfer_func; -+ } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ pixmp->width = sess->width; -+ pixmp->height = sess->height; -+ } -+ -+ vdec_try_fmt_common(sess, sess->core->platform->num_formats, f); -+ -+ return 0; -+} -+ -+static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp; -+ u32 num_formats = sess->core->platform->num_formats; -+ const struct amvdec_format *fmt_out; -+ struct v4l2_pix_format_mplane orig_pixmp; -+ struct v4l2_format format; -+ u32 pixfmt_out = 0, pixfmt_cap = 0; -+ -+ orig_pixmp = *pixmp; -+ -+ fmt_out = vdec_try_fmt_common(sess, num_formats, f); -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ pixfmt_out = pixmp->pixelformat; -+ pixfmt_cap = sess->pixfmt_cap; -+ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { -+ pixfmt_cap = pixmp->pixelformat; -+ pixfmt_out = sess->fmt_out->pixfmt; -+ } -+ -+ memset(&format, 0, sizeof(format)); -+ -+ format.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; -+ format.fmt.pix_mp.pixelformat = pixfmt_out; -+ format.fmt.pix_mp.width = orig_pixmp.width; -+ format.fmt.pix_mp.height = orig_pixmp.height; -+ vdec_try_fmt_common(sess, num_formats, &format); -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ sess->width = format.fmt.pix_mp.width; -+ sess->height = format.fmt.pix_mp.height; -+ sess->colorspace = pixmp->colorspace; -+ sess->ycbcr_enc = pixmp->ycbcr_enc; -+ sess->quantization = pixmp->quantization; -+ sess->xfer_func = pixmp->xfer_func; -+ } -+ -+ memset(&format, 0, sizeof(format)); -+ -+ format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; -+ format.fmt.pix_mp.pixelformat = pixfmt_cap; -+ format.fmt.pix_mp.width = orig_pixmp.width; -+ format.fmt.pix_mp.height = orig_pixmp.height; -+ vdec_try_fmt_common(sess, num_formats, &format); -+ -+ sess->width = format.fmt.pix_mp.width; -+ sess->height = format.fmt.pix_mp.height; -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) -+ sess->fmt_out = fmt_out; -+ else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) -+ sess->pixfmt_cap = format.fmt.pix_mp.pixelformat; -+ -+ return 0; -+} -+ -+static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ const struct vdec_platform *platform = sess->core->platform; -+ const struct amvdec_format *fmt_out; -+ -+ memset(f->reserved, 0, sizeof(f->reserved)); -+ -+ if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -+ if (f->index >= platform->num_formats) -+ return -EINVAL; -+ -+ fmt_out = &platform->formats[f->index]; -+ f->pixelformat = fmt_out->pixfmt; -+ } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { -+ fmt_out = sess->fmt_out; -+ if (f->index >= 4 || !fmt_out->pixfmts_cap[f->index]) -+ return -EINVAL; -+ -+ f->pixelformat = fmt_out->pixfmts_cap[f->index]; -+ } else { -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int vdec_enum_framesizes(struct file *file, void *fh, -+ struct v4l2_frmsizeenum *fsize) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ const struct amvdec_format *formats = sess->core->platform->formats; -+ const struct amvdec_format *fmt; -+ u32 num_formats = sess->core->platform->num_formats; -+ -+ fmt = find_format(formats, num_formats, fsize->pixel_format); -+ if (!fmt || fsize->index) -+ return -EINVAL; -+ -+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; -+ -+ fsize->stepwise.min_width = 256; -+ fsize->stepwise.max_width = fmt->max_width; -+ fsize->stepwise.step_width = 1; -+ fsize->stepwise.min_height = 144; -+ fsize->stepwise.max_height = fmt->max_height; -+ fsize->stepwise.step_height = 1; -+ -+ return 0; -+} -+ -+static int -+vdec_try_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) -+{ -+ switch (cmd->cmd) { -+ case V4L2_DEC_CMD_STOP: -+ if (cmd->flags & V4L2_DEC_CMD_STOP_TO_BLACK) -+ return -EINVAL; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int -+vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ struct device *dev = sess->core->dev; -+ int ret; -+ -+ ret = vdec_try_decoder_cmd(file, fh, cmd); -+ if (ret) -+ return ret; -+ -+ if (!(sess->streamon_out & sess->streamon_cap)) -+ return 0; -+ -+ dev_dbg(dev, "Received V4L2_DEC_CMD_STOP\n"); -+ sess->should_stop = 1; -+ -+ vdec_wait_inactive(sess); -+ -+ if (codec_ops->drain) { -+ codec_ops->drain(sess); -+ } else if (codec_ops->eos_sequence) { -+ u32 len; -+ const u8 *data = codec_ops->eos_sequence(&len); -+ -+ esparser_queue_eos(sess->core, data, len); -+ } -+ -+ return ret; -+} -+ -+static int vdec_subscribe_event(struct v4l2_fh *fh, -+ const struct v4l2_event_subscription *sub) -+{ -+ switch (sub->type) { -+ case V4L2_EVENT_EOS: -+ return v4l2_event_subscribe(fh, sub, 2, NULL); -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int vdec_cropcap(struct file *file, void *fh, -+ struct v4l2_cropcap *crop) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ -+ if (crop->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) -+ return -EINVAL; -+ -+ crop->pixelaspect = sess->pixelaspect; -+ return 0; -+} -+ -+static const struct v4l2_ioctl_ops vdec_ioctl_ops = { -+ .vidioc_querycap = vdec_querycap, -+ .vidioc_enum_fmt_vid_cap_mplane = vdec_enum_fmt, -+ .vidioc_enum_fmt_vid_out_mplane = vdec_enum_fmt, -+ .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt, -+ .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt, -+ .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt, -+ .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt, -+ .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt, -+ .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt, -+ .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, -+ .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, -+ .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, -+ .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, -+ .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, -+ .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, -+ .vidioc_streamon = v4l2_m2m_ioctl_streamon, -+ .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, -+ .vidioc_enum_framesizes = vdec_enum_framesizes, -+ .vidioc_subscribe_event = vdec_subscribe_event, -+ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, -+ .vidioc_try_decoder_cmd = vdec_try_decoder_cmd, -+ .vidioc_decoder_cmd = vdec_decoder_cmd, -+ .vidioc_cropcap = vdec_cropcap, -+}; -+ -+static int m2m_queue_init(void *priv, struct vb2_queue *src_vq, -+ struct vb2_queue *dst_vq) -+{ -+ struct amvdec_session *sess = priv; -+ int ret; -+ -+ src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; -+ src_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; -+ src_vq->ops = &vdec_vb2_ops; -+ src_vq->mem_ops = &vb2_dma_contig_memops; -+ src_vq->drv_priv = sess; -+ src_vq->buf_struct_size = sizeof(struct dummy_buf); -+ src_vq->min_buffers_needed = 1; -+ src_vq->dev = sess->core->dev; -+ src_vq->lock = &sess->lock; -+ ret = vb2_queue_init(src_vq); -+ if (ret) -+ return ret; -+ -+ dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; -+ dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; -+ dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; -+ dst_vq->ops = &vdec_vb2_ops; -+ dst_vq->mem_ops = &vb2_dma_contig_memops; -+ dst_vq->drv_priv = sess; -+ dst_vq->buf_struct_size = sizeof(struct dummy_buf); -+ dst_vq->min_buffers_needed = 1; -+ dst_vq->dev = sess->core->dev; -+ dst_vq->lock = &sess->lock; -+ ret = vb2_queue_init(dst_vq); -+ if (ret) { -+ vb2_queue_release(src_vq); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int vdec_open(struct file *file) -+{ -+ struct amvdec_core *core = video_drvdata(file); -+ struct device *dev = core->dev; -+ const struct amvdec_format *formats = core->platform->formats; -+ struct amvdec_session *sess; -+ int ret; -+ -+ sess = kzalloc(sizeof(*sess), GFP_KERNEL); -+ if (!sess) -+ return -ENOMEM; -+ -+ sess->core = core; -+ -+ sess->m2m_dev = v4l2_m2m_init(&vdec_m2m_ops); -+ if (IS_ERR(sess->m2m_dev)) { -+ dev_err(dev, "Fail to v4l2_m2m_init\n"); -+ ret = PTR_ERR(sess->m2m_dev); -+ goto err_free_sess; -+ } -+ -+ sess->m2m_ctx = v4l2_m2m_ctx_init(sess->m2m_dev, sess, m2m_queue_init); -+ if (IS_ERR(sess->m2m_ctx)) { -+ dev_err(dev, "Fail to v4l2_m2m_ctx_init\n"); -+ ret = PTR_ERR(sess->m2m_ctx); -+ goto err_m2m_release; -+ } -+ -+ sess->pixfmt_cap = formats[0].pixfmts_cap[0]; -+ sess->fmt_out = &formats[0]; -+ sess->width = 1280; -+ sess->height = 720; -+ sess->pixelaspect.numerator = 1; -+ sess->pixelaspect.denominator = 1; -+ -+ INIT_LIST_HEAD(&sess->timestamps); -+ INIT_LIST_HEAD(&sess->bufs_recycle); -+ INIT_WORK(&sess->esparser_queue_work, esparser_queue_all_src); -+ mutex_init(&sess->lock); -+ mutex_init(&sess->bufs_recycle_lock); -+ spin_lock_init(&sess->ts_spinlock); -+ -+ v4l2_fh_init(&sess->fh, core->vdev_dec); -+ v4l2_fh_add(&sess->fh); -+ sess->fh.m2m_ctx = sess->m2m_ctx; -+ file->private_data = &sess->fh; -+ -+ return 0; -+ -+err_m2m_release: -+ v4l2_m2m_release(sess->m2m_dev); -+err_free_sess: -+ kfree(sess); -+ return ret; -+} -+ -+static int vdec_close(struct file *file) -+{ -+ struct amvdec_session *sess = -+ container_of(file->private_data, struct amvdec_session, fh); -+ -+ v4l2_m2m_ctx_release(sess->m2m_ctx); -+ v4l2_m2m_release(sess->m2m_dev); -+ v4l2_fh_del(&sess->fh); -+ v4l2_fh_exit(&sess->fh); -+ -+ mutex_destroy(&sess->lock); -+ mutex_destroy(&sess->bufs_recycle_lock); -+ -+ kfree(sess); -+ -+ return 0; -+} -+ -+static const struct v4l2_file_operations vdec_fops = { -+ .owner = THIS_MODULE, -+ .open = vdec_open, -+ .release = vdec_close, -+ .unlocked_ioctl = video_ioctl2, -+ .poll = v4l2_m2m_fop_poll, -+ .mmap = v4l2_m2m_fop_mmap, -+}; -+ -+static irqreturn_t vdec_isr(int irq, void *data) -+{ -+ struct amvdec_core *core = data; -+ struct amvdec_session *sess = core->cur_sess; -+ -+ sess->last_irq_jiffies = get_jiffies_64(); -+ -+ return sess->fmt_out->codec_ops->isr(sess); -+} -+ -+static irqreturn_t vdec_threaded_isr(int irq, void *data) -+{ -+ struct amvdec_core *core = data; -+ struct amvdec_session *sess = core->cur_sess; -+ -+ return sess->fmt_out->codec_ops->threaded_isr(sess); -+} -+ -+static const struct of_device_id vdec_dt_match[] = { -+ { .compatible = "amlogic,gxbb-vdec", -+ .data = &vdec_platform_gxbb }, -+ { .compatible = "amlogic,gxm-vdec", -+ .data = &vdec_platform_gxm }, -+ { .compatible = "amlogic,gxl-vdec", -+ .data = &vdec_platform_gxl }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, vdec_dt_match); -+ -+static int vdec_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct video_device *vdev; -+ struct amvdec_core *core; -+ struct resource *r; -+ const struct of_device_id *of_id; -+ int irq; -+ int ret; -+ -+ core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL); -+ if (!core) -+ return -ENOMEM; -+ -+ core->dev = dev; -+ platform_set_drvdata(pdev, core); -+ -+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dos"); -+ core->dos_base = devm_ioremap_resource(dev, r); -+ if (IS_ERR(core->dos_base)) { -+ dev_err(dev, "Couldn't remap DOS memory\n"); -+ return PTR_ERR(core->dos_base); -+ } -+ -+ r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "esparser"); -+ core->esparser_base = devm_ioremap_resource(dev, r); -+ if (IS_ERR(core->esparser_base)) { -+ dev_err(dev, "Couldn't remap ESPARSER memory\n"); -+ return PTR_ERR(core->esparser_base); -+ } -+ -+ core->regmap_ao = syscon_regmap_lookup_by_phandle(dev->of_node, -+ "amlogic,ao-sysctrl"); -+ if (IS_ERR(core->regmap_ao)) { -+ dev_err(dev, "Couldn't regmap AO sysctrl\n"); -+ return PTR_ERR(core->regmap_ao); -+ } -+ -+ core->canvas = meson_canvas_get(dev); -+ if (!core->canvas) -+ return PTR_ERR(core->canvas); -+ -+ core->dos_parser_clk = devm_clk_get(dev, "dos_parser"); -+ if (IS_ERR(core->dos_parser_clk)) -+ return -EPROBE_DEFER; -+ -+ core->dos_clk = devm_clk_get(dev, "dos"); -+ if (IS_ERR(core->dos_clk)) -+ return -EPROBE_DEFER; -+ -+ core->vdec_1_clk = devm_clk_get(dev, "vdec_1"); -+ if (IS_ERR(core->vdec_1_clk)) -+ return -EPROBE_DEFER; -+ -+ core->vdec_hevc_clk = devm_clk_get(dev, "vdec_hevc"); -+ if (IS_ERR(core->vdec_hevc_clk)) -+ return -EPROBE_DEFER; -+ -+ irq = platform_get_irq_byname(pdev, "vdec"); -+ if (irq < 0) -+ return irq; -+ -+ ret = devm_request_threaded_irq(core->dev, irq, vdec_isr, -+ vdec_threaded_isr, IRQF_ONESHOT, -+ "vdec", core); -+ if (ret) -+ return ret; -+ -+ ret = esparser_init(pdev, core); -+ if (ret) -+ return ret; -+ -+ ret = v4l2_device_register(dev, &core->v4l2_dev); -+ if (ret) { -+ dev_err(dev, "Couldn't register v4l2 device\n"); -+ return -ENOMEM; -+ } -+ -+ vdev = video_device_alloc(); -+ if (!vdev) { -+ ret = -ENOMEM; -+ goto err_vdev_release; -+ } -+ -+ of_id = of_match_node(vdec_dt_match, dev->of_node); -+ core->platform = of_id->data; -+ core->vdev_dec = vdev; -+ core->dev_dec = dev; -+ mutex_init(&core->lock); -+ -+ strscpy(vdev->name, "meson-video-decoder", sizeof(vdev->name)); -+ vdev->release = video_device_release; -+ vdev->fops = &vdec_fops; -+ vdev->ioctl_ops = &vdec_ioctl_ops; -+ vdev->vfl_dir = VFL_DIR_M2M; -+ vdev->v4l2_dev = &core->v4l2_dev; -+ vdev->lock = &core->lock; -+ vdev->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING; -+ -+ video_set_drvdata(vdev, core); -+ -+ ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); -+ if (ret) { -+ dev_err(dev, "Failed registering video device\n"); -+ goto err_vdev_release; -+ } -+ -+ return 0; -+ -+err_vdev_release: -+ video_device_release(vdev); -+ return ret; -+} -+ -+static int vdec_remove(struct platform_device *pdev) -+{ -+ struct amvdec_core *core = platform_get_drvdata(pdev); -+ -+ video_unregister_device(core->vdev_dec); -+ -+ return 0; -+} -+ -+static struct platform_driver meson_vdec_driver = { -+ .probe = vdec_probe, -+ .remove = vdec_remove, -+ .driver = { -+ .name = "meson-vdec", -+ .of_match_table = vdec_dt_match, -+ }, -+}; -+module_platform_driver(meson_vdec_driver); -+ -+MODULE_DESCRIPTION("Meson video decoder driver for GXBB/GXL/GXM"); -+MODULE_AUTHOR("Maxime Jourdan "); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h -new file mode 100644 -index 000000000000..4e8c3f1742ac ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec.h -@@ -0,0 +1,251 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_CORE_H_ -+#define __MESON_VDEC_CORE_H_ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "vdec_platform.h" -+ -+/* 32 buffers in 3-plane YUV420 */ -+#define MAX_CANVAS (32 * 3) -+ -+struct amvdec_buffer { -+ struct list_head list; -+ struct vb2_buffer *vb; -+}; -+ -+/** -+ * struct amvdec_timestamp - stores a src timestamp along with a VIFIFO offset -+ * -+ * @list: used to make lists out of this struct -+ * @ts: timestamp -+ * @offset: offset in the VIFIFO where the associated packet was written -+ */ -+struct amvdec_timestamp { -+ struct list_head list; -+ u64 ts; -+ u32 offset; -+}; -+ -+struct amvdec_session; -+ -+/** -+ * struct amvdec_core - device parameters, singleton -+ * -+ * @dos_base: DOS memory base address -+ * @esparser_base: PARSER memory base address -+ * @regmap_ao: regmap for the AO bus -+ * @dev: core device -+ * @dev_dec: decoder device -+ * @platform: platform-specific data -+ * @canvas: canvas provider reference -+ * @dos_parser_clk: DOS_PARSER clock -+ * @dos_clk: DOS clock -+ * @vdec_1_clk: VDEC_1 clock -+ * @vdec_hevc_clk: VDEC_HEVC clock -+ * @esparser_reset: RESET for the PARSER -+ * @vdec_dec: video device for the decoder -+ * @v4l2_dev: v4l2 device -+ * @cur_sess: current decoding session -+ * @lock: lock for this structure -+ */ -+struct amvdec_core { -+ void __iomem *dos_base; -+ void __iomem *esparser_base; -+ struct regmap *regmap_ao; -+ -+ struct device *dev; -+ struct device *dev_dec; -+ const struct vdec_platform *platform; -+ -+ struct meson_canvas *canvas; -+ -+ struct clk *dos_parser_clk; -+ struct clk *dos_clk; -+ struct clk *vdec_1_clk; -+ struct clk *vdec_hevc_clk; -+ -+ struct reset_control *esparser_reset; -+ -+ struct video_device *vdev_dec; -+ struct v4l2_device v4l2_dev; -+ -+ struct amvdec_session *cur_sess; -+ struct mutex lock; -+}; -+ -+/** -+ * struct amvdec_ops - vdec operations -+ * -+ * @start: mandatory call when the vdec needs to initialize -+ * @stop: mandatory call when the vdec needs to stop -+ * @conf_esparser: mandatory call to let the vdec configure the ESPARSER -+ * @vififo_level: mandatory call to get the current amount of data -+ * in the VIFIFO -+ * @use_offsets: mandatory call. Returns 1 if the VDEC supports vififo offsets -+ */ -+struct amvdec_ops { -+ int (*start)(struct amvdec_session *sess); -+ int (*stop)(struct amvdec_session *sess); -+ void (*conf_esparser)(struct amvdec_session *sess); -+ u32 (*vififo_level)(struct amvdec_session *sess); -+}; -+ -+/** -+ * struct amvdec_codec_ops - codec operations -+ * -+ * @start: mandatory call when the codec needs to initialize -+ * @stop: mandatory call when the codec needs to stop -+ * @load_extended_firmware: optional call to load additional firmware bits -+ * @num_pending_bufs: optional call to get the number of dst buffers on hold -+ * @can_recycle: optional call to know if the codec is ready to recycle -+ * a dst buffer -+ * @recycle: optional call to tell the codec to recycle a dst buffer. Must go -+ * in pair with @can_recycle -+ * @drain: optional call if the codec has a custom way of draining -+ * @eos_sequence: optional call to get an end sequence to send to esparser -+ * for flush. Mutually exclusive with @drain. -+ * @isr: mandatory call when the ISR triggers -+ * @threaded_isr: mandatory call for the threaded ISR -+ */ -+struct amvdec_codec_ops { -+ int (*start)(struct amvdec_session *sess); -+ int (*stop)(struct amvdec_session *sess); -+ int (*load_extended_firmware)(struct amvdec_session *sess, -+ const u8 *data, u32 len); -+ u32 (*num_pending_bufs)(struct amvdec_session *sess); -+ int (*can_recycle)(struct amvdec_core *core); -+ void (*recycle)(struct amvdec_core *core, u32 buf_idx); -+ void (*drain)(struct amvdec_session *sess); -+ const u8 * (*eos_sequence)(u32 *len); -+ irqreturn_t (*isr)(struct amvdec_session *sess); -+ irqreturn_t (*threaded_isr)(struct amvdec_session *sess); -+}; -+ -+/** -+ * struct amvdec_format - describes one of the OUTPUT (src) format supported -+ * -+ * @pixfmt: V4L2 pixel format -+ * @min_buffers: minimum amount of CAPTURE (dst) buffers -+ * @max_buffers: maximum amount of CAPTURE (dst) buffers -+ * @max_width: maximum picture width supported -+ * @max_height: maximum picture height supported -+ * @vdec_ops: the VDEC operations that support this format -+ * @codec_ops: the codec operations that support this format -+ * @firmware_path: Path to the firmware that supports this format -+ * @pixfmts_cap: list of CAPTURE pixel formats available with pixfmt -+ */ -+struct amvdec_format { -+ u32 pixfmt; -+ u32 min_buffers; -+ u32 max_buffers; -+ u32 max_width; -+ u32 max_height; -+ -+ struct amvdec_ops *vdec_ops; -+ struct amvdec_codec_ops *codec_ops; -+ -+ char *firmware_path; -+ u32 pixfmts_cap[4]; -+}; -+ -+/** -+ * struct amvdec_session - decoding session parameters -+ * -+ * @core: reference to the vdec core struct -+ * @fh: v4l2 file handle -+ * @m2m_dev: v4l2 m2m device -+ * @m2m_ctx: v4l2 m2m context -+ * @lock: session lock -+ * @fmt_out: vdec pixel format for the OUTPUT queue -+ * @pixfmt_cap: V4L2 pixel format for the CAPTURE queue -+ * @width: current picture width -+ * @height: current picture height -+ * @colorspace: current colorspace -+ * @ycbcr_enc: current ycbcr_enc -+ * @quantization: current quantization -+ * @xfer_func: current transfer function -+ * @pixelaspect: Pixel Aspect Ratio reported by the decoder -+ * @esparser_queued_bufs: number of buffers currently queued into ESPARSER -+ * @esparser_queue_work: work struct for the ESPARSER to process src buffers -+ * @streamon_cap: stream on flag for capture queue -+ * @streamon_out: stream on flag for output queue -+ * @sequence_cap: capture sequence counter -+ * @should_stop: flag set if userspace signaled EOS via command -+ * or empty buffer -+ * @keyframe_found: flag set once a keyframe has been parsed -+ * @canvas_alloc: array of all the canvas IDs allocated -+ * @canvas_num: number of canvas IDs allocated -+ * @vififo_vaddr: virtual address for the VIFIFO -+ * @vififo_paddr: physical address for the VIFIFO -+ * @vififo_size: size of the VIFIFO dma alloc -+ * @bufs_recycle: list of buffers that need to be recycled -+ * @bufs_recycle_lock: lock for the bufs_recycle list -+ * @recycle_thread: task struct for the recycling thread -+ * @timestamps: chronological list of src timestamps -+ * @ts_spinlock: spinlock for the timestamps list -+ * @last_irq_jiffies: tracks last time the vdec triggered an IRQ -+ * @priv: codec private data -+ */ -+struct amvdec_session { -+ struct amvdec_core *core; -+ -+ struct v4l2_fh fh; -+ struct v4l2_m2m_dev *m2m_dev; -+ struct v4l2_m2m_ctx *m2m_ctx; -+ struct mutex lock; -+ -+ const struct amvdec_format *fmt_out; -+ u32 pixfmt_cap; -+ -+ u32 width; -+ u32 height; -+ u32 colorspace; -+ u8 ycbcr_enc; -+ u8 quantization; -+ u8 xfer_func; -+ -+ struct v4l2_fract pixelaspect; -+ -+ atomic_t esparser_queued_bufs; -+ struct work_struct esparser_queue_work; -+ -+ unsigned int streamon_cap, streamon_out; -+ unsigned int sequence_cap; -+ unsigned int should_stop; -+ unsigned int keyframe_found; -+ -+ u8 canvas_alloc[MAX_CANVAS]; -+ u32 canvas_num; -+ -+ void *vififo_vaddr; -+ dma_addr_t vififo_paddr; -+ u32 vififo_size; -+ -+ struct list_head bufs_recycle; -+ struct mutex bufs_recycle_lock; -+ struct task_struct *recycle_thread; -+ -+ struct list_head timestamps; -+ spinlock_t ts_spinlock; -+ -+ u64 last_irq_jiffies; -+ u32 last_offset; -+ u32 wrap_count; -+ -+ void *priv; -+}; -+ -+u32 amvdec_get_output_size(struct amvdec_session *sess); -+ -+#endif -diff --git a/drivers/media/platform/meson/vdec/vdec_1.c b/drivers/media/platform/meson/vdec/vdec_1.c -new file mode 100644 -index 000000000000..88b8bed9441e ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_1.c -@@ -0,0 +1,231 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ * -+ * VDEC_1 is a video decoding block that allows decoding of -+ * MPEG 1/2/4, H.263, H.264, MJPEG, VC1 -+ */ -+ -+#include -+#include -+ -+#include "vdec_1.h" -+#include "vdec_helpers.h" -+#include "dos_regs.h" -+ -+/* AO Registers */ -+#define AO_RTI_GEN_PWR_SLEEP0 0xe8 -+#define AO_RTI_GEN_PWR_ISO0 0xec -+ #define GEN_PWR_VDEC_1 (BIT(3) | BIT(2)) -+ -+#define MC_SIZE (4096 * 4) -+ -+static int -+vdec_1_load_firmware(struct amvdec_session *sess, const char *fwname) -+{ -+ const struct firmware *fw; -+ struct amvdec_core *core = sess->core; -+ struct device *dev = core->dev_dec; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ static void *mc_addr; -+ static dma_addr_t mc_addr_map; -+ int ret; -+ u32 i = 1000; -+ -+ ret = request_firmware(&fw, fwname, dev); -+ if (ret < 0) -+ return -EINVAL; -+ -+ if (fw->size < MC_SIZE) { -+ dev_err(dev, "Firmware size %zu is too small. Expected %u.\n", -+ fw->size, MC_SIZE); -+ ret = -EINVAL; -+ goto release_firmware; -+ } -+ -+ mc_addr = dma_alloc_coherent(core->dev, MC_SIZE, -+ &mc_addr_map, GFP_KERNEL); -+ if (!mc_addr) { -+ dev_err(dev, -+ "Failed allocating memory for firmware loading\n"); -+ ret = -ENOMEM; -+ goto release_firmware; -+ } -+ -+ memcpy(mc_addr, fw->data, MC_SIZE); -+ -+ amvdec_write_dos(core, MPSR, 0); -+ amvdec_write_dos(core, CPSR, 0); -+ -+ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(31)); -+ -+ amvdec_write_dos(core, IMEM_DMA_ADR, mc_addr_map); -+ amvdec_write_dos(core, IMEM_DMA_COUNT, MC_SIZE / 4); -+ amvdec_write_dos(core, IMEM_DMA_CTRL, (0x8000 | (7 << 16))); -+ -+ while (--i && amvdec_read_dos(core, IMEM_DMA_CTRL) & 0x8000) { } -+ -+ if (i == 0) { -+ dev_err(dev, "Firmware load fail (DMA hang?)\n"); -+ ret = -EINVAL; -+ goto free_mc; -+ } -+ -+ if (codec_ops->load_extended_firmware) -+ ret = codec_ops->load_extended_firmware(sess, -+ fw->data + MC_SIZE, -+ fw->size - MC_SIZE); -+ -+free_mc: -+ dma_free_coherent(core->dev, MC_SIZE, mc_addr, mc_addr_map); -+release_firmware: -+ release_firmware(fw); -+ return ret; -+} -+ -+int vdec_1_stbuf_power_up(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_CONTROL, 0); -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_WRAP_COUNT, 0); -+ amvdec_write_dos(core, POWER_CTL_VLD, BIT(4)); -+ -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_START_PTR, sess->vififo_paddr); -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_CURR_PTR, sess->vififo_paddr); -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_END_PTR, -+ sess->vififo_paddr + sess->vififo_size - 8); -+ -+ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, 1); -+ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, 1); -+ -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_BUF_CNTL, MEM_BUFCTRL_MANUAL); -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_WP, sess->vififo_paddr); -+ -+ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); -+ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); -+ -+ amvdec_write_dos_bits(core, VLD_MEM_VIFIFO_CONTROL, -+ (0x11 << MEM_FIFO_CNT_BIT) | MEM_FILL_ON_LEVEL | -+ MEM_CTRL_FILL_EN | MEM_CTRL_EMPTY_EN); -+ -+ return 0; -+} -+ -+static void vdec_1_conf_esparser(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ -+ /* VDEC_1 specific ESPARSER stuff */ -+ amvdec_write_dos(core, DOS_GEN_CTRL0, 0); -+ amvdec_write_dos(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); -+ amvdec_clear_dos_bits(core, VLD_MEM_VIFIFO_BUF_CNTL, 1); -+} -+ -+static u32 vdec_1_vififo_level(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ -+ return amvdec_read_dos(core, VLD_MEM_VIFIFO_LEVEL); -+} -+ -+static int vdec_1_stop(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ -+ amvdec_write_dos(core, MPSR, 0); -+ amvdec_write_dos(core, CPSR, 0); -+ amvdec_write_dos(core, ASSIST_MBOX1_MASK, 0); -+ -+ amvdec_write_dos(core, DOS_SW_RESET0, BIT(12) | BIT(11)); -+ amvdec_write_dos(core, DOS_SW_RESET0, 0); -+ amvdec_read_dos(core, DOS_SW_RESET0); -+ -+ /* enable vdec1 isolation */ -+ regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0xc0); -+ /* power off vdec1 memories */ -+ amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0xffffffff); -+ /* power off vdec1 */ -+ regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, -+ GEN_PWR_VDEC_1, GEN_PWR_VDEC_1); -+ -+ clk_disable_unprepare(core->vdec_1_clk); -+ -+ if (sess->priv) -+ codec_ops->stop(sess); -+ -+ return 0; -+} -+ -+static int vdec_1_start(struct amvdec_session *sess) -+{ -+ int ret; -+ struct amvdec_core *core = sess->core; -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; -+ -+ /* Configure the vdec clk to the maximum available */ -+ clk_set_rate(core->vdec_1_clk, 666666666); -+ ret = clk_prepare_enable(core->vdec_1_clk); -+ if (ret) -+ return ret; -+ -+ regmap_update_bits(core->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, -+ GEN_PWR_VDEC_1, 0); -+ udelay(10); -+ -+ /* Reset VDEC1 */ -+ amvdec_write_dos(core, DOS_SW_RESET0, 0xfffffffc); -+ amvdec_write_dos(core, DOS_SW_RESET0, 0x00000000); -+ -+ amvdec_write_dos(core, DOS_GCLK_EN0, 0x3ff); -+ -+ /* enable VDEC Memories */ -+ amvdec_write_dos(core, DOS_MEM_PD_VDEC, 0); -+ /* Remove VDEC1 Isolation */ -+ regmap_write(core->regmap_ao, AO_RTI_GEN_PWR_ISO0, 0); -+ /* Reset DOS top registers */ -+ amvdec_write_dos(core, DOS_VDEC_MCRCC_STALL_CTRL, 0); -+ -+ amvdec_write_dos(core, GCLK_EN, 0x3ff); -+ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(31)); -+ -+ vdec_1_stbuf_power_up(sess); -+ -+ ret = vdec_1_load_firmware(sess, sess->fmt_out->firmware_path); -+ if (ret) -+ goto stop; -+ -+ ret = codec_ops->start(sess); -+ if (ret) -+ goto stop; -+ -+ /* Enable IRQ */ -+ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); -+ amvdec_write_dos(core, ASSIST_MBOX1_MASK, 1); -+ -+ /* Enable 2-plane output */ -+ if (sess->pixfmt_cap == V4L2_PIX_FMT_NV12M) -+ amvdec_write_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(17)); -+ else -+ amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(17)); -+ -+ /* Enable firmware processor */ -+ amvdec_write_dos(core, MPSR, 1); -+ /* Let the firmware settle */ -+ udelay(10); -+ -+ return 0; -+ -+stop: -+ vdec_1_stop(sess); -+ return ret; -+} -+ -+struct amvdec_ops vdec_1_ops = { -+ .start = vdec_1_start, -+ .stop = vdec_1_stop, -+ .conf_esparser = vdec_1_conf_esparser, -+ .vififo_level = vdec_1_vififo_level, -+}; -diff --git a/drivers/media/platform/meson/vdec/vdec_1.h b/drivers/media/platform/meson/vdec/vdec_1.h -new file mode 100644 -index 000000000000..042d930c40d7 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_1.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_VDEC_1_H_ -+#define __MESON_VDEC_VDEC_1_H_ -+ -+#include "vdec.h" -+ -+extern struct amvdec_ops vdec_1_ops; -+ -+#endif -diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.c b/drivers/media/platform/meson/vdec/vdec_helpers.c -new file mode 100644 -index 000000000000..02090c5b089e ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_helpers.c -@@ -0,0 +1,412 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include "vdec_helpers.h" -+ -+#define NUM_CANVAS_NV12 2 -+#define NUM_CANVAS_YUV420 3 -+ -+u32 amvdec_read_dos(struct amvdec_core *core, u32 reg) -+{ -+ return readl_relaxed(core->dos_base + reg); -+} -+EXPORT_SYMBOL_GPL(amvdec_read_dos); -+ -+void amvdec_write_dos(struct amvdec_core *core, u32 reg, u32 val) -+{ -+ writel_relaxed(val, core->dos_base + reg); -+} -+EXPORT_SYMBOL_GPL(amvdec_write_dos); -+ -+void amvdec_write_dos_bits(struct amvdec_core *core, u32 reg, u32 val) -+{ -+ amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) | val); -+} -+EXPORT_SYMBOL_GPL(amvdec_write_dos_bits); -+ -+void amvdec_clear_dos_bits(struct amvdec_core *core, u32 reg, u32 val) -+{ -+ amvdec_write_dos(core, reg, amvdec_read_dos(core, reg) & ~val); -+} -+EXPORT_SYMBOL_GPL(amvdec_clear_dos_bits); -+ -+u32 amvdec_read_parser(struct amvdec_core *core, u32 reg) -+{ -+ return readl_relaxed(core->esparser_base + reg); -+} -+EXPORT_SYMBOL_GPL(amvdec_read_parser); -+ -+void amvdec_write_parser(struct amvdec_core *core, u32 reg, u32 val) -+{ -+ writel_relaxed(val, core->esparser_base + reg); -+} -+EXPORT_SYMBOL_GPL(amvdec_write_parser); -+ -+static int canvas_alloc(struct amvdec_session *sess, u8 *canvas_id) -+{ -+ int ret; -+ -+ if (sess->canvas_num >= MAX_CANVAS) { -+ dev_err(sess->core->dev, "Reached max number of canvas\n"); -+ return -ENOMEM; -+ } -+ -+ ret = meson_canvas_alloc(sess->core->canvas, canvas_id); -+ if (ret) -+ return ret; -+ -+ sess->canvas_alloc[sess->canvas_num++] = *canvas_id; -+ return 0; -+} -+ -+static int set_canvas_yuv420m(struct amvdec_session *sess, -+ struct vb2_buffer *vb, u32 width, -+ u32 height, u32 reg) -+{ -+ struct amvdec_core *core = sess->core; -+ u8 canvas_id[NUM_CANVAS_YUV420]; /* Y U V */ -+ dma_addr_t buf_paddr[NUM_CANVAS_YUV420]; /* Y U V */ -+ int ret, i; -+ -+ for (i = 0; i < NUM_CANVAS_YUV420; ++i) { -+ ret = canvas_alloc(sess, &canvas_id[i]); -+ if (ret) -+ return ret; -+ -+ buf_paddr[i] = -+ vb2_dma_contig_plane_dma_addr(vb, i); -+ } -+ -+ /* Y plane */ -+ meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0], -+ width, height, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ -+ /* U plane */ -+ meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1], -+ width / 2, height / 2, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ -+ /* V plane */ -+ meson_canvas_config(core->canvas, canvas_id[2], buf_paddr[2], -+ width / 2, height / 2, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ -+ amvdec_write_dos(core, reg, -+ ((canvas_id[2]) << 16) | -+ ((canvas_id[1]) << 8) | -+ (canvas_id[0])); -+ -+ return 0; -+} -+ -+static int set_canvas_nv12m(struct amvdec_session *sess, -+ struct vb2_buffer *vb, u32 width, -+ u32 height, u32 reg) -+{ -+ struct amvdec_core *core = sess->core; -+ u8 canvas_id[NUM_CANVAS_NV12]; /* Y U/V */ -+ dma_addr_t buf_paddr[NUM_CANVAS_NV12]; /* Y U/V */ -+ int ret, i; -+ -+ for (i = 0; i < NUM_CANVAS_NV12; ++i) { -+ ret = canvas_alloc(sess, &canvas_id[i]); -+ if (ret) -+ return ret; -+ -+ buf_paddr[i] = -+ vb2_dma_contig_plane_dma_addr(vb, i); -+ } -+ -+ /* Y plane */ -+ meson_canvas_config(core->canvas, canvas_id[0], buf_paddr[0], -+ width, height, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ -+ /* U/V plane */ -+ meson_canvas_config(core->canvas, canvas_id[1], buf_paddr[1], -+ width, height / 2, MESON_CANVAS_WRAP_NONE, -+ MESON_CANVAS_BLKMODE_LINEAR, -+ MESON_CANVAS_ENDIAN_SWAP64); -+ -+ amvdec_write_dos(core, reg, -+ ((canvas_id[1]) << 16) | -+ ((canvas_id[1]) << 8) | -+ (canvas_id[0])); -+ -+ return 0; -+} -+ -+int amvdec_set_canvases(struct amvdec_session *sess, -+ u32 reg_base[], u32 reg_num[]) -+{ -+ struct v4l2_m2m_buffer *buf; -+ u32 pixfmt = sess->pixfmt_cap; -+ u32 width = ALIGN(sess->width, 64); -+ u32 height = ALIGN(sess->height, 64); -+ u32 reg_cur = reg_base[0]; -+ u32 reg_num_cur = 0; -+ u32 reg_base_cur = 0; -+ int ret; -+ -+ v4l2_m2m_for_each_dst_buf(sess->m2m_ctx, buf) { -+ if (!reg_base[reg_base_cur]) -+ return -EINVAL; -+ -+ reg_cur = reg_base[reg_base_cur] + reg_num_cur * 4; -+ -+ switch (pixfmt) { -+ case V4L2_PIX_FMT_NV12M: -+ ret = set_canvas_nv12m(sess, &buf->vb.vb2_buf, width, -+ height, reg_cur); -+ if (ret) -+ return ret; -+ break; -+ case V4L2_PIX_FMT_YUV420M: -+ ret = set_canvas_yuv420m(sess, &buf->vb.vb2_buf, width, -+ height, reg_cur); -+ if (ret) -+ return ret; -+ break; -+ default: -+ dev_err(sess->core->dev, "Unsupported pixfmt %08X\n", -+ pixfmt); -+ return -EINVAL; -+ }; -+ -+ reg_num_cur++; -+ if (reg_num_cur >= reg_num[reg_base_cur]) { -+ reg_base_cur++; -+ reg_num_cur = 0; -+ } -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(amvdec_set_canvases); -+ -+void amvdec_add_ts_reorder(struct amvdec_session *sess, u64 ts, u32 offset) -+{ -+ struct amvdec_timestamp *new_ts, *tmp; -+ unsigned long flags; -+ -+ new_ts = kmalloc(sizeof(*new_ts), GFP_KERNEL); -+ new_ts->ts = ts; -+ new_ts->offset = offset; -+ -+ spin_lock_irqsave(&sess->ts_spinlock, flags); -+ -+ if (list_empty(&sess->timestamps)) -+ goto add_tail; -+ -+ list_for_each_entry(tmp, &sess->timestamps, list) { -+ if (ts <= tmp->ts) { -+ list_add_tail(&new_ts->list, &tmp->list); -+ goto unlock; -+ } -+ } -+ -+add_tail: -+ list_add_tail(&new_ts->list, &sess->timestamps); -+unlock: -+ spin_unlock_irqrestore(&sess->ts_spinlock, flags); -+} -+EXPORT_SYMBOL_GPL(amvdec_add_ts_reorder); -+ -+void amvdec_remove_ts(struct amvdec_session *sess, u64 ts) -+{ -+ struct amvdec_timestamp *tmp; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sess->ts_spinlock, flags); -+ list_for_each_entry(tmp, &sess->timestamps, list) { -+ if (tmp->ts == ts) { -+ list_del(&tmp->list); -+ kfree(tmp); -+ goto unlock; -+ } -+ } -+ dev_warn(sess->core->dev_dec, -+ "Couldn't remove buffer with timestamp %llu from list\n", ts); -+ -+unlock: -+ spin_unlock_irqrestore(&sess->ts_spinlock, flags); -+} -+EXPORT_SYMBOL_GPL(amvdec_remove_ts); -+ -+static void dst_buf_done(struct amvdec_session *sess, -+ struct vb2_v4l2_buffer *vbuf, -+ u32 field, -+ u64 timestamp) -+{ -+ struct device *dev = sess->core->dev_dec; -+ u32 output_size = amvdec_get_output_size(sess); -+ -+ switch (sess->pixfmt_cap) { -+ case V4L2_PIX_FMT_NV12M: -+ vbuf->vb2_buf.planes[0].bytesused = output_size; -+ vbuf->vb2_buf.planes[1].bytesused = output_size / 2; -+ break; -+ case V4L2_PIX_FMT_YUV420M: -+ vbuf->vb2_buf.planes[0].bytesused = output_size; -+ vbuf->vb2_buf.planes[1].bytesused = output_size / 4; -+ vbuf->vb2_buf.planes[2].bytesused = output_size / 4; -+ break; -+ } -+ -+ vbuf->vb2_buf.timestamp = timestamp; -+ vbuf->sequence = sess->sequence_cap++; -+ -+ if (sess->should_stop && -+ atomic_read(&sess->esparser_queued_bufs) <= 2) { -+ const struct v4l2_event ev = { .type = V4L2_EVENT_EOS }; -+ -+ dev_dbg(dev, "Signaling EOS\n"); -+ v4l2_event_queue_fh(&sess->fh, &ev); -+ vbuf->flags |= V4L2_BUF_FLAG_LAST; -+ } else if (sess->should_stop) -+ dev_dbg(dev, "should_stop, %u bufs remain\n", -+ atomic_read(&sess->esparser_queued_bufs)); -+ -+ dev_dbg(dev, "Buffer %u done\n", vbuf->vb2_buf.index); -+ vbuf->field = field; -+ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE); -+ -+ /* Buffer done probably means the vififo got freed */ -+ schedule_work(&sess->esparser_queue_work); -+} -+ -+void amvdec_dst_buf_done(struct amvdec_session *sess, -+ struct vb2_v4l2_buffer *vbuf, u32 field) -+{ -+ struct device *dev = sess->core->dev_dec; -+ struct amvdec_timestamp *tmp; -+ struct list_head *timestamps = &sess->timestamps; -+ u64 timestamp; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sess->ts_spinlock, flags); -+ if (list_empty(timestamps)) { -+ dev_err(dev, "Buffer %u done but list is empty\n", -+ vbuf->vb2_buf.index); -+ -+ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); -+ spin_unlock_irqrestore(&sess->ts_spinlock, flags); -+ return; -+ } -+ -+ tmp = list_first_entry(timestamps, struct amvdec_timestamp, list); -+ timestamp = tmp->ts; -+ list_del(&tmp->list); -+ kfree(tmp); -+ spin_unlock_irqrestore(&sess->ts_spinlock, flags); -+ -+ dst_buf_done(sess, vbuf, field, timestamp); -+ atomic_dec(&sess->esparser_queued_bufs); -+} -+EXPORT_SYMBOL_GPL(amvdec_dst_buf_done); -+ -+static void amvdec_dst_buf_done_offset(struct amvdec_session *sess, -+ struct vb2_v4l2_buffer *vbuf, -+ u32 offset, -+ u32 field) -+{ -+ struct device *dev = sess->core->dev_dec; -+ struct amvdec_timestamp *match = NULL; -+ struct amvdec_timestamp *tmp, *n; -+ u64 timestamp = 0; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sess->ts_spinlock, flags); -+ -+ /* Look for our vififo offset to get the corresponding timestamp. */ -+ list_for_each_entry_safe(tmp, n, &sess->timestamps, list) { -+ s64 delta = (s64)offset - tmp->offset; -+ -+ /* Offsets reported by codecs usually differ slightly, -+ * so we need some wiggle room. -+ * 4KiB being the minimum packet size, there is no risk here. -+ */ -+ if (delta > (-1 * (s32)SZ_4K) && delta < SZ_4K) { -+ match = tmp; -+ break; -+ } -+ -+ /* Delete any timestamp entry that appears before our target -+ * (not all src packets/timestamps lead to a frame) -+ */ -+ if (delta > 0 || delta < -1 * (s32)sess->vififo_size) { -+ atomic_dec(&sess->esparser_queued_bufs); -+ list_del(&tmp->list); -+ kfree(tmp); -+ } -+ } -+ -+ if (!match) { -+ dev_dbg(dev, "Buffer %u done but can't match offset (%08X)\n", -+ vbuf->vb2_buf.index, offset); -+ } else { -+ timestamp = match->ts; -+ list_del(&match->list); -+ kfree(match); -+ } -+ spin_unlock_irqrestore(&sess->ts_spinlock, flags); -+ -+ dst_buf_done(sess, vbuf, field, timestamp); -+ if (match) -+ atomic_dec(&sess->esparser_queued_bufs); -+} -+ -+void amvdec_dst_buf_done_idx(struct amvdec_session *sess, -+ u32 buf_idx, u32 offset, u32 field) -+{ -+ struct vb2_v4l2_buffer *vbuf; -+ struct device *dev = sess->core->dev_dec; -+ -+ vbuf = v4l2_m2m_dst_buf_remove_by_idx(sess->m2m_ctx, buf_idx); -+ if (!vbuf) { -+ dev_err(dev, -+ "Buffer %u done but it doesn't exist in m2m_ctx\n", -+ buf_idx); -+ return; -+ } -+ -+ if (offset != -1) -+ amvdec_dst_buf_done_offset(sess, vbuf, offset, field); -+ else -+ amvdec_dst_buf_done(sess, vbuf, field); -+} -+EXPORT_SYMBOL_GPL(amvdec_dst_buf_done_idx); -+ -+void amvdec_set_par_from_dar(struct amvdec_session *sess, -+ u32 dar_num, u32 dar_den) -+{ -+ u32 div; -+ -+ sess->pixelaspect.numerator = sess->height * dar_num; -+ sess->pixelaspect.denominator = sess->width * dar_den; -+ div = gcd(sess->pixelaspect.numerator, sess->pixelaspect.denominator); -+ sess->pixelaspect.numerator /= div; -+ sess->pixelaspect.denominator /= div; -+} -+EXPORT_SYMBOL_GPL(amvdec_set_par_from_dar); -+ -+void amvdec_abort(struct amvdec_session *sess) -+{ -+ dev_info(sess->core->dev, "Aborting decoding session!\n"); -+ vb2_queue_error(&sess->m2m_ctx->cap_q_ctx.q); -+ vb2_queue_error(&sess->m2m_ctx->out_q_ctx.q); -+} -+EXPORT_SYMBOL_GPL(amvdec_abort); -diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.h b/drivers/media/platform/meson/vdec/vdec_helpers.h -new file mode 100644 -index 000000000000..b9250a8157c4 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_helpers.h -@@ -0,0 +1,48 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_HELPERS_H_ -+#define __MESON_VDEC_HELPERS_H_ -+ -+#include "vdec.h" -+ -+/** -+ * amvdec_set_canvases() - Map VB2 buffers to canvases -+ * -+ * @sess: current session -+ * @reg_base: Registry bases of where to write the canvas indexes -+ * @reg_num: number of contiguous registers after each reg_base (including it) -+ */ -+int amvdec_set_canvases(struct amvdec_session *sess, -+ u32 reg_base[], u32 reg_num[]); -+ -+u32 amvdec_read_dos(struct amvdec_core *core, u32 reg); -+void amvdec_write_dos(struct amvdec_core *core, u32 reg, u32 val); -+void amvdec_write_dos_bits(struct amvdec_core *core, u32 reg, u32 val); -+void amvdec_clear_dos_bits(struct amvdec_core *core, u32 reg, u32 val); -+u32 amvdec_read_parser(struct amvdec_core *core, u32 reg); -+void amvdec_write_parser(struct amvdec_core *core, u32 reg, u32 val); -+ -+void amvdec_dst_buf_done_idx(struct amvdec_session *sess, u32 buf_idx, -+ u32 offset, u32 field); -+void amvdec_dst_buf_done(struct amvdec_session *sess, -+ struct vb2_v4l2_buffer *vbuf, u32 field); -+ -+/** -+ * amvdec_add_ts_reorder() - Add a timestamp to the list in chronological order -+ * -+ * @sess: current session -+ * @ts: timestamp to add -+ * @offset: offset in the VIFIFO where the associated packet was written -+ */ -+void amvdec_add_ts_reorder(struct amvdec_session *sess, u64 ts, u32 offset); -+void amvdec_remove_ts(struct amvdec_session *sess, u64 ts); -+ -+void amvdec_set_par_from_dar(struct amvdec_session *sess, -+ u32 dar_num, u32 dar_den); -+ -+void amvdec_abort(struct amvdec_session *sess); -+#endif -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c -new file mode 100644 -index 000000000000..46eeb7426f54 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_platform.c -@@ -0,0 +1,101 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#include "vdec_platform.h" -+#include "vdec.h" -+ -+#include "vdec_1.h" -+#include "codec_mpeg12.h" -+ -+static const struct amvdec_format vdec_formats_gxbb[] = { -+ { -+ .pixfmt = V4L2_PIX_FMT_MPEG1, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_MPEG2, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, -+}; -+ -+static const struct amvdec_format vdec_formats_gxl[] = { -+ { -+ .pixfmt = V4L2_PIX_FMT_MPEG1, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_MPEG2, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, -+}; -+ -+static const struct amvdec_format vdec_formats_gxm[] = { -+ { -+ .pixfmt = V4L2_PIX_FMT_MPEG1, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_MPEG2, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg12_ops, -+ .firmware_path = "meson/gx/vmpeg12_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, -+}; -+ -+const struct vdec_platform vdec_platform_gxbb = { -+ .formats = vdec_formats_gxbb, -+ .num_formats = ARRAY_SIZE(vdec_formats_gxbb), -+ .revision = VDEC_REVISION_GXBB, -+}; -+ -+const struct vdec_platform vdec_platform_gxl = { -+ .formats = vdec_formats_gxl, -+ .num_formats = ARRAY_SIZE(vdec_formats_gxl), -+ .revision = VDEC_REVISION_GXL, -+}; -+ -+const struct vdec_platform vdec_platform_gxm = { -+ .formats = vdec_formats_gxm, -+ .num_formats = ARRAY_SIZE(vdec_formats_gxm), -+ .revision = VDEC_REVISION_GXM, -+}; -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.h b/drivers/media/platform/meson/vdec/vdec_platform.h -new file mode 100644 -index 000000000000..f6025326db1d ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_platform.h -@@ -0,0 +1,30 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 BayLibre, SAS -+ * Author: Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_PLATFORM_H_ -+#define __MESON_VDEC_PLATFORM_H_ -+ -+#include "vdec.h" -+ -+struct amvdec_format; -+ -+enum vdec_revision { -+ VDEC_REVISION_GXBB, -+ VDEC_REVISION_GXL, -+ VDEC_REVISION_GXM, -+}; -+ -+struct vdec_platform { -+ const struct amvdec_format *formats; -+ const u32 num_formats; -+ enum vdec_revision revision; -+}; -+ -+extern const struct vdec_platform vdec_platform_gxbb; -+extern const struct vdec_platform vdec_platform_gxm; -+extern const struct vdec_platform vdec_platform_gxl; -+ -+#endif --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch b/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch deleted file mode 100644 index f243cd27b..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0031-MAINTAINERS-Add-meson-video-decoder.patch +++ /dev/null @@ -1,34 +0,0 @@ -From c8482bffc8ced44e3e22f403413b23c7b20af1be Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Tue, 4 Sep 2018 10:07:08 +0200 -Subject: [PATCH 31/53] MAINTAINERS: Add meson video decoder - -Add an entry for the meson video decoder for amlogic SoCs. - -Signed-off-by: Maxime Jourdan ---- - MAINTAINERS | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/MAINTAINERS b/MAINTAINERS -index 11a59e82d92e..d2c0c0f8b406 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -9526,6 +9526,14 @@ F: drivers/media/platform/meson/ao-cec.c - F: Documentation/devicetree/bindings/media/meson-ao-cec.txt - T: git git://linuxtv.org/media_tree.git - -+MESON VIDEO DECODER DRIVER FOR AMLOGIC SOCS -+M: Maxime Jourdan -+L: linux-media@lists.freedesktop.org -+L: linux-amlogic@lists.infradead.org -+S: Supported -+F: drivers/media/platform/meson/vdec/ -+T: git git://linuxtv.org/media_tree.git -+ - MICROBLAZE ARCHITECTURE - M: Michal Simek - W: http://www.monstr.eu/fdt/ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch b/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch deleted file mode 100644 index 0e4dc0070..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0032-arm64-dts-meson-gx-add-vdec-entry.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 91e2dc23af4fb673e609a4fddf2b813ea3f833b8 Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 29 Aug 2018 15:24:02 +0200 -Subject: [PATCH 32/53] arm64: dts: meson-gx: add vdec entry - -Add the video decoder dts entry - -Signed-off-by: Maxime Jourdan ---- - arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index 5012607c95d2..5d2820ef9a88 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -445,6 +445,20 @@ - }; - }; - -+ vdec: video-decoder@c8820000 { -+ compatible = "amlogic,gx-vdec"; -+ reg = <0x0 0xc8820000 0x0 0x10000>, -+ <0x0 0xc110a580 0x0 0xe4>; -+ reg-names = "dos", "esparser"; -+ -+ interrupts = , -+ ; -+ interrupt-names = "vdec", "esparser"; -+ -+ amlogic,ao-sysctrl = <&sysctrl_AO>; -+ amlogic,canvas = <&canvas>; -+ }; -+ - periphs: periphs@c8834000 { - compatible = "simple-bus"; - reg = <0x0 0xc8834000 0x0 0x2000>; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch b/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch deleted file mode 100644 index 06f40c051..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0033-arm64-dts-meson-add-vdec-entries.patch +++ /dev/null @@ -1,65 +0,0 @@ -From f9f1d0b0b197f94502ea2a13a27d6d4534f8150f Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 29 Aug 2018 15:24:22 +0200 -Subject: [PATCH 33/53] arm64: dts: meson: add vdec entries - -This enables the video decoder for gxbb, gxl and gxm chips - -Signed-off-by: Maxime Jourdan ---- - arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++++++++++ - arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 ++++++++++ - arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 4 ++++ - 3 files changed, 24 insertions(+) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -index 2a4d506bad4e..96145e49ea44 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi -@@ -814,3 +814,13 @@ - power-domains = <&pwrc_vpu>; - }; - -+&vdec { -+ compatible = "amlogic,gxbb-vdec"; -+ clocks = <&clkc CLKID_DOS_PARSER>, -+ <&clkc CLKID_DOS>, -+ <&clkc CLKID_VDEC_1>, -+ <&clkc CLKID_VDEC_HEVC>; -+ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; -+ resets = <&reset RESET_PARSER>; -+ reset-names = "esparser"; -+}; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -index 9f4b6185a61d..6ca93ae1e496 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi -@@ -814,3 +814,13 @@ - power-domains = <&pwrc_vpu>; - }; - -+&vdec { -+ compatible = "amlogic,gxl-vdec"; -+ clocks = <&clkc CLKID_DOS_PARSER>, -+ <&clkc CLKID_DOS>, -+ <&clkc CLKID_VDEC_1>, -+ <&clkc CLKID_VDEC_HEVC>; -+ clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc"; -+ resets = <&reset RESET_PARSER>; -+ reset-names = "esparser"; -+}; -diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi -index 247888d68a3a..2f356495be5e 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi -@@ -117,3 +117,7 @@ - &dwc3 { - phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; - }; -+ -+&vdec { -+ compatible = "amlogic,gxm-vdec"; -+}; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch b/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch deleted file mode 100644 index d9ec6cdb7..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0034-meson-vdec-introduce-controls-and-V4L2_CID_MIN_BUFFE.patch +++ /dev/null @@ -1,156 +0,0 @@ -From c5ad2d518874fe080e249c2a11497064c28d9b1b Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 10 Oct 2018 17:22:27 +0200 -Subject: [PATCH 34/53] meson: vdec: introduce controls and - V4L2_CID_MIN_BUFFERS_FOR_CAPTURE - ---- - drivers/media/platform/meson/vdec/Makefile | 2 +- - drivers/media/platform/meson/vdec/vdec.c | 7 +++ - drivers/media/platform/meson/vdec/vdec.h | 2 + - .../media/platform/meson/vdec/vdec_ctrls.c | 45 +++++++++++++++++++ - .../media/platform/meson/vdec/vdec_ctrls.h | 8 ++++ - 5 files changed, 63 insertions(+), 1 deletion(-) - create mode 100644 drivers/media/platform/meson/vdec/vdec_ctrls.c - create mode 100644 drivers/media/platform/meson/vdec/vdec_ctrls.h - -diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile -index 6bea129084b7..eba86083aadb 100644 ---- a/drivers/media/platform/meson/vdec/Makefile -+++ b/drivers/media/platform/meson/vdec/Makefile -@@ -1,7 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - # Makefile for Amlogic meson video decoder driver - --meson-vdec-objs = esparser.o vdec.o vdec_helpers.o vdec_platform.o -+meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o - meson-vdec-objs += vdec_1.o - meson-vdec-objs += codec_mpeg12.o - -diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c -index d8db52c01fbe..1c5d3e912bee 100644 ---- a/drivers/media/platform/meson/vdec/vdec.c -+++ b/drivers/media/platform/meson/vdec/vdec.c -@@ -21,6 +21,7 @@ - #include "vdec.h" - #include "esparser.h" - #include "vdec_helpers.h" -+#include "vdec_ctrls.h" - - struct dummy_buf { - struct vb2_v4l2_buffer vb; -@@ -290,6 +291,7 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) - sess->keyframe_found = 0; - sess->last_offset = 0; - sess->wrap_count = 0; -+ sess->dpb_size = 0; - sess->pixelaspect.numerator = 1; - sess->pixelaspect.denominator = 1; - atomic_set(&sess->esparser_queued_bufs, 0); -@@ -812,6 +814,10 @@ static int vdec_open(struct file *file) - goto err_m2m_release; - } - -+ ret = amvdec_init_ctrls(&sess->ctrl_handler); -+ if (ret) -+ goto err_m2m_release; -+ - sess->pixfmt_cap = formats[0].pixfmts_cap[0]; - sess->fmt_out = &formats[0]; - sess->width = 1280; -@@ -827,6 +833,7 @@ static int vdec_open(struct file *file) - spin_lock_init(&sess->ts_spinlock); - - v4l2_fh_init(&sess->fh, core->vdev_dec); -+ sess->fh.ctrl_handler = &sess->ctrl_handler; - v4l2_fh_add(&sess->fh); - sess->fh.m2m_ctx = sess->m2m_ctx; - file->private_data = &sess->fh; -diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h -index 4e8c3f1742ac..6be7de2849b6 100644 ---- a/drivers/media/platform/meson/vdec/vdec.h -+++ b/drivers/media/platform/meson/vdec/vdec.h -@@ -203,6 +203,7 @@ struct amvdec_session { - struct v4l2_fh fh; - struct v4l2_m2m_dev *m2m_dev; - struct v4l2_m2m_ctx *m2m_ctx; -+ struct v4l2_ctrl_handler ctrl_handler; - struct mutex lock; - - const struct amvdec_format *fmt_out; -@@ -242,6 +243,7 @@ struct amvdec_session { - u64 last_irq_jiffies; - u32 last_offset; - u32 wrap_count; -+ u32 dpb_size; - - void *priv; - }; -diff --git a/drivers/media/platform/meson/vdec/vdec_ctrls.c b/drivers/media/platform/meson/vdec/vdec_ctrls.c -new file mode 100644 -index 000000000000..cd6dd6d87172 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_ctrls.c -@@ -0,0 +1,45 @@ -+#include "vdec_ctrls.h" -+ -+static int vdec_op_g_volatile_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct amvdec_session *sess = -+ container_of(ctrl->handler, struct amvdec_session, ctrl_handler); -+ -+ switch (ctrl->id) { -+ case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: -+ ctrl->val = sess->dpb_size; -+ break; -+ default: -+ return -EINVAL; -+ }; -+ -+ return 0; -+} -+ -+static const struct v4l2_ctrl_ops vdec_ctrl_ops = { -+ .g_volatile_ctrl = vdec_op_g_volatile_ctrl, -+}; -+ -+int amvdec_init_ctrls(struct v4l2_ctrl_handler *ctrl_handler) -+{ -+ int ret; -+ struct v4l2_ctrl *ctrl; -+ -+ ret = v4l2_ctrl_handler_init(ctrl_handler, 1); -+ if (ret) -+ return ret; -+ -+ ctrl = v4l2_ctrl_new_std(ctrl_handler, &vdec_ctrl_ops, -+ V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 1); -+ if (ctrl) -+ ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; -+ -+ ret = ctrl_handler->error; -+ if (ret) { -+ v4l2_ctrl_handler_free(ctrl_handler); -+ return ret; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(amvdec_init_ctrls); -diff --git a/drivers/media/platform/meson/vdec/vdec_ctrls.h b/drivers/media/platform/meson/vdec/vdec_ctrls.h -new file mode 100644 -index 000000000000..4bcc5e68865c ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/vdec_ctrls.h -@@ -0,0 +1,8 @@ -+#ifndef __MESON_VDEC_CTRLS_H_ -+#define __MESON_VDEC_CTRLS_H_ -+ -+#include "vdec.h" -+ -+int amvdec_init_ctrls(struct v4l2_ctrl_handler *ctrl_handler); -+ -+#endif --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch b/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch deleted file mode 100644 index fbda82ca1..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0035-media-videodev2-add-V4L2_FMT_FLAG_NO_SOURCE_CHANGE.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 2688d1304cbb41d4e2c8514ec2bdcd2b48f2f88a Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Thu, 4 Oct 2018 15:37:39 +0200 -Subject: [PATCH 35/53] media: videodev2: add V4L2_FMT_FLAG_NO_SOURCE_CHANGE - -When a v4l2 driver exposes V4L2_EVENT_SOURCE_CHANGE, some (usually -OUTPUT) formats may not be able to trigger this event. - -Add a enum_fmt format flag to tag those specific formats. - -Signed-off-by: Maxime Jourdan ---- - Documentation/media/uapi/v4l/vidioc-enum-fmt.rst | 5 +++++ - include/uapi/linux/videodev2.h | 5 +++-- - 2 files changed, 8 insertions(+), 2 deletions(-) - -diff --git a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst b/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst -index 019c513df217..e0040b36ac43 100644 ---- a/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst -+++ b/Documentation/media/uapi/v4l/vidioc-enum-fmt.rst -@@ -116,6 +116,11 @@ one until ``EINVAL`` is returned. - - This format is not native to the device but emulated through - software (usually libv4l2), where possible try to use a native - format instead for better performance. -+ * - ``V4L2_FMT_FLAG_NO_SOURCE_CHANGE`` -+ - 0x0004 -+ - The event ``V4L2_EVENT_SOURCE_CHANGE`` is not supported -+ for this format. -+ - - - Return Value -diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h -index 1aae2e4b8f10..f44bdef62d0b 100644 ---- a/include/uapi/linux/videodev2.h -+++ b/include/uapi/linux/videodev2.h -@@ -733,8 +733,9 @@ struct v4l2_fmtdesc { - __u32 reserved[4]; - }; - --#define V4L2_FMT_FLAG_COMPRESSED 0x0001 --#define V4L2_FMT_FLAG_EMULATED 0x0002 -+#define V4L2_FMT_FLAG_COMPRESSED 0x0001 -+#define V4L2_FMT_FLAG_EMULATED 0x0002 -+#define V4L2_FMT_FLAG_NO_SOURCE_CHANGE 0x0004 - - /* Frame Size and frame rate enumeration */ - /* --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch b/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch deleted file mode 100644 index 69d7299f6..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0036-meson-vdec-allow-subscribing-to-V4L2_EVENT_SOURCE_CH.patch +++ /dev/null @@ -1,273 +0,0 @@ -From b1d313fb821e3a4196bb32c86c585b8be23d491a Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 10 Oct 2018 15:44:56 +0200 -Subject: [PATCH 36/53] meson: vdec: allow subscribing to - V4L2_EVENT_SOURCE_CHANGE - -Flag MPEG1/MPEG2 as NO_SOURCE_CHANGE. ---- - drivers/media/platform/meson/vdec/vdec.c | 20 +++++++++++-- - drivers/media/platform/meson/vdec/vdec.h | 13 +++++++++ - .../media/platform/meson/vdec/vdec_helpers.c | 28 +++++++++++++++++++ - .../media/platform/meson/vdec/vdec_helpers.h | 1 + - .../media/platform/meson/vdec/vdec_platform.c | 6 ++++ - 5 files changed, 66 insertions(+), 2 deletions(-) - -diff --git a/drivers/media/platform/meson/vdec/vdec.c b/drivers/media/platform/meson/vdec/vdec.c -index 1c5d3e912bee..ca6404546eb8 100644 ---- a/drivers/media/platform/meson/vdec/vdec.c -+++ b/drivers/media/platform/meson/vdec/vdec.c -@@ -230,7 +230,8 @@ static int vdec_queue_setup(struct vb2_queue *q, - * are free to choose any of them to write frames to. As such, - * we need all of them to be queued into the driver - */ -- q->min_buffers_needed = q->num_buffers + *num_buffers; -+ sess->num_dst_bufs = q->num_buffers + *num_buffers; -+ q->min_buffers_needed = sess->num_dst_bufs; - break; - default: - return -EINVAL; -@@ -260,6 +261,7 @@ static void vdec_vb2_buf_queue(struct vb2_buffer *vb) - static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) - { - struct amvdec_session *sess = vb2_get_drv_priv(q); -+ struct amvdec_codec_ops *codec_ops = sess->fmt_out->codec_ops; - struct amvdec_core *core = sess->core; - struct vb2_v4l2_buffer *buf; - int ret; -@@ -277,6 +279,13 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) - if (!sess->streamon_out || !sess->streamon_cap) - return 0; - -+ if (sess->status == STATUS_NEEDS_RESUME && -+ q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { -+ codec_ops->resume(sess); -+ sess->status = STATUS_RUNNING; -+ return 0; -+ } -+ - sess->vififo_size = SIZE_VIFIFO; - sess->vififo_vaddr = - dma_alloc_coherent(sess->core->dev, sess->vififo_size, -@@ -305,6 +314,7 @@ static int vdec_start_streaming(struct vb2_queue *q, unsigned int count) - sess->recycle_thread = kthread_run(vdec_recycle_thread, sess, - "vdec_recycle"); - -+ sess->status = STATUS_RUNNING; - core->cur_sess = sess; - - return 0; -@@ -362,7 +372,9 @@ static void vdec_stop_streaming(struct vb2_queue *q) - struct amvdec_core *core = sess->core; - struct vb2_v4l2_buffer *buf; - -- if (sess->streamon_out && sess->streamon_cap) { -+ if (sess->status == STATUS_RUNNING || -+ (sess->status == STATUS_NEEDS_RESUME && -+ (!sess->streamon_out || !sess->streamon_cap))) { - if (vdec_codec_needs_recycle(sess)) - kthread_stop(sess->recycle_thread); - -@@ -375,6 +387,7 @@ static void vdec_stop_streaming(struct vb2_queue *q) - kfree(sess->priv); - sess->priv = NULL; - core->cur_sess = NULL; -+ sess->status = STATUS_STOPPED; - } - - if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { -@@ -611,6 +624,7 @@ static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f) - - fmt_out = &platform->formats[f->index]; - f->pixelformat = fmt_out->pixfmt; -+ f->flags = fmt_out->flags; - } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { - fmt_out = sess->fmt_out; - if (f->index >= 4 || !fmt_out->pixfmts_cap[f->index]) -@@ -703,6 +717,8 @@ static int vdec_subscribe_event(struct v4l2_fh *fh, - switch (sub->type) { - case V4L2_EVENT_EOS: - return v4l2_event_subscribe(fh, sub, 2, NULL); -+ case V4L2_EVENT_SOURCE_CHANGE: -+ return v4l2_src_change_event_subscribe(fh, sub); - default: - return -EINVAL; - } -diff --git a/drivers/media/platform/meson/vdec/vdec.h b/drivers/media/platform/meson/vdec/vdec.h -index 6be7de2849b6..8f8ce629c698 100644 ---- a/drivers/media/platform/meson/vdec/vdec.h -+++ b/drivers/media/platform/meson/vdec/vdec.h -@@ -101,6 +101,7 @@ struct amvdec_ops { - u32 (*vififo_level)(struct amvdec_session *sess); - }; - -+ - /** - * struct amvdec_codec_ops - codec operations - * -@@ -127,6 +128,7 @@ struct amvdec_codec_ops { - int (*can_recycle)(struct amvdec_core *core); - void (*recycle)(struct amvdec_core *core, u32 buf_idx); - void (*drain)(struct amvdec_session *sess); -+ void (*resume)(struct amvdec_session *sess); - const u8 * (*eos_sequence)(u32 *len); - irqreturn_t (*isr)(struct amvdec_session *sess); - irqreturn_t (*threaded_isr)(struct amvdec_session *sess); -@@ -140,6 +142,7 @@ struct amvdec_codec_ops { - * @max_buffers: maximum amount of CAPTURE (dst) buffers - * @max_width: maximum picture width supported - * @max_height: maximum picture height supported -+ * @flags: enum flags associated with this pixfmt - * @vdec_ops: the VDEC operations that support this format - * @codec_ops: the codec operations that support this format - * @firmware_path: Path to the firmware that supports this format -@@ -151,6 +154,7 @@ struct amvdec_format { - u32 max_buffers; - u32 max_width; - u32 max_height; -+ u32 flags; - - struct amvdec_ops *vdec_ops; - struct amvdec_codec_ops *codec_ops; -@@ -159,6 +163,12 @@ struct amvdec_format { - u32 pixfmts_cap[4]; - }; - -+enum amvdec_status { -+ STATUS_STOPPED, -+ STATUS_RUNNING, -+ STATUS_NEEDS_RESUME, -+}; -+ - /** - * struct amvdec_session - decoding session parameters - * -@@ -195,6 +205,7 @@ struct amvdec_format { - * @timestamps: chronological list of src timestamps - * @ts_spinlock: spinlock for the timestamps list - * @last_irq_jiffies: tracks last time the vdec triggered an IRQ -+ * @status: current decoding status - * @priv: codec private data - */ - struct amvdec_session { -@@ -225,6 +236,7 @@ struct amvdec_session { - unsigned int sequence_cap; - unsigned int should_stop; - unsigned int keyframe_found; -+ unsigned int num_dst_bufs; - - u8 canvas_alloc[MAX_CANVAS]; - u32 canvas_num; -@@ -245,6 +257,7 @@ struct amvdec_session { - u32 wrap_count; - u32 dpb_size; - -+ enum amvdec_status status; - void *priv; - }; - -diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.c b/drivers/media/platform/meson/vdec/vdec_helpers.c -index 02090c5b089e..b982b2869fd2 100644 ---- a/drivers/media/platform/meson/vdec/vdec_helpers.c -+++ b/drivers/media/platform/meson/vdec/vdec_helpers.c -@@ -403,6 +403,34 @@ void amvdec_set_par_from_dar(struct amvdec_session *sess, - } - EXPORT_SYMBOL_GPL(amvdec_set_par_from_dar); - -+void amvdec_src_change(struct amvdec_session *sess, u32 width, u32 height, u32 dpb_size) -+{ -+ static const struct v4l2_event ev = { -+ .type = V4L2_EVENT_SOURCE_CHANGE, -+ .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION }; -+ -+ sess->dpb_size = dpb_size; -+ -+ /* Check if the capture queue is already configured well for our -+ * usecase. If so, keep decoding with it and do not send the event -+ */ -+ if (sess->width == width && -+ sess->height == height && -+ dpb_size <= sess->num_dst_bufs) { -+ sess->fmt_out->codec_ops->resume(sess); -+ return; -+ } -+ -+ sess->width = width; -+ sess->height = height; -+ sess->status = STATUS_NEEDS_RESUME; -+ -+ dev_dbg(sess->core->dev, "Res. changed (%ux%u), DPB size %u\n", -+ width, height, dpb_size); -+ v4l2_event_queue_fh(&sess->fh, &ev); -+} -+EXPORT_SYMBOL_GPL(amvdec_src_change); -+ - void amvdec_abort(struct amvdec_session *sess) - { - dev_info(sess->core->dev, "Aborting decoding session!\n"); -diff --git a/drivers/media/platform/meson/vdec/vdec_helpers.h b/drivers/media/platform/meson/vdec/vdec_helpers.h -index b9250a8157c4..060799b5e4d4 100644 ---- a/drivers/media/platform/meson/vdec/vdec_helpers.h -+++ b/drivers/media/platform/meson/vdec/vdec_helpers.h -@@ -44,5 +44,6 @@ void amvdec_remove_ts(struct amvdec_session *sess, u64 ts); - void amvdec_set_par_from_dar(struct amvdec_session *sess, - u32 dar_num, u32 dar_den); - -+void amvdec_src_change(struct amvdec_session *sess, u32 width, u32 height, u32 dpb_size); - void amvdec_abort(struct amvdec_session *sess); - #endif -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c -index 46eeb7426f54..291f1eeb27d9 100644 ---- a/drivers/media/platform/meson/vdec/vdec_platform.c -+++ b/drivers/media/platform/meson/vdec/vdec_platform.c -@@ -17,6 +17,7 @@ static const struct amvdec_format vdec_formats_gxbb[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", -@@ -27,6 +28,7 @@ static const struct amvdec_format vdec_formats_gxbb[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", -@@ -41,6 +43,7 @@ static const struct amvdec_format vdec_formats_gxl[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", -@@ -51,6 +54,7 @@ static const struct amvdec_format vdec_formats_gxl[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", -@@ -65,6 +69,7 @@ static const struct amvdec_format vdec_formats_gxm[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", -@@ -75,6 +80,7 @@ static const struct amvdec_format vdec_formats_gxm[] = { - .max_buffers = 8, - .max_width = 1920, - .max_height = 1080, -+ .flags = V4L2_FMT_FLAG_NO_SOURCE_CHANGE, - .vdec_ops = &vdec_1_ops, - .codec_ops = &codec_mpeg12_ops, - .firmware_path = "meson/gx/vmpeg12_mc", --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch deleted file mode 100644 index ea4486e36..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0037-media-meson-vdec-add-H.264-decoding-support.patch +++ /dev/null @@ -1,593 +0,0 @@ -From fecc45672255e63d4e99b9eaf24ac00083a5d4b6 Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 29 Aug 2018 15:42:56 +0200 -Subject: [PATCH 37/53] media: meson: vdec: add H.264 decoding support - -Add support for V4L2_PIX_FMT_H264 ---- - drivers/media/platform/meson/vdec/Makefile | 2 +- - .../media/platform/meson/vdec/codec_h264.c | 478 ++++++++++++++++++ - .../media/platform/meson/vdec/codec_h264.h | 13 + - .../media/platform/meson/vdec/vdec_platform.c | 31 ++ - 4 files changed, 523 insertions(+), 1 deletion(-) - create mode 100644 drivers/media/platform/meson/vdec/codec_h264.c - create mode 100644 drivers/media/platform/meson/vdec/codec_h264.h - -diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile -index eba86083aadb..01dc9603abdd 100644 ---- a/drivers/media/platform/meson/vdec/Makefile -+++ b/drivers/media/platform/meson/vdec/Makefile -@@ -3,6 +3,6 @@ - - meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o - meson-vdec-objs += vdec_1.o --meson-vdec-objs += codec_mpeg12.o -+meson-vdec-objs += codec_mpeg12.o codec_h264.o - - obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o -diff --git a/drivers/media/platform/meson/vdec/codec_h264.c b/drivers/media/platform/meson/vdec/codec_h264.c -new file mode 100644 -index 000000000000..6ac0115afaa3 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_h264.c -@@ -0,0 +1,478 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#include -+#include -+ -+#include "vdec_helpers.h" -+#include "dos_regs.h" -+ -+#define SIZE_EXT_FW (20 * SZ_1K) -+#define SIZE_WORKSPACE 0x1ee000 -+#define SIZE_SEI (8 * SZ_1K) -+ -+/* Offset added by the firmware which must be substracted -+ * from the workspace phyaddr -+ */ -+#define WORKSPACE_BUF_OFFSET 0x1000000 -+ -+/* ISR status */ -+#define CMD_MASK GENMASK(7, 0) -+#define CMD_SRC_CHANGE 1 -+#define CMD_FRAMES_READY 2 -+#define CMD_FATAL_ERROR 6 -+#define CMD_BAD_WIDTH 7 -+#define CMD_BAD_HEIGHT 8 -+ -+#define SEI_DATA_READY BIT(15) -+ -+/* Picture type */ -+#define PIC_TOP_BOT 5 -+#define PIC_BOT_TOP 6 -+ -+/* Size of Motion Vector per macroblock */ -+#define MB_MV_SIZE 96 -+ -+/* Frame status data */ -+#define PIC_STRUCT_BIT 5 -+#define PIC_STRUCT_MASK GENMASK(2, 0) -+#define BUF_IDX_MASK GENMASK(4, 0) -+#define ERROR_FLAG BIT(9) -+#define OFFSET_BIT 16 -+#define OFFSET_MASK GENMASK(15, 0) -+ -+/* Bitstream parsed data */ -+#define MB_TOTAL_BIT 8 -+#define MB_TOTAL_MASK GENMASK(15, 0) -+#define MB_WIDTH_MASK GENMASK(7, 0) -+#define MAX_REF_BIT 24 -+#define MAX_REF_MASK GENMASK(6, 0) -+#define AR_IDC_BIT 16 -+#define AR_IDC_MASK GENMASK(7, 0) -+#define AR_PRESENT_FLAG BIT(0) -+#define AR_EXTEND 0xff -+ -+/* Buffer to send to the ESPARSER to signal End Of Stream for H.264. -+ * This is a 16x16 encoded picture that will trigger drain firmware-side. -+ * There is no known alternative. -+ */ -+static const u8 eos_sequence[SZ_1K] = { -+ 0x00, 0x00, 0x00, 0x01, 0x06, 0x05, 0xff, 0xe4, 0xdc, 0x45, 0xe9, 0xbd, -+ 0xe6, 0xd9, 0x48, 0xb7, 0x96, 0x2c, 0xd8, 0x20, 0xd9, 0x23, 0xee, 0xef, -+ 0x78, 0x32, 0x36, 0x34, 0x20, 0x2d, 0x20, 0x63, 0x6f, 0x72, 0x65, 0x20, -+ 0x36, 0x37, 0x20, 0x72, 0x31, 0x31, 0x33, 0x30, 0x20, 0x38, 0x34, 0x37, -+ 0x35, 0x39, 0x37, 0x37, 0x20, 0x2d, 0x20, 0x48, 0x2e, 0x32, 0x36, 0x34, -+ 0x2f, 0x4d, 0x50, 0x45, 0x47, 0x2d, 0x34, 0x20, 0x41, 0x56, 0x43, 0x20, -+ 0x63, 0x6f, 0x64, 0x65, 0x63, 0x20, 0x2d, 0x20, 0x43, 0x6f, 0x70, 0x79, -+ 0x6c, 0x65, 0x66, 0x74, 0x20, 0x32, 0x30, 0x30, 0x33, 0x2d, 0x32, 0x30, -+ 0x30, 0x39, 0x20, 0x2d, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, -+ 0x77, 0x77, 0x77, 0x2e, 0x76, 0x69, 0x64, 0x65, 0x6f, 0x6c, 0x61, 0x6e, -+ 0x2e, 0x6f, 0x72, 0x67, 0x2f, 0x78, 0x32, 0x36, 0x34, 0x2e, 0x68, 0x74, -+ 0x6d, 0x6c, 0x20, 0x2d, 0x20, 0x6f, 0x70, 0x74, 0x69, 0x6f, 0x6e, 0x73, -+ 0x3a, 0x20, 0x63, 0x61, 0x62, 0x61, 0x63, 0x3d, 0x31, 0x20, 0x72, 0x65, -+ 0x66, 0x3d, 0x31, 0x20, 0x64, 0x65, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x3d, -+ 0x31, 0x3a, 0x30, 0x3a, 0x30, 0x20, 0x61, 0x6e, 0x61, 0x6c, 0x79, 0x73, -+ 0x65, 0x3d, 0x30, 0x78, 0x31, 0x3a, 0x30, 0x78, 0x31, 0x31, 0x31, 0x20, -+ 0x6d, 0x65, 0x3d, 0x68, 0x65, 0x78, 0x20, 0x73, 0x75, 0x62, 0x6d, 0x65, -+ 0x3d, 0x36, 0x20, 0x70, 0x73, 0x79, 0x5f, 0x72, 0x64, 0x3d, 0x31, 0x2e, -+ 0x30, 0x3a, 0x30, 0x2e, 0x30, 0x20, 0x6d, 0x69, 0x78, 0x65, 0x64, 0x5f, -+ 0x72, 0x65, 0x66, 0x3d, 0x30, 0x20, 0x6d, 0x65, 0x5f, 0x72, 0x61, 0x6e, -+ 0x67, 0x65, 0x3d, 0x31, 0x36, 0x20, 0x63, 0x68, 0x72, 0x6f, 0x6d, 0x61, -+ 0x5f, 0x6d, 0x65, 0x3d, 0x31, 0x20, 0x74, 0x72, 0x65, 0x6c, 0x6c, 0x69, -+ 0x73, 0x3d, 0x30, 0x20, 0x38, 0x78, 0x38, 0x64, 0x63, 0x74, 0x3d, 0x30, -+ 0x20, 0x63, 0x71, 0x6d, 0x3d, 0x30, 0x20, 0x64, 0x65, 0x61, 0x64, 0x7a, -+ 0x6f, 0x6e, 0x65, 0x3d, 0x32, 0x31, 0x2c, 0x31, 0x31, 0x20, 0x63, 0x68, -+ 0x72, 0x6f, 0x6d, 0x61, 0x5f, 0x71, 0x70, 0x5f, 0x6f, 0x66, 0x66, 0x73, -+ 0x65, 0x74, 0x3d, 0x2d, 0x32, 0x20, 0x74, 0x68, 0x72, 0x65, 0x61, 0x64, -+ 0x73, 0x3d, 0x31, 0x20, 0x6e, 0x72, 0x3d, 0x30, 0x20, 0x64, 0x65, 0x63, -+ 0x69, 0x6d, 0x61, 0x74, 0x65, 0x3d, 0x31, 0x20, 0x6d, 0x62, 0x61, 0x66, -+ 0x66, 0x3d, 0x30, 0x20, 0x62, 0x66, 0x72, 0x61, 0x6d, 0x65, 0x73, 0x3d, -+ 0x30, 0x20, 0x6b, 0x65, 0x79, 0x69, 0x6e, 0x74, 0x3d, 0x32, 0x35, 0x30, -+ 0x20, 0x6b, 0x65, 0x79, 0x69, 0x6e, 0x74, 0x5f, 0x6d, 0x69, 0x6e, 0x3d, -+ 0x32, 0x35, 0x20, 0x73, 0x63, 0x65, 0x6e, 0x65, 0x63, 0x75, 0x74, 0x3d, -+ 0x34, 0x30, 0x20, 0x72, 0x63, 0x3d, 0x61, 0x62, 0x72, 0x20, 0x62, 0x69, -+ 0x74, 0x72, 0x61, 0x74, 0x65, 0x3d, 0x31, 0x30, 0x20, 0x72, 0x61, 0x74, -+ 0x65, 0x74, 0x6f, 0x6c, 0x3d, 0x31, 0x2e, 0x30, 0x20, 0x71, 0x63, 0x6f, -+ 0x6d, 0x70, 0x3d, 0x30, 0x2e, 0x36, 0x30, 0x20, 0x71, 0x70, 0x6d, 0x69, -+ 0x6e, 0x3d, 0x31, 0x30, 0x20, 0x71, 0x70, 0x6d, 0x61, 0x78, 0x3d, 0x35, -+ 0x31, 0x20, 0x71, 0x70, 0x73, 0x74, 0x65, 0x70, 0x3d, 0x34, 0x20, 0x69, -+ 0x70, 0x5f, 0x72, 0x61, 0x74, 0x69, 0x6f, 0x3d, 0x31, 0x2e, 0x34, 0x30, -+ 0x20, 0x61, 0x71, 0x3d, 0x31, 0x3a, 0x31, 0x2e, 0x30, 0x30, 0x00, 0x80, -+ 0x00, 0x00, 0x00, 0x01, 0x67, 0x4d, 0x40, 0x0a, 0x9a, 0x74, 0xf4, 0x20, -+ 0x00, 0x00, 0x03, 0x00, 0x20, 0x00, 0x00, 0x06, 0x51, 0xe2, 0x44, 0xd4, -+ 0x00, 0x00, 0x00, 0x01, 0x68, 0xee, 0x32, 0xc8, 0x00, 0x00, 0x00, 0x01, -+ 0x65, 0x88, 0x80, 0x20, 0x00, 0x08, 0x7f, 0xea, 0x6a, 0xe2, 0x99, 0xb6, -+ 0x57, 0xae, 0x49, 0x30, 0xf5, 0xfe, 0x5e, 0x46, 0x0b, 0x72, 0x44, 0xc4, -+ 0xe1, 0xfc, 0x62, 0xda, 0xf1, 0xfb, 0xa2, 0xdb, 0xd6, 0xbe, 0x5c, 0xd7, -+ 0x24, 0xa3, 0xf5, 0xb9, 0x2f, 0x57, 0x16, 0x49, 0x75, 0x47, 0x77, 0x09, -+ 0x5c, 0xa1, 0xb4, 0xc3, 0x4f, 0x60, 0x2b, 0xb0, 0x0c, 0xc8, 0xd6, 0x66, -+ 0xba, 0x9b, 0x82, 0x29, 0x33, 0x92, 0x26, 0x99, 0x31, 0x1c, 0x7f, 0x9b -+}; -+ -+static const u8 *codec_h264_eos_sequence(u32 *len) -+{ -+ *len = ARRAY_SIZE(eos_sequence); -+ return eos_sequence; -+} -+ -+struct codec_h264 { -+ /* H.264 decoder requires an extended firmware */ -+ void *ext_fw_vaddr; -+ dma_addr_t ext_fw_paddr; -+ -+ /* Buffer for the H.264 Workspace */ -+ void *workspace_vaddr; -+ dma_addr_t workspace_paddr; -+ -+ /* Buffer for the H.264 references MV */ -+ void *ref_vaddr; -+ dma_addr_t ref_paddr; -+ u32 ref_size; -+ -+ /* Buffer for parsed SEI data */ -+ void *sei_vaddr; -+ dma_addr_t sei_paddr; -+ -+ u32 mb_width; -+ u32 mb_height; -+ u32 max_refs; -+}; -+ -+static int codec_h264_can_recycle(struct amvdec_core *core) -+{ -+ return !amvdec_read_dos(core, AV_SCRATCH_7) || -+ !amvdec_read_dos(core, AV_SCRATCH_8); -+} -+ -+static void codec_h264_recycle(struct amvdec_core *core, u32 buf_idx) -+{ -+ /* Tell the decoder he can recycle this buffer. -+ * AV_SCRATCH_8 serves the same purpose. -+ */ -+ if (!amvdec_read_dos(core, AV_SCRATCH_7)) -+ amvdec_write_dos(core, AV_SCRATCH_7, buf_idx + 1); -+ else -+ amvdec_write_dos(core, AV_SCRATCH_8, buf_idx + 1); -+} -+ -+static int codec_h264_start(struct amvdec_session *sess) { -+ u32 workspace_offset; -+ struct amvdec_core *core = sess->core; -+ struct codec_h264 *h264 = sess->priv; -+ -+ /* Allocate some memory for the H.264 decoder's state */ -+ h264->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, -+ &h264->workspace_paddr, GFP_KERNEL); -+ if (!h264->workspace_vaddr) { -+ dev_err(core->dev, "Failed to alloc H.264 Workspace\n"); -+ return -ENOMEM; -+ } -+ -+ /* Allocate some memory for the H.264 SEI dump */ -+ h264->sei_vaddr = dma_alloc_coherent(core->dev, SIZE_SEI, -+ &h264->sei_paddr, GFP_KERNEL); -+ if (!h264->sei_vaddr) { -+ dev_err(core->dev, "Failed to alloc H.264 SEI\n"); -+ return -ENOMEM; -+ } -+ -+ amvdec_write_dos_bits(core, POWER_CTL_VLD, BIT(9) | BIT(6)); -+ -+ workspace_offset = h264->workspace_paddr - WORKSPACE_BUF_OFFSET; -+ amvdec_write_dos(core, AV_SCRATCH_1, workspace_offset); -+ amvdec_write_dos(core, AV_SCRATCH_G, h264->ext_fw_paddr); -+ amvdec_write_dos(core, AV_SCRATCH_I, h264->sei_paddr - workspace_offset); -+ -+ /* Enable "error correction" */ -+ amvdec_write_dos(core, AV_SCRATCH_F, -+ (amvdec_read_dos(core, AV_SCRATCH_F) & 0xffffffc3) | -+ BIT(4) | BIT(7)); -+ -+ amvdec_write_dos(core, MDEC_PIC_DC_THRESH, 0x404038aa); -+ -+ return 0; -+} -+ -+static int codec_h264_stop(struct amvdec_session *sess) -+{ -+ struct codec_h264 *h264 = sess->priv; -+ struct amvdec_core *core = sess->core; -+ -+ if (h264->ext_fw_vaddr) -+ dma_free_coherent(core->dev, SIZE_EXT_FW, -+ h264->ext_fw_vaddr, h264->ext_fw_paddr); -+ -+ if (h264->workspace_vaddr) -+ dma_free_coherent(core->dev, SIZE_WORKSPACE, -+ h264->workspace_vaddr, h264->workspace_paddr); -+ -+ if (h264->ref_vaddr) -+ dma_free_coherent(core->dev, h264->ref_size, -+ h264->ref_vaddr, h264->ref_paddr); -+ -+ if (h264->sei_vaddr) -+ dma_free_coherent(core->dev, SIZE_SEI, -+ h264->sei_vaddr, h264->sei_paddr); -+ -+ return 0; -+} -+ -+static int codec_h264_load_extended_firmware(struct amvdec_session *sess, -+ const u8 *data, u32 len) -+{ -+ struct codec_h264 *h264; -+ struct amvdec_core *core = sess->core; -+ -+ if (len < SIZE_EXT_FW) -+ return -EINVAL; -+ -+ h264 = kzalloc(sizeof(*h264), GFP_KERNEL); -+ if (!h264) -+ return -ENOMEM; -+ -+ h264->ext_fw_vaddr = dma_alloc_coherent(core->dev, SIZE_EXT_FW, -+ &h264->ext_fw_paddr, GFP_KERNEL); -+ if (!h264->ext_fw_vaddr) { -+ dev_err(core->dev, "Failed to alloc H.264 extended fw\n"); -+ kfree(h264); -+ return -ENOMEM; -+ } -+ -+ memcpy(h264->ext_fw_vaddr, data, SIZE_EXT_FW); -+ sess->priv = h264; -+ -+ return 0; -+} -+ -+static const struct v4l2_fract par_table[] = { -+ { 1, 1 }, { 1, 1 }, { 12, 11 }, { 10, 11 }, -+ { 16, 11 }, { 40, 33 }, { 24, 11 }, { 20, 11 }, -+ { 32, 11 }, { 80, 33 }, { 18, 11 }, { 15, 11 }, -+ { 64, 33 }, { 160, 99 }, { 4, 3 }, { 3, 2 }, -+ { 2, 1 } -+}; -+ -+static void codec_h264_set_par(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 seq_info = amvdec_read_dos(core, AV_SCRATCH_2); -+ u32 ar_idc = (seq_info >> AR_IDC_BIT) & AR_IDC_MASK; -+ -+ if (!(seq_info & AR_PRESENT_FLAG)) -+ return; -+ -+ if (ar_idc == AR_EXTEND) { -+ u32 ar_info = amvdec_read_dos(core, AV_SCRATCH_3); -+ sess->pixelaspect.numerator = ar_info & 0xffff; -+ sess->pixelaspect.denominator = (ar_info >> 16) & 0xffff; -+ return; -+ } -+ -+ if (ar_idc >= ARRAY_SIZE(par_table)) -+ return; -+ -+ sess->pixelaspect = par_table[ar_idc]; -+} -+ -+static void codec_h264_resume(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ struct codec_h264 *h264 = sess->priv; -+ u32 mb_width, mb_height, mb_total; -+ -+ amvdec_set_canvases(sess, (u32[]){ ANC0_CANVAS_ADDR, 0 }, -+ (u32[]){ 24, 0 }); -+ -+ dev_dbg(core->dev, -+ "max_refs = %u; actual_dpb_size = %u\n", -+ h264->max_refs, sess->num_dst_bufs); -+ -+ /* Align to a multiple of 4 macroblocks */ -+ mb_width = ALIGN(h264->mb_width, 4); -+ mb_height = ALIGN(h264->mb_height, 4); -+ mb_total = mb_width * mb_height; -+ -+ h264->ref_size = mb_total * MB_MV_SIZE * h264->max_refs; -+ h264->ref_vaddr = dma_alloc_coherent(core->dev, h264->ref_size, -+ &h264->ref_paddr, GFP_KERNEL); -+ if (!h264->ref_vaddr) { -+ dev_err(core->dev, "Failed to alloc refs (%u)\n", -+ h264->ref_size); -+ amvdec_abort(sess); -+ return; -+ } -+ -+ /* Address to store the references' MVs */ -+ amvdec_write_dos(core, AV_SCRATCH_1, h264->ref_paddr); -+ /* End of ref MV */ -+ amvdec_write_dos(core, AV_SCRATCH_4, h264->ref_paddr + h264->ref_size); -+ -+ amvdec_write_dos(core, AV_SCRATCH_0, (h264->max_refs << 24) | -+ (sess->num_dst_bufs << 16) | -+ ((h264->max_refs - 1) << 8)); -+} -+ -+/* Configure the H.264 decoder when the parser detected a parameter set change -+ */ -+static void codec_h264_src_change(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ struct codec_h264 *h264 = sess->priv; -+ u32 parsed_info, mb_total; -+ u32 crop_infor, crop_bottom, crop_right; -+ u32 frame_width, frame_height; -+ -+ sess->keyframe_found = 1; -+ -+ parsed_info = amvdec_read_dos(core, AV_SCRATCH_1); -+ -+ /* Total number of 16x16 macroblocks */ -+ mb_total = (parsed_info >> MB_TOTAL_BIT) & MB_TOTAL_MASK; -+ /* Number of macroblocks per line */ -+ h264->mb_width = parsed_info & MB_WIDTH_MASK; -+ /* Number of macroblock lines */ -+ h264->mb_height = mb_total / h264->mb_width; -+ -+ h264->max_refs = ((parsed_info >> MAX_REF_BIT) & MAX_REF_MASK) + 1; -+ -+ crop_infor = amvdec_read_dos(core, AV_SCRATCH_6); -+ crop_bottom = (crop_infor & 0xff); -+ crop_right = (crop_infor >> 16) & 0xff; -+ -+ frame_width = h264->mb_width * 16 - crop_right; -+ frame_height = h264->mb_height * 16 - crop_bottom; -+ -+ dev_info(core->dev, "frame: %ux%u; crop: %u %u\n", -+ frame_width, frame_height, crop_right, crop_bottom); -+ -+ codec_h264_set_par(sess); -+ amvdec_src_change(sess, frame_width, frame_height, h264->max_refs + 5); -+} -+ -+/** -+ * The offset is split in half in 2 different registers -+ */ -+static u32 get_offset_msb(struct amvdec_core *core, int frame_num) -+{ -+ int take_msb = frame_num % 2; -+ int reg_offset = (frame_num / 2) * 4; -+ u32 offset_msb = amvdec_read_dos(core, AV_SCRATCH_A + reg_offset); -+ -+ if (take_msb) -+ return offset_msb & 0xffff0000; -+ -+ return (offset_msb & 0x0000ffff) << 16; -+} -+ -+static void codec_h264_frames_ready(struct amvdec_session *sess, u32 status) -+{ -+ struct amvdec_core *core = sess->core; -+ int error_count; -+ int num_frames; -+ int i; -+ -+ error_count = amvdec_read_dos(core, AV_SCRATCH_D); -+ num_frames = (status >> 8) & 0xff; -+ if (error_count) { -+ dev_warn(core->dev, -+ "decoder error(s) happened, count %d\n", error_count); -+ amvdec_write_dos(core, AV_SCRATCH_D, 0); -+ } -+ -+ for (i = 0; i < num_frames; i++) { -+ u32 frame_status = amvdec_read_dos(core, AV_SCRATCH_1 + i * 4); -+ u32 buffer_index = frame_status & BUF_IDX_MASK; -+ u32 pic_struct = (frame_status >> PIC_STRUCT_BIT) & -+ PIC_STRUCT_MASK; -+ u32 offset = (frame_status >> OFFSET_BIT) & OFFSET_MASK; -+ u32 field = V4L2_FIELD_NONE; -+ -+ /* A buffer decode error means it was decoded, -+ * but part of the picture will have artifacts. -+ * Typical reason is a temporarily corrupted bitstream -+ */ -+ if (frame_status & ERROR_FLAG) -+ dev_dbg(core->dev, "Buffer %d decode error\n", -+ buffer_index); -+ -+ if (pic_struct == PIC_TOP_BOT) -+ field = V4L2_FIELD_INTERLACED_TB; -+ else if (pic_struct == PIC_BOT_TOP) -+ field = V4L2_FIELD_INTERLACED_BT; -+ -+ offset |= get_offset_msb(core, i); -+ amvdec_dst_buf_done_idx(sess, buffer_index, offset, field); -+ } -+} -+ -+static irqreturn_t codec_h264_threaded_isr(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 status; -+ u32 size; -+ u8 cmd; -+ -+ status = amvdec_read_dos(core, AV_SCRATCH_0); -+ cmd = status & CMD_MASK; -+ -+ switch (cmd) { -+ case CMD_SRC_CHANGE: -+ codec_h264_src_change(sess); -+ break; -+ case CMD_FRAMES_READY: -+ codec_h264_frames_ready(sess, status); -+ break; -+ case CMD_FATAL_ERROR: -+ dev_err(core->dev, "H.264 decoder fatal error\n"); -+ goto abort; -+ case CMD_BAD_WIDTH: -+ size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16; -+ dev_err(core->dev, "Unsupported video width: %u\n", size); -+ goto abort; -+ case CMD_BAD_HEIGHT: -+ size = (amvdec_read_dos(core, AV_SCRATCH_1) + 1) * 16; -+ dev_err(core->dev, "Unsupported video height: %u\n", size); -+ goto abort; -+ case 0: /* Unused but not worth printing for */ -+ case 9: -+ break; -+ default: -+ dev_info(core->dev, "Unexpected H264 ISR: %08X\n", cmd); -+ break; -+ } -+ -+ if (cmd && cmd != CMD_SRC_CHANGE) -+ amvdec_write_dos(core, AV_SCRATCH_0, 0); -+ -+ /* Decoder has some SEI data for us ; ignore */ -+ if (amvdec_read_dos(core, AV_SCRATCH_J) & SEI_DATA_READY) -+ amvdec_write_dos(core, AV_SCRATCH_J, 0); -+ -+ return IRQ_HANDLED; -+abort: -+ amvdec_abort(sess); -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t codec_h264_isr(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ -+ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); -+ -+ return IRQ_WAKE_THREAD; -+} -+ -+struct amvdec_codec_ops codec_h264_ops = { -+ .start = codec_h264_start, -+ .stop = codec_h264_stop, -+ .load_extended_firmware = codec_h264_load_extended_firmware, -+ .isr = codec_h264_isr, -+ .threaded_isr = codec_h264_threaded_isr, -+ .can_recycle = codec_h264_can_recycle, -+ .recycle = codec_h264_recycle, -+ .eos_sequence = codec_h264_eos_sequence, -+ .resume = codec_h264_resume, -+}; -diff --git a/drivers/media/platform/meson/vdec/codec_h264.h b/drivers/media/platform/meson/vdec/codec_h264.h -new file mode 100644 -index 000000000000..7a1597611faf ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_h264.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_CODEC_H264_H_ -+#define __MESON_VDEC_CODEC_H264_H_ -+ -+#include "vdec.h" -+ -+extern struct amvdec_codec_ops codec_h264_ops; -+ -+#endif -\ No newline at end of file -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c -index 291f1eeb27d9..baecf5921d56 100644 ---- a/drivers/media/platform/meson/vdec/vdec_platform.c -+++ b/drivers/media/platform/meson/vdec/vdec_platform.c -@@ -9,9 +9,20 @@ - - #include "vdec_1.h" - #include "codec_mpeg12.h" -+#include "codec_h264.h" - - static const struct amvdec_format vdec_formats_gxbb[] = { - { -+ .pixfmt = V4L2_PIX_FMT_H264, -+ .min_buffers = 2, -+ .max_buffers = 24, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_h264_ops, -+ .firmware_path = "meson/gxbb/vh264_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG1, - .min_buffers = 8, - .max_buffers = 8, -@@ -38,6 +49,16 @@ static const struct amvdec_format vdec_formats_gxbb[] = { - - static const struct amvdec_format vdec_formats_gxl[] = { - { -+ .pixfmt = V4L2_PIX_FMT_H264, -+ .min_buffers = 2, -+ .max_buffers = 24, -+ .max_width = 3840, -+ .max_height = 2160, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_h264_ops, -+ .firmware_path = "meson/gxl/vh264_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG1, - .min_buffers = 8, - .max_buffers = 8, -@@ -64,6 +85,16 @@ static const struct amvdec_format vdec_formats_gxl[] = { - - static const struct amvdec_format vdec_formats_gxm[] = { - { -+ .pixfmt = V4L2_PIX_FMT_H264, -+ .min_buffers = 2, -+ .max_buffers = 24, -+ .max_width = 3840, -+ .max_height = 2160, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_h264_ops, -+ .firmware_path = "meson/gxm/vh264_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG1, - .min_buffers = 8, - .max_buffers = 8, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch deleted file mode 100644 index 0dbac0a1b..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0038-media-meson-vdec-add-MPEG4-decoding-support.patch +++ /dev/null @@ -1,315 +0,0 @@ -From cbb607b67a4a169b94884436208b05062bd2f93b Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Wed, 29 Aug 2018 16:01:55 +0200 -Subject: [PATCH 38/53] media: meson: vdec: add MPEG4 decoding support - -Add support for V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_XVID and -V4L2_PIX_FMT_H.263 ---- - drivers/media/platform/meson/vdec/Makefile | 2 +- - .../media/platform/meson/vdec/codec_mpeg4.c | 139 ++++++++++++++++++ - .../media/platform/meson/vdec/codec_mpeg4.h | 13 ++ - .../media/platform/meson/vdec/vdec_platform.c | 91 ++++++++++++ - 4 files changed, 244 insertions(+), 1 deletion(-) - create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg4.c - create mode 100644 drivers/media/platform/meson/vdec/codec_mpeg4.h - -diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile -index 01dc9603abdd..bb7a134e2728 100644 ---- a/drivers/media/platform/meson/vdec/Makefile -+++ b/drivers/media/platform/meson/vdec/Makefile -@@ -3,6 +3,6 @@ - - meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o - meson-vdec-objs += vdec_1.o --meson-vdec-objs += codec_mpeg12.o codec_h264.o -+meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o - - obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o -diff --git a/drivers/media/platform/meson/vdec/codec_mpeg4.c b/drivers/media/platform/meson/vdec/codec_mpeg4.c -new file mode 100644 -index 000000000000..1d574e576112 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mpeg4.c -@@ -0,0 +1,139 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#include -+#include -+ -+#include "vdec_helpers.h" -+#include "dos_regs.h" -+ -+#define SIZE_WORKSPACE SZ_1M -+/* Offset added by firmware, to substract from workspace paddr */ -+#define DCAC_BUFF_START_IP 0x02b00000 -+ -+/* map firmware registers to known MPEG4 functions */ -+#define MREG_BUFFERIN AV_SCRATCH_8 -+#define MREG_BUFFEROUT AV_SCRATCH_9 -+#define MP4_NOT_CODED_CNT AV_SCRATCH_A -+#define MP4_OFFSET_REG AV_SCRATCH_C -+#define MEM_OFFSET_REG AV_SCRATCH_F -+#define MREG_FATAL_ERROR AV_SCRATCH_L -+ -+#define BUF_IDX_MASK GENMASK(2, 0) -+#define INTERLACE_FLAG BIT(7) -+#define TOP_FIELD_FIRST_FLAG BIT(6) -+ -+struct codec_mpeg4 { -+ /* Buffer for the MPEG4 Workspace */ -+ void *workspace_vaddr; -+ dma_addr_t workspace_paddr; -+}; -+ -+static int codec_mpeg4_can_recycle(struct amvdec_core *core) -+{ -+ return !amvdec_read_dos(core, MREG_BUFFERIN); -+} -+ -+static void codec_mpeg4_recycle(struct amvdec_core *core, u32 buf_idx) -+{ -+ amvdec_write_dos(core, MREG_BUFFERIN, ~BIT(buf_idx)); -+} -+ -+static int codec_mpeg4_start(struct amvdec_session *sess) { -+ struct amvdec_core *core = sess->core; -+ struct codec_mpeg4 *mpeg4 = sess->priv; -+ int ret; -+ -+ mpeg4 = kzalloc(sizeof(*mpeg4), GFP_KERNEL); -+ if (!mpeg4) -+ return -ENOMEM; -+ -+ /* Allocate some memory for the MPEG4 decoder's state */ -+ mpeg4->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, -+ &mpeg4->workspace_paddr, -+ GFP_KERNEL); -+ if (!mpeg4->workspace_vaddr) { -+ dev_err(core->dev, "Failed to request MPEG4 Workspace\n"); -+ ret = -ENOMEM; -+ goto free_mpeg4; -+ } -+ -+ /* Canvas regs: AV_SCRATCH_0-AV_SCRATCH_4;AV_SCRATCH_G-AV_SCRATCH_J */ -+ amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_0, AV_SCRATCH_G, 0 }, -+ (u32[]){ 4, 4, 0 }); -+ -+ amvdec_write_dos(core, MEM_OFFSET_REG, -+ mpeg4->workspace_paddr - DCAC_BUFF_START_IP); -+ amvdec_write_dos(core, PSCALE_CTRL, 0); -+ amvdec_write_dos(core, MP4_NOT_CODED_CNT, 0); -+ amvdec_write_dos(core, MREG_BUFFERIN, 0); -+ amvdec_write_dos(core, MREG_BUFFEROUT, 0); -+ amvdec_write_dos(core, MREG_FATAL_ERROR, 0); -+ amvdec_write_dos(core, MDEC_PIC_DC_THRESH, 0x404038aa); -+ -+ sess->keyframe_found = 1; -+ sess->priv = mpeg4; -+ -+ return 0; -+ -+free_mpeg4: -+ kfree(mpeg4); -+ return ret; -+} -+ -+static int codec_mpeg4_stop(struct amvdec_session *sess) -+{ -+ struct codec_mpeg4 *mpeg4 = sess->priv; -+ struct amvdec_core *core = sess->core; -+ -+ if (mpeg4->workspace_vaddr) { -+ dma_free_coherent(core->dev, SIZE_WORKSPACE, -+ mpeg4->workspace_vaddr, -+ mpeg4->workspace_paddr); -+ mpeg4->workspace_vaddr = 0; -+ } -+ -+ return 0; -+} -+ -+static irqreturn_t codec_mpeg4_isr(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 reg; -+ u32 buffer_index; -+ u32 field = V4L2_FIELD_NONE; -+ -+ reg = amvdec_read_dos(core, MREG_FATAL_ERROR); -+ if (reg == 1) { -+ dev_err(core->dev, "mpeg4 fatal error\n"); -+ amvdec_abort(sess); -+ return IRQ_HANDLED; -+ } -+ -+ reg = amvdec_read_dos(core, MREG_BUFFEROUT); -+ if (!reg) -+ goto end; -+ -+ buffer_index = reg & BUF_IDX_MASK; -+ if (reg & INTERLACE_FLAG) -+ field = (reg & TOP_FIELD_FIRST_FLAG) ? -+ V4L2_FIELD_INTERLACED_TB : -+ V4L2_FIELD_INTERLACED_BT; -+ -+ amvdec_dst_buf_done_idx(sess, buffer_index, -1, field); -+ amvdec_write_dos(core, MREG_BUFFEROUT, 0); -+ -+end: -+ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); -+ return IRQ_HANDLED; -+} -+ -+struct amvdec_codec_ops codec_mpeg4_ops = { -+ .start = codec_mpeg4_start, -+ .stop = codec_mpeg4_stop, -+ .isr = codec_mpeg4_isr, -+ .can_recycle = codec_mpeg4_can_recycle, -+ .recycle = codec_mpeg4_recycle, -+}; -diff --git a/drivers/media/platform/meson/vdec/codec_mpeg4.h b/drivers/media/platform/meson/vdec/codec_mpeg4.h -new file mode 100644 -index 000000000000..b91b26413185 ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mpeg4.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_CODEC_MPEG4_H_ -+#define __MESON_VDEC_CODEC_MPEG4_H_ -+ -+#include "vdec.h" -+ -+extern struct amvdec_codec_ops codec_mpeg4_ops; -+ -+#endif -\ No newline at end of file -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c -index baecf5921d56..80b43fd5d01f 100644 ---- a/drivers/media/platform/meson/vdec/vdec_platform.c -+++ b/drivers/media/platform/meson/vdec/vdec_platform.c -@@ -10,9 +10,40 @@ - #include "vdec_1.h" - #include "codec_mpeg12.h" - #include "codec_h264.h" -+#include "codec_mpeg4.h" - - static const struct amvdec_format vdec_formats_gxbb[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MPEG4, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_H263, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/h263_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_XVID, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_H264, - .min_buffers = 2, - .max_buffers = 24, -@@ -49,6 +80,36 @@ static const struct amvdec_format vdec_formats_gxbb[] = { - - static const struct amvdec_format vdec_formats_gxl[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MPEG4, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_H263, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/h263_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_XVID, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_H264, - .min_buffers = 2, - .max_buffers = 24, -@@ -85,6 +146,36 @@ static const struct amvdec_format vdec_formats_gxl[] = { - - static const struct amvdec_format vdec_formats_gxm[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MPEG4, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_H263, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/h263_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { -+ .pixfmt = V4L2_PIX_FMT_XVID, -+ .min_buffers = 8, -+ .max_buffers = 8, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mpeg4_ops, -+ .firmware_path = "meson/gx/vmpeg4_mc_5", -+ .pixfmts_cap = { V4L2_PIX_FMT_NV12M, V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_H264, - .min_buffers = 2, - .max_buffers = 24, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch b/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch deleted file mode 100644 index 26f0758e6..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0039-media-meson-vdec-add-MJPEG-decoding-support.patch +++ /dev/null @@ -1,255 +0,0 @@ -From 1434c8fcc8ae00e748225ca4922c0d0b7bd15b02 Mon Sep 17 00:00:00 2001 -From: Maxime Jourdan -Date: Sun, 21 Oct 2018 15:14:27 +0200 -Subject: [PATCH 39/53] media: meson: vdec: add MJPEG decoding support - -Add support for V4L2_PIX_FMT_MJPEG ---- - drivers/media/platform/meson/vdec/Makefile | 2 +- - .../media/platform/meson/vdec/codec_mjpeg.c | 140 ++++++++++++++++++ - .../media/platform/meson/vdec/codec_mjpeg.h | 13 ++ - .../media/platform/meson/vdec/vdec_platform.c | 31 ++++ - 4 files changed, 185 insertions(+), 1 deletion(-) - create mode 100644 drivers/media/platform/meson/vdec/codec_mjpeg.c - create mode 100644 drivers/media/platform/meson/vdec/codec_mjpeg.h - -diff --git a/drivers/media/platform/meson/vdec/Makefile b/drivers/media/platform/meson/vdec/Makefile -index bb7a134e2728..acf07f3c3dac 100644 ---- a/drivers/media/platform/meson/vdec/Makefile -+++ b/drivers/media/platform/meson/vdec/Makefile -@@ -3,6 +3,6 @@ - - meson-vdec-objs = esparser.o vdec.o vdec_ctrls.o vdec_helpers.o vdec_platform.o - meson-vdec-objs += vdec_1.o --meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o -+meson-vdec-objs += codec_mpeg12.o codec_h264.o codec_mpeg4.o codec_mjpeg.o - - obj-$(CONFIG_VIDEO_MESON_VDEC) += meson-vdec.o -diff --git a/drivers/media/platform/meson/vdec/codec_mjpeg.c b/drivers/media/platform/meson/vdec/codec_mjpeg.c -new file mode 100644 -index 000000000000..abea9e3f944c ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mjpeg.c -@@ -0,0 +1,140 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#include -+#include -+ -+#include "vdec_helpers.h" -+#include "dos_regs.h" -+ -+/* map FW registers to known MJPEG functions */ -+#define MREG_DECODE_PARAM AV_SCRATCH_2 -+#define MREG_TO_AMRISC AV_SCRATCH_8 -+#define MREG_FROM_AMRISC AV_SCRATCH_9 -+#define MREG_FRAME_OFFSET AV_SCRATCH_A -+ -+static int codec_mjpeg_can_recycle(struct amvdec_core *core) -+{ -+ return !amvdec_read_dos(core, MREG_TO_AMRISC); -+} -+ -+static void codec_mjpeg_recycle(struct amvdec_core *core, u32 buf_idx) -+{ -+ amvdec_write_dos(core, MREG_TO_AMRISC, buf_idx + 1); -+} -+ -+/* 4 point triangle */ -+static const uint32_t filt_coef[] = { -+ 0x20402000, 0x20402000, 0x1f3f2101, 0x1f3f2101, -+ 0x1e3e2202, 0x1e3e2202, 0x1d3d2303, 0x1d3d2303, -+ 0x1c3c2404, 0x1c3c2404, 0x1b3b2505, 0x1b3b2505, -+ 0x1a3a2606, 0x1a3a2606, 0x19392707, 0x19392707, -+ 0x18382808, 0x18382808, 0x17372909, 0x17372909, -+ 0x16362a0a, 0x16362a0a, 0x15352b0b, 0x15352b0b, -+ 0x14342c0c, 0x14342c0c, 0x13332d0d, 0x13332d0d, -+ 0x12322e0e, 0x12322e0e, 0x11312f0f, 0x11312f0f, -+ 0x10303010 -+}; -+ -+static void codec_mjpeg_init_scaler(struct amvdec_core *core) -+{ -+ int i; -+ -+ /* PSCALE cbus bmem enable */ -+ amvdec_write_dos(core, PSCALE_CTRL, 0xc000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 0); -+ for (i = 0; i < ARRAY_SIZE(filt_coef); ++i) { -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, filt_coef[i]); -+ } -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 74); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 82); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 78); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 86); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x0008); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x60000000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 73); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 81); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); -+ -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 77); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); -+ amvdec_write_dos(core, PSCALE_BMEM_ADDR, 85); -+ amvdec_write_dos(core, PSCALE_BMEM_DAT, 0x10000); -+ -+ amvdec_write_dos(core, PSCALE_RST, 0x7); -+ amvdec_write_dos(core, PSCALE_RST, 0); -+} -+ -+static int codec_mjpeg_start(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ -+ amvdec_write_dos(core, AV_SCRATCH_0, 12); -+ amvdec_write_dos(core, AV_SCRATCH_1, 0x031a); -+ -+ amvdec_set_canvases(sess, (u32[]){ AV_SCRATCH_4, 0 }, -+ (u32[]){ 4, 0 }); -+ codec_mjpeg_init_scaler(core); -+ -+ amvdec_write_dos(core, MREG_TO_AMRISC, 0); -+ amvdec_write_dos(core, MREG_FROM_AMRISC, 0); -+ amvdec_write_dos(core, MCPU_INTR_MSK, 0xffff); -+ amvdec_write_dos(core, MREG_DECODE_PARAM, -+ (sess->height << 4) | 0x8000); -+ amvdec_write_dos(core, VDEC_ASSIST_AMR1_INT8, 8); -+ -+ /* Intra-only codec */ -+ sess->keyframe_found = 1; -+ -+ return 0; -+} -+ -+static int codec_mjpeg_stop(struct amvdec_session *sess) -+{ -+ return 0; -+} -+ -+static irqreturn_t codec_mjpeg_isr(struct amvdec_session *sess) -+{ -+ struct amvdec_core *core = sess->core; -+ u32 reg; -+ u32 buffer_index; -+ u32 offset; -+ -+ amvdec_write_dos(core, ASSIST_MBOX1_CLR_REG, 1); -+ -+ reg = amvdec_read_dos(core, MREG_FROM_AMRISC); -+ if (!(reg & 0x7)) -+ return IRQ_HANDLED; -+ -+ buffer_index = ((reg & 0x7) - 1) & 3; -+ offset = amvdec_read_dos(core, MREG_FRAME_OFFSET); -+ amvdec_dst_buf_done_idx(sess, buffer_index, offset, V4L2_FIELD_NONE); -+ -+ amvdec_write_dos(core, MREG_FROM_AMRISC, 0); -+ return IRQ_HANDLED; -+} -+ -+struct amvdec_codec_ops codec_mjpeg_ops = { -+ .start = codec_mjpeg_start, -+ .stop = codec_mjpeg_stop, -+ .isr = codec_mjpeg_isr, -+ .can_recycle = codec_mjpeg_can_recycle, -+ .recycle = codec_mjpeg_recycle, -+}; -diff --git a/drivers/media/platform/meson/vdec/codec_mjpeg.h b/drivers/media/platform/meson/vdec/codec_mjpeg.h -new file mode 100644 -index 000000000000..cc1cf731050d ---- /dev/null -+++ b/drivers/media/platform/meson/vdec/codec_mjpeg.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * Copyright (C) 2018 Maxime Jourdan -+ */ -+ -+#ifndef __MESON_VDEC_CODEC_MJPEG_H_ -+#define __MESON_VDEC_CODEC_MJPEG_H_ -+ -+#include "vdec.h" -+ -+extern struct amvdec_codec_ops codec_mjpeg_ops; -+ -+#endif -\ No newline at end of file -diff --git a/drivers/media/platform/meson/vdec/vdec_platform.c b/drivers/media/platform/meson/vdec/vdec_platform.c -index 80b43fd5d01f..61def155a5fd 100644 ---- a/drivers/media/platform/meson/vdec/vdec_platform.c -+++ b/drivers/media/platform/meson/vdec/vdec_platform.c -@@ -11,9 +11,20 @@ - #include "codec_mpeg12.h" - #include "codec_h264.h" - #include "codec_mpeg4.h" -+#include "codec_mjpeg.h" - - static const struct amvdec_format vdec_formats_gxbb[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MJPEG, -+ .min_buffers = 4, -+ .max_buffers = 4, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mjpeg_ops, -+ .firmware_path = "meson/gx/vmjpeg_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG4, - .min_buffers = 8, - .max_buffers = 8, -@@ -80,6 +91,16 @@ static const struct amvdec_format vdec_formats_gxbb[] = { - - static const struct amvdec_format vdec_formats_gxl[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MJPEG, -+ .min_buffers = 4, -+ .max_buffers = 4, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mjpeg_ops, -+ .firmware_path = "meson/gx/vmjpeg_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG4, - .min_buffers = 8, - .max_buffers = 8, -@@ -146,6 +167,16 @@ static const struct amvdec_format vdec_formats_gxl[] = { - - static const struct amvdec_format vdec_formats_gxm[] = { - { -+ .pixfmt = V4L2_PIX_FMT_MJPEG, -+ .min_buffers = 4, -+ .max_buffers = 4, -+ .max_width = 1920, -+ .max_height = 1080, -+ .vdec_ops = &vdec_1_ops, -+ .codec_ops = &codec_mjpeg_ops, -+ .firmware_path = "meson/gx/vmjpeg_mc", -+ .pixfmts_cap = { V4L2_PIX_FMT_YUV420M, 0 }, -+ }, { - .pixfmt = V4L2_PIX_FMT_MPEG4, - .min_buffers = 8, - .max_buffers = 8, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch b/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch deleted file mode 100644 index 8f6e7bfd9..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0040-clk-meson-gxbb-set-fclk_div3-as-CLK_IS_CRITICAL.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 8bb24f445a3b532a06a1d5bde70daad0c4f3da4f Mon Sep 17 00:00:00 2001 -From: Christian Hewitt -Date: Sat, 13 Oct 2018 14:04:46 +0400 -Subject: [PATCH 40/53] clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL - -On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems -with reboot; e.g. a ~60 second delay between issuing reboot and the -board power cycling (and in some OS configurations reboot will fail -and require manual power cycling). - -Similar to 'commit c987ac6f1f088663b6dad39281071aeb31d450a8 ("clk: -meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4 -Co-Processor seems to depend on FCLK_DIV3 being operational. - -Bisect gives 'commit 05f814402d6174369b3b29832cbb5eb5ed287059 ("clk: -meson: add fdiv clock gates") between 4.16 and 4.16-rc1 as the first -bad commit. This added support for the missing clock gates before the -fixed PLL fixed dividers (FCLK_DIVx) and the clock framework which -disabled all the unused fixed dividers, thus it disabled a critical -clock path for the SCPI Co-Processor. - -This change simply sets the FCLK_DIV3 gate as critical to ensure -nothing can disable it. - -Signed-off-by: Christian Hewitt ---- - drivers/clk/meson/gxbb.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c -index 4d4f6d842c31..a6fae1c00df3 100644 ---- a/drivers/clk/meson/gxbb.c -+++ b/drivers/clk/meson/gxbb.c -@@ -513,6 +513,7 @@ static struct clk_fixed_factor gxbb_fclk_div3_div = { - .ops = &clk_fixed_factor_ops, - .parent_names = (const char *[]){ "fixed_pll" }, - .num_parents = 1, -+ .flags = CLK_IS_CRITICAL, - }, - }; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch b/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch deleted file mode 100644 index 4dda76064..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0041-drm-meson-Add-HDMI-1.4-4k-modes.patch +++ /dev/null @@ -1,167 +0,0 @@ -From cb1d14ed8b5d2dc67b8d7769b5314fd5b9010f23 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Fri, 20 Jul 2018 15:29:18 +0200 -Subject: [PATCH 41/53] drm/meson: Add HDMI 1.4 4k modes - -Add the timings for the HDMI 1.4 4K modes support : -- 3840x2160@30 -- 3840x2160@25 -- 3840x2160@24 - -Since the 297000Hz pixel clock is already managed and the modes are -compatible with the HDMI 1.4 current HDMI PHY+Controller support, only -the missing timings values needs to be added. ---- - drivers/gpu/drm/meson/meson_venc.c | 129 +++++++++++++++++++++++++++++ - 1 file changed, 129 insertions(+) - -diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c -index 7a3a6ed9f27b..0fbe525b94c8 100644 ---- a/drivers/gpu/drm/meson/meson_venc.c -+++ b/drivers/gpu/drm/meson/meson_venc.c -@@ -698,6 +698,132 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = { - }, - }; - -+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p24 = { -+ .encp = { -+ .dvi_settings = 0x1, -+ .video_mode = 0x4040, -+ .video_mode_adv = 0x8, -+ /* video_sync_mode */ -+ /* video_yc_dly */ -+ /* video_rgb_ctrl */ -+ .video_filt_ctrl = 0x1000, -+ .video_filt_ctrl_present = true, -+ /* video_ofld_voav_ofst */ -+ .yfp1_htime = 140, -+ .yfp2_htime = 140+3840, -+ .max_pxcnt = 3840+1660-1, -+ .hspuls_begin = 2156+1920, -+ .hspuls_end = 44, -+ .hspuls_switch = 44, -+ .vspuls_begin = 140, -+ .vspuls_end = 2059+1920, -+ .vspuls_bline = 0, -+ .vspuls_eline = 4, -+ .havon_begin = 148, -+ .havon_end = 3987, -+ .vavon_bline = 89, -+ .vavon_eline = 2248, -+ /* eqpuls_begin */ -+ /* eqpuls_end */ -+ /* eqpuls_bline */ -+ /* eqpuls_eline */ -+ .hso_begin = 44, -+ .hso_end = 2156+1920, -+ .vso_begin = 2100+1920, -+ .vso_end = 2164+1920, -+ .vso_bline = 51, -+ .vso_eline = 53, -+ .vso_eline_present = true, -+ /* sy_val */ -+ /* sy2_val */ -+ .max_lncnt = 2249, -+ }, -+}; -+ -+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p25 = { -+ .encp = { -+ .dvi_settings = 0x1, -+ .video_mode = 0x4040, -+ .video_mode_adv = 0x8, -+ /* video_sync_mode */ -+ /* video_yc_dly */ -+ /* video_rgb_ctrl */ -+ .video_filt_ctrl = 0x1000, -+ .video_filt_ctrl_present = true, -+ /* video_ofld_voav_ofst */ -+ .yfp1_htime = 140, -+ .yfp2_htime = 140+3840, -+ .max_pxcnt = 3840+1440-1, -+ .hspuls_begin = 2156+1920, -+ .hspuls_end = 44, -+ .hspuls_switch = 44, -+ .vspuls_begin = 140, -+ .vspuls_end = 2059+1920, -+ .vspuls_bline = 0, -+ .vspuls_eline = 4, -+ .havon_begin = 148, -+ .havon_end = 3987, -+ .vavon_bline = 89, -+ .vavon_eline = 2248, -+ /* eqpuls_begin */ -+ /* eqpuls_end */ -+ /* eqpuls_bline */ -+ /* eqpuls_eline */ -+ .hso_begin = 44, -+ .hso_end = 2156+1920, -+ .vso_begin = 2100+1920, -+ .vso_end = 2164+1920, -+ .vso_bline = 51, -+ .vso_eline = 53, -+ .vso_eline_present = true, -+ /* sy_val */ -+ /* sy2_val */ -+ .max_lncnt = 2249, -+ }, -+}; -+ -+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p30 = { -+ .encp = { -+ .dvi_settings = 0x1, -+ .video_mode = 0x4040, -+ .video_mode_adv = 0x8, -+ /* video_sync_mode */ -+ /* video_yc_dly */ -+ /* video_rgb_ctrl */ -+ .video_filt_ctrl = 0x1000, -+ .video_filt_ctrl_present = true, -+ /* video_ofld_voav_ofst */ -+ .yfp1_htime = 140, -+ .yfp2_htime = 140+3840, -+ .max_pxcnt = 3840+560-1, -+ .hspuls_begin = 2156+1920, -+ .hspuls_end = 44, -+ .hspuls_switch = 44, -+ .vspuls_begin = 140, -+ .vspuls_end = 2059+1920, -+ .vspuls_bline = 0, -+ .vspuls_eline = 4, -+ .havon_begin = 148, -+ .havon_end = 3987, -+ .vavon_bline = 89, -+ .vavon_eline = 2248, -+ /* eqpuls_begin */ -+ /* eqpuls_end */ -+ /* eqpuls_bline */ -+ /* eqpuls_eline */ -+ .hso_begin = 44, -+ .hso_end = 2156+1920, -+ .vso_begin = 2100+1920, -+ .vso_end = 2164+1920, -+ .vso_bline = 51, -+ .vso_eline = 53, -+ .vso_eline_present = true, -+ /* sy_val */ -+ /* sy2_val */ -+ .max_lncnt = 2249, -+ }, -+}; -+ - struct meson_hdmi_venc_vic_mode { - unsigned int vic; - union meson_hdmi_venc_mode *mode; -@@ -719,6 +845,9 @@ struct meson_hdmi_venc_vic_mode { - { 34, &meson_hdmi_encp_mode_1080p30 }, - { 31, &meson_hdmi_encp_mode_1080p50 }, - { 16, &meson_hdmi_encp_mode_1080p60 }, -+ { 93, &meson_hdmi_encp_mode_2160p24 }, -+ { 94, &meson_hdmi_encp_mode_2160p25 }, -+ { 95, &meson_hdmi_encp_mode_2160p30 }, - { 0, NULL}, /* sentinel */ - }; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch b/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch deleted file mode 100644 index 2c37cd33c..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0042-drm-meson-Use-drm_fbdev_generic_setup.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 040f80b511f207308bbd7c177e148551cbd2c110 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Sat, 8 Sep 2018 15:46:33 +0200 -Subject: [PATCH 42/53] drm/meson: Use drm_fbdev_generic_setup() -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The CMA helper is already using the drm_fb_helper_generic_probe part of -the generic fbdev emulation. This patch makes full use of the generic -fbdev emulation by using its drm_client callbacks. This means that -drm_mode_config_funcs->output_poll_changed and drm_driver->lastclose are -now handled by the emulation code. Additionally fbdev unregister happens -automatically on drm_dev_unregister(). - -The drm_fbdev_generic_setup() call is put after drm_dev_register() in the -driver. This is done to highlight the fact that fbdev emulation is an -internal client that makes use of the driver, it is not part of the -driver as such. If fbdev setup fails, an error is printed, but the driver -succeeds probing. - -Cc: Neil Armstrong -Signed-off-by: Noralf Trønnes ---- - drivers/gpu/drm/meson/meson_drv.c | 18 ++---------------- - drivers/gpu/drm/meson/meson_drv.h | 1 - - 2 files changed, 2 insertions(+), 17 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c -index 63bb2727b183..a13704ab5d11 100644 ---- a/drivers/gpu/drm/meson/meson_drv.c -+++ b/drivers/gpu/drm/meson/meson_drv.c -@@ -69,15 +69,7 @@ - * - Powering Up HDMI controller and PHY - */ - --static void meson_fb_output_poll_changed(struct drm_device *dev) --{ -- struct meson_drm *priv = dev->dev_private; -- -- drm_fbdev_cma_hotplug_event(priv->fbdev); --} -- - static const struct drm_mode_config_funcs meson_mode_config_funcs = { -- .output_poll_changed = meson_fb_output_poll_changed, - .atomic_check = drm_atomic_helper_check, - .atomic_commit = drm_atomic_helper_commit, - .fb_create = drm_gem_fb_create, -@@ -319,13 +311,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - - drm_mode_config_reset(drm); - -- priv->fbdev = drm_fbdev_cma_init(drm, 32, -- drm->mode_config.num_connector); -- if (IS_ERR(priv->fbdev)) { -- ret = PTR_ERR(priv->fbdev); -- goto free_drm; -- } -- - drm_kms_helper_poll_init(drm); - - platform_set_drvdata(pdev, priv); -@@ -334,6 +319,8 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - if (ret) - goto uninstall_irq; - -+ drm_fbdev_generic_setup(drm, 32); -+ - return 0; - - uninstall_irq: -@@ -364,7 +351,6 @@ static void meson_drv_unbind(struct device *dev) - drm_dev_unregister(drm); - drm_irq_uninstall(drm); - drm_kms_helper_poll_fini(drm); -- drm_fbdev_cma_fini(priv->fbdev); - drm_mode_config_cleanup(drm); - drm_dev_put(drm); - -diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h -index a955354711ce..4dccf4cd042a 100644 ---- a/drivers/gpu/drm/meson/meson_drv.h -+++ b/drivers/gpu/drm/meson/meson_drv.h -@@ -40,7 +40,6 @@ struct meson_drm { - - struct drm_device *drm; - struct drm_crtc *crtc; -- struct drm_fbdev_cma *fbdev; - struct drm_plane *primary_plane; - struct drm_plane *overlay_plane; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch b/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch deleted file mode 100644 index 22fa32024..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0043-drm-bridge-dw-hdmi-Add-SCDC-and-TMDS-Scrambling-supp.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 3514e950490879dcdd75c74196e26eab8f5b740d Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 14 Nov 2018 16:48:50 +0100 -Subject: [PATCH 43/53] drm/bridge: dw-hdmi: Add SCDC and TMDS Scrambling - support - -Add support for SCDC Setup for TMDS Clock > 3.4GHz and enable TMDS -Scrambling when supported or mandatory. - -This patch also adds an helper to setup the control bit to support -the hight TMDS Bit Period/TMDS Clock-Period Ratio as required with -TMDS Clock > 3.4GHz for HDMI2.0 3840x2160@60/50 modes. - -These changes were based on work done by Huicong Xu -and Nickey Yang to support HDMI2.0 modes -on the Rockchip 4.4 BSP kernel at [1] - -[1] https://github.com/rockchip-linux/kernel/tree/release-4.4 - -Cc: Nickey Yang -Cc: Huicong Xu -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 45 +++++++++++++++++++++-- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 1 + - include/drm/bridge/dw_hdmi.h | 1 + - 3 files changed, 44 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 1fc12708dbb5..2a30d8393477 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - #include - - #include -@@ -1026,6 +1027,20 @@ void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, - } - EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write); - -+void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi) -+{ -+ unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mpixelclock; -+ -+ /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ -+ if (hdmi->connector.display_info.hdmi.scdc.supported) { -+ if (mtmdsclock > 340000000) -+ drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1); -+ else -+ drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 0); -+ } -+} -+EXPORT_SYMBOL_GPL(dw_hdmi_set_high_tmds_clock_ratio); -+ - static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable) - { - hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0, -@@ -1351,11 +1366,12 @@ static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) - - static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - { -+ bool is_hdmi2_sink = hdmi->connector.display_info.hdmi.scdc.supported; - struct hdmi_avi_infoframe frame; - u8 val; - - /* Initialise info frame from DRM mode */ -- drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, false); -+ drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2_sink); - - if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) - frame.colorspace = HDMI_COLORSPACE_YUV444; -@@ -1514,7 +1530,8 @@ static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi, - static void hdmi_av_composer(struct dw_hdmi *hdmi, - const struct drm_display_mode *mode) - { -- u8 inv_val; -+ u8 inv_val, bytes; -+ struct drm_hdmi_info *hdmi_info = &hdmi->connector.display_info.hdmi; - struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; - int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; - unsigned int vdisplay; -@@ -1524,7 +1541,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); - - /* Set up HDMI_FC_INVIDCONF */ -- inv_val = (hdmi->hdmi_data.hdcp_enable ? -+ inv_val = (hdmi->hdmi_data.hdcp_enable || -+ vmode->mpixelclock > 340000000 || -+ hdmi_info->scdc.scrambling.low_rates ? - HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE : - HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE); - -@@ -1573,6 +1592,26 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - vsync_len /= 2; - } - -+ /* Scrambling Control */ -+ if (hdmi_info->scdc.supported) { -+ if (vmode->mpixelclock > 340000000 || -+ hdmi_info->scdc.scrambling.low_rates) { -+ drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION, -+ &bytes); -+ drm_scdc_writeb(&hdmi->i2c->adap, SCDC_SOURCE_VERSION, -+ bytes); -+ drm_scdc_set_scrambling(&hdmi->i2c->adap, 1); -+ hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, -+ HDMI_MC_SWRSTZ); -+ hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL); -+ } else { -+ hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL); -+ hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, -+ HDMI_MC_SWRSTZ); -+ drm_scdc_set_scrambling(&hdmi->i2c->adap, 0); -+ } -+ } -+ - /* Set up horizontal active pixel width */ - hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); - hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h -index 9d90eb9c46e5..3f3c616eba97 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.h -@@ -255,6 +255,7 @@ - #define HDMI_FC_MASK2 0x10DA - #define HDMI_FC_POL2 0x10DB - #define HDMI_FC_PRCONF 0x10E0 -+#define HDMI_FC_SCRAMBLER_CTRL 0x10E1 - - #define HDMI_FC_GMD_STAT 0x1100 - #define HDMI_FC_GMD_EN 0x1101 -diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h -index ccb5aa8468e0..d7cc5d094270 100644 ---- a/include/drm/bridge/dw_hdmi.h -+++ b/include/drm/bridge/dw_hdmi.h -@@ -156,6 +156,7 @@ void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense); - void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); - void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); - void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); -+void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi); - - /* PHY configuration */ - void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch b/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch deleted file mode 100644 index d95c48cd6..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0044-drm-meson-add-HDMI-div40-TMDS-mode.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 9f4886b1df0a93a313bc8a238ca6f020fbe8ae90 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Mon, 12 Nov 2018 16:08:13 +0100 -Subject: [PATCH 44/53] drm/meson: add HDMI div40 TMDS mode - -Add support for TMDS Clock > 3.4GHz for HDMI2.0 display modes. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_dw_hdmi.c | 24 ++++++++++++++++++++---- - 1 file changed, 20 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c -index 807111ebfdd9..b8775102b100 100644 ---- a/drivers/gpu/drm/meson/meson_dw_hdmi.c -+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c -@@ -365,7 +365,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, - unsigned int wr_clk = - readl_relaxed(priv->io_base + _REG(VPU_HDMI_SETTING)); - -- DRM_DEBUG_DRIVER("%d:\"%s\"\n", mode->base.id, mode->name); -+ DRM_DEBUG_DRIVER("%d:\"%s\" div%d\n", mode->base.id, mode->name, -+ mode->clock > 340000 ? 40 : 10); - - /* Enable clocks */ - regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100); -@@ -385,9 +386,17 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, - /* Enable normal output to PHY */ - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); - -- /* TMDS pattern setup (TOFIX pattern for 4k2k scrambling) */ -- dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0x001f001f); -- dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, 0x001f001f); -+ /* TMDS pattern setup (TOFIX Handle the YUV420 case) */ -+ if (mode->clock > 340000) { -+ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0); -+ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, -+ 0x03ff03ff); -+ } else { -+ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, -+ 0x001f001f); -+ dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, -+ 0x001f001f); -+ } - - /* Load TMDS pattern */ - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1); -@@ -413,6 +422,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, - /* Disable clock, fifo, fifo_wr */ - regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0); - -+ dw_hdmi_set_high_tmds_clock_ratio(hdmi); -+ - msleep(100); - - /* Reset PHY 3 times in a row */ -@@ -562,6 +573,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - mode->vdisplay, mode->vsync_start, - mode->vsync_end, mode->vtotal, mode->type, mode->flags); - -+ /* If sink max TMDS clock < 340MHz, we reject the HDMI2.0 modes */ -+ if (mode->clock > 340000 && -+ connector->display_info.max_tmds_clock < 340000) -+ return MODE_BAD; -+ - /* Check against non-VIC supported modes */ - if (!vic) { - status = meson_venc_hdmi_supported_mode(mode); --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch b/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch deleted file mode 100644 index 57d6db364..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0045-drm-meson-add-support-for-HDMI2.0-2160p-modes.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 954b1e933ad1dd534c3f5b01fde7b52a62b78973 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Mon, 12 Nov 2018 16:10:07 +0100 -Subject: [PATCH 45/53] drm/meson: add support for HDMI2.0 2160p modes - -Now we support the TMDS Clock > 3.4GHz and support the SCDC Control -operation in the DW-HDMI Controller, we can enable support for the -HDMI2.0 3840x2160@60/50 RGB444 display modes. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_venc.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c -index 0fbe525b94c8..1bcd642b6e42 100644 ---- a/drivers/gpu/drm/meson/meson_venc.c -+++ b/drivers/gpu/drm/meson/meson_venc.c -@@ -848,6 +848,8 @@ struct meson_hdmi_venc_vic_mode { - { 93, &meson_hdmi_encp_mode_2160p24 }, - { 94, &meson_hdmi_encp_mode_2160p25 }, - { 95, &meson_hdmi_encp_mode_2160p30 }, -+ { 96, &meson_hdmi_encp_mode_2160p25 }, -+ { 97, &meson_hdmi_encp_mode_2160p30 }, - { 0, NULL}, /* sentinel */ - }; - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch b/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch deleted file mode 100644 index 706544fb4..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0046-drm-bridge-dw-hdmi-add-support-for-YUV420-output.patch +++ /dev/null @@ -1,200 +0,0 @@ -From afdd89304db8f3e858ee32cefaf29ed0be12500e Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 14 Nov 2018 17:19:36 +0100 -Subject: [PATCH 46/53] drm/bridge: dw-hdmi: add support for YUV420 output - -In order to support the HDMI2.0 YUV420 display modes, this patch -adds support for the YUV420 TMDS Clock divided by 2 and the controller -passthrough mode. - -This patch is based on work from Zheng Yang in -the Rockchip Linux 4.4 BSP at [1] - -[1] https://github.com/rockchip-linux/kernel/tree/release-4.4 - -Cc: Zheng Yang -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 63 ++++++++++++++++++----- - 1 file changed, 50 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 2a30d8393477..c3e4ed1e2d1c 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -94,6 +94,7 @@ struct hdmi_vmode { - unsigned int mpixelclock; - unsigned int mpixelrepetitioninput; - unsigned int mpixelrepetitionoutput; -+ unsigned int mtmdsclock; - }; - - struct hdmi_data_info { -@@ -549,7 +550,7 @@ static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi) - static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi) - { - mutex_lock(&hdmi->audio_mutex); -- hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, -+ hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, - hdmi->sample_rate); - mutex_unlock(&hdmi->audio_mutex); - } -@@ -558,7 +559,7 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate) - { - mutex_lock(&hdmi->audio_mutex); - hdmi->sample_rate = rate; -- hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, -+ hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock, - hdmi->sample_rate); - mutex_unlock(&hdmi->audio_mutex); - } -@@ -659,6 +660,20 @@ static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format) - } - } - -+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format) -+{ -+ switch (bus_format) { -+ case MEDIA_BUS_FMT_UYYVYY8_0_5X24: -+ case MEDIA_BUS_FMT_UYYVYY10_0_5X30: -+ case MEDIA_BUS_FMT_UYYVYY12_0_5X36: -+ case MEDIA_BUS_FMT_UYYVYY16_0_5X48: -+ return true; -+ -+ default: -+ return false; -+ } -+} -+ - static int hdmi_bus_fmt_color_depth(unsigned int bus_format) - { - switch (bus_format) { -@@ -888,7 +903,8 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi) - u8 val, vp_conf; - - if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) || -- hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format)) { -+ hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) || -+ hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { - switch (hdmi_bus_fmt_color_depth( - hdmi->hdmi_data.enc_out_bus_format)) { - case 8: -@@ -1029,7 +1045,7 @@ EXPORT_SYMBOL_GPL(dw_hdmi_phy_i2c_write); - - void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi) - { -- unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mpixelclock; -+ unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock; - - /* Control for TMDS Bit Period/TMDS Clock-Period Ratio */ - if (hdmi->connector.display_info.hdmi.scdc.supported) { -@@ -1370,6 +1386,9 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - struct hdmi_avi_infoframe frame; - u8 val; - -+ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) -+ is_hdmi2_sink = true; -+ - /* Initialise info frame from DRM mode */ - drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2_sink); - -@@ -1377,6 +1396,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - frame.colorspace = HDMI_COLORSPACE_YUV444; - else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) - frame.colorspace = HDMI_COLORSPACE_YUV422; -+ else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) -+ frame.colorspace = HDMI_COLORSPACE_YUV420; - else - frame.colorspace = HDMI_COLORSPACE_RGB; - -@@ -1534,15 +1555,18 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - struct drm_hdmi_info *hdmi_info = &hdmi->connector.display_info.hdmi; - struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode; - int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len; -- unsigned int vdisplay; -+ unsigned int vdisplay, hdisplay; - -- vmode->mpixelclock = mode->clock * 1000; -+ vmode->mtmdsclock = vmode->mpixelclock = mode->clock * 1000; - - dev_dbg(hdmi->dev, "final pixclk = %d\n", vmode->mpixelclock); - -+ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) -+ vmode->mtmdsclock /= 2; -+ - /* Set up HDMI_FC_INVIDCONF */ - inv_val = (hdmi->hdmi_data.hdcp_enable || -- vmode->mpixelclock > 340000000 || -+ vmode->mtmdsclock > 340000000 || - hdmi_info->scdc.scrambling.low_rates ? - HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE : - HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE); -@@ -1576,6 +1600,22 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - - hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF); - -+ hdisplay = mode->hdisplay; -+ hblank = mode->htotal - mode->hdisplay; -+ h_de_hs = mode->hsync_start - mode->hdisplay; -+ hsync_len = mode->hsync_end - mode->hsync_start; -+ -+ /* -+ * When we're setting a YCbCr420 mode, we need -+ * to adjust the horizontal timing to suit. -+ */ -+ if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) { -+ hdisplay /= 2; -+ hblank /= 2; -+ h_de_hs /= 2; -+ hsync_len /= 2; -+ } -+ - vdisplay = mode->vdisplay; - vblank = mode->vtotal - mode->vdisplay; - v_de_vs = mode->vsync_start - mode->vdisplay; -@@ -1594,7 +1634,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - - /* Scrambling Control */ - if (hdmi_info->scdc.supported) { -- if (vmode->mpixelclock > 340000000 || -+ if (vmode->mtmdsclock > 340000000 || - hdmi_info->scdc.scrambling.low_rates) { - drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION, - &bytes); -@@ -1613,15 +1653,14 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - } - - /* Set up horizontal active pixel width */ -- hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); -- hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); -+ hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1); -+ hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0); - - /* Set up vertical active lines */ - hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1); - hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0); - - /* Set up horizontal blanking pixel region width */ -- hblank = mode->htotal - mode->hdisplay; - hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1); - hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0); - -@@ -1629,7 +1668,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK); - - /* Set up HSYNC active edge delay width (in pixel clks) */ -- h_de_hs = mode->hsync_start - mode->hdisplay; - hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1); - hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0); - -@@ -1637,7 +1675,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi, - hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY); - - /* Set up HSYNC active pulse width (in pixel clks) */ -- hsync_len = mode->hsync_end - mode->hsync_start; - hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1); - hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0); - --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch b/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch deleted file mode 100644 index 1cdbe1360..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0047-drm-bridge-dw-hdmi-support-dynamically-get-input-out.patch +++ /dev/null @@ -1,104 +0,0 @@ -From c65b7b6a68ad5ccae7e861f840f1b45d79396929 Mon Sep 17 00:00:00 2001 -From: Zheng Yang -Date: Tue, 27 Jun 2017 16:22:01 +0800 -Subject: [PATCH 47/53] drm/bridge: dw-hdmi: support dynamically get input/out - color info - -To get input/output bus_format/enc_format dynamically, this patch -introduce following funstion in plat_data: - - get_input_bus_format - - get_output_bus_format - - get_enc_in_encoding - - get_enc_out_encoding - -Signed-off-by: Zheng Yang -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 28 +++++++++++++++++------ - include/drm/bridge/dw_hdmi.h | 5 ++++ - 2 files changed, 26 insertions(+), 7 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index c3e4ed1e2d1c..6473df3068ce 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -1774,6 +1774,7 @@ static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) - static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - { - int ret; -+ void *data = hdmi->plat_data->phy_data; - - hdmi_disable_overflow_interrupts(hdmi); - -@@ -1785,10 +1786,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - dev_dbg(hdmi->dev, "CEA mode used vic=%d\n", hdmi->vic); - } - -- if ((hdmi->vic == 6) || (hdmi->vic == 7) || -- (hdmi->vic == 21) || (hdmi->vic == 22) || -- (hdmi->vic == 2) || (hdmi->vic == 3) || -- (hdmi->vic == 17) || (hdmi->vic == 18)) -+ if (hdmi->plat_data->get_enc_out_encoding) -+ hdmi->hdmi_data.enc_out_encoding = -+ hdmi->plat_data->get_enc_out_encoding(data); -+ else if ((hdmi->vic == 6) || (hdmi->vic == 7) || -+ (hdmi->vic == 21) || (hdmi->vic == 22) || -+ (hdmi->vic == 2) || (hdmi->vic == 3) || -+ (hdmi->vic == 17) || (hdmi->vic == 18)) - hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601; - else - hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709; -@@ -1797,21 +1801,31 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) - hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0; - - /* TOFIX: Get input format from plat data or fallback to RGB888 */ -- if (hdmi->plat_data->input_bus_format) -+ if (hdmi->plat_data->get_input_bus_format) -+ hdmi->hdmi_data.enc_in_bus_format = -+ hdmi->plat_data->get_input_bus_format(data); -+ else if (hdmi->plat_data->input_bus_format) - hdmi->hdmi_data.enc_in_bus_format = - hdmi->plat_data->input_bus_format; - else - hdmi->hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - - /* TOFIX: Get input encoding from plat data or fallback to none */ -- if (hdmi->plat_data->input_bus_encoding) -+ if (hdmi->plat_data->get_enc_in_encoding) -+ hdmi->hdmi_data.enc_in_encoding = -+ hdmi->plat_data->get_enc_in_encoding(data); -+ else if (hdmi->plat_data->input_bus_encoding) - hdmi->hdmi_data.enc_in_encoding = - hdmi->plat_data->input_bus_encoding; - else - hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT; - - /* TOFIX: Default to RGB888 output format */ -- hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; -+ if (hdmi->plat_data->get_output_bus_format) -+ hdmi->hdmi_data.enc_out_bus_format = -+ hdmi->plat_data->get_output_bus_format(data); -+ else -+ hdmi->hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - - hdmi->hdmi_data.pix_repet_factor = 0; - hdmi->hdmi_data.hdcp_enable = 0; -diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h -index d7cc5d094270..27f9cce66b6a 100644 ---- a/include/drm/bridge/dw_hdmi.h -+++ b/include/drm/bridge/dw_hdmi.h -@@ -141,6 +141,11 @@ struct dw_hdmi_plat_data { - int (*configure_phy)(struct dw_hdmi *hdmi, - const struct dw_hdmi_plat_data *pdata, - unsigned long mpixelclock); -+ -+ unsigned long (*get_input_bus_format)(void *data); -+ unsigned long (*get_output_bus_format)(void *data); -+ unsigned long (*get_enc_in_encoding)(void *data); -+ unsigned long (*get_enc_out_encoding)(void *data); - }; - - struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev, --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch b/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch deleted file mode 100644 index 7a1c4338a..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0048-drm-bridge-dw-hdmi-allow-ycbcr420-modes-for-0x200a.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 725830ef41b23e35b282ecf78f682c0c131a0042 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Wed, 14 Nov 2018 17:39:46 +0100 -Subject: [PATCH 48/53] drm/bridge: dw-hdmi: allow ycbcr420 modes for >= 0x200a - -Now the DW-HDMI Controller supports the HDMI2.0 modes, enable support -for these modes in the connector if the platform supports them. -We limit these modes to DW-HDMI IP version >= 0x200a which -are designed to support HDMI2.0 display modes. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 ++++++ - include/drm/bridge/dw_hdmi.h | 1 + - 2 files changed, 7 insertions(+) - -diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -index 6473df3068ce..d10277f9ef0b 100644 ---- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c -@@ -2575,6 +2575,12 @@ __dw_hdmi_probe(struct platform_device *pdev, - if (hdmi->phy.ops->setup_hpd) - hdmi->phy.ops->setup_hpd(hdmi, hdmi->phy.data); - -+ if (hdmi->version >= 0x200a) -+ hdmi->connector.ycbcr_420_allowed = -+ hdmi->plat_data->ycbcr_420_allowed; -+ else -+ hdmi->connector.ycbcr_420_allowed = false; -+ - memset(&pdevinfo, 0, sizeof(pdevinfo)); - pdevinfo.parent = dev; - pdevinfo.id = PLATFORM_DEVID_AUTO; -diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h -index 27f9cce66b6a..c04f497a919b 100644 ---- a/include/drm/bridge/dw_hdmi.h -+++ b/include/drm/bridge/dw_hdmi.h -@@ -128,6 +128,7 @@ struct dw_hdmi_plat_data { - const struct drm_display_mode *mode); - unsigned long input_bus_format; - unsigned long input_bus_encoding; -+ bool ycbcr_420_allowed; - - /* Vendor PHY support */ - const struct dw_hdmi_phy_ops *phy_ops; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch b/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch deleted file mode 100644 index 7c98e9793..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0049-drm-meson-Add-YUV420-output-support.patch +++ /dev/null @@ -1,584 +0,0 @@ -From d27e2f1dac6e94f845d83725481adf9fc1c9bb21 Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 15 Nov 2018 16:41:23 +0100 -Subject: [PATCH 49/53] drm/meson: Add YUV420 output support - -This patch adds support for the YUV420 output from the Amlogic Meson SoCs -Video Processing Unit to the HDMI Controller. - -The YUV420 is obtained by generating a YUV444 pixel stream like -the classic HDMI display modes, but then the Video Encoder output -can be configured to down-sample the YUV444 pixel stream to a YUV420 -stream. -In addition if pixel stream down-sampling, the Y Cb Cr components must -also be mapped differently to align with the HDMI2.0 specifications. - -This mode needs a different clock generation scheme since the TMDS PHY -clock must match the 10x ration with the YUV420 pixel clock, but -the video encoder must run at 2x the pixel clock. - -This patch adds the TMDS PHY clock value in all the video clock setup -in order to better support these specific uses cases and switch -to the Common Clock framework for clocks handling in the future. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_dw_hdmi.c | 108 ++++++++++++++++++++---- - drivers/gpu/drm/meson/meson_vclk.c | 95 ++++++++++++++++----- - drivers/gpu/drm/meson/meson_vclk.h | 7 +- - drivers/gpu/drm/meson/meson_venc.c | 6 +- - drivers/gpu/drm/meson/meson_venc.h | 11 +++ - drivers/gpu/drm/meson/meson_venc_cvbs.c | 3 +- - 6 files changed, 184 insertions(+), 46 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c -index b8775102b100..83360f37d9ce 100644 ---- a/drivers/gpu/drm/meson/meson_dw_hdmi.c -+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c -@@ -141,6 +141,8 @@ struct meson_dw_hdmi { - struct regulator *hdmi_supply; - u32 irq_stat; - struct dw_hdmi *hdmi; -+ unsigned long input_bus_format; -+ unsigned long output_bus_format; - }; - #define encoder_to_meson_dw_hdmi(x) \ - container_of(x, struct meson_dw_hdmi, encoder) -@@ -323,25 +325,36 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, - { - struct meson_drm *priv = dw_hdmi->priv; - int vic = drm_match_cea_mode(mode); -+ unsigned int phy_freq; - unsigned int vclk_freq; - unsigned int venc_freq; - unsigned int hdmi_freq; - - vclk_freq = mode->clock; - -+ /* For 420, pixel clock is half unlike venc clock */ -+ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) -+ vclk_freq /= 2; -+ -+ /* TMDS clock is pixel_clock * 10 */ -+ phy_freq = vclk_freq * 10; -+ - if (!vic) { -- meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, vclk_freq, -- vclk_freq, vclk_freq, false); -+ meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq, -+ vclk_freq, vclk_freq, vclk_freq, false); - return; - } - -+ /* 480i/576i needs global pixel doubling */ - if (mode->flags & DRM_MODE_FLAG_DBLCLK) - vclk_freq *= 2; - - venc_freq = vclk_freq; - hdmi_freq = vclk_freq; - -- if (meson_venc_hdmi_venc_repeat(vic)) -+ /* VENC double pixels for 1080i, 720p and YUV420 modes */ -+ if (meson_venc_hdmi_venc_repeat(vic) || -+ dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) - venc_freq *= 2; - - vclk_freq = max(venc_freq, hdmi_freq); -@@ -349,11 +362,11 @@ static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi, - if (mode->flags & DRM_MODE_FLAG_DBLCLK) - venc_freq /= 2; - -- DRM_DEBUG_DRIVER("vclk:%d venc=%d hdmi=%d enci=%d\n", -- vclk_freq, venc_freq, hdmi_freq, -+ DRM_DEBUG_DRIVER("vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", -+ phy_freq, vclk_freq, venc_freq, hdmi_freq, - priv->venc.hdmi_use_enci); - -- meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, vclk_freq, -+ meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq, - venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); - } - -@@ -387,7 +400,8 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data, - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12)); - - /* TMDS pattern setup (TOFIX Handle the YUV420 case) */ -- if (mode->clock > 340000) { -+ if (mode->clock > 340000 && -+ dw_hdmi->input_bus_format == MEDIA_BUS_FMT_YUV8_1X24) { - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01, 0); - dw_hdmi_top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23, - 0x03ff03ff); -@@ -560,6 +574,8 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - const struct drm_display_mode *mode) - { - struct meson_drm *priv = connector->dev->dev_private; -+ bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported; -+ unsigned int phy_freq; - unsigned int vclk_freq; - unsigned int venc_freq; - unsigned int hdmi_freq; -@@ -573,9 +589,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - mode->vdisplay, mode->vsync_start, - mode->vsync_end, mode->vtotal, mode->type, mode->flags); - -- /* If sink max TMDS clock < 340MHz, we reject the HDMI2.0 modes */ -+ /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ - if (mode->clock > 340000 && -- connector->display_info.max_tmds_clock < 340000) -+ connector->display_info.max_tmds_clock < 340000 && -+ !drm_mode_is_420_only(&connector->display_info, mode) && -+ !drm_mode_is_420_also(&connector->display_info, mode)) - return MODE_BAD; - - /* Check against non-VIC supported modes */ -@@ -591,6 +609,15 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - - vclk_freq = mode->clock; - -+ /* For 420, pixel clock is half unlike venc clock */ -+ if (drm_mode_is_420_only(&connector->display_info, mode) || -+ (!is_hdmi2_sink && -+ drm_mode_is_420_also(&connector->display_info, mode))) -+ vclk_freq /= 2; -+ -+ /* TMDS clock is pixel_clock * 10 */ -+ phy_freq = vclk_freq * 10; -+ - /* 480i/576i needs global pixel doubling */ - if (mode->flags & DRM_MODE_FLAG_DBLCLK) - vclk_freq *= 2; -@@ -598,8 +625,11 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - venc_freq = vclk_freq; - hdmi_freq = vclk_freq; - -- /* VENC double pixels for 1080i and 720p modes */ -- if (meson_venc_hdmi_venc_repeat(vic)) -+ /* VENC double pixels for 1080i, 720p and YUV420 modes */ -+ if (meson_venc_hdmi_venc_repeat(vic) || -+ drm_mode_is_420_only(&connector->display_info, mode) || -+ (!is_hdmi2_sink && -+ drm_mode_is_420_also(&connector->display_info, mode))) - venc_freq *= 2; - - vclk_freq = max(venc_freq, hdmi_freq); -@@ -607,10 +637,10 @@ dw_hdmi_mode_valid(struct drm_connector *connector, - if (mode->flags & DRM_MODE_FLAG_DBLCLK) - venc_freq /= 2; - -- dev_dbg(connector->dev->dev, "%s: vclk:%d venc=%d hdmi=%d\n", __func__, -- vclk_freq, venc_freq, hdmi_freq); -+ dev_dbg(connector->dev->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", -+ __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); - -- return meson_vclk_vic_supported_freq(vclk_freq); -+ return meson_vclk_vic_supported_freq(phy_freq, vclk_freq); - } - - /* Encoder */ -@@ -628,6 +658,21 @@ static int meson_venc_hdmi_encoder_atomic_check(struct drm_encoder *encoder, - struct drm_crtc_state *crtc_state, - struct drm_connector_state *conn_state) - { -+ struct meson_dw_hdmi *dw_hdmi = encoder_to_meson_dw_hdmi(encoder); -+ struct drm_display_info *info = &conn_state->connector->display_info; -+ struct drm_display_mode *mode = &crtc_state->mode; -+ bool is_hdmi2_sink = -+ conn_state->connector->display_info.hdmi.scdc.supported; -+ -+ if (drm_mode_is_420_only(info, mode) || -+ (!is_hdmi2_sink && drm_mode_is_420_also(info, mode))) { -+ dw_hdmi->input_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; -+ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; -+ } else { -+ dw_hdmi->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; -+ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; -+ } -+ - return 0; - } - -@@ -665,18 +710,30 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_encoder *encoder, - struct meson_dw_hdmi *dw_hdmi = encoder_to_meson_dw_hdmi(encoder); - struct meson_drm *priv = dw_hdmi->priv; - int vic = drm_match_cea_mode(mode); -+ unsigned int ycrcb_map = MESON_VENC_MAP_CB_Y_CR; -+ bool yuv420_mode = false; - - DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n", - mode->base.id, mode->name, vic); - -+ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) { -+ ycrcb_map = MESON_VENC_MAP_CR_Y_CB; -+ yuv420_mode = true; -+ } -+ - /* VENC + VENC-DVI Mode setup */ -- meson_venc_hdmi_mode_set(priv, vic, mode); -+ meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode); - - /* VCLK Set clock */ - dw_hdmi_set_vclk(dw_hdmi, mode); - -- /* Setup YUV444 to HDMI-TX, no 10bit diphering */ -- writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); -+ if (dw_hdmi->input_bus_format == MEDIA_BUS_FMT_UYYVYY8_0_5X24) -+ /* Setup YUV420 to HDMI-TX, no 10bit diphering */ -+ writel_relaxed(2 | (2 << 2), -+ priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); -+ else -+ /* Setup YUV444 to HDMI-TX, no 10bit diphering */ -+ writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); - } - - static const struct drm_encoder_helper_funcs -@@ -715,6 +772,20 @@ static const struct regmap_config meson_dw_hdmi_regmap_config = { - .fast_io = true, - }; - -+static unsigned long meson_dw_hdmi_get_in_bus_format(void *data) -+{ -+ struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; -+ -+ return dw_hdmi->input_bus_format; -+} -+ -+static unsigned long meson_dw_hdmi_get_out_bus_format(void *data) -+{ -+ struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data; -+ -+ return dw_hdmi->output_bus_format; -+} -+ - static bool meson_hdmi_connector_is_available(struct device *dev) - { - struct device_node *ep, *remote; -@@ -891,6 +962,9 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master, - dw_plat_data->phy_data = meson_dw_hdmi; - dw_plat_data->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; - dw_plat_data->input_bus_encoding = V4L2_YCBCR_ENC_709; -+ dw_plat_data->get_input_bus_format = meson_dw_hdmi_get_in_bus_format; -+ dw_plat_data->get_output_bus_format = meson_dw_hdmi_get_out_bus_format; -+ dw_plat_data->ycbcr_420_allowed = true; - - platform_set_drvdata(pdev, meson_dw_hdmi); - -diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c -index 5acccebd026d..27c9c5ead234 100644 ---- a/drivers/gpu/drm/meson/meson_vclk.c -+++ b/drivers/gpu/drm/meson/meson_vclk.c -@@ -337,12 +337,17 @@ enum { - /* 2970 /1 /1 /1 /5 /2 => /1 /1 */ - MESON_VCLK_HDMI_297000, - /* 5940 /1 /1 /2 /5 /1 => /1 /1 */ -- MESON_VCLK_HDMI_594000 -+ MESON_VCLK_HDMI_594000, -+/* 2970 /1 /1 /1 /5 /1 => /1 /2 */ -+ MESON_VCLK_HDMI_594000_YUV420, - }; - - struct meson_vclk_params { -+ unsigned int pll_freq; -+ unsigned int phy_freq; -+ unsigned int vclk_freq; -+ unsigned int venc_freq; - unsigned int pixel_freq; -- unsigned int pll_base_freq; - unsigned int pll_od1; - unsigned int pll_od2; - unsigned int pll_od3; -@@ -350,8 +355,11 @@ struct meson_vclk_params { - unsigned int vclk_div; - } params[] = { - [MESON_VCLK_HDMI_ENCI_54000] = { -+ .pll_freq = 4320000, -+ .phy_freq = 270000, -+ .vclk_freq = 54000, -+ .venc_freq = 54000, - .pixel_freq = 54000, -- .pll_base_freq = 4320000, - .pll_od1 = 4, - .pll_od2 = 4, - .pll_od3 = 1, -@@ -359,8 +367,11 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_DDR_54000] = { -- .pixel_freq = 54000, -- .pll_base_freq = 4320000, -+ .pll_freq = 4320000, -+ .phy_freq = 270000, -+ .vclk_freq = 54000, -+ .venc_freq = 54000, -+ .pixel_freq = 27000, - .pll_od1 = 4, - .pll_od2 = 4, - .pll_od3 = 1, -@@ -368,8 +379,11 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_DDR_148500] = { -- .pixel_freq = 148500, -- .pll_base_freq = 2970000, -+ .pll_freq = 2970000, -+ .phy_freq = 742500, -+ .vclk_freq = 148500, -+ .venc_freq = 148500, -+ .pixel_freq = 74250, - .pll_od1 = 4, - .pll_od2 = 1, - .pll_od3 = 1, -@@ -377,8 +391,11 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_74250] = { -+ .pll_freq = 2970000, -+ .phy_freq = 742500, -+ .vclk_freq = 74250, -+ .venc_freq = 74250, - .pixel_freq = 74250, -- .pll_base_freq = 2970000, - .pll_od1 = 2, - .pll_od2 = 2, - .pll_od3 = 2, -@@ -386,8 +403,11 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_148500] = { -+ .pll_freq = 2970000, -+ .phy_freq = 1485000, -+ .vclk_freq = 148500, -+ .venc_freq = 148500, - .pixel_freq = 148500, -- .pll_base_freq = 2970000, - .pll_od1 = 1, - .pll_od2 = 2, - .pll_od3 = 2, -@@ -395,8 +415,11 @@ struct meson_vclk_params { - .vclk_div = 1, - }, - [MESON_VCLK_HDMI_297000] = { -+ .pll_freq = 2970000, -+ .phy_freq = 2970000, -+ .venc_freq = 297000, -+ .vclk_freq = 297000, - .pixel_freq = 297000, -- .pll_base_freq = 2970000, - .pll_od1 = 1, - .pll_od2 = 1, - .pll_od3 = 1, -@@ -404,14 +427,29 @@ struct meson_vclk_params { - .vclk_div = 2, - }, - [MESON_VCLK_HDMI_594000] = { -+ .pll_freq = 5940000, -+ .phy_freq = 5940000, -+ .venc_freq = 594000, -+ .vclk_freq = 594000, - .pixel_freq = 594000, -- .pll_base_freq = 5940000, - .pll_od1 = 1, - .pll_od2 = 1, - .pll_od3 = 2, - .vid_pll_div = VID_PLL_DIV_5, - .vclk_div = 1, - }, -+ [MESON_VCLK_HDMI_594000_YUV420] = { -+ .pll_freq = 2970000, -+ .phy_freq = 2970000, -+ .venc_freq = 594000, -+ .vclk_freq = 594000, -+ .pixel_freq = 297000, -+ .pll_od1 = 1, -+ .pll_od2 = 1, -+ .pll_od3 = 1, -+ .vid_pll_div = VID_PLL_DIV_5, -+ .vclk_div = 1, -+ }, - { /* sentinel */ }, - }; - -@@ -616,6 +654,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, - unsigned int od, m, frac, od1, od2, od3; - - if (meson_hdmi_pll_find_params(priv, pll_freq, &m, &frac, &od)) { -+ /* OD2 goes to the PHY, and needs to be *10, so keep OD3=1 */ - od3 = 1; - if (od < 4) { - od1 = 2; -@@ -638,21 +677,28 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, - } - - enum drm_mode_status --meson_vclk_vic_supported_freq(unsigned int freq) -+meson_vclk_vic_supported_freq(unsigned int phy_freq, -+ unsigned int vclk_freq) - { - int i; - -- DRM_DEBUG_DRIVER("freq = %d\n", freq); -+ DRM_DEBUG_DRIVER("phy_freq = %d vclk_freq = %d\n", -+ phy_freq, vclk_freq); - - for (i = 0 ; params[i].pixel_freq ; ++i) { - DRM_DEBUG_DRIVER("i = %d pixel_freq = %d alt = %d\n", - i, params[i].pixel_freq, - FREQ_1000_1001(params[i].pixel_freq)); -+ DRM_DEBUG_DRIVER("i = %d phy_freq = %d alt = %d\n", -+ i, params[i].phy_freq, -+ FREQ_1000_1001(params[i].phy_freq/10)*10); - /* Match strict frequency */ -- if (freq == params[i].pixel_freq) -+ if (phy_freq == params[i].phy_freq && -+ vclk_freq == params[i].vclk_freq) - return MODE_OK; - /* Match 1000/1001 variant */ -- if (freq == FREQ_1000_1001(params[i].pixel_freq)) -+ if (phy_freq == (FREQ_1000_1001(params[i].phy_freq/10)*10) && -+ vclk_freq == FREQ_1000_1001(params[i].vclk_freq)) - return MODE_OK; - } - -@@ -666,7 +712,7 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, - unsigned int hdmi_tx_div, unsigned int venc_div, - bool hdmi_use_enci, bool vic_alternate_clock) - { -- unsigned int m, frac; -+ unsigned int m = 0, frac = 0; - - /* Set HDMI-TX sys clock */ - regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, -@@ -863,8 +909,9 @@ static void meson_vclk_set(struct meson_drm *priv, unsigned int pll_base_freq, - } - - void meson_vclk_setup(struct meson_drm *priv, unsigned int target, -- unsigned int vclk_freq, unsigned int venc_freq, -- unsigned int dac_freq, bool hdmi_use_enci) -+ unsigned int phy_freq, unsigned int vclk_freq, -+ unsigned int venc_freq, unsigned int dac_freq, -+ bool hdmi_use_enci) - { - bool vic_alternate_clock = false; - unsigned int freq; -@@ -883,7 +930,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - * - venc_div = 1 - * - encp encoder - */ -- meson_vclk_set(priv, vclk_freq * 10, 0, 0, 0, -+ meson_vclk_set(priv, phy_freq, 0, 0, 0, - VID_PLL_DIV_5, 2, 1, 1, false, false); - return; - } -@@ -905,9 +952,11 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - } - - for (freq = 0 ; params[freq].pixel_freq ; ++freq) { -- if (vclk_freq == params[freq].pixel_freq || -- vclk_freq == FREQ_1000_1001(params[freq].pixel_freq)) { -- if (vclk_freq != params[freq].pixel_freq) -+ if ((phy_freq == params[freq].phy_freq || -+ phy_freq == FREQ_1000_1001(params[freq].phy_freq/10)*10) && -+ (vclk_freq == params[freq].vclk_freq || -+ vclk_freq == FREQ_1000_1001(params[freq].vclk_freq))) { -+ if (vclk_freq != params[freq].vclk_freq) - vic_alternate_clock = true; - else - vic_alternate_clock = false; -@@ -936,7 +985,7 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, - return; - } - -- meson_vclk_set(priv, params[freq].pll_base_freq, -+ meson_vclk_set(priv, params[freq].pll_freq, - params[freq].pll_od1, params[freq].pll_od2, - params[freq].pll_od3, params[freq].vid_pll_div, - params[freq].vclk_div, hdmi_tx_div, venc_div, -diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h -index 4bd8752da02a..c4d19ddfcd79 100644 ---- a/drivers/gpu/drm/meson/meson_vclk.h -+++ b/drivers/gpu/drm/meson/meson_vclk.h -@@ -33,10 +33,11 @@ enum { - enum drm_mode_status - meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); - enum drm_mode_status --meson_vclk_vic_supported_freq(unsigned int freq); -+meson_vclk_vic_supported_freq(unsigned int phy_freq, unsigned int vclk_freq); - - void meson_vclk_setup(struct meson_drm *priv, unsigned int target, -- unsigned int vclk_freq, unsigned int venc_freq, -- unsigned int dac_freq, bool hdmi_use_enci); -+ unsigned int phy_freq, unsigned int vclk_freq, -+ unsigned int venc_freq, unsigned int dac_freq, -+ bool hdmi_use_enci); - - #endif /* __MESON_VCLK_H */ -diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c -index 1bcd642b6e42..ab72ddda242d 100644 ---- a/drivers/gpu/drm/meson/meson_venc.c -+++ b/drivers/gpu/drm/meson/meson_venc.c -@@ -956,6 +956,8 @@ bool meson_venc_hdmi_venc_repeat(int vic) - EXPORT_SYMBOL_GPL(meson_venc_hdmi_venc_repeat); - - void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, -+ unsigned int ycrcb_map, -+ bool yuv420_mode, - struct drm_display_mode *mode) - { - union meson_hdmi_venc_mode *vmode = NULL; -@@ -1505,8 +1507,8 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, - writel_relaxed((use_enci ? 1 : 2) | - (mode->flags & DRM_MODE_FLAG_PHSYNC ? 1 << 2 : 0) | - (mode->flags & DRM_MODE_FLAG_PVSYNC ? 1 << 3 : 0) | -- 4 << 5 | -- (venc_repeat ? 1 << 8 : 0) | -+ (ycrcb_map << 5) | -+ (venc_repeat || yuv420_mode ? 1 << 8 : 0) | - (hdmi_repeat ? 1 << 12 : 0), - priv->io_base + _REG(VPU_HDMI_SETTING)); - -diff --git a/drivers/gpu/drm/meson/meson_venc.h b/drivers/gpu/drm/meson/meson_venc.h -index 97eaebbfa0c4..5580bf38e381 100644 ---- a/drivers/gpu/drm/meson/meson_venc.h -+++ b/drivers/gpu/drm/meson/meson_venc.h -@@ -33,6 +33,15 @@ enum { - MESON_VENC_MODE_HDMI, - }; - -+enum { -+ MESON_VENC_MAP_CR_Y_CB = 0, -+ MESON_VENC_MAP_Y_CB_CR, -+ MESON_VENC_MAP_Y_CR_CB, -+ MESON_VENC_MAP_CB_CR_Y, -+ MESON_VENC_MAP_CB_Y_CR, -+ MESON_VENC_MAP_CR_CB_Y, -+}; -+ - struct meson_cvbs_enci_mode { - unsigned int mode_tag; - unsigned int hso_begin; /* HSO begin position */ -@@ -70,6 +79,8 @@ extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc; - void meson_venci_cvbs_mode_set(struct meson_drm *priv, - struct meson_cvbs_enci_mode *mode); - void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, -+ unsigned int ycrcb_map, -+ bool yuv420_mode, - struct drm_display_mode *mode); - unsigned int meson_venci_get_field(struct meson_drm *priv); - -diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c -index f7945bae3b4a..38a1117b1183 100644 ---- a/drivers/gpu/drm/meson/meson_venc_cvbs.c -+++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c -@@ -207,7 +207,8 @@ static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder, - /* Setup 27MHz vclk2 for ENCI and VDAC */ - meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS, - MESON_VCLK_CVBS, MESON_VCLK_CVBS, -- MESON_VCLK_CVBS, true); -+ MESON_VCLK_CVBS, MESON_VCLK_CVBS, -+ true); - break; - } - } --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch b/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch deleted file mode 100644 index fe2c26c22..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0050-drm-meson-Output-in-YUV444-if-sink-supports-it.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2b420ad1ebade69b262cb1cf36668134d7bd785c Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Sun, 18 Nov 2018 14:06:11 +0100 -Subject: [PATCH 50/53] drm/meson: Output in YUV444 if sink supports it - -With the YUV420 handling, we can no dynamically setup the HDMI output -pixel format depending on the mode and connector info. -So now, we can output in YUV444, which is the native video pipeline -format, directly the the HDMI Sink it it's supported, without -involving the HDMI Controller CSC. ---- - drivers/gpu/drm/meson/meson_dw_hdmi.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c -index 83360f37d9ce..1b7092ab1be8 100644 ---- a/drivers/gpu/drm/meson/meson_dw_hdmi.c -+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c -@@ -670,7 +670,10 @@ static int meson_venc_hdmi_encoder_atomic_check(struct drm_encoder *encoder, - dw_hdmi->output_bus_format = MEDIA_BUS_FMT_UYYVYY8_0_5X24; - } else { - dw_hdmi->input_bus_format = MEDIA_BUS_FMT_YUV8_1X24; -- dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; -+ if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444) -+ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_YUV8_1X24; -+ else -+ dw_hdmi->output_bus_format = MEDIA_BUS_FMT_RGB888_1X24; - } - - return 0; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch b/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch deleted file mode 100644 index 550a4bb9a..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0051-drm-meson-Fix-an-Alpha-Primary-Plane-bug-on-Meson-GX.patch +++ /dev/null @@ -1,126 +0,0 @@ -From fa6cb8f89a7f9387a0299f6b55bc0cd54233aefd Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 22 Nov 2018 17:27:20 +0100 -Subject: [PATCH 51/53] drm/meson: Fix an Alpha Primary Plane bug on Meson - GXL/GXM SoCs - -On the Amlogic GXL & GXM SoCs, a bug occurs in the OSD1 plane when -alpha is used where the alpha is not aligned with the pixel content. - -The woraround Amlogic implemented is the reset the OSD1 plane hardware -block each time the plane is updated, solving the issue. - -In the reset, we still need to save the content of 2 registers which -depends on the status of the plane, in addition to reload the scaler -conversion matrix in the same time. - -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_crtc.c | 1 + - drivers/gpu/drm/meson/meson_plane.c | 12 ++++++++++++ - drivers/gpu/drm/meson/meson_viu.c | 27 +++++++++++++++++++++++++++ - drivers/gpu/drm/meson/meson_viu.h | 1 + - 4 files changed, 41 insertions(+) - -diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c -index 23df4abd95c9..f13e5b6b7a50 100644 ---- a/drivers/gpu/drm/meson/meson_crtc.c -+++ b/drivers/gpu/drm/meson/meson_crtc.c -@@ -183,6 +183,7 @@ void meson_crtc_irq(struct meson_drm *priv) - - /* Update the OSD registers */ - if (priv->viu.osd1_enabled && priv->viu.osd1_commit) { -+ - writel_relaxed(priv->viu.osd1_ctrl_stat, - priv->io_base + _REG(VIU_OSD1_CTRL_STAT)); - writel_relaxed(priv->viu.osd1_blk0_cfg[0], -diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c -index 12a47b4f65a5..837228847675 100644 ---- a/drivers/gpu/drm/meson/meson_plane.c -+++ b/drivers/gpu/drm/meson/meson_plane.c -@@ -79,6 +79,7 @@ - struct meson_plane { - struct drm_plane base; - struct meson_drm *priv; -+ bool enabled; - }; - #define to_meson_plane(x) container_of(x, struct meson_plane, base) - -@@ -303,6 +304,15 @@ static void meson_plane_atomic_update(struct drm_plane *plane, - priv->viu.osd1_stride = fb->pitches[0]; - priv->viu.osd1_height = fb->height; - -+ if (!meson_plane->enabled) { -+ /* Reset OSD1 at updates on GXL+ SoCs */ -+ if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") || -+ meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) -+ meson_viu_reset(priv); -+ -+ meson_plane->enabled = true; -+ } -+ - spin_unlock_irqrestore(&priv->drm->event_lock, flags); - } - -@@ -316,6 +326,8 @@ static void meson_plane_atomic_disable(struct drm_plane *plane, - writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0, - priv->io_base + _REG(VPP_MISC)); - -+ meson_plane->enabled = false; -+ - } - - static const struct drm_plane_helper_funcs meson_plane_helper_funcs = { -diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c -index 90d9ae3c2b81..366f7e523d15 100644 ---- a/drivers/gpu/drm/meson/meson_viu.c -+++ b/drivers/gpu/drm/meson/meson_viu.c -@@ -296,6 +296,33 @@ static void meson_viu_load_matrix(struct meson_drm *priv) - true); - } - -+/* VIU OSD1 Reset as workaround for GXL+ Alpha OSD Bug */ -+void meson_viu_reset(struct meson_drm *priv) -+{ -+ uint32_t osd1_fifo_ctrl_stat, osd1_ctrl_stat2; -+ -+ /* Save these 2 registers state */ -+ osd1_fifo_ctrl_stat = readl_relaxed( -+ priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); -+ osd1_ctrl_stat2 = readl_relaxed( -+ priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); -+ -+ /* Reset OSD1 */ -+ writel_bits_relaxed(BIT(0), BIT(0), -+ priv->io_base + _REG(VIU_SW_RESET)); -+ writel_bits_relaxed(BIT(0), 0, -+ priv->io_base + _REG(VIU_SW_RESET)); -+ -+ /* Rewrite these registers state lost in the reset */ -+ writel_relaxed(osd1_fifo_ctrl_stat, -+ priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); -+ writel_relaxed(osd1_ctrl_stat2, -+ priv->io_base + _REG(VIU_OSD1_CTRL_STAT2)); -+ -+ /* Reload the conversion matrix */ -+ meson_viu_load_matrix(priv); -+} -+ - void meson_viu_init(struct meson_drm *priv) - { - uint32_t reg; -diff --git a/drivers/gpu/drm/meson/meson_viu.h b/drivers/gpu/drm/meson/meson_viu.h -index 073b1910bd1b..e4a6e2fba8fb 100644 ---- a/drivers/gpu/drm/meson/meson_viu.h -+++ b/drivers/gpu/drm/meson/meson_viu.h -@@ -59,6 +59,7 @@ - #define OSD_REPLACE_EN BIT(14) - #define OSD_REPLACE_SHIFT 6 - -+void meson_viu_reset(struct meson_drm *priv); - void meson_viu_init(struct meson_drm *priv); - - #endif /* __MESON_VIU_H */ --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch b/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch deleted file mode 100644 index abfb0d895..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0052-arm64-dts-meson-Fix-IRQ-trigger-type-for-macirq.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 5e2e26abc73f9bfae1e5edbcdea7e53e9822f2fb Mon Sep 17 00:00:00 2001 -From: Carlo Caione -Date: Tue, 4 Dec 2018 16:04:46 +0000 -Subject: [PATCH 52/53] arm64: dts: meson: Fix IRQ trigger type for macirq - -A long running stress test on a custom board shipping an AXG SoCs and a -Realtek RTL8211F PHY revealed that after a few hours the connection -speed would drop drastically, from ~1000Mbps to ~3Mbps. At the same time -the 'macirq' (eth0) IRQ would stop being triggered at all and as -consequence the GMAC IRQs never ACKed. - -After a painful investigation the problem seemed to be due to a wrong -defined IRQ type for the GMAC IRQ that should be LEVEL_HIGH instead of -EDGE_RISING. - -Signed-off-by: Carlo Caione -Acked-by: Neil Armstrong ---- - arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 +- - arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -index c518130e5ce7..81dcbde9e674 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi -@@ -461,7 +461,7 @@ - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xff3f0000 0x0 0x10000 - 0x0 0xff634540 0x0 0x8>; -- interrupts = ; -+ interrupts = ; - interrupt-names = "macirq"; - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, -diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -index 5d2820ef9a88..d03737acbae1 100644 ---- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi -@@ -511,7 +511,7 @@ - compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xc9410000 0x0 0x10000 - 0x0 0xc8834540 0x0 0x4>; -- interrupts = ; -+ interrupts = ; - interrupt-names = "macirq"; - status = "disabled"; - }; --- -2.17.1 - diff --git a/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch b/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch deleted file mode 100644 index 19845bf4f..000000000 --- a/buildroot-external/board/hardkernel/patches/linux/0053-drm-meson-fix-max-mode_config-height-width.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 47a653adc82602d0d8b21065807164f87c89c82b Mon Sep 17 00:00:00 2001 -From: Neil Armstrong -Date: Thu, 4 Oct 2018 10:42:43 +0200 -Subject: [PATCH 53/53] drm/meson: fix max mode_config height/width - -The mode_config max_width/max_height determines the maximum framebuffer -size the pixel reader can handle. But the values were set thinking they -were determining the maximum screen dimensions. - -This patch changes the values to the maximum height/width the CANVAS block -can handle rounded to some coherent values. - -Fixes: a41e82e6c457 ("drm/meson: Add support for components") -Signed-off-by: Neil Armstrong ---- - drivers/gpu/drm/meson/meson_drv.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c -index a13704ab5d11..960b8b08756e 100644 ---- a/drivers/gpu/drm/meson/meson_drv.c -+++ b/drivers/gpu/drm/meson/meson_drv.c -@@ -267,8 +267,8 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) - goto free_drm; - - drm_mode_config_init(drm); -- drm->mode_config.max_width = 3840; -- drm->mode_config.max_height = 2160; -+ drm->mode_config.max_width = 16384; -+ drm->mode_config.max_height = 8192; - drm->mode_config.funcs = &meson_mode_config_funcs; - drm->mode_config.helper_private = &meson_mode_config_helpers; - --- -2.17.1 - diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 23830dab8..18798b274 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -19,7 +19,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.7" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" @@ -77,12 +77,12 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.ush" -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y BR2_PACKAGE_HOST_DOSFSTOOLS=y BR2_PACKAGE_HOST_E2FSPROGS=y BR2_PACKAGE_HOST_GPTFDISK=y @@ -101,3 +101,4 @@ BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" BR2_PACKAGE_APPARMOR=y BR2_PACKAGE_HARDKERNEL_BOOT=y +BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2=y diff --git a/buildroot-external/configs/odroid_n2_defconfig b/buildroot-external/configs/odroid_n2_defconfig new file mode 100644 index 000000000..725294857 --- /dev/null +++ b/buildroot-external/configs/odroid_n2_defconfig @@ -0,0 +1,104 @@ +BR2_aarch64=y +BR2_DL_DIR="/cache/dl" +BR2_CCACHE=y +BR2_CCACHE_DIR="/cache/cc" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/patches" +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_GCC_VERSION_7_X=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_BINUTILS_ENABLE_LTO=y +BR2_GCC_ENABLE_LTO=y +BR2_TARGET_GENERIC_HOSTNAME="hassio" +BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" +BR2_INIT_SYSTEMD=y +BR2_TARGET_GENERIC_GETTY_PORT="tty1" +# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/hassos-hook.sh" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_VERSION=y +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.7" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" +BR2_LINUX_KERNEL_LZ4=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-g12b-odroid-n2" +BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y +BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y +BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config" +BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y +BR2_PACKAGE_PROCPS_NG=y +BR2_PACKAGE_JQ=y +BR2_PACKAGE_E2FSPROGS=y +BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y +BR2_PACKAGE_SQUASHFS=y +BR2_PACKAGE_GPTFDISK=y +BR2_PACKAGE_GPTFDISK_SGDISK=y +BR2_PACKAGE_UBOOT_TOOLS=y +BR2_PACKAGE_CA_CERTIFICATES=y +BR2_PACKAGE_LIBDNET=y +BR2_PACKAGE_LIBCGROUP=y +BR2_PACKAGE_LIBCGROUP_TOOLS=y +BR2_PACKAGE_AVAHI=y +# BR2_PACKAGE_AVAHI_AUTOIPD is not set +BR2_PACKAGE_AVAHI_DAEMON=y +BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y +BR2_PACKAGE_BLUEZ5_UTILS=y +BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y +BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y +BR2_PACKAGE_DHCP=y +BR2_PACKAGE_DHCP_CLIENT=y +BR2_PACKAGE_WIREGUARD=y +BR2_PACKAGE_DROPBEAR=y +# BR2_PACKAGE_DROPBEAR_CLIENT is not set +# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set +BR2_PACKAGE_NETWORK_MANAGER=y +BR2_PACKAGE_TINI=y +BR2_PACKAGE_DOCKER_ENGINE=y +BR2_PACKAGE_DOCKER_CLI=y +BR2_PACKAGE_RAUC=y +BR2_PACKAGE_RAUC_NETWORK=y +BR2_PACKAGE_RNG_TOOLS=y +# BR2_PACKAGE_SYSTEMD_HWDB is not set +# BR2_PACKAGE_SYSTEMD_NETWORKD is not set +BR2_PACKAGE_SYSTEMD_RANDOMSEED=y +# BR2_PACKAGE_SYSTEMD_RESOLVED is not set +BR2_PACKAGE_SYSTEMD_COREDUMP=y +BR2_PACKAGE_UTIL_LINUX_PARTX=y +BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_PACKAGE_USB_MODESWITCH=y +BR2_PACKAGE_USB_MODESWITCH_DATA=y +BR2_TARGET_ROOTFS_SQUASHFS=y +BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y +# BR2_TARGET_ROOTFS_TAR is not set +BR2_TARGET_UBOOT=y +BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y +BR2_TARGET_UBOOT_CUSTOM_VERSION=y +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" +BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-n2" +BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot.config" +BR2_TARGET_UBOOT_BOOT_SCRIPT=y +BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/uboot-boot.ush" +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y +BR2_PACKAGE_HOST_DOSFSTOOLS=y +BR2_PACKAGE_HOST_E2FSPROGS=y +BR2_PACKAGE_HOST_GPTFDISK=y +BR2_PACKAGE_HOST_MTOOLS=y +BR2_PACKAGE_HOST_RAUC=y +BR2_PACKAGE_HASSOS=y +BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-n2-homeassistant" +BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" +BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" +BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" +BR2_PACKAGE_HASSOS_CLI_VERSION="15" +BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" +BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" +BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" +BR2_PACKAGE_APPARMOR=y +BR2_PACKAGE_HARDKERNEL_BOOT=y +BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_N2=y diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index 1ea7c5c80..c045a8849 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -20,7 +20,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.72" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.7" BR2_LINUX_KERNEL_DTS_SUPPORT=y BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y @@ -80,14 +80,14 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-xu3" BR2_TARGET_UBOOT_NEEDS_DTC=y BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/uboot-boot.ush" -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y BR2_PACKAGE_HOST_DOSFSTOOLS=y BR2_PACKAGE_HOST_E2FSPROGS=y BR2_PACKAGE_HOST_GPTFDISK=y diff --git a/buildroot-external/package/bluetooth-rtl8723/bluetooth-rtl8723.mk b/buildroot-external/package/bluetooth-rtl8723/bluetooth-rtl8723.mk index 9399f9f45..10fecae45 100644 --- a/buildroot-external/package/bluetooth-rtl8723/bluetooth-rtl8723.mk +++ b/buildroot-external/package/bluetooth-rtl8723/bluetooth-rtl8723.mk @@ -11,10 +11,10 @@ BLUETOOTH_RTL8723_SITE = $(BR2_EXTERNAL_HASSOS_PATH)/package/bluetooth-rtl8723 BLUETOOTH_RTL8723_SITE_METHOD = local define BLUETOOTH_RTL8723_BUILD_CMDS - curl -L -o $(@D)/rtk_hciattach https://raw.githubusercontent.com/armbian/build/dee62df8bb2fe8611fd41ddf02063fa15533298c/packages/bsp/rockchip/rtk_hciattach + curl -L -o $(@D)/rtk_hciattach https://raw.githubusercontent.com/home-assistant/hassos-blobs/e0c8b7aebb626694cf5c017a9e03068aee2bc604/rtl_bt/rtk_hciattach - curl -L -o $(@D)/rtl8723b_config https://raw.githubusercontent.com/armbian/firmware/4723bbb3d1ef70b5fbe7d2599c47d078ab125c47/rtl_bt/rtl8723b_config.bin - curl -L -o $(@D)/rtl8723b_fw https://raw.githubusercontent.com/armbian/firmware/4723bbb3d1ef70b5fbe7d2599c47d078ab125c47/rtl_bt/rtl8723b_fw.bin + curl -L -o $(@D)/rtl8723b_config https://raw.githubusercontent.com/home-assistant/hassos-blobs/e0c8b7aebb626694cf5c017a9e03068aee2bc604/rtl_bt/rtl8723b_config.bin + curl -L -o $(@D)/rtl8723b_fw https://raw.githubusercontent.com/home-assistant/hassos-blobs/e0c8b7aebb626694cf5c017a9e03068aee2bc604/rtl_bt/rtl8723b_fw.bin endef define BLUETOOTH_RTL8723_INSTALL_TARGET_CMDS diff --git a/buildroot-external/package/hardkernel-boot/Config.in b/buildroot-external/package/hardkernel-boot/Config.in index fe652e3dc..0940e116c 100644 --- a/buildroot-external/package/hardkernel-boot/Config.in +++ b/buildroot-external/package/hardkernel-boot/Config.in @@ -19,6 +19,11 @@ config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_XU4 help For the Odroid-XU4 +config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_N2 + bool "Odroid-N2" + help + For the Odroid-N2 + endchoice endif diff --git a/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk b/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk index edd0f443d..2ff218e7a 100644 --- a/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk +++ b/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk @@ -4,7 +4,6 @@ # ################################################################################ - HARDKERNEL_BOOT_SOURCE = $(HARDKERNEL_BOOT_VERSION).tar.gz HARDKERNEL_BOOT_SITE = https://github.com/hardkernel/u-boot/archive HARDKERNEL_BOOT_LICENSE = GPL-2.0+ @@ -20,14 +19,16 @@ HARDKERNEL_BOOT_BINS += sd_fuse/bl1.bin.hardkernel \ u-boot.gxbb define HARDKERNEL_BOOT_BUILD_CMDS $(@D)/fip/fip_create --bl30 $(@D)/fip/gxb/bl30.bin \ - --bl301 $(@D)/fip/gxb/bl301.bin \ - --bl31 $(@D)/fip/gxb/bl31.bin \ - --bl33 $(BINARIES_DIR)/u-boot.bin \ - $(@D)/fip.bin + --bl301 $(@D)/fip/gxb/bl301.bin \ + --bl31 $(@D)/fip/gxb/bl31.bin \ + --bl33 $(BINARIES_DIR)/u-boot.bin \ + $(@D)/fip.bin + cat $(@D)/fip/gxb/bl2.package $(@D)/fip.bin > $(@D)/boot_new.bin $(@D)/fip/gxb/aml_encrypt_gxb --bootsig \ - --input $(@D)/boot_new.bin \ - --output $(@D)/u-boot.img + --input $(@D)/boot_new.bin \ + --output $(@D)/u-boot.img + dd if=$(@D)/u-boot.img of=$(@D)/u-boot.gxbb bs=512 skip=96 endef @@ -39,6 +40,54 @@ HARDKERNEL_BOOT_BINS += sd_fuse/bl1.bin.hardkernel \ sd_fuse/tzsw.bin.hardkernel define HARDKERNEL_BOOT_BUILD_CMDS endef + +else ifeq ($(BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_N2),y) +HARDKERNEL_BOOT_VERSION = c989da31a5c1da3ab57d7c6dc5a3fdbcc1c3eed7 + +HARDKERNEL_BOOT_BINS += u-boot.g12b +define HARDKERNEL_BOOT_BUILD_CMDS + curl -L -o $(@D)/fip/blx_fix.sh https://raw.githubusercontent.com/home-assistant/hassos-blobs/d271a9c4aedf740e4fa716c3cb7faee93257e968/odroid-n2/blx_fix_g12a.sh + curl -L -o $(@D)/fip/acs.bin https://raw.githubusercontent.com/home-assistant/hassos-blobs/d271a9c4aedf740e4fa716c3cb7faee93257e968/odroid-n2/acs.bin + curl -L -o $(@D)/fip/bl301.bin https://raw.githubusercontent.com/home-assistant/hassos-blobs/d271a9c4aedf740e4fa716c3cb7faee93257e968/odroid-n2/bl301.bin + + bash $(@D)/fip/blx_fix.sh \ + $(@D)/fip/g12b/bl30.bin $(@D)/fip/zero_tmp $(@D)/fip/bl30_zero.bin \ + $(@D)/fip/bl301.bin $(@D)/fip/bl301_zero.bin $(@D)/fip/bl30_new.bin \ + bl30 + + bash $(@D)/fip/blx_fix.sh \ + $(@D)/fip/g12b/bl2.bin $(@D)/fip/zero_tmp $(@D)/fip/bl2_zero.bin \ + $(@D)/fip/acs.bin $(@D)/fip/bl21_zero.bin $(@D)/fip/bl2_new.bin \ + bl2 + + $(@D)/fip/g12b/aml_encrypt_g12b --bl30sig --input $(@D)/fip/bl30_new.bin \ + --output $(@D)/fip/bl30_new.bin.g12.enc \ + --level v3 + $(@D)/fip/g12b/aml_encrypt_g12b --bl3sig --input $(@D)/fip/bl30_new.bin.g12.enc \ + --output $(@D)/fip/bl30_new.bin.enc \ + --level v3 --type bl30 + $(@D)/fip/g12b/aml_encrypt_g12b --bl3sig --input $(@D)/fip/g12b/bl31.img \ + --output $(@D)/fip/bl31.img.enc \ + --level v3 --type bl31 + $(@D)/fip/g12b/aml_encrypt_g12b --bl3sig --input $(BINARIES_DIR)/u-boot.bin \ + --output $(@D)/fip/bl33.bin.enc \ + --level v3 --type bl33 --compress lz4 + $(@D)/fip/g12b/aml_encrypt_g12b --bl2sig --input $(@D)/fip/bl2_new.bin \ + --output $(@D)/fip/bl2.n.bin.sig + $(@D)/fip/g12b/aml_encrypt_g12b --bootmk \ + --output $(@D)/fip/u-boot.bin \ + --bl2 $(@D)/fip/bl2.n.bin.sig \ + --bl30 $(@D)/fip/bl30_new.bin.enc \ + --bl31 $(@D)/fip/bl31.img.enc \ + --bl33 $(@D)/fip/bl33.bin.enc \ + --ddrfw1 $(@D)/fip/g12b/ddr4_1d.fw \ + --ddrfw2 $(@D)/fip/g12b/ddr4_2d.fw \ + --ddrfw4 $(@D)/fip/g12b/piei.fw \ + --ddrfw8 $(@D)/fip/g12b/aml_ddr.fw \ + --level v3 + + cp $(@D)/fip/u-boot.bin $(@D)/u-boot.g12b +endef endif define HARDKERNEL_BOOT_INSTALL_IMAGES_CMDS diff --git a/buildroot-patches/0011-Add-kernel-5.4.patch b/buildroot-patches/0011-Add-kernel-5.4.patch new file mode 100644 index 000000000..9d80de044 --- /dev/null +++ b/buildroot-patches/0011-Add-kernel-5.4.patch @@ -0,0 +1,65 @@ +From beadf75fe1bb7257d8d3be95c6d415a39f48f89e Mon Sep 17 00:00:00 2001 +From: Pascal Vizeli +Date: Mon, 30 Dec 2019 11:21:02 +0000 +Subject: [PATCH 1/1] Add kernel 5.4 + +Signed-off-by: Pascal Vizeli +--- + package/linux-headers/Config.in.host | 4 ++++ + toolchain/Config.in | 5 +++++ + .../toolchain-external-custom/Config.in.options | 4 ++++ + 3 files changed, 13 insertions(+) + +diff --git a/package/linux-headers/Config.in.host b/package/linux-headers/Config.in.host +index ff5959ac47..074aee0cb4 100644 +--- a/package/linux-headers/Config.in.host ++++ b/package/linux-headers/Config.in.host +@@ -116,6 +116,10 @@ choice + This is used to hide/show some packages that have strict + requirements on the version of kernel headers. + ++config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4 ++ bool "5.4.x" ++ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 ++ + config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_20 + bool "4.20.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 +diff --git a/toolchain/Config.in b/toolchain/Config.in +index 87d7bc30bb..9d566cbf72 100644 +--- a/toolchain/Config.in ++++ b/toolchain/Config.in +@@ -398,10 +398,15 @@ config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_19 + ++config BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 ++ bool ++ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 ++ + # This order guarantees that the highest version is set, as kconfig + # stops affecting a value on the first matching default. + config BR2_TOOLCHAIN_HEADERS_AT_LEAST + string ++ default "5.4" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 + default "4.20" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 + default "4.19" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_19 + default "4.18" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_18 +diff --git a/toolchain/toolchain-external/toolchain-external-custom/Config.in.options b/toolchain/toolchain-external/toolchain-external-custom/Config.in.options +index 08a79ee4d9..81c48a11b4 100644 +--- a/toolchain/toolchain-external/toolchain-external-custom/Config.in.options ++++ b/toolchain/toolchain-external/toolchain-external-custom/Config.in.options +@@ -123,6 +123,10 @@ choice + m = ( LINUX_VERSION_CODE >> 8 ) & 0xFF + p = ( LINUX_VERSION_CODE >> 0 ) & 0xFF + ++config BR2_TOOLCHAIN_EXTERNAL_HEADERS_5_4 ++ bool "5.4.x" ++ select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 ++ + config BR2_TOOLCHAIN_EXTERNAL_HEADERS_4_20 + bool "4.20.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 +-- +2.17.1 + diff --git a/buildroot-patches/0012-Bump-bluez-5.52.patch b/buildroot-patches/0012-Bump-bluez-5.52.patch new file mode 100644 index 000000000..81ef9ef31 --- /dev/null +++ b/buildroot-patches/0012-Bump-bluez-5.52.patch @@ -0,0 +1,51 @@ +From 4e3d6b2b4d600babb79492fbcd04d7bbd16a2a58 Mon Sep 17 00:00:00 2001 +From: Pascal Vizeli +Date: Mon, 30 Dec 2019 13:18:34 +0000 +Subject: [PATCH 1/1] Bump bluez 5.52 + +Signed-off-by: Pascal Vizeli +--- + package/bluez5_utils-headers/bluez5_utils-headers.mk | 2 +- + package/bluez5_utils/bluez5_utils.hash | 2 +- + package/bluez5_utils/bluez5_utils.mk | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/package/bluez5_utils-headers/bluez5_utils-headers.mk b/package/bluez5_utils-headers/bluez5_utils-headers.mk +index 020e8b4d4e..c61f93a23c 100644 +--- a/package/bluez5_utils-headers/bluez5_utils-headers.mk ++++ b/package/bluez5_utils-headers/bluez5_utils-headers.mk +@@ -5,7 +5,7 @@ + ################################################################################ + + # Keep the version and patches in sync with bluez5_utils +-BLUEZ5_UTILS_HEADERS_VERSION = 5.50 ++BLUEZ5_UTILS_HEADERS_VERSION = 5.52 + BLUEZ5_UTILS_HEADERS_SOURCE = bluez-$(BLUEZ5_UTILS_VERSION).tar.xz + BLUEZ5_UTILS_HEADERS_SITE = $(BR2_KERNEL_MIRROR)/linux/bluetooth + BLUEZ5_UTILS_HEADERS_DL_SUBDIR = bluez5_utils +diff --git a/package/bluez5_utils/bluez5_utils.hash b/package/bluez5_utils/bluez5_utils.hash +index b965708559..00112bc0b6 100644 +--- a/package/bluez5_utils/bluez5_utils.hash ++++ b/package/bluez5_utils/bluez5_utils.hash +@@ -1,4 +1,4 @@ + # From https://www.kernel.org/pub/linux/bluetooth/sha256sums.asc: +-sha256 5ffcaae18bbb6155f1591be8c24898dc12f062075a40b538b745bfd477481911 bluez-5.50.tar.xz ++sha256 f7144ce2039202cfac18ccb52426efea11c98e4f6e1bb8041bcb994b8378560a bluez-5.52.tar.xz + sha256 b499eddebda05a8859e32b820a64577d91f1de2b52efa2a1575a2cb4000bc259 COPYING + sha256 ec60b993835e2c6b79e6d9226345f4e614e686eb57dc13b6420c15a33a8996e5 COPYING.LIB +diff --git a/package/bluez5_utils/bluez5_utils.mk b/package/bluez5_utils/bluez5_utils.mk +index 15c9b670a7..7c5202b717 100644 +--- a/package/bluez5_utils/bluez5_utils.mk ++++ b/package/bluez5_utils/bluez5_utils.mk +@@ -5,7 +5,7 @@ + ################################################################################ + + # Keep the version and patches in sync with bluez5_utils-headers +-BLUEZ5_UTILS_VERSION = 5.50 ++BLUEZ5_UTILS_VERSION = 5.52 + BLUEZ5_UTILS_SOURCE = bluez-$(BLUEZ5_UTILS_VERSION).tar.xz + BLUEZ5_UTILS_SITE = $(BR2_KERNEL_MIRROR)/linux/bluetooth + BLUEZ5_UTILS_INSTALL_STAGING = YES +-- +2.17.1 + diff --git a/buildroot-patches/0013-Bump-WireGuard-20191219.patch b/buildroot-patches/0013-Bump-WireGuard-20191219.patch new file mode 100644 index 000000000..4faf30c60 --- /dev/null +++ b/buildroot-patches/0013-Bump-WireGuard-20191219.patch @@ -0,0 +1,37 @@ +From 7da4f3e43f393ce09156cdb902bd879e2b6d7431 Mon Sep 17 00:00:00 2001 +From: Pascal Vizeli +Date: Mon, 30 Dec 2019 13:44:59 +0000 +Subject: [PATCH 1/1] Bump WireGuard 20191219 + +Signed-off-by: Pascal Vizeli +--- + package/wireguard/wireguard.hash | 2 +- + package/wireguard/wireguard.mk | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/package/wireguard/wireguard.hash b/package/wireguard/wireguard.hash +index 70558de720..8097aeb95b 100644 +--- a/package/wireguard/wireguard.hash ++++ b/package/wireguard/wireguard.hash +@@ -1,4 +1,4 @@ + # https://lists.zx2c4.com/pipermail/wireguard/2019-January/003805.html +-sha256 edd13c7631af169e3838621b1a1bff3ef73cf7bc778eec2bd55f7c1089ffdf9b WireGuard-0.0.20190123.tar.xz ++sha256 5aba6f0c38e97faa0b155623ba594bb0e4bd5e29deacd8d5ed8bda8d8283b0e7 WireGuard-0.0.20191219.tar.xz + # Locally calculated + sha256 8177f97513213526df2cf6184d8ff986c675afb514d4e68a404010521b880643 COPYING +diff --git a/package/wireguard/wireguard.mk b/package/wireguard/wireguard.mk +index 8d6cdb8e56..500c7dbd21 100644 +--- a/package/wireguard/wireguard.mk ++++ b/package/wireguard/wireguard.mk +@@ -4,7 +4,7 @@ + # + ################################################################################ + +-WIREGUARD_VERSION = 0.0.20190123 ++WIREGUARD_VERSION = 0.0.20191219 + WIREGUARD_SITE = https://git.zx2c4.com/WireGuard/snapshot + WIREGUARD_SOURCE = WireGuard-$(WIREGUARD_VERSION).tar.xz + WIREGUARD_LICENSE = GPL-2.0 +-- +2.17.1 + diff --git a/buildroot/package/bluez5_utils-headers/bluez5_utils-headers.mk b/buildroot/package/bluez5_utils-headers/bluez5_utils-headers.mk index 020e8b4d4..c61f93a23 100644 --- a/buildroot/package/bluez5_utils-headers/bluez5_utils-headers.mk +++ b/buildroot/package/bluez5_utils-headers/bluez5_utils-headers.mk @@ -5,7 +5,7 @@ ################################################################################ # Keep the version and patches in sync with bluez5_utils -BLUEZ5_UTILS_HEADERS_VERSION = 5.50 +BLUEZ5_UTILS_HEADERS_VERSION = 5.52 BLUEZ5_UTILS_HEADERS_SOURCE = bluez-$(BLUEZ5_UTILS_VERSION).tar.xz BLUEZ5_UTILS_HEADERS_SITE = $(BR2_KERNEL_MIRROR)/linux/bluetooth BLUEZ5_UTILS_HEADERS_DL_SUBDIR = bluez5_utils diff --git a/buildroot/package/bluez5_utils/bluez5_utils.hash b/buildroot/package/bluez5_utils/bluez5_utils.hash index b96570855..00112bc0b 100644 --- a/buildroot/package/bluez5_utils/bluez5_utils.hash +++ b/buildroot/package/bluez5_utils/bluez5_utils.hash @@ -1,4 +1,4 @@ # From https://www.kernel.org/pub/linux/bluetooth/sha256sums.asc: -sha256 5ffcaae18bbb6155f1591be8c24898dc12f062075a40b538b745bfd477481911 bluez-5.50.tar.xz +sha256 f7144ce2039202cfac18ccb52426efea11c98e4f6e1bb8041bcb994b8378560a bluez-5.52.tar.xz sha256 b499eddebda05a8859e32b820a64577d91f1de2b52efa2a1575a2cb4000bc259 COPYING sha256 ec60b993835e2c6b79e6d9226345f4e614e686eb57dc13b6420c15a33a8996e5 COPYING.LIB diff --git a/buildroot/package/bluez5_utils/bluez5_utils.mk b/buildroot/package/bluez5_utils/bluez5_utils.mk index 15c9b670a..7c5202b71 100644 --- a/buildroot/package/bluez5_utils/bluez5_utils.mk +++ b/buildroot/package/bluez5_utils/bluez5_utils.mk @@ -5,7 +5,7 @@ ################################################################################ # Keep the version and patches in sync with bluez5_utils-headers -BLUEZ5_UTILS_VERSION = 5.50 +BLUEZ5_UTILS_VERSION = 5.52 BLUEZ5_UTILS_SOURCE = bluez-$(BLUEZ5_UTILS_VERSION).tar.xz BLUEZ5_UTILS_SITE = $(BR2_KERNEL_MIRROR)/linux/bluetooth BLUEZ5_UTILS_INSTALL_STAGING = YES diff --git a/buildroot/package/linux-headers/Config.in.host b/buildroot/package/linux-headers/Config.in.host index d092da2fb..ec95ea830 100644 --- a/buildroot/package/linux-headers/Config.in.host +++ b/buildroot/package/linux-headers/Config.in.host @@ -116,6 +116,10 @@ choice This is used to hide/show some packages that have strict requirements on the version of kernel headers. +config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4 + bool "5.4.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 + config BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_20 bool "4.20.x" select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 diff --git a/buildroot/package/wireguard/wireguard.hash b/buildroot/package/wireguard/wireguard.hash index 70558de72..8097aeb95 100644 --- a/buildroot/package/wireguard/wireguard.hash +++ b/buildroot/package/wireguard/wireguard.hash @@ -1,4 +1,4 @@ # https://lists.zx2c4.com/pipermail/wireguard/2019-January/003805.html -sha256 edd13c7631af169e3838621b1a1bff3ef73cf7bc778eec2bd55f7c1089ffdf9b WireGuard-0.0.20190123.tar.xz +sha256 5aba6f0c38e97faa0b155623ba594bb0e4bd5e29deacd8d5ed8bda8d8283b0e7 WireGuard-0.0.20191219.tar.xz # Locally calculated sha256 8177f97513213526df2cf6184d8ff986c675afb514d4e68a404010521b880643 COPYING diff --git a/buildroot/package/wireguard/wireguard.mk b/buildroot/package/wireguard/wireguard.mk index 8d6cdb8e5..500c7dbd2 100644 --- a/buildroot/package/wireguard/wireguard.mk +++ b/buildroot/package/wireguard/wireguard.mk @@ -4,7 +4,7 @@ # ################################################################################ -WIREGUARD_VERSION = 0.0.20190123 +WIREGUARD_VERSION = 0.0.20191219 WIREGUARD_SITE = https://git.zx2c4.com/WireGuard/snapshot WIREGUARD_SOURCE = WireGuard-$(WIREGUARD_VERSION).tar.xz WIREGUARD_LICENSE = GPL-2.0 diff --git a/buildroot/toolchain/Config.in b/buildroot/toolchain/Config.in index 87d7bc30b..9d566cbf7 100644 --- a/buildroot/toolchain/Config.in +++ b/buildroot/toolchain/Config.in @@ -398,10 +398,15 @@ config BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 bool select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_19 +config BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 + bool + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 + # This order guarantees that the highest version is set, as kconfig # stops affecting a value on the first matching default. config BR2_TOOLCHAIN_HEADERS_AT_LEAST string + default "5.4" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 default "4.20" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 default "4.19" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_19 default "4.18" if BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_18 diff --git a/buildroot/toolchain/toolchain-external/toolchain-external-custom/Config.in.options b/buildroot/toolchain/toolchain-external/toolchain-external-custom/Config.in.options index 08a79ee4d..81c48a11b 100644 --- a/buildroot/toolchain/toolchain-external/toolchain-external-custom/Config.in.options +++ b/buildroot/toolchain/toolchain-external/toolchain-external-custom/Config.in.options @@ -123,6 +123,10 @@ choice m = ( LINUX_VERSION_CODE >> 8 ) & 0xFF p = ( LINUX_VERSION_CODE >> 0 ) & 0xFF +config BR2_TOOLCHAIN_EXTERNAL_HEADERS_5_4 + bool "5.4.x" + select BR2_TOOLCHAIN_HEADERS_AT_LEAST_5_4 + config BR2_TOOLCHAIN_EXTERNAL_HEADERS_4_20 bool "4.20.x" select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_20 From febc4473d39f431c976a9af43a98495fce2ad6ba Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 9 Jan 2020 23:02:46 +0100 Subject: [PATCH 34/43] New supervisor / Adjust rauc handling (#530) * OS: Update supervisor 194 * Remove old rauc mark code * OS: Update supervisor 195 * Adjust dockerd --- .../configs/intel_nuc_defconfig | 2 +- .../configs/odroid_c2_defconfig | 2 +- .../configs/odroid_n2_defconfig | 2 +- .../configs/odroid_xu4_defconfig | 2 +- .../configs/opi_prime_defconfig | 2 +- buildroot-external/configs/ova_defconfig | 2 +- buildroot-external/configs/rpi0_w_defconfig | 2 +- buildroot-external/configs/rpi2_defconfig | 2 +- buildroot-external/configs/rpi3_64_defconfig | 2 +- buildroot-external/configs/rpi3_defconfig | 2 +- buildroot-external/configs/rpi4_64_defconfig | 2 +- buildroot-external/configs/rpi4_defconfig | 2 +- buildroot-external/configs/rpi_defconfig | 2 +- buildroot-external/configs/tinker_defconfig | 2 +- buildroot-external/misc/rauc-hook | 9 ------ .../system/docker.service.d/failure.conf | 2 ++ .../system/docker.service.d/resource.conf | 2 ++ .../timers.target.wants/rauc-mark.timer | 1 - .../usr/lib/systemd/system/rauc-mark.service | 9 ------ .../usr/lib/systemd/system/rauc-mark.timer | 8 ------ .../rootfs-overlay/usr/libexec/hassos-rate | 28 ------------------- 21 files changed, 18 insertions(+), 69 deletions(-) create mode 100644 buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/failure.conf create mode 100644 buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/resource.conf delete mode 120000 buildroot-external/rootfs-overlay/etc/systemd/system/timers.target.wants/rauc-mark.timer delete mode 100644 buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.service delete mode 100644 buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.timer delete mode 100755 buildroot-external/rootfs-overlay/usr/libexec/hassos-rate diff --git a/buildroot-external/configs/intel_nuc_defconfig b/buildroot-external/configs/intel_nuc_defconfig index 4ac498771..08a6f5abf 100644 --- a/buildroot-external/configs/intel_nuc_defconfig +++ b/buildroot-external/configs/intel_nuc_defconfig @@ -96,7 +96,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/intel-nuc-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig index 18798b274..1b5f15dc7 100644 --- a/buildroot-external/configs/odroid_c2_defconfig +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -90,7 +90,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-c2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_n2_defconfig b/buildroot-external/configs/odroid_n2_defconfig index 725294857..5df300194 100644 --- a/buildroot-external/configs/odroid_n2_defconfig +++ b/buildroot-external/configs/odroid_n2_defconfig @@ -90,7 +90,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-n2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/odroid_xu4_defconfig b/buildroot-external/configs/odroid_xu4_defconfig index c045a8849..d2e577cdc 100644 --- a/buildroot-external/configs/odroid_xu4_defconfig +++ b/buildroot-external/configs/odroid_xu4_defconfig @@ -95,7 +95,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-xu-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig index 4f2314336..105afc61b 100644 --- a/buildroot-external/configs/opi_prime_defconfig +++ b/buildroot-external/configs/opi_prime_defconfig @@ -104,7 +104,7 @@ BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HOST_SWIG=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/orangepi-prime-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index a015ea654..46f264622 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -87,7 +87,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qemux86-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 70f49e692..8389258ff 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index a66ed963f..359ae3411 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index 0791f7921..c8a127cf5 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 8ee2183c8..9af044177 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -93,7 +93,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 970e229ac..76ac45bcf 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -94,7 +94,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index bda719a64..8dd8cf01d 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -94,7 +94,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi4-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 1ee43953c..a131ecdd7 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -92,7 +92,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index af663743f..dcfc07377 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -97,7 +97,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armv7-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="193" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/misc/rauc-hook b/buildroot-external/misc/rauc-hook index 851472e94..de24bf499 100755 --- a/buildroot-external/misc/rauc-hook +++ b/buildroot-external/misc/rauc-hook @@ -31,14 +31,5 @@ fi ## # Fixups -# timesyncd -if [ -L /var/lib/systemd/timesync ]; then - rm -f /var/lib/systemd/timesync -fi - -# u-boot first stage device tree -if [ -e /usr/sbin/fw_setenv ]; then - fw_setenv fdt_addr -fi exit 0 diff --git a/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/failure.conf b/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/failure.conf new file mode 100644 index 000000000..128fbd509 --- /dev/null +++ b/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/failure.conf @@ -0,0 +1,2 @@ +[Unit] +FailureAction=reboot diff --git a/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/resource.conf b/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/resource.conf new file mode 100644 index 000000000..0d7b1e5f9 --- /dev/null +++ b/buildroot-external/rootfs-overlay/etc/systemd/system/docker.service.d/resource.conf @@ -0,0 +1,2 @@ +[Service] +TasksMax=infinity \ No newline at end of file diff --git a/buildroot-external/rootfs-overlay/etc/systemd/system/timers.target.wants/rauc-mark.timer b/buildroot-external/rootfs-overlay/etc/systemd/system/timers.target.wants/rauc-mark.timer deleted file mode 120000 index bbdfaf738..000000000 --- a/buildroot-external/rootfs-overlay/etc/systemd/system/timers.target.wants/rauc-mark.timer +++ /dev/null @@ -1 +0,0 @@ -/usr/lib/systemd/system/rauc-mark.timer \ No newline at end of file diff --git a/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.service b/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.service deleted file mode 100644 index 1c22ee576..000000000 --- a/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.service +++ /dev/null @@ -1,9 +0,0 @@ -[Unit] -Description=HassOS rauc good -RefuseManualStart=true -RefuseManualStop=true - -[Service] -Type=oneshot -ExecStart=/usr/libexec/hassos-rate -RemainAfterExit=true diff --git a/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.timer b/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.timer deleted file mode 100644 index fa79b78fd..000000000 --- a/buildroot-external/rootfs-overlay/usr/lib/systemd/system/rauc-mark.timer +++ /dev/null @@ -1,8 +0,0 @@ -[Unit] -Description=HassOS mark boot partition as good - -[Timer] -OnBootSec=1min - -[Install] -WantedBy=timers.target diff --git a/buildroot-external/rootfs-overlay/usr/libexec/hassos-rate b/buildroot-external/rootfs-overlay/usr/libexec/hassos-rate deleted file mode 100755 index 942e6d58d..000000000 --- a/buildroot-external/rootfs-overlay/usr/libexec/hassos-rate +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/sh -# shellcheck disable=SC2112 -set -e - - -function mark_good() { - rauc status mark-good - exit 0 -} - -function mark_bad() { - rauc status mark-bad - systemctl reboot -} - -#### Check system #### - -# Docker state -if systemctl -q is-failed docker; then - mark_bad -fi - -# Docker state -if systemctl -q is-failed hassos-supervisor; then - mark_bad -fi - -mark_good From dc4ee618097ddec7a081217a3162fbe43f17b3ab Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Thu, 9 Jan 2020 23:16:03 +0100 Subject: [PATCH 35/43] Remove orangepi (#531) --- azure-pipelines-release.yml | 2 - .../board/orangepi/hassos-hook.sh | 25 ---- .../board/orangepi/kernel.config | 32 ----- .../board/orangepi/prime/config.txt | 3 - buildroot-external/board/orangepi/prime/meta | 7 -- .../board/orangepi/prime/uboot-boot.ush | 88 ------------- .../board/orangepi/prime/uboot.config | 8 -- .../configs/opi_prime_defconfig | 116 ------------------ 8 files changed, 281 deletions(-) delete mode 100755 buildroot-external/board/orangepi/hassos-hook.sh delete mode 100644 buildroot-external/board/orangepi/kernel.config delete mode 100644 buildroot-external/board/orangepi/prime/config.txt delete mode 100644 buildroot-external/board/orangepi/prime/meta delete mode 100644 buildroot-external/board/orangepi/prime/uboot-boot.ush delete mode 100644 buildroot-external/board/orangepi/prime/uboot.config delete mode 100644 buildroot-external/configs/opi_prime_defconfig diff --git a/azure-pipelines-release.yml b/azure-pipelines-release.yml index 44cbe0d2a..51da2e00c 100644 --- a/azure-pipelines-release.yml +++ b/azure-pipelines-release.yml @@ -50,8 +50,6 @@ jobs: board: 'odroid_n2' OdroidXU4: board: 'odroid_xu4' - OrangePiPrime: - board: 'opi_prime' RaspberryPi: board: 'rpi' RaspberryPi0-W: diff --git a/buildroot-external/board/orangepi/hassos-hook.sh b/buildroot-external/board/orangepi/hassos-hook.sh deleted file mode 100755 index 9636f0d25..000000000 --- a/buildroot-external/board/orangepi/hassos-hook.sh +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/bash -# shellcheck disable=SC2155 - -function hassos_pre_image() { - local BOOT_DATA="$(path_boot_dir)" - local SPL="${BINARIES_DIR}/sunxi-spl.bin" - local UBOOT="${BINARIES_DIR}/u-boot.itb" - local spl_img="$(path_spl_img)" - - cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr" - cp "${BINARIES_DIR}/sun50i-h5-orangepi-prime.dtb" "${BOOT_DATA}/sun50i-h5-orangepi-prime.dtb" - cp "${BOARD_DIR}/config.txt" "${BOOT_DATA}/config.txt" - touch "${BOOT_DATA}/cmdline.txt" - - # SPL - create_spl_image - - dd if="${SPL}" of="${spl_img}" conv=notrunc bs=512 seek=16 - dd if="${UBOOT}" of="${spl_img}" conv=notrunc bs=512 seek=80 -} - - -function hassos_post_image() { - convert_disk_image_gz -} diff --git a/buildroot-external/board/orangepi/kernel.config b/buildroot-external/board/orangepi/kernel.config deleted file mode 100644 index 1953bca8c..000000000 --- a/buildroot-external/board/orangepi/kernel.config +++ /dev/null @@ -1,32 +0,0 @@ -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -# CONFIG_ARCH_ACTIONS is not set -# CONFIG_ARCH_ALPINE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM_IPROC is not set -# CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_BRCMSTB is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set -# CONFIG_ARCH_LG1K is not set -# CONFIG_ARCH_HISI is not set -# CONFIG_ARCH_MEDIATEK is not set -# CONFIG_ARCH_MESON is not set -# CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_REALTEK is not set -# CONFIG_ARCH_ROCKCHIP is not set -# CONFIG_ARCH_SEATTLE is not set -# CONFIG_ARCH_SYNQUACER is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_SPRD is not set -# CONFIG_ARCH_THUNDER is not set -# CONFIG_ARCH_THUNDER2 is not set -# CONFIG_ARCH_UNIPHIER is not set -# CONFIG_ARCH_VEXPRESS is not set -# CONFIG_ARCH_XGENE is not set -# CONFIG_ARCH_ZX is not set -# CONFIG_ARCH_ZYNQMP is not set diff --git a/buildroot-external/board/orangepi/prime/config.txt b/buildroot-external/board/orangepi/prime/config.txt deleted file mode 100644 index 982ca9256..000000000 --- a/buildroot-external/board/orangepi/prime/config.txt +++ /dev/null @@ -1,3 +0,0 @@ -i2c0_enable=true -i2c1_enable=false -i2c2_enable=false diff --git a/buildroot-external/board/orangepi/prime/meta b/buildroot-external/board/orangepi/prime/meta deleted file mode 100644 index 14ad302e9..000000000 --- a/buildroot-external/board/orangepi/prime/meta +++ /dev/null @@ -1,7 +0,0 @@ -BOARD_ID=opi-prime -BOARD_NAME="Orange Pi Prime" -CHASSIS=embedded -BOOTLOADER=uboot -KERNEL_FILE=Image -BOOT_SYS=spl -BOOT_ENV_SIZE=0x8000 diff --git a/buildroot-external/board/orangepi/prime/uboot-boot.ush b/buildroot-external/board/orangepi/prime/uboot-boot.ush deleted file mode 100644 index 920a2d090..000000000 --- a/buildroot-external/board/orangepi/prime/uboot-boot.ush +++ /dev/null @@ -1,88 +0,0 @@ - -part start mmc ${devnum} 6 mmc_env -mmc dev ${devnum} -setenv loadbootstate " \ - echo 'loading env...'; \ - mmc read ${ramdisk_addr_r} ${mmc_env} 0x40; \ - env import -c ${ramdisk_addr_r} 0x8000;" - -setenv storebootstate " \ - echo 'storing env...'; \ - env export -c -s 0x8000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT; \ - mmc write ${ramdisk_addr_r} ${mmc_env} 0x40;" - -run loadbootstate -test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B" -test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3 -test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3 - -# HassOS bootargs -setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory rootwait" - -# HassOS system A/B -setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro" -setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro" - -# Load extraargs -fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline - -# Load device tree -fatload mmc ${devnum}:1 ${fdt_addr_r} sun50i-h5-orangepi-prime.dtb -fdt addr ${fdt_addr_r} - -if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then - env import -t ${ramdisk_addr_r} ${filesize}; -fi - -if test "${i2c0_enable}" != "false"; then - fdt set /soc/i2c@1c2ac00 status "okay" -fi - -if test "${i2c1_enable}" != "false"; then - fdt set /soc/i2c@1c2b000 status "okay" -fi - -if test "${i2c2_enable}" != "false"; then - fdt set /soc/i2c@1c2b400 status "okay" -fi - -setenv bootargs -for BOOT_SLOT in "${BOOT_ORDER}"; do - if test "x${bootargs}" != "x"; then - # skip remaining slots - elif test "x${BOOT_SLOT}" = "xA"; then - if test ${BOOT_A_LEFT} -gt 0; then - setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1 - echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining" - setenv load_kernel "ext4load mmc ${devnum}:2 ${kernel_addr_r} Image" - setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}" - fi - elif test "x${BOOT_SLOT}" = "xB"; then - if test ${BOOT_B_LEFT} -gt 0; then - setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1 - echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining" - setenv load_kernel "ext4load mmc ${devnum}:4 ${kernel_addr_r} Image" - setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}" - fi - fi -done - -if test -n "${bootargs}"; then - run storebootstate -else - echo "No valid slot found, resetting tries to 3" - setenv BOOT_A_LEFT 3 - setenv BOOT_B_LEFT 3 - run storebootstate - reset -fi - -echo "Loading kernel" -run load_kernel -echo " Starting kernel" -printenv load_kernel -printenv bootargs -booti ${kernel_addr_r} - ${fdt_addr_r} - -echo "Fails on boot" -reset diff --git a/buildroot-external/board/orangepi/prime/uboot.config b/buildroot-external/board/orangepi/prime/uboot.config deleted file mode 100644 index 8afa0b76a..000000000 --- a/buildroot-external/board/orangepi/prime/uboot.config +++ /dev/null @@ -1,8 +0,0 @@ -# CONFIG_USB_STORAGE is not set -# CONFIG_DOS_PARTITIONcs not set -CONFIG_EFI_PARTITION is not set -CONFIG_USB=y -CONFIG_CMD_USB=y -CONFIG_DM_USB=y -CONFIG_CMD_FILEENV=y -CONFIG_ENV_IS_NOWHERE=Y diff --git a/buildroot-external/configs/opi_prime_defconfig b/buildroot-external/configs/opi_prime_defconfig deleted file mode 100644 index 105afc61b..000000000 --- a/buildroot-external/configs/opi_prime_defconfig +++ /dev/null @@ -1,116 +0,0 @@ -BR2_aarch64=y -BR2_cortex_a53=y -BR2_ARM_FPU_VFPV4=y -BR2_DL_DIR="/cache/dl" -BR2_CCACHE=y -BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches" -BR2_TOOLCHAIN_BUILDROOT_GLIBC=y -BR2_GCC_VERSION_7_X=y -BR2_TOOLCHAIN_BUILDROOT_CXX=y -BR2_BINUTILS_ENABLE_LTO=y -BR2_GCC_ENABLE_LTO=y -BR2_TARGET_GENERIC_HOSTNAME="hassio" -BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" -BR2_INIT_SYSTEMD=y -BR2_TARGET_GENERIC_GETTY_PORT="tty0" -# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set -BR2_TARGET_ARM_TRUSTED_FIRMWARE=y -BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_GIT=y -BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_URL="https://github.com/apritzel/arm-trusted-firmware.git" -BR2_TARGET_ARM_TRUSTED_FIRMWARE_PLATFORM="sun50iw1p1" -BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_VERSION="aa75c8da415158a94b82a430b2b40000778e851f" -BR2_TARGET_ARM_TRUSTED_FIRMWARE_BL31=y -BR2_TARGET_UBOOT=y -BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y -BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" -BR2_TARGET_UBOOT_BOARD_DEFCONFIG="orangepi_prime" -BR2_TARGET_UBOOT_NEEDS_DTC=y -BR2_TARGET_UBOOT_NEEDS_ATF_BL31=y -BR2_TARGET_UBOOT_FORMAT_CUSTOM=y -BR2_TARGET_UBOOT_FORMAT_CUSTOM_NAME="u-boot.itb" -BR2_TARGET_UBOOT_SPL=y -BR2_TARGET_UBOOT_SPL_NAME="spl/sunxi-spl.bin" -BR2_TARGET_UBOOT_BOOT_SCRIPT=y -BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot-boot.ush" -BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime/uboot.config" -BR2_LINUX_KERNEL=y -BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88" -BR2_LINUX_KERNEL_DTS_SUPPORT=y -BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun50i-h5-orangepi-prime" -BR2_LINUX_KERNEL_LZ4=y -BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y -BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y -BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG=y -BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/kernel.config" -BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" -BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/prime $(BR2_EXTERNAL_HASSOS_PATH)/board/orangepi/hassos-hook.sh" -BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config" -BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y -BR2_PACKAGE_PROCPS_NG=y -BR2_PACKAGE_JQ=y -BR2_PACKAGE_E2FSPROGS=y -BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y -BR2_PACKAGE_SQUASHFS=y -BR2_PACKAGE_LINUX_FIRMWARE=y -BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y -BR2_PACKAGE_GPTFDISK=y -BR2_PACKAGE_GPTFDISK_SGDISK=y -BR2_PACKAGE_UBOOT_TOOLS=y -BR2_PACKAGE_CA_CERTIFICATES=y -BR2_PACKAGE_LIBDNET=y -BR2_PACKAGE_LIBCGROUP=y -BR2_PACKAGE_LIBCGROUP_TOOLS=y -BR2_PACKAGE_AVAHI=y -# BR2_PACKAGE_AVAHI_AUTOIPD is not set -BR2_PACKAGE_AVAHI_DAEMON=y -BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y -BR2_PACKAGE_BLUEZ5_UTILS=y -BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y -BR2_PACKAGE_DHCP=y -BR2_PACKAGE_DHCP_CLIENT=y -BR2_PACKAGE_WIREGUARD=y -BR2_PACKAGE_DROPBEAR=y -# BR2_PACKAGE_DROPBEAR_CLIENT is not set -# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set -BR2_PACKAGE_NETWORK_MANAGER=y -BR2_PACKAGE_TINI=y -BR2_PACKAGE_DOCKER_ENGINE=y -BR2_PACKAGE_DOCKER_CLI=y -BR2_PACKAGE_RAUC=y -BR2_PACKAGE_RAUC_NETWORK=y -# BR2_PACKAGE_SYSTEMD_HWDB is not set -# BR2_PACKAGE_SYSTEMD_NETWORKD is not set -BR2_PACKAGE_SYSTEMD_RANDOMSEED=y -# BR2_PACKAGE_SYSTEMD_RESOLVED is not set -BR2_PACKAGE_SYSTEMD_COREDUMP=y -BR2_PACKAGE_UTIL_LINUX_PARTX=y -BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y -BR2_PACKAGE_USB_MODESWITCH=y -BR2_PACKAGE_USB_MODESWITCH_DATA=y -BR2_TARGET_ROOTFS_SQUASHFS=y -BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y -# BR2_TARGET_ROOTFS_TAR is not set -BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y -BR2_PACKAGE_HOST_DOSFSTOOLS=y -BR2_PACKAGE_HOST_E2FSPROGS=y -BR2_PACKAGE_HOST_GPTFDISK=y -BR2_PACKAGE_HOST_MTOOLS=y -BR2_PACKAGE_HOST_RAUC=y -BR2_PACKAGE_HOST_SWIG=y -BR2_PACKAGE_HASSOS=y -BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="195" -BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/orangepi-prime-homeassistant" -BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" -BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" -BR2_PACKAGE_HASSOS_CLI_VERSION="15" -BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" -BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" -BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" -BR2_PACKAGE_APPARMOR=y From a874bb5fb54687130dc1ee1d499bffd0e13d3357 Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Fri, 10 Jan 2020 14:16:32 +0100 Subject: [PATCH 36/43] RaspberryPi update stable u-boot / Kernel + Firmware (#532) * RaspberryPi: Update kernel b4180819d3a119c56133d6a2d8301775bf6c60bb * Update kernel docs * Update firmware --- Documentation/kernel.md | 2 +- buildroot-external/configs/rpi0_w_defconfig | 4 ++-- buildroot-external/configs/rpi2_defconfig | 4 ++-- buildroot-external/configs/rpi3_64_defconfig | 4 ++-- buildroot-external/configs/rpi3_defconfig | 4 ++-- buildroot-external/configs/rpi4_64_defconfig | 4 ++-- buildroot-external/configs/rpi4_defconfig | 4 ++-- buildroot-external/configs/rpi_defconfig | 4 ++-- ...0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch | 4 ++-- buildroot/package/rpi-firmware/rpi-firmware.hash | 2 +- buildroot/package/rpi-firmware/rpi-firmware.mk | 2 +- 11 files changed, 19 insertions(+), 19 deletions(-) diff --git a/Documentation/kernel.md b/Documentation/kernel.md index cbbbdefea..4ac5c52f3 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -4,7 +4,7 @@ | Board | Version | |-------|---------| | Open Virtual Applicance | 4.19.88 | -| Raspberry Pi | 4.19.88 | +| Raspberry Pi | 4.19.93 | | Tinker Board | 4.19.88 | | Odroid-C2 | 5.4.6 | | Odroid-N2 | 5.4.6 | diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 8389258ff..1f739793c 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 359ae3411..cb426987a 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -79,7 +79,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index c8a127cf5..45f5c735f 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 9af044177..9b53d9871 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -80,7 +80,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi4_64_defconfig b/buildroot-external/configs/rpi4_64_defconfig index 76ac45bcf..0d95caced 100644 --- a/buildroot-external/configs/rpi4_64_defconfig +++ b/buildroot-external/configs/rpi4_64_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4- BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -81,7 +81,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01-rc4" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi4_defconfig b/buildroot-external/configs/rpi4_defconfig index 8dd8cf01d..5883ed932 100644 --- a/buildroot-external/configs/rpi4_defconfig +++ b/buildroot-external/configs/rpi4_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi4 BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcm2711" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -81,7 +81,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01-rc4" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_4_32b" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index a131ecdd7..5171c0076 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -22,7 +22,7 @@ BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $ BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="988cc7beacc150756c3fbe40646afcf8438b741b" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="b4180819d3a119c56133d6a2d8301775bf6c60bb" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -79,7 +79,7 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y BR2_TARGET_UBOOT=y BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y -BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2019.10" +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi" BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config" BR2_TARGET_UBOOT_BOOT_SCRIPT=y diff --git a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch index a3d2e7f7c..5efeb11ce 100644 --- a/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch +++ b/buildroot-patches/0004-rpi-firmware-Bump-firmware-for-kernel-4.19-RPi4.patch @@ -38,7 +38,7 @@ index 9988dda717..3eae7e270b 100644 @@ -1,2 +1,2 @@ # Locally computed -sha256 f1d631920ed4ae15f368ba7b8b3caa4ed604f5223372cc6debbd39a101eb8d74 rpi-firmware-81cca1a9380c828299e884dba5efd0d4acb39e8d.tar.gz -+sha256 484d52caed909fcafbf593cc3e726ea44a9218db7f0aeec843b825797eb9b0fc rpi-firmware-9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e.tar.gz ++sha256 b4f62adf4dc572b1a482169e9688edd2d6a68500ad0d37257faab70eba2bb275 rpi-firmware-dc5622560a2589a417007156b75db71f52b60d80.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index 630bc670ca..fd2970333e 100644 --- a/package/rpi-firmware/rpi-firmware.mk @@ -48,7 +48,7 @@ index 630bc670ca..fd2970333e 100644 ################################################################################ -RPI_FIRMWARE_VERSION = 81cca1a9380c828299e884dba5efd0d4acb39e8d -+RPI_FIRMWARE_VERSION = 9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e ++RPI_FIRMWARE_VERSION = dc5622560a2589a417007156b75db71f52b60d80 RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom diff --git a/buildroot/package/rpi-firmware/rpi-firmware.hash b/buildroot/package/rpi-firmware/rpi-firmware.hash index 6a36a657e..5491af4ab 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.hash +++ b/buildroot/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 484d52caed909fcafbf593cc3e726ea44a9218db7f0aeec843b825797eb9b0fc rpi-firmware-9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e.tar.gz +sha256 b4f62adf4dc572b1a482169e9688edd2d6a68500ad0d37257faab70eba2bb275 rpi-firmware-dc5622560a2589a417007156b75db71f52b60d80.tar.gz diff --git a/buildroot/package/rpi-firmware/rpi-firmware.mk b/buildroot/package/rpi-firmware/rpi-firmware.mk index 813e459bb..1f588cf06 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.mk +++ b/buildroot/package/rpi-firmware/rpi-firmware.mk @@ -4,7 +4,7 @@ # ################################################################################ -RPI_FIRMWARE_VERSION = 9d6be5b07e81bdfb9c4b9a560e90fbc7477fdc6e +RPI_FIRMWARE_VERSION = dc5622560a2589a417007156b75db71f52b60d80 RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom From 63967cf6c0995fffb8d0154c2b18fdd666ddb72a Mon Sep 17 00:00:00 2001 From: Pascal Vizeli Date: Sat, 11 Jan 2020 11:24:41 +0100 Subject: [PATCH 37/43] Buildroot 2019.02.8 (#533) * Update Buildroot 2019.02.8 * Update patches --- ...e.patch => 0009-odroid-ux4-firmware.patch} | 12 +- ...tools-start-only-inside-a-vmware-env.patch | 32 - ...el-5.4.patch => 0010-Add-kernel-5.4.patch} | 0 ...-5.52.patch => 0011-Bump-bluez-5.52.patch} | 0 ...tch => 0012-Bump-WireGuard-20191219.patch} | 0 buildroot/CHANGES | 181 +++ buildroot/DEVELOPERS | 75 +- buildroot/Makefile | 6 +- buildroot/arch/Config.in.x86 | 13 +- buildroot/board/beaglebone/uEnv.txt | 5 +- buildroot/board/qemu/aarch64-virt/readme.txt | 2 +- buildroot/board/qemu/arm-versatile/readme.txt | 2 +- buildroot/board/qemu/arm-vexpress/readme.txt | 2 +- buildroot/board/qemu/m68k-q800/readme.txt | 2 +- .../board/qemu/mips32r2-malta/readme.txt | 2 +- .../board/qemu/mips32r2el-malta/readme.txt | 2 +- .../board/qemu/mips32r6-malta/readme.txt | 2 +- .../board/qemu/mips32r6el-malta/readme.txt | 2 +- buildroot/board/qemu/mips64-malta/readme.txt | 2 +- .../board/qemu/mips64el-malta/readme.txt | 2 +- .../board/qemu/mips64r6-malta/readme.txt | 2 +- .../board/qemu/mips64r6el-malta/readme.txt | 2 +- buildroot/board/qemu/ppc-g3beige/readme.txt | 2 +- buildroot/board/qemu/ppc64-e5500/readme.txt | 2 +- buildroot/board/qemu/ppc64-pseries/readme.txt | 2 +- .../board/qemu/ppc64le-pseries/readme.txt | 2 +- buildroot/board/qemu/riscv32-virt/readme.txt | 2 +- buildroot/board/qemu/riscv64-virt/readme.txt | 2 +- buildroot/board/qemu/sh4-r2d/readme.txt | 2 +- buildroot/board/qemu/sh4eb-r2d/readme.txt | 2 +- buildroot/board/qemu/sparc-ss10/readme.txt | 2 +- buildroot/board/qemu/sparc64-sun4u/readme.txt | 2 +- buildroot/board/qemu/x86/readme.txt | 2 +- buildroot/board/qemu/x86_64/readme.txt | 2 +- .../arm-trusted-firmware.mk | 6 +- buildroot/boot/barebox/barebox.mk | 4 + buildroot/configs/aarch64_efi_defconfig | 2 +- buildroot/configs/beaglebone_defconfig | 1 - .../docs/manual/adding-packages-cargo.txt | 2 +- .../docs/manual/adding-packages-python.txt | 10 +- buildroot/docs/manual/common-usage.txt | 4 +- buildroot/docs/manual/configure.txt | 54 +- buildroot/docs/manual/contribute.txt | 4 +- buildroot/docs/manual/manual.html | 205 ++-- buildroot/docs/manual/manual.pdf | Bin 539146 -> 540805 bytes buildroot/docs/manual/manual.text | 239 ++-- buildroot/docs/manual/quickstart.txt | 28 +- buildroot/docs/manual/rebuilding-packages.txt | 22 +- .../manual/using-buildroot-development.txt | 10 + buildroot/fs/common.mk | 2 +- buildroot/fs/tar/tar.mk | 3 + buildroot/linux/Config.in | 2 +- buildroot/linux/linux.hash | 8 +- buildroot/linux/linux.mk | 2 + buildroot/package/Config.in | 3 +- buildroot/package/Config.in.host | 1 + ...Makefile-unconditionally-disable-SSP.patch | 35 + ...Makefile-unconditionally-disable-PIE.patch | 33 + buildroot/package/apache/apache.hash | 4 +- buildroot/package/apache/apache.mk | 2 +- buildroot/package/asterisk/asterisk.hash | 4 +- buildroot/package/asterisk/asterisk.mk | 2 +- buildroot/package/atk/Config.in | 2 + buildroot/package/atk/atk.mk | 4 +- buildroot/package/augeas/augeas.mk | 3 - buildroot/package/autofs/autofs.mk | 11 +- buildroot/package/azmq/Config.in | 2 +- buildroot/package/batctl/batctl.mk | 2 +- buildroot/package/batman-adv/batman-adv.mk | 2 +- buildroot/package/bcg729/Config.in | 2 +- buildroot/package/berkeleydb/berkeleydb.mk | 17 + buildroot/package/bind/0001-cross.patch | 13 +- ...perations-in-bin-named-client.c-with.patch | 133 --- buildroot/package/bind/Config.in | 2 +- buildroot/package/bind/bind.hash | 6 +- buildroot/package/bind/bind.mk | 2 +- buildroot/package/brotli/brotli.mk | 8 + buildroot/package/busybox/busybox.config | 4 +- buildroot/package/busybox/udhcpc.script | 2 +- buildroot/package/bwm-ng/bwm-ng.mk | 2 +- .../bzip2/0002-improve-build-system.patch | 14 +- buildroot/package/bzip2/Config.in | 2 + buildroot/package/bzip2/bzip2.hash | 6 +- buildroot/package/bzip2/bzip2.mk | 4 +- buildroot/package/ca-certificates/Config.in | 2 +- buildroot/package/chrony/chrony.mk | 7 +- buildroot/package/clamav/Config.in | 1 + buildroot/package/clamav/clamav.hash | 2 +- buildroot/package/clamav/clamav.mk | 4 +- buildroot/package/cloop/cloop.mk | 3 +- buildroot/package/collectd/collectd.hash | 2 +- buildroot/package/collectd/collectd.mk | 6 +- .../package/connman-gtk/connman-gtk.hash | 1 + buildroot/package/connman-gtk/connman-gtk.mk | 4 +- buildroot/package/connman/connman.mk | 1 + buildroot/package/copas/Config.in | 2 +- buildroot/package/cryptopp/cryptopp.mk | 11 +- ...lative-linking-with-absolute-linking.patch | 46 - ...old-ln-versions-without-the-r-option.patch | 214 ++++ ...otext.c-link-with-libiconv-if-needed.patch | 122 ++ .../package/cups-filters/cups-filters.mk | 21 +- buildroot/package/cups/cups.hash | 2 +- buildroot/package/cups/cups.mk | 2 +- .../package/dahdi-linux/dahdi-linux.hash | 4 +- buildroot/package/dahdi-linux/dahdi-linux.mk | 2 +- .../package/dahdi-tools/dahdi-tools.hash | 4 +- buildroot/package/dahdi-tools/dahdi-tools.mk | 2 +- buildroot/package/daq/daq.mk | 7 + buildroot/package/davfs2/davfs2.hash | 2 +- buildroot/package/davfs2/davfs2.mk | 2 +- buildroot/package/dbus/dbus.hash | 4 +- buildroot/package/dbus/dbus.mk | 2 +- buildroot/package/dehydrated/dehydrated.hash | 4 +- buildroot/package/dehydrated/dehydrated.mk | 2 +- buildroot/package/dialog/dialog.mk | 2 +- buildroot/package/dmraid/Config.in | 2 + buildroot/package/docker-cli/docker-cli.hash | 2 +- buildroot/package/docker-cli/docker-cli.mk | 4 +- .../package/docker-engine/docker-engine.hash | 2 +- .../package/docker-engine/docker-engine.mk | 4 +- .../package/docker-proxy/docker-proxy.hash | 3 +- .../package/docker-proxy/docker-proxy.mk | 2 +- ...dd-c-argument-to-build-precompiled-h.patch | 34 + buildroot/package/doom-wad/Config.in | 2 + .../dovecot-pigeonhole.hash | 2 +- .../dovecot-pigeonhole/dovecot-pigeonhole.mk | 2 +- buildroot/package/dovecot/dovecot.hash | 2 +- buildroot/package/dovecot/dovecot.mk | 11 +- ...uccessfull-login-of-disabled-user-78.patch | 35 + .../0004-Fix-build-with-latest-glibc.patch | 22 + buildroot/package/e2fsprogs/e2fsprogs.hash | 4 +- buildroot/package/e2fsprogs/e2fsprogs.mk | 5 +- ...t-fix-relocations-for-read-only-data.patch | 58 + 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...015-Add-an-option-to-disable-lib2to3.patch | 12 +- ...option-to-disable-the-sqlite3-module.patch | 6 +- ...d-an-option-to-disable-the-tk-module.patch | 6 +- ...-option-to-disable-the-curses-module.patch | 4 +- .../0019-Add-an-option-to-disable-expat.patch | 6 +- .../0023-Add-an-option-to-disable-IDLE.patch | 8 +- ...024-Add-an-option-to-disable-decimal.patch | 2 +- ...thon-config.sh-don-t-reassign-prefix.patch | 2 +- ...-Fix-cross-compiling-the-uuid-module.patch | 2 +- ...up-CC-print-multiarch-output-for-mus.patch | 48 + buildroot/package/python3/python3.hash | 6 +- buildroot/package/python3/python3.mk | 14 +- .../0002-configure-improve-usbfs-check.patch | 60 - ...age-of-mcontext-structure-on-ARM-uCl.patch | 0 ...ly-sized-SIOCGSTAMP-with-new-kernels.patch | 337 ++++++ ...fix-crash-when-compiling-with-uClibc.patch | 43 + ...ser-assume-__NR_gettid-always-exists.patch | 44 + ...e-gettid-to-sys_gettid-to-avoid-clas.patch | 91 ++ buildroot/package/qemu/qemu.hash | 2 +- buildroot/package/qemu/qemu.mk | 7 +- buildroot/package/qt5/qt5.mk | 2 +- .../0006-Fix-compile-issue-with-gcc-9.patch | 32 + .../0004-fix-icu-build-for-qt5webkit.patch | 74 ++ buildroot/package/qt5/qt5base/qmake.conf.in | 5 +- buildroot/package/qt5/qt5base/qt5base.mk | 7 + buildroot/package/qt5/qt5enginio/Config.in | 15 +- buildroot/package/quagga/quagga.mk | 15 + buildroot/package/rabbitmq-c/rabbitmq-c.hash | 2 +- buildroot/package/rabbitmq-c/rabbitmq-c.mk | 4 +- buildroot/package/rauc/Config.in | 2 + buildroot/package/redis/redis.hash | 2 +- buildroot/package/redis/redis.mk | 2 +- buildroot/package/rpcbind/rpcbind.mk | 1 + buildroot/package/ruby/ruby.hash | 4 +- buildroot/package/ruby/ruby.mk | 6 +- buildroot/package/rygel/rygel.mk | 4 +- .../0003-Define-_GNU_SOURCE-when-needed.patch | 115 ++ ...ion-of-Samba-4.7.4-with-disabled-ADS.patch | 41 - ...on-64bit-platforms-by-including-std.patch} | 0 ...o.c-include-stdint.h-before-cmoka.h.patch} | 0 ...-build-of-manpages-and-documentation.patch | 123 -- buildroot/package/samba4/samba4.hash | 4 +- buildroot/package/samba4/samba4.mk | 5 +- buildroot/package/sdl_mixer/sdl_mixer.mk | 3 + buildroot/package/socat/socat.mk | 8 +- buildroot/package/sox/sox.mk | 12 +- .../spice-protocol/spice-protocol.hash | 5 +- .../package/spice-protocol/spice-protocol.mk | 2 +- .../0001-configure.ac-add-enable-tests.patch | 54 + buildroot/package/spice/spice.hash | 3 +- buildroot/package/spice/spice.mk | 7 +- ...ude-os-deps.m4-fix-cross-compilation.patch | 42 + ...re.ac-use-pkg-config-to-find-libxml2.patch | 79 -- buildroot/package/squid/squid.hash | 8 +- buildroot/package/squid/squid.mk | 6 +- buildroot/package/subversion/subversion.hash | 2 +- buildroot/package/subversion/subversion.mk | 2 +- buildroot/package/sudo/sudo.hash | 4 +- buildroot/package/sudo/sudo.mk | 2 +- buildroot/package/swupdate/Config.in | 2 +- .../systemd-bootchart/systemd-bootchart.mk | 6 + buildroot/package/systemd/Config.in | 1 + ...-config-file-for-cross-compiling-906.patch | 66 ++ buildroot/package/tcpdump/tcpdump.hash | 6 +- buildroot/package/tcpdump/tcpdump.mk | 2 +- ...001-configure-ac-fix-without-libdnet.patch | 76 ++ buildroot/package/tcpreplay/tcpreplay.hash | 4 +- buildroot/package/tcpreplay/tcpreplay.mk | 13 +- buildroot/package/tftpd/tftpd.hash | 3 + buildroot/package/tftpd/tftpd.mk | 2 + buildroot/package/thttpd/S90thttpd | 54 + buildroot/package/thttpd/thttpd.mk | 15 +- ...leak-that-was-assigned-CVE-2019-6128.patch | 53 - buildroot/package/tiff/tiff.hash | 2 +- buildroot/package/tiff/tiff.mk | 2 +- ...pie-linking-according-to-disable-pie.patch | 34 + buildroot/package/tvheadend/tvheadend.mk | 4 + buildroot/package/tz/tz.mk | 17 +- buildroot/package/tzdata/tzdata.mk | 19 +- .../0004-sparc-remove-asm-constraint.patch | 40 + ...rPC-sync-with-termios-fix-from-glibc.patch | 172 +++ buildroot/package/unscd/unscd.hash | 2 +- buildroot/package/unscd/unscd.mk | 2 +- buildroot/package/unzip/unzip.hash | 4 + buildroot/package/unzip/unzip.mk | 30 +- buildroot/package/util-linux/util-linux.mk | 6 +- buildroot/package/vlc/vlc.hash | 12 +- buildroot/package/vlc/vlc.mk | 2 +- buildroot/package/vte/vte.mk | 2 +- buildroot/package/vtun/vtun.mk | 6 +- ...uild-failure-after-r243644-in-GTK-Li.patch | 36 - buildroot/package/webkitgtk/webkitgtk.hash | 8 +- buildroot/package/webkitgtk/webkitgtk.mk | 6 +- ...fix-compilation-with-FreeRDP-2.0-rc4.patch | 218 ++++ .../wireless-regdb/wireless-regdb.hash | 2 +- .../package/wireless-regdb/wireless-regdb.mk | 2 +- buildroot/package/wireshark/wireshark.hash | 4 +- buildroot/package/wireshark/wireshark.mk | 2 +- buildroot/package/x11r7/libxcb/libxcb.hash | 9 +- buildroot/package/x11r7/libxcb/libxcb.mk | 2 +- .../xfont_font-util/xfont_font-util.hash | 11 +- .../x11r7/xfont_font-util/xfont_font-util.mk | 2 +- .../x11r7/xlib_libICE/xlib_libICE.hash | 9 +- .../package/x11r7/xlib_libICE/xlib_libICE.mk | 4 +- .../x11r7/xlib_libXfont/xlib_libXfont.hash | 3 + .../x11r7/xlib_libXfont/xlib_libXfont.mk | 8 + .../x11r7/xlib_libXfont2/xlib_libXfont2.mk | 8 + .../0001-modesettings-needs-dri2.patch | 0 ...ure.ac-Fix-check-for-CLOCK_MONOTONIC.patch | 0 ...003-Remove-check-for-useSIGIO-option.patch | 0 ...0004-include-misc.h-fix-uClibc-build.patch | 0 ...nd-Makefile.am-fix-build-without-glx.patch | 0 .../x11r7/xserver_xorg-server/Config.in | 4 +- .../xserver_xorg-server.hash | 10 +- buildroot/package/xen/xen.hash | 2 +- buildroot/package/xen/xen.mk | 2 +- ...6-Fix-build-break-with-newer-GCC-7-x.patch | 34 + buildroot/package/yad/yad.mk | 3 +- buildroot/package/yaffs2utils/yaffs2utils.mk | 2 +- buildroot/package/zeromq/zeromq.hash | 6 +- buildroot/package/zeromq/zeromq.mk | 2 +- buildroot/package/znc/znc.hash | 2 +- buildroot/package/znc/znc.mk | 2 +- .../support/dependencies/dependencies.sh | 4 + buildroot/support/download/git | 2 +- buildroot/support/misc/Buildroot.cmake | 1 + .../support/scripts/check-kernel-headers.sh | 7 +- buildroot/support/testing/infra/emulator.py | 9 +- .../support/testing/tests/package/test_lua.py | 2 +- .../testing/tests/package/test_perl.py | 2 +- buildroot/system/Config.in | 2 + buildroot/toolchain/Config.in | 6 + buildroot/toolchain/helpers.mk | 7 +- .../toolchain/toolchain-buildroot/Config.in | 2 + .../pkg-toolchain-external.mk | 5 + buildroot/utils/check-package | 7 +- buildroot/utils/genrandconfig | 10 +- buildroot/utils/test-pkg | 25 +- 629 files changed, 8416 insertions(+), 3889 deletions(-) rename buildroot-patches/{0010-odroid-ux4-firmware.patch => 0009-odroid-ux4-firmware.patch} (65%) delete mode 100644 buildroot-patches/0009-openvmtools-start-only-inside-a-vmware-env.patch rename buildroot-patches/{0011-Add-kernel-5.4.patch => 0010-Add-kernel-5.4.patch} (100%) rename buildroot-patches/{0012-Bump-bluez-5.52.patch => 0011-Bump-bluez-5.52.patch} (100%) rename buildroot-patches/{0013-Bump-WireGuard-20191219.patch => 0012-Bump-WireGuard-20191219.patch} (100%) create mode 100644 buildroot/package/am33x-cm3/0002-Makefile-unconditionally-disable-SSP.patch create mode 100644 buildroot/package/am33x-cm3/0003-Makefile-unconditionally-disable-PIE.patch delete mode 100644 buildroot/package/bind/0002-Replace-atomic-operations-in-bin-named-client.c-with.patch delete mode 100644 buildroot/package/cups-filters/0001-Replace-relative-linking-with-absolute-linking.patch create mode 100644 buildroot/package/cups-filters/0001-install-support-old-ln-versions-without-the-r-option.patch create mode 100644 buildroot/package/cups-filters/0002-filter-texttotext.c-link-with-libiconv-if-needed.patch create mode 100644 buildroot/package/domoticz/0003-CMakeLists.txt-add-c-argument-to-build-precompiled-h.patch create mode 100644 buildroot/package/dropbear/0003-Fix-for-issue-successfull-login-of-disabled-user-78.patch create mode 100644 buildroot/package/duma/0004-Fix-build-with-latest-glibc.patch create mode 100644 buildroot/package/elf2flt/0002-elf2flt-fix-relocations-for-read-only-data.patch create mode 100644 buildroot/package/elfutils/0004-libelf-Fix-possible-resource-leak-in-elf-32-64-_updatefile.patch create mode 100644 buildroot/package/elfutils/0005-libelf-Use-posix_memalign-instead-of-aligned_alloc.patch create mode 100644 buildroot/package/eudev/Config.in.host create mode 100644 buildroot/package/evtest/0001-Add-missing-limits.h-include.patch delete mode 100644 buildroot/package/exim/0004-glibc.patch rename buildroot/package/exim/{0006-remove-libnsl.patch => 0004-remove-libnsl.patch} (100%) delete mode 100644 buildroot/package/exim/0005-Fix-base64d-buffer-size-CVE-2018-6789.patch create mode 100644 buildroot/package/exim/0005-Fix-uClibc-build.patch create mode 100644 buildroot/package/exim/0006-Fix-buffer-overflow-in-string_vformat.patch delete mode 100644 buildroot/package/exim/0007-Fix-CVE-2019-10149.patch create mode 100644 buildroot/package/faad2/0001-syntax.c-check-for-syntax-element-inconsistencies.patch create mode 100644 buildroot/package/faad2/0002-sbr_hfadj-sanitize-frequency-band-borders.patch create mode 100644 buildroot/package/faad2/0003-Fix-a-couple-buffer-overflows.patch create mode 100644 buildroot/package/faad2/0004-add-patch-to-prevent-crash-on-SCE-followed-by-CPE.patch create mode 100644 buildroot/package/faifa/0003-Makefile.in-fix-asbolute-symlink-of-libfaifa.so.patch create mode 100644 buildroot/package/fakeroot/0003-Select-TCP-when-lack-of-SYSV-IPC.patch create mode 100644 buildroot/package/file/0001-Detect-multiplication-overflow-when-computing-sector.patch create mode 100644 buildroot/package/file/0002-Limit-the-number-of-elements-in-a-vector-found-by-os.patch create mode 100644 buildroot/package/gcc/7.4.0/1002-xtensa-backport-fix-for-PR-target-90922.patch create mode 100644 buildroot/package/gcc/7.4.0/1003-xtensa-fix-PR-target-91880.patch create mode 100644 buildroot/package/gcc/8.3.0/0001-xtensa-backport-fix-for-PR-target-90922.patch create mode 100644 buildroot/package/gcc/8.3.0/0002-xtensa-fix-PR-target-91880.patch create mode 100644 buildroot/package/gd/0001-bmp-check-return-value-in-gdImageBmpPtr.patch create mode 100644 buildroot/package/gd/0002-Fix-420-Potential-infinite-loop-in-gdImageCreateFrom.patch create mode 100644 buildroot/package/gd/0003-Fix-501-Uninitialized-read-in-gdImageCreateFromXbm-C.patch create mode 100644 buildroot/package/gd/0004-Fix-492-Potential-double-free-in-gdImage-Ptr.patch create mode 100644 buildroot/package/gerbera/0002-Fix-find_program-taglib-config-when-cross-compiling.patch delete mode 100644 buildroot/package/ghostscript/0002-Bug-700986-Remove-the-crazy-md5-file-copying-nonsense.patch create mode 100644 buildroot/package/giflib/0001-Address-SF-bug-113-Heap-Buffer-Overflow-2-in-functio.patch create mode 100644 buildroot/package/giflib/0002-Address-SF-bug-119-MemorySanitizer-FPE-on-unknown-ad.patch rename buildroot/package/glibc/{glibc-2.28-94-g4aeff335ca19286ee2382d8eba794ae5fd49281a => glibc-2.28-110-g57922433fa038faa6e37798b9655f85a94978d89}/glibc.hash (69%) create mode 100644 buildroot/package/go/0002-Fix-CVE-2019-16276.patch create mode 100644 buildroot/package/go/0003-Fix-CVE-2019-17596.patch delete mode 100644 buildroot/package/iptables/0001-ebtables-vlan-fix-userspace-kernel-headers-collision.patch delete mode 100644 buildroot/package/iptables/0002-xtables-monitor-fix-build-with-older-glibc.patch delete mode 100644 buildroot/package/iptables/0003-include-fix-build-with-kernel-headers-before-4.2.patch delete mode 100644 buildroot/package/iptables/0004-xtables-monitor-fix-build-with-musl-libc.patch delete mode 100644 buildroot/package/iptables/0005-include-extend-the-headers-conflict-workaround-to-in.patch create mode 100644 buildroot/package/jasper/0001-verify-data-range-CVE-2018-19541.patch create mode 100644 buildroot/package/jasper/0002-check-null-in-jp2_decode-CVE-2018-19542.patch create mode 100644 buildroot/package/jasper/0003-test-asclen-CVE-2018-19540.patch delete mode 100644 buildroot/package/jpeg-turbo/0001-tjLoadImage-Fix-int-overflow-segfault-w-big-BMP.patch delete mode 100644 buildroot/package/jpeg-turbo/0002-wrbmp.c-Don-t-allow-quantization-w-non-RGB-CS.patch create mode 100644 buildroot/package/libarchive/0007-RAR-reader-fix-use-after-free.patch delete mode 100644 buildroot/package/libbsd/0001-flopen-fix-build-with-musl-libc.patch create mode 100644 buildroot/package/libcdaudio/0001-libcdaudio-enable-autoreconf.patch create mode 100644 buildroot/package/libgcrypt/0001-build-Don-t-default-to-underscore-yes-for-cross-buil.patch delete mode 100644 buildroot/package/libgcrypt/0001-reconfigure.patch create mode 100644 buildroot/package/libgcrypt/0002-configure.ac-add-an-option-to-disable-tests.patch create mode 100644 buildroot/package/libglib2/0005-gfile-Limit-access-to-files-when-copying.patch create mode 100644 buildroot/package/libgpg-error/0001-gawk5-support.patch create mode 100644 buildroot/package/libmspack/Config.in create mode 100644 buildroot/package/libmspack/libmspack.hash create mode 100644 buildroot/package/libmspack/libmspack.mk rename buildroot/package/libnftnl/{0002-Add-Libs.private-field-to-libnftnl.pc.patch => 0001-Add-Libs.private-field-to-libnftnl.pc.patch} (100%) delete mode 100644 buildroot/package/libnftnl/0001-Rename-xfree-to-libnftnl_xfree-to-avoid-symbol-namin.patch create mode 100644 buildroot/package/libnspr/0003-nds32.patch create mode 100644 buildroot/package/libnss/0003-Bug-1590676-Fix-build-if-arm-doesn-t-support-NEON.patch delete mode 100644 buildroot/package/libpcap/0001-pcap-usb-linux.c-add-missing-limits.h-for-musl-systems.patch create mode 100644 buildroot/package/libpciaccess/0001-pciaccess.pc.in-add-Libs.Private.patch create mode 100644 buildroot/package/libseccomp/0002-Circumvent-bug-in-uClibc-ng-syscall-on-x86_64-system.patch create mode 100644 buildroot/package/libtorrent/0001-libtorrent.pc.in-add-Libs.Private.patch create mode 100644 buildroot/package/lmbench/0001-scripts-build-use-bin-bash-as-shell.patch create mode 100644 buildroot/package/lmbench/0002-src-Makefile-add-lmbench-to-list-of-executables.patch create mode 100644 buildroot/package/lxc/0001-syscall_wrappers-rename-internal-memfd_create-to-mem.patch create mode 100644 buildroot/package/mariadb/0002-fix-build-error-with-newer-cmake.patch create mode 100644 buildroot/package/mjpegtools/0001-PROGRAM_NOPIC-apparently-causes-problems-on-some-x86_64-systems.patch create mode 100644 buildroot/package/musl/0004-fix-x87-stack-imbalance-in-corner-cases-of-i386-math.patch create mode 100644 buildroot/package/musl/0005-fix-build-regression-in-i386-asm-for-atan2-atan2f.patch create mode 100644 buildroot/package/openldap/0004-revert-ITS-3977-fix-libtool-static-behavior-to-match.patch create mode 100644 buildroot/package/openvmtools/0003-Rename-poll-h-into-vm_poll-h-to-fix-build-failure-on-musl.patch create mode 100644 buildroot/package/openvmtools/0004-Remove-assumptions-about-glibc-being-only-libc-imple.patch create mode 100644 buildroot/package/openvmtools/0005-Use-configure-test-for-struct-timespec.patch create mode 100644 buildroot/package/openvmtools/0006-Fix-definition-of-ALLPERMS-and-ACCESSPERMS.patch create mode 100644 buildroot/package/openvmtools/0007-Use-configure-to-test-for-feature-instead-of-platfor.patch create mode 100644 buildroot/package/openvmtools/0008-Use-configure-test-for-sys-stat.h-include.patch create mode 100644 buildroot/package/openvmtools/0009-Set-permissions-on-rules-file.patch create mode 100644 buildroot/package/openvmtools/0010-Change-DEVPATH-to-devpath.patch create mode 100644 buildroot/package/prboom/0002-configure-remove-predefined-O2-optimization-flag.patch create mode 100644 buildroot/package/proftpd/0002-fix-CVE-2019-12815.patch delete mode 100644 buildroot/package/putty/0001-Fix-compilation-with-NO_GSSAPI.patch delete mode 100644 buildroot/package/putty/0002-unix-uxpoll-need-_XOPEN_SOURCE.patch delete mode 100644 buildroot/package/putty/0003-Fix-uClibc-build-issues.patch create mode 100644 buildroot/package/python3/0033-configure.ac-fixup-CC-print-multiarch-output-for-mus.patch delete mode 100644 buildroot/package/qemu/0002-configure-improve-usbfs-check.patch rename buildroot/package/qemu/{ => 3.1.1.1}/0001-user-exec-fix-usage-of-mcontext-structure-on-ARM-uCl.patch (100%) create mode 100644 buildroot/package/qemu/3.1.1.1/0002-linux-user-fix-to-handle-variably-sized-SIOCGSTAMP-with-new-kernels.patch create mode 100644 buildroot/package/qemu/3.1.1.1/0003-util-cacheinfo-fix-crash-when-compiling-with-uClibc.patch create mode 100644 buildroot/package/qemu/3.1.1.1/0004-linux-user-assume-__NR_gettid-always-exists.patch create mode 100644 buildroot/package/qemu/3.1.1.1/0005-linux-user-rename-gettid-to-sys_gettid-to-avoid-clas.patch create mode 100644 buildroot/package/qt5/qt5base/5.11.3/0006-Fix-compile-issue-with-gcc-9.patch create mode 100644 buildroot/package/qt5/qt5base/5.6.3/0004-fix-icu-build-for-qt5webkit.patch create mode 100644 buildroot/package/safeclib/0003-Define-_GNU_SOURCE-when-needed.patch delete mode 100644 buildroot/package/samba4/0002-Fix-compilation-of-Samba-4.7.4-with-disabled-ADS.patch rename buildroot/package/samba4/{0003-Fix-uClibc-build-on-64bit-platforms-by-including-std.patch => 0002-Fix-uClibc-build-on-64bit-platforms-by-including-std.patch} (100%) rename buildroot/package/samba4/{0005-test_regfio.c-include-stdint.h-before-cmoka.h.patch => 0003-test_regfio.c-include-stdint.h-before-cmoka.h.patch} (100%) delete mode 100644 buildroot/package/samba4/0004-Disable-build-of-manpages-and-documentation.patch create mode 100644 buildroot/package/spice/0001-configure.ac-add-enable-tests.patch create mode 100644 buildroot/package/squid/0001-acinclude-os-deps.m4-fix-cross-compilation.patch delete mode 100644 buildroot/package/squid/0001-configure.ac-use-pkg-config-to-find-libxml2.patch create mode 100644 buildroot/package/taglib/0001-fix-taglib-config-file-for-cross-compiling-906.patch create mode 100644 buildroot/package/tcpreplay/0001-configure-ac-fix-without-libdnet.patch create mode 100644 buildroot/package/thttpd/S90thttpd delete mode 100644 buildroot/package/tiff/0001-Fix-for-simple-memory-leak-that-was-assigned-CVE-2019-6128.patch create mode 100644 buildroot/package/tvheadend/0002-Makefile-fix-pie-linking-according-to-disable-pie.patch create mode 100644 buildroot/package/uclibc/0004-sparc-remove-asm-constraint.patch create mode 100644 buildroot/package/uclibc/0005-PowerPC-sync-with-termios-fix-from-glibc.patch delete mode 100644 buildroot/package/webkitgtk/0001-Build-failure-after-r243644-in-GTK-Li.patch create mode 100644 buildroot/package/weston/0002-rdp-compositor-fix-compilation-with-FreeRDP-2.0-rc4.patch rename buildroot/package/x11r7/xserver_xorg-server/{1.20.4 => 1.20.5}/0001-modesettings-needs-dri2.patch (100%) rename buildroot/package/x11r7/xserver_xorg-server/{1.20.4 => 1.20.5}/0002-configure.ac-Fix-check-for-CLOCK_MONOTONIC.patch (100%) rename buildroot/package/x11r7/xserver_xorg-server/{1.20.4 => 1.20.5}/0003-Remove-check-for-useSIGIO-option.patch (100%) rename buildroot/package/x11r7/xserver_xorg-server/{1.20.4 => 1.20.5}/0004-include-misc.h-fix-uClibc-build.patch (100%) rename buildroot/package/x11r7/xserver_xorg-server/{1.20.4 => 1.20.5}/0005-hw-xwayland-Makefile.am-fix-build-without-glx.patch (100%) create mode 100644 buildroot/package/xvisor/0001-x86-Fix-build-break-with-newer-GCC-7-x.patch diff --git a/buildroot-patches/0010-odroid-ux4-firmware.patch b/buildroot-patches/0009-odroid-ux4-firmware.patch similarity index 65% rename from buildroot-patches/0010-odroid-ux4-firmware.patch rename to buildroot-patches/0009-odroid-ux4-firmware.patch index ecbfab213..b1705efaa 100644 --- a/buildroot-patches/0010-odroid-ux4-firmware.patch +++ b/buildroot-patches/0009-odroid-ux4-firmware.patch @@ -1,7 +1,7 @@ -diff --git a/buildroot/package/linux-firmware/Config.in b/buildroot/package/linux-firmware/Config.in +diff --git a/package/linux-firmware/Config.in b/package/linux-firmware/Config.in index 6b182dc6..8e3be238 100644 ---- a/buildroot/package/linux-firmware/Config.in -+++ b/buildroot/package/linux-firmware/Config.in +--- a/package/linux-firmware/Config.in ++++ b/package/linux-firmware/Config.in @@ -44,6 +44,12 @@ config BR2_PACKAGE_LINUX_FIRMWARE_QCOM_ADRENO help Firmware files for Qualcomm Adreno GPU firmware @@ -15,10 +15,10 @@ index 6b182dc6..8e3be238 100644 endmenu # Video menu "Bluetooth firmware" -diff --git a/buildroot/package/linux-firmware/linux-firmware.mk b/buildroot/package/linux-firmware/linux-firmware.mk +diff --git a/package/linux-firmware/linux-firmware.mk b/package/linux-firmware/linux-firmware.mk index 86e1d1e7..6453c402 100644 ---- a/buildroot/package/linux-firmware/linux-firmware.mk -+++ b/buildroot/package/linux-firmware/linux-firmware.mk +--- a/package/linux-firmware/linux-firmware.mk ++++ b/package/linux-firmware/linux-firmware.mk @@ -39,6 +39,12 @@ LINUX_FIRMWARE_FILES += qcom/a* LINUX_FIRMWARE_ALL_LICENSE_FILES += LICENSE.qcom qcom/NOTICE.txt endif diff --git a/buildroot-patches/0009-openvmtools-start-only-inside-a-vmware-env.patch b/buildroot-patches/0009-openvmtools-start-only-inside-a-vmware-env.patch deleted file mode 100644 index 83877f449..000000000 --- a/buildroot-patches/0009-openvmtools-start-only-inside-a-vmware-env.patch +++ /dev/null @@ -1,32 +0,0 @@ -From f80ba7397087960c033bc8ba43959e399aefb250 Mon Sep 17 00:00:00 2001 -From: Pascal Vizeli -Date: Wed, 26 Jun 2019 13:38:47 +0000 -Subject: [PATCH 1/1] openvmtools: start only inside a vmware env - -Signed-off-by: Pascal Vizeli ---- - package/openvmtools/vmtoolsd.service | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/package/openvmtools/vmtoolsd.service b/package/openvmtools/vmtoolsd.service -index 17a4df44c2..1d2a3566cf 100644 ---- a/package/openvmtools/vmtoolsd.service -+++ b/package/openvmtools/vmtoolsd.service -@@ -1,11 +1,12 @@ - [Unit] - Description=vmtoolsd for openvmtools - After=syslog.target network.target -+ConditionVirtualization=vmware - - [Service] - Type=forking --PIDFile=/var/run/vmtoolsd.pid --ExecStart=/usr/bin/vmtoolsd -b /var/run/vmtoolsd.pid -+PIDFile=/run/vmtoolsd.pid -+ExecStart=/usr/bin/vmtoolsd -b /run/vmtoolsd.pid - Restart=on-failure - KillMode=process - KillSignal=SIGKILL --- -2.17.1 - diff --git a/buildroot-patches/0011-Add-kernel-5.4.patch b/buildroot-patches/0010-Add-kernel-5.4.patch similarity index 100% rename from buildroot-patches/0011-Add-kernel-5.4.patch rename to buildroot-patches/0010-Add-kernel-5.4.patch diff --git a/buildroot-patches/0012-Bump-bluez-5.52.patch b/buildroot-patches/0011-Bump-bluez-5.52.patch similarity index 100% rename from buildroot-patches/0012-Bump-bluez-5.52.patch rename to buildroot-patches/0011-Bump-bluez-5.52.patch diff --git a/buildroot-patches/0013-Bump-WireGuard-20191219.patch b/buildroot-patches/0012-Bump-WireGuard-20191219.patch similarity index 100% rename from buildroot-patches/0013-Bump-WireGuard-20191219.patch rename to buildroot-patches/0012-Bump-WireGuard-20191219.patch diff --git a/buildroot/CHANGES b/buildroot/CHANGES index e3d7ad3bf..f95245379 100644 --- a/buildroot/CHANGES +++ b/buildroot/CHANGES @@ -1,3 +1,182 @@ +2019.02.8, released December 7th, 2019 + + Important / security related fixes. + + Infrastructure: Make HOST__DL_OPTS inherit from + _DL_OPTS by default, just like it is done for a number of + other package variables + + Add _KEEP_PY_FILES to exclude specific python .py files + from the removal done by BR2_PACKAGE_PYTHON{,3}_PYC_ONLY for + the (rare) case where the .py files are needed at runtime + rather than .pyc. + + Fix -reconfigure handling for packages using the kconfig + infrastructure. + + Toolchain: ensure external toolchain kernel headers version + check correctly stop the build on mismatch + + Deconfigs: beaglebone: fix boot issue + + Updated/fixed packages: am33x-cm3, asterisk, bind, chrony, + clamav, collectd, connman, faifa, gob2, haproxy, + intel-microcode, ipsec-tools, jasper, jpeg-turbo, kodi, + kvm-unit-tests, libftdi, libftdi1, libnss, libstrophe, + libsvgtiny, lvm2, lzma, mariadb, minicom, neardal, nodejs, + opencv3, openvmtools, oracle-mysql, perl-gdgraph, + perl-gdtextutil, php, postgresql, prosody, python-django, + rabbitmq-c, rauc, redis, rpcbind, socat, spice, + spice-protocol, tftpd, tiff, webkitgtk + + New packages: libmspack + + Issues resolved (http://bugs.uclibc.org): + + #12166: Compiling nodejs for SAMA5D3 always crash with illegal inst.. + #12171: Python-opencv needs config.py and config-3.7.py to run.. + #12211: host-nodejs 10.15.3 package fail to build + #12316: tzdata fails to install with empty "default local time" + +2019.02.7, Released November 10th, 2019 + + Important / security related fixes. + + support/testing: use a kernel with HW_RANDOM_VIRTIO to work + around issues with lack of entrophy + + Toolchain: Also copy libssp.so for external toolchains if SSP + is enabled to handle toolchains providing SSP support in + libssp rather than in the C library + + Download: Also use the package download method for extra + downloads from the same site, so it does not get confused by + URLs containing '+' + + Fakeroot now works correctly under Microsoft Windows 10 + Services for Linux, which does not provide SYSV IPC support + + utils/test-pkg: ensure to exit with an error upon failure + + Updated/fixed packages: asterisk, azmq, cups-filters, + domoticz, duma, elf2flt, eudev, exfat, exfat-utils, fakeroot, + file, freerdp, gd, ghostscript, go, gvfs, intel-microcode, + kvm-unit-tests, libarchive, libnspr, libnss, libopenssl, + libpcap, libpciaccess, librsvg, libseccomp, libsigrok, + libtorrent, libunwind, linux-tools, lua-sdl2, lxc, minizip, + mjpegtools, mongoose, php, python, python-pysnmp-apps, + python3, qemu, qt5base, ruby, safeclib, samba4, sdl_mixer, + sox, sudo, systemd, tcpdump, unscd, util-lkinux, vtun, xvisor, + yaffs2utils + + Issues resolved (http://bugs.uclibc.org): + + #11366: [2018.08] SysV IPC not available for fakeroot on WSL + #12261: sudo versions prior to 1.8.28 are affected + +2019.02.6, Released October 3rd, 2019 + + Important / security related fixes. + + Defconfigs: AArch64-efi: Fix grub configuration, Beaglebone: + Use default console settings + + Dependencies: Ensure host has JSON::PP perl module installed + if webkitgtk/wpewebkit packages are enabled as it is needed + during their build process. + + Toolchain: Generate check-headers program under BUILD_DIR + rather than /tmp to fix issues with distributions mounting + /tmp noexec. + + Updated/fixed packages: asterisk, augeas, bind, bwm-ng, cups, + cups-filters, docker-cli, docker-engine, docker-proxy, + dropbear, e2fsprogs, eudev, exim, expat, gcc, go, ifplugd, + haveged, iptables, joe, kf5-extra-cmake-modules, + kf5-modemmanager-qt, kf5-networkmanager-qt, libcurl, + libgcrypt, libgpg-error, libnftl, libnspr, libnss, libopenssl, + luksmeta, mariadb, mbedtls, mongodb, mosquitto, ncurses, + nfs-utils, nghttp2, nodejs, openvmtools, php, protobuf, putty, + qemu, qt5base, samba4, swupdate, systemd-bootchart, thttpd, + uclibc, unzip, util-linux, wireshark + + Issues resolved (http://bugs.uclibc.org): + + #10806: Allow nfs-utils to use ipv6 + #11781: mariadb build error + #12031: Build of cups-filters fails while linking, apparently due.. + #12141: eudev package is missing "render" and "kvm" groups + #12181: dropbear: norootlogin (-w) no longer works when PAM is enabled + #12241: Permission denied while running "make" + +2019.02.5, Released September 2nd, 2019 + + Important / security related fixes. + + Filesystems: Pass extra pax options to tar for binary + reproducibility. + + Updated/fixed packages: apache, arm-trusted-firmware, + asterisk, atk, autofs, batctl, batman-adv, berkeleydb, brotli, + busybox, bzip2, clamav, cloop, cmake, collectd, connman-gtk, + cryptopp, dahdi-linux, dahdi-tools, daq, dehydrated, dovecot, + dovecot-pigeonhole,, elfutils, evtest, exim, expect, giflib, + git, glib-networking, glibc, gnupg2, gnutls, go, + gst1-rtsp-server, gtkperf, gupnp-tools, gvfs, imagemagick, + imx-uuc, intel-microcode, json-glib, lftp, libbsd, libcurl, + libgit2, libgtk3, libmodplug, libnss, libpri, libshout, + libss7, libssh2, libvips, libxcb, linux-headers, mdadm, + mesa3d, metacity, mpg123, mosquitto, musl, nginx, openblas, + opencv3, openldap, openvmtools, pcmanfm, php, pigpio, + postgresql, prboom, proftpd, proj, python, python-django, + python-idna, python-numpy, python-urllib3, python3, qemu, qt5, + qt5base, qt5enginio, quagga, rygel, squid, subversion, + tcpreplay, unzip, vlc, vte, webkitgtk, weston, wireless-regdb, + xen, xfont_font-util, xlib_libICE, xlib_libXfont, + xlib_libXfont2, yad, zeromq + + Issues resolved (http://bugs.uclibc.org): + + #11741: pigpio does not build host-pigpio + #11876: automount using host mount/umount + #11881: Build breaks with lftp package enabled and libexpat1-dev inst.. + #11921: dahdi fails to build + #11961: libpri build failure + #12096: tcpreplay: build fails if libdumbnet-dev is installed in the.. + #12106: daq: build fails if libdumbnet-dev is installed in the host + #12126: vc4 has neon as hard dependency + +2019.02.4, Released July 10th, 2019 + + Important / security related fixes. + + arch: x86: Fix typo breaking 'core-avx2' variant, add Westmere + variant. + + linux: Workaround -Werror related build failure on powerpc, + by forcing CONFIG_PPC_DISABLE_WERROR on. + + support/testing: Emulate a machine with 256MB RAM to fix + issues with certain tests running out of memory. + + test-pkg: Correct long option handling and clean output dir + after a successful build to save disk space. + + Ensure custom _OVERRIDE_SRCDIR_RSYNC_EXCLUSIONS are + passed before the standard exclusions so they are not ignored + by rsync when using override-srcdir. + + Defconfigs: QEMU: use 'rootwait' kernel option to ensure root + partition is available before mounting. + + Updated/fixed packages: barebox, bzip2, davfs2, dbus, dialog, + docker-cli, docker-engine, expat, faad2, ffmpeg, freeswitch, + gerbera, haveged, irssi, libcdadio, libgit2, libglib2, + libsecret, libvncserver, lmbench, logrotate, mariadb, meson, + mongoose, monit, mpd, openblas, php, postgresql, psplash, + python, python-django, python3, qt5base, samba4, taglib, + tvheadend, vlc, webkitgtk, xserver_xorg-server, znc + 2019.02.3, Released June 7th, 2019 Important / security related fixes. @@ -26,6 +205,8 @@ sqlite, subversion, supertux, systemd, tslib, uclibc, v4l2loopback, webkitgtk, woff2 + Issues resolved (http://bugs.uclibc.org): + #11816: Only selected coreutils binaries are installed #11841: grub-efi.cfg not used when building EFI disk image #11911: systemd v240 memory leak in systemd-journald diff --git a/buildroot/DEVELOPERS b/buildroot/DEVELOPERS index 0d185ee97..58adad5c1 100644 --- a/buildroot/DEVELOPERS +++ b/buildroot/DEVELOPERS @@ -26,9 +26,6 @@ # infrastructure, and will be CC'ed on all patches that add or # modify packages that use this infrastructure. -N: Abhilash Tuse -F: package/gstreamer1/gst1-rtsp-server/ - N: Adam Duskett F: package/audit/ F: package/busybox/ @@ -127,7 +124,6 @@ N: Anders Darander F: package/ktap/ N: André Hentschel -F: package/azure-iot-sdk-c/ F: package/libkrb5/ F: package/openal/ F: package/p7zip/ @@ -148,9 +144,6 @@ F: package/zstd/ N: Andrey Yurovsky F: package/rauc/ -N: Andy Kennedy -F: package/libunwind/ - N: Angelo Compagnucci F: package/corkscrew/ F: package/fail2ban/ @@ -209,11 +202,12 @@ F: package/sqlcipher/ F: package/stress/ N: Asaf Kahlon +F: package/collectd/ F: package/libuv/ F: package/python* F: package/zeromq/ -N: Ash Charles +N: Ash Charles F: package/pru-software-support/ F: package/ti-cgt-pru/ @@ -267,7 +261,6 @@ F: package/alsa-utils/ F: package/apache/ F: package/apr/ F: package/apr-util/ -F: package/asterisk/ F: package/bcg729/ F: package/bluez-tools/ F: package/boinc/ @@ -316,6 +309,7 @@ F: package/libilbc/ F: package/libldns/ F: package/libmicrohttpd/ F: package/libminiupnpc/ +F: package/libmspack/ F: package/libnatpmp/ F: package/libnpth/ F: package/libogg/ @@ -563,9 +557,6 @@ F: package/log4cpp/ N: Daniel Nicoletti F: package/cutelyst/ -N: Daniel Nyström -F: package/e2tools/ - N: Daniel Price F: package/nodejs/ F: package/redis/ @@ -633,9 +624,6 @@ F: package/unscd/ N: Dushara Jayasinghe F: package/prosody/ -N: Ed Swierk -F: package/xxhash/ - N: Eric Le Bihan F: docs/manual/adding-packages-meson.txt F: package/adwaita-icon-theme/ @@ -819,7 +807,9 @@ F: package/ser2net/ N: Francois Perrad F: board/olimex/a20_olinuxino +F: board/olimex/imx233_olinuxino/ F: configs/olimex_a20_olinuxino_* +F: configs/olimex_imx233_olinuxino_defconfig F: package/4th/ F: package/chipmunk/ F: package/dado/ @@ -892,7 +882,7 @@ F: package/tesseract-ocr/ F: package/webp/ F: package/xapian/ -N: Giulio Benetti +N: Giulio Benetti F: package/minicom/ F: package/sunxi-mali-mainline/ F: package/sunxi-mali-mainline-driver/ @@ -1131,10 +1121,6 @@ F: package/phidgetwebservice/ F: package/rapidxml/ F: package/sphinxbase/ -N: Jonathan Liu -F: package/python-meld3/ -F: package/supervisor/ - N: Jörg Krause F: board/lemaker/bananapro/ F: configs/bananapro_defconfig @@ -1201,9 +1187,6 @@ F: package/python-pygame/ N: Julien Corjon F: package/qt5/ -N: Julien Floret -F: package/lldpd/ - N: Julien Grossholtz F: package/paho-mqtt-c @@ -1223,9 +1206,6 @@ F: package/cpuload/ F: package/bwm-ng/ F: package/ramsmp/ -N: Kevin Joly -F: package/libgphoto2/ - N: Koen Martens F: package/capnproto/ F: package/linuxconsoletools/ @@ -1329,9 +1309,6 @@ F: package/luaossl/ F: package/rs485conf/ F: package/turbolua/ -N: Marcin Nowakowski -F: package/libkcapi/ - N: Marcus Folkesson F: package/libostree/ F: package/libselinux/ @@ -1354,7 +1331,7 @@ F: package/lynx/ N: Mario Rugiero F: package/ratpoison/ -N: Mark Corbin +N: Mark Corbin F: arch/arch.mk.riscv F: arch/Config.in.riscv F: board/qemu/riscv32-virt/ @@ -1363,10 +1340,6 @@ F: boot/riscv-pk/ F: configs/qemu_riscv32_virt_defconfig F: configs/qemu_riscv64_virt_defconfig -N: Markos Chandras -F: package/harfbuzz/ -F: package/libsecret/ - N: Martin Bark F: board/raspberrypi/ F: configs/raspberrypi3_defconfig @@ -1387,7 +1360,7 @@ F: package/tslib/ F: package/x11r7/xdriver_xf86-input-tslib/ F: package/x11vnc/ -N: Mathieu Audat +N: Mathieu Audat F: board/technologic/ts4900/ F: configs/ts4900_defconfig F: package/ts4900-fpga/ @@ -1547,6 +1520,9 @@ F: package/python-pyzmq/ N: Michael Trimarchi F: package/python-spidev/ +N: Michael Vetter +F: package/jasper/ + N: Michał Łyszczek F: board/altera/socrates_cyclone5/ F: board/pine64/rock64 @@ -1566,9 +1542,6 @@ F: package/shadowsocks-libev/ N: Mirza Krak F: package/mender/ -N: Morgan Delestre -F: package/monkey/ - N: Murat Demirten F: package/jpeg-turbo/ F: package/libgeotiff/ @@ -1698,6 +1671,8 @@ F: package/python-webob/ F: package/python-websocket-client/ F: package/sedutil/ F: package/triggerhappy/ +F: package/wireguard/ +F: support/testing/tests/package/test_docker_compose.py N: Peter Seiderer F: board/raspberrypi/ @@ -1781,9 +1756,6 @@ F: package/libdvbpsi/ F: package/mraa/ F: package/synergy/ -N: Pranit Sirsat -F: package/paho-mqtt-c/ - N: Qais Yousef F: package/bellagio/ @@ -1814,7 +1786,13 @@ N: Ricardo Martincoski F: package/atop/ N: Ricardo Martincoski -F: support/testing/ +F: support/testing/infra/ +F: support/testing/run-tests +F: support/testing/tests/core/test_file_capabilities.py +F: support/testing/tests/download/ +F: support/testing/tests/package/*_python*.py +F: support/testing/tests/package/test_atop.py +F: support/testing/tests/package/test_syslog_ng.py F: utils/check-package F: utils/checkpackagelib/ @@ -1840,6 +1818,8 @@ F: package/vnstat/ N: Romain Naour F: package/aubio/ F: package/bullet/ +F: package/clang/ +F: package/clinfo/ F: package/efl/ F: package/enlightenment/ F: package/flare-engine/ @@ -1847,9 +1827,11 @@ F: package/flare-game/ F: package/irrlicht/ F: package/liblinear/ F: package/lensfun/ +F: package/libclc/ F: package/libgta/ F: package/libspatialindex/ F: package/linux-syscall-support/ +F: package/llvm/ F: package/lugaru/ F: package/mcelog/ F: package/mesa3d/ @@ -2036,9 +2018,6 @@ F: package/tovid/ F: package/udftools/ F: package/xorriso/ -N: Steve Thomas -F: package/isl/ - N: Steven Noonan F: package/hwloc/ F: package/powertop/ @@ -2176,7 +2155,7 @@ F: package/pixz/ N: Vinicius Tinti F: package/python-thrift/ -N: Vivien Didelot +N: Vivien Didelot F: board/technologic/ts5500/ F: configs/ts5500_defconfig @@ -2258,6 +2237,8 @@ F: package/zisofs-tools/ F: support/download/ N: Yegor Yefremov +F: configs/beaglebone_defconfig +F: configs/beaglebone_qt5_defconfig F: package/acl/ F: package/attr/ F: package/bluez_utils/ @@ -2266,6 +2247,7 @@ F: package/bootstrap/ F: package/cannelloni/ F: package/can-utils/ F: package/circus/ +F: package/dhcpcd/ F: package/feh/ F: package/giblib/ F: package/imlib2/ @@ -2282,6 +2264,7 @@ F: package/libubox/ F: package/libuci/ F: package/linux-firmware/ F: package/modem-manager/ +F: package/nftables/ F: package/nuttcp/ F: package/parted/ F: package/phytool/ diff --git a/buildroot/Makefile b/buildroot/Makefile index 2c8146e87..dfa62870c 100644 --- a/buildroot/Makefile +++ b/buildroot/Makefile @@ -92,9 +92,9 @@ all: .PHONY: all # Set and export the version string -export BR2_VERSION := 2019.02.3 +export BR2_VERSION := 2019.02.8 # Actual time the release is cut (for reproducible builds) -BR2_VERSION_EPOCH = 1559893000 +BR2_VERSION_EPOCH = 1575746000 # Save running make version since it's clobbered by the make package RUNNING_MAKE_VERSION := $(MAKE_VERSION) @@ -248,7 +248,6 @@ ifeq ($(BR2_REPRODUCIBLE),y) export TZ = UTC export LANG = C export LC_ALL = C -export GZIP = -n endif # To put more focus on warnings, be less verbose as default @@ -811,6 +810,7 @@ endif # merged /usr .PHONY: target-post-image target-post-image: $(TARGETS_ROOTFS) target-finalize staging-finalize @rm -f $(ROOTFS_COMMON_TAR) + $(Q)mkdir -p $(BINARIES_DIR) @$(foreach s, $(call qstrip,$(BR2_ROOTFS_POST_IMAGE_SCRIPT)), \ $(call MESSAGE,"Executing post-image script $(s)"); \ $(EXTRA_ENV) $(s) $(BINARIES_DIR) $(call qstrip,$(BR2_ROOTFS_POST_SCRIPT_ARGS))$(sep)) diff --git a/buildroot/arch/Config.in.x86 b/buildroot/arch/Config.in.x86 index f7c53a0fa..331ee06bf 100644 --- a/buildroot/arch/Config.in.x86 +++ b/buildroot/arch/Config.in.x86 @@ -101,6 +101,15 @@ config BR2_x86_corei7 select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 +config BR2_x86_westmere + bool "westmere" + select BR2_X86_CPU_HAS_MMX + select BR2_X86_CPU_HAS_SSE + select BR2_X86_CPU_HAS_SSE2 + select BR2_X86_CPU_HAS_SSE3 + select BR2_X86_CPU_HAS_SSSE3 + select BR2_X86_CPU_HAS_SSE4 + select BR2_X86_CPU_HAS_SSE42 config BR2_x86_corei7_avx bool "corei7-avx" select BR2_X86_CPU_HAS_MMX @@ -235,8 +244,9 @@ config BR2_ARCH default "i686" if BR2_x86_nocona && BR2_i386 default "i686" if BR2_x86_core2 && BR2_i386 default "i686" if BR2_x86_corei7 && BR2_i386 + default "i686" if BR2_x86_westmere && BR2_i386 default "i686" if BR2_x86_corei7_avx && BR2_i386 - default "i686" if BR2_x86_corei7_avx2 && BR2_i386 + default "i686" if BR2_x86_core_avx2 && BR2_i386 default "i686" if BR2_x86_atom && BR2_i386 default "i686" if BR2_x86_silvermont && BR2_i386 default "i686" if BR2_x86_opteron && BR2_i386 @@ -271,6 +281,7 @@ config BR2_GCC_TARGET_ARCH default "corei7-avx" if BR2_x86_corei7_avx default "core-avx2" if BR2_x86_core_avx2 default "atom" if BR2_x86_atom + default "westmere" if BR2_x86_westmere default "silvermont" if BR2_x86_silvermont default "k8" if BR2_x86_opteron default "k8-sse3" if BR2_x86_opteron_sse3 diff --git a/buildroot/board/beaglebone/uEnv.txt b/buildroot/board/beaglebone/uEnv.txt index a665f2088..8fce54d87 100644 --- a/buildroot/board/beaglebone/uEnv.txt +++ b/buildroot/board/beaglebone/uEnv.txt @@ -3,6 +3,9 @@ devtype=mmc bootdir= bootfile=zImage bootpartition=mmcblk0p2 +console=ttyS0,115200n8 +loadaddr=0x82000000 +fdtaddr=0x88000000 set_mmc1=if test $board_name = A33515BB; then setenv bootpartition mmcblk1p2; fi -set_bootargs=setenv bootargs console=ttyO0,115200n8 root=/dev/${bootpartition} rw rootfstype=ext4 rootwait +set_bootargs=setenv bootargs console=${console} root=/dev/${bootpartition} rw rootfstype=ext4 rootwait uenvcmd=run set_mmc1; run set_bootargs;run loadimage;run loadfdt;printenv bootargs;bootz ${loadaddr} - ${fdtaddr} diff --git a/buildroot/board/qemu/aarch64-virt/readme.txt b/buildroot/board/qemu/aarch64-virt/readme.txt index 1ff2fba47..f868905d9 100644 --- a/buildroot/board/qemu/aarch64-virt/readme.txt +++ b/buildroot/board/qemu/aarch64-virt/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-aarch64 -M virt -cpu cortex-a53 -nographic -smp 1 -kernel output/images/Image -append "root=/dev/vda console=ttyAMA0" -netdev user,id=eth0 -device virtio-net-device,netdev=eth0 -drive file=output/images/rootfs.ext4,if=none,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 + qemu-system-aarch64 -M virt -cpu cortex-a53 -nographic -smp 1 -kernel output/images/Image -append "rootwait root=/dev/vda console=ttyAMA0" -netdev user,id=eth0 -device virtio-net-device,netdev=eth0 -drive file=output/images/rootfs.ext4,if=none,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/arm-versatile/readme.txt b/buildroot/board/qemu/arm-versatile/readme.txt index 33cdb7b81..f3a9e1ab4 100644 --- a/buildroot/board/qemu/arm-versatile/readme.txt +++ b/buildroot/board/qemu/arm-versatile/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-arm -M versatilepb -kernel output/images/zImage -dtb output/images/versatile-pb.dtb -drive file=output/images/rootfs.ext2,if=scsi,format=raw -append "root=/dev/sda console=ttyAMA0,115200" -serial stdio -net nic,model=rtl8139 -net user + qemu-system-arm -M versatilepb -kernel output/images/zImage -dtb output/images/versatile-pb.dtb -drive file=output/images/rootfs.ext2,if=scsi,format=raw -append "rootwait root=/dev/sda console=ttyAMA0,115200" -serial stdio -net nic,model=rtl8139 -net user Or for the noMMU emulation: diff --git a/buildroot/board/qemu/arm-vexpress/readme.txt b/buildroot/board/qemu/arm-vexpress/readme.txt index 35137e050..7f7b43a3b 100644 --- a/buildroot/board/qemu/arm-vexpress/readme.txt +++ b/buildroot/board/qemu/arm-vexpress/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-arm -M vexpress-a9 -smp 1 -m 256 -kernel output/images/zImage -dtb output/images/vexpress-v2p-ca9.dtb -drive file=output/images/rootfs.ext2,if=sd,format=raw -append "console=ttyAMA0,115200 root=/dev/mmcblk0" -serial stdio -net nic,model=lan9118 -net user + qemu-system-arm -M vexpress-a9 -smp 1 -m 256 -kernel output/images/zImage -dtb output/images/vexpress-v2p-ca9.dtb -drive file=output/images/rootfs.ext2,if=sd,format=raw -append "console=ttyAMA0,115200 rootwait root=/dev/mmcblk0" -serial stdio -net nic,model=lan9118 -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/m68k-q800/readme.txt b/buildroot/board/qemu/m68k-q800/readme.txt index bead8cdde..b516bacdf 100644 --- a/buildroot/board/qemu/m68k-q800/readme.txt +++ b/buildroot/board/qemu/m68k-q800/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-m68k -M q800 -kernel output/images/vmlinux -nographic -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/sda console=ttyS0" + qemu-system-m68k -M q800 -kernel output/images/vmlinux -nographic -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/sda console=ttyS0" The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/mips32r2-malta/readme.txt b/buildroot/board/qemu/mips32r2-malta/readme.txt index d1bbcc474..9ff3c4b81 100644 --- a/buildroot/board/qemu/mips32r2-malta/readme.txt +++ b/buildroot/board/qemu/mips32r2-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mips -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -net nic,model=pcnet -net user + qemu-system-mips -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -net nic,model=pcnet -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. No keyboard support has been diff --git a/buildroot/board/qemu/mips32r2el-malta/readme.txt b/buildroot/board/qemu/mips32r2el-malta/readme.txt index 4f59d3430..745bfea60 100644 --- a/buildroot/board/qemu/mips32r2el-malta/readme.txt +++ b/buildroot/board/qemu/mips32r2el-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mipsel -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -net nic,model=pcnet -net user + qemu-system-mipsel -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -net nic,model=pcnet -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. No keyboard support has been diff --git a/buildroot/board/qemu/mips32r6-malta/readme.txt b/buildroot/board/qemu/mips32r6-malta/readme.txt index 04de7e5c3..6a026b216 100644 --- a/buildroot/board/qemu/mips32r6-malta/readme.txt +++ b/buildroot/board/qemu/mips32r6-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: -qemu-system-mips -M malta -cpu mips32r6-generic -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -nographic +qemu-system-mips -M malta -cpu mips32r6-generic -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/mips32r6el-malta/readme.txt b/buildroot/board/qemu/mips32r6el-malta/readme.txt index 88602de0b..f69fd21af 100644 --- a/buildroot/board/qemu/mips32r6el-malta/readme.txt +++ b/buildroot/board/qemu/mips32r6el-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: -qemu-system-mipsel -M malta -cpu mips32r6-generic -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -net nic,model=pcnet -net user -nographic +qemu-system-mipsel -M malta -cpu mips32r6-generic -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -net nic,model=pcnet -net user -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/mips64-malta/readme.txt b/buildroot/board/qemu/mips64-malta/readme.txt index f0e7fef79..ea3a92541 100644 --- a/buildroot/board/qemu/mips64-malta/readme.txt +++ b/buildroot/board/qemu/mips64-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mips64 -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" + qemu-system-mips64 -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/mips64el-malta/readme.txt b/buildroot/board/qemu/mips64el-malta/readme.txt index 03b149bc8..144da9383 100644 --- a/buildroot/board/qemu/mips64el-malta/readme.txt +++ b/buildroot/board/qemu/mips64el-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mips64el -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" + qemu-system-mips64el -M malta -kernel output/images/vmlinux -serial stdio -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/mips64r6-malta/readme.txt b/buildroot/board/qemu/mips64r6-malta/readme.txt index bf5b517a3..cfa16fd86 100644 --- a/buildroot/board/qemu/mips64r6-malta/readme.txt +++ b/buildroot/board/qemu/mips64r6-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mips64 -M malta -cpu I6400 -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -nographic + qemu-system-mips64 -M malta -cpu I6400 -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/mips64r6el-malta/readme.txt b/buildroot/board/qemu/mips64r6el-malta/readme.txt index d51bffd08..61a6ceb5f 100644 --- a/buildroot/board/qemu/mips64r6el-malta/readme.txt +++ b/buildroot/board/qemu/mips64r6el-malta/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-mips64el -M malta -cpu I6400 -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/hda" -nographic + qemu-system-mips64el -M malta -cpu I6400 -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/hda" -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/ppc-g3beige/readme.txt b/buildroot/board/qemu/ppc-g3beige/readme.txt index 1c3b51539..608814ee3 100644 --- a/buildroot/board/qemu/ppc-g3beige/readme.txt +++ b/buildroot/board/qemu/ppc-g3beige/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-ppc -M g3beige -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "console=ttyS0 root=/dev/hda" -serial stdio -net nic,model=rtl8139 -net user + qemu-system-ppc -M g3beige -kernel output/images/vmlinux -drive file=output/images/rootfs.ext2,format=raw -append "console=ttyS0 rootwait root=/dev/hda" -serial stdio -net nic,model=rtl8139 -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/ppc64-e5500/readme.txt b/buildroot/board/qemu/ppc64-e5500/readme.txt index cfc563974..808076698 100644 --- a/buildroot/board/qemu/ppc64-e5500/readme.txt +++ b/buildroot/board/qemu/ppc64-e5500/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-ppc64 -M ppce500 -cpu e5500 -m 256 -kernel output/images/uImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "console=ttyS0 root=/dev/vda" -serial mon:stdio -nographic + qemu-system-ppc64 -M ppce500 -cpu e5500 -m 256 -kernel output/images/uImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "console=ttyS0 rootwait root=/dev/vda" -serial mon:stdio -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/ppc64-pseries/readme.txt b/buildroot/board/qemu/ppc64-pseries/readme.txt index 5069df9e5..6a3e96a2e 100644 --- a/buildroot/board/qemu/ppc64-pseries/readme.txt +++ b/buildroot/board/qemu/ppc64-pseries/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-ppc64 -M pseries -cpu POWER7 -m 256 -kernel output/images/vmlinux -append "console=hvc0 root=/dev/sda" -drive file=output/images/rootfs.ext2,if=scsi,index=0,format=raw -serial stdio -display curses + qemu-system-ppc64 -M pseries -cpu POWER7 -m 256 -kernel output/images/vmlinux -append "console=hvc0 rootwait root=/dev/sda" -drive file=output/images/rootfs.ext2,if=scsi,index=0,format=raw -serial stdio -display curses The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/ppc64le-pseries/readme.txt b/buildroot/board/qemu/ppc64le-pseries/readme.txt index c23da70df..2728675df 100644 --- a/buildroot/board/qemu/ppc64le-pseries/readme.txt +++ b/buildroot/board/qemu/ppc64le-pseries/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: -qemu-system-ppc64 -M pseries -cpu POWER8 -m 256 -kernel output/images/vmlinux -append "console=hvc0 root=/dev/sda" -drive file=output/images/rootfs.ext2,if=scsi,index=0,format=raw -serial stdio -display curses +qemu-system-ppc64 -M pseries -cpu POWER8 -m 256 -kernel output/images/vmlinux -append "console=hvc0 rootwait root=/dev/sda" -drive file=output/images/rootfs.ext2,if=scsi,index=0,format=raw -serial stdio -display curses The login prompt will appear in the terminal window. diff --git a/buildroot/board/qemu/riscv32-virt/readme.txt b/buildroot/board/qemu/riscv32-virt/readme.txt index 2da99580e..24d44f0a9 100644 --- a/buildroot/board/qemu/riscv32-virt/readme.txt +++ b/buildroot/board/qemu/riscv32-virt/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-riscv32 -M virt -kernel output/images/bbl -append "root=/dev/vda ro console=ttyS0" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -netdev user,id=net0 -device virtio-net-device,netdev=net0 -nographic + qemu-system-riscv32 -M virt -kernel output/images/bbl -append "rootwait root=/dev/vda ro console=ttyS0" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -netdev user,id=net0 -device virtio-net-device,netdev=net0 -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/riscv64-virt/readme.txt b/buildroot/board/qemu/riscv64-virt/readme.txt index 9f6e35c86..e878330de 100644 --- a/buildroot/board/qemu/riscv64-virt/readme.txt +++ b/buildroot/board/qemu/riscv64-virt/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-riscv64 -M virt -kernel output/images/bbl -append "root=/dev/vda ro console=ttyS0" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -netdev user,id=net0 -device virtio-net-device,netdev=net0 -nographic + qemu-system-riscv64 -M virt -kernel output/images/bbl -append "rootwait root=/dev/vda ro console=ttyS0" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -netdev user,id=net0 -device virtio-net-device,netdev=net0 -nographic The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/sh4-r2d/readme.txt b/buildroot/board/qemu/sh4-r2d/readme.txt index d22af73ae..dd80953b9 100644 --- a/buildroot/board/qemu/sh4-r2d/readme.txt +++ b/buildroot/board/qemu/sh4-r2d/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-sh4 -M r2d -kernel output/images/zImage -drive file=output/images/rootfs.ext2,if=ide,format=raw -append "root=/dev/sda console=ttySC1,115200 noiotrap" -serial null -serial stdio -net nic,model=rtl8139 -net user + qemu-system-sh4 -M r2d -kernel output/images/zImage -drive file=output/images/rootfs.ext2,if=ide,format=raw -append "rootwait root=/dev/sda console=ttySC1,115200 noiotrap" -serial null -serial stdio -net nic,model=rtl8139 -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/sh4eb-r2d/readme.txt b/buildroot/board/qemu/sh4eb-r2d/readme.txt index daf515ab2..e71a9bce9 100644 --- a/buildroot/board/qemu/sh4eb-r2d/readme.txt +++ b/buildroot/board/qemu/sh4eb-r2d/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-sh4eb -M r2d -kernel output/images/zImage -drive file=output/images/rootfs.ext2,if=ide,format=raw -append "root=/dev/sda console=ttySC1,115200 noiotrap" -serial null -serial stdio -net nic,model=rtl8139 -net user + qemu-system-sh4eb -M r2d -kernel output/images/zImage -drive file=output/images/rootfs.ext2,if=ide,format=raw -append "rootwait root=/dev/sda console=ttySC1,115200 noiotrap" -serial null -serial stdio -net nic,model=rtl8139 -net user The login prompt will appear in the terminal that started Qemu. The graphical window is the framebuffer. diff --git a/buildroot/board/qemu/sparc-ss10/readme.txt b/buildroot/board/qemu/sparc-ss10/readme.txt index df6a75a3f..33833c2d3 100644 --- a/buildroot/board/qemu/sparc-ss10/readme.txt +++ b/buildroot/board/qemu/sparc-ss10/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-sparc -M SS-10 -kernel output/images/zImage -drive file=output/images/rootfs.ext2,format=raw -append "root=/dev/sda console=ttyS0,115200" -serial stdio -net nic,model=lance -net user + qemu-system-sparc -M SS-10 -kernel output/images/zImage -drive file=output/images/rootfs.ext2,format=raw -append "rootwait root=/dev/sda console=ttyS0,115200" -serial stdio -net nic,model=lance -net user The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/sparc64-sun4u/readme.txt b/buildroot/board/qemu/sparc64-sun4u/readme.txt index 24d5bbaff..f2e6e81a8 100644 --- a/buildroot/board/qemu/sparc64-sun4u/readme.txt +++ b/buildroot/board/qemu/sparc64-sun4u/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-sparc64 -M sun4u -kernel output/images/vmlinux -append "root=/dev/sda console=ttyS0,115200" -serial stdio -drive file=output/images/rootfs.ext2,format=raw -net nic,model=e1000 -net user + qemu-system-sparc64 -M sun4u -kernel output/images/vmlinux -append "rootwait root=/dev/sda console=ttyS0,115200" -serial stdio -drive file=output/images/rootfs.ext2,format=raw -net nic,model=e1000 -net user The login prompt will appear in the terminal that started Qemu. diff --git a/buildroot/board/qemu/x86/readme.txt b/buildroot/board/qemu/x86/readme.txt index c5e687734..42fc2439d 100644 --- a/buildroot/board/qemu/x86/readme.txt +++ b/buildroot/board/qemu/x86/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-i386 -M pc -kernel output/images/bzImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "root=/dev/vda" -net nic,model=virtio -net user + qemu-system-i386 -M pc -kernel output/images/bzImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "rootwait root=/dev/vda" -net nic,model=virtio -net user Optionally add -smp N to emulate a SMP system with N CPUs. diff --git a/buildroot/board/qemu/x86_64/readme.txt b/buildroot/board/qemu/x86_64/readme.txt index 425e34b12..4a1c0c0ff 100644 --- a/buildroot/board/qemu/x86_64/readme.txt +++ b/buildroot/board/qemu/x86_64/readme.txt @@ -1,6 +1,6 @@ Run the emulation with: - qemu-system-x86_64 -M pc -kernel output/images/bzImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "root=/dev/vda" -net nic,model=virtio -net user + qemu-system-x86_64 -M pc -kernel output/images/bzImage -drive file=output/images/rootfs.ext2,if=virtio,format=raw -append "rootwait root=/dev/vda" -net nic,model=virtio -net user Optionally add -smp N to emulate a SMP system with N CPUs. diff --git a/buildroot/boot/arm-trusted-firmware/arm-trusted-firmware.mk b/buildroot/boot/arm-trusted-firmware/arm-trusted-firmware.mk index 8ca3864dd..464e4d95e 100644 --- a/buildroot/boot/arm-trusted-firmware/arm-trusted-firmware.mk +++ b/buildroot/boot/arm-trusted-firmware/arm-trusted-firmware.mk @@ -5,8 +5,6 @@ ################################################################################ ARM_TRUSTED_FIRMWARE_VERSION = $(call qstrip,$(BR2_TARGET_ARM_TRUSTED_FIRMWARE_VERSION)) -ARM_TRUSTED_FIRMWARE_LICENSE = BSD-3-Clause -ARM_TRUSTED_FIRMWARE_LICENSE_FILES = license.rst ifeq ($(ARM_TRUSTED_FIRMWARE_VERSION),custom) # Handle custom ATF tarballs as specified by the configuration @@ -19,6 +17,10 @@ ARM_TRUSTED_FIRMWARE_SITE_METHOD = git else # Handle stable official ATF versions ARM_TRUSTED_FIRMWARE_SITE = $(call github,ARM-software,arm-trusted-firmware,$(ARM_TRUSTED_FIRMWARE_VERSION)) +# The licensing of custom or from-git versions is unknown. +# This is valid only for the official v1.4. +ARM_TRUSTED_FIRMWARE_LICENSE = BSD-3-Clause +ARM_TRUSTED_FIRMWARE_LICENSE_FILES = license.rst endif ifeq ($(BR2_TARGET_ARM_TRUSTED_FIRMWARE)$(BR2_TARGET_ARM_TRUSTED_FIRMWARE_LATEST_VERSION),y) diff --git a/buildroot/boot/barebox/barebox.mk b/buildroot/boot/barebox/barebox.mk index 9e8a9f67b..52178d89c 100644 --- a/buildroot/boot/barebox/barebox.mk +++ b/buildroot/boot/barebox/barebox.mk @@ -76,6 +76,10 @@ $(1)_KCONFIG_FRAGMENT_FILES = $$(call qstrip,$$(BR2_TARGET_$(1)_CONFIG_FRAGMENT_ $(1)_KCONFIG_EDITORS = menuconfig xconfig gconfig nconfig $(1)_KCONFIG_OPTS = $$($(1)_MAKE_FLAGS) +$(1)_KCONFIG_DEPENDENCIES = \ + $(BR2_BISON_HOST_DEPENDENCY) \ + $(BR2_FLEX_HOST_DEPENDENCY) + ifeq ($$(BR2_TARGET_$(1)_BAREBOXENV),y) define $(1)_BUILD_BAREBOXENV_CMDS $$(TARGET_CC) $$(TARGET_CFLAGS) $$(TARGET_LDFLAGS) -o $$(@D)/bareboxenv \ diff --git a/buildroot/configs/aarch64_efi_defconfig b/buildroot/configs/aarch64_efi_defconfig index e87193218..2aab6e969 100644 --- a/buildroot/configs/aarch64_efi_defconfig +++ b/buildroot/configs/aarch64_efi_defconfig @@ -13,7 +13,7 @@ BR2_PACKAGE_HOST_GENIMAGE=y # Bootloader BR2_TARGET_GRUB2=y -BR2_TARGET_GRUB2_AARCH64_EFI=y +BR2_TARGET_GRUB2_ARM64_EFI=y # Filesystem / image BR2_TARGET_ROOTFS_EXT2=y diff --git a/buildroot/configs/beaglebone_defconfig b/buildroot/configs/beaglebone_defconfig index b4f152fd6..fbb259f57 100644 --- a/buildroot/configs/beaglebone_defconfig +++ b/buildroot/configs/beaglebone_defconfig @@ -2,7 +2,6 @@ BR2_arm=y BR2_cortex_a8=y BR2_GLOBAL_PATCH_DIR="board/beaglebone/patches" BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y -BR2_TARGET_GENERIC_GETTY_PORT="ttyO0" BR2_ROOTFS_POST_IMAGE_SCRIPT="board/beaglebone/post-image.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y diff --git a/buildroot/docs/manual/adding-packages-cargo.txt b/buildroot/docs/manual/adding-packages-cargo.txt index b7fc09acf..b6029e1ee 100644 --- a/buildroot/docs/manual/adding-packages-cargo.txt +++ b/buildroot/docs/manual/adding-packages-cargo.txt @@ -17,7 +17,7 @@ The +Config.in+ file of Cargo-based package 'foo' should contain: --------------------------- 01: config BR2_PACKAGE_FOO 02: bool "foo" -03: depends on BR2_PACKAGE_HOST_RUSTC_ARCH_SUPPORTS +03: depends on BR2_PACKAGE_HOST_RUSTC_TARGET_ARCH_SUPPORTS 04: select BR2_PACKAGE_HOST_CARGO 05: help 06: This is a comment that explains what foo is. diff --git a/buildroot/docs/manual/adding-packages-python.txt b/buildroot/docs/manual/adding-packages-python.txt index 15137cfd6..74e2e78b2 100644 --- a/buildroot/docs/manual/adding-packages-python.txt +++ b/buildroot/docs/manual/adding-packages-python.txt @@ -67,9 +67,13 @@ Python build system, but are not Python modules, can freely choose their name (existing examples in Buildroot are +scons+ and +supervisor+). -In their +Config.in+ file, they should depend on +BR2_PACKAGE_PYTHON+ -so that when Buildroot will enable Python 3 usage for modules, we will -be able to enable Python modules progressively on Python 3. +Packages that are only compatible with one version of Python (as in: +Python 2 or Python 3) should depend on that version explicitely in +their +Config.in+ file (+BR2_PACKAGE_PYTHON+ for Python 2, ++BR2_PACKAGE_PYTHON3+ for Python 3). Packages that are compatible +with both versions should not explicitely depend on them in their ++Config.in+ file, since that condition is already expressed for the +whole "External python modules" menu. The main macro of the Python package infrastructure is +python-package+. It is similar to the +generic-package+ macro. It is diff --git a/buildroot/docs/manual/common-usage.txt b/buildroot/docs/manual/common-usage.txt index e3d7578c8..a36301afd 100644 --- a/buildroot/docs/manual/common-usage.txt +++ b/buildroot/docs/manual/common-usage.txt @@ -310,8 +310,8 @@ installed (+python-matplotlib+ on most distributions), and also the +argparse+ module if you're using a Python version older than 2.7 (+python-argparse+ on most distributions). -Just like for the duration graph, a +BR2_GRAPH_OUT+ environment is -supported to adjust the output file format. See xref:graph-depends[] +Just like for the duration graph, a +BR2_GRAPH_OUT+ environment variable +is supported to adjust the output file format. See xref:graph-depends[] for details about this environment variable. .Note diff --git a/buildroot/docs/manual/configure.txt b/buildroot/docs/manual/configure.txt index 008813c9b..c9eef567f 100644 --- a/buildroot/docs/manual/configure.txt +++ b/buildroot/docs/manual/configure.txt @@ -206,9 +206,9 @@ Buildroot or crosstool-NG. If you want to generate a custom toolchain for your project, that can be used as an external toolchain in Buildroot, our recommendation is -definitely to build it with http://crosstool-ng.org[crosstool-NG]. We -recommend to build the toolchain separately from Buildroot, and then -_import_ it in Buildroot using the external toolchain backend. +to build it either with Buildroot itself (see +xref:build-toolchain-with-buildroot[]) or with +http://crosstool-ng.org[crosstool-NG]. Advantages of this backend: @@ -223,7 +223,53 @@ Drawbacks of this backend: * If your pre-built external toolchain has a bug, may be hard to get a fix from the toolchain vendor, unless you build your external - toolchain by yourself using Crosstool-NG. + toolchain by yourself using Buildroot or Crosstool-NG. + +[[build-toolchain-with-buildroot]] +==== Build an external toolchain with Buildroot + +The Buildroot internal toolchain option can be used to create an +external toolchain. Here are a series of steps to build an internal +toolchain and package it up for reuse by Buildroot itself (or other +projects). + +Create a new Buildroot configuration, with the following details: + +* Select the appropriate *Target options* for your target CPU + architecture + +* In the *Toolchain* menu, keep the default of *Buildroot toolchain* + for *Toolchain type*, and configure your toolchain as desired + +* In the *System configuration* menu, select *None* as the *Init + system* and *none* as */bin/sh* + +* In the *Target packages* menu, disable *BusyBox* + +* In the *Filesystem images* menu, disable *tar the root filesystem* + +Then, we can trigger the build, and also ask Buildroot to generate a +SDK. This will conveniently generate for us a tarball which contains +our toolchain: + +----- +make sdk +----- + +This produces the SDK tarball in +$(O)/images+, with a name similar to ++arm-buildroot-linux-uclibcgnueabi_sdk-buildroot.tar.gz+. Save this +tarball, as it is now the toolchain that you can re-use as an external +toolchain in other Buildroot projects. + +In those other Buildroot projects, in the *Toolchain* menu: + +* Set *Toolchain type* to *External toolchain* + +* Set *Toolchain* to *Custom toolchain* + +* Set *Toolchain origin* to *Toolchain to be downloaded and installed* + +* Set *Toolchain URL* to +file:///path/to/your/sdk/tarball.tar.gz+ ===== External toolchain wrapper diff --git a/buildroot/docs/manual/contribute.txt b/buildroot/docs/manual/contribute.txt index 5530ce154..f339ca50b 100644 --- a/buildroot/docs/manual/contribute.txt +++ b/buildroot/docs/manual/contribute.txt @@ -73,7 +73,7 @@ basically two things that can be done: In the commit message of a patch fixing an autobuild failure, add a reference to the build result directory, as follows: --------------------- -Fixes http://autobuild.buildroot.org/results/51000a9d4656afe9e0ea6f07b9f8ed374c2e4069 +Fixes: http://autobuild.buildroot.org/results/51000a9d4656afe9e0ea6f07b9f8ed374c2e4069 --------------------- === Reviewing and testing patches @@ -402,7 +402,7 @@ the problem is complex, it is OK to add more paragraphs. All paragraphs should be wrapped at 72 characters. A paragraph that explains the root cause of the problem. Again, more -than on paragraph is OK. +than one paragraph is OK. Finally, one or more paragraphs that explain how the problem is solved. Don't hesitate to explain complex solutions in detail. diff --git a/buildroot/docs/manual/manual.html b/buildroot/docs/manual/manual.html index bc5aa774d..615893952 100644 --- a/buildroot/docs/manual/manual.html +++ b/buildroot/docs/manual/manual.html @@ -1,8 +1,8 @@ -The Buildroot user manual

The Buildroot user manual

Table of Contents

I. Getting started
1. About Buildroot
2. System requirements
2.1. Mandatory packages
2.2. Optional packages
3. Getting Buildroot
4. Buildroot quick start
5. Community resources
II. User guide
6. Buildroot configuration
6.1. Cross-compilation toolchain
6.2. /dev management
6.3. init system
7. Configuration of other components
8. General Buildroot usage
8.1. make tips
8.2. Understanding when a full rebuild is necessary
8.3. Understanding how to rebuild packages
8.4. Offline builds
8.5. Building out-of-tree
8.6. Environment variables
8.7. Dealing efficiently with filesystem images
8.8. Graphing the dependencies between packages
8.9. Graphing the build duration
8.10. Graphing the filesystem size contribution of packages
8.11. Integration with Eclipse
8.12. Advanced usage
9. Project-specific customization
9.1. Recommended directory structure
9.2. Keeping customizations outside of Buildroot
9.3. Storing the Buildroot configuration
9.4. Storing the configuration of other components
9.5. Customizing the generated target filesystem
9.6. Adding custom user accounts
9.7. Customization after the images have been created
9.8. Adding project-specific patches
9.9. Adding project-specific packages
9.10. Quick guide to storing your project-specific customizations
10. Frequently Asked Questions & Troubleshooting
10.1. The boot hangs after Starting network…
10.2. Why is there no compiler on the target?
10.3. Why are there no development files on the target?
10.4. Why is there no documentation on the target?
10.5. Why are some packages not visible in the Buildroot config menu?
10.6. Why not use the target directory as a chroot directory?
10.7. Why doesn’t Buildroot generate binary packages (.deb, .ipkg…)?
10.8. How to speed-up the build process?
11. Known issues
12. Legal notice and licensing
12.1. Complying with open source licenses
12.2. Complying with the Buildroot license
13. Beyond Buildroot
13.1. Boot the generated images
13.2. Chroot
III. Developer guide
14. How Buildroot works
15. Coding style
15.1. Config.in file
15.2. The .mk file
15.3. The documentation
15.4. Support scripts
16. Adding support for a particular board
17. Adding new packages to Buildroot
17.1. Package directory
17.2. Config files
17.3. The .mk file
17.4. The .hash file
17.5. Infrastructure for packages with specific build systems
17.6. Infrastructure for autotools-based packages
17.7. Infrastructure for CMake-based packages
17.8. Infrastructure for Python packages
17.9. Infrastructure for LuaRocks-based packages
17.10. Infrastructure for Perl/CPAN packages
17.11. Infrastructure for virtual packages
17.12. Infrastructure for packages using kconfig for configuration files
17.13. Infrastructure for rebar-based packages
17.14. Infrastructure for Waf-based packages
17.15. Infrastructure for Meson-based packages
17.16. Integration of Cargo-based packages
17.17. Infrastructure for Go packages
17.18. Infrastructure for packages building kernel modules
17.19. Infrastructure for asciidoc documents
17.20. Infrastructure specific to the Linux kernel package
17.21. Hooks available in the various build steps
17.22. Gettext integration and interaction with packages
17.23. Tips and tricks
17.24. Conclusion
18. Patching a package
18.1. Providing patches
18.2. How patches are applied
18.3. Format and licensing of the package patches
18.4. Integrating patches found on the Web
19. Download infrastructure
20. Debugging Buildroot
21. Contributing to Buildroot
21.1. Reproducing, analyzing and fixing bugs
21.2. Analyzing and fixing autobuild failures
21.3. Reviewing and testing patches
21.4. Work on items from the TODO list
21.5. Submitting patches
21.6. Reporting issues/bugs or getting help
22. DEVELOPERS file and get-developers
IV. Appendix
23. Makedev syntax documentation
24. Makeusers syntax documentation
25. Migrating from older Buildroot versions
25.1. Migrating to 2016.11
25.2. Migrating to 2017.08

List of Examples

17.1. Config script: divine package
17.2. Config script: imagemagick package:

Buildroot 2019.02.3 manual generated on 2019-06-07 -07:39:11 UTC from git revision 3e8b918b87

The Buildroot manual is written by the Buildroot developers. +The Buildroot user manual

The Buildroot user manual

Table of Contents

I. Getting started
1. About Buildroot
2. System requirements
2.1. Mandatory packages
2.2. Optional packages
3. Getting Buildroot
4. Buildroot quick start
5. Community resources
II. User guide
6. Buildroot configuration
6.1. Cross-compilation toolchain
6.2. /dev management
6.3. init system
7. Configuration of other components
8. General Buildroot usage
8.1. make tips
8.2. Understanding when a full rebuild is necessary
8.3. Understanding how to rebuild packages
8.4. Offline builds
8.5. Building out-of-tree
8.6. Environment variables
8.7. Dealing efficiently with filesystem images
8.8. Graphing the dependencies between packages
8.9. Graphing the build duration
8.10. Graphing the filesystem size contribution of packages
8.11. Integration with Eclipse
8.12. Advanced usage
9. Project-specific customization
9.1. Recommended directory structure
9.2. Keeping customizations outside of Buildroot
9.3. Storing the Buildroot configuration
9.4. Storing the configuration of other components
9.5. Customizing the generated target filesystem
9.6. Adding custom user accounts
9.7. Customization after the images have been created
9.8. Adding project-specific patches
9.9. Adding project-specific packages
9.10. Quick guide to storing your project-specific customizations
10. Frequently Asked Questions & Troubleshooting
10.1. The boot hangs after Starting network…
10.2. Why is there no compiler on the target?
10.3. Why are there no development files on the target?
10.4. Why is there no documentation on the target?
10.5. Why are some packages not visible in the Buildroot config menu?
10.6. Why not use the target directory as a chroot directory?
10.7. Why doesn’t Buildroot generate binary packages (.deb, .ipkg…)?
10.8. How to speed-up the build process?
11. Known issues
12. Legal notice and licensing
12.1. Complying with open source licenses
12.2. Complying with the Buildroot license
13. Beyond Buildroot
13.1. Boot the generated images
13.2. Chroot
III. Developer guide
14. How Buildroot works
15. Coding style
15.1. Config.in file
15.2. The .mk file
15.3. The documentation
15.4. Support scripts
16. Adding support for a particular board
17. Adding new packages to Buildroot
17.1. Package directory
17.2. Config files
17.3. The .mk file
17.4. The .hash file
17.5. Infrastructure for packages with specific build systems
17.6. Infrastructure for autotools-based packages
17.7. Infrastructure for CMake-based packages
17.8. Infrastructure for Python packages
17.9. Infrastructure for LuaRocks-based packages
17.10. Infrastructure for Perl/CPAN packages
17.11. Infrastructure for virtual packages
17.12. Infrastructure for packages using kconfig for configuration files
17.13. Infrastructure for rebar-based packages
17.14. Infrastructure for Waf-based packages
17.15. Infrastructure for Meson-based packages
17.16. Integration of Cargo-based packages
17.17. Infrastructure for Go packages
17.18. Infrastructure for packages building kernel modules
17.19. Infrastructure for asciidoc documents
17.20. Infrastructure specific to the Linux kernel package
17.21. Hooks available in the various build steps
17.22. Gettext integration and interaction with packages
17.23. Tips and tricks
17.24. Conclusion
18. Patching a package
18.1. Providing patches
18.2. How patches are applied
18.3. Format and licensing of the package patches
18.4. Integrating patches found on the Web
19. Download infrastructure
20. Debugging Buildroot
21. Contributing to Buildroot
21.1. Reproducing, analyzing and fixing bugs
21.2. Analyzing and fixing autobuild failures
21.3. Reviewing and testing patches
21.4. Work on items from the TODO list
21.5. Submitting patches
21.6. Reporting issues/bugs or getting help
22. DEVELOPERS file and get-developers
IV. Appendix
23. Makedev syntax documentation
24. Makeusers syntax documentation
25. Migrating from older Buildroot versions
25.1. Migrating to 2016.11
25.2. Migrating to 2017.08

List of Examples

17.1. Config script: divine package
17.2. Config script: imagemagick package:

Buildroot 2019.02.8 manual generated on 2019-12-07 +19:24:18 UTC from git revision aaa1437b11

The Buildroot manual is written by the Buildroot developers. It is licensed under the GNU General Public License, version 2. Refer to the -COPYING +COPYING file in the Buildroot sources for the full text of this license.

Copyright © 2004-2019 The Buildroot developers

logo.png

Part I. Getting started

Chapter 1. About Buildroot

Buildroot is a tool that simplifies and automates the process of building a complete Linux system for an embedded system, using cross-compilation.

In order to achieve this, Buildroot is able to generate a @@ -16,8 +16,8 @@ processors everyone is used to having in his PC. They can be PowerPC processors, MIPS processors, ARM processors, etc.

Buildroot supports numerous processors and their variants; it also comes with default configurations for several boards available off-the-shelf. Besides this, a number of third-party projects are based on, -or develop their BSP [1] or -SDK [2] on top of Buildroot.


[1] BSP: Board Support Package

[2] SDK: Software Development Kit

Chapter 2. System requirements

Buildroot is designed to run on Linux systems.

While Buildroot itself will build most host packages it needs for the +or develop their BSP [1] or +SDK [2] on top of Buildroot.


[1] BSP: Board Support Package

[2] SDK: Software Development Kit

Chapter 2. System requirements

Buildroot is designed to run on Linux systems.

While Buildroot itself will build most host packages it needs for the compilation, certain standard Linux utilities are expected to be already installed on the host system. Below you will find an overview of the mandatory and optional packages (note that package names may vary @@ -142,7 +142,6 @@ utility (including the interface), so you may need to install "development" packages for relevant libraries used by the configuration utilities. Refer to Chapter 2, System requirements for more details, specifically the optional requirements -Section 2.2, “Optional packages” to get the dependencies of your favorite interface.

For each menu entry in the configuration tool, you can find associated help that describes the purpose of the entry. Refer to Chapter 6, Buildroot configuration for details on some specific configuration aspects.

Once everything is configured, the configuration tool generates a @@ -174,15 +173,21 @@ This directory contains several subdirectories:

  • -staging/ which contains a hierarchy similar to a root filesystem - hierarchy. This directory contains the headers and libraries of the - cross-compilation toolchain and all the userspace packages selected - for the target. However, this directory is not intended to be - the root filesystem for the target: it contains a lot of development - files, unstripped binaries and libraries that make it far too big - for an embedded system. These development files are used to compile - libraries and applications for the target that depend on other - libraries. +host/ contains both the tools built for the host, and the sysroot + of the target toolchain. The former is an installation of tools + compiled for the host that are needed for the proper execution of + Buildroot, including the cross-compilation toolchain. The latter + is a hierarchy similar to a root filesystem hierarchy. It contains + the headers and libraries of all user-space packages that provide + and install libraries used by other packages. However, this + directory is not intended to be the root filesystem for the target: + it contains a lot of development files, unstripped binaries and + libraries that make it far too big for an embedded system. These + development files are used to compile libraries and applications for + the target that depend on other libraries. +
  • +staging/ is a symlink to the target toolchain sysroot inside + host/, which exists for backwards compatibility.
  • target/ which contains almost the complete root filesystem for the target: everything needed is present except the device files in @@ -197,10 +202,6 @@ This directory contains several subdirectories:

    • -host/ contains the installation of tools compiled for the host - that are needed for the proper execution of Buildroot, including the - cross-compilation toolchain.

    These commands, make menuconfig|nconfig|gconfig|xconfig and make, are the basic ones that allow to easily and quickly generate images fitting your needs, with all the features and applications you enabled.

    More details about the "make" command usage are given in @@ -272,7 +273,7 @@ processor. Under most Linux systems, the compilation toolchain uses the GNU libc (glibc) as the C standard library. This compilation toolchain is called the "host compilation toolchain". The machine on which it is running, and on which you’re working, is called the "host -system" [3].

    The compilation toolchain is provided by your distribution, and +system" [3].

    The compilation toolchain is provided by your distribution, and Buildroot has nothing to do with it (other than using it to build a cross-compilation toolchain and other tools that are run on the development host).

    As said above, the compilation toolchain that comes with your system @@ -398,9 +399,9 @@ build environment. So even if you are building a system for a x86 or x86_64 target, you have to generate a cross-compilation toolchain with Buildroot or crosstool-NG.

    If you want to generate a custom toolchain for your project, that can be used as an external toolchain in Buildroot, our recommendation is -definitely to build it with crosstool-NG. We -recommend to build the toolchain separately from Buildroot, and then -import it in Buildroot using the external toolchain backend.

    Advantages of this backend:

    • +to build it either with Buildroot itself (see +Section 6.1.3, “Build an external toolchain with Buildroot”) or with +crosstool-NG.

      Advantages of this backend:

      • Allows to use well-known and well-tested cross-compilation toolchains.
      • @@ -410,7 +411,36 @@ Avoids the build time of the cross-compilation toolchain, which is

      Drawbacks of this backend:

      • If your pre-built external toolchain has a bug, may be hard to get a fix from the toolchain vendor, unless you build your external - toolchain by yourself using Crosstool-NG. + toolchain by yourself using Buildroot or Crosstool-NG. +

    6.1.3. Build an external toolchain with Buildroot

    The Buildroot internal toolchain option can be used to create an +external toolchain. Here are a series of steps to build an internal +toolchain and package it up for reuse by Buildroot itself (or other +projects).

    Create a new Buildroot configuration, with the following details:

    • +Select the appropriate Target options for your target CPU + architecture +
    • +In the Toolchain menu, keep the default of Buildroot toolchain + for Toolchain type, and configure your toolchain as desired +
    • +In the System configuration menu, select None as the Init + system and none as /bin/sh +
    • +In the Target packages menu, disable BusyBox +
    • +In the Filesystem images menu, disable tar the root filesystem +

    Then, we can trigger the build, and also ask Buildroot to generate a +SDK. This will conveniently generate for us a tarball which contains +our toolchain:

    make sdk

    This produces the SDK tarball in $(O)/images, with a name similar to +arm-buildroot-linux-uclibcgnueabi_sdk-buildroot.tar.gz. Save this +tarball, as it is now the toolchain that you can re-use as an external +toolchain in other Buildroot projects.

    In those other Buildroot projects, in the Toolchain menu:

    • +Set Toolchain type to External toolchain +
    • +Set Toolchain to Custom toolchain +
    • +Set Toolchain origin to Toolchain to be downloaded and installed +
    • +Set Toolchain URL to file:///path/to/your/sdk/tarball.tar.gz

    External toolchain wrapper

    When using an external toolchain, Buildroot generates a wrapper program, that transparently passes the appropriate options (according to the configuration) to the external toolchain programs. In case you need to @@ -547,7 +577,7 @@ The third solution is systemd. http://www.freedesktop.org/wiki/Software/systemd.

The solution recommended by Buildroot developers is to use the BusyBox init as it is sufficient for most embedded -systems. systemd can be used for more complex situations.


[3] This terminology differs from what is used by GNU +systems. systemd can be used for more complex situations.


[3] This terminology differs from what is used by GNU configure, where the host is the machine on which the application will run (which is usually the same as target)

Chapter 7. Configuration of other components

Before attempting to modify any of the components below, make sure you have already configured Buildroot itself, and have enabled the @@ -715,14 +745,16 @@ depending on the availability of another package.

The easiest way to rebui its build directory in output/build. Buildroot will then re-extract, re-configure, re-compile and re-install this package from scratch. You can ask buildroot to do this with the make <package>-dirclean command.

On the other hand, if you only want to restart the build process of a -package from its compilation step, you can run make -<package>-rebuild, followed by make or make <package>. It will -restart the compilation and installation of the package, but not from -scratch: it basically re-executes make and make install -inside the package, so it will only rebuild files that changed.

If you want to restart the build process of a package from its -configuration step, you can run make <package>-reconfigure, followed -by make or make <package>. It will restart the configuration, -compilation and installation of the package.

Internally, Buildroot creates so-called stamp files to keep track of +package from its compilation step, you can run make <package>-rebuild. It +will restart the compilation and installation of the package, but not from +scratch: it basically re-executes make and make install inside the package, +so it will only rebuild files that changed.

If you want to restart the build process of a package from its configuration +step, you can run make <package>-reconfigure. It will restart the +configuration, compilation and installation of the package.

While <package>-rebuild implies <package>-reinstall and +<package>-reconfigure implies <package>-rebuild, these targets as well +as <package> only act on the said package, and do not trigger re-creating +the root filesystem image. If re-creating the root filesystem in necessary, +one should in addition run make or make all.

Internally, Buildroot creates so-called stamp files to keep track of which build steps have been completed for each package. They are stored in the package build directory, output/build/<package>-<version>/ and are named @@ -900,8 +932,8 @@ the different packages.

To generate these data after a build, run:

This graph-size target requires the Python Matplotlib library to be
 installed (python-matplotlib on most distributions), and also the
 argparse module if you’re using a Python version older than 2.7
-(python-argparse on most distributions).
Just like for the duration graph, a BR2_GRAPH_OUT environment is
-supported to adjust the output file format. See Section 8.8, “Graphing the dependencies between packages”
+(python-argparse on most distributions).
Just like for the duration graph, a BR2_GRAPH_OUT environment variable
+is supported to adjust the output file format. See Section 8.8, “Graphing the dependencies between packages”
 for details about this environment variable.
Note. The collected filesystem size data is only meaningful after a complete
 clean rebuild. Be sure to run make clean all before using make
 graph-size.
To compare the root filesystem size of two different Buildroot compilations,
@@ -1025,8 +1057,7 @@ package
graph-depends
Generate a dependency graph of the package, in the
 context of the current Buildroot configuration. See
-this section
-Section 8.8, “Graphing the dependencies between packages” for more details about dependency
+this section for more details about dependency
 graphs.
graph-rdepends
Generate a graph of this package reverse
   dependencies (i.e the packages that depend on it, directly or
   indirectly)
dirclean
Remove the whole package build directory
reinstall
Re-run the install commands
rebuild
Re-run the compilation commands - this only makes
@@ -1093,7 +1124,11 @@ a local WebKit source tree:
WEBKITGTK_OVERRIDE_SRCDIR = /
 WEBKITGTK_OVERRIDE_SRCDIR_RSYNC_EXCLUSIONS = \
         --exclude JSTests --exclude ManualTests --exclude PerformanceTests \
         --exclude WebDriverTests --exclude WebKitBuild --exclude WebKitLibraries \
-        --exclude WebKit.xcworkspace --exclude Websites --exclude Examples
Chapter 9. Project-specific customization
Typical actions you may need to perform for a given project are:
  • 
+        --exclude WebKit.xcworkspace --exclude Websites --exclude Examples
    By default, Buildroot skips syncing of VCS artifacts (e.g., the .git and
+.svn directories). Some packages prefer to have these VCS directories
+available during build, for example for automatically determining a precise
+commit reference for version information. To undo this built-in filtering at a
+cost of a slower speed, add these directories back:
    LINUX_OVERRIDE_SRCDIR_RSYNC_EXCLUSIONS = --include .git
Chapter 9. Project-specific customization
Typical actions you may need to perform for a given project are:
  • 
 configuring Buildroot (including build options and toolchain,
   bootloader, kernel, package and filesystem image type selection)
 
  • 
@@ -1548,8 +1583,7 @@ such changes from there unless you use an explicit fakeroot from the
 post-build script.
    Instead, Buildroot provides support for so-called permission tables.
 To use this feature, set config option BR2_ROOTFS_DEVICE_TABLE to a
 space-separated list of permission tables, regular text files following
-the makedev syntax
-Chapter 23, Makedev syntax documentation.
    If you are using a static device table (i.e. not using devtmpfs,
+the makedev syntax.
    If you are using a static device table (i.e. not using devtmpfs,
 mdev, or (e)udev) then you can add device nodes using the same
 syntax, in so-called device tables. To use this feature, set config
 option BR2_ROOTFS_STATIC_DEVICE_TABLE to a space-separated list of
@@ -1561,8 +1595,7 @@ related to a specific application, you should set variables
 To cover this requirement, Buildroot provides support for so-called
 users tables. To use this feature, set config option
 BR2_ROOTFS_USERS_TABLES to a space-separated list of users tables,
-regular text files following the makeusers syntax
-Chapter 24, Makeusers syntax documentation.
    As shown in Section 9.1, “Recommended directory structure”, the recommended location for
+regular text files following the makeusers syntax.
    As shown in Section 9.1, “Recommended directory structure”, the recommended location for
 such files is board/<company>/<boardname>/.
    It should be noted that if the custom users are related to a specific
 application, you should set variable FOO_USERS in the package’s .mk
 file instead (see Section 17.5.2, “generic-package reference”).
9.7. Customization after the images have been created
While post-build scripts (Section 9.5, “Customizing the generated target filesystem”) are run before
@@ -2332,8 +2365,7 @@ preferred.
Note that such dependencies will ensure that the dependency opt
 is also enabled, but not necessarily built before your package. To do
 so, the dependency also needs to be expressed in the .mk file of the
 package.
Further formatting details: see the
-coding style
-Section 15.1, “Config.in file”.
17.2.4. Dependencies on target and toolchain options
Many packages depend on certain options of the toolchain: the choice of
+coding style.
17.2.4. Dependencies on target and toolchain options
Many packages depend on certain options of the toolchain: the choice of
 C library, C++ support, thread support, RPC support, wchar support,
 or dynamic library support. Some packages can only be built on certain
 target architectures, or if an MMU is available in the processor.
These dependencies have to be expressed with the appropriate depends
@@ -2483,46 +2515,35 @@ different way, using different infrastructures:
Further formatting details: see the writing
-rules
-Section 15.2, “The .mk file”.
17.4. The .hash file
When possible, you must add a third file, named libfoo.hash, that
+rules.
17.4. The .hash file
When possible, you must add a third file, named libfoo.hash, that
 contains the hashes of the downloaded files for the libfoo
 package. The only reason for not adding a .hash file is when hash
 checking is not possible due to how the package is downloaded.
When a package has a version selection choice, then the hash file may be
@@ -2679,7 +2700,7 @@ flags.
 The argument to be given to LIBFOO_CONFIG_SCRIPTS is the file name(s)
 of the shell script(s) needing fixing. All these names are relative to
 $(STAGING_DIR)/usr/bin and if needed multiple names can be given.
In addition, the scripts listed in LIBFOO_CONFIG_SCRIPTS are removed
-from $(TARGET_DIR)/usr/bin, since they are not needed on the target.
Example 17.1. Config script: divine package
Package divine installs shell script $(STAGING_DIR)/usr/bin/divine-config.
So its fixup would be:
DIVINE_CONFIG_SCRIPTS = divine-config

Example 17.2. Config script: imagemagick package:
Package imagemagick installs the following scripts:
+from $(TARGET_DIR)/usr/bin, since they are not needed on the target.
Example 17.1. Config script: divine package
Package divine installs shell script $(STAGING_DIR)/usr/bin/divine-config.
So its fixup would be:
DIVINE_CONFIG_SCRIPTS = divine-config

Example 17.2. Config script: imagemagick package:
Package imagemagick installs the following scripts:
 $(STAGING_DIR)/usr/bin/{Magick,Magick++,MagickCore,MagickWand,Wand}-config
So it’s fixup would be:
IMAGEMAGICK_CONFIG_SCRIPTS = \
    Magick-config Magick++-config \
    MagickCore-config MagickWand-config Wand-config

On line 14, we specify the list of dependencies this package relies
@@ -2766,8 +2787,7 @@ because two builds can never be perfectly simultaneous, and because
   itself use a different mechanism: all files of the form
   *.patch present in the package directory inside
   Buildroot will be applied to the package after extraction (see
-  patching a package
-Chapter 18, Patching a package). Finally, patches listed in
+  patching a package). Finally, patches listed in
   the LIBFOO_PATCH variable are applied before the patches stored
   in the Buildroot package directory.
 
  • 
@@ -3385,16 +3405,19 @@ built.
    • python-<something> in Buildroot. Other packages that use the
 Python build system, but are not Python modules, can freely choose
 their name (existing examples in Buildroot are scons and
-supervisor).
    In their Config.in file, they should depend on BR2_PACKAGE_PYTHON
-so that when Buildroot will enable Python 3 usage for modules, we will
-be able to enable Python modules progressively on Python 3.
    The main macro of the Python package infrastructure is
+supervisor).
    Packages that are only compatible with one version of Python (as in:
+Python 2 or Python 3) should depend on that version explicitely in
+their Config.in file (BR2_PACKAGE_PYTHON for Python 2,
+BR2_PACKAGE_PYTHON3 for Python 3).  Packages that are compatible
+with both versions should not explicitely depend on them in their
+Config.in file, since that condition is already expressed for the
+whole "External python modules" menu.
    The main macro of the Python package infrastructure is
 python-package. It is similar to the generic-package macro. It is
 also possible to create Python host packages with the
 host-python-package macro.
    Just like the generic infrastructure, the Python infrastructure works
 by defining a number of variables before calling the python-package
 or host-python-package macros.
    All the package metadata information variables that exist in the
-generic package infrastructure
-Section 17.5.2, “generic-package reference” also
+generic package infrastructure also
 exist in the Python infrastructure: PYTHON_FOO_VERSION,
 PYTHON_FOO_SOURCE, PYTHON_FOO_PATCH, PYTHON_FOO_SITE,
 PYTHON_FOO_SUBDIR, PYTHON_FOO_DEPENDENCIES, PYTHON_FOO_LICENSE,
@@ -3974,7 +3997,7 @@ user to build programs or libraries written in Rust, but it also downloads and
 manages their dependencies, to ensure repeatable builds. Cargo packages are
 called "crates".
    17.16.1. Cargo-based package’s Config.in file
    The Config.in file of Cargo-based package foo should contain:
    01: config BR2_PACKAGE_FOO
 02:     bool "foo"
-03:     depends on BR2_PACKAGE_HOST_RUSTC_ARCH_SUPPORTS
+03:     depends on BR2_PACKAGE_HOST_RUSTC_TARGET_ARCH_SUPPORTS
 04:     select BR2_PACKAGE_HOST_CARGO
 05:     help
 06:       This is a comment that explains what foo is.
@@ -4017,8 +4040,7 @@ package. Let’s start with an example:
    01: #############
 34:
 35: $(eval $(generic-package))
    The Makefile starts with the definition of the standard variables for package
 declaration (lines 7 to 11).
    As seen in line 35, it is based on the
-generic-package infrastructure
-Section 17.5.1, “generic-package tutorial”. So, it defines
+generic-package infrastructure. So, it defines
 the variables required by this particular infrastructure, where Cargo is
 invoked:
    • 
 FOO_BUILD_CMDS: Cargo is invoked to perform the build. The options required
@@ -4064,8 +4086,7 @@ automatically add a dependency on host-go to such p
 golang-package. It is similar to the generic-package macro. Only
 target packages are supported with golang-package.
      Just like the generic infrastructure, the Go infrastructure works
 by defining a number of variables before calling the golang-package.
      All the package metadata information variables that exist in the
-generic package infrastructure
-Section 17.5.2, “generic-package reference” also
+generic package infrastructure also
 exist in the Go infrastructure: FOO_VERSION, FOO_SOURCE,
 FOO_PATCH, FOO_SITE, FOO_SUBDIR, FOO_DEPENDENCIES,
 FOO_LICENSE, FOO_LICENSE_FILES, FOO_INSTALL_STAGING, etc.
      Note that it is not necessary to add host-go in the
@@ -4139,8 +4160,7 @@ builds a kernel module, and no other component:
      01: #####
 remote URI where to find the package source, licensing information.
      On line 13, we invoke the kernel-module helper infrastructure, that
 generates all the appropriate Makefile rules and variables to build
 that kernel module.
      Finally, on line 14, we invoke the
-generic-package infrastructure
-Section 17.5.1, “generic-package tutorial”.
      The dependency on linux is automatically added, so it is not needed to
+generic-package infrastructure.
      The dependency on linux is automatically added, so it is not needed to
 specify it in FOO_DEPENDENCIES.
      What you may have noticed is that, unlike other package infrastructures,
 we explicitly invoke a second infrastructure. This allows a package to
 build a kernel module, but also, if needed, use any one of other package
@@ -4225,8 +4245,7 @@ text
 
    Although Buildroot only contains one document written in AsciiDoc, there
 is, as for packages, an infrastructure for rendering documents using the
 AsciiDoc syntax.
    Also as for packages, the AsciiDoc infrastructure is available from a
-br2-external tree
-Section 9.2, “Keeping customizations outside of Buildroot”. This allows documentation for
+br2-external tree. This allows documentation for
 a br2-external tree to match the Buildroot documentation, as it will be
 rendered to the same formats and use the same layout and theme.
    17.19.1. asciidoc-document tutorial
    Whereas package infrastructures are suffixed with -package, the document
 infrastructures are suffixed with -document. So, the AsciiDoc infrastructure
@@ -4349,8 +4368,7 @@ Linux tools.
    On line 9, we specify the list of dependencies this tool reli
 dependencies are added to the Linux package dependencies list only when the
 foo tool is selected.
    The rest of the Makefile, lines 11-25 defines what should be done at the
 different steps of the Linux tool build process like for a
-generic package
-Section 17.5.1, “generic-package tutorial”. They will actually be
+generic package. They will actually be
 used only when the foo tool is selected. The only supported commands are
 _BUILD_CMDS, _INSTALL_STAGING_CMDS and _INSTALL_TARGET_CMDS.
    Note. One must not call $(eval $(generic-package)) or any other
 package infrastructure! Linux tools are not packages by themselves,
@@ -4391,8 +4409,7 @@ the Linux kernel tree; this is specific to the linux extension and can
 use the variables defined by the foo package, like: $(FOO_DIR) or
 $(FOO_VERSION)… as well as all the Linux variables, like:
 $(LINUX_VERSION) or $(LINUX_VERSION_PROBED), $(KERNEL_ARCH)…
-See the definition of those kernel variables
-Section 17.18.2, “kernel-module reference”.
    17.21. Hooks available in the various build steps
    The generic infrastructure (and as a result also the derived autotools
+See the definition of those kernel variables.
    17.21. Hooks available in the various build steps
    The generic infrastructure (and as a result also the derived autotools
 and cmake infrastructures) allow packages to specify hooks.
 These define further actions to perform after existing steps.
 Most hooks aren’t really useful for generic packages, since the .mk
@@ -4816,7 +4833,7 @@ Send the fix to the Buildroot mailing list (see
     can be removed.
     In the commit message of a patch fixing an autobuild failure, add a
     reference to the build result directory, as follows:
-
    Fixes http://autobuild.buildroot.org/results/51000a9d4656afe9e0ea6f07b9f8ed374c2e4069
    21.3. Reviewing and testing patches
    With the amount of patches sent to the mailing list each day, the
+
    Fixes: http://autobuild.buildroot.org/results/51000a9d4656afe9e0ea6f07b9f8ed374c2e4069
    21.3. Reviewing and testing patches
    With the amount of patches sent to the mailing list each day, the
 maintainer has a very hard job to judge which patches are ready to apply
 and which ones aren’t. Contributors can greatly help here by reviewing
 and testing these patches.
    In the review process, do not hesitate to respond to patch submissions
@@ -4961,7 +4978,6 @@ options that no longer exist or are no longer needed.
    If you are intereste
 further changes in the packages you added or modified, please add
 yourself to the DEVELOPERS file. This should be done in the same patch
 creating or modifying the package. See the DEVELOPERS file
-Chapter 22, DEVELOPERS file and get-developers
 for more information.
    Buildroot provides a handy tool to check for common coding style
 mistakes on files you created or modified, called check-package (see
 Section 17.23.2, “How to check the coding style” for more information).
    21.5.2. Preparing a patch series
    Starting from the changes committed in your local git view, rebase
@@ -4988,7 +5004,7 @@ large number of commits in the series;
 
  • 
 deep impact of the changes in the rest of the project;
 
  • 
-RFC [4];
+RFC [4];
 
  • 
 whenever you feel it will help presenting your work, your choices,
   the review process, etc.
@@ -5012,7 +5028,7 @@ the problem is complex, it is OK to add more paragraphs. All paragraphs
 should be wrapped at 72 characters.
 
 A paragraph that explains the root cause of the problem. Again, more
-than on paragraph is OK.
+than one paragraph is OK.
 
 Finally, one or more paragraphs that explain how the problem is solved.
 Don't hesitate to explain complex solutions in detail.
@@ -5043,13 +5059,10 @@ can be found under the "Message Id" tag on
 patchwork.  The advantage of
 in-reply-to is that patchwork will automatically mark the previous
 version of the patch as superseded.
    • 21.6. Reporting issues/bugs or getting help
    Before reporting any issue, please check in
-the mailing list archive
-Chapter 5, Community resources whether someone has
+the mailing list archive whether someone has
 already reported and/or fixed a similar problem.
    However you choose to report bugs or get help, either by
-opening a bug in the bug tracker
-Chapter 5, Community resources or by
-sending a mail to the mailing list
-Chapter 5, Community resources, there are
+opening a bug in the bug tracker or by
+sending a mail to the mailing list, there are
 a number of details to provide in order to help people reproduce and
 find a solution to the issue.
    Try to think as if you were trying to help someone else; in
 that case, what would you need?
    Here is a short list of details to provide in such case:
    • 
@@ -5070,7 +5083,7 @@ pastebin service. Note that not all available pastebin services will
 preserve Unix-style line terminators when downloading raw pastes.
 Following pastebin services are known to work correctly:
 - https://gist.github.com/
-- http://code.bulix.org/

    [4] RFC: (Request for comments) change proposal
    Chapter 22. DEVELOPERS file and get-developers
    The main Buildroot directory contains a file named DEVELOPERS that
+- http://code.bulix.org/

    [4] RFC: (Request for comments) change proposal
    Chapter 22. DEVELOPERS file and get-developers
    The main Buildroot directory contains a file named DEVELOPERS that
 lists the developers involved with various areas of Buildroot. Thanks
 to this file, the get-developers tool allows to:
    The solution recommended by Buildroot developers is to use the
 BusyBox init as it is sufficient for most embedded
-systems. systemd can be used for more complex situations.

    [3] This terminology differs from what is used by GNU
+systems. systemd can be used for more complex situations.

    [3] This terminology differs from what is used by GNU
 configure, where the host is the machine on which the application will
 run (which is usually the same as target)
    Chapter 7. Configuration of other components
    Before attempting to modify any of the components below, make sure you
 have already configured Buildroot itself, and have enabled the
@@ -728,6 +728,16 @@ When a change to the root filesystem skeleton is made, a full
    overlay, a post-build script or a post-image script are made,
    there is no need for a full rebuild: a simple make invocation
    will take the changes into account.
+
  • 
+When a package listed in FOO_DEPENDENCIES is rebuilt or removed,
+   the package foo is not automatically rebuilt. For example, if a
+   package bar is listed in FOO_DEPENDENCIES with FOO_DEPENDENCIES
+   = bar and the configuration of the bar package is changed, the
+   configuration change would not result in a rebuild of package foo
+   automatically. In this scenario, you may need to either rebuild any
+   packages in your build which reference bar in their DEPENDENCIES,
+   or perform a full rebuild to ensure any bar dependent packages are
+   up to date.
 
    • Generally speaking, when you’re facing a build error and you’re unsure
 of the potential consequences of the configuration changes you’ve
 made, do a full rebuild. If you get the same build error, then you are
@@ -2700,7 +2710,7 @@ flags.
 The argument to be given to LIBFOO_CONFIG_SCRIPTS is the file name(s)
 of the shell script(s) needing fixing. All these names are relative to
 $(STAGING_DIR)/usr/bin and if needed multiple names can be given.
    In addition, the scripts listed in LIBFOO_CONFIG_SCRIPTS are removed
-from $(TARGET_DIR)/usr/bin, since they are not needed on the target.
    Example 17.1. Config script: divine package
    Package divine installs shell script $(STAGING_DIR)/usr/bin/divine-config.
    So its fixup would be:
    DIVINE_CONFIG_SCRIPTS = divine-config

    Example 17.2. Config script: imagemagick package:
    Package imagemagick installs the following scripts:
+from $(TARGET_DIR)/usr/bin, since they are not needed on the target.
    Example 17.1. Config script: divine package
    Package divine installs shell script $(STAGING_DIR)/usr/bin/divine-config.
    So its fixup would be:
    DIVINE_CONFIG_SCRIPTS = divine-config

    Example 17.2. Config script: imagemagick package:
    Package imagemagick installs the following scripts:
 $(STAGING_DIR)/usr/bin/{Magick,Magick++,MagickCore,MagickWand,Wand}-config
    So it’s fixup would be:
    IMAGEMAGICK_CONFIG_SCRIPTS = \
    Magick-config Magick++-config \
    MagickCore-config MagickWand-config Wand-config

    On line 14, we specify the list of dependencies this package relies
@@ -2918,9 +2928,11 @@ because two builds can never be perfectly simultaneous, and because
 LIBFOO_DEPENDENCIES lists the dependencies (in terms of package
   name) that are required for the current target package to
   compile. These dependencies are guaranteed to be compiled and
-  installed before the configuration of the current package starts. In
-  a similar way, HOST_LIBFOO_DEPENDENCIES lists the dependencies for
-  the current host package.
+  installed before the configuration of the current package starts.
+  However, modifications to configuration of these dependencies will
+  not force a rebuild of the current package. In a similar way,
+  HOST_LIBFOO_DEPENDENCIES lists the dependencies for the current
+  host package.
 
  • 
 LIBFOO_EXTRACT_DEPENDENCIES lists the dependencies (in terms of
   package name) that are required for the current target package to be
@@ -5004,7 +5016,7 @@ large number of commits in the series;
 
  • 
 deep impact of the changes in the rest of the project;
 
  • 
-RFC [4];
+RFC [4];
 
  • 
 whenever you feel it will help presenting your work, your choices,
   the review process, etc.
@@ -5083,7 +5095,7 @@ pastebin service. Note that not all available pastebin services will
 preserve Unix-style line terminators when downloading raw pastes.
 Following pastebin services are known to work correctly:
 - https://gist.github.com/
-- http://code.bulix.org/

    • [4] RFC: (Request for comments) change proposal
    Chapter 22. DEVELOPERS file and get-developers
    The main Buildroot directory contains a file named DEVELOPERS that
+- http://code.bulix.org/

    [4] RFC: (Request for comments) change proposal
    Chapter 22. DEVELOPERS file and get-developers
    The main Buildroot directory contains a file named DEVELOPERS that
 lists the developers involved with various areas of Buildroot. Thanks
 to this file, the get-developers tool allows to: