diff --git a/Documentation/bluetooth.md b/Documentation/bluetooth.md index a9bb3da04..ff36deebb 100644 --- a/Documentation/bluetooth.md +++ b/Documentation/bluetooth.md @@ -1,9 +1,9 @@ # Bluetooth -We support `bluetoothctl` on host. Later we want also support bluetooth trought UI. +We support `bluetoothctl` on host. Later we want also support Bluetooth trought UI. All pairs and settings are persistent over reboots and updates. -If you want setup bluetooth on host, use the *bluetoothctl* utility. +If you want setup Bluetooth on host, use the `bluetoothctl` utility. ## Scan devices diff --git a/Documentation/boards/odroid-c2.md b/Documentation/boards/odroid-c2.md new file mode 100644 index 000000000..592512c23 --- /dev/null +++ b/Documentation/boards/odroid-c2.md @@ -0,0 +1,22 @@ +# Odroid-C2 + +## eMMC + +eMMC support is provided transparently. Just flash the image to the eMMC board as you would an SD card. + +## Console + +By default, console access is granted over the serial header and over HDMI. Certain startup messages will only appear on the serial console by default. To show the messages on the HDMI console instead, swap the order of the two consoles in the `cmdline.txt` file on the boot partition. You can also delete the AML0 console if you don't plan on using the serial adapter. +eg. `console=ttyAML0,115200n8 console=tty0` + +## USB + +A long-standing kernel bug currently results in some odd behavior. To use the USB, a device must be plugged into one of the USB ports at hard boot. If all devices are removed from the USB ports, the USB will cease to function until a reboot. + +### OTG + +The OTG USB is untested. + +## GPIO + +Refer to [the odroid wiki](https://wiki.odroid.com/odroid-c2/hardware/expansion_connectors). diff --git a/Documentation/boards/raspberrypi.md b/Documentation/boards/raspberrypi.md index 6c9f7cf9f..52317e58f 100644 --- a/Documentation/boards/raspberrypi.md +++ b/Documentation/boards/raspberrypi.md @@ -16,7 +16,7 @@ The 64bit version is under development by RPi-Team. It work very nice but it cou ## Serial console -For access to terminal over serial console, add `console=ttyAMA0,115200` to `cmdline.txt` and `enable_uart=1` into `config.txt`. GPIO pins are: 6 = GND / 8 = UART TXD / 10 = UART RXD. +For access to terminal over serial console, add `console=ttyAMA0,115200` to `cmdline.txt` and `enable_uart=1`, `dtoverlay=pi3-disable-bt` into `config.txt`. GPIO pins are: 6 = GND / 8 = UART TXD / 10 = UART RXD. ## I2C diff --git a/Documentation/configuration.md b/Documentation/configuration.md index 2fe7b2816..330c0d77a 100644 --- a/Documentation/configuration.md +++ b/Documentation/configuration.md @@ -2,10 +2,10 @@ ## Automatic -You can use a USB drive with HassOS to configure network options, ssh access to the host, and to install updates. +You can use an USB drive with HassOS to configure network options, SSH access to the host and to install updates. Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG`. Use the following directory structure within the USB drive: -``` +```text network/ modules/ authorized_keys @@ -24,15 +24,15 @@ API/UI or by calling `systemctl restart hassos-config` on the host. ### Bootargs -You can edit or create a `cmdline.txt` into your boot partition. That will be read from our bootloader. +You can edit or create a `cmdline.txt` in your boot partition. That will be read from the bootloader. ### Kernel-Module -The kernel module folder `/etc/modules-load.d` is persistent and you can add your config files there. See [Systemd modules load][systemd-modules]. +The kernel module folder `/etc/modules-load.d` is persistent and you can add your configuration files there. See [Systemd modules load][systemd-modules]. ### Network -You can manual add, edit or remove connections configs from `/etc/NetworkManager/system-connections`. +You can manual add, edit or remove connections configurations from `/etc/NetworkManager/system-connections`. [systemd-modules]: https://www.freedesktop.org/software/systemd/man/modules-load.d.html [network.md]: network.md diff --git a/Documentation/deployment.md b/Documentation/deployment.md index 489711402..a74c3ce30 100644 --- a/Documentation/deployment.md +++ b/Documentation/deployment.md @@ -1,11 +1,13 @@ # Deployment -We know 3 types of release builds: +We provide 3 different types of release builds: + - development (beta/dev) - staging (rc) - production (stable) ## Versioning + The format of version is *MAJOR.BUILD*. Everytime we create a new release with same userland, we bump the build number. The development use here own major number they will be bump for the stable version and the development version go to next major number. @@ -16,11 +18,11 @@ The development use here own major number they will be bump for the stable versi 3.x = stable ``` -## GIT Branch/Tag -The branch `dev` ist the actual development branch and from there we never make a release. The `master` branch hould the development -version from they we build a beta release. +## Git branch/Tag -If we create a new staging/productive release, we create a new branch `rel-{MAJOR}`. They will be used for the hole cycle of this release. +The branch `dev` ist the actual development branch and from there we never make a release. The `master` branch contains the development version and from there we build a beta release. + +If we create a new staging/productive release, we create a new branch `rel-{MAJOR}`. They will be used for the whole cycle of this release. ## Upload release files diff --git a/Documentation/development.md b/Documentation/development.md new file mode 100644 index 000000000..6a165eef0 --- /dev/null +++ b/Documentation/development.md @@ -0,0 +1,24 @@ +# Development + +## Boot system + +`BOOT_SYS`: +- efi +- hyprid +- spl +- mbr + +HassOS is basicly used GPT. But for use GPT we need own the first 1024 of +boot drive. Is that not possible, you can use MBR for your device, they work also with SPLs. + +Hyprid and SPL use both a hyprid MBR/GPT table but SPL move the GPT header 8MB for give space to write SPL and boot images before. + +`BOOTLOADER`: +- uboot +- barebox + +We support mainly uboot but for uefi system we can also use barebox. In future we hope to remove barebox with uboot also on uefi. + +`DISK_SIZE`: +Default 2. That is the size of end image in GB. + diff --git a/Documentation/kernel.md b/Documentation/kernel.md index e3b4b955a..24a78cb31 100644 --- a/Documentation/kernel.md +++ b/Documentation/kernel.md @@ -3,5 +3,7 @@ | Board | Version | |-------|---------| -| Open Virtual Applicance | 4.14.59 | -| Raspberry Pi | 4.14.58 | +| Open Virtual Applicance | 4.14.67 | +| Raspberry Pi | 4.14.66 | +| Tinker Board | 4.14.67 | +| Odroid-C2 | 4.14.36 | diff --git a/Documentation/network.md b/Documentation/network.md index 377ba781a..e2dfda359 100644 --- a/Documentation/network.md +++ b/Documentation/network.md @@ -1,15 +1,16 @@ # Network -HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive as described in [Configuration][configuration-usb]. +HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive as described in [Configuration][configuration-usb]. ## Configuration Examples -You can also read the [Official Manual][keyfile] or there are a lot of examples accross internet. The system is read only, if you don't want the IP address to change every boot, you should set the uuid property with a generic [UUID4][uuid]. Inside the `network` folder create the file `my-network` and add the appropriate contents below: +You can also read the [Official Manual][keyfile] or there are a lot of examples accross internet. The system is read-only, if you don't want the IP address to change every boot, you should set the UUID property with a generic [UUID4][uuid]. Inside the `network` folder create the file `my-network` and add the appropriate contents below: ### Default We have a preinstalled connection profile: -``` + +```ini [connection] id=HassOS default uuid=f62bf7c2-e565-49ff-bbfc-a4cf791e6add @@ -24,6 +25,7 @@ method=auto ``` ### LAN + ```ini [connection] id=hassos-network @@ -39,6 +41,7 @@ method=auto ``` ### Wireless WPA/PSK + ```ini [connection] id=hassos-network @@ -64,7 +67,8 @@ method=auto ### Static IP -Replace follow configs: +Replace follow configuration: + ```ini [ipv4] method=manual @@ -76,7 +80,8 @@ dns=8.8.8.8;8.8.4.4; ### Reset network -If you want reset the network configuration to default, use follow commands on host: +If you want reset the network configuration to default, use follow commands on the host: + ```bash $ rm /etc/NetworkManager/system-connections/* $ cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/ @@ -86,6 +91,7 @@ $ nmcli con reload ### Powersave If you have trouble with powersave you can do following: + ```ini [wifi] # Values are 0 (use default), 1 (ignore/don't touch), 2 (disable) or 3 (enable). diff --git a/buildroot-external/Config.in b/buildroot-external/Config.in index 92a49352f..eb56fe71b 100644 --- a/buildroot-external/Config.in +++ b/buildroot-external/Config.in @@ -3,3 +3,4 @@ source "$BR2_EXTERNAL_HASSOS_PATH/package/libapparmor/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/apparmor/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in" source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in" +source "$BR2_EXTERNAL_HASSOS_PATH/package/hardkernel-boot/Config.in" diff --git a/buildroot-external/board/asus/hassos-hook.sh b/buildroot-external/board/asus/hassos-hook.sh new file mode 100755 index 000000000..491e0ebfc --- /dev/null +++ b/buildroot-external/board/asus/hassos-hook.sh @@ -0,0 +1,28 @@ +#!/bin/bash + +function hassos_pre_image() { + local BOOT_DATA="$(path_boot_dir)" + local SPL_IMG="$(path_spl_img)" + + cp -t ${BOOT_DATA} \ + ${BINARIES_DIR}/boot.scr \ + ${BINARIES_DIR}/rk3288-tinker.dtb + + echo "console=tty1" > ${BOOT_DATA}/cmdline.txt + + # Create boot binary + rm -f ${BINARIES_DIR}/u-boot-spl-dtb.img + mkimage -n rk3288 -T rksd -d ${BINARIES_DIR}/u-boot-spl-dtb.bin ${BINARIES_DIR}/u-boot-spl-dtb.img + cat ${BINARIES_DIR}/u-boot-dtb.bin >> ${BINARIES_DIR}/u-boot-spl-dtb.img + + # SPL + create_spl_image + + dd if=${BINARIES_DIR}/u-boot-spl-dtb.img of=${SPL_IMG} conv=notrunc bs=512 seek=64 +} + + +function hassos_post_image() { + convert_disk_image_gz +} + diff --git a/buildroot-external/board/tinker/kernel.config b/buildroot-external/board/asus/tinker/kernel.config similarity index 100% rename from buildroot-external/board/tinker/kernel.config rename to buildroot-external/board/asus/tinker/kernel.config diff --git a/buildroot-external/board/tinker/info b/buildroot-external/board/asus/tinker/meta similarity index 77% rename from buildroot-external/board/tinker/info rename to buildroot-external/board/asus/tinker/meta index 42e105713..55c3992b7 100644 --- a/buildroot-external/board/tinker/info +++ b/buildroot-external/board/asus/tinker/meta @@ -1,5 +1,5 @@ BOARD_ID=tinker -BOARD_NAME="Tinker Board" +BOARD_NAME="Asus TinkerBoard" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=zImage diff --git a/buildroot-external/board/tinker/patches/linux/0000-mali-r19p0-01rel0.patch b/buildroot-external/board/asus/tinker/patches/linux/0000-mali-r19p0-01rel0.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0000-mali-r19p0-01rel0.patch rename to buildroot-external/board/asus/tinker/patches/linux/0000-mali-r19p0-01rel0.patch diff --git a/buildroot-external/board/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch b/buildroot-external/board/asus/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch rename to buildroot-external/board/asus/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch diff --git a/buildroot-external/board/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch b/buildroot-external/board/asus/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch rename to buildroot-external/board/asus/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch diff --git a/buildroot-external/board/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch b/buildroot-external/board/asus/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch rename to buildroot-external/board/asus/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch diff --git a/buildroot-external/board/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch b/buildroot-external/board/asus/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch rename to buildroot-external/board/asus/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch diff --git a/buildroot-external/board/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch b/buildroot-external/board/asus/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch rename to buildroot-external/board/asus/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch diff --git a/buildroot-external/board/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch b/buildroot-external/board/asus/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch rename to buildroot-external/board/asus/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch diff --git a/buildroot-external/board/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch b/buildroot-external/board/asus/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch rename to buildroot-external/board/asus/tinker/patches/linux/1001-Integrating-the-Mali-drivers.patch diff --git a/buildroot-external/board/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch b/buildroot-external/board/asus/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch rename to buildroot-external/board/asus/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch diff --git a/buildroot-external/board/tinker/patches/linux/1003-clk-rockchip-rk3288-prefer-vdpu-for-vcodec-clock-sou.patch b/buildroot-external/board/asus/tinker/patches/linux/1003-clk-rockchip-rk3288-prefer-vdpu-for-vcodec-clock-sou.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1003-clk-rockchip-rk3288-prefer-vdpu-for-vcodec-clock-sou.patch rename to buildroot-external/board/asus/tinker/patches/linux/1003-clk-rockchip-rk3288-prefer-vdpu-for-vcodec-clock-sou.patch diff --git a/buildroot-external/board/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch b/buildroot-external/board/asus/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch rename to buildroot-external/board/asus/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch diff --git a/buildroot-external/board/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch b/buildroot-external/board/asus/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch rename to buildroot-external/board/asus/tinker/patches/linux/1005-Reboot-patch-2-The-Return.patch diff --git a/buildroot-external/board/tinker/patches/linux/1006-rockchip-rga-v4l2-m2m-support.patch b/buildroot-external/board/asus/tinker/patches/linux/1006-rockchip-rga-v4l2-m2m-support.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1006-rockchip-rga-v4l2-m2m-support.patch rename to buildroot-external/board/asus/tinker/patches/linux/1006-rockchip-rga-v4l2-m2m-support.patch diff --git a/buildroot-external/board/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch b/buildroot-external/board/asus/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch rename to buildroot-external/board/asus/tinker/patches/linux/1007-dt-bindings-Document-the-Rockchip-RGA-bindings.patch diff --git a/buildroot-external/board/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch b/buildroot-external/board/asus/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch rename to buildroot-external/board/asus/tinker/patches/linux/1008-dwc2-avoid_nak_for_csplit.patch diff --git a/buildroot-external/board/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch b/buildroot-external/board/asus/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch rename to buildroot-external/board/asus/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch diff --git a/buildroot-external/board/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch b/buildroot-external/board/asus/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch rename to buildroot-external/board/asus/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch diff --git a/buildroot-external/board/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch b/buildroot-external/board/asus/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch rename to buildroot-external/board/asus/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch diff --git a/buildroot-external/board/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch b/buildroot-external/board/asus/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch rename to buildroot-external/board/asus/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch diff --git a/buildroot-external/board/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch b/buildroot-external/board/asus/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch rename to buildroot-external/board/asus/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch diff --git a/buildroot-external/board/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch b/buildroot-external/board/asus/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch rename to buildroot-external/board/asus/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch diff --git a/buildroot-external/board/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch b/buildroot-external/board/asus/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch rename to buildroot-external/board/asus/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch diff --git a/buildroot-external/board/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch b/buildroot-external/board/asus/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch rename to buildroot-external/board/asus/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch diff --git a/buildroot-external/board/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch b/buildroot-external/board/asus/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch rename to buildroot-external/board/asus/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch diff --git a/buildroot-external/board/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch b/buildroot-external/board/asus/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch rename to buildroot-external/board/asus/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch diff --git a/buildroot-external/board/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch b/buildroot-external/board/asus/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch rename to buildroot-external/board/asus/tinker/patches/linux/2012-ARM-DTSI-rk3288-Add-the-RGA-node.patch diff --git a/buildroot-external/board/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch b/buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch rename to buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch diff --git a/buildroot-external/board/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch b/buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch rename to buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch diff --git a/buildroot-external/board/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch b/buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch rename to buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch diff --git a/buildroot-external/board/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch b/buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch rename to buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch diff --git a/buildroot-external/board/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch b/buildroot-external/board/asus/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch rename to buildroot-external/board/asus/tinker/patches/linux/2018-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch diff --git a/buildroot-external/board/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch b/buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch rename to buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch diff --git a/buildroot-external/board/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch b/buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch rename to buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch diff --git a/buildroot-external/board/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch b/buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch rename to buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch diff --git a/buildroot-external/board/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch b/buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch rename to buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTSI-rk3288-Define-the-VPU-services.patch diff --git a/buildroot-external/board/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch b/buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch rename to buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch diff --git a/buildroot-external/board/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch b/buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch rename to buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch diff --git a/buildroot-external/board/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch b/buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch rename to buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch diff --git a/buildroot-external/board/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch b/buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch rename to buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch diff --git a/buildroot-external/board/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch b/buildroot-external/board/asus/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch rename to buildroot-external/board/asus/tinker/patches/linux/2027_Tinkerboard-Next-audio.patch diff --git a/buildroot-external/board/tinker/patches/linux/2028-Tinker-Bluetooth.patch b/buildroot-external/board/asus/tinker/patches/linux/2028-Tinker-Bluetooth.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/2028-Tinker-Bluetooth.patch rename to buildroot-external/board/asus/tinker/patches/linux/2028-Tinker-Bluetooth.patch diff --git a/buildroot-external/board/tinker/patches/linux/260_DTS_gpiomem_node.patch b/buildroot-external/board/asus/tinker/patches/linux/260_DTS_gpiomem_node.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/260_DTS_gpiomem_node.patch rename to buildroot-external/board/asus/tinker/patches/linux/260_DTS_gpiomem_node.patch diff --git a/buildroot-external/board/tinker/patches/linux/261_gpiomem_driver.patch b/buildroot-external/board/asus/tinker/patches/linux/261_gpiomem_driver.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/261_gpiomem_driver.patch rename to buildroot-external/board/asus/tinker/patches/linux/261_gpiomem_driver.patch diff --git a/buildroot-external/board/tinker/patches/linux/3000_DTS_rearrange_thermal_zones.patch b/buildroot-external/board/asus/tinker/patches/linux/3000_DTS_rearrange_thermal_zones.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/3000_DTS_rearrange_thermal_zones.patch rename to buildroot-external/board/asus/tinker/patches/linux/3000_DTS_rearrange_thermal_zones.patch diff --git a/buildroot-external/board/tinker/patches/linux/3004-Tinkerboard-overclocking-operation.patch b/buildroot-external/board/asus/tinker/patches/linux/3004-Tinkerboard-overclocking-operation.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/3004-Tinkerboard-overclocking-operation.patch rename to buildroot-external/board/asus/tinker/patches/linux/3004-Tinkerboard-overclocking-operation.patch diff --git a/buildroot-external/board/tinker/patches/linux/4001-rockchip-Fix-dai_name-for-HDMI-codec-to-the-asoc-tree.patch b/buildroot-external/board/asus/tinker/patches/linux/4001-rockchip-Fix-dai_name-for-HDMI-codec-to-the-asoc-tree.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/4001-rockchip-Fix-dai_name-for-HDMI-codec-to-the-asoc-tree.patch rename to buildroot-external/board/asus/tinker/patches/linux/4001-rockchip-Fix-dai_name-for-HDMI-codec-to-the-asoc-tree.patch diff --git a/buildroot-external/board/tinker/patches/linux/5000-add-link-for-miniarm-dtb-file.patch b/buildroot-external/board/asus/tinker/patches/linux/5000-add-link-for-miniarm-dtb-file.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/5000-add-link-for-miniarm-dtb-file.patch rename to buildroot-external/board/asus/tinker/patches/linux/5000-add-link-for-miniarm-dtb-file.patch diff --git a/buildroot-external/board/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch b/buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch rename to buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch diff --git a/buildroot-external/board/tinker/patches/linux/increasing_DMA_block_memory_allocation_to_2048.patch b/buildroot-external/board/asus/tinker/patches/linux/increasing_DMA_block_memory_allocation_to_2048.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/increasing_DMA_block_memory_allocation_to_2048.patch rename to buildroot-external/board/asus/tinker/patches/linux/increasing_DMA_block_memory_allocation_to_2048.patch diff --git a/buildroot-external/board/tinker/patches/linux/memolry-leak-fix-r8723bs.patch b/buildroot-external/board/asus/tinker/patches/linux/memolry-leak-fix-r8723bs.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/memolry-leak-fix-r8723bs.patch rename to buildroot-external/board/asus/tinker/patches/linux/memolry-leak-fix-r8723bs.patch diff --git a/buildroot-external/board/tinker/patches/linux/staging-rtl8723bs-hide-nolinked-power-save-info-when-not-debugging.patch b/buildroot-external/board/asus/tinker/patches/linux/staging-rtl8723bs-hide-nolinked-power-save-info-when-not-debugging.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/staging-rtl8723bs-hide-nolinked-power-save-info-when-not-debugging.patch rename to buildroot-external/board/asus/tinker/patches/linux/staging-rtl8723bs-hide-nolinked-power-save-info-when-not-debugging.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-0001-realtek-wifi-881xAU-605ecfa.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-0001-realtek-wifi-881xAU-605ecfa.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-0001-realtek-wifi-881xAU-605ecfa.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-0001-realtek-wifi-881xAU-605ecfa.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-0002-realtek-wifi-881xAU-adding-kernel-4.14.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-0002-realtek-wifi-881xAU-adding-kernel-4.14.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-0002-realtek-wifi-881xAU-adding-kernel-4.14.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-0002-realtek-wifi-881xAU-adding-kernel-4.14.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-0003-realtek-wifi-881xAU-enable-8814au.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-0003-realtek-wifi-881xAU-enable-8814au.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-0003-realtek-wifi-881xAU-enable-8814au.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-0003-realtek-wifi-881xAU-enable-8814au.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-0005-realtek-wifi-881xAU-update-to-5a5d0f.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-0005-realtek-wifi-881xAU-update-to-5a5d0f.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-0005-realtek-wifi-881xAU-update-to-5a5d0f.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-0005-realtek-wifi-881xAU-update-to-5a5d0f.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-2001-01-rtl8188eu-kconfig-makefile.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-2001-01-rtl8188eu-kconfig-makefile.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-2001-01-rtl8188eu-kconfig-makefile.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-2001-01-rtl8188eu-kconfig-makefile.patch diff --git a/buildroot-external/board/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch b/buildroot-external/board/asus/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch similarity index 100% rename from buildroot-external/board/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch rename to buildroot-external/board/asus/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0001-Support-HassOS-bootstate-partition.patch b/buildroot-external/board/asus/tinker/patches/uboot/0001-Support-HassOS-bootstate-partition.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0001-Support-HassOS-bootstate-partition.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0001-Support-HassOS-bootstate-partition.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch b/buildroot-external/board/asus/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0018-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch b/buildroot-external/board/asus/tinker/patches/uboot/0018-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0018-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0018-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0036-auto-enable-ums-mode-when-TinkerBoard-is-connected-t.patch b/buildroot-external/board/asus/tinker/patches/uboot/0036-auto-enable-ums-mode-when-TinkerBoard-is-connected-t.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0036-auto-enable-ums-mode-when-TinkerBoard-is-connected-t.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0036-auto-enable-ums-mode-when-TinkerBoard-is-connected-t.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0037-add-10ms-delay-after-re-enable-EMMC.patch b/buildroot-external/board/asus/tinker/patches/uboot/0037-add-10ms-delay-after-re-enable-EMMC.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0037-add-10ms-delay-after-re-enable-EMMC.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0037-add-10ms-delay-after-re-enable-EMMC.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0039-fixed-enter-ums-mode-fail-sometimes.patch b/buildroot-external/board/asus/tinker/patches/uboot/0039-fixed-enter-ums-mode-fail-sometimes.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0039-fixed-enter-ums-mode-fail-sometimes.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0039-fixed-enter-ums-mode-fail-sometimes.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0045-modify-UMS-name-of-uboot.patch b/buildroot-external/board/asus/tinker/patches/uboot/0045-modify-UMS-name-of-uboot.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0045-modify-UMS-name-of-uboot.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0045-modify-UMS-name-of-uboot.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0049-added-timeout-when-force-entering-UMS-mode.patch b/buildroot-external/board/asus/tinker/patches/uboot/0049-added-timeout-when-force-entering-UMS-mode.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0049-added-timeout-when-force-entering-UMS-mode.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0049-added-timeout-when-force-entering-UMS-mode.patch diff --git a/buildroot-external/board/tinker/patches/uboot/0050-USB-VID-PID.patch b/buildroot-external/board/asus/tinker/patches/uboot/0050-USB-VID-PID.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/0050-USB-VID-PID.patch rename to buildroot-external/board/asus/tinker/patches/uboot/0050-USB-VID-PID.patch diff --git a/buildroot-external/board/tinker/patches/uboot/100-tinker-s-eMMC-bootable.patch b/buildroot-external/board/asus/tinker/patches/uboot/100-tinker-s-eMMC-bootable.patch similarity index 100% rename from buildroot-external/board/tinker/patches/uboot/100-tinker-s-eMMC-bootable.patch rename to buildroot-external/board/asus/tinker/patches/uboot/100-tinker-s-eMMC-bootable.patch diff --git a/buildroot-external/board/tinker/uboot-boot.sh b/buildroot-external/board/asus/tinker/uboot-boot.sh similarity index 100% rename from buildroot-external/board/tinker/uboot-boot.sh rename to buildroot-external/board/asus/tinker/uboot-boot.sh diff --git a/buildroot-external/board/tinker/uboot.config b/buildroot-external/board/asus/tinker/uboot.config similarity index 63% rename from buildroot-external/board/tinker/uboot.config rename to buildroot-external/board/asus/tinker/uboot.config index 690c9c65b..e2e1ea464 100644 --- a/buildroot-external/board/tinker/uboot.config +++ b/buildroot-external/board/asus/tinker/uboot.config @@ -1,4 +1,6 @@ # CONFIG_USB_STORAGE is not set +# CONFIG_DOS_PARTITION is not set CONFIG_DM_VIDEO=y CONFIG_CMD_FILEENV=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_OFFSET=0x25100000 diff --git a/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt b/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt new file mode 100644 index 000000000..f306c8bb7 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/boot-env.txt @@ -0,0 +1,131 @@ + + +# Custom modeline! +# To use custom modeline you need to disable all the below resolutions +# and setup your own! +# For more information check our wiki: +# http://odroid.com/dokuwiki/doku.php?id=en:c2_hdmi_autosetting +# Example below: +#m=custombuilt +#modeline=1920,1200,154000,74040,60,1920,1968,2000,2080,1200,1202,1208,1235,1,0,1 + +# 480 Lines (720x480) +#m=480i60hz +#m=480i_rpt +#m=480p60hz +#m=480p_rpt + +# 576 Lines (720x576) +#m=576i50hz +#m=576i_rpt +#m=576p50hz +#m=576p_rpt + +# 720 Lines (1280x720) +#m=720p50hz +#m=720p60hz + +# 1080 Lines (1920x1080) +#m=1080i60hz +m=1080p60hz +#m=1080i50hz +#m=1080p50hz +#m=1080p24hz + +# 4K (3840x2160) +#m=2160p30hz +#m=2160p25hz +#m=2160p24hz +#m=smpte24hz +#m=2160p50hz +#m=2160p60hz +#m=2160p50hz420 +#m=2160p60hz420 + +### VESA modes ### +#m=640x480p60hz +#m=800x480p60hz +#m=480x800p60hz +#m=800x600p60hz +#m=1024x600p60hz +#m=1024x768p60hz +#m=1280x800p60hz +#m=1280x1024p60hz +#m=1360x768p60hz +#m=1440x900p60hz +#m=1600x900p60hz +#m=1680x1050p60hz +#m=1600x1200p60hz +#m=1920x1200p60hz +#m=2560x1080p60hz +#m=2560x1440p60hz +#m=2560x1600p60hz +#m=3440x1440p60hz + +# HDMI BPP Mode +m_bpp=32 +#m_bpp=24 +#m_bpp=16 + +# HDMI DVI/VGA modes +# By default its set to HDMI, if needed change below. +# Uncomment only a single Line. +#vout=dvi +#vout=vga + +# HDMI HotPlug Detection control +# Allows you to force HDMI thinking that the cable is connected. +# true = HDMI will believe that cable is always connected +# false = will let board/monitor negotiate the connection status +hpd=true +#hpd=false + +# Monitor output +# Controls if HDMI PHY should output anything to the monitor +monitor_onoff=false + +# Server Mode (aka. No Graphics) +# Setting nographics to 1 will disable all video subsystem +# This mode is ideal of server type usage. (Saves ~300Mb of RAM) +nographics=0 + +# Meson Timer +# 1 - Meson Timer +# 0 - Arch Timer +# Using meson_timer improves the video playback however it breaks KVM (virtualization). +# Using arch timer allows KVM/Virtualization to work however you'll experience poor video +mesontimer=1 + +# UHS (Ultra High Speed) MicroSD mode enable/disable +disableuhs=false + +# MicroSD Card Detection enable/disable +# Force the MMC controlled to believe that a card is connected. +mmc_removable=true + +# USB Multi WebCam tweak +# Only enable this if you use it. +usbmulticam=false + +# CPU Frequency / Cores control +########################################### +### WARNING!!! WARNING!!! WARNING!!! +# Before changing anything here please read the wiki entry: +# http://odroid.com/dokuwiki/doku.php?id=en:c2_set_cpu_freq +# +# MAX CPU's +#maxcpus=1 +#maxcpus=2 +#maxcpus=3 +maxcpus=4 + +# MAX Frequency +#max_freq=2016 +#max_freq=1944 +#max_freq=1944 +#max_freq=1920 +#max_freq=1896 +#max_freq=1752 +#max_freq=1680 +#max_freq=1656 +max_freq=1536 diff --git a/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh b/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh new file mode 100755 index 000000000..3d3fab208 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/hassos-hook.sh @@ -0,0 +1,27 @@ +#!/bin/bash + +function hassos_pre_image() { + local BOOT_DATA="$(path_boot_dir)" + local BL1="${BINARIES_DIR}/bl1.bin.hardkernel" + local UBOOT_GXBB="${BINARIES_DIR}/u-boot.gxbb" + local spl_img="$(path_spl_img)" + + cp ${BINARIES_DIR}/boot.scr ${BOOT_DATA}/boot.scr + cp ${BOARD_DIR}/boot-env.txt ${BOOT_DATA}/config.txt + cp ${BINARIES_DIR}/meson-gxbb-odroidc2.dtb ${BOOT_DATA}/meson-gxbb-odroidc2.dtb + + echo "console=tty0 console=ttyAML0,115200n8" > ${BOOT_DATA}/cmdline.txt + + # SPL + create_spl_image + + dd if=${BL1} of=${spl_img} conv=notrunc bs=1 count=440 + dd if=${BL1} of=${spl_img} conv=notrunc bs=512 skip=1 seek=1 + dd if=${UBOOT_GXBB} of=${spl_img} conv=notrunc bs=512 seek=97 +} + + +function hassos_post_image() { + convert_disk_image_gz +} + diff --git a/buildroot-external/board/hardkernel/odroid-c2/kernel.config b/buildroot-external/board/hardkernel/odroid-c2/kernel.config new file mode 100644 index 000000000..b3e2996df --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/kernel.config @@ -0,0 +1,4621 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 4.14.14 Kernel Configuration +# +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_SMP=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_DEFAULT_HOSTNAME="(none)" +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_FHANDLE=y +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_WATCH=y +CONFIG_AUDIT_TREE=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ_COMMON=y +# CONFIG_HZ_PERIODIC is not set +CONFIG_NO_HZ_IDLE=y +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y + +# +# RCU Subsystem +# +CONFIG_PREEMPT_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_TASKS_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_BUILD_BIN2C=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_CGROUPS=y +CONFIG_PAGE_COUNTER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_BLK_CGROUP=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CGROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_CFS_BANDWIDTH is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +# CONFIG_SOCK_CGROUP_DATA is not set +# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_NET_NS=y +CONFIG_SCHED_AUTOGROUP=y +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_XZ=y +CONFIG_RD_LZO=y +CONFIG_RD_LZ4=y +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +# CONFIG_EXPERT is not set +CONFIG_UID16=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +CONFIG_SYSFS_SYSCALL=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_POSIX_TIMERS=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set +CONFIG_KALLSYMS_BASE_RELATIVE=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_ADVISE_SYSCALLS=y +# CONFIG_USERFAULTFD is not set +CONFIG_PCI_QUIRKS=y +CONFIG_MEMBARRIER=y +# CONFIG_EMBEDDED is not set +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_MEMCG_SYSFS_ON is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_SYSTEM_DATA_VERIFICATION is not set +CONFIG_PROFILING=y +CONFIG_CRASH_CORE=y +CONFIG_KEXEC_CORE=y +# CONFIG_KPROBES is not set +CONFIG_JUMP_LABEL=y +# CONFIG_STATIC_KEYS_SELFTEST is not set +# CONFIG_UPROBES is not set +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_GCC_PLUGINS=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR is not set +CONFIG_CC_STACKPROTECTOR_NONE=y +# CONFIG_CC_STACKPROTECTOR_REGULAR is not set +# CONFIG_CC_STACKPROTECTOR_STRONG is not set +CONFIG_THIN_ARCHIVES=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +# CONFIG_HAVE_ARCH_HASH is not set +# CONFIG_ISA_BUS_API is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_COMPAT_OLD_SIGACTION=y +# CONFIG_CPU_NO_EFFICIENT_FFS is not set +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +# CONFIG_REFCOUNT_FULL is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_DEV_THROTTLING is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IOSCHED_CFQ=y +# CONFIG_CFQ_GROUP_IOSCHED is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_FREEZER=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +CONFIG_ARCH_MESON=y +# CONFIG_ARCH_MVEBU is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_VULCAN is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIE_ECRC is not set +# CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y +# CONFIG_PCIE_DPC is not set +# CONFIG_PCIE_PTM is not set +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set +# CONFIG_PCI_STUB is not set +CONFIG_PCI_ATS=y +CONFIG_PCI_ECAM=y +CONFIG_PCI_IOV=y +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +CONFIG_PCI_LABEL=y +# CONFIG_HOTPLUG_PCI is not set + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT is not set +CONFIG_PCI_HISI=y +# CONFIG_PCIE_KIRIN is not set + +# +# PCI host controller drivers +# +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_XGENE=y +CONFIG_PCI_XGENE_MSI=y +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_832075=y +CONFIG_ARM64_ERRATUM_845719=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_CAVIUM_ERRATUM_22375=y +CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CAVIUM_ERRATUM_30115=y +CONFIG_QCOM_FALKOR_ERRATUM_1003=y +CONFIG_QCOM_FALKOR_ERRATUM_1009=y +CONFIG_QCOM_QDF2400_ERRATUM_0065=y +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SCHED_MC=y +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=64 +CONFIG_HOTPLUG_CPU=y +# CONFIG_NUMA is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_NO_BOOTMEM=y +CONFIG_MEMORY_ISOLATION=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_MIGRATION=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +# CONFIG_CLEANCACHE is not set +# CONFIG_FRONTSWAP is not set +CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_AREAS=7 +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_IDLE_PAGE_TRACKING is not set +# CONFIG_PERCPU_STATS is not set +CONFIG_SECCOMP=y +CONFIG_PARAVIRT=y +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +CONFIG_XEN_DOM0=y +CONFIG_XEN=y +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_ARMV8_DEPRECATED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_VHE=y + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +CONFIG_ARM64_MODULE_CMODEL_LARGE=y +# CONFIG_RANDOMIZE_BASE is not set + +# +# Boot options +# +# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set +CONFIG_CMDLINE="" +# CONFIG_CMDLINE_FORCE is not set +CONFIG_EFI_STUB=y +CONFIG_EFI=y +CONFIG_DMI=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_ELFCORE=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_SCRIPT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +CONFIG_COMPAT=y +CONFIG_SYSVIPC_COMPAT=y + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_OPP=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_CPU_PM=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_DT_IDLE_STATES=y + +# +# ARM CPU Idle Drivers +# +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_STAT is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set + +# +# CPU frequency scaling drivers +# +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_ARM_BIG_LITTLE_CPUFREQ=y +# CONFIG_ARM_DT_BL_CPUFREQ is not set +# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set +CONFIG_ARM_SCPI_CPUFREQ=y +# CONFIG_ACPI_CPPC_CPUFREQ is not set +# CONFIG_QORIQ_CPUFREQ is not set +CONFIG_NET=y +CONFIG_NET_INGRESS=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +CONFIG_NET_IP_TUNNEL=m +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_UDP_TUNNEL is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=m +# CONFIG_IPV6_SIT_6RD is not set +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_FOU is not set +# CONFIG_IPV6_FOU_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_INGRESS=y +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +CONFIG_NF_CONNTRACK=m +CONFIG_NF_LOG_COMMON=m +# CONFIG_NF_LOG_NETDEV is not set +# CONFIG_NF_CONNTRACK_MARK is not set +CONFIG_NF_CONNTRACK_PROCFS=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_SANE is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +# CONFIG_NF_CT_NETLINK is not set +# CONFIG_NF_CT_NETLINK_TIMEOUT is not set +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_PROTO_DCCP=y +CONFIG_NF_NAT_PROTO_UDPLITE=y +CONFIG_NF_NAT_PROTO_SCTP=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_REDIRECT is not set +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=m + +# +# Xtables combined modules +# +# CONFIG_NETFILTER_XT_MARK is not set +# CONFIG_NETFILTER_XT_CONNMARK is not set + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=m +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +CONFIG_NETFILTER_XT_NAT=m +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_HL is not set +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_SOCKET_IPV4 is not set +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +# CONFIG_IP_NF_TARGET_NETMAP is not set +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_SECURITY is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_CONNTRACK_IPV6=m +# CONFIG_NF_SOCKET_IPV6 is not set +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_LOG_IPV6=m +CONFIG_NF_NAT_IPV6=m +CONFIG_NF_NAT_MASQUERADE_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +# CONFIG_IP6_NF_MATCH_RPFILTER is not set +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_RAW is not set +# CONFIG_IP6_NF_SECURITY is not set +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +# CONFIG_IP6_NF_TARGET_NPT is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +# CONFIG_STREAM_PARSER is not set +CONFIG_WIRELESS=y +CONFIG_CFG80211=m +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +# CONFIG_CFG80211_INTERNAL_REGDB is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +# CONFIG_LIB80211 is not set +CONFIG_MAC80211=m +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_MINSTREL_HT=y +# CONFIG_MAC80211_RC_MINSTREL_VHT is not set +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +CONFIG_RFKILL=m +CONFIG_RFKILL_LEDS=y +CONFIG_RFKILL_INPUT=y +# CONFIG_RFKILL_GPIO is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_NET_DEVLINK is not set +CONFIG_MAY_USE_DEVLINK=y +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_SYS_HYPERVISOR=y +# CONFIG_GENERIC_CPU_DEVICES is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_SOC_BUS=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_SPI=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_IRQ=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_DMA_CMA=y + +# +# Default contiguous memory area size: +# +CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_ALIGNMENT=8 +CONFIG_GENERIC_ARCH_TOPOLOGY=y + +# +# Bus devices +# +# CONFIG_ARM_CCI400_PMU is not set +# CONFIG_ARM_CCI5xx_PMU is not set +# CONFIG_ARM_CCN is not set +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_SIMPLE_PM_BUS is not set +CONFIG_VEXPRESS_CONFIG=y +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# Partition parsers +# + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_SWAP is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_MT81xx_NOR is not set +CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_OF_OVERLAY is not set +# CONFIG_PARPORT is not set +CONFIG_PNP=y +CONFIG_PNP_DEBUG_MESSAGES=y + +# +# Protocols +# +CONFIG_PNPACPI=y +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_XEN_BLKDEV_FRONTEND=y +# CONFIG_XEN_BLKDEV_BACKEND is not set +CONFIG_VIRTIO_BLK=y +# CONFIG_VIRTIO_BLK_SCSI is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +# +# Misc devices +# +# CONFIG_SENSORS_LIS3LV02D is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +CONFIG_SRAM=y +CONFIG_VEXPRESS_SYSCFG=y +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +CONFIG_EEPROM_AT25=m +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# CONFIG_SENSORS_LIS3_I2C is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_CXL_AFU_DRIVER_OPS is not set +# CONFIG_CXL_LIB is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_MQ_DEFAULT is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_SAS_HOST_SMP=y +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_ISCSI_BOOT_SYSFS is not set +# CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_CXGB4_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set +# CONFIG_BE2ISCSI is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_HPSA is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_3W_SAS is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_MVUMI is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_SCSI_ESAS2R is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_MPT3SAS is not set +# CONFIG_SCSI_MPT2SAS is not set +# CONFIG_SCSI_SMARTPQI is not set +# CONFIG_SCSI_UFSHCD is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_XEN_SCSI_FRONTEND is not set +# CONFIG_SCSI_SNIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_PMCRAID is not set +# CONFIG_SCSI_PM8001 is not set +# CONFIG_SCSI_VIRTIO is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +CONFIG_HAVE_PATA_PLATFORM=y +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +CONFIG_NETDEVICES=y +CONFIG_MII=m +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_TUN is not set +# CONFIG_TUN_VNET_CROSS_LE is not set +# CONFIG_VETH is not set +# CONFIG_VIRTIO_NET is not set +# CONFIG_NLMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_EXAR is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_PACKET_ENGINE is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_NET_VENDOR_STMICRO=y +CONFIG_STMMAC_ETH=m +CONFIG_STMMAC_PLATFORM=m +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=m +CONFIG_DWMAC_MESON=m +# CONFIG_STMMAC_PCI is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_NET_SB1000 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_HISI_FEMAC is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +CONFIG_MESON_GXL_PHY=m +CONFIG_MICREL_PHY=y +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_QSEMI_PHY is not set +CONFIG_REALTEK_PHY=m +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_USB_NET_DRIVERS is not set +CONFIG_WLAN=y +CONFIG_WLAN_VENDOR_ADMTEK=y +# CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +# CONFIG_ATH10K is not set +# CONFIG_WCN36XX is not set +CONFIG_WLAN_VENDOR_ATMEL=y +# CONFIG_ATMEL is not set +# CONFIG_AT76C50X_USB is not set +CONFIG_WLAN_VENDOR_BROADCOM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +CONFIG_BRCMUTIL=m +# CONFIG_BRCMSMAC is not set +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +# CONFIG_BRCMFMAC_USB is not set +# CONFIG_BRCMFMAC_PCIE is not set +# CONFIG_BRCM_TRACING is not set +# CONFIG_BRCMDBG is not set +CONFIG_WLAN_VENDOR_CISCO=y +CONFIG_WLAN_VENDOR_INTEL=y +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_IWLWIFI is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +# CONFIG_HOSTAP is not set +# CONFIG_HERMES is not set +# CONFIG_P54_COMMON is not set +# CONFIG_PRISM54 is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +# CONFIG_MWL8K is not set +CONFIG_WLAN_VENDOR_MEDIATEK=y +# CONFIG_MT7601U is not set +CONFIG_WLAN_VENDOR_RALINK=y +# CONFIG_RT2X00 is not set +CONFIG_WLAN_VENDOR_REALTEK=y +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +CONFIG_RTL_CARDS=m +# CONFIG_RTL8192CE is not set +# CONFIG_RTL8192SE is not set +# CONFIG_RTL8192DE is not set +# CONFIG_RTL8723AE is not set +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8188EE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RTL8192CU is not set +# CONFIG_RTL8XXXU is not set +CONFIG_WLAN_VENDOR_RSI=y +# CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_ST=y +# CONFIG_CW1200 is not set +CONFIG_WLAN_VENDOR_TI=y +# CONFIG_WL1251 is not set +# CONFIG_WL12XX is not set +CONFIG_WL18XX=m +CONFIG_WLCORE=m +# CONFIG_WLCORE_SPI is not set +CONFIG_WLCORE_SDIO=m +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLAN_VENDOR_ZYDAS=y +# CONFIG_USB_ZD1201 is not set +# CONFIG_ZD1211RW is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PEARL_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_XEN_NETDEV_FRONTEND is not set +# CONFIG_XEN_NETDEV_BACKEND is not set +# CONFIG_VMXNET3 is not set +# CONFIG_FUJITSU_ES is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_LEDS=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADC is not set +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ADP5589 is not set +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_QT1070 is not set +# CONFIG_KEYBOARD_QT2160 is not set +# CONFIG_KEYBOARD_DLINK_DIR685 is not set +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_GPIO_POLLED is not set +# CONFIG_KEYBOARD_TCA6416 is not set +# CONFIG_KEYBOARD_TCA8418 is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_LM8323 is not set +# CONFIG_KEYBOARD_LM8333 is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_MCS is not set +# CONFIG_KEYBOARD_MPR121 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_SAMSUNG is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_OMAP4 is not set +# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CAP11XX is not set +# CONFIG_KEYBOARD_BCM is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_BYD=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y +CONFIG_MOUSE_PS2_CYPRESS=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_PS2_FOCALTECH=y +CONFIG_MOUSE_PS2_SMBUS=y +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_CYAPA is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set +# CONFIG_MOUSE_SYNAPTICS_USB is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_TILT_POLLED is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_REGULATOR_HAPTIC is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_PWM_BEEPER is not set +# CONFIG_INPUT_PWM_VIBRA is not set +# CONFIG_INPUT_RK805_PWRKEY is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_AMBAKMI=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_SERIO_PS2MULT is not set +# CONFIG_SERIO_ARC_PS2 is not set +# CONFIG_SERIO_APBPS2 is not set +# CONFIG_SERIO_GPIO_PS2 is not set +# CONFIG_USERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +CONFIG_DEVMEM=y + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_PNP=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_EXAR=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +# CONFIG_SERIAL_8250_MOXA is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_DEV_BUS is not set +CONFIG_HVC_DRIVER=y +CONFIG_HVC_IRQ=y +CONFIG_HVC_XEN=y +CONFIG_HVC_XEN_FRONTEND=y +# CONFIG_HVC_DCC is not set +CONFIG_VIRTIO_CONSOLE=y +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_HW_RANDOM_VIRTIO is not set +CONFIG_HW_RANDOM_MESON=m +CONFIG_HW_RANDOM_CAVIUM=m +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_RAW_DRIVER is not set +# CONFIG_HPET is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_XILLYBUS is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_ACPI_I2C_OPREGION=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +# CONFIG_I2C_MUX_GPIO is not set +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# ACPI drivers +# +# CONFIG_I2C_SCMI is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_DESIGNWARE_SLAVE is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_MESON=y +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +CONFIG_I2C_RK3X=y +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_STUB is not set +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_EEPROM is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +CONFIG_SPI_MESON_SPICC=m +CONFIG_SPI_MESON_SPIFC=m +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_PL022=y +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +CONFIG_SPMI=y +# CONFIG_HSI is not set +CONFIG_PPS=y +# CONFIG_PPS_DEBUG is not set + +# +# PPS clients support +# +# CONFIG_PPS_CLIENT_KTIMER is not set +# CONFIG_PPS_CLIENT_LDISC is not set +# CONFIG_PPS_CLIENT_GPIO is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +CONFIG_PTP_1588_CLOCK=y + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_PINCTRL=y + +# +# Pin controllers +# +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_PINMUX=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_SINGLE=y +# CONFIG_PINCTRL_SX150X is not set +CONFIG_PINCTRL_MAX77620=y +# CONFIG_PINCTRL_RK805 is not set +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_GPIO_ACPI=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_AMDPT is not set +CONFIG_GPIO_DWAPB=y +# CONFIG_GPIO_EXAR is not set +# CONFIG_GPIO_FTGPIO010 is not set +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_MOCKUP is not set +CONFIG_GPIO_PL061=y +# CONFIG_GPIO_SYSCON is not set +CONFIG_GPIO_XGENE=y +# CONFIG_GPIO_XILINX is not set + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_TPIC2810 is not set + +# +# MFD GPIO expanders +# +CONFIG_GPIO_MAX77620=y + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_RDC321X is not set + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set + +# +# USB GPIO expanders +# +# CONFIG_W1 is not set +# CONFIG_POWER_AVS is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_VEXPRESS=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_TEST_POWER is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_LEGO_EV3 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +CONFIG_BATTERY_BQ27XXX=y +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_MANAGER is not set +# CONFIG_CHARGER_LTC3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24190 is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IIO_HWMON is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VEXPRESS is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set + +# +# ACPI drivers +# +# CONFIG_SENSORS_ACPI_POWER is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +# CONFIG_CLOCK_THERMAL is not set +CONFIG_THERMAL_EMULATION=y +# CONFIG_MAX77620_THERMAL is not set +# CONFIG_QORIQ_THERMAL is not set + +# +# ACPI INT340X thermal drivers +# +# CONFIG_QCOM_SPMI_TEMP_ALARM is not set +# CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +# CONFIG_WATCHDOG_SYSFS is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_WDAT_WDT is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +# CONFIG_ARM_SBSA_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_MAX77620_WATCHDOG is not set +CONFIG_MESON_GXBB_WATCHDOG=m +CONFIG_MESON_WATCHDOG=m +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set +# CONFIG_XEN_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +CONFIG_MFD_MAX77620=y +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RTSX_USB is not set +# CONFIG_MFD_RC5T583 is not set +CONFIG_MFD_RK808=y +# CONFIG_MFD_RN5T618 is not set +CONFIG_MFD_SEC_CORE=y +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS68470 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +CONFIG_MFD_VEXPRESS_SYSREG=y +CONFIG_REGULATOR=y +# CONFIG_REGULATOR_DEBUG is not set +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_ACT8865 is not set +# CONFIG_REGULATOR_AD5398 is not set +# CONFIG_REGULATOR_ANATOP is not set +# CONFIG_REGULATOR_DA9210 is not set +# CONFIG_REGULATOR_DA9211 is not set +# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_ISL9305 is not set +# CONFIG_REGULATOR_ISL6271A is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_LP3972 is not set +# CONFIG_REGULATOR_LP872X is not set +# CONFIG_REGULATOR_LP8755 is not set +# CONFIG_REGULATOR_LTC3589 is not set +# CONFIG_REGULATOR_LTC3676 is not set +# CONFIG_REGULATOR_MAX1586 is not set +CONFIG_REGULATOR_MAX77620=y +# CONFIG_REGULATOR_MAX8649 is not set +# CONFIG_REGULATOR_MAX8660 is not set +# CONFIG_REGULATOR_MAX8952 is not set +# CONFIG_REGULATOR_MAX8973 is not set +# CONFIG_REGULATOR_MT6311 is not set +# CONFIG_REGULATOR_PFUZE100 is not set +# CONFIG_REGULATOR_PV88060 is not set +# CONFIG_REGULATOR_PV88080 is not set +# CONFIG_REGULATOR_PV88090 is not set +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_RK808=y +# CONFIG_REGULATOR_S2MPA01 is not set +CONFIG_REGULATOR_S2MPS11=y +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_TPS51632 is not set +# CONFIG_REGULATOR_TPS62360 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +# CONFIG_REGULATOR_TPS65132 is not set +# CONFIG_REGULATOR_TPS6524X is not set +# CONFIG_REGULATOR_VCTRL is not set +# CONFIG_REGULATOR_VEXPRESS is not set +CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y +# CONFIG_RC_CORE is not set +CONFIG_MEDIA_SUPPORT=m + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# +# CONFIG_MEDIA_USB_SUPPORT is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +CONFIG_CEC_PLATFORM_DRIVERS=y +CONFIG_VIDEO_MESON_AO_CEC=m + +# +# Supported MMC/SDIO adapters +# +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# + +# +# Customise DVB Frontends +# + +# +# Tools to develop new frontends +# + +# +# Graphics support +# +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 +CONFIG_DRM=m +CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DP_AUX_CHARDEV is not set +# CONFIG_DRM_DEBUG_MM_SELFTEST is not set +CONFIG_DRM_KMS_HELPER=m +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y + +# +# I2C encoder or helper chips +# +CONFIG_DRM_I2C_CH7006=m +CONFIG_DRM_I2C_SIL164=m +# CONFIG_DRM_I2C_NXP_TDA998X is not set +# CONFIG_DRM_HDLCD is not set +# CONFIG_DRM_MALI_DISPLAY is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_AMDGPU is not set + +# +# ACP (Audio CoProcessor) Configuration +# +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_DRM_RCAR_DW_HDMI is not set +# CONFIG_DRM_QXL is not set +# CONFIG_DRM_BOCHS is not set +# CONFIG_DRM_VIRTIO_GPU is not set +CONFIG_DRM_PANEL=y + +# +# Display Panels +# +# CONFIG_DRM_PANEL_LVDS is not set +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set +# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set +# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_PANEL_BRIDGE=y + +# +# Display Interface Bridges +# +# CONFIG_DRM_ANALOGIX_ANX78XX is not set +# CONFIG_DRM_DUMB_VGA_DAC is not set +# CONFIG_DRM_LVDS_ENCODER is not set +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set +# CONFIG_DRM_NXP_PTN3460 is not set +# CONFIG_DRM_PARADE_PS8622 is not set +# CONFIG_DRM_SIL_SII8620 is not set +# CONFIG_DRM_SII902X is not set +# CONFIG_DRM_TOSHIBA_TC358767 is not set +# CONFIG_DRM_TI_TFP410 is not set +CONFIG_DRM_I2C_ADV7511=m +CONFIG_DRM_I2C_ADV7533=y +CONFIG_DRM_DW_HDMI=m +# CONFIG_DRM_DW_HDMI_CEC is not set +# CONFIG_DRM_ARCPGU is not set +# CONFIG_DRM_HISI_HIBMC is not set +# CONFIG_DRM_HISI_KIRIN is not set +# CONFIG_DRM_MXSFB is not set +CONFIG_DRM_MESON=m +CONFIG_DRM_MESON_DW_HDMI=m +# CONFIG_DRM_TINYDRM is not set +# CONFIG_DRM_PL111 is not set +# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_LIB_RANDOM is not set + +# +# Frame buffer Devices +# +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=m +CONFIG_FB_CFB_COPYAREA=m +CONFIG_FB_CFB_IMAGEBLIT=m +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +CONFIG_FB_SYS_FILLRECT=m +CONFIG_FB_SYS_COPYAREA=m +CONFIG_FB_SYS_IMAGEBLIT=m +# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=m +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_EFI is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_XEN_FBDEV_FRONTEND is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +# CONFIG_LCD_L4F00242T03 is not set +# CONFIG_LCD_LMS283GF05 is not set +# CONFIG_LCD_LTV350QV is not set +# CONFIG_LCD_ILI922X is not set +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_S6E63M0 is not set +# CONFIG_LCD_LD9040 is not set +# CONFIG_LCD_AMS369FG06 is not set +# CONFIG_LCD_LMS501KF03 is not set +# CONFIG_LCD_HX8357 is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=m +# CONFIG_BACKLIGHT_PWM is not set +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3630A is not set +# CONFIG_BACKLIGHT_LM3639 is not set +CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_HDMI=y + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_SOUND is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +CONFIG_HID_GENERIC=y + +# +# Special HID drivers +# +CONFIG_HID_A4TECH=y +# CONFIG_HID_ACCUTOUCH is not set +# CONFIG_HID_ACRUX is not set +CONFIG_HID_APPLE=y +# CONFIG_HID_APPLEIR is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +CONFIG_HID_BELKIN=y +# CONFIG_HID_BETOP_FF is not set +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_CMEDIA is not set +CONFIG_HID_CYPRESS=y +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_ELO is not set +CONFIG_HID_EZKEY=y +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_UCLOGIC is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +CONFIG_HID_ITE=y +# CONFIG_HID_TWINHAN is not set +CONFIG_HID_KENSINGTON=y +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGIG940_FF is not set +# CONFIG_LOGIWHEELS_FF is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MAYFLASH is not set +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_NTRIG is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_RETRODE is not set +# CONFIG_HID_ROCCAT is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SONY is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WACOM is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set + +# +# USB HID support +# +CONFIG_USB_HID=y +# CONFIG_HID_PID is not set +# CONFIG_USB_HIDDEV is not set + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +CONFIG_USB_PCI=y +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_OTG_FSM is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +# CONFIG_USB_MON is not set +# CONFIG_USB_WUSB_CBAF is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_DUAL_ROLE=y + +# +# Platform Glue Driver Support +# +# CONFIG_USB_DWC3_PCI is not set +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_DWC2=y +# CONFIG_USB_DWC2_HOST is not set + +# +# Gadget/Dual-role mode requires USB Gadget support to be enabled +# +# CONFIG_USB_DWC2_PERIPHERAL is not set +CONFIG_USB_DWC2_DUAL_ROLE=y +# CONFIG_USB_DWC2_PCI is not set +# CONFIG_USB_DWC2_DEBUG is not set +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_OF=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_ISP1761_UDC=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_DUAL_ROLE=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +CONFIG_USB_HSIC_USB3503=y +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_USB_PHY is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 + +# +# USB Peripheral Controller +# +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_GR_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +# CONFIG_USB_M66592 is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_DUMMY_HCD is not set +# CONFIG_USB_CONFIGFS is not set + +# +# USB Power Delivery and Type-C drivers +# +# CONFIG_TYPEC_UCSI is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_UWB is not set +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=y +CONFIG_PWRSEQ_SIMPLE=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_ACPI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +CONFIG_MMC_MESON_GX=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_CAVIUM_THUNDERX is not set +CONFIG_MMC_DW=y +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_DW_EXYNOS=y +CONFIG_MMC_DW_K3=y +# CONFIG_MMC_DW_PCI is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +# CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_REGULATOR is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +CONFIG_LEDS_SYSCON=y +# CONFIG_LEDS_USER is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +CONFIG_LEDS_TRIGGER_CPU=y +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_SYSTOHC=y +CONFIG_RTC_SYSTOHC_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set +CONFIG_RTC_NVMEM=y + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_HYM8563 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RK808=m +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_ISL12022 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8523 is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_BQ32K is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set +# CONFIG_RTC_DRV_EM3027 is not set +# CONFIG_RTC_DRV_RV8803 is not set +CONFIG_RTC_DRV_S5M=y + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T93 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1302 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6916 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RX4581 is not set +# CONFIG_RTC_DRV_RX6110 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_PCF2123 is not set +# CONFIG_RTC_DRV_MCP795 is not set +CONFIG_RTC_I2C_AND_SPI=y + +# +# SPI and I2C RTC drivers +# +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS3232_HWMON=y +# CONFIG_RTC_DRV_PCF2127 is not set +# CONFIG_RTC_DRV_RV3029C2 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS2404 is not set +CONFIG_RTC_DRV_EFI=y +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_MSM6242 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_RP5C01 is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_ZYNQMP is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PL030 is not set +CONFIG_RTC_DRV_PL031=y +# CONFIG_RTC_DRV_FTRTC010 is not set +# CONFIG_RTC_DRV_SNVS is not set +# CONFIG_RTC_DRV_R7301 is not set + +# +# HID Sensor RTC drivers +# +# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set + +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_ACPI=y +CONFIG_DMA_OF=y +# CONFIG_ALTERA_MSGDMA is not set +# CONFIG_AMBA_PL08X is not set +# CONFIG_FSL_EDMA is not set +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_MV_XOR_V2 is not set +# CONFIG_PL330_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_ZYNQMP_DMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set + +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set + +# +# DMABUF options +# +CONFIG_SYNC_FILE=y +# CONFIG_SW_SYNC is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VFIO is not set +# CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO=y + +# +# Virtio drivers +# +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_INPUT is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_HYPERV_TSCPAGE is not set + +# +# Xen driver support +# +CONFIG_XEN_BALLOON=y +CONFIG_XEN_SCRUB_PAGES=y +CONFIG_XEN_DEV_EVTCHN=y +CONFIG_XEN_BACKEND=y +CONFIG_XENFS=y +CONFIG_XEN_COMPAT_XENFS=y +CONFIG_XEN_SYS_HYPERVISOR=y +CONFIG_XEN_XENBUS_FRONTEND=y +CONFIG_XEN_GNTDEV=y +CONFIG_XEN_GRANT_DEV_ALLOC=y +CONFIG_SWIOTLB_XEN=y +# CONFIG_XEN_PVCALLS_BACKEND is not set +CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_EFI=y +CONFIG_XEN_AUTO_XLATE=y +CONFIG_STAGING=y +# CONFIG_IRDA is not set +# CONFIG_PRISM2_USB is not set +# CONFIG_COMEDI is not set +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set +# CONFIG_RTL8723BS is not set +# CONFIG_R8712U is not set +# CONFIG_R8188EU is not set +# CONFIG_R8822BE is not set +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set + +# +# IIO staging drivers +# + +# +# Accelerometers +# +# CONFIG_ADIS16201 is not set +# CONFIG_ADIS16203 is not set +# CONFIG_ADIS16209 is not set +# CONFIG_ADIS16240 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7606 is not set +# CONFIG_AD7780 is not set +# CONFIG_AD7816 is not set +# CONFIG_AD7192 is not set +# CONFIG_AD7280 is not set + +# +# Analog digital bi-direction converters +# +# CONFIG_ADT7316 is not set + +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7152 is not set +# CONFIG_AD7746 is not set + +# +# Direct Digital Synthesis +# +# CONFIG_AD9832 is not set +# CONFIG_AD9834 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16060 is not set + +# +# Network Analyzer, Impedance Converters +# +# CONFIG_AD5933 is not set + +# +# Light sensors +# +# CONFIG_TSL2x7x is not set + +# +# Active energy metering IC +# +# CONFIG_ADE7753 is not set +# CONFIG_ADE7754 is not set +# CONFIG_ADE7758 is not set +# CONFIG_ADE7759 is not set +# CONFIG_ADE7854 is not set + +# +# Resolver to digital converters +# +# CONFIG_AD2S90 is not set +# CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set + +# +# Triggers - standalone +# +# CONFIG_FB_SM750 is not set +# CONFIG_FB_XGI is not set + +# +# Speakup console speech +# +# CONFIG_SPEAKUP is not set +# CONFIG_STAGING_MEDIA is not set + +# +# Android +# +# CONFIG_STAGING_BOARD is not set +# CONFIG_LTE_GDM724X is not set +# CONFIG_LNET is not set +# CONFIG_DGNC is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set +# CONFIG_FB_TFT is not set +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +# CONFIG_MOST is not set +# CONFIG_KS7010 is not set +# CONFIG_GREYBUS is not set +# CONFIG_CRYPTO_DEV_CCREE is not set + +# +# USB Power Delivery and Type-C drivers +# +# CONFIG_TYPEC_TCPM is not set +# CONFIG_PI433 is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_VERSATILE=y +CONFIG_CLK_SP810=y +CONFIG_CLK_VEXPRESS_OSC=y +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX77686 is not set +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_SCPI=y +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_CLK_QORIQ=y +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_NXP is not set +CONFIG_COMMON_CLK_PWM=y +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_PIC32 is not set +# CONFIG_COMMON_CLK_VC5 is not set +CONFIG_COMMON_CLK_AMLOGIC=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_HWSPINLOCK=y + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_ACPI=y +CONFIG_TIMER_PROBE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM_TIMER_SP804=y +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +CONFIG_CLKSRC_VERSATILE=y +CONFIG_MAILBOX=y +CONFIG_ARM_MHU=y +CONFIG_PLATFORM_MHU=y +# CONFIG_PL320_MBOX is not set +# CONFIG_PCC is not set +# CONFIG_ALTERA_MBOX is not set +# CONFIG_MAILBOX_TEST is not set +# CONFIG_BCM_FLEXRM_MBOX is not set +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IO_PGTABLE=y +CONFIG_IOMMU_IO_PGTABLE_LPAE=y +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +CONFIG_IOMMU_IOVA=y +CONFIG_OF_IOMMU=y +CONFIG_IOMMU_DMA=y +CONFIG_ARM_SMMU=y +# CONFIG_ARM_SMMU_V3 is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_QCOM_GLINK_RPM is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +CONFIG_MESON_GX_SOCINFO=y + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set + +# +# i.MX SoC drivers +# + +# +# Qualcomm SoC drivers +# +# CONFIG_SUNXI_SRAM is not set +# CONFIG_SOC_TI is not set +# CONFIG_PM_DEVFREQ is not set +CONFIG_EXTCON=y + +# +# Extcon Device Drivers +# +# CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_GPIO is not set +# CONFIG_EXTCON_MAX3355 is not set +# CONFIG_EXTCON_RT8973A is not set +# CONFIG_EXTCON_SM5502 is not set +CONFIG_EXTCON_USB_GPIO=y +# CONFIG_MEMORY is not set +CONFIG_IIO=y +# CONFIG_IIO_BUFFER is not set +# CONFIG_IIO_CONFIGFS is not set +# CONFIG_IIO_TRIGGER is not set +# CONFIG_IIO_SW_DEVICE is not set +# CONFIG_IIO_SW_TRIGGER is not set + +# +# Accelerometers +# +# CONFIG_ADXL345_I2C is not set +# CONFIG_ADXL345_SPI is not set +# CONFIG_BMA180 is not set +# CONFIG_BMA220 is not set +# CONFIG_BMC150_ACCEL is not set +# CONFIG_DA280 is not set +# CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set +# CONFIG_DMARD09 is not set +# CONFIG_DMARD10 is not set +# CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_KXSD9 is not set +# CONFIG_KXCJK1013 is not set +# CONFIG_MC3230 is not set +# CONFIG_MMA7455_I2C is not set +# CONFIG_MMA7455_SPI is not set +# CONFIG_MMA7660 is not set +# CONFIG_MMA8452 is not set +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_SCA3000 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set + +# +# Analog to digital converters +# +# CONFIG_AD7266 is not set +# CONFIG_AD7291 is not set +# CONFIG_AD7298 is not set +# CONFIG_AD7476 is not set +# CONFIG_AD7766 is not set +# CONFIG_AD7791 is not set +# CONFIG_AD7793 is not set +# CONFIG_AD7887 is not set +# CONFIG_AD7923 is not set +# CONFIG_AD799X is not set +# CONFIG_CC10001_ADC is not set +# CONFIG_ENVELOPE_DETECTOR is not set +# CONFIG_HI8435 is not set +# CONFIG_HX711 is not set +# CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2471 is not set +# CONFIG_LTC2485 is not set +# CONFIG_LTC2497 is not set +# CONFIG_MAX1027 is not set +# CONFIG_MAX11100 is not set +# CONFIG_MAX1118 is not set +# CONFIG_MAX1363 is not set +# CONFIG_MAX9611 is not set +# CONFIG_MCP320X is not set +# CONFIG_MCP3422 is not set +CONFIG_MESON_SARADC=y +# CONFIG_NAU7802 is not set +# CONFIG_QCOM_SPMI_IADC is not set +# CONFIG_QCOM_SPMI_VADC is not set +# CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADC084S021 is not set +# CONFIG_TI_ADC12138 is not set +# CONFIG_TI_ADC108S102 is not set +# CONFIG_TI_ADC128S052 is not set +# CONFIG_TI_ADC161S626 is not set +# CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_TLC4541 is not set +# CONFIG_VF610_ADC is not set + +# +# Amplifiers +# +# CONFIG_AD8366 is not set + +# +# Chemical Sensors +# +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_CCS811 is not set +# CONFIG_IAQCORE is not set +# CONFIG_VZ89X is not set + +# +# Hid Sensor IIO Common +# + +# +# SSP Sensor Common +# +# CONFIG_IIO_SSP_SENSORHUB is not set + +# +# Counters +# + +# +# Digital to analog converters +# +# CONFIG_AD5064 is not set +# CONFIG_AD5360 is not set +# CONFIG_AD5380 is not set +# CONFIG_AD5421 is not set +# CONFIG_AD5446 is not set +# CONFIG_AD5449 is not set +# CONFIG_AD5592R is not set +# CONFIG_AD5593R is not set +# CONFIG_AD5504 is not set +# CONFIG_AD5624R_SPI is not set +# CONFIG_LTC2632 is not set +# CONFIG_AD5686 is not set +# CONFIG_AD5755 is not set +# CONFIG_AD5761 is not set +# CONFIG_AD5764 is not set +# CONFIG_AD5791 is not set +# CONFIG_AD7303 is not set +# CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set +# CONFIG_M62332 is not set +# CONFIG_MAX517 is not set +# CONFIG_MAX5821 is not set +# CONFIG_MCP4725 is not set +# CONFIG_MCP4922 is not set +# CONFIG_VF610_DAC is not set + +# +# IIO dummy driver +# + +# +# Frequency Synthesizers DDS/PLL +# + +# +# Clock Generator/Distribution +# +# CONFIG_AD9523 is not set + +# +# Phase-Locked Loop (PLL) frequency synthesizers +# +# CONFIG_ADF4350 is not set + +# +# Digital gyroscope sensors +# +# CONFIG_ADIS16080 is not set +# CONFIG_ADIS16130 is not set +# CONFIG_ADIS16136 is not set +# CONFIG_ADIS16260 is not set +# CONFIG_ADXRS450 is not set +# CONFIG_BMG160 is not set +# CONFIG_MPU3050_I2C is not set +# CONFIG_IIO_ST_GYRO_3AXIS is not set +# CONFIG_ITG3200 is not set + +# +# Health Sensors +# + +# +# Heart Rate Monitors +# +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set + +# +# Humidity sensors +# +# CONFIG_AM2315 is not set +# CONFIG_DHT11 is not set +# CONFIG_HDC100X is not set +# CONFIG_HTS221 is not set +# CONFIG_HTU21 is not set +# CONFIG_SI7005 is not set +# CONFIG_SI7020 is not set + +# +# Inertial measurement units +# +# CONFIG_ADIS16400 is not set +# CONFIG_ADIS16480 is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_BMI160_SPI is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_IIO_ST_LSM6DSX is not set + +# +# Light sensors +# +# CONFIG_ACPI_ALS is not set +# CONFIG_ADJD_S311 is not set +# CONFIG_AL3320A is not set +# CONFIG_APDS9300 is not set +# CONFIG_APDS9960 is not set +# CONFIG_BH1750 is not set +# CONFIG_BH1780 is not set +# CONFIG_CM32181 is not set +# CONFIG_CM3232 is not set +# CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set +# CONFIG_CM36651 is not set +# CONFIG_GP2AP020A00F is not set +# CONFIG_SENSORS_ISL29018 is not set +# CONFIG_SENSORS_ISL29028 is not set +# CONFIG_ISL29125 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set +# CONFIG_LTR501 is not set +# CONFIG_MAX44000 is not set +# CONFIG_OPT3001 is not set +# CONFIG_PA12203001 is not set +# CONFIG_SI1145 is not set +# CONFIG_STK3310 is not set +# CONFIG_TCS3414 is not set +# CONFIG_TCS3472 is not set +# CONFIG_SENSORS_TSL2563 is not set +# CONFIG_TSL2583 is not set +# CONFIG_TSL4531 is not set +# CONFIG_US5182D is not set +# CONFIG_VCNL4000 is not set +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set + +# +# Magnetometer sensors +# +# CONFIG_AK8974 is not set +# CONFIG_AK8975 is not set +# CONFIG_AK09911 is not set +# CONFIG_BMC150_MAGN_I2C is not set +# CONFIG_BMC150_MAGN_SPI is not set +# CONFIG_MAG3110 is not set +# CONFIG_MMC35240 is not set +# CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_SENSORS_HMC5843_I2C is not set +# CONFIG_SENSORS_HMC5843_SPI is not set + +# +# Multiplexers +# +# CONFIG_IIO_MUX is not set + +# +# Inclinometer sensors +# + +# +# Digital potentiometers +# +# CONFIG_DS1803 is not set +# CONFIG_MAX5481 is not set +# CONFIG_MAX5487 is not set +# CONFIG_MCP4131 is not set +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set + +# +# Digital potentiostats +# +# CONFIG_LMP91000 is not set + +# +# Pressure sensors +# +# CONFIG_ABP060MG is not set +# CONFIG_BMP280 is not set +# CONFIG_HP03 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_MPL3115 is not set +# CONFIG_MS5611 is not set +# CONFIG_MS5637 is not set +# CONFIG_IIO_ST_PRESS is not set +# CONFIG_T5403 is not set +# CONFIG_HP206C is not set +# CONFIG_ZPA2326 is not set + +# +# Lightning sensors +# +# CONFIG_AS3935 is not set + +# +# Proximity and distance sensors +# +# CONFIG_LIDAR_LITE_V2 is not set +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set +# CONFIG_SRF08 is not set + +# +# Temperature sensors +# +# CONFIG_MAXIM_THERMOCOUPLE is not set +# CONFIG_MLX90614 is not set +# CONFIG_TMP006 is not set +# CONFIG_TMP007 is not set +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_MESON=m +# CONFIG_PWM_PCA9685 is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_PARTITION_PERCPU=y +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_ATH79 is not set +# CONFIG_RESET_BERLIN is not set +# CONFIG_RESET_IMX7 is not set +# CONFIG_RESET_LANTIQ is not set +# CONFIG_RESET_LPC18XX is not set +CONFIG_RESET_MESON=y +# CONFIG_RESET_PISTACHIO is not set +# CONFIG_RESET_SOCFPGA is not set +# CONFIG_RESET_STM32 is not set +# CONFIG_RESET_SUNXI is not set +# CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_ZYNQ is not set +# CONFIG_RESET_TEGRA_BPMP is not set +# CONFIG_FMC is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +CONFIG_PHY_XGENE=y +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_GXL_USB2=y +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_CPCAP_USB is not set +CONFIG_PHY_SAMSUNG_USB2=y +# CONFIG_PHY_EXYNOS4210_USB2 is not set +# CONFIG_PHY_EXYNOS4X12_USB2 is not set +# CONFIG_PHY_EXYNOS5250_USB2 is not set +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +CONFIG_ARM_PMU=y +CONFIG_ARM_PMU_ACPI=y +CONFIG_RAS=y + +# +# Android +# +# CONFIG_ANDROID is not set +# CONFIG_LIBNVDIMM is not set +# CONFIG_DAX is not set +CONFIG_NVMEM=y +# CONFIG_MESON_EFUSE is not set +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# CONFIG_FPGA is not set + +# +# FSI support +# +# CONFIG_FSI is not set +# CONFIG_TEE is not set + +# +# Firmware Drivers +# +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_PSCI_CHECKER is not set +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +# CONFIG_FIRMWARE_MEMMAP is not set +CONFIG_DMIID=y +# CONFIG_DMI_SYSFS is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_ESRT=y +CONFIG_EFI_PARAMS_FROM_FDT=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +CONFIG_EFI_ARMSTUB=y +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_DEV_PATH_PARSER is not set +CONFIG_MESON_SM=y + +# +# Tegra firmware driver +# +CONFIG_ACPI=y +CONFIG_ACPI_GENERIC_GSI=y +CONFIG_ACPI_CCA_REQUIRED=y +# CONFIG_ACPI_DEBUGGER is not set +CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_EC_DEBUGFS is not set +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_PROCESSOR_IDLE=y +CONFIG_ACPI_MCFG=y +CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y +CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ACPI_TABLE_UPGRADE=y +# CONFIG_ACPI_DEBUG is not set +# CONFIG_ACPI_PCI_SLOT is not set +CONFIG_ACPI_CONTAINER=y +# CONFIG_ACPI_HED is not set +# CONFIG_ACPI_CUSTOM_METHOD is not set +# CONFIG_ACPI_BGRT is not set +CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y +CONFIG_HAVE_ACPI_APEI=y +# CONFIG_ACPI_APEI is not set +# CONFIG_PMIC_OPREGION is not set +# CONFIG_ACPI_CONFIGFS is not set +CONFIG_ACPI_IORT=y +CONFIG_ACPI_GTDT=y + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT2=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_ENCRYPTION is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +# CONFIG_PRINT_QUOTA_WARNING is not set +# CONFIG_QUOTA_DEBUG is not set +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +# CONFIG_OVERLAY_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_VIRTUALIZATION is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_PAGE_OWNER is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_PAGE_EXTENSION is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_RODATA_TEST is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_ARCH_HAS_KCOV=y +# CONFIG_KCOV is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_DEBUG_PREEMPT is not set + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_STACKTRACE is not set +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PI_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_DMA_API_DEBUG is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_TEST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set +# CONFIG_TEST_UUID is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_HASH is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_USER_COPY is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_SYSCTL is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_KMOD is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_ARCH_WANTS_UBSAN_NO_NULL is not set +# CONFIG_UBSAN is not set +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_CORE is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_DEBUG_EFI is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y +# CONFIG_PERSISTENT_KEYRINGS is not set +# CONFIG_BIG_KEYS is not set +# CONFIG_ENCRYPTED_KEYS is not set +# CONFIG_KEY_DH_OPERATIONS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY=y +# CONFIG_SECURITY_WRITABLE_HOOKS is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_NETWORK is not set +# CONFIG_SECURITY_PATH is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +# CONFIG_SECURITY_SMACK is not set +# CONFIG_SECURITY_TOMOYO is not set +# CONFIG_SECURITY_APPARMOR is not set +# CONFIG_SECURITY_LOADPIN is not set +# CONFIG_SECURITY_YAMA is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +CONFIG_INTEGRITY_AUDIT=y +# CONFIG_IMA is not set +# CONFIG_EVM is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_ACOMP2=y +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECDH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CRYPTO_CRYPTD=y +# CONFIG_CRYPTO_MCRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ENGINE=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set +# CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set +CONFIG_CRYPTO_DEV_VIRTIO=m +# CONFIG_ASYMMETRIC_KEY_TYPE is not set + +# +# Certificates for signature checking +# +# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA256_ARM64=y +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +# CONFIG_CRYPTO_CRC32_ARM64_CE is not set +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_CHACHA20_NEON is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_RATIONAL=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC4 is not set +CONFIG_CRC7=y +CONFIG_LIBCRC32C=m +# CONFIG_CRC8 is not set +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=y +CONFIG_XZ_DEC=y +CONFIG_XZ_DEC_X86=y +CONFIG_XZ_DEC_POWERPC=y +CONFIG_XZ_DEC_IA64=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_LZ4=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_RADIX_TREE_MULTIORDER=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_UCS2_STRING=y +CONFIG_FONT_SUPPORT=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_SG_SPLIT is not set +CONFIG_SG_POOL=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set diff --git a/buildroot-external/board/hardkernel/odroid-c2/meta b/buildroot-external/board/hardkernel/odroid-c2/meta new file mode 100644 index 000000000..ccb76c12b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/meta @@ -0,0 +1,7 @@ +BOARD_ID=odroid-c2 +BOARD_NAME="Hardkernel Odroid-C2" +CHASSIS=embedded +BOOTLOADER=uboot +KERNEL_FILE=Image +BOOT_SYS=mbr +BOOT_ENV_SIZE=0x2000 diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/README b/buildroot-external/board/hardkernel/odroid-c2/patches/README new file mode 100644 index 000000000..2921b8a94 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/README @@ -0,0 +1,2 @@ +kernel patches from +https://github.com/superna9999/meta-meson/tree/sumo/recipes-kernel/linux/linux-yocto-meson64-4.14 diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0001-ARM64-dts-meson-gxm-Add-support-for-Khadas-VIM2.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0001-ARM64-dts-meson-gxm-Add-support-for-Khadas-VIM2.patch new file mode 100644 index 000000000..243c10296 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0001-ARM64-dts-meson-gxm-Add-support-for-Khadas-VIM2.patch @@ -0,0 +1,455 @@ +From f802405c9aba2fb198d55fc010e7336f155c2713 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 2 Aug 2017 16:11:23 +0200 +Subject: [PATCH 01/39] ARM64: dts: meson-gxm: Add support for Khadas VIM2 + +The Khadas VIM2 is a Single Board Computer, respin of the origin +Khadas VIM board, using an Amlogic S912 SoC and more server oriented. + +It provides the same external connectors and header pinout, plus a SPI +NOR Flash, a reprogrammable STM8S003 MCU, FPC Connector, Cooling FAN header +and Pogo Pads Arrays. + +Cc: Gouwa +Acked-by: Martin Blumenstingl +Acked-by: Rob Herring +Signed-off-by: Neil Armstrong +--- + Documentation/devicetree/bindings/arm/amlogic.txt | 1 + + arch/arm64/boot/dts/amlogic/Makefile | 1 + + .../boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 399 +++++++++++++++++++++ + 3 files changed, 401 insertions(+) + create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts + +diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt +index 4e4bc0b..a445997 100644 +--- a/Documentation/devicetree/bindings/arm/amlogic.txt ++++ b/Documentation/devicetree/bindings/arm/amlogic.txt +@@ -71,6 +71,7 @@ Board compatible values (alphabetically, grouped by SoC): + + - "amlogic,q200" (Meson gxm s912) + - "amlogic,q201" (Meson gxm s912) ++ - "khadas,vim2" (Meson gxm s912) + - "kingnovel,r-box-pro" (Meson gxm S912) + - "nexbox,a1" (Meson gxm s912) + +diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile +index 543416b..747bcc3 100644 +--- a/arch/arm64/boot/dts/amlogic/Makefile ++++ b/arch/arm64/boot/dts/amlogic/Makefile +@@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb ++dtb-$(CONFIG_ARCH_MESON) += meson-gxm-khadas-vim2.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-nexbox-a1.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb + dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +new file mode 100644 +index 0000000..32c138e +--- /dev/null ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -0,0 +1,399 @@ ++/* ++ * Copyright (c) 2017 Martin Blumenstingl . ++ * Copyright (c) 2017 BayLibre, SAS ++ * Author: Neil Armstrong ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++ ++#include "meson-gxm.dtsi" ++ ++/ { ++ compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; ++ model = "Khadas VIM2"; ++ ++ aliases { ++ serial0 = &uart_AO; ++ serial1 = &uart_A; ++ serial2 = &uart_AO_B; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1710000>; ++ ++ button-function { ++ label = "Function"; ++ linux,code = ; ++ press-threshold-microvolt = <10000>; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; ++ }; ++ ++ gpio_fan: gpio-fan { ++ compatible = "gpio-fan"; ++ gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH ++ &gpio GPIODV_15 GPIO_ACTIVE_HIGH>; ++ /* Dummy RPM values since fan is optional */ ++ gpio-fan,speed-map = <0 0 ++ 1 1 ++ 2 2 ++ 3 3>; ++ cooling-min-level = <0>; ++ cooling-max-level = <3>; ++ #cooling-cells = <2>; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ poll-interval = <100>; ++ ++ button@0 { ++ label = "power"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ pwmleds { ++ compatible = "pwm-leds"; ++ ++ power { ++ label = "vim:red:power"; ++ pwms = <&pwm_AO_ab 1 7812500 0>; ++ max-brightness = <255>; ++ linux,default-trigger = "default-on"; ++ }; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; ++ }; ++ ++ thermal-zones { ++ cpu-thermal { ++ polling-delay-passive = <250>; /* milliseconds */ ++ polling-delay = <1000>; /* milliseconds */ ++ ++ thermal-sensors = <&scpi_sensors 0>; ++ ++ trips { ++ cpu_alert0: cpu-alert0 { ++ temperature = <70000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "active"; ++ }; ++ ++ cpu_alert1: cpu-alert1 { ++ temperature = <80000>; /* millicelsius */ ++ hysteresis = <2000>; /* millicelsius */ ++ type = "passive"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; ++ }; ++ ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>; ++ }; ++ ++ map2 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ map3 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vddio_ao18: regulator-vddio_ao18 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_AO18"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddio_boot: regulator-vddio_boot { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDIO_BOOT"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; ++}; ++ ++&cec_AO { ++ status = "okay"; ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; ++}; ++ ++&cpu0 { ++ cooling-min-level = <0>; ++ cooling-max-level = <6>; ++ #cooling-cells = <2>; ++}; ++ ++&cpu4 { ++ cooling-min-level = <0>; ++ cooling-max-level = <4>; ++ #cooling-cells = <2>; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>; ++ pinctrl-names = "default"; ++ ++ /* Select external PHY by default */ ++ phy-handle = <&external_phy>; ++ ++ amlogic,tx-delay-ns = <2>; ++ ++ /* External PHY reset is shared with internal PHY Led signals */ ++ snps,reset-gpio = <&gpio GPIOZ_14 0>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++ ++ /* External PHY is in RGMII */ ++ phy-mode = "rgmii"; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ }; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&i2c_A { ++ status = "okay"; ++ pinctrl-0 = <&i2c_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&i2c_B { ++ status = "okay"; ++ pinctrl-0 = <&i2c_b_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ /* has to be enabled manually when a battery is connected: */ ++ status = "disabled"; ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++ linux,rc-map-name = "rc-geekbox"; ++}; ++ ++&pwm_AO_ab { ++ status = "okay"; ++ pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ ++&pwm_ef { ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>; ++ pinctrl-names = "default"; ++ clocks = <&clkc CLKID_FCLK_DIV4>; ++ clock-names = "clkin0"; ++}; ++ ++&sd_emmc_a { ++ status = "okay"; ++ pinctrl-0 = <&sdio_pins>; ++ pinctrl-names = "default"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ bus-width = <4>; ++ max-frequency = <100000000>; ++ ++ non-removable; ++ disable-wp; ++ ++ mmc-pwrseq = <&sdio_pwrseq>; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_pins>; ++ pinctrl-names = "default"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <100000000>; ++ disable-wp; ++ ++ cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++ ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; ++ pinctrl-names = "default"; ++ ++ bus-width = <8>; ++ cap-sd-highspeed; ++ cap-mmc-highspeed; ++ max-frequency = <200000000>; ++ non-removable; ++ disable-wp; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vddio_boot>; ++}; ++ ++/* ++ * EMMC_DS pin is shared between SPI NOR CS and eMMC Data Strobe ++ * Remove emmc_ds_pins from sd_emmc_c pinctrl-0 then spifc can be enabled ++ */ ++&spifc { ++ status = "disabled"; ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ ++ w25q32: spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "winbond,w25q16", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <3000000>; ++ }; ++}; ++ ++/* This one is connected to the Bluetooth module */ ++&uart_A { ++ status = "okay"; ++ pinctrl-0 = <&uart_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */ ++&uart_AO_B { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_b_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddio_ao18>; ++}; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0002-ARM64-dts-meson-gxbb-allow-child-devices-on-the-USB-.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0002-ARM64-dts-meson-gxbb-allow-child-devices-on-the-USB-.patch new file mode 100644 index 000000000..bbabdbcbd --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0002-ARM64-dts-meson-gxbb-allow-child-devices-on-the-USB-.patch @@ -0,0 +1,41 @@ +From 841ec7b8484dee021a15fdc187cdadc1c89220f2 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Thu, 12 Jan 2017 01:38:26 +0100 +Subject: [PATCH 02/39] ARM64: dts: meson-gxbb: allow child devices on the USB + controller + +Add the size and adress cells to the USB controllers to allow specifying +child devices (for example the USB hub on the Odroid-C2 which must be +taken out of reset to work). + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index af834cd..7d38d55 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -73,6 +73,8 @@ + + usb0: usb@c9000000 { + compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0x0 0xc9000000 0x0 0x40000>; + interrupts = ; + clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; +@@ -85,6 +87,8 @@ + + usb1: usb@c9100000 { + compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; ++ #address-cells = <1>; ++ #size-cells = <0>; + reg = <0x0 0xc9100000 0x0 0x40000>; + interrupts = ; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0003-ARM64-dts-meson-gxbb-odroidc2-take-USB-hub-out-of-re.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0003-ARM64-dts-meson-gxbb-odroidc2-take-USB-hub-out-of-re.patch new file mode 100644 index 000000000..c0b21cab9 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0003-ARM64-dts-meson-gxbb-odroidc2-take-USB-hub-out-of-re.patch @@ -0,0 +1,34 @@ +From 564bc89139a6bf0833cef64993dfe3fe2784c6a8 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Thu, 12 Jan 2017 01:39:20 +0100 +Subject: [PATCH 03/39] ARM64: dts: meson-gxbb-odroidc2: take USB hub out of + reset + +This takes the USB hub out of reset, otherwise the hub is not working. + +Fixes: 5a0803bd5ae ("ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes") +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index 08b7bb7..c3a7b7f 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -310,4 +310,11 @@ + + &usb1 { + status = "okay"; ++ ++ hub@1 { ++ compatible = "usb5e3,610"; ++ reg = <1>; ++ reset-gpios = <&gpio GPIOAO_4 GPIO_ACTIVE_LOW>; ++ reset-duration-us = <3000>; ++ }; + }; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0004-phy-meson-add-USB3-PHY-support-for-Meson-GXL.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0004-phy-meson-add-USB3-PHY-support-for-Meson-GXL.patch new file mode 100644 index 000000000..527c72b66 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0004-phy-meson-add-USB3-PHY-support-for-Meson-GXL.patch @@ -0,0 +1,260 @@ +From 563fa3aaad2752079c8ee05819bf9923370f39aa Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 26 Nov 2016 15:56:32 +0100 +Subject: [PATCH 04/39] phy: meson: add USB3 PHY support for Meson GXL + +This adds USB3 PHY driver found on Meson GXL and GXM SoCs. + +Unfortunately there are no datasheets available for any of these PHYs. +Both drivers were written by reading the reference drivers provided by +Amlogic and analyzing the registers on the kernel that was shipped with +my board. + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + drivers/phy/amlogic/Kconfig | 13 ++ + drivers/phy/amlogic/Makefile | 1 + + drivers/phy/amlogic/phy-meson-gxl-usb3.c | 198 +++++++++++++++++++++++++++++++ + 3 files changed, 212 insertions(+) + create mode 100644 drivers/phy/amlogic/phy-meson-gxl-usb3.c + +diff --git a/drivers/phy/amlogic/Kconfig b/drivers/phy/amlogic/Kconfig +index cb8f450..5d11a3e 100644 +--- a/drivers/phy/amlogic/Kconfig ++++ b/drivers/phy/amlogic/Kconfig +@@ -13,6 +13,19 @@ config PHY_MESON8B_USB2 + Meson8b and GXBB SoCs. + If unsure, say N. + ++config PHY_MESON_GXL_USB3 ++ tristate "Meson GXL and GXM USB3 PHY drivers" ++ default ARCH_MESON ++ depends on OF && (ARCH_MESON || COMPILE_TEST) ++ depends on USB_SUPPORT ++ select USB_COMMON ++ select GENERIC_PHY ++ select REGMAP_MMIO ++ help ++ Enable this to support the Meson USB3 PHY found in Meson ++ GXL and GXM SoCs. ++ If unsure, say N. ++ + config PHY_MESON_GXL_USB2 + tristate "Meson GXL and GXM USB2 PHY drivers" + default ARCH_MESON +diff --git a/drivers/phy/amlogic/Makefile b/drivers/phy/amlogic/Makefile +index cfdc987..4fd8848 100644 +--- a/drivers/phy/amlogic/Makefile ++++ b/drivers/phy/amlogic/Makefile +@@ -1,2 +1,3 @@ + obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o + obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o ++obj-$(CONFIG_PHY_MESON_GXL_USB3) += phy-meson-gxl-usb3.o +diff --git a/drivers/phy/amlogic/phy-meson-gxl-usb3.c b/drivers/phy/amlogic/phy-meson-gxl-usb3.c +new file mode 100644 +index 0000000..9af5222 +--- /dev/null ++++ b/drivers/phy/amlogic/phy-meson-gxl-usb3.c +@@ -0,0 +1,198 @@ ++/* ++ * Meson GXL USB3 PHY driver ++ * ++ * Copyright (C) 2016 Martin Blumenstingl ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define USB_R0 0x00 ++ #define USB_R0_P30_FSEL_SHIFT 0 ++ #define USB_R0_P30_FSEL_MASK GENMASK(5, 0) ++ #define USB_R0_P30_PHY_RESET BIT(6) ++ #define USB_R0_P30_TEST_POWERDOWN_HSP BIT(7) ++ #define USB_R0_P30_TEST_POWERDOWN_SSP BIT(8) ++ #define USB_R0_P30_ACJT_LEVEL_SHIFT 9 ++ #define USB_R0_P30_ACJT_LEVEL_MASK GENMASK(13, 9) ++ #define USB_R0_P30_TX_BOOST_LEVEL_SHIFT 14 ++ #define USB_R0_P30_TX_BOOST_LEVEL_MASK GENMASK(16, 14) ++ #define USB_R0_P30_LANE0_TX2RX_LOOPBACK BIT(17) ++ #define USB_R0_P30_LANE0_EXT_PCLK_REQ BIT(18) ++ #define USB_R0_P30_PCS_RX_LOS_MASK_VAL_SHIFT 19 ++ #define USB_R0_P30_PCS_RX_LOS_MASK_VAL_MASK GENMASK(28, 19) ++ #define USB_R0_U2D_SS_SCALEDOWN_MODE_SHIFT 29 ++ #define USB_R0_U2D_SS_SCALEDOWN_MODE_MASK GENMASK(30, 29) ++ #define USB_R0_U2D_ACT BIT(31) ++ ++#define USB_R1 0x04 ++ #define USB_R1_U3H_BIGENDIAN_GS BIT(0) ++ #define USB_R1_U3H_PME_ENABLE BIT(1) ++ #define USB_R1_U3H_HUB_PORT_OVERCURRENT_SHIFT 2 ++ #define USB_R1_U3H_HUB_PORT_OVERCURRENT_MASK GENMASK(6, 2) ++ #define USB_R1_U3H_HUB_PORT_PERM_ATTACH_SHIFT 7 ++ #define USB_R1_U3H_HUB_PORT_PERM_ATTACH_MASK GENMASK(11, 7) ++ #define USB_R1_U3H_HOST_U2_PORT_DISABLE_SHIFT 12 ++ #define USB_R1_U3H_HOST_U2_PORT_DISABLE_MASK GENMASK(15, 12) ++ #define USB_R1_U3H_HOST_U3_PORT_DISABLE BIT(16) ++ #define USB_R1_U3H_HOST_PORT_POWER_CONTROL_PRESENT BIT(17) ++ #define USB_R1_U3H_HOST_MSI_ENABLE BIT(18) ++ #define USB_R1_U3H_FLADJ_30MHZ_REG_SHIFT 19 ++ #define USB_R1_U3H_FLADJ_30MHZ_REG_MASK GENMASK(24, 19) ++ #define USB_R1_P30_PCS_TX_SWING_FULL_SHIFT 25 ++ #define USB_R1_P30_PCS_TX_SWING_FULL_MASK GENMASK(31, 25) ++ ++#define USB_R2 0x08 ++ #define USB_R2_P30_CR_DATA_IN_SHIFT 0 ++ #define USB_R2_P30_CR_DATA_IN_MASK GENMASK(15, 0) ++ #define USB_R2_P30_CR_READ BIT(16) ++ #define USB_R2_P30_CR_WRITE BIT(17) ++ #define USB_R2_P30_CR_CAP_ADDR BIT(18) ++ #define USB_R2_P30_CR_CAP_DATA BIT(19) ++ #define USB_R2_P30_PCS_TX_DEEMPH_3P5DB_SHIFT 20 ++ #define USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(25, 20) ++ #define USB_R2_P30_PCS_TX_DEEMPH_6DB_SHIFT 26 ++ #define USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK GENMASK(31, 26) ++ ++#define USB_R3 0x0c ++ #define USB_R3_P30_SSC_ENABLE BIT(0) ++ #define USB_R3_P30_SSC_RANGE_SHIFT 1 ++ #define USB_R3_P30_SSC_RANGE_MASK GENMASK(3, 1) ++ #define USB_R3_P30_SSC_REF_CLK_SEL_SHIFT 4 ++ #define USB_R3_P30_SSC_REF_CLK_SEL_MASK GENMASK(12, 4) ++ #define USB_R3_P30_REF_SSP_EN BIT(13) ++ #define USB_R3_P30_LOS_BIAS_SHIFT 16 ++ #define USB_R3_P30_LOS_BIAS_MASK GENMASK(18, 16) ++ #define USB_R3_P30_LOS_LEVEL_SHIFT 19 ++ #define USB_R3_P30_LOS_LEVEL_MASK GENMASK(23, 19) ++ #define USB_R3_P30_MPLL_MULTIPLIER_SHIFT 24 ++ #define USB_R3_P30_MPLL_MULTIPLIER_MASK GENMASK(30, 24) ++ ++#define USB_R4 0x10 ++ #define USB_R4_P21_PORT_RESET_0 BIT(0) ++ #define USB_R4_P21_SLEEP_M0 BIT(1) ++ #define USB_R4_MEM_PD_SHIFT 2 ++ #define USB_R4_MEM_PD_MASK GENMASK(3, 2) ++ #define USB_R4_P21_ONLY BIT(4) ++ ++#define USB_R5 0x14 ++ #define USB_R5_ID_DIG_SYNC BIT(0) ++ #define USB_R5_ID_DIG_REG BIT(1) ++ #define USB_R5_ID_DIG_CFG_SHIFT 2 ++ #define USB_R5_ID_DIG_CFG_MASK GENMASK(3, 2) ++ #define USB_R5_ID_DIG_EN_0 BIT(4) ++ #define USB_R5_ID_DIG_EN_1 BIT(5) ++ #define USB_R5_ID_DIG_CURR BIT(6) ++ #define USB_R5_ID_DIG_IRQ BIT(7) ++ #define USB_R5_ID_DIG_TH_SHIFT 8 ++ #define USB_R5_ID_DIG_TH_MASK GENMASK(15, 8) ++ #define USB_R5_ID_DIG_CNT_SHIFT 16 ++ #define USB_R5_ID_DIG_CNT_MASK GENMASK(23, 16) ++ ++/* read-only register */ ++#define USB_R6 0x18 ++ #define USB_R6_P30_CR_DATA_OUT_SHIFT 0 ++ #define USB_R6_P30_CR_DATA_OUT_MASK GENMASK(15, 0) ++ #define USB_R6_P30_CR_ACK BIT(16) ++ ++#define RESET_COMPLETE_TIME 500 ++ ++struct phy_meson_gxl_usb3_priv { ++ struct regmap *regmap; ++ struct phy *this_phy; ++}; ++ ++static const struct regmap_config phy_meson_gxl_usb3_regmap_conf = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++ .max_register = USB_R6, ++}; ++ ++static int phy_meson_gxl_usb3_power_on(struct phy *phy) ++{ ++ struct phy_meson_gxl_usb3_priv *priv = phy_get_drvdata(phy); ++ ++ regmap_update_bits(priv->regmap, USB_R1, ++ USB_R1_U3H_FLADJ_30MHZ_REG_MASK, ++ 0x20 << USB_R1_U3H_FLADJ_30MHZ_REG_SHIFT); ++ ++ return 0; ++} ++ ++static const struct phy_ops phy_meson_gxl_usb3_ops = { ++ .power_on = phy_meson_gxl_usb3_power_on, ++ .owner = THIS_MODULE, ++}; ++ ++static int phy_meson_gxl_usb3_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ struct phy_meson_gxl_usb3_priv *priv; ++ struct resource *res; ++ struct phy *phy; ++ struct phy_provider *phy_provider; ++ void __iomem *base; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ priv->regmap = devm_regmap_init_mmio(dev, base, ++ &phy_meson_gxl_usb3_regmap_conf); ++ if (IS_ERR(priv->regmap)) ++ return PTR_ERR(priv->regmap); ++ ++ phy = devm_phy_create(dev, np, &phy_meson_gxl_usb3_ops); ++ if (IS_ERR(phy)) { ++ dev_err(dev, "failed to create PHY\n"); ++ return PTR_ERR(phy); ++ } ++ ++ phy_set_drvdata(phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id phy_meson_gxl_usb3_of_match[] = { ++ { .compatible = "amlogic,meson-gxl-usb3-phy", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, phy_meson_gxl_usb3_of_match); ++ ++static struct platform_driver phy_meson_gxl_usb3_driver = { ++ .probe = phy_meson_gxl_usb3_probe, ++ .driver = { ++ .name = "phy-meson-gxl-usb3", ++ .of_match_table = phy_meson_gxl_usb3_of_match, ++ }, ++}; ++module_platform_driver(phy_meson_gxl_usb3_driver); ++ ++MODULE_AUTHOR("Martin Blumenstingl "); ++MODULE_DESCRIPTION("Meson GXL USB3 PHY driver"); ++MODULE_LICENSE("GPL"); +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0005-usb-host-add-a-generic-platform-USB-roothub-driver.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0005-usb-host-add-a-generic-platform-USB-roothub-driver.patch new file mode 100644 index 000000000..388241bc9 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0005-usb-host-add-a-generic-platform-USB-roothub-driver.patch @@ -0,0 +1,293 @@ +From 8dca632003156c7a4f2eb6238b6e299f3df03c55 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Tue, 10 Jan 2017 18:59:43 +0100 +Subject: [PATCH 05/39] usb: host: add a generic platform USB roothub driver + +Many SoC platforms have separate devices for the USB PHY which are +registered through the generic PHY framework. These PHYs have to be +enabled to make the USB controller actually work. They also have to be +disabled again on shutdown/suspend. + +Currently (at least) the following HCI platform drivers are using custom +code to obtain all PHYs via devicetree for the roothub/controller and +disable/enable them when required: +- ehci-platform.c has ehci_platform_power_{on,off} +- xhci-mtk.c has xhci_mtk_phy_{init,exit,power_on,power_off} +- ohci-platform.c has ohci_platform_power_{on,off} + +These drivers are not using the generic devicetree USB device bindings +yet which were only introduced recently (documentation is available in +devicetree/bindings/usb/usb-device.txt). +With this new driver the usb2-phy and usb3-phy can be specified directly +in the child-node of the corresponding port of the roothub via +devicetree. This can be extended by not just parsing PHYs (some of the +other drivers listed above are for example also parsing a list of clocks +as well) when required. + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + .../devicetree/bindings/usb/usb-roothub.txt | 46 +++++++ + drivers/usb/host/Kconfig | 3 + + drivers/usb/host/Makefile | 2 + + drivers/usb/host/platform-roothub.c | 146 +++++++++++++++++++++ + drivers/usb/host/platform-roothub.h | 14 ++ + 5 files changed, 211 insertions(+) + create mode 100644 Documentation/devicetree/bindings/usb/usb-roothub.txt + create mode 100644 drivers/usb/host/platform-roothub.c + create mode 100644 drivers/usb/host/platform-roothub.h + +diff --git a/Documentation/devicetree/bindings/usb/usb-roothub.txt b/Documentation/devicetree/bindings/usb/usb-roothub.txt +new file mode 100644 +index 0000000..23b24b6 +--- /dev/null ++++ b/Documentation/devicetree/bindings/usb/usb-roothub.txt +@@ -0,0 +1,46 @@ ++Generic USB root-hub Properties ++ ++similar to the USB device bindings (documented in usb-device.txt from the ++current directory) this provides support for configuring the root-hub. ++ ++Required properties: ++- compatible: should be at least one of "usb1d6b,3", "usb1d6b,2" ++- reg: must be 0. ++- address-cells: must be 1 ++- size-cells: must be 0 ++ ++Required sub-nodes: ++a sub-node per actual USB port is required. each sub-node supports the ++following properties: ++ Required properties: ++ - reg: the port number on the root-hub (mandatory) ++ Optional properties: ++ - phys: optional, from the *Generic PHY* bindings (mandatory needed ++ when phy-names is given) ++ - phy-names: optional, from the *Generic PHY* bindings; supported names ++ are "usb2-phy" or "usb3-phy" ++ ++Example: ++ &usb1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ roothub@0 { ++ compatible = "usb1d6b,3", "usb1d6b,2"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ ++ port@1 { ++ reg = <1>; ++ usb-phy = <&usb2_phy1>, <&usb3_phy1>; ++ phy-names = "usb2-phy", "usb3-phy"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ usb-phy = <&usb2_phy2>, <&usb3_phy2>; ++ phy-names = "usb2-phy", "usb3-phy"; ++ }; ++ }; ++ } +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index 92b1972..598ca56 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -797,6 +797,9 @@ config USB_HCD_SSB + + If unsure, say N. + ++config USB_PLATFORM_ROOTHUB ++ bool ++ + config USB_HCD_TEST_MODE + bool "HCD test mode support" + ---help--- +diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile +index 4ab2689..873ebd9 100644 +--- a/drivers/usb/host/Makefile ++++ b/drivers/usb/host/Makefile +@@ -30,6 +30,8 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/ + + obj-$(CONFIG_USB_PCI) += pci-quirks.o + ++obj-$(CONFIG_USB_PLATFORM_ROOTHUB) += platform-roothub.o ++ + obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o + obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o + obj-$(CONFIG_USB_EHCI_HCD_PLATFORM) += ehci-platform.o +diff --git a/drivers/usb/host/platform-roothub.c b/drivers/usb/host/platform-roothub.c +new file mode 100644 +index 0000000..84837e4 +--- /dev/null ++++ b/drivers/usb/host/platform-roothub.c +@@ -0,0 +1,146 @@ ++/* ++ * platform roothub driver - a virtual PHY device which passes all phy_* ++ * function calls to multiple (actual) PHY devices. This is comes handy when ++ * initializing all PHYs on a root-hub (to keep them all in the same state). ++ * ++ * Copyright (C) 2017 Martin Blumenstingl ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "platform-roothub.h" ++ ++#define ROOTHUB_PORTNUM 0 ++ ++struct platform_roothub { ++ struct phy *phy; ++ struct list_head list; ++}; ++ ++static struct platform_roothub *platform_roothub_alloc(struct device *dev) ++{ ++ struct platform_roothub *roothub_entry; ++ ++ roothub_entry = devm_kzalloc(dev, sizeof(*roothub_entry), GFP_KERNEL); ++ if (!roothub_entry) ++ return ERR_PTR(-ENOMEM); ++ ++ INIT_LIST_HEAD(&roothub_entry->list); ++ ++ return roothub_entry; ++} ++ ++static int platform_roothub_add_phy(struct device *dev, ++ struct device_node *port_np, ++ const char *con_id, struct list_head *list) ++{ ++ struct platform_roothub *roothub_entry; ++ struct phy *phy = devm_of_phy_get(dev, port_np, con_id); ++ ++ if (IS_ERR_OR_NULL(phy)) { ++ if (!phy || PTR_ERR(phy) == -ENODEV) ++ return 0; ++ else ++ return PTR_ERR(phy); ++ } ++ ++ roothub_entry = platform_roothub_alloc(dev); ++ if (IS_ERR(roothub_entry)) ++ return PTR_ERR(roothub_entry); ++ ++ roothub_entry->phy = phy; ++ ++ list_add_tail(&roothub_entry->list, list); ++ ++ return 0; ++} ++ ++struct platform_roothub *platform_roothub_init(struct device *dev) ++{ ++ struct device_node *roothub_np, *port_np; ++ struct platform_roothub *plat_roothub; ++ int err; ++ ++ roothub_np = usb_of_get_child_node(dev->of_node, ROOTHUB_PORTNUM); ++ if (!of_device_is_available(roothub_np)) ++ return NULL; ++ ++ plat_roothub = platform_roothub_alloc(dev); ++ if (IS_ERR(plat_roothub)) ++ return plat_roothub; ++ ++ for_each_available_child_of_node(roothub_np, port_np) { ++ err = platform_roothub_add_phy(dev, port_np, "usb2-phy", ++ &plat_roothub->list); ++ if (err) ++ return ERR_PTR(err); ++ ++ err = platform_roothub_add_phy(dev, port_np, "usb3-phy", ++ &plat_roothub->list); ++ if (err) ++ return ERR_PTR(err); ++ } ++ ++ return plat_roothub; ++} ++EXPORT_SYMBOL_GPL(platform_roothub_init); ++ ++int platform_roothub_power_on(struct platform_roothub *plat_roothub) ++{ ++ struct platform_roothub *roothub_entry; ++ struct list_head *head; ++ int err; ++ ++ if (!plat_roothub) ++ return 0; ++ ++ head = &plat_roothub->list; ++ ++ list_for_each_entry(roothub_entry, head, list) { ++ err = phy_init(roothub_entry->phy); ++ if (err) ++ goto err_out; ++ ++ err = phy_power_on(roothub_entry->phy); ++ if (err) { ++ phy_exit(roothub_entry->phy); ++ goto err_out; ++ } ++ } ++ ++ return 0; ++ ++err_out: ++ list_for_each_entry_continue_reverse(roothub_entry, head, list) { ++ phy_power_off(roothub_entry->phy); ++ phy_exit(roothub_entry->phy); ++ } ++ ++ return err; ++} ++EXPORT_SYMBOL_GPL(platform_roothub_power_on); ++ ++void platform_roothub_power_off(struct platform_roothub *plat_roothub) ++{ ++ struct platform_roothub *roothub_entry; ++ ++ if (!plat_roothub) ++ return; ++ ++ list_for_each_entry_reverse(roothub_entry, &plat_roothub->list, list) { ++ phy_power_off(roothub_entry->phy); ++ phy_exit(roothub_entry->phy); ++ } ++} ++EXPORT_SYMBOL_GPL(platform_roothub_power_off); +diff --git a/drivers/usb/host/platform-roothub.h b/drivers/usb/host/platform-roothub.h +new file mode 100644 +index 0000000..bde0bf2 +--- /dev/null ++++ b/drivers/usb/host/platform-roothub.h +@@ -0,0 +1,14 @@ ++#ifndef USB_HOST_PLATFORM_ROOTHUB_H ++#define USB_HOST_PLATFORM_ROOTHUB_H ++ ++struct phy; ++struct device_node; ++ ++struct platform_roothub; ++ ++struct platform_roothub *platform_roothub_init(struct device *dev); ++ ++int platform_roothub_power_on(struct platform_roothub *plat_roothub); ++void platform_roothub_power_off(struct platform_roothub *plat_roothub); ++ ++#endif /* USB_HOST_PLATFORM_ROOTHUB_H */ +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0006-usb-host-xhci-plat-integrate-the-platform-roothub.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0006-usb-host-xhci-plat-integrate-the-platform-roothub.patch new file mode 100644 index 000000000..33e9a620d --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0006-usb-host-xhci-plat-integrate-the-platform-roothub.patch @@ -0,0 +1,146 @@ +From 55ba20ef5868e2a1fc3cefe264539affe55ef6b7 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Wed, 11 Jan 2017 11:34:59 +0100 +Subject: [PATCH 06/39] usb: host: xhci: plat: integrate the platform-roothub + +This enables the platform-roothub for the xhci-plat driver. This allows +specifying a PHY for each port via devicetree. All PHYs will then be +enabled/disabled by the platform-roothub driver. + +One example where this is required is the Amlogic GXL and GXM SoCs: +They are using a dwc3 USB controller with up to three ports enabled on +the internal roothub. Using only the top-level "phy" properties does not +work here since one can only specify one "usb2-phy" and one "usb3-phy", +while actually at least two "usb2-phy" have to be specified. + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + Documentation/devicetree/bindings/usb/usb-xhci.txt | 7 ++++++ + drivers/usb/host/Kconfig | 1 + + drivers/usb/host/xhci-plat.c | 26 +++++++++++++++++++++- + drivers/usb/host/xhci.h | 3 +++ + 4 files changed, 36 insertions(+), 1 deletion(-) + +diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt +index 7a69b8b..d0d8a67c 100644 +--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt ++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt +@@ -30,6 +30,13 @@ Optional properties: + - usb3-lpm-capable: determines if platform is USB3 LPM capable + - quirk-broken-port-ped: set if the controller has broken port disable mechanism + ++sub-nodes: ++- optionally there can be a node for the root-hub, see usb-roothub.txt in the ++ current directory ++- one or more nodes with reg 1-31 for each port to which a device is connected. ++ See usb-device.txt in the current directory for more information. ++ ++ + Example: + usb@f0931000 { + compatible = "generic-xhci"; +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index 598ca56..8c3b11f 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -36,6 +36,7 @@ config USB_XHCI_PCI + config USB_XHCI_PLATFORM + tristate "Generic xHCI driver for a platform device" + select USB_XHCI_RCAR if ARCH_RENESAS ++ select USB_PLATFORM_ROOTHUB + ---help--- + Adds an xHCI host driver for a generic platform device, which + provides a memory space and an irq. +diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c +index 1cb6eae..a80d585 100644 +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -281,10 +281,20 @@ static int xhci_plat_probe(struct platform_device *pdev) + goto put_usb3_hcd; + } + +- ret = usb_add_hcd(hcd, irq, IRQF_SHARED); ++ xhci->platform_roothub = platform_roothub_init(sysdev); ++ if (IS_ERR(xhci->platform_roothub)) { ++ ret = PTR_ERR(xhci->platform_roothub); ++ goto disable_clk; ++ } ++ ++ ret = platform_roothub_power_on(xhci->platform_roothub); + if (ret) + goto disable_usb_phy; + ++ ret = usb_add_hcd(hcd, irq, IRQF_SHARED); ++ if (ret) ++ goto disable_platform_roothub; ++ + if (HCC_MAX_PSA(xhci->hcc_params) >= 4) + xhci->shared_hcd->can_do_streams = 1; + +@@ -307,6 +317,9 @@ static int xhci_plat_probe(struct platform_device *pdev) + dealloc_usb2_hcd: + usb_remove_hcd(hcd); + ++disable_platform_roothub: ++ platform_roothub_power_off(xhci->platform_roothub); ++ + disable_usb_phy: + usb_phy_shutdown(hcd->usb_phy); + +@@ -338,6 +351,8 @@ static int xhci_plat_remove(struct platform_device *dev) + usb_remove_hcd(xhci->shared_hcd); + usb_phy_shutdown(hcd->usb_phy); + ++ platform_roothub_power_off(xhci->platform_roothub); ++ + usb_remove_hcd(hcd); + usb_put_hcd(xhci->shared_hcd); + +@@ -370,6 +385,11 @@ static int __maybe_unused xhci_plat_suspend(struct device *dev) + if (!device_may_wakeup(dev) && !IS_ERR(xhci->clk)) + clk_disable_unprepare(xhci->clk); + ++ if (ret) ++ return ret; ++ ++ platform_roothub_power_off(xhci->platform_roothub); ++ + return ret; + } + +@@ -382,6 +402,10 @@ static int __maybe_unused xhci_plat_resume(struct device *dev) + if (!device_may_wakeup(dev) && !IS_ERR(xhci->clk)) + clk_prepare_enable(xhci->clk); + ++ ret = platform_roothub_power_on(xhci->platform_roothub); ++ if (ret) ++ return ret; ++ + ret = xhci_priv_resume_quirk(hcd); + if (ret) + return ret; +diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h +index 2eaf6e1..552834c 100644 +--- a/drivers/usb/host/xhci.h ++++ b/drivers/usb/host/xhci.h +@@ -34,6 +34,8 @@ + #include "xhci-ext-caps.h" + #include "pci-quirks.h" + ++#include "platform-roothub.h" ++ + /* xHCI PCI Configuration Registers */ + #define XHCI_SBRN_OFFSET (0x60) + +@@ -1735,6 +1737,7 @@ struct xhci_hcd { + int msix_count; + /* optional clock */ + struct clk *clk; ++ struct platform_roothub *platform_roothub; + /* data structures */ + struct xhci_device_context_array *dcbaa; + struct xhci_ring *cmd_ring; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0007-ARM64-dts-meson-gxl-add-USB-host-support.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0007-ARM64-dts-meson-gxl-add-USB-host-support.patch new file mode 100644 index 000000000..ee9531988 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0007-ARM64-dts-meson-gxl-add-USB-host-support.patch @@ -0,0 +1,99 @@ +From 547f8ce14bfc3d315dc8b64d0e2eff0c7be897d2 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sun, 20 Nov 2016 00:23:52 +0100 +Subject: [PATCH 07/39] ARM64: dts: meson-gxl: add USB host support + +This adds USB host support to the Meson GXL SoC. A dwc3 controller is +used for host-mode, while a dwc2 controller is used for device-mode only. +The dwc3 controller's internal roothub has two USB2 ports enabled but no +USB3 port. Each of the ports is supplied by a separate PHY. The USB pins +are connected to the SoC's USBHOST_A and USBOTG_B pins. +Due to the way the roothub works internally the USB PHYs are left +enabled. When the dwc3 controller is disabled the PHY is never powered on +so it does not draw any extra power. However, when the dwc3 host +controller is enabled then all PHYs also have to be enabled, otherwise +USB devices will not be detected (regardless of whether they are plugged +into an enabled port or not). This means that only the dwc3 controller +has to be enabled on boards with USB support (instead of requiring all +boards to enable the PHYs additionally with the chance of forgetting to +enable one and breaking all other ports with that as well). + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 59 ++++++++++++++++++++++++++++++ + 1 file changed, 59 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index fb8d76a..68ea67a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -57,6 +57,65 @@ + no-map; + }; + }; ++ ++ soc { ++ ++ usb0: usb@c9000000 { ++ compatible = "snps,dwc3"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0 0xc9000000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "host"; ++ maximum-speed = "high-speed"; ++ snps,dis_u2_susphy_quirk; ++ phys = <&usb3_phy0>; ++ phy-names = "usb3-phy"; ++ status = "disabled"; ++ ++ dwc3_roothub: roothub@0 { ++ compatible = "usb1d6b,3", "usb1d6b,2"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ ++ port@1 { ++ reg = <1>; ++ phys = <&usb2_phy0>; ++ phy-names = "usb2-phy"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ phys = <&usb2_phy1>; ++ phy-names = "usb2-phy"; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&apb { ++ usb2_phy0: phy@78000 { ++ compatible = "amlogic,meson-gxl-usb2-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x78000 0x0 0x20>; ++ status = "okay"; ++ }; ++ ++ usb2_phy1: phy@78020 { ++ compatible = "amlogic,meson-gxl-usb2-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x78020 0x0 0x20>; ++ status = "okay"; ++ }; ++ ++ usb3_phy0: phy@78080 { ++ compatible = "amlogic,meson-gxl-usb3-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x78080 0x0 0x20>; ++ status = "okay"; ++ }; + }; + + ðmac { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0008-ARM64-dts-meson-gxm-add-GXM-specific-USB-host-config.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0008-ARM64-dts-meson-gxm-add-GXM-specific-USB-host-config.patch new file mode 100644 index 000000000..c30cc8b65 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0008-ARM64-dts-meson-gxm-add-GXM-specific-USB-host-config.patch @@ -0,0 +1,49 @@ +From 48d4988f2b3b93a6f17c0d1d5e6d932664bc0c74 Mon Sep 17 00:00:00 2001 +From: Martin Blumenstingl +Date: Sat, 26 Nov 2016 00:17:22 +0100 +Subject: [PATCH 08/39] ARM64: dts: meson-gxm: add GXM specific USB host + configuration + +The USB configuration on GXM is slightly different than on GXL. The dwc3 +controller's internal hub has three USB2 ports (instead of 2 on GXL) +along with a dedicated USB2 PHY for this port. However, it seems that +there are no pins on GXM which would allow connecting the third port to +a physical USB port. + +Signed-off-by: Martin Blumenstingl +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +index 19a798d..5e4cb90 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +@@ -121,6 +121,23 @@ + compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; + }; + ++&apb { ++ usb2_phy2: phy@78040 { ++ compatible = "amlogic,meson-gxl-usb2-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x78040 0x0 0x20>; ++ status = "disabled"; ++ }; ++}; ++ ++&dwc3_roothub { ++ port@3 { ++ reg = <3>; ++ phys = <&usb2_phy2>; ++ phy-names = "usb2-phy"; ++ }; ++}; ++ + &saradc { + compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; + }; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0009-ARM64-dts-meson-gx-Enable-USB-on-GXL-and-GXM-boards.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0009-ARM64-dts-meson-gx-Enable-USB-on-GXL-and-GXM-boards.patch new file mode 100644 index 000000000..2ed02a37f --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0009-ARM64-dts-meson-gx-Enable-USB-on-GXL-and-GXM-boards.patch @@ -0,0 +1,129 @@ +From 1e5a4ee949281c47a03f5cee31226d803d396f48 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 13 Jul 2017 15:02:33 +0200 +Subject: [PATCH 09/39] ARM64: dts: meson-gx: Enable USB on GXL and GXM boards + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 4 ++++ + 9 files changed, 36 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index 4157987..7ce9a62 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -236,3 +236,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +index 977b424..6f2cd8e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +@@ -163,3 +163,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index edc512a..89a5fd9 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -198,3 +198,7 @@ + pinctrl-0 = <&uart_ao_b_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index 64c54c9..4035891 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -242,3 +242,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +index 1b8f328..6338e6c 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +@@ -251,3 +251,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +index 129af90..7a1c20e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +@@ -173,3 +173,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +index 32c138e..103575a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -397,3 +397,7 @@ + status = "okay"; + vref-supply = <&vddio_ao18>; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +index 22c6977..cfde246 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +@@ -215,3 +215,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +index 470f72b..9837a48 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +@@ -237,3 +237,7 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb0 { ++ status = "okay"; ++}; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0010-ARM64-defconfig-add-CONFIG_MESON_EFUSE.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0010-ARM64-defconfig-add-CONFIG_MESON_EFUSE.patch new file mode 100644 index 000000000..f80c0765b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0010-ARM64-defconfig-add-CONFIG_MESON_EFUSE.patch @@ -0,0 +1,28 @@ +From eb29dbaf90e217978d8abfab1912b11020825e28 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Mon, 13 Nov 2017 12:02:59 +0100 +Subject: [PATCH 10/39] ARM64: defconfig: add CONFIG_MESON_EFUSE + +Turn on CONFIG_MESON_EFUSE as module + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 34480e9..3cdfc74 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -541,6 +541,7 @@ CONFIG_PHY_XGENE=y + CONFIG_PHY_TEGRA_XUSB=y + CONFIG_QCOM_L2_PMU=y + CONFIG_QCOM_L3_PMU=y ++CONFIG_MESON_EFUSE=m + CONFIG_TEE=y + CONFIG_OPTEE=y + CONFIG_ARM_SCPI_PROTOCOL=y +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0011-ARM64-defconfig-enable-CEC-support.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0011-ARM64-defconfig-enable-CEC-support.patch new file mode 100644 index 000000000..54b58d493 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0011-ARM64-defconfig-enable-CEC-support.patch @@ -0,0 +1,36 @@ +From 175366cb9e77fe54e6949f6599c0900cf0980b26 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Mon, 13 Nov 2017 12:09:40 +0100 +Subject: [PATCH 11/39] ARM64: defconfig: enable CEC support + +Turn on CONFIG_CEC_SUPPORT and CONFIG_CEC_PLATFORM_DRIVERS + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 3cdfc74..944b93b 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -350,6 +350,7 @@ CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_CEC_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y + CONFIG_MEDIA_RC_SUPPORT=y + CONFIG_RC_CORE=m +@@ -364,6 +365,7 @@ CONFIG_VIDEO_SAMSUNG_S5P_MFC=m + CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m + CONFIG_VIDEO_RENESAS_FCP=m + CONFIG_VIDEO_RENESAS_VSP1=m ++CONFIG_CEC_PLATFORM_DRIVERS=y + CONFIG_DRM=m + CONFIG_DRM_NOUVEAU=m + CONFIG_DRM_EXYNOS=m +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0012-ARM64-defconfig-enable-CONFIG_VIDEO_MESON_AO_CEC.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0012-ARM64-defconfig-enable-CONFIG_VIDEO_MESON_AO_CEC.patch new file mode 100644 index 000000000..eb8910de8 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0012-ARM64-defconfig-enable-CONFIG_VIDEO_MESON_AO_CEC.patch @@ -0,0 +1,28 @@ +From c71be51a7778a6aa6b784dd0edc57951acf63ef2 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Mon, 13 Nov 2017 12:11:41 +0100 +Subject: [PATCH 12/39] ARM64: defconfig: enable CONFIG_VIDEO_MESON_AO_CEC + +Turn on CONFIG_VIDEO_MESON_AO_CEC as module + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 944b93b..fdf94cb 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -366,6 +366,7 @@ CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m + CONFIG_VIDEO_RENESAS_FCP=m + CONFIG_VIDEO_RENESAS_VSP1=m + CONFIG_CEC_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_MESON_AO_CEC=m + CONFIG_DRM=m + CONFIG_DRM_NOUVEAU=m + CONFIG_DRM_EXYNOS=m +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0013-ARM64-defconfig-enable-CONFIG_DRM_DW_HDMI_CEC.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0013-ARM64-defconfig-enable-CONFIG_DRM_DW_HDMI_CEC.patch new file mode 100644 index 000000000..8fda9646d --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0013-ARM64-defconfig-enable-CONFIG_DRM_DW_HDMI_CEC.patch @@ -0,0 +1,28 @@ +From 94fb1910e76e39cc910fb5b5a528712f4135891e Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Mon, 13 Nov 2017 12:15:18 +0100 +Subject: [PATCH 13/39] ARM64: defconfig: enable CONFIG_DRM_DW_HDMI_CEC + +Turn on CONFIG_DRM_DW_HDMI_CEC as module + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index fdf94cb..dcf1090 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -388,6 +388,7 @@ CONFIG_DRM_RCAR_VSP=y + CONFIG_DRM_TEGRA=m + CONFIG_DRM_PANEL_SIMPLE=m + CONFIG_DRM_I2C_ADV7511=m ++CONFIG_DRM_DW_HDMI_CEC=m + CONFIG_DRM_VC4=m + CONFIG_DRM_HISI_KIRIN=m + CONFIG_DRM_MESON=m +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0014-clk-meson-gxbb-Add-VPU-and-VAPB-clockids.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0014-clk-meson-gxbb-Add-VPU-and-VAPB-clockids.patch new file mode 100644 index 000000000..9d7354901 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0014-clk-meson-gxbb-Add-VPU-and-VAPB-clockids.patch @@ -0,0 +1,55 @@ +From 9bc414d9e18f8c9d39be44165b4926e2b2cdc1d9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 17:29:33 +0200 +Subject: [PATCH 14/39] clk: meson: gxbb: Add VPU and VAPB clockids + +Add the clkids for the clocks feeding the Video Processing Unit. + +Signed-off-by: Neil Armstrong +--- + drivers/clk/meson/gxbb.h | 6 +++++- + include/dt-bindings/clock/gxbb-clkc.h | 11 +++++++++++ + 2 files changed, 16 insertions(+), 1 deletion(-) + +diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h +index 5b1d4b3..aee6fbb 100644 +--- a/drivers/clk/meson/gxbb.h ++++ b/drivers/clk/meson/gxbb.h +@@ -190,8 +190,12 @@ + #define CLKID_SD_EMMC_B_CLK0_DIV 121 + #define CLKID_SD_EMMC_C_CLK0_SEL 123 + #define CLKID_SD_EMMC_C_CLK0_DIV 124 ++#define CLKID_VPU_0_DIV 127 ++#define CLKID_VPU_1_DIV 130 ++#define CLKID_VAPB_0_DIV 134 ++#define CLKID_VAPB_1_DIV 137 + +-#define NR_CLKS 126 ++#define NR_CLKS 141 + + /* include the CLKIDs that have been made part of the DT binding */ + #include +diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h +index 8c92528..8ba99a5 100644 +--- a/include/dt-bindings/clock/gxbb-clkc.h ++++ b/include/dt-bindings/clock/gxbb-clkc.h +@@ -114,5 +114,16 @@ + #define CLKID_SD_EMMC_A_CLK0 119 + #define CLKID_SD_EMMC_B_CLK0 122 + #define CLKID_SD_EMMC_C_CLK0 125 ++#define CLKID_VPU_0_SEL 126 ++#define CLKID_VPU_0 128 ++#define CLKID_VPU_1_SEL 129 ++#define CLKID_VPU_1 131 ++#define CLKID_VPU 132 ++#define CLKID_VAPB_0_SEL 133 ++#define CLKID_VAPB_0 135 ++#define CLKID_VAPB_1_SEL 136 ++#define CLKID_VAPB_1 138 ++#define CLKID_VAPB_SEL 139 ++#define CLKID_VAPB 140 + + #endif /* __GXBB_CLKC_H */ +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0015-clk-meson-gxbb-Add-VPU-and-VAPB-clocks-data.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0015-clk-meson-gxbb-Add-VPU-and-VAPB-clocks-data.patch new file mode 100644 index 000000000..778c6ab64 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0015-clk-meson-gxbb-Add-VPU-and-VAPB-clocks-data.patch @@ -0,0 +1,357 @@ +From a3b8b7bfd775fa521425c72856b4394fb6fec518 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 13 Oct 2017 14:38:37 +0200 +Subject: [PATCH 15/39] clk: meson: gxbb: Add VPU and VAPB clocks data + +The Amlogic Meson GX SoCs needs these two clocks to power up the +VPU power domain. + +These two clocks are similar to the MALI clocks by having a glitch-free +mux and two similar clocks with gate, divider and muxes. + +Signed-off-by: Neil Armstrong +--- + drivers/clk/meson/gxbb.c | 292 +++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 292 insertions(+) + +diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c +index 92168348..86cb5af 100644 +--- a/drivers/clk/meson/gxbb.c ++++ b/drivers/clk/meson/gxbb.c +@@ -1131,6 +1131,253 @@ static struct clk_gate gxbb_sd_emmc_c_clk0 = { + }, + }; + ++/* VPU Clock */ ++ ++static u32 mux_table_vpu[] = {0, 1, 2, 3}; ++static const char * const gxbb_vpu_parent_names[] = { ++ "fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7" ++}; ++ ++static struct clk_mux gxbb_vpu_0_sel = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .mask = 0x3, ++ .shift = 9, ++ .lock = &clk_lock, ++ .table = mux_table_vpu, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vpu_0_sel", ++ .ops = &clk_mux_ops, ++ /* ++ * bits 9:10 selects from 4 possible parents: ++ * fclk_div4, fclk_div3, fclk_div5, fclk_div7, ++ */ ++ .parent_names = gxbb_vpu_parent_names, ++ .num_parents = ARRAY_SIZE(gxbb_vpu_parent_names), ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_divider gxbb_vpu_0_div = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .shift = 0, ++ .width = 7, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vpu_0_div", ++ .ops = &clk_divider_ops, ++ .parent_names = (const char *[]){ "vpu_0_sel" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_gate gxbb_vpu_0 = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .bit_idx = 8, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data) { ++ .name = "vpu_0", ++ .ops = &clk_gate_ops, ++ .parent_names = (const char *[]){ "vpu_0_div" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_mux gxbb_vpu_1_sel = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .mask = 0x3, ++ .shift = 25, ++ .lock = &clk_lock, ++ .table = mux_table_vpu, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vpu_1_sel", ++ .ops = &clk_mux_ops, ++ /* ++ * bits 25:26 selects from 4 possible parents: ++ * fclk_div4, fclk_div3, fclk_div5, fclk_div7, ++ */ ++ .parent_names = gxbb_vpu_parent_names, ++ .num_parents = ARRAY_SIZE(gxbb_vpu_parent_names), ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_divider gxbb_vpu_1_div = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .shift = 16, ++ .width = 7, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vpu_1_div", ++ .ops = &clk_divider_ops, ++ .parent_names = (const char *[]){ "vpu_1_sel" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_gate gxbb_vpu_1 = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .bit_idx = 24, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data) { ++ .name = "vpu_1", ++ .ops = &clk_gate_ops, ++ .parent_names = (const char *[]){ "vpu_1_div" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_mux gxbb_vpu = { ++ .reg = (void *)HHI_VPU_CLK_CNTL, ++ .mask = 1, ++ .shift = 31, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vpu", ++ .ops = &clk_mux_ops, ++ /* ++ * bit 31 selects from 2 possible parents: ++ * vpu_0 or vpu_1 ++ */ ++ .parent_names = (const char *[]){ "vpu_0", "vpu_1" }, ++ .num_parents = 2, ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++/* VAPB Clock */ ++ ++static u32 mux_table_vapb[] = {0, 1, 2, 3}; ++static const char * const gxbb_vapb_parent_names[] = { ++ "fclk_div4", "fclk_div3", "fclk_div5", "fclk_div7" ++}; ++ ++static struct clk_mux gxbb_vapb_0_sel = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .mask = 0x3, ++ .shift = 9, ++ .lock = &clk_lock, ++ .table = mux_table_vapb, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vapb_0_sel", ++ .ops = &clk_mux_ops, ++ /* ++ * bits 9:10 selects from 4 possible parents: ++ * fclk_div4, fclk_div3, fclk_div5, fclk_div7, ++ */ ++ .parent_names = gxbb_vapb_parent_names, ++ .num_parents = ARRAY_SIZE(gxbb_vapb_parent_names), ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_divider gxbb_vapb_0_div = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .shift = 0, ++ .width = 7, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vapb_0_div", ++ .ops = &clk_divider_ops, ++ .parent_names = (const char *[]){ "vapb_0_sel" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_gate gxbb_vapb_0 = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .bit_idx = 8, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data) { ++ .name = "vapb_0", ++ .ops = &clk_gate_ops, ++ .parent_names = (const char *[]){ "vapb_0_div" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_mux gxbb_vapb_1_sel = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .mask = 0x3, ++ .shift = 25, ++ .lock = &clk_lock, ++ .table = mux_table_vapb, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vapb_1_sel", ++ .ops = &clk_mux_ops, ++ /* ++ * bits 25:26 selects from 4 possible parents: ++ * fclk_div4, fclk_div3, fclk_div5, fclk_div7, ++ */ ++ .parent_names = gxbb_vapb_parent_names, ++ .num_parents = ARRAY_SIZE(gxbb_vapb_parent_names), ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_divider gxbb_vapb_1_div = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .shift = 16, ++ .width = 7, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vapb_1_div", ++ .ops = &clk_divider_ops, ++ .parent_names = (const char *[]){ "vapb_1_sel" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_gate gxbb_vapb_1 = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .bit_idx = 24, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data) { ++ .name = "vapb_1", ++ .ops = &clk_gate_ops, ++ .parent_names = (const char *[]){ "vapb_1_div" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_mux gxbb_vapb_sel = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .mask = 1, ++ .shift = 31, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data){ ++ .name = "vapb_sel", ++ .ops = &clk_mux_ops, ++ /* ++ * bit 31 selects from 2 possible parents: ++ * vapb_0 or vapb_1 ++ */ ++ .parent_names = (const char *[]){ "vapb_0", "vapb_1" }, ++ .num_parents = 2, ++ .flags = CLK_SET_RATE_NO_REPARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ ++static struct clk_gate gxbb_vapb = { ++ .reg = (void *)HHI_VAPBCLK_CNTL, ++ .bit_idx = 30, ++ .lock = &clk_lock, ++ .hw.init = &(struct clk_init_data) { ++ .name = "vapb", ++ .ops = &clk_gate_ops, ++ .parent_names = (const char *[]){ "vapb_sel" }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, ++ }, ++}; ++ + /* Everything Else (EE) domain gates */ + static MESON_GATE(gxbb_ddr, HHI_GCLK_MPEG0, 0); + static MESON_GATE(gxbb_dos, HHI_GCLK_MPEG0, 1); +@@ -1349,6 +1596,21 @@ static struct clk_hw_onecell_data gxbb_hw_onecell_data = { + [CLKID_SD_EMMC_C_CLK0_SEL] = &gxbb_sd_emmc_c_clk0_sel.hw, + [CLKID_SD_EMMC_C_CLK0_DIV] = &gxbb_sd_emmc_c_clk0_div.hw, + [CLKID_SD_EMMC_C_CLK0] = &gxbb_sd_emmc_c_clk0.hw, ++ [CLKID_VPU_0_SEL] = &gxbb_vpu_0_sel.hw, ++ [CLKID_VPU_0_DIV] = &gxbb_vpu_0_div.hw, ++ [CLKID_VPU_0] = &gxbb_vpu_0.hw, ++ [CLKID_VPU_1_SEL] = &gxbb_vpu_1_sel.hw, ++ [CLKID_VPU_1_DIV] = &gxbb_vpu_1_div.hw, ++ [CLKID_VPU_1] = &gxbb_vpu_1.hw, ++ [CLKID_VPU] = &gxbb_vpu.hw, ++ [CLKID_VAPB_0_SEL] = &gxbb_vapb_0_sel.hw, ++ [CLKID_VAPB_0_DIV] = &gxbb_vapb_0_div.hw, ++ [CLKID_VAPB_0] = &gxbb_vapb_0.hw, ++ [CLKID_VAPB_1_SEL] = &gxbb_vapb_1_sel.hw, ++ [CLKID_VAPB_1_DIV] = &gxbb_vapb_1_div.hw, ++ [CLKID_VAPB_1] = &gxbb_vapb_1.hw, ++ [CLKID_VAPB_SEL] = &gxbb_vapb_sel.hw, ++ [CLKID_VAPB] = &gxbb_vapb.hw, + [NR_CLKS] = NULL, + }, + .num = NR_CLKS, +@@ -1481,6 +1743,21 @@ static struct clk_hw_onecell_data gxl_hw_onecell_data = { + [CLKID_SD_EMMC_C_CLK0_SEL] = &gxbb_sd_emmc_c_clk0_sel.hw, + [CLKID_SD_EMMC_C_CLK0_DIV] = &gxbb_sd_emmc_c_clk0_div.hw, + [CLKID_SD_EMMC_C_CLK0] = &gxbb_sd_emmc_c_clk0.hw, ++ [CLKID_VPU_0_SEL] = &gxbb_vpu_0_sel.hw, ++ [CLKID_VPU_0_DIV] = &gxbb_vpu_0_div.hw, ++ [CLKID_VPU_0] = &gxbb_vpu_0.hw, ++ [CLKID_VPU_1_SEL] = &gxbb_vpu_1_sel.hw, ++ [CLKID_VPU_1_DIV] = &gxbb_vpu_1_div.hw, ++ [CLKID_VPU_1] = &gxbb_vpu_1.hw, ++ [CLKID_VPU] = &gxbb_vpu.hw, ++ [CLKID_VAPB_0_SEL] = &gxbb_vapb_0_sel.hw, ++ [CLKID_VAPB_0_DIV] = &gxbb_vapb_0_div.hw, ++ [CLKID_VAPB_0] = &gxbb_vapb_0.hw, ++ [CLKID_VAPB_1_SEL] = &gxbb_vapb_1_sel.hw, ++ [CLKID_VAPB_1_DIV] = &gxbb_vapb_1_div.hw, ++ [CLKID_VAPB_1] = &gxbb_vapb_1.hw, ++ [CLKID_VAPB_SEL] = &gxbb_vapb_sel.hw, ++ [CLKID_VAPB] = &gxbb_vapb.hw, + [NR_CLKS] = NULL, + }, + .num = NR_CLKS, +@@ -1600,6 +1877,11 @@ static struct clk_gate *const gxbb_clk_gates[] = { + &gxbb_sd_emmc_a_clk0, + &gxbb_sd_emmc_b_clk0, + &gxbb_sd_emmc_c_clk0, ++ &gxbb_vpu_0, ++ &gxbb_vpu_1, ++ &gxbb_vapb_0, ++ &gxbb_vapb_1, ++ &gxbb_vapb, + }; + + static struct clk_mux *const gxbb_clk_muxes[] = { +@@ -1615,6 +1897,12 @@ static struct clk_mux *const gxbb_clk_muxes[] = { + &gxbb_sd_emmc_a_clk0_sel, + &gxbb_sd_emmc_b_clk0_sel, + &gxbb_sd_emmc_c_clk0_sel, ++ &gxbb_vpu_0_sel, ++ &gxbb_vpu_1_sel, ++ &gxbb_vpu, ++ &gxbb_vapb_0_sel, ++ &gxbb_vapb_1_sel, ++ &gxbb_vapb_sel, + }; + + static struct clk_divider *const gxbb_clk_dividers[] = { +@@ -1627,6 +1915,10 @@ static struct clk_divider *const gxbb_clk_dividers[] = { + &gxbb_sd_emmc_a_clk0_div, + &gxbb_sd_emmc_b_clk0_div, + &gxbb_sd_emmc_c_clk0_div, ++ &gxbb_vpu_0_div, ++ &gxbb_vpu_1_div, ++ &gxbb_vapb_0_div, ++ &gxbb_vapb_1_div, + }; + + static struct meson_clk_audio_divider *const gxbb_audio_dividers[] = { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0016-drm-meson-dw_hdmi-Add-support-for-an-optional-extern.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0016-drm-meson-dw_hdmi-Add-support-for-an-optional-extern.patch new file mode 100644 index 000000000..d23cd3f02 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0016-drm-meson-dw_hdmi-Add-support-for-an-optional-extern.patch @@ -0,0 +1,56 @@ +From fc742b3d9f1b79f9e3e695f0e4bfc6a35c7ed7e3 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 15:35:00 +0200 +Subject: [PATCH 16/39] drm/meson: dw_hdmi: Add support for an optional + external 5V regulator + +On reference boards and derivatives, the HDMI Logic is powered by an external +5V regulator. +This regulator was set by the Vendor U-Boot, add optional support for it. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index cef4144..17de3af 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -137,6 +138,7 @@ struct meson_dw_hdmi { + struct reset_control *hdmitx_phy; + struct clk *hdmi_pclk; + struct clk *venci_clk; ++ struct regulator *hdmi_supply; + u32 irq_stat; + }; + #define encoder_to_meson_dw_hdmi(x) \ +@@ -751,6 +753,17 @@ static int meson_dw_hdmi_bind(struct device *dev, struct device *master, + dw_plat_data = &meson_dw_hdmi->dw_plat_data; + encoder = &meson_dw_hdmi->encoder; + ++ meson_dw_hdmi->hdmi_supply = devm_regulator_get_optional(dev, "hdmi"); ++ if (IS_ERR(meson_dw_hdmi->hdmi_supply)) { ++ if (PTR_ERR(meson_dw_hdmi->hdmi_supply) == -EPROBE_DEFER) ++ return -EPROBE_DEFER; ++ meson_dw_hdmi->hdmi_supply = NULL; ++ } else { ++ ret = regulator_enable(meson_dw_hdmi->hdmi_supply); ++ if (ret) ++ return ret; ++ } ++ + meson_dw_hdmi->hdmitx_apb = devm_reset_control_get_exclusive(dev, + "hdmitx_apb"); + if (IS_ERR(meson_dw_hdmi->hdmitx_apb)) { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0017-drm-meson-Add-missing-VPU-init.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0017-drm-meson-Add-missing-VPU-init.patch new file mode 100644 index 000000000..f3ab93118 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0017-drm-meson-Add-missing-VPU-init.patch @@ -0,0 +1,58 @@ +From 253dbcb48f94e172873878262d19338bcc9aa108 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 15:34:21 +0200 +Subject: [PATCH 17/39] drm/meson: Add missing VPU init + +The VPU init misses these configurations values. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_drv.c | 9 +++++++++ + drivers/gpu/drm/meson/meson_registers.h | 4 ++++ + 2 files changed, 13 insertions(+) + +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index 7742c7d..19a0d8d 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -150,6 +150,14 @@ static struct regmap_config meson_regmap_config = { + .max_register = 0x1000, + }; + ++static void meson_vpu_init(struct meson_drm *priv) ++{ ++ writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); ++ writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); ++ writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); ++ writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); ++} ++ + static int meson_drv_bind_master(struct device *dev, bool has_components) + { + struct platform_device *pdev = to_platform_device(dev); +@@ -221,6 +229,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + + /* Hardware Initialization */ + ++ meson_vpu_init(priv); + meson_venc_init(priv); + meson_vpp_init(priv); + meson_viu_init(priv); +diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h +index 2847381..bca8714 100644 +--- a/drivers/gpu/drm/meson/meson_registers.h ++++ b/drivers/gpu/drm/meson/meson_registers.h +@@ -1363,6 +1363,10 @@ + #define VPU_PROT3_STAT_1 0x277a + #define VPU_PROT3_STAT_2 0x277b + #define VPU_PROT3_REQ_ONOFF 0x277c ++#define VPU_RDARB_MODE_L1C1 0x2790 ++#define VPU_RDARB_MODE_L1C2 0x2799 ++#define VPU_RDARB_MODE_L2C1 0x279d ++#define VPU_WRARB_MODE_L2C1 0x27a2 + + /* osd super scale */ + #define OSDSR_HV_SIZEIN 0x3130 +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0018-reset-meson-add-level-reset-support-for-GX-SoC-famil.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0018-reset-meson-add-level-reset-support-for-GX-SoC-famil.patch new file mode 100644 index 000000000..3ad7ba4fa --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0018-reset-meson-add-level-reset-support-for-GX-SoC-famil.patch @@ -0,0 +1,132 @@ +From 0689a4eaecae2831fe2cb614e102bb4ef43484a4 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 13 Oct 2017 14:05:01 +0200 +Subject: [PATCH 18/39] reset: meson: add level reset support for GX SoC family + +The Amlogic GX SoC family embeds alternate registers to drive the reset +levels next to the pulse registers. + +This patch adds support for level reset handling on the GX family only. + +The Meson8 family has an alternate way to handle level reset. + +Signed-off-by: Neil Armstrong +--- + drivers/reset/reset-meson.c | 62 ++++++++++++++++++++++++++++++++++++++++++--- + 1 file changed, 58 insertions(+), 4 deletions(-) + +diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c +index a8b915e..f3b9d69 100644 +--- a/drivers/reset/reset-meson.c ++++ b/drivers/reset/reset-meson.c +@@ -62,13 +62,16 @@ + #include + #include + #include ++#include + + #define REG_COUNT 8 + #define BITS_PER_REG 32 ++#define LEVEL_OFFSET 0x7c + + struct meson_reset { + void __iomem *reg_base; + struct reset_controller_dev rcdev; ++ spinlock_t lock; + }; + + static int meson_reset_reset(struct reset_controller_dev *rcdev, +@@ -88,18 +91,63 @@ static int meson_reset_reset(struct reset_controller_dev *rcdev, + return 0; + } + +-static const struct reset_control_ops meson_reset_ops = { ++static int meson_reset_level(struct reset_controller_dev *rcdev, ++ unsigned long id, bool assert) ++{ ++ struct meson_reset *data = ++ container_of(rcdev, struct meson_reset, rcdev); ++ unsigned int bank = id / BITS_PER_REG; ++ unsigned int offset = id % BITS_PER_REG; ++ void __iomem *reg_addr = data->reg_base + LEVEL_OFFSET + (bank << 2); ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&data->lock, flags); ++ ++ reg = readl(reg_addr); ++ if (assert) ++ writel(reg & ~BIT(offset), reg_addr); ++ else ++ writel(reg | BIT(offset), reg_addr); ++ ++ spin_unlock_irqrestore(&data->lock, flags); ++ ++ return 0; ++} ++ ++static int meson_reset_assert(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ return meson_reset_level(rcdev, id, true); ++} ++ ++static int meson_reset_deassert(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ return meson_reset_level(rcdev, id, false); ++} ++ ++static const struct reset_control_ops meson_reset_meson8_ops = { + .reset = meson_reset_reset, + }; + ++static const struct reset_control_ops meson_reset_gx_ops = { ++ .reset = meson_reset_reset, ++ .assert = meson_reset_assert, ++ .deassert = meson_reset_deassert, ++}; ++ + static const struct of_device_id meson_reset_dt_ids[] = { +- { .compatible = "amlogic,meson8b-reset", }, +- { .compatible = "amlogic,meson-gxbb-reset", }, ++ { .compatible = "amlogic,meson8b-reset", ++ .data = &meson_reset_meson8_ops, }, ++ { .compatible = "amlogic,meson-gxbb-reset", ++ .data = &meson_reset_gx_ops, }, + { /* sentinel */ }, + }; + + static int meson_reset_probe(struct platform_device *pdev) + { ++ const struct reset_control_ops *ops; + struct meson_reset *data; + struct resource *res; + +@@ -107,6 +155,10 @@ static int meson_reset_probe(struct platform_device *pdev) + if (!data) + return -ENOMEM; + ++ ops = of_device_get_match_data(&pdev->dev); ++ if (!ops) ++ return -EINVAL; ++ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->reg_base)) +@@ -114,9 +166,11 @@ static int meson_reset_probe(struct platform_device *pdev) + + platform_set_drvdata(pdev, data); + ++ spin_lock_init(&data->lock); ++ + data->rcdev.owner = THIS_MODULE; + data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG; +- data->rcdev.ops = &meson_reset_ops; ++ data->rcdev.ops = ops; + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0019-soc-amlogic-add-Meson-GX-VPU-Domains-driver.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0019-soc-amlogic-add-Meson-GX-VPU-Domains-driver.patch new file mode 100644 index 000000000..99b3bea09 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0019-soc-amlogic-add-Meson-GX-VPU-Domains-driver.patch @@ -0,0 +1,286 @@ +From 58d5e73046ca5c28eb835c1a98f936193de5d4d0 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 13 Oct 2017 17:05:00 +0200 +Subject: [PATCH 19/39] soc: amlogic: add Meson GX VPU Domains driver + +The Video Processing Unit needs a specific Power Domain powering scheme +this driver handles this as a PM Power Domain driver. + +Signed-off-by: Neil Armstrong +--- + drivers/soc/amlogic/Kconfig | 10 ++ + drivers/soc/amlogic/Makefile | 1 + + drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 234 ++++++++++++++++++++++++++++++++ + 3 files changed, 245 insertions(+) + create mode 100644 drivers/soc/amlogic/meson-gx-pwrc-vpu.c + +diff --git a/drivers/soc/amlogic/Kconfig b/drivers/soc/amlogic/Kconfig +index 22acf06..c2c0513 100644 +--- a/drivers/soc/amlogic/Kconfig ++++ b/drivers/soc/amlogic/Kconfig +@@ -8,5 +8,15 @@ config MESON_GX_SOCINFO + help + Say yes to support decoding of Amlogic Meson GX SoC family + information about the type, package and version. ++ ++config MESON_GX_PM_DOMAINS ++ bool "Amlogic Meson GX Power Domains driver" ++ depends on ARCH_MESON || COMPILE_TEST ++ default ARCH_MESON ++ select PM_GENERIC_DOMAINS ++ select PM_GENERIC_DOMAINS_OF ++ help ++ Say yes to expose Amlogic Meson GX Power Domains as ++ Generic Power Domains. + + endmenu +diff --git a/drivers/soc/amlogic/Makefile b/drivers/soc/amlogic/Makefile +index 3e85fc4..3174e93 100644 +--- a/drivers/soc/amlogic/Makefile ++++ b/drivers/soc/amlogic/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o ++obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o +diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +new file mode 100644 +index 0000000..bf5190b +--- /dev/null ++++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +@@ -0,0 +1,234 @@ ++/* ++ * Copyright (c) 2017 BayLibre, SAS ++ * Author: Neil Armstrong ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* AO Offsets */ ++ ++#define AO_RTI_GEN_PWR_SLEEP0 (0x3a << 2) ++ ++#define GEN_PWR_VPU_HDMI BIT(8) ++#define GEN_PWR_VPU_HDMI_ISO BIT(9) ++ ++/* HHI Offsets */ ++ ++#define HHI_MEM_PD_REG0 (0x40 << 2) ++#define HHI_VPU_MEM_PD_REG0 (0x41 << 2) ++#define HHI_VPU_MEM_PD_REG1 (0x42 << 2) ++ ++struct meson_gx_pwrc_vpu { ++ struct generic_pm_domain genpd; ++ struct regmap *regmap_ao; ++ struct regmap *regmap_hhi; ++ struct reset_control *rstc; ++ struct clk *vpu_clk; ++ struct clk *vapb_clk; ++ bool powered; ++}; ++ ++static inline ++struct meson_gx_pwrc_vpu *genpd_to_pd(struct generic_pm_domain *d) ++{ ++ return container_of(d, struct meson_gx_pwrc_vpu, genpd); ++} ++ ++static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd) ++{ ++ struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); ++ int i; ++ ++ regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO); ++ udelay(20); ++ ++ /* Power Down Memories */ ++ for (i = 0; i < 32; i += 2) { ++ regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, ++ 0x2 << i, 0x3 << i); ++ udelay(5); ++ } ++ for (i = 0; i < 32; i += 2) { ++ regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, ++ 0x2 << i, 0x3 << i); ++ udelay(5); ++ } ++ for (i = 8; i < 16; i++) { ++ regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, ++ BIT(i), BIT(i)); ++ udelay(5); ++ } ++ udelay(20); ++ ++ regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI); ++ ++ msleep(20); ++ ++ clk_disable_unprepare(pd->vpu_clk); ++ clk_disable_unprepare(pd->vapb_clk); ++ ++ pd->powered = false; ++ ++ return 0; ++} ++ ++static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd) ++{ ++ int ret; ++ ++ ret = clk_prepare_enable(pd->vpu_clk); ++ if (ret) ++ return ret; ++ ++ return clk_prepare_enable(pd->vapb_clk); ++} ++ ++static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd) ++{ ++ struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); ++ int ret; ++ int i; ++ ++ regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VPU_HDMI, 0); ++ udelay(20); ++ ++ /* Power Up Memories */ ++ for (i = 0; i < 32; i += 2) { ++ regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, ++ 0x2 << i, 0); ++ udelay(5); ++ } ++ ++ for (i = 0; i < 32; i += 2) { ++ regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, ++ 0x2 << i, 0); ++ udelay(5); ++ } ++ ++ for (i = 8; i < 16; i++) { ++ regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, ++ BIT(i), 0); ++ udelay(5); ++ } ++ udelay(20); ++ ++ ret = reset_control_assert(pd->rstc); ++ if (ret) ++ return ret; ++ ++ regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ++ GEN_PWR_VPU_HDMI_ISO, 0); ++ ++ ret = reset_control_deassert(pd->rstc); ++ if (ret) ++ return ret; ++ ++ ret = meson_gx_pwrc_vpu_setup_clk(pd); ++ if (ret) ++ return ret; ++ ++ pd->powered = true; ++ ++ return 0; ++} ++ ++static bool meson_gx_pwrc_vpu_get_power(struct meson_gx_pwrc_vpu *pd) ++{ ++ u32 reg; ++ ++ regmap_read(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, ®); ++ ++ return (reg & GEN_PWR_VPU_HDMI); ++} ++ ++static struct meson_gx_pwrc_vpu vpu_hdmi_pd = { ++ .genpd = { ++ .name = "vpu_hdmi", ++ .power_off = meson_gx_pwrc_vpu_power_off, ++ .power_on = meson_gx_pwrc_vpu_power_on, ++ }, ++}; ++ ++static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) ++{ ++ struct regmap *regmap_ao, *regmap_hhi; ++ struct reset_control *rstc; ++ struct clk *vpu_clk; ++ struct clk *vapb_clk; ++ ++ regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node)); ++ if (IS_ERR(regmap_ao)) { ++ dev_err(&pdev->dev, "failed to get regmap\n"); ++ return PTR_ERR(regmap_ao); ++ } ++ ++ regmap_hhi = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "amlogic,hhi-sysctrl"); ++ if (IS_ERR(regmap_hhi)) { ++ dev_err(&pdev->dev, "failed to get HHI regmap\n"); ++ return PTR_ERR(regmap_hhi); ++ } ++ ++ rstc = devm_reset_control_array_get(&pdev->dev, false, false); ++ if (IS_ERR(rstc)) { ++ dev_err(&pdev->dev, "failed to get reset lines\n"); ++ return PTR_ERR(rstc); ++ } ++ ++ vpu_clk = devm_clk_get(&pdev->dev, "vpu"); ++ if (IS_ERR(vpu_clk)) { ++ dev_err(&pdev->dev, "vpu clock request failed\n"); ++ return PTR_ERR(vpu_clk); ++ } ++ ++ vapb_clk = devm_clk_get(&pdev->dev, "vapb"); ++ if (IS_ERR(vapb_clk)) { ++ dev_err(&pdev->dev, "vapb clock request failed\n"); ++ return PTR_ERR(vapb_clk); ++ } ++ ++ vpu_hdmi_pd.regmap_ao = regmap_ao; ++ vpu_hdmi_pd.regmap_hhi = regmap_hhi; ++ vpu_hdmi_pd.rstc = rstc; ++ vpu_hdmi_pd.vpu_clk = vpu_clk; ++ vpu_hdmi_pd.vapb_clk = vapb_clk; ++ ++ pm_genpd_init(&vpu_hdmi_pd.genpd, &simple_qos_governor, ++ meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd)); ++ ++ return of_genpd_add_provider_simple(pdev->dev.of_node, ++ &vpu_hdmi_pd.genpd); ++} ++ ++static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev) ++{ ++ if (vpu_hdmi_pd.powered) ++ meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd); ++} ++ ++static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = { ++ { .compatible = "amlogic,meson-gx-pwrc-vpu" }, ++ { /* sentinel */ } ++}; ++ ++static struct platform_driver meson_gx_pwrc_vpu_driver = { ++ .probe = meson_gx_pwrc_vpu_probe, ++ .shutdown = meson_gx_pwrc_vpu_shutdown, ++ .driver = { ++ .name = "meson_gx_pwrc_vpu", ++ .of_match_table = meson_gx_pwrc_vpu_match_table, ++ }, ++}; ++builtin_platform_driver(meson_gx_pwrc_vpu_driver); +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0020-soc-amlogic-meson-gx-pwrc-vpu-fix-power-off-when-pow.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0020-soc-amlogic-meson-gx-pwrc-vpu-fix-power-off-when-pow.patch new file mode 100644 index 000000000..aa13051f8 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0020-soc-amlogic-meson-gx-pwrc-vpu-fix-power-off-when-pow.patch @@ -0,0 +1,105 @@ +From a2ae223bac1ad40a5bd7ee124b3af735ff445eb9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 3 Nov 2017 16:43:24 +0100 +Subject: [PATCH 20/39] soc: amlogic: meson-gx-pwrc-vpu: fix power-off when + powered by bootloader + +In the case the VPU power domain has been powered on by the bootloader +and no driver are attached to this power domain, the genpd will power it +off after a certain amount of time, but the clocks hasn't been enabled +by the kernel itself and the power-off will trigger some faults. +This patch enable the clocks to have a coherent state for an eventual +poweroff and switches to the pm_domain_always_on_gov governor. + +Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver") +Signed-off-by: Neil Armstrong +Tested-by: Kevin Hilman +--- + drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 29 +++++++++++++++++++---------- + 1 file changed, 19 insertions(+), 10 deletions(-) + +diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +index bf5190b..2bdeebc 100644 +--- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c ++++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +@@ -34,7 +34,6 @@ struct meson_gx_pwrc_vpu { + struct reset_control *rstc; + struct clk *vpu_clk; + struct clk *vapb_clk; +- bool powered; + }; + + static inline +@@ -78,8 +77,6 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd) + clk_disable_unprepare(pd->vpu_clk); + clk_disable_unprepare(pd->vapb_clk); + +- pd->powered = false; +- + return 0; + } + +@@ -91,7 +88,11 @@ static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd) + if (ret) + return ret; + +- return clk_prepare_enable(pd->vapb_clk); ++ ret = clk_prepare_enable(pd->vapb_clk); ++ if (ret) ++ clk_disable_unprepare(pd->vpu_clk); ++ ++ return ret; + } + + static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd) +@@ -139,8 +140,6 @@ static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd) + if (ret) + return ret; + +- pd->powered = true; +- + return 0; + } + +@@ -167,6 +166,8 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) + struct reset_control *rstc; + struct clk *vpu_clk; + struct clk *vapb_clk; ++ bool powered_off; ++ int ret; + + regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node)); + if (IS_ERR(regmap_ao)) { +@@ -205,8 +206,17 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) + vpu_hdmi_pd.vpu_clk = vpu_clk; + vpu_hdmi_pd.vapb_clk = vapb_clk; + +- pm_genpd_init(&vpu_hdmi_pd.genpd, &simple_qos_governor, +- meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd)); ++ powered_off = meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd); ++ ++ /* If already powered, sync the clock states */ ++ if (!powered_off) { ++ ret = meson_gx_pwrc_vpu_setup_clk(&vpu_hdmi_pd); ++ if (ret) ++ return ret; ++ } ++ ++ pm_genpd_init(&vpu_hdmi_pd.genpd, &pm_domain_always_on_gov, ++ powered_off); + + return of_genpd_add_provider_simple(pdev->dev.of_node, + &vpu_hdmi_pd.genpd); +@@ -214,8 +224,7 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) + + static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev) + { +- if (vpu_hdmi_pd.powered) +- meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd); ++ meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd); + } + + static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0021-ASoC-meson-add-meson-audio-core-driver.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0021-ASoC-meson-add-meson-audio-core-driver.patch new file mode 100644 index 000000000..ff9a55e19 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0021-ASoC-meson-add-meson-audio-core-driver.patch @@ -0,0 +1,312 @@ +From f9b447452943415a12055c0fca279281cd28d923 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 11:49:55 +0200 +Subject: [PATCH 21/39] ASoC: meson: add meson audio core driver + +This patch adds support for the audio core driver for the Amlogic Meson SoC +family. The purpose of this driver is to properly reset the audio block and +provide register access for the different devices scattered in this address +space. This includes output and input DMAs, pcm, i2s and spdif dai, card +level routing, internal codec for the gxl variant + +For more information, please refer to the section 5 of the public datasheet +of the S905 (gxbb). This datasheet is available here: [0]. + +[0]: http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + sound/soc/Kconfig | 1 + + sound/soc/Makefile | 1 + + sound/soc/meson/Kconfig | 9 ++ + sound/soc/meson/Makefile | 3 + + sound/soc/meson/audio-core.c | 190 +++++++++++++++++++++++++++++++++++++++++++ + sound/soc/meson/audio-core.h | 28 +++++++ + 6 files changed, 232 insertions(+) + create mode 100644 sound/soc/meson/Kconfig + create mode 100644 sound/soc/meson/Makefile + create mode 100644 sound/soc/meson/audio-core.c + create mode 100644 sound/soc/meson/audio-core.h + +diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig +index c0abad2..7db316f 100644 +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -55,6 +55,7 @@ source "sound/soc/kirkwood/Kconfig" + source "sound/soc/img/Kconfig" + source "sound/soc/intel/Kconfig" + source "sound/soc/mediatek/Kconfig" ++source "sound/soc/meson/Kconfig" + source "sound/soc/mxs/Kconfig" + source "sound/soc/pxa/Kconfig" + source "sound/soc/qcom/Kconfig" +diff --git a/sound/soc/Makefile b/sound/soc/Makefile +index bf8c1e2..d4c0a51 100644 +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -33,6 +33,7 @@ obj-$(CONFIG_SND_SOC) += jz4740/ + obj-$(CONFIG_SND_SOC) += img/ + obj-$(CONFIG_SND_SOC) += intel/ + obj-$(CONFIG_SND_SOC) += mediatek/ ++obj-$(CONFIG_SND_SOC) += meson/ + obj-$(CONFIG_SND_SOC) += mxs/ + obj-$(CONFIG_SND_SOC) += nuc900/ + obj-$(CONFIG_SND_SOC) += omap/ +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +new file mode 100644 +index 0000000..216c850 +--- /dev/null ++++ b/sound/soc/meson/Kconfig +@@ -0,0 +1,9 @@ ++menuconfig SND_SOC_MESON ++ tristate "ASoC support for Amlogic Meson SoCs" ++ depends on ARCH_MESON || COMPILE_TEST ++ select MFD_CORE ++ select REGMAP_MMIO ++ help ++ Say Y or M if you want to add support for codecs attached to ++ the Amlogic Meson SoCs Audio interfaces. You will also need to ++ select the audio interfaces to support below. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +new file mode 100644 +index 0000000..22028ab +--- /dev/null ++++ b/sound/soc/meson/Makefile +@@ -0,0 +1,3 @@ ++snd-soc-meson-audio-core-objs := audio-core.o ++ ++obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o +diff --git a/sound/soc/meson/audio-core.c b/sound/soc/meson/audio-core.c +new file mode 100644 +index 0000000..99993ec +--- /dev/null ++++ b/sound/soc/meson/audio-core.c +@@ -0,0 +1,190 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-audio-core" ++ ++static const char * const acore_clock_names[] = { "aiu_top", ++ "aiu_glue", ++ "audin" }; ++ ++static int meson_acore_init_clocks(struct device *dev) ++{ ++ struct clk *clock; ++ int i, ret; ++ ++ for (i = 0; i < ARRAY_SIZE(acore_clock_names); i++) { ++ clock = devm_clk_get(dev, acore_clock_names[i]); ++ if (IS_ERR(clock)) { ++ if (PTR_ERR(clock) != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get %s clock\n", ++ acore_clock_names[i]); ++ return PTR_ERR(clock); ++ } ++ ++ ret = clk_prepare_enable(clock); ++ if (ret) { ++ dev_err(dev, "Failed to enable %s clock\n", ++ acore_clock_names[i]); ++ return ret; ++ } ++ ++ ret = devm_add_action_or_reset(dev, ++ (void(*)(void *))clk_disable_unprepare, ++ clock); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static const char * const acore_reset_names[] = { "aiu", ++ "audin" }; ++ ++static int meson_acore_init_resets(struct device *dev) ++{ ++ struct reset_control *reset; ++ int i, ret; ++ ++ for (i = 0; i < ARRAY_SIZE(acore_reset_names); i++) { ++ reset = devm_reset_control_get_exclusive(dev, ++ acore_reset_names[i]); ++ if (IS_ERR(reset)) { ++ if (PTR_ERR(reset) != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get %s reset\n", ++ acore_reset_names[i]); ++ return PTR_ERR(reset); ++ } ++ ++ ret = reset_control_reset(reset); ++ if (ret) { ++ dev_err(dev, "Failed to pulse %s reset\n", ++ acore_reset_names[i]); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ ++static const struct regmap_config meson_acore_regmap_config = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++}; ++ ++static const struct mfd_cell meson_acore_devs[] = { ++ { ++ .name = "meson-i2s-dai", ++ .of_compatible = "amlogic,meson-i2s-dai", ++ }, ++ { ++ .name = "meson-spdif-dai", ++ .of_compatible = "amlogic,meson-spdif-dai", ++ }, ++ { ++ .name = "meson-aiu-i2s-dma", ++ .of_compatible = "amlogic,meson-aiu-i2s-dma", ++ }, ++ { ++ .name = "meson-aiu-spdif-dma", ++ .of_compatible = "amlogic,meson-aiu-spdif-dma", ++ }, ++}; ++ ++static int meson_acore_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct meson_audio_core_data *data; ++ struct resource *res; ++ void __iomem *regs; ++ int ret; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, data); ++ ++ ret = meson_acore_init_clocks(dev); ++ if (ret) ++ return ret; ++ ++ ret = meson_acore_init_resets(dev); ++ if (ret) ++ return ret; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aiu"); ++ regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); ++ ++ data->aiu = devm_regmap_init_mmio(dev, regs, ++ &meson_acore_regmap_config); ++ if (IS_ERR(data->aiu)) { ++ dev_err(dev, "Couldn't create the AIU regmap\n"); ++ return PTR_ERR(data->aiu); ++ } ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audin"); ++ regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); ++ ++ data->audin = devm_regmap_init_mmio(dev, regs, ++ &meson_acore_regmap_config); ++ if (IS_ERR(data->audin)) { ++ dev_err(dev, "Couldn't create the AUDIN regmap\n"); ++ return PTR_ERR(data->audin); ++ } ++ ++ return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, meson_acore_devs, ++ ARRAY_SIZE(meson_acore_devs), NULL, 0, ++ NULL); ++} ++ ++static const struct of_device_id meson_acore_of_match[] = { ++ { .compatible = "amlogic,meson-audio-core", }, ++ { .compatible = "amlogic,meson-gxbb-audio-core", }, ++ { .compatible = "amlogic,meson-gxl-audio-core", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, meson_acore_of_match); ++ ++static struct platform_driver meson_acore_pdrv = { ++ .probe = meson_acore_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = meson_acore_of_match, ++ }, ++}; ++module_platform_driver(meson_acore_pdrv); ++ ++MODULE_DESCRIPTION("Meson Audio Core Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +diff --git a/sound/soc/meson/audio-core.h b/sound/soc/meson/audio-core.h +new file mode 100644 +index 0000000..6e7a24c +--- /dev/null ++++ b/sound/soc/meson/audio-core.h +@@ -0,0 +1,28 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _MESON_AUDIO_CORE_H_ ++#define _MESON_AUDIO_CORE_H_ ++ ++struct meson_audio_core_data { ++ struct regmap *aiu; ++ struct regmap *audin; ++}; ++ ++#endif /* _MESON_AUDIO_CORE_H_ */ +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0022-ASoC-meson-add-register-definitions.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0022-ASoC-meson-add-register-definitions.patch new file mode 100644 index 000000000..c040e9f9c --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0022-ASoC-meson-add-register-definitions.patch @@ -0,0 +1,361 @@ +From 71e89b9513f114d45fd43233039a73f678702815 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:00:10 +0200 +Subject: [PATCH 22/39] ASoC: meson: add register definitions + +Add the register definition for the AIU and AUDIN blocks + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + sound/soc/meson/aiu-regs.h | 182 +++++++++++++++++++++++++++++++++++++++++++ + sound/soc/meson/audin-regs.h | 148 +++++++++++++++++++++++++++++++++++ + 2 files changed, 330 insertions(+) + create mode 100644 sound/soc/meson/aiu-regs.h + create mode 100644 sound/soc/meson/audin-regs.h + +diff --git a/sound/soc/meson/aiu-regs.h b/sound/soc/meson/aiu-regs.h +new file mode 100644 +index 0000000..67391e6 +--- /dev/null ++++ b/sound/soc/meson/aiu-regs.h +@@ -0,0 +1,182 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _AIU_REGS_H_ ++#define _AIU_REGS_H_ ++ ++#define AIU_958_BPF 0x000 ++#define AIU_958_BRST 0x004 ++#define AIU_958_LENGTH 0x008 ++#define AIU_958_PADDSIZE 0x00C ++#define AIU_958_MISC 0x010 ++#define AIU_958_FORCE_LEFT 0x014 /* Unknown */ ++#define AIU_958_DISCARD_NUM 0x018 ++#define AIU_958_DCU_FF_CTRL 0x01C ++#define AIU_958_CHSTAT_L0 0x020 ++#define AIU_958_CHSTAT_L1 0x024 ++#define AIU_958_CTRL 0x028 ++#define AIU_958_RPT 0x02C ++#define AIU_I2S_MUTE_SWAP 0x030 ++#define AIU_I2S_SOURCE_DESC 0x034 ++#define AIU_I2S_MED_CTRL 0x038 ++#define AIU_I2S_MED_THRESH 0x03C ++#define AIU_I2S_DAC_CFG 0x040 ++#define AIU_I2S_SYNC 0x044 /* Unknown */ ++#define AIU_I2S_MISC 0x048 ++#define AIU_I2S_OUT_CFG 0x04C ++#define AIU_I2S_FF_CTRL 0x050 /* Unknown */ ++#define AIU_RST_SOFT 0x054 ++#define AIU_CLK_CTRL 0x058 ++#define AIU_MIX_ADCCFG 0x05C ++#define AIU_MIX_CTRL 0x060 ++#define AIU_CLK_CTRL_MORE 0x064 ++#define AIU_958_POP 0x068 ++#define AIU_MIX_GAIN 0x06C ++#define AIU_958_SYNWORD1 0x070 ++#define AIU_958_SYNWORD2 0x074 ++#define AIU_958_SYNWORD3 0x078 ++#define AIU_958_SYNWORD1_MASK 0x07C ++#define AIU_958_SYNWORD2_MASK 0x080 ++#define AIU_958_SYNWORD3_MASK 0x084 ++#define AIU_958_FFRDOUT_THD 0x088 ++#define AIU_958_LENGTH_PER_PAUSE 0x08C ++#define AIU_958_PAUSE_NUM 0x090 ++#define AIU_958_PAUSE_PAYLOAD 0x094 ++#define AIU_958_AUTO_PAUSE 0x098 ++#define AIU_958_PAUSE_PD_LENGTH 0x09C ++#define AIU_CODEC_DAC_LRCLK_CTRL 0x0A0 ++#define AIU_CODEC_ADC_LRCLK_CTRL 0x0A4 ++#define AIU_HDMI_CLK_DATA_CTRL 0x0A8 ++#define AIU_CODEC_CLK_DATA_CTRL 0x0AC ++#define AIU_ACODEC_CTRL 0x0B0 ++#define AIU_958_CHSTAT_R0 0x0C0 ++#define AIU_958_CHSTAT_R1 0x0C4 ++#define AIU_958_VALID_CTRL 0x0C8 ++#define AIU_AUDIO_AMP_REG0 0x0F0 /* Unknown */ ++#define AIU_AUDIO_AMP_REG1 0x0F4 /* Unknown */ ++#define AIU_AUDIO_AMP_REG2 0x0F8 /* Unknown */ ++#define AIU_AUDIO_AMP_REG3 0x0FC /* Unknown */ ++#define AIU_AIFIFO2_CTRL 0x100 ++#define AIU_AIFIFO2_STATUS 0x104 ++#define AIU_AIFIFO2_GBIT 0x108 ++#define AIU_AIFIFO2_CLB 0x10C ++#define AIU_CRC_CTRL 0x110 ++#define AIU_CRC_STATUS 0x114 ++#define AIU_CRC_SHIFT_REG 0x118 ++#define AIU_CRC_IREG 0x11C ++#define AIU_CRC_CAL_REG1 0x120 ++#define AIU_CRC_CAL_REG0 0x124 ++#define AIU_CRC_POLY_COEF1 0x128 ++#define AIU_CRC_POLY_COEF0 0x12C ++#define AIU_CRC_BIT_SIZE1 0x130 ++#define AIU_CRC_BIT_SIZE0 0x134 ++#define AIU_CRC_BIT_CNT1 0x138 ++#define AIU_CRC_BIT_CNT0 0x13C ++#define AIU_AMCLK_GATE_HI 0x140 ++#define AIU_AMCLK_GATE_LO 0x144 ++#define AIU_AMCLK_MSR 0x148 ++#define AIU_AUDAC_CTRL0 0x14C /* Unknown */ ++#define AIU_DELTA_SIGMA0 0x154 /* Unknown */ ++#define AIU_DELTA_SIGMA1 0x158 /* Unknown */ ++#define AIU_DELTA_SIGMA2 0x15C /* Unknown */ ++#define AIU_DELTA_SIGMA3 0x160 /* Unknown */ ++#define AIU_DELTA_SIGMA4 0x164 /* Unknown */ ++#define AIU_DELTA_SIGMA5 0x168 /* Unknown */ ++#define AIU_DELTA_SIGMA6 0x16C /* Unknown */ ++#define AIU_DELTA_SIGMA7 0x170 /* Unknown */ ++#define AIU_DELTA_SIGMA_LCNTS 0x174 /* Unknown */ ++#define AIU_DELTA_SIGMA_RCNTS 0x178 /* Unknown */ ++#define AIU_MEM_I2S_START_PTR 0x180 ++#define AIU_MEM_I2S_RD_PTR 0x184 ++#define AIU_MEM_I2S_END_PTR 0x188 ++#define AIU_MEM_I2S_MASKS 0x18C ++#define AIU_MEM_I2S_CONTROL 0x190 ++#define AIU_MEM_IEC958_START_PTR 0x194 ++#define AIU_MEM_IEC958_RD_PTR 0x198 ++#define AIU_MEM_IEC958_END_PTR 0x19C ++#define AIU_MEM_IEC958_MASKS 0x1A0 ++#define AIU_MEM_IEC958_CONTROL 0x1A4 ++#define AIU_MEM_AIFIFO2_START_PTR 0x1A8 ++#define AIU_MEM_AIFIFO2_CURR_PTR 0x1AC ++#define AIU_MEM_AIFIFO2_END_PTR 0x1B0 ++#define AIU_MEM_AIFIFO2_BYTES_AVAIL 0x1B4 ++#define AIU_MEM_AIFIFO2_CONTROL 0x1B8 ++#define AIU_MEM_AIFIFO2_MAN_WP 0x1BC ++#define AIU_MEM_AIFIFO2_MAN_RP 0x1C0 ++#define AIU_MEM_AIFIFO2_LEVEL 0x1C4 ++#define AIU_MEM_AIFIFO2_BUF_CNTL 0x1C8 ++#define AIU_MEM_I2S_MAN_WP 0x1CC ++#define AIU_MEM_I2S_MAN_RP 0x1D0 ++#define AIU_MEM_I2S_LEVEL 0x1D4 ++#define AIU_MEM_I2S_BUF_CNTL 0x1D8 ++#define AIU_MEM_I2S_BUF_WRAP_COUNT 0x1DC ++#define AIU_MEM_I2S_MEM_CTL 0x1E0 ++#define AIU_MEM_IEC958_MEM_CTL 0x1E4 ++#define AIU_MEM_IEC958_WRAP_COUNT 0x1E8 ++#define AIU_MEM_IEC958_IRQ_LEVEL 0x1EC ++#define AIU_MEM_IEC958_MAN_WP 0x1F0 ++#define AIU_MEM_IEC958_MAN_RP 0x1F4 ++#define AIU_MEM_IEC958_LEVEL 0x1F8 ++#define AIU_MEM_IEC958_BUF_CNTL 0x1FC ++#define AIU_AIFIFO_CTRL 0x200 ++#define AIU_AIFIFO_STATUS 0x204 ++#define AIU_AIFIFO_GBIT 0x208 ++#define AIU_AIFIFO_CLB 0x20C ++#define AIU_MEM_AIFIFO_START_PTR 0x210 ++#define AIU_MEM_AIFIFO_CURR_PTR 0x214 ++#define AIU_MEM_AIFIFO_END_PTR 0x218 ++#define AIU_MEM_AIFIFO_BYTES_AVAIL 0x21C ++#define AIU_MEM_AIFIFO_CONTROL 0x220 ++#define AIU_MEM_AIFIFO_MAN_WP 0x224 ++#define AIU_MEM_AIFIFO_MAN_RP 0x228 ++#define AIU_MEM_AIFIFO_LEVEL 0x22C ++#define AIU_MEM_AIFIFO_BUF_CNTL 0x230 ++#define AIU_MEM_AIFIFO_BUF_WRAP_COUNT 0x234 ++#define AIU_MEM_AIFIFO2_BUF_WRAP_COUNT 0x238 ++#define AIU_MEM_AIFIFO_MEM_CTL 0x23C ++#define AIFIFO_TIME_STAMP_CNTL 0x240 ++#define AIFIFO_TIME_STAMP_SYNC_0 0x244 ++#define AIFIFO_TIME_STAMP_SYNC_1 0x248 ++#define AIFIFO_TIME_STAMP_0 0x24C ++#define AIFIFO_TIME_STAMP_1 0x250 ++#define AIFIFO_TIME_STAMP_2 0x254 ++#define AIFIFO_TIME_STAMP_3 0x258 ++#define AIFIFO_TIME_STAMP_LENGTH 0x25C ++#define AIFIFO2_TIME_STAMP_CNTL 0x260 ++#define AIFIFO2_TIME_STAMP_SYNC_0 0x264 ++#define AIFIFO2_TIME_STAMP_SYNC_1 0x268 ++#define AIFIFO2_TIME_STAMP_0 0x26C ++#define AIFIFO2_TIME_STAMP_1 0x270 ++#define AIFIFO2_TIME_STAMP_2 0x274 ++#define AIFIFO2_TIME_STAMP_3 0x278 ++#define AIFIFO2_TIME_STAMP_LENGTH 0x27C ++#define IEC958_TIME_STAMP_CNTL 0x280 ++#define IEC958_TIME_STAMP_SYNC_0 0x284 ++#define IEC958_TIME_STAMP_SYNC_1 0x288 ++#define IEC958_TIME_STAMP_0 0x28C ++#define IEC958_TIME_STAMP_1 0x290 ++#define IEC958_TIME_STAMP_2 0x294 ++#define IEC958_TIME_STAMP_3 0x298 ++#define IEC958_TIME_STAMP_LENGTH 0x29C ++#define AIU_MEM_AIFIFO2_MEM_CTL 0x2A0 ++#define AIU_I2S_CBUS_DDR_CNTL 0x2A4 ++#define AIU_I2S_CBUS_DDR_WDATA 0x2A8 ++#define AIU_I2S_CBUS_DDR_ADDR 0x2AC ++ ++#endif /* _AIU_REGS_H_ */ +diff --git a/sound/soc/meson/audin-regs.h b/sound/soc/meson/audin-regs.h +new file mode 100644 +index 0000000..f224610 +--- /dev/null ++++ b/sound/soc/meson/audin-regs.h +@@ -0,0 +1,148 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#ifndef _AUDIN_REGS_H_ ++#define _AUDIN_REGS_H_ ++ ++/* ++ * Note : ++ * Datasheet issue page 196 ++ * AUDIN_MUTE_VAL 0x35 => impossible: Already assigned to AUDIN_FIFO1_PTR ++ * AUDIN_FIFO1_PTR is more likely to be correct here since surrounding registers ++ * also deal with AUDIN_FIFO1 ++ * ++ * Clarification needed from Amlogic ++ */ ++ ++#define AUDIN_SPDIF_MODE 0x000 ++#define AUDIN_SPDIF_FS_CLK_RLTN 0x004 ++#define AUDIN_SPDIF_CHNL_STS_A 0x008 ++#define AUDIN_SPDIF_CHNL_STS_B 0x00C ++#define AUDIN_SPDIF_MISC 0x010 ++#define AUDIN_SPDIF_NPCM_PCPD 0x014 ++#define AUDIN_SPDIF_END 0x03C /* Unknown */ ++#define AUDIN_I2SIN_CTRL 0x040 ++#define AUDIN_SOURCE_SEL 0x044 ++#define AUDIN_DECODE_FORMAT 0x048 ++#define AUDIN_DECODE_CONTROL_STATUS 0x04C ++#define AUDIN_DECODE_CHANNEL_STATUS_A_0 0x050 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_1 0x054 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_2 0x058 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_3 0x05C ++#define AUDIN_DECODE_CHANNEL_STATUS_A_4 0x060 ++#define AUDIN_DECODE_CHANNEL_STATUS_A_5 0x064 ++#define AUDIN_FIFO0_START 0x080 ++#define AUDIN_FIFO0_END 0x084 ++#define AUDIN_FIFO0_PTR 0x088 ++#define AUDIN_FIFO0_INTR 0x08C ++#define AUDIN_FIFO0_RDPTR 0x090 ++#define AUDIN_FIFO0_CTRL 0x094 ++#define AUDIN_FIFO0_CTRL1 0x098 ++#define AUDIN_FIFO0_LVL0 0x09C ++#define AUDIN_FIFO0_LVL1 0x0A0 ++#define AUDIN_FIFO0_LVL2 0x0A4 ++#define AUDIN_FIFO0_REQID 0x0C0 ++#define AUDIN_FIFO0_WRAP 0x0C4 ++#define AUDIN_FIFO1_START 0x0CC ++#define AUDIN_FIFO1_END 0x0D0 ++#define AUDIN_FIFO1_PTR 0x0D4 ++#define AUDIN_FIFO1_INTR 0x0D8 ++#define AUDIN_FIFO1_RDPTR 0x0DC ++#define AUDIN_FIFO1_CTRL 0x0E0 ++#define AUDIN_FIFO1_CTRL1 0x0E4 ++#define AUDIN_FIFO1_LVL0 0x100 ++#define AUDIN_FIFO1_LVL1 0x104 ++#define AUDIN_FIFO1_LVL2 0x108 ++#define AUDIN_FIFO1_REQID 0x10C ++#define AUDIN_FIFO1_WRAP 0x110 ++#define AUDIN_FIFO2_START 0x114 ++#define AUDIN_FIFO2_END 0x118 ++#define AUDIN_FIFO2_PTR 0x11C ++#define AUDIN_FIFO2_INTR 0x120 ++#define AUDIN_FIFO2_RDPTR 0x124 ++#define AUDIN_FIFO2_CTRL 0x128 ++#define AUDIN_FIFO2_CTRL1 0x12C ++#define AUDIN_FIFO2_LVL0 0x130 ++#define AUDIN_FIFO2_LVL1 0x134 ++#define AUDIN_FIFO2_LVL2 0x138 ++#define AUDIN_FIFO2_REQID 0x13C ++#define AUDIN_FIFO2_WRAP 0x140 ++#define AUDIN_INT_CTRL 0x144 ++#define AUDIN_FIFO_INT 0x148 ++#define PCMIN_CTRL0 0x180 ++#define PCMIN_CTRL1 0x184 ++#define PCMIN1_CTRL0 0x188 ++#define PCMIN1_CTRL1 0x18C ++#define PCMOUT_CTRL0 0x1C0 ++#define PCMOUT_CTRL1 0x1C4 ++#define PCMOUT_CTRL2 0x1C8 ++#define PCMOUT_CTRL3 0x1CC ++#define PCMOUT1_CTRL0 0x1D0 ++#define PCMOUT1_CTRL1 0x1D4 ++#define PCMOUT1_CTRL2 0x1D8 ++#define PCMOUT1_CTRL3 0x1DC ++#define AUDOUT_CTRL 0x200 ++#define AUDOUT_CTRL1 0x204 ++#define AUDOUT_BUF0_STA 0x208 ++#define AUDOUT_BUF0_EDA 0x20C ++#define AUDOUT_BUF0_WPTR 0x210 ++#define AUDOUT_BUF1_STA 0x214 ++#define AUDOUT_BUF1_EDA 0x218 ++#define AUDOUT_BUF1_WPTR 0x21C ++#define AUDOUT_FIFO_RPTR 0x220 ++#define AUDOUT_INTR_PTR 0x224 ++#define AUDOUT_FIFO_STS 0x228 ++#define AUDOUT1_CTRL 0x240 ++#define AUDOUT1_CTRL1 0x244 ++#define AUDOUT1_BUF0_STA 0x248 ++#define AUDOUT1_BUF0_EDA 0x24C ++#define AUDOUT1_BUF0_WPTR 0x250 ++#define AUDOUT1_BUF1_STA 0x254 ++#define AUDOUT1_BUF1_EDA 0x258 ++#define AUDOUT1_BUF1_WPTR 0x25C ++#define AUDOUT1_FIFO_RPTR 0x260 ++#define AUDOUT1_INTR_PTR 0x264 ++#define AUDOUT1_FIFO_STS 0x268 ++#define AUDIN_HDMI_MEAS_CTRL 0x280 ++#define AUDIN_HDMI_MEAS_CYCLES_M1 0x284 ++#define AUDIN_HDMI_MEAS_INTR_MASKN 0x288 ++#define AUDIN_HDMI_MEAS_INTR_STAT 0x28C ++#define AUDIN_HDMI_REF_CYCLES_STAT_0 0x290 ++#define AUDIN_HDMI_REF_CYCLES_STAT_1 0x294 ++#define AUDIN_HDMIRX_AFIFO_STAT 0x298 ++#define AUDIN_FIFO0_PIO_STS 0x2C0 ++#define AUDIN_FIFO0_PIO_RDL 0x2C4 ++#define AUDIN_FIFO0_PIO_RDH 0x2C8 ++#define AUDIN_FIFO1_PIO_STS 0x2CC ++#define AUDIN_FIFO1_PIO_RDL 0x2D0 ++#define AUDIN_FIFO1_PIO_RDH 0x2D4 ++#define AUDIN_FIFO2_PIO_STS 0x2D8 ++#define AUDIN_FIFO2_PIO_RDL 0x2DC ++#define AUDIN_FIFO2_PIO_RDH 0x2E0 ++#define AUDOUT_FIFO_PIO_STS 0x2E4 ++#define AUDOUT_FIFO_PIO_WRL 0x2E8 ++#define AUDOUT_FIFO_PIO_WRH 0x2EC ++#define AUDOUT1_FIFO_PIO_STS 0x2F0 /* Unknown */ ++#define AUDOUT1_FIFO_PIO_WRL 0x2F4 /* Unknown */ ++#define AUDOUT1_FIFO_PIO_WRH 0x2F8 /* Unknown */ ++#define AUD_RESAMPLE_CTRL0 0x2FC ++#define AUD_RESAMPLE_CTRL1 0x300 ++#define AUD_RESAMPLE_STATUS 0x304 ++ ++#endif /* _AUDIN_REGS_H_ */ +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0023-ASoC-meson-add-aiu-i2s-dma-support.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0023-ASoC-meson-add-aiu-i2s-dma-support.patch new file mode 100644 index 000000000..edb19292b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0023-ASoC-meson-add-aiu-i2s-dma-support.patch @@ -0,0 +1,417 @@ +From 03285555d8cbb3eb1f4991b758e5804a3c19b4ce Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:14:40 +0200 +Subject: [PATCH 23/39] ASoC: meson: add aiu i2s dma support + +Add support for the i2s output dma which is part of the AIU block + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + sound/soc/meson/Kconfig | 7 + + sound/soc/meson/Makefile | 2 + + sound/soc/meson/aiu-i2s-dma.c | 367 ++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 376 insertions(+) + create mode 100644 sound/soc/meson/aiu-i2s-dma.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index 216c850..ad31a11 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -7,3 +7,10 @@ menuconfig SND_SOC_MESON + Say Y or M if you want to add support for codecs attached to + the Amlogic Meson SoCs Audio interfaces. You will also need to + select the audio interfaces to support below. ++ ++config SND_SOC_MESON_I2S ++ tristate "Meson i2s interface" ++ depends on SND_SOC_MESON ++ help ++ Say Y or M if you want to add support for i2s dma driver for Amlogic ++ Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index 22028ab..273f275 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -1,3 +1,5 @@ + snd-soc-meson-audio-core-objs := audio-core.o ++snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o + + obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o +diff --git a/sound/soc/meson/aiu-i2s-dma.c b/sound/soc/meson/aiu-i2s-dma.c +new file mode 100644 +index 0000000..bab950d +--- /dev/null ++++ b/sound/soc/meson/aiu-i2s-dma.c +@@ -0,0 +1,367 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-aiu-i2s-dma" ++ ++struct aiu_i2s_dma { ++ struct meson_audio_core_data *core; ++ struct clk *fast; ++ int irq; ++}; ++ ++#define AIU_MEM_I2S_BUF_CNTL_INIT BIT(0) ++#define AIU_MEM_I2S_CONTROL_INIT BIT(0) ++#define AIU_MEM_I2S_CONTROL_FILL_EN BIT(1) ++#define AIU_MEM_I2S_CONTROL_EMPTY_EN BIT(2) ++#define AIU_MEM_I2S_CONTROL_MODE_16BIT BIT(6) ++#define AIU_MEM_I2S_CONTROL_BUSY BIT(7) ++#define AIU_MEM_I2S_CONTROL_DATA_READY BIT(8) ++#define AIU_MEM_I2S_CONTROL_LEVEL_CNTL BIT(9) ++#define AIU_MEM_I2S_MASKS_IRQ_BLOCK_MASK GENMASK(31, 16) ++#define AIU_MEM_I2S_MASKS_IRQ_BLOCK(n) ((n) << 16) ++#define AIU_MEM_I2S_MASKS_CH_MEM_MASK GENMASK(15, 8) ++#define AIU_MEM_I2S_MASKS_CH_MEM(ch) ((ch) << 8) ++#define AIU_MEM_I2S_MASKS_CH_RD_MASK GENMASK(7, 0) ++#define AIU_MEM_I2S_MASKS_CH_RD(ch) ((ch) << 0) ++#define AIU_RST_SOFT_I2S_FAST_DOMAIN BIT(0) ++#define AIU_RST_SOFT_I2S_SLOW_DOMAIN BIT(1) ++ ++/* ++ * The DMA works by i2s "blocks" (or DMA burst). The burst size and the memory ++ * layout expected depends on the mode of operation. ++ * ++ * - Normal mode: The channels are expected to be packed in 32 bytes groups ++ * interleaved the buffer. AIU_MEM_I2S_MASKS_CH_MEM is a bitfield representing ++ * the channels present in memory. AIU_MEM_I2S_MASKS_CH_MEM represents the ++ * channels read by the DMA. This is very flexible but the unsual memory layout ++ * makes it less easy to deal with. The burst size is 32 bytes times the number ++ * of channels read. ++ * ++ * - Split mode: ++ * Classical channel interleaved frame organisation. In this mode, ++ * AIU_MEM_I2S_MASKS_CH_MEM and AIU_MEM_I2S_MASKS_CH_MEM must be set to 0xff and ++ * the burst size is fixed to 256 bytes. The input can be either 2 or 8 ++ * channels. ++ * ++ * The following driver implements the split mode. ++ */ ++ ++#define AIU_I2S_DMA_BURST 256 ++ ++static struct snd_pcm_hardware aiu_i2s_dma_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_MMAP | ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_PAUSE), ++ ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE | ++ SNDRV_PCM_FMTBIT_S32_LE), ++ ++ /* ++ * TODO: The DMA can change the endianness, the msb position ++ * and deal with unsigned - support this later on ++ */ ++ ++ .rate_min = 8000, ++ .rate_max = 192000, ++ .channels_min = 2, ++ .channels_max = 8, ++ .period_bytes_min = AIU_I2S_DMA_BURST, ++ .period_bytes_max = AIU_I2S_DMA_BURST * 65535, ++ .periods_min = 2, ++ .periods_max = UINT_MAX, ++ .buffer_bytes_max = 1 * 1024 * 1024, ++ .fifo_size = 0, ++}; ++ ++static struct aiu_i2s_dma *aiu_i2s_dma_priv(struct snd_pcm_substream *s) ++{ ++ struct snd_soc_pcm_runtime *rtd = s->private_data; ++ ++ return snd_soc_platform_get_drvdata(rtd->platform); ++} ++ ++static snd_pcm_uframes_t ++aiu_i2s_dma_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ unsigned int addr; ++ int ret; ++ ++ ret = regmap_read(priv->core->aiu, AIU_MEM_I2S_RD_PTR, ++ &addr); ++ if (ret) ++ return 0; ++ ++ return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); ++} ++ ++static void __dma_enable(struct aiu_i2s_dma *priv, bool enable) ++{ ++ unsigned int en_mask = (AIU_MEM_I2S_CONTROL_FILL_EN | ++ AIU_MEM_I2S_CONTROL_EMPTY_EN); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, en_mask, ++ enable ? en_mask : 0); ++ ++} ++ ++static int aiu_i2s_dma_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __dma_enable(priv, true); ++ break; ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ case SNDRV_PCM_TRIGGER_STOP: ++ __dma_enable(priv, false); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static void __dma_init_mem(struct aiu_i2s_dma *priv) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_INIT, ++ AIU_MEM_I2S_CONTROL_INIT); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, ++ AIU_MEM_I2S_BUF_CNTL_INIT, ++ AIU_MEM_I2S_BUF_CNTL_INIT); ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_INIT, ++ 0); ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_BUF_CNTL, ++ AIU_MEM_I2S_BUF_CNTL_INIT, ++ 0); ++} ++ ++static int aiu_i2s_dma_prepare(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ __dma_init_mem(priv); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ int ret; ++ u32 burst_num, mem_ctl; ++ dma_addr_t end_ptr; ++ ++ ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); ++ if (ret < 0) ++ return ret; ++ ++ /* Setup memory layout */ ++ if (params_physical_width(params) == 16) ++ mem_ctl = AIU_MEM_I2S_CONTROL_MODE_16BIT; ++ else ++ mem_ctl = 0; ++ ++ regmap_update_bits(priv->core->aiu, AIU_MEM_I2S_CONTROL, ++ AIU_MEM_I2S_CONTROL_MODE_16BIT, ++ mem_ctl); ++ ++ /* Initialize memory pointers */ ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_START_PTR, runtime->dma_addr); ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_RD_PTR, runtime->dma_addr); ++ ++ /* The end pointer is the address of the last valid block */ ++ end_ptr = runtime->dma_addr + runtime->dma_bytes - AIU_I2S_DMA_BURST; ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_END_PTR, end_ptr); ++ ++ /* Memory masks */ ++ burst_num = params_period_bytes(params) / AIU_I2S_DMA_BURST; ++ regmap_write(priv->core->aiu, AIU_MEM_I2S_MASKS, ++ AIU_MEM_I2S_MASKS_CH_RD(0xff) | ++ AIU_MEM_I2S_MASKS_CH_MEM(0xff) | ++ AIU_MEM_I2S_MASKS_IRQ_BLOCK(burst_num)); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_hw_free(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++ ++static irqreturn_t aiu_i2s_dma_irq_block(int irq, void *dev_id) ++{ ++ struct snd_pcm_substream *playback = dev_id; ++ ++ snd_pcm_period_elapsed(playback); ++ ++ return IRQ_HANDLED; ++} ++ ++static int aiu_i2s_dma_open(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ int ret; ++ ++ snd_soc_set_runtime_hwparams(substream, &aiu_i2s_dma_hw); ++ ++ /* ++ * Make sure the buffer and period size are multiple of the DMA burst ++ * size ++ */ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES, ++ AIU_I2S_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ ret = snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES, ++ AIU_I2S_DMA_BURST); ++ if (ret) ++ return ret; ++ ++ /* Request the I2S DDR irq */ ++ ret = request_irq(priv->irq, aiu_i2s_dma_irq_block, 0, ++ DRV_NAME, substream); ++ if (ret) ++ return ret; ++ ++ /* Power up the i2s fast domain - can't write the registers w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ return ret; ++ ++ /* Make sure the dma is initially disabled */ ++ __dma_enable(priv, false); ++ ++ return 0; ++} ++ ++static int aiu_i2s_dma_close(struct snd_pcm_substream *substream) ++{ ++ struct aiu_i2s_dma *priv = aiu_i2s_dma_priv(substream); ++ ++ clk_disable_unprepare(priv->fast); ++ free_irq(priv->irq, substream); ++ ++ return 0; ++} ++ ++static const struct snd_pcm_ops aiu_i2s_dma_ops = { ++ .open = aiu_i2s_dma_open, ++ .close = aiu_i2s_dma_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = aiu_i2s_dma_hw_params, ++ .hw_free = aiu_i2s_dma_hw_free, ++ .prepare = aiu_i2s_dma_prepare, ++ .pointer = aiu_i2s_dma_pointer, ++ .trigger = aiu_i2s_dma_trigger, ++}; ++ ++static int aiu_i2s_dma_new(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_card *card = rtd->card->snd_card; ++ size_t size = aiu_i2s_dma_hw.buffer_bytes_max; ++ ++ return snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, ++ SNDRV_DMA_TYPE_DEV, ++ card->dev, size, size); ++} ++ ++struct snd_soc_platform_driver aiu_i2s_platform = { ++ .ops = &aiu_i2s_dma_ops, ++ .pcm_new = aiu_i2s_dma_new, ++}; ++ ++static int aiu_i2s_dma_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct aiu_i2s_dma *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get i2s fast domain clock\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->irq = platform_get_irq(pdev, 0); ++ if (priv->irq <= 0) { ++ dev_err(dev, "Can't get i2s ddr irq\n"); ++ return priv->irq; ++ } ++ ++ return snd_soc_register_platform(dev, &aiu_i2s_platform); ++} ++ ++static const struct of_device_id aiu_i2s_dma_of_match[] = { ++ { .compatible = "amlogic,meson-aiu-i2s-dma", }, ++ { .compatible = "amlogic,meson-gxbb-aiu-i2s-dma", }, ++ { .compatible = "amlogic,meson-gxl-aiu-i2s-dma", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, aiu_i2s_dma_of_match); ++ ++static struct platform_driver aiu_i2s_dma_pdrv = { ++ .probe = aiu_i2s_dma_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = aiu_i2s_dma_of_match, ++ }, ++}; ++module_platform_driver(aiu_i2s_dma_pdrv); ++ ++MODULE_DESCRIPTION("Meson AIU i2s DMA ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0024-ASoC-meson-add-initial-i2s-dai-support.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0024-ASoC-meson-add-initial-i2s-dai-support.patch new file mode 100644 index 000000000..cfd5f78bd --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0024-ASoC-meson-add-initial-i2s-dai-support.patch @@ -0,0 +1,515 @@ +From e273b0687bfb891ca4962dfe96e174371853ae89 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Thu, 30 Mar 2017 12:17:27 +0200 +Subject: [PATCH 24/39] ASoC: meson: add initial i2s dai support + +Add support for the i2s dai found on Amlogic Meson SoC family. +With this initial implementation, only playback is supported. +Capture will be part of furture work. + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + sound/soc/meson/Kconfig | 2 +- + sound/soc/meson/Makefile | 2 + + sound/soc/meson/i2s-dai.c | 465 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 468 insertions(+), 1 deletion(-) + create mode 100644 sound/soc/meson/i2s-dai.c + +diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig +index ad31a11..604c9e2 100644 +--- a/sound/soc/meson/Kconfig ++++ b/sound/soc/meson/Kconfig +@@ -12,5 +12,5 @@ config SND_SOC_MESON_I2S + tristate "Meson i2s interface" + depends on SND_SOC_MESON + help +- Say Y or M if you want to add support for i2s dma driver for Amlogic ++ Say Y or M if you want to add support for i2s driver for Amlogic + Meson SoCs. +diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile +index 273f275..ea06dde 100644 +--- a/sound/soc/meson/Makefile ++++ b/sound/soc/meson/Makefile +@@ -1,5 +1,7 @@ + snd-soc-meson-audio-core-objs := audio-core.o + snd-soc-meson-aiu-i2s-dma-objs := aiu-i2s-dma.o ++snd-soc-meson-i2s-dai-objs := i2s-dai.o + + obj-$(CONFIG_SND_SOC_MESON) += snd-soc-meson-audio-core.o + obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-aiu-i2s-dma.o ++obj-$(CONFIG_SND_SOC_MESON_I2S) += snd-soc-meson-i2s-dai.o +diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c +new file mode 100644 +index 0000000..1008af8 +--- /dev/null ++++ b/sound/soc/meson/i2s-dai.c +@@ -0,0 +1,465 @@ ++/* ++ * Copyright (C) 2017 BayLibre, SAS ++ * Author: Jerome Brunet ++ * Copyright (C) 2017 Amlogic, Inc. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "aiu-regs.h" ++#include "audio-core.h" ++ ++#define DRV_NAME "meson-i2s-dai" ++ ++struct meson_i2s_dai { ++ struct meson_audio_core_data *core; ++ struct clk *mclk; ++ struct clk *bclks; ++ struct clk *iface; ++ struct clk *fast; ++ bool bclks_idle; ++}; ++ ++#define AIU_CLK_CTRL_I2S_DIV_EN BIT(0) ++#define AIU_CLK_CTRL_I2S_DIV_MASK GENMASK(3, 2) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_MASK BIT(6) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL (0 << 6) ++#define AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED (1 << 6) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_MASK BIT(7) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL (0 << 7) ++#define AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED (1 << 7) ++#define AIU_CLK_CTRL_ALRCLK_SKEW_MASK GENMASK(9, 8) ++#define AIU_CLK_CTRL_ALRCLK_LEFT_J (0 << 8) ++#define AIU_CLK_CTRL_ALRCLK_I2S (1 << 8) ++#define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) ++#define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) ++#define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) ++#define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) ++#define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) ++#define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) ++#define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) ++#define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) ++#define AIU_I2S_DAC_CFG_AOCLK_64 (3 << 0) ++#define AIU_I2S_MISC_HOLD_EN BIT(2) ++#define AIU_I2S_SOURCE_DESC_MODE_8CH BIT(0) ++#define AIU_I2S_SOURCE_DESC_MODE_24BIT BIT(5) ++#define AIU_I2S_SOURCE_DESC_MODE_32BIT BIT(9) ++#define AIU_I2S_SOURCE_DESC_MODE_SPLIT BIT(11) ++ ++static void __hold(struct meson_i2s_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_MISC, ++ AIU_I2S_MISC_HOLD_EN, ++ enable ? AIU_I2S_MISC_HOLD_EN : 0); ++} ++ ++static void __divider_enable(struct meson_i2s_dai *priv, bool enable) ++{ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_I2S_DIV_EN, ++ enable ? AIU_CLK_CTRL_I2S_DIV_EN : 0); ++} ++ ++static void __playback_start(struct meson_i2s_dai *priv) ++{ ++ __divider_enable(priv, true); ++ __hold(priv, false); ++} ++ ++static void __playback_stop(struct meson_i2s_dai *priv, bool clk_force) ++{ ++ __hold(priv, true); ++ /* Disable the bit clks if necessary */ ++ if (clk_force || !priv->bclks_idle) ++ __divider_enable(priv, false); ++} ++ ++static int meson_i2s_dai_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ bool clk_force_stop = false; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ __playback_start(priv); ++ return 0; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ clk_force_stop = true; ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ __playback_stop(priv, clk_force_stop); ++ return 0; ++ ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int __bclks_set_rate(struct meson_i2s_dai *priv, unsigned int srate, ++ unsigned int width) ++{ ++ unsigned int fs; ++ ++ /* Get the oversampling factor */ ++ fs = DIV_ROUND_CLOSEST(clk_get_rate(priv->mclk), srate); ++ ++ /* ++ * This DAI is usually connected to the dw-hdmi which does not support ++ * bclk being 32 * lrclk or 48 * lrclk ++ * Restrict to blck = 64 * lrclk ++ */ ++ if (fs % 64) ++ return -EINVAL; ++ ++ /* Set the divider between lrclk and bclk */ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_DAC_CFG, ++ AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK, ++ AIU_I2S_DAC_CFG_AOCLK_64); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CODEC_DAC_LRCLK_CTRL, ++ AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK, ++ AIU_CODEC_DAC_LRCLK_CTRL_DIV(64)); ++ ++ /* Use CLK_MORE for the i2s divider */ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_I2S_DIV_MASK, ++ 0); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, ++ AIU_CLK_CTRL_MORE_I2S_DIV_MASK, ++ AIU_CLK_CTRL_MORE_I2S_DIV(fs / 64)); ++ ++ return 0; ++} ++ ++static int __setup_desc(struct meson_i2s_dai *priv, unsigned int width, ++ unsigned int channels) ++{ ++ u32 desc = 0; ++ ++ switch (width) { ++ case 24: ++ /* ++ * For some reason, 24 bits wide audio don't play well ++ * if the 32 bits mode is not set ++ */ ++ desc |= (AIU_I2S_SOURCE_DESC_MODE_24BIT | ++ AIU_I2S_SOURCE_DESC_MODE_32BIT); ++ break; ++ case 16: ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ switch (channels) { ++ case 2: /* Nothing to do */ ++ break; ++ case 8: ++ /* TODO: Still requires testing ... */ ++ desc |= AIU_I2S_SOURCE_DESC_MODE_8CH; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, ++ AIU_I2S_SOURCE_DESC_MODE_8CH | ++ AIU_I2S_SOURCE_DESC_MODE_24BIT | ++ AIU_I2S_SOURCE_DESC_MODE_32BIT, ++ desc); ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ unsigned int width = params_width(params); ++ unsigned int channels = params_channels(params); ++ unsigned int rate = params_rate(params); ++ int ret; ++ ++ ret = __setup_desc(priv, width, channels); ++ if (ret) { ++ dev_err(dai->dev, "Unable set to set i2s description\n"); ++ return ret; ++ } ++ ++ ret = __bclks_set_rate(priv, rate, width); ++ if (ret) { ++ dev_err(dai->dev, "Unable set to the i2s clock rates\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ u32 val; ++ ++ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) ++ return -EINVAL; ++ ++ /* DAI output mode */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ val = AIU_CLK_CTRL_ALRCLK_I2S; ++ break; ++ case SND_SOC_DAIFMT_LEFT_J: ++ val = AIU_CLK_CTRL_ALRCLK_LEFT_J; ++ break; ++ case SND_SOC_DAIFMT_RIGHT_J: ++ val = AIU_CLK_CTRL_ALRCLK_RIGHT_J; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_ALRCLK_SKEW_MASK, ++ val); ++ ++ /* DAI clock polarity */ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_IB_IF: ++ /* Invert both clocks */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | ++ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; ++ break; ++ case SND_SOC_DAIFMT_IB_NF: ++ /* Invert bit clock */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | ++ AIU_CLK_CTRL_AOCLK_POLARITY_INVERTED; ++ break; ++ case SND_SOC_DAIFMT_NB_IF: ++ /* Invert frame clock */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_INVERTED | ++ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; ++ break; ++ case SND_SOC_DAIFMT_NB_NF: ++ /* Normal clocks */ ++ val = AIU_CLK_CTRL_ALRCLK_POLARITY_NORMAL | ++ AIU_CLK_CTRL_AOCLK_POLARITY_NORMAL; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL, ++ AIU_CLK_CTRL_ALRCLK_POLARITY_MASK | ++ AIU_CLK_CTRL_AOCLK_POLARITY_MASK, ++ val); ++ ++ switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { ++ case SND_SOC_DAIFMT_CONT: ++ priv->bclks_idle = true; ++ break; ++ case SND_SOC_DAIFMT_GATED: ++ priv->bclks_idle = false; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, ++ unsigned int freq, int dir) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ if (WARN_ON(clk_id != 0)) ++ return -EINVAL; ++ ++ if (dir == SND_SOC_CLOCK_IN) ++ return 0; ++ ++ ret = clk_set_rate(priv->mclk, freq); ++ if (ret) { ++ dev_err(dai->dev, "Failed to set sysclk to %uHz", freq); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int meson_i2s_dai_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ int ret; ++ ++ /* Power up the i2s fast domain - can't write the registers w/o it */ ++ ret = clk_prepare_enable(priv->fast); ++ if (ret) ++ goto out_clk_fast; ++ ++ /* Make sure nothing gets out of the DAI yet */ ++ __hold(priv, true); ++ ++ /* I2S encoder needs the mixer interface gate */ ++ ret = clk_prepare_enable(priv->iface); ++ if (ret) ++ goto out_clk_iface; ++ ++ /* Enable the i2s master clock */ ++ ret = clk_prepare_enable(priv->mclk); ++ if (ret) ++ goto out_mclk; ++ ++ /* Enable the bit clock gate */ ++ ret = clk_prepare_enable(priv->bclks); ++ if (ret) ++ goto out_bclks; ++ ++ /* Make sure the interface expect a memory layout we can work with */ ++ regmap_update_bits(priv->core->aiu, AIU_I2S_SOURCE_DESC, ++ AIU_I2S_SOURCE_DESC_MODE_SPLIT, ++ AIU_I2S_SOURCE_DESC_MODE_SPLIT); ++ ++ return 0; ++ ++out_bclks: ++ clk_disable_unprepare(priv->mclk); ++out_mclk: ++ clk_disable_unprepare(priv->iface); ++out_clk_iface: ++ clk_disable_unprepare(priv->fast); ++out_clk_fast: ++ return ret; ++} ++ ++static void meson_i2s_dai_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct meson_i2s_dai *priv = snd_soc_dai_get_drvdata(dai); ++ ++ clk_disable_unprepare(priv->bclks); ++ clk_disable_unprepare(priv->mclk); ++ clk_disable_unprepare(priv->iface); ++ clk_disable_unprepare(priv->fast); ++} ++ ++static const struct snd_soc_dai_ops meson_i2s_dai_ops = { ++ .startup = meson_i2s_dai_startup, ++ .shutdown = meson_i2s_dai_shutdown, ++ .trigger = meson_i2s_dai_trigger, ++ .hw_params = meson_i2s_dai_hw_params, ++ .set_fmt = meson_i2s_dai_set_fmt, ++ .set_sysclk = meson_i2s_dai_set_sysclk, ++}; ++ ++static struct snd_soc_dai_driver meson_i2s_dai = { ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 8, ++ .rates = SNDRV_PCM_RATE_8000_192000, ++ .formats = (SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE) ++ }, ++ .ops = &meson_i2s_dai_ops, ++}; ++ ++static const struct snd_soc_component_driver meson_i2s_dai_component = { ++ .name = DRV_NAME, ++}; ++ ++static int meson_i2s_dai_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct meson_i2s_dai *priv; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, priv); ++ priv->core = dev_get_drvdata(dev->parent); ++ ++ priv->fast = devm_clk_get(dev, "fast"); ++ if (IS_ERR(priv->fast)) { ++ if (PTR_ERR(priv->fast) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get the i2s fast domain clock\n"); ++ return PTR_ERR(priv->fast); ++ } ++ ++ priv->iface = devm_clk_get(dev, "iface"); ++ if (IS_ERR(priv->iface)) { ++ if (PTR_ERR(priv->iface) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get i2s dai clock gate\n"); ++ return PTR_ERR(priv->iface); ++ } ++ ++ priv->bclks = devm_clk_get(dev, "bclks"); ++ if (IS_ERR(priv->bclks)) { ++ if (PTR_ERR(priv->bclks) != -EPROBE_DEFER) ++ dev_err(dev, "Can't get bit clocks gate\n"); ++ return PTR_ERR(priv->bclks); ++ } ++ ++ priv->mclk = devm_clk_get(dev, "mclk"); ++ if (IS_ERR(priv->mclk)) { ++ if (PTR_ERR(priv->mclk) != -EPROBE_DEFER) ++ dev_err(dev, "failed to get the i2s master clock\n"); ++ return PTR_ERR(priv->mclk); ++ } ++ ++ return devm_snd_soc_register_component(dev, &meson_i2s_dai_component, ++ &meson_i2s_dai, 1); ++} ++ ++static const struct of_device_id meson_i2s_dai_of_match[] = { ++ { .compatible = "amlogic,meson-i2s-dai", }, ++ { .compatible = "amlogic,meson-gxbb-i2s-dai", }, ++ { .compatible = "amlogic,meson-gxl-i2s-dai", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, meson_i2s_dai_of_match); ++ ++static struct platform_driver meson_i2s_dai_pdrv = { ++ .probe = meson_i2s_dai_probe, ++ .driver = { ++ .name = DRV_NAME, ++ .of_match_table = meson_i2s_dai_of_match, ++ }, ++}; ++module_platform_driver(meson_i2s_dai_pdrv); ++ ++MODULE_DESCRIPTION("Meson i2s DAI ASoC Driver"); ++MODULE_AUTHOR("Jerome Brunet "); ++MODULE_LICENSE("GPL v2"); +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0025-snd-meson-activate-HDMI-audio-path.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0025-snd-meson-activate-HDMI-audio-path.patch new file mode 100644 index 000000000..c3fadbccd --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0025-snd-meson-activate-HDMI-audio-path.patch @@ -0,0 +1,55 @@ +From f40a0d725ebdad433383010d1c5ef92eb99e41a7 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Fri, 7 Jul 2017 17:39:21 +0200 +Subject: [PATCH 25/39] snd: meson: activate HDMI audio path + +Signed-off-by: Neil Armstrong +--- + sound/soc/meson/i2s-dai.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/sound/soc/meson/i2s-dai.c b/sound/soc/meson/i2s-dai.c +index 1008af8..63fe098 100644 +--- a/sound/soc/meson/i2s-dai.c ++++ b/sound/soc/meson/i2s-dai.c +@@ -56,8 +56,19 @@ struct meson_i2s_dai { + #define AIU_CLK_CTRL_ALRCLK_RIGHT_J (2 << 8) + #define AIU_CLK_CTRL_MORE_I2S_DIV_MASK GENMASK(5, 0) + #define AIU_CLK_CTRL_MORE_I2S_DIV(div) (((div) - 1) << 0) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK BIT(6) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_I958_CLK (0 << 6) ++#define AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK (1 << 6) + #define AIU_CODEC_DAC_LRCLK_CTRL_DIV_MASK GENMASK(11, 0) + #define AIU_CODEC_DAC_LRCLK_CTRL_DIV(div) (((div) - 1) << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK GENMASK(1, 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_DISABLE (0 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_PCM (1 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_CLK_I2S (2 << 0) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK GENMASK(5, 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_MUTE (0 << 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_PCM (1 << 4) ++#define AIU_HDMI_CLK_DATA_CTRL_DATA_I2S (2 << 4) + #define AIU_I2S_DAC_CFG_PAYLOAD_SIZE_MASK GENMASK(1, 0) + #define AIU_I2S_DAC_CFG_AOCLK_32 (0 << 0) + #define AIU_I2S_DAC_CFG_AOCLK_48 (2 << 0) +@@ -221,6 +232,17 @@ static int meson_i2s_dai_hw_params(struct snd_pcm_substream *substream, + return ret; + } + ++ /* Quick and dirty hack for HDMI */ ++ regmap_update_bits(priv->core->aiu, AIU_HDMI_CLK_DATA_CTRL, ++ AIU_HDMI_CLK_DATA_CTRL_CLK_SEL_MASK | ++ AIU_HDMI_CLK_DATA_CTRL_DATA_SEL_MASK, ++ AIU_HDMI_CLK_DATA_CTRL_CLK_I2S | ++ AIU_HDMI_CLK_DATA_CTRL_DATA_I2S); ++ ++ regmap_update_bits(priv->core->aiu, AIU_CLK_CTRL_MORE, ++ AIU_CLK_CTRL_MORE_HDMI_TX_SEL_MASK, ++ AIU_CLK_CTRL_MORE_HDMI_TX_INT_CLK); ++ + return 0; + } + +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0026-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0026-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch new file mode 100644 index 000000000..3aa2e2f74 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0026-drm-meson-select-dw-hdmi-i2s-audio-for-meson-hdmi.patch @@ -0,0 +1,23 @@ +From e5509c367852ca7a7b52c30fda3dfd2a763ee8f3 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Tue, 14 Feb 2017 19:18:04 +0100 +Subject: [PATCH 26/39] drm/meson: select dw-hdmi i2s audio for meson hdmi + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig +index 3ce51d8..02d400b 100644 +--- a/drivers/gpu/drm/meson/Kconfig ++++ b/drivers/gpu/drm/meson/Kconfig +@@ -13,3 +13,4 @@ config DRM_MESON_DW_HDMI + depends on DRM_MESON + default y if DRM_MESON + select DRM_DW_HDMI ++ select DRM_DW_HDMI_I2S_AUDIO +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0027-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0027-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch new file mode 100644 index 000000000..6adccf110 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0027-ARM64-defconfig-enable-audio-support-for-meson-SoCs-.patch @@ -0,0 +1,31 @@ +From d74574d0836155eadde90e9ba12b8c4d18202d8e Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Fri, 31 Mar 2017 15:55:03 +0200 +Subject: [PATCH 27/39] ARM64: defconfig: enable audio support for meson SoCs + as module + +Add audio support for meson SoCs. This includes the audio core +driver and the i2s output interface + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/configs/defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index dcf1090..beb5774 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -405,6 +405,8 @@ CONFIG_SOUND=y + CONFIG_SND=y + CONFIG_SND_SOC=y + CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_SOC_MESON=m ++CONFIG_SND_SOC_MESON_I2S=m + CONFIG_SND_SOC_SAMSUNG=y + CONFIG_SND_SOC_RCAR=m + CONFIG_SND_SOC_AK4613=m +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0028-ARM64-dts-meson-gx-add-audio-controller-nodes.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0028-ARM64-dts-meson-gx-add-audio-controller-nodes.patch new file mode 100644 index 000000000..772a14095 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0028-ARM64-dts-meson-gx-add-audio-controller-nodes.patch @@ -0,0 +1,89 @@ +From 7bd8dcbb1f840fe6d4ae6a1f5f2d3708f09110f9 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Wed, 20 Sep 2017 17:22:47 +0200 +Subject: [PATCH 28/39] ARM64: dts: meson-gx: add audio controller nodes + +Add audio controller nodes for Amlogic meson gxl. +This includes the audio-core node, the i2s DAI and i2s +aiu DMAs. + +Audio on this SoC family is still a work in progress. More nodes are likely +to be added later on (pcm DAIs, input DMAs, SPDIF etc ...) + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 22 ++++++++++++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 23 +++++++++++++++++++++++ + 2 files changed, 45 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index f175db8..ff27ce0 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -224,6 +224,28 @@ + #reset-cells = <1>; + }; + ++ audio: audio@5400 { ++ compatible = "amlogic,meson-audio-core"; ++ reg = <0x0 0x5400 0x0 0x2ac>, ++ <0x0 0xa000 0x0 0x304>; ++ reg-names = "aiu", "audin"; ++ status = "disabled"; ++ ++ aiu_i2s_dma: aiu_i2s_dma { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-aiu-i2s-dma"; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ ++ i2s_dai: i2s_dai { ++ #sound-dai-cells = <0>; ++ compatible = "amlogic,meson-i2s-dai"; ++ status = "disabled"; ++ }; ++ ++ }; ++ + uart_A: serial@84c0 { + compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; + reg = <0x0 0x84c0 0x0 0x14>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 68ea67a..9d2fb46 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -691,6 +691,29 @@ + }; + }; + ++&audio { ++ clocks = <&clkc CLKID_AIU>, ++ <&clkc CLKID_AIU_GLUE>, ++ <&clkc CLKID_I2S_SPDIF>; ++ clock-names = "aiu_top", "aiu_glue", "audin"; ++ resets = <&reset RESET_AIU>, ++ <&reset RESET_AUDIN>; ++ reset-names = "aiu", "audin"; ++}; ++ ++&aiu_i2s_dma { ++ clocks = <&clkc CLKID_I2S_OUT>; ++ clock-names = "fast"; ++}; ++ ++&i2s_dai { ++ clocks = <&clkc CLKID_I2S_OUT>, ++ <&clkc CLKID_MIXER_IFACE>, ++ <&clkc CLKID_AOCLK_GATE>, ++ <&clkc CLKID_CTS_AMCLK>; ++ clock-names = "fast", "iface", "bclks", "mclk"; ++}; ++ + &saradc { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + clocks = <&xtal>, +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0029-ARM64-dts-meson-gxl-add-sound-dai-cells-to-HDMI-node.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0029-ARM64-dts-meson-gxl-add-sound-dai-cells-to-HDMI-node.patch new file mode 100644 index 000000000..08e186083 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0029-ARM64-dts-meson-gxl-add-sound-dai-cells-to-HDMI-node.patch @@ -0,0 +1,26 @@ +From 071f66d1e34243f37f52e09dca13b50e8215a7ce Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Wed, 20 Sep 2017 18:01:26 +0200 +Subject: [PATCH 29/39] ARM64: dts: meson-gxl: add sound-dai-cells to HDMI node + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 9d2fb46..4a1bd89 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -294,6 +294,7 @@ + <&clkc CLKID_CLK81>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; ++ #sound-dai-cells = <0>; + }; + + &hiubus { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0030-ARM64-dts-meson-gxl-Take-eMMC-data-strobe-out-of-eMM.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0030-ARM64-dts-meson-gxl-Take-eMMC-data-strobe-out-of-eMM.patch new file mode 100644 index 000000000..45847eb7e --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0030-ARM64-dts-meson-gxl-Take-eMMC-data-strobe-out-of-eMM.patch @@ -0,0 +1,228 @@ +From 29e058408d62384dc3de4e0b63433d7dfdee068b Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 28 Aug 2017 12:01:09 +0200 +Subject: [PATCH 30/39] ARM64: dts: meson-gxl: Take eMMC data strobe out of + eMMC pins + +Since the Data Strobe pin is optional, take it out of the default +eMMC pins and add a separate entry. + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 10 ++++++++-- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 ++++++++-- + arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 2 +- + arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 2 +- + 14 files changed, 28 insertions(+), 16 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index 7ce9a62..7f59f30 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -213,7 +213,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +index 4b17a76..a42c8f4 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +@@ -302,7 +302,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "disabled"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +index 38dfdde..9a77323 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +@@ -272,7 +272,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index c3a7b7f..4221e1f 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -271,7 +271,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +index 23c08c3..932158a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +@@ -242,7 +242,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +index f2bc6de..1fe8e24 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +@@ -199,7 +199,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 7d38d55..ef12d67 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -390,8 +390,14 @@ + mux { + groups = "emmc_nand_d07", + "emmc_cmd", +- "emmc_clk", +- "emmc_ds"; ++ "emmc_clk"; ++ function = "emmc"; ++ }; ++ }; ++ ++ emmc_ds_pins: emmc-ds { ++ mux { ++ groups = "emmc_ds"; + function = "emmc"; + }; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +index 6f2cd8e..5eaafa1 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +@@ -141,7 +141,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index 4035891..942fd70 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -221,7 +221,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +index 6338e6c..0fdebcc 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +@@ -229,7 +229,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +index 7a1c20e..0a2be82 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +@@ -135,7 +135,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 4a1bd89..02b52b6 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -343,8 +343,14 @@ + mux { + groups = "emmc_nand_d07", + "emmc_cmd", +- "emmc_clk", +- "emmc_ds"; ++ "emmc_clk"; ++ function = "emmc"; ++ }; ++ }; ++ ++ emmc_ds_pins: emmc-ds { ++ mux { ++ groups = "emmc_ds"; + function = "emmc"; + }; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +index cfde246..e70b5e2 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +@@ -193,7 +193,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +index 9837a48..9593a28 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +@@ -216,7 +216,7 @@ + /* eMMC */ + &sd_emmc_c { + status = "okay"; +- pinctrl-0 = <&emmc_pins>; ++ pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-names = "default"; + + bus-width = <8>; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0031-ARM64-dts-meson-gx-add-VPU-power-domain.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0031-ARM64-dts-meson-gx-add-VPU-power-domain.patch new file mode 100644 index 000000000..57f3cb118 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0031-ARM64-dts-meson-gx-add-VPU-power-domain.patch @@ -0,0 +1,165 @@ +From 107e323a199087cfb84c22b31d769f0b2e623e4a Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 13 Oct 2017 14:47:23 +0200 +Subject: [PATCH 31/39] ARM64: dts: meson-gx: add VPU power domain + +This patch adds support for the VPU Power Domain nodes, and attaches the +VPU power domain to the VPU node. + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 11 ++++++++ + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 43 +++++++++++++++++++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 43 +++++++++++++++++++++++++++++ + 3 files changed, 97 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index ff27ce0..ace0e4b 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -393,6 +393,12 @@ + compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + ++ pwrc_vpu: power-controller-vpu { ++ compatible = "amlogic,meson-gx-pwrc-vpu"; ++ #power-domain-cells = <0>; ++ amlogic,hhi-sysctrl = <&sysctrl>; ++ }; ++ + clkc_AO: clock-controller { + compatible = "amlogic,meson-gx-aoclkc"; + #clock-cells = <1>; +@@ -470,6 +476,11 @@ + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; + ++ sysctrl: system-controller@0 { ++ compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd"; ++ reg = <0 0 0 0x400>; ++ }; ++ + mailbox: mailbox@404 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0x404 0 0x4c>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index ef12d67..b5b6b33 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -692,6 +692,48 @@ + }; + }; + ++&pwrc_vpu { ++ resets = <&reset RESET_VIU>, ++ <&reset RESET_VENC>, ++ <&reset RESET_VCBUS>, ++ <&reset RESET_BT656>, ++ <&reset RESET_DVIN_RESET>, ++ <&reset RESET_RDMA>, ++ <&reset RESET_VENCI>, ++ <&reset RESET_VENCP>, ++ <&reset RESET_VDAC>, ++ <&reset RESET_VDI6>, ++ <&reset RESET_VENCL>, ++ <&reset RESET_VID_LOCK>; ++ clocks = <&clkc CLKID_VPU>, ++ <&clkc CLKID_VAPB>; ++ clock-names = "vpu", "vapb"; ++ /* ++ * VPU clocking is provided by two identical clock paths ++ * VPU_0 and VPU_1 muxed to a single clock by a glitch ++ * free mux to safely change frequency while running. ++ * Same for VAPB but with a final gate after the glitch free mux. ++ */ ++ assigned-clocks = <&clkc CLKID_VPU_0_SEL>, ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_VPU>, /* Glitch free mux */ ++ <&clkc CLKID_VAPB_0_SEL>, ++ <&clkc CLKID_VAPB_0>, ++ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ ++ assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VAPB_0>; ++ assigned-clock-rates = <0>, /* Do Nothing */ ++ <666666666>, ++ <0>, /* Do Nothing */ ++ <0>, /* Do Nothing */ ++ <250000000>, ++ <0>; /* Do Nothing */ ++}; ++ + &saradc { + compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc"; + clocks = <&xtal>, +@@ -761,4 +803,5 @@ + + &vpu { + compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; ++ power-domains = <&pwrc_vpu>; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 02b52b6..d5c8952 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -721,6 +721,48 @@ + clock-names = "fast", "iface", "bclks", "mclk"; + }; + ++&pwrc_vpu { ++ resets = <&reset RESET_VIU>, ++ <&reset RESET_VENC>, ++ <&reset RESET_VCBUS>, ++ <&reset RESET_BT656>, ++ <&reset RESET_DVIN_RESET>, ++ <&reset RESET_RDMA>, ++ <&reset RESET_VENCI>, ++ <&reset RESET_VENCP>, ++ <&reset RESET_VDAC>, ++ <&reset RESET_VDI6>, ++ <&reset RESET_VENCL>, ++ <&reset RESET_VID_LOCK>; ++ clocks = <&clkc CLKID_VPU>, ++ <&clkc CLKID_VAPB>; ++ clock-names = "vpu", "vapb"; ++ /* ++ * VPU clocking is provided by two identical clock paths ++ * VPU_0 and VPU_1 muxed to a single clock by a glitch ++ * free mux to safely change frequency while running. ++ * Same for VAPB but with a final gate after the glitch free mux. ++ */ ++ assigned-clocks = <&clkc CLKID_VPU_0_SEL>, ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_VPU>, /* Glitch free mux */ ++ <&clkc CLKID_VAPB_0_SEL>, ++ <&clkc CLKID_VAPB_0>, ++ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ ++ assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VAPB_0>; ++ assigned-clock-rates = <0>, /* Do Nothing */ ++ <666666666>, ++ <0>, /* Do Nothing */ ++ <0>, /* Do Nothing */ ++ <250000000>, ++ <0>; /* Do Nothing */ ++}; ++ + &saradc { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + clocks = <&xtal>, +@@ -790,4 +832,5 @@ + + &vpu { + compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; ++ power-domains = <&pwrc_vpu>; + }; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0032-ARM64-dts-meson-gx-Add-HDMI_5V-regulator-on-selected.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0032-ARM64-dts-meson-gx-Add-HDMI_5V-regulator-on-selected.patch new file mode 100644 index 000000000..c46a0b6e8 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0032-ARM64-dts-meson-gx-Add-HDMI_5V-regulator-on-selected.patch @@ -0,0 +1,173 @@ +From 07b467abf6efad25e12ad4c09a008e9f1594e39d Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 15:33:30 +0200 +Subject: [PATCH 32/39] ARM64: dts: meson-gx: Add HDMI_5V regulator on selected + boards + +On reference boards and derivatives, the HDMI Logic is powered by an external +5V regulator. +This regulator was set by the Vendor U-Boot, add the regulator and phandle +property to the HDMI node. + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 12 ++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 12 ++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 11 +++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 12 ++++++++++++ + 7 files changed, 50 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index 7f59f30..979abaf 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -59,6 +59,17 @@ + reg = <0x0 0x0 0x0 0x80000000>; + }; + ++ hdmi_5v: regulator-hdmi-5v { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "HDMI_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; +@@ -142,6 +153,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts +index 6827f23..8bc540e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts +@@ -135,6 +135,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index 89a5fd9..f7b37de 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -78,6 +78,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index 942fd70..0c4ed4e 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -72,6 +72,17 @@ + reg = <0x0 0x0 0x0 0x80000000>; + }; + ++ hdmi_5v: regulator-hdmi-5v { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "HDMI_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; +@@ -131,6 +142,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +index 6e2bf85..4f6b1c9 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +@@ -88,6 +88,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +index 0a2be82..1a5136a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +@@ -28,6 +28,17 @@ + reg = <0x0 0x0 0x0 0x80000000>; + }; + ++ hdmi_5v: regulator-hdmi-5v { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "HDMI_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +index 103575a..4537a81 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -153,6 +153,17 @@ + }; + }; + ++ hdmi_5v: regulator-hdmi-5v { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "HDMI_5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; +@@ -239,6 +250,7 @@ + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_5v>; + }; + + &hdmi_tx_tmds_port { +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0033-ARM64-dts-meson-gx-grow-reset-controller-memory-zone.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0033-ARM64-dts-meson-gx-grow-reset-controller-memory-zone.patch new file mode 100644 index 000000000..9efc6c15f --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0033-ARM64-dts-meson-gx-grow-reset-controller-memory-zone.patch @@ -0,0 +1,29 @@ +From 7c3d7dee433538e1450564582da535cac44a2361 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 17:00:59 +0200 +Subject: [PATCH 33/39] ARM64: dts: meson-gx: grow reset controller memory zone + +Now the Amlogic Meson GX SoCs datasheet documents all the Reset registers, +grow the memory in the node to allow usage of the level registers. + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +index ace0e4b..2e0ee17 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +@@ -220,7 +220,7 @@ + + reset: reset-controller@4404 { + compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset"; +- reg = <0x0 0x04404 0x0 0x20>; ++ reg = <0x0 0x04404 0x0 0x9c>; + #reset-cells = <1>; + }; + +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0034-ARM64-dts-odroid-c2-Add-HDMI-and-CEC-Nodes.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0034-ARM64-dts-odroid-c2-Add-HDMI-and-CEC-Nodes.patch new file mode 100644 index 000000000..d3bccda9e --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0034-ARM64-dts-odroid-c2-Add-HDMI-and-CEC-Nodes.patch @@ -0,0 +1,64 @@ +From a0cd1597b6b505c8d72406d31cf408933b2993e9 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Mon, 16 Oct 2017 17:00:26 +0200 +Subject: [PATCH 34/39] ARM64: dts: odroid-c2: Add HDMI and CEC Nodes + +Now the VPU Power Domain has been fixed while boothing from Mainline U-Boot, +VPU and HDMI nodes can finally be added to the Odroid-C2 DTS. + +Signed-off-by: Neil Armstrong +--- + .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 30 ++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index 4221e1f..dc3d1ba 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -135,6 +135,24 @@ + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++}; ++ ++&cec_AO { ++ status = "okay"; ++ pinctrl-0 = <&ao_cec_pins>; ++ pinctrl-names = "default"; ++ hdmi-phandle = <&hdmi_tx>; + }; + + ðmac { +@@ -177,6 +195,18 @@ + }; + }; + ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ + &i2c_A { + status = "okay"; + pinctrl-0 = <&i2c_a_pins>; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0035-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0035-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch new file mode 100644 index 000000000..205e425b1 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0035-ARM64-dts-meson-activate-hdmi-audio-HDMI-enabled-boa.patch @@ -0,0 +1,637 @@ +From bc1416cbeb6fb588e8573c9904b691259d173093 Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Wed, 20 Sep 2017 18:10:08 +0200 +Subject: [PATCH 35/39] ARM64: dts: meson: activate hdmi audio HDMI enabled + boards + +This patch activate audio over HDMI on selected boards + +Please note that this audio support is based on WIP changes +This should be considered as preview and it does not reflect +the audio I expect to see merged + +Signed-off-by: Jerome Brunet +Signed-off-by: Neil Armstrong +--- + .../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 37 +++++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 38 ++++++++++++++++++++++ + .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 37 +++++++++++++++++++++ + arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 37 +++++++++++++++++++++ + .../boot/dts/amlogic/meson-gxbb-wetek-play2.dts | 37 +++++++++++++++++++++ + .../dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 37 +++++++++++++++++++++ + .../dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 37 +++++++++++++++++++++ + .../dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 37 +++++++++++++++++++++ + .../boot/dts/amlogic/meson-gxl-s905x-p212.dts | 37 +++++++++++++++++++++ + .../boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 37 +++++++++++++++++++++ + .../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 37 +++++++++++++++++++++ + 11 files changed, 408 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +index 979abaf..91b7ac8 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +@@ -130,6 +130,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -139,6 +164,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +index 9a77323..2357a38 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +@@ -143,6 +143,31 @@ + clock-names = "ext_clock"; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + cvbs-connector { + compatible = "composite-video-connector"; + +@@ -178,6 +203,19 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++ ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + ðmac { + status = "okay"; + pinctrl-0 = <ð_rmii_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +index dc3d1ba..4e0b3c7 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +@@ -146,6 +146,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -155,6 +180,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + ðmac { + status = "okay"; + pinctrl-0 = <ð_rgmii_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +index 932158a..c9d4870 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +@@ -149,6 +149,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -158,6 +183,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +index f7144fd..58a0f51 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +@@ -106,6 +106,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -115,6 +140,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +index f7b37de..ce92ca5 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +@@ -65,6 +65,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -74,6 +99,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +index 0c4ed4e..29d8e01 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +@@ -83,6 +83,31 @@ + enable-active-high; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; +@@ -122,6 +147,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +index 0fdebcc..dcb571a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +@@ -138,6 +138,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -147,6 +172,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +index 4f6b1c9..f23f148 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +@@ -69,6 +69,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -78,6 +103,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +index 4537a81..aed2a54 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +@@ -88,6 +88,31 @@ + }; + }; + ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++ + pwmleds { + compatible = "pwm-leds"; + +@@ -207,6 +232,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cpu0 { + cooling-min-level = <0>; + cooling-max-level = <6>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +index e70b5e2..8444f79 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +@@ -111,6 +111,31 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "meson-gx-preview"; ++ status = "okay"; ++ ++ simple-audio-card,dai-link@0 { ++ /* HDMI Output */ ++ format = "i2s"; ++ mclk-fs = <256>; ++ bitclock-master = <&i2s_dai>; ++ frame-master = <&i2s_dai>; ++ plat { ++ sound-dai = <&aiu_i2s_dma>; ++ }; ++ ++ cpu { ++ sound-dai = <&i2s_dai>; ++ }; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; + }; + + &cec_AO { +@@ -120,6 +145,18 @@ + hdmi-phandle = <&hdmi_tx>; + }; + ++&audio { ++ status = "okay"; ++}; ++ ++&aiu_i2s_dma { ++ status = "okay"; ++}; ++ ++&i2s_dai { ++ status = "okay"; ++}; ++ + &cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0036-net-phy-meson-gxl-detect-LPA-corruption.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0036-net-phy-meson-gxl-detect-LPA-corruption.patch new file mode 100644 index 000000000..f08a85a7c --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0036-net-phy-meson-gxl-detect-LPA-corruption.patch @@ -0,0 +1,132 @@ +From 9afb9faf483008a1d16202818d895099e5c932bb Mon Sep 17 00:00:00 2001 +From: Jerome Brunet +Date: Fri, 8 Dec 2017 12:08:11 +0100 +Subject: [PATCH 36/39] net: phy: meson-gxl: detect LPA corruption + +The purpose of this change is to fix the incorrect detection of the link +partner (LP) advertised capabilities which sometimes happens with this PHY +(roughly 1 time in a dozen) + +This issue may cause the link to be negotiated at 10Mbps/Full or +10Mbps/Half when 100MBps/Full is actually possible. In some case, the link +is even completely broken and no communication is possible. + +To detect the corruption, we must look for a magic undocumented bit in the +WOL bank (hint given by the SoC vendor kernel) but this is not enough to +cover all cases. We also have to look at the LPA ack. If the LP supports +Aneg but did not ack our base code when aneg is completed, we assume +something went wrong. + +The detection of a corrupted LPA triggers a restart of the aneg process. +This solves the problem but may take up to 6 retries to complete. + +Fixes: 7334b3e47aee ("net: phy: Add Meson GXL Internal PHY driver") +Signed-off-by: Jerome Brunet +Signed-off-by: David S. Miller +Signed-off-by: Neil Armstrong +--- + drivers/net/phy/meson-gxl.c | 74 ++++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 73 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c +index 7ddb709..b21f607 100644 +--- a/drivers/net/phy/meson-gxl.c ++++ b/drivers/net/phy/meson-gxl.c +@@ -22,6 +22,7 @@ + #include + #include + #include ++#include + + static int meson_gxl_config_init(struct phy_device *phydev) + { +@@ -76,6 +77,77 @@ static int meson_gxl_config_init(struct phy_device *phydev) + return 0; + } + ++/* This function is provided to cope with the possible failures of this phy ++ * during aneg process. When aneg fails, the PHY reports that aneg is done ++ * but the value found in MII_LPA is wrong: ++ * - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that ++ * the link partner (LP) supports aneg but the LP never acked our base ++ * code word, it is likely that we never sent it to begin with. ++ * - Late failures: MII_LPA is filled with a value which seems to make sense ++ * but it actually is not what the LP is advertising. It seems that we ++ * can detect this using a magic bit in the WOL bank (reg 12 - bit 12). ++ * If this particular bit is not set when aneg is reported being done, ++ * it means MII_LPA is likely to be wrong. ++ * ++ * In both case, forcing a restart of the aneg process solve the problem. ++ * When this failure happens, the first retry is usually successful but, ++ * in some cases, it may take up to 6 retries to get a decent result ++ */ ++int meson_gxl_read_status(struct phy_device *phydev) ++{ ++ int ret, wol, lpa, exp; ++ ++ if (phydev->autoneg == AUTONEG_ENABLE) { ++ ret = genphy_aneg_done(phydev); ++ if (ret < 0) ++ return ret; ++ else if (!ret) ++ goto read_status_continue; ++ ++ /* Need to access WOL bank, make sure the access is open */ ++ ret = phy_write(phydev, 0x14, 0x0000); ++ if (ret) ++ return ret; ++ ret = phy_write(phydev, 0x14, 0x0400); ++ if (ret) ++ return ret; ++ ret = phy_write(phydev, 0x14, 0x0000); ++ if (ret) ++ return ret; ++ ret = phy_write(phydev, 0x14, 0x0400); ++ if (ret) ++ return ret; ++ ++ /* Request LPI_STATUS WOL register */ ++ ret = phy_write(phydev, 0x14, 0x8D80); ++ if (ret) ++ return ret; ++ ++ /* Read LPI_STATUS value */ ++ wol = phy_read(phydev, 0x15); ++ if (wol < 0) ++ return wol; ++ ++ lpa = phy_read(phydev, MII_LPA); ++ if (lpa < 0) ++ return lpa; ++ ++ exp = phy_read(phydev, MII_EXPANSION); ++ if (exp < 0) ++ return exp; ++ ++ if (!(wol & BIT(12)) || ++ ((exp & EXPANSION_NWAY) && !(lpa & LPA_LPACK))) { ++ /* Looks like aneg failed after all */ ++ phydev_dbg(phydev, "LPA corruption - aneg restart\n"); ++ return genphy_restart_aneg(phydev); ++ } ++ } ++ ++read_status_continue: ++ return genphy_read_status(phydev); ++} ++ + static struct phy_driver meson_gxl_phy[] = { + { + .phy_id = 0x01814400, +@@ -86,7 +158,7 @@ static struct phy_driver meson_gxl_phy[] = { + .config_init = meson_gxl_config_init, + .config_aneg = genphy_config_aneg, + .aneg_done = genphy_aneg_done, +- .read_status = genphy_read_status, ++ .read_status = meson_gxl_read_status, + .suspend = genphy_suspend, + .resume = genphy_resume, + }, +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0037-drm-meson-fix-vsync-buffer-update.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0037-drm-meson-fix-vsync-buffer-update.patch new file mode 100644 index 000000000..0a23c1a7b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0037-drm-meson-fix-vsync-buffer-update.patch @@ -0,0 +1,71 @@ +From 61ceaf782220a596ac845483d00d50752f7c6e14 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 15 Feb 2018 10:38:47 +0100 +Subject: [PATCH 37/39] drm/meson: fix vsync buffer update + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_crtc.c | 6 ++++++ + drivers/gpu/drm/meson/meson_drv.h | 3 +++ + drivers/gpu/drm/meson/meson_plane.c | 7 +++---- + 3 files changed, 12 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c +index 5155f01..0552020 100644 +--- a/drivers/gpu/drm/meson/meson_crtc.c ++++ b/drivers/gpu/drm/meson/meson_crtc.c +@@ -36,6 +36,7 @@ + #include "meson_venc.h" + #include "meson_vpp.h" + #include "meson_viu.h" ++#include "meson_canvas.h" + #include "meson_registers.h" + + /* CRTC definition */ +@@ -192,6 +193,11 @@ void meson_crtc_irq(struct meson_drm *priv) + } else + meson_vpp_disable_interlace_vscaler_osd1(priv); + ++ meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, ++ priv->viu.osd1_addr, priv->viu.osd1_stride, ++ priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, ++ MESON_CANVAS_BLKMODE_LINEAR); ++ + /* Enable OSD1 */ + writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, + priv->io_base + _REG(VPP_MISC)); +diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h +index 5e8b392..8450d6ac 100644 +--- a/drivers/gpu/drm/meson/meson_drv.h ++++ b/drivers/gpu/drm/meson/meson_drv.h +@@ -43,6 +43,9 @@ struct meson_drm { + bool osd1_commit; + uint32_t osd1_ctrl_stat; + uint32_t osd1_blk0_cfg[5]; ++ uint32_t osd1_addr; ++ uint32_t osd1_stride; ++ uint32_t osd1_height; + } viu; + + struct { +diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c +index 17e96fa..0b6011b 100644 +--- a/drivers/gpu/drm/meson/meson_plane.c ++++ b/drivers/gpu/drm/meson/meson_plane.c +@@ -164,10 +164,9 @@ static void meson_plane_atomic_update(struct drm_plane *plane, + /* Update Canvas with buffer address */ + gem = drm_fb_cma_get_gem_obj(fb, 0); + +- meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, +- gem->paddr, fb->pitches[0], +- fb->height, MESON_CANVAS_WRAP_NONE, +- MESON_CANVAS_BLKMODE_LINEAR); ++ priv->viu.osd1_addr = gem->paddr; ++ priv->viu.osd1_stride = fb->pitches[0]; ++ priv->viu.osd1_height = fb->height; + + spin_unlock_irqrestore(&priv->drm->event_lock, flags); + } +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0038-ARM64-dts-meson-bump-mali450-clk-to-744MHz.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0038-ARM64-dts-meson-bump-mali450-clk-to-744MHz.patch new file mode 100644 index 000000000..ac9930839 --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0038-ARM64-dts-meson-bump-mali450-clk-to-744MHz.patch @@ -0,0 +1,66 @@ +From 63ffa5db0046106f6c3b8687e200e17599e14b9f Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Fri, 23 Feb 2018 11:18:11 +0100 +Subject: [PATCH 38/39] ARM64: dts: meson: bump mali450 clk to 744MHz + +Signed-off-by: Neil Armstrong +--- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 11 +++++++---- + arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 11 +++++++---- + 2 files changed, 14 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index b5b6b33..d00a9f2 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -288,14 +288,17 @@ + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ +- assigned-clocks = <&clkc CLKID_MALI_0_SEL>, ++ assigned-clocks = <&clkc CLKID_GP0_PLL>, ++ <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ +- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, ++ assigned-clock-parents = <0>, /* Do Nothing */ ++ <&clkc CLKID_GP0_PLL>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; +- assigned-clock-rates = <0>, /* Do Nothing */ +- <666666666>, ++ assigned-clock-rates = <744000000>, ++ <0>, /* Do Nothing */ ++ <744000000>, + <0>; /* Do Nothing */ + }; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi +index f06cc234..972df67 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi +@@ -30,14 +30,17 @@ + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ +- assigned-clocks = <&clkc CLKID_MALI_0_SEL>, ++ assigned-clocks = <&clkc CLKID_GP0_PLL>, ++ <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ +- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, ++ assigned-clock-parents = <0>, /* Do Nothing */ ++ <&clkc CLKID_GP0_PLL>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; +- assigned-clock-rates = <0>, /* Do Nothing */ +- <666666666>, ++ assigned-clock-rates = <744000000>, ++ <0>, /* Do Nothing */ ++ <744000000>, + <0>; /* Do Nothing */ + }; + }; +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0039-drm-meson-Add-support-for-DMT-modes-on-HDMI.patch b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0039-drm-meson-Add-support-for-DMT-modes-on-HDMI.patch new file mode 100644 index 000000000..9cd2dbd1b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/patches/linux/0039-drm-meson-Add-support-for-DMT-modes-on-HDMI.patch @@ -0,0 +1,773 @@ +From 8da289631087c90a3b644cbdd124bee7f7b348f3 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Thu, 8 Mar 2018 16:35:34 +0100 +Subject: [PATCH 39/39] drm/meson: Add support for DMT modes on HDMI + +This patch adds support for DMT display modes over HDMI. +The modes timings configurations are from the Amlogic Vendor linux tree +and tested over multiples monitors. +Previously only a selected number of CEA modes were supported. + +Only these following modes are supported with these changes: +- 640x480@60Hz +- 800x600@60Hz +- 1024x768@60Hz +- 1152x864@75Hz +- 1280x1024@60Hz +- 1600x1200@60Hz +- 1920x1080@60Hz + +The associated code to handle the clock rates is also added. + +Signed-off-by: Neil Armstrong +--- + drivers/gpu/drm/meson/meson_dw_hdmi.c | 22 +-- + drivers/gpu/drm/meson/meson_vclk.c | 219 ++++++++++++++++++++- + drivers/gpu/drm/meson/meson_venc.c | 347 +++++++++++++++++++++++++++++++++- + drivers/gpu/drm/meson/meson_venc.h | 1 + + 4 files changed, 570 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c +index 17de3af..9d70ed6 100644 +--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c ++++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c +@@ -537,7 +537,6 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id) + return IRQ_HANDLED; + } + +-/* TOFIX Enable support for non-vic modes */ + static enum drm_mode_status + dw_hdmi_mode_valid(struct drm_connector *connector, + const struct drm_display_mode *mode) +@@ -554,12 +553,12 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + mode->vdisplay, mode->vsync_start, + mode->vsync_end, mode->vtotal, mode->type, mode->flags); + +- /* For now, only accept VIC modes */ +- if (!vic) +- return MODE_BAD; +- +- /* For now, filter by supported VIC modes */ +- if (!meson_venc_hdmi_supported_vic(vic)) ++ /* Check against non-VIC supported modes */ ++ if (!vic) { ++ if (!meson_venc_hdmi_supported_mode(mode)) ++ return MODE_BAD; ++ /* Check against supported VIC modes */ ++ } else if (!meson_venc_hdmi_supported_vic(vic)) + return MODE_BAD; + + vclk_freq = mode->clock; +@@ -585,9 +584,14 @@ dw_hdmi_mode_valid(struct drm_connector *connector, + + /* Finally filter by configurable vclk frequencies */ + switch (vclk_freq) { ++ case 25175: ++ case 40000: + case 54000: ++ case 65000: + case 74250: ++ case 108000: + case 148500: ++ case 162000: + case 297000: + case 594000: + return MODE_OK; +@@ -652,10 +656,6 @@ static void meson_venc_hdmi_encoder_mode_set(struct drm_encoder *encoder, + DRM_DEBUG_DRIVER("%d:\"%s\" vic %d\n", + mode->base.id, mode->name, vic); + +- /* Should have been filtered */ +- if (!vic) +- return; +- + /* VENC + VENC-DVI Mode setup */ + meson_venc_hdmi_mode_set(priv, vic, mode); + +diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c +index 4767704..f051122 100644 +--- a/drivers/gpu/drm/meson/meson_vclk.c ++++ b/drivers/gpu/drm/meson/meson_vclk.c +@@ -328,14 +328,24 @@ static void meson_venci_cvbs_clock_config(struct meson_drm *priv) + #define MESON_VCLK_HDMI_DDR_54000 2 + /* 2970 /4 /1 /1 /5 /1 => /1 /2 */ + #define MESON_VCLK_HDMI_DDR_148500 3 ++/* 4028 /4 /4 /1 /5 /2 => /1 /1 */ ++#define MESON_VCLK_HDMI_25175 4 ++/* 3200 /4 /2 /1 /5 /2 => /1 /1 */ ++#define MESON_VCLK_HDMI_40000 5 ++/* 5200 /4 /2 /1 /5 /2 => /1 /1 */ ++#define MESON_VCLK_HDMI_65000 6 + /* 2970 /2 /2 /2 /5 /1 => /1 /1 */ +-#define MESON_VCLK_HDMI_74250 4 ++#define MESON_VCLK_HDMI_74250 7 ++/* 4320 /4 /1 /1 /5 /2 => /1 /1 */ ++#define MESON_VCLK_HDMI_108000 8 + /* 2970 /1 /2 /2 /5 /1 => /1 /1 */ +-#define MESON_VCLK_HDMI_148500 5 ++#define MESON_VCLK_HDMI_148500 9 ++/* 3240 /2 /1 /1 /5 /2 => /1 /1 */ ++#define MESON_VCLK_HDMI_162000 10 + /* 2970 /1 /1 /1 /5 /2 => /1 /1 */ +-#define MESON_VCLK_HDMI_297000 6 ++#define MESON_VCLK_HDMI_297000 11 + /* 5940 /1 /1 /2 /5 /1 => /1 /1 */ +-#define MESON_VCLK_HDMI_594000 7 ++#define MESON_VCLK_HDMI_594000 12 + + struct meson_vclk_params { + unsigned int pll_base_freq; +@@ -401,6 +411,46 @@ struct meson_vclk_params { + .vid_pll_div = VID_PLL_DIV_5, + .vclk_div = 1, + }, ++ [MESON_VCLK_HDMI_25175] = { ++ .pll_base_freq = 4028000, ++ .pll_od1 = 4, ++ .pll_od2 = 4, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 2, ++ }, ++ [MESON_VCLK_HDMI_40000] = { ++ .pll_base_freq = 3200000, ++ .pll_od1 = 4, ++ .pll_od2 = 2, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 2, ++ }, ++ [MESON_VCLK_HDMI_65000] = { ++ .pll_base_freq = 5200000, ++ .pll_od1 = 4, ++ .pll_od2 = 2, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 2, ++ }, ++ [MESON_VCLK_HDMI_108000] = { ++ .pll_base_freq = 4320000, ++ .pll_od1 = 4, ++ .pll_od2 = 1, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 2, ++ }, ++ [MESON_VCLK_HDMI_162000] = { ++ .pll_base_freq = 3240000, ++ .pll_od1 = 2, ++ .pll_od2 = 1, ++ .pll_od3 = 1, ++ .vid_pll_div = VID_PLL_DIV_5, ++ .vclk_div = 2, ++ }, + }; + + static inline unsigned int pll_od_to_reg(unsigned int od) +@@ -451,6 +501,90 @@ void meson_hdmi_pll_set(struct meson_drm *priv, + 0xFFFF, 0x4e00); + break; + ++ case 3200000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000242); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); ++ ++ /* unreset */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, ++ BIT(28), 0); ++ ++ /* Poll for lock bit */ ++ regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, ++ val, (val & HDMI_PLL_LOCK), 10, 0); ++ ++ /* div_frac */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, ++ 0xFFFF, 0x4aab); ++ break; ++ ++ case 3240000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000243); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); ++ ++ /* unreset */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, ++ BIT(28), 0); ++ ++ /* Poll for lock bit */ ++ regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, ++ val, (val & HDMI_PLL_LOCK), 10, 0); ++ ++ /* div_frac */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, ++ 0xFFFF, 0x4800); ++ break; ++ ++ case 3865000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000250); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); ++ ++ /* unreset */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, ++ BIT(28), 0); ++ ++ /* Poll for lock bit */ ++ regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, ++ val, (val & HDMI_PLL_LOCK), 10, 0); ++ ++ /* div_frac */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, ++ 0xFFFF, 0x4855); ++ break; ++ ++ case 4028000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x58000253); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); ++ ++ /* unreset */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, ++ BIT(28), 0); ++ ++ /* Poll for lock bit */ ++ regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, ++ val, (val & HDMI_PLL_LOCK), 10, 0); ++ ++ /* div_frac */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, ++ 0xFFFF, 0x4eab); ++ break; ++ + case 4320000: + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800025a); + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); +@@ -485,6 +619,23 @@ void meson_hdmi_pll_set(struct meson_drm *priv, + regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, + val, (val & HDMI_PLL_LOCK), 10, 0); + break; ++ ++ case 5200000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x5800026c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00000000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x135c5091); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x00000e55); ++ ++ /* unreset */ ++ regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, ++ BIT(28), 0); ++ ++ /* Poll for lock bit */ ++ regmap_read_poll_timeout(priv->hhi, HHI_HDMI_PLL_CNTL, ++ val, (val & HDMI_PLL_LOCK), 10, 0); ++ break; + }; + } else if (meson_vpu_is_compatible(priv, "amlogic,meson-gxm-vpu") || + meson_vpu_is_compatible(priv, "amlogic,meson-gxl-vpu")) { +@@ -498,6 +649,42 @@ void meson_hdmi_pll_set(struct meson_drm *priv, + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); + break; + ++ case 3200000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000285); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb155); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); ++ break; ++ ++ case 3240000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x40000287); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); ++ break; ++ ++ case 3865000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002a1); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb02b); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); ++ break; ++ ++ case 4028000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002a7); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb355); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); ++ break; ++ + case 4320000: + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002b4); + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000); +@@ -516,6 +703,15 @@ void meson_hdmi_pll_set(struct meson_drm *priv, + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); + break; + ++ case 5200000: ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL, 0x400002d8); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb2ab); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); ++ regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x01a31500); ++ break; ++ + }; + + /* Reset PLL */ +@@ -590,15 +786,30 @@ void meson_vclk_setup(struct meson_drm *priv, unsigned int target, + else + freq = MESON_VCLK_HDMI_DDR_54000; + break; ++ case 25175: ++ freq = MESON_VCLK_HDMI_25175; ++ break; ++ case 40000: ++ freq = MESON_VCLK_HDMI_40000; ++ break; ++ case 65000: ++ freq = MESON_VCLK_HDMI_65000; ++ break; + case 74250: + freq = MESON_VCLK_HDMI_74250; + break; ++ case 108000: ++ freq = MESON_VCLK_HDMI_108000; ++ break; + case 148500: + if (dac_freq != 148500) + freq = MESON_VCLK_HDMI_DDR_148500; + else + freq = MESON_VCLK_HDMI_148500; + break; ++ case 162000: ++ freq = MESON_VCLK_HDMI_162000; ++ break; + case 297000: + freq = MESON_VCLK_HDMI_297000; + break; +diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c +index 9509017..6e27013 100644 +--- a/drivers/gpu/drm/meson/meson_venc.c ++++ b/drivers/gpu/drm/meson/meson_venc.c +@@ -697,6 +697,314 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = { + }, + }; + ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_640x480_60 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 0x31f, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 0x90, ++ .havon_end = 0x30f, ++ .vavon_bline = 0x23, ++ .vavon_eline = 0x202, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 0x60, ++ .vso_begin = 0x1e, ++ .vso_end = 0x32, ++ .vso_bline = 0, ++ .vso_eline = 2, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 0x20c, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_800x600_60 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 0x41f, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 0xD8, ++ .havon_end = 0x3f7, ++ .vavon_bline = 0x1b, ++ .vavon_eline = 0x272, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 0x80, ++ .vso_begin = 0x1e, ++ .vso_end = 0x32, ++ .vso_bline = 0, ++ .vso_eline = 4, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 0x273, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_1024x768_60 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 1343, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 296, ++ .havon_end = 1319, ++ .vavon_bline = 35, ++ .vavon_eline = 802, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 136, ++ .vso_begin = 30, ++ .vso_end = 50, ++ .vso_bline = 0, ++ .vso_eline = 6, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 805, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_1152x864_75 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 0x63f, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 0x180, ++ .havon_end = 0x5ff, ++ .vavon_bline = 0x23, ++ .vavon_eline = 0x382, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 0x80, ++ .vso_begin = 0x1e, ++ .vso_end = 0x32, ++ .vso_bline = 0, ++ .vso_eline = 3, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 0x383, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_1280x1024_60 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 0x697, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 0x168, ++ .havon_end = 0x667, ++ .vavon_bline = 0x29, ++ .vavon_eline = 0x428, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 0x70, ++ .vso_begin = 0x1e, ++ .vso_end = 0x32, ++ .vso_bline = 0, ++ .vso_eline = 3, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 0x429, ++ }, ++}; ++ ++union meson_hdmi_venc_mode meson_hdmi_encp_mode_1600x1200_60 = { ++ .encp = { ++ .dvi_settings = 0x21, ++ .video_mode = 0x4040, ++ .video_mode_adv = 0x18, ++ /* video_prog_mode */ ++ /* video_sync_mode */ ++ /* video_yc_dly */ ++ /* video_rgb_ctrl */ ++ /* video_filt_ctrl */ ++ /* video_ofld_voav_ofst */ ++ /* yfp1_htime */ ++ /* yfp2_htime */ ++ .max_pxcnt = 0x86f, ++ /* hspuls_begin */ ++ /* hspuls_end */ ++ /* hspuls_switch */ ++ /* vspuls_begin */ ++ /* vspuls_end */ ++ /* vspuls_bline */ ++ /* vspuls_eline */ ++ .havon_begin = 0x1f0, ++ .havon_end = 0x82f, ++ .vavon_bline = 0x31, ++ .vavon_eline = 0x4e0, ++ /* eqpuls_begin */ ++ /* eqpuls_end */ ++ /* eqpuls_bline */ ++ /* eqpuls_eline */ ++ .hso_begin = 0, ++ .hso_end = 0xc0, ++ .vso_begin = 0x1e, ++ .vso_end = 0x32, ++ .vso_bline = 0, ++ .vso_eline = 3, ++ .vso_eline_present = true, ++ /* sy_val */ ++ /* sy2_val */ ++ .max_lncnt = 0x4e1, ++ }, ++}; ++ ++struct meson_hdmi_venc_dmt_mode { ++ struct drm_display_mode drm_mode; ++ union meson_hdmi_venc_mode *mode; ++} meson_hdmi_venc_dmt_modes[] = { ++ /* 640x480@60Hz */ ++ { ++ { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, ++ 752, 800, 0, 480, 490, 492, 525, 0, ++ DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, ++ &meson_hdmi_encp_mode_640x480_60, ++ }, ++ /* 800x600@60Hz */ ++ { ++ { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, ++ 968, 1056, 0, 600, 601, 605, 628, 0, ++ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, ++ &meson_hdmi_encp_mode_800x600_60, ++ }, ++ /* 1024x768@60Hz */ ++ { ++ { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, ++ 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, ++ DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, ++ &meson_hdmi_encp_mode_1024x768_60, ++ }, ++ /* 1152x864@75Hz */ ++ { ++ { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, ++ 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, ++ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, ++ &meson_hdmi_encp_mode_1152x864_75, ++ }, ++ /* 1280x1024@60Hz */ ++ { ++ { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, ++ 1328, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, ++ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, ++ &meson_hdmi_encp_mode_1280x1024_60, ++ }, ++ /* 1600x1200@60Hz */ ++ { ++ { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, ++ 1664, 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, ++ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, ++ &meson_hdmi_encp_mode_1600x1200_60, ++ }, ++ /* 1920x1080@60Hz */ ++ { ++ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, ++ 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, ++ DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, ++ &meson_hdmi_encp_mode_1080p60 ++ }, ++ { }, /* sentinel */ ++}; ++ + struct meson_hdmi_venc_vic_mode { + unsigned int vic; + union meson_hdmi_venc_mode *mode; +@@ -736,6 +1044,20 @@ static unsigned long modulo(unsigned long a, unsigned long b) + return a; + } + ++bool meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode) ++{ ++ struct meson_hdmi_venc_dmt_mode *vmode = meson_hdmi_venc_dmt_modes; ++ ++ while (vmode->mode) { ++ if (drm_mode_equal(&vmode->drm_mode, mode)) ++ return true; ++ vmode++; ++ } ++ ++ return false; ++} ++EXPORT_SYMBOL_GPL(meson_venc_hdmi_supported_mode); ++ + bool meson_venc_hdmi_supported_vic(int vic) + { + struct meson_hdmi_venc_vic_mode *vmode = meson_hdmi_venc_vic_modes; +@@ -750,6 +1072,20 @@ bool meson_venc_hdmi_supported_vic(int vic) + } + EXPORT_SYMBOL_GPL(meson_venc_hdmi_supported_vic); + ++static union meson_hdmi_venc_mode ++*meson_venc_hdmi_get_dmt_vmode(const struct drm_display_mode *mode) ++{ ++ struct meson_hdmi_venc_dmt_mode *vmode = meson_hdmi_venc_dmt_modes; ++ ++ while (vmode->mode) { ++ if (drm_mode_equal(&vmode->drm_mode, mode)) ++ return vmode->mode; ++ vmode++; ++ } ++ ++ return NULL; ++} ++ + static union meson_hdmi_venc_mode *meson_venc_hdmi_get_vic_vmode(int vic) + { + struct meson_hdmi_venc_vic_mode *vmode = meson_hdmi_venc_vic_modes; +@@ -811,10 +1147,13 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, + unsigned int sof_lines; + unsigned int vsync_lines; + +- vmode = meson_venc_hdmi_get_vic_vmode(vic); ++ if (meson_venc_hdmi_supported_vic(vic)) ++ vmode = meson_venc_hdmi_get_vic_vmode(vic); ++ else ++ vmode = meson_venc_hdmi_get_dmt_vmode(mode); + if (!vmode) { +- dev_err(priv->dev, "%s: Fatal Error, unsupported vic %d\n", +- __func__, vic); ++ dev_err(priv->dev, "%s: Fatal Error, unsupported mode " ++ DRM_MODE_FMT "\n", __func__, DRM_MODE_ARG(mode)); + return; + } + +@@ -864,7 +1203,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, + hsync_pixels_venc *= 2; + + /* Disable VDACs */ +- writel_bits_relaxed(0x1f, 0x1f, ++ writel_bits_relaxed(0xff, 0xff, + priv->io_base + _REG(VENC_VDAC_SETTING)); + + writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); +diff --git a/drivers/gpu/drm/meson/meson_venc.h b/drivers/gpu/drm/meson/meson_venc.h +index a1b96e8..7c18a36 100644 +--- a/drivers/gpu/drm/meson/meson_venc.h ++++ b/drivers/gpu/drm/meson/meson_venc.h +@@ -58,6 +58,7 @@ struct meson_cvbs_enci_mode { + }; + + /* HDMI Clock parameters */ ++bool meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode); + bool meson_venc_hdmi_supported_vic(int vic); + bool meson_venc_hdmi_venc_repeat(int vic); + +-- +2.7.4 + diff --git a/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.sh b/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.sh new file mode 100644 index 000000000..226faca9b --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/uboot-boot.sh @@ -0,0 +1,92 @@ + +########################################### + +part start mmc ${devnum} 9 mmc_env +mmc dev ${devnum} +setenv loadbootstate "\ +echo 'loading env...';\ +mmc read ${ramdisk_addr_r} ${mmc_env} 0x10;\ +env import -c ${ramdisk_addr_r} 0x2000;" + +setenv storebootstate "\ +echo 'storing env...';\ +env export -c -s 0x2000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT;\ +mmc write ${ramdisk_addr_r} ${mmc_env} 0x10;" + +run loadbootstate +test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B" +test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3 +test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3 + +if load mmc ${devnum}:1 ${ramdisk_addr_r} config.txt; then + env import -t ${ramdisk_addr_r} ${filesize}; +fi + +# Board bootargs +if test "${m}" = "custombuilt"; then setenv cmode "modeline=${modeline}"; fi +setenv bootargs_odroidc2 "${condev} no_console_suspend hdmimode=${m} ${cmode} m_bpp=${m_bpp} vout=${vout} fsck.repair=yes net.ifnames=0 elevator=noop disablehpd=${hpd} max_freq=${max_freq} maxcpus=${maxcpus} monitor_onoff=${monitor_onoff} disableuhs=${disableuhs} mmc_removable=${mmc_removable} usbmulticam=${usbmulticam}" + +# HassOS bootargs +setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor cgroup_enable=memory" + +# HassOS system A/B +setenv bootargs_a "root=PARTUUID=48617373-06 rootfstype=squashfs ro rootwait" +setenv bootargs_b "root=PARTUUID=48617373-08 rootfstype=squashfs ro rootwait" + +usb start + +# Load extraargs +fileenv mmc ${devnum}:1 ${ramdisk_addr_r} cmdline.txt cmdline +fatload mmc ${devnum}:1 ${fdt_addr_r} meson-gxbb-odroidc2.dtb +#fdt addr ${fdt_addr_r} + +# logical volumes get numbered after physical ones. +# 1. boot +# 2. Extended partition +# 3. Overlay +# 4. Data +# 5. KernelA +# 6. SystemA +# 7. KernelB +# 8. SystemB +# 9. BootInfo +setenv bootargs +for BOOT_SLOT in "${BOOT_ORDER}"; do + if test "x${bootargs}" != "x"; then + # skip remaining slots + elif test "x${BOOT_SLOT}" = "xA"; then + if test ${BOOT_A_LEFT} -gt 0; then + setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1 + echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining" + setenv load_kernel "ext4load mmc ${devnum}:5 ${kernel_addr_r} Image" + setenv bootargs "${bootargs_hassos} ${bootargs_odroidc2} ${bootargs_a} rauc.slot=A ${cmdline}" + fi + elif test "x${BOOT_SLOT}" = "xB"; then + if test ${BOOT_B_LEFT} -gt 0; then + setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1 + echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining" + setenv load_kernel "ext4load mmc ${devnum}:7 ${kernel_addr_r} Image" + setenv bootargs "${bootargs_hassos} ${bootargs_odroidc2} ${bootargs_b} rauc.slot=B ${cmdline}" + fi + fi +done + +if test -n "${bootargs}"; then + run storebootstate +else + echo "No valid slot found, resetting tries to 3" + setenv BOOT_A_LEFT 3 + setenv BOOT_B_LEFT 3 + run storebootstate + reset +fi + +echo "Loading kernel" +run load_kernel +echo " Starting kernel" +printenv load_kernel +printenv bootargs +booti ${kernel_addr_r} - ${fdt_addr_r} + +echo "Fails on boot" +reset diff --git a/buildroot-external/board/hardkernel/odroid-c2/uboot.config b/buildroot-external/board/hardkernel/odroid-c2/uboot.config new file mode 100644 index 000000000..f276dedff --- /dev/null +++ b/buildroot-external/board/hardkernel/odroid-c2/uboot.config @@ -0,0 +1,8 @@ +# CONFIG_USB_STORAGE is not set +CONFIG_DOS_PARTITION=y +# CONFIG_EFI_PARTITION is not set +CONFIG_USB=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_CMD_FILEENV=y +CONFIG_ENV_IS_NOWHERE=Y diff --git a/buildroot-external/board/ova/hassos-hook.sh b/buildroot-external/board/ova/hassos-hook.sh new file mode 100755 index 000000000..d153690ce --- /dev/null +++ b/buildroot-external/board/ova/hassos-hook.sh @@ -0,0 +1,20 @@ +#!/bin/bash + +function hassos_pre_image() { + local BOOT_DATA="$(path_boot_dir)" + + mkdir -p ${BOOT_DATA}/EFI/BOOT + mkdir -p ${BOOT_DATA}/EFI/barebox + + cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI + cp ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${BOOT_DATA}/EFI/barebox/state.dtb + + echo "console=tty1" > ${BOOT_DATA}/cmdline.txt +} + + +function hassos_post_image() { + convert_disk_image_vmdk + convert_disk_image_gz vmdk +} + diff --git a/buildroot-external/board/ova/info b/buildroot-external/board/ova/meta similarity index 79% rename from buildroot-external/board/ova/info rename to buildroot-external/board/ova/meta index 1cdc425f6..a05605489 100644 --- a/buildroot-external/board/ova/info +++ b/buildroot-external/board/ova/meta @@ -3,4 +3,5 @@ BOARD_NAME="Open Virtual Appliance" CHASSIS=vm BOOTLOADER=barebox KERNEL_FILE=bzImage -BOOT_SYS=gpt +BOOT_SYS=efi +DISK_SIZE=6 diff --git a/buildroot-external/board/ova/post-image.sh b/buildroot-external/board/ova/post-image.sh deleted file mode 100755 index 8d6515ccf..000000000 --- a/buildroot-external/board/ova/post-image.sh +++ /dev/null @@ -1,33 +0,0 @@ -#!/bin/bash -set -e - -SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts -BOARD_DIR=${2} -BOOT_DATA=${BINARIES_DIR}/boot - -. ${SCRIPT_DIR}/hdd-image.sh -. ${SCRIPT_DIR}/name.sh -. ${SCRIPT_DIR}/ota.sh -. ${BR2_EXTERNAL_HASSOS_PATH}/info -. ${BOARD_DIR}/info - -# Init boot data -rm -rf ${BOOT_DATA} -mkdir -p ${BOOT_DATA}/EFI/BOOT -mkdir -p ${BOOT_DATA}/EFI/barebox - -cp ${BINARIES_DIR}/barebox.bin ${BOOT_DATA}/EFI/BOOT/BOOTx64.EFI -cp ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${BOOT_DATA}/EFI/barebox/state.dtb - -echo "console=tty1" > ${BOOT_DATA}/cmdline.txt - -# Create other layers -prepare_disk_image - -# Create disk images -create_disk_image 6 -convert_disk_image_vmdk -convert_disk_image_gz vmdk - -# OTA -create_ota_update diff --git a/buildroot-external/board/raspberrypi/boot-env.txt b/buildroot-external/board/raspberrypi/boot-env.txt new file mode 100644 index 000000000..fcfe987a0 --- /dev/null +++ b/buildroot-external/board/raspberrypi/boot-env.txt @@ -0,0 +1,1137 @@ +################################################################################ +## Raspberry Pi Configuration Settings +## +## Revision 16, 2013/06/22 +## +## Details taken from the eLinux wiki +## For up-to-date information please refer to wiki page. +## +## Wiki Location : http://elinux.org/RPiconfig +## +## +## Description: +## Details of each setting are described with each section that begins with +## a double hashed comment ('##') +## It is up to the user to remove the single hashed comment ('#') from each +## option they want to enable, and to set the specific value of that option. +## +## Overclock settings will be disabled at runtime if the SoC reaches temp_limit +## +################################################################################ + +################################################################################ +## HassOS - don't change it! +################################################################################ +kernel=u-boot.bin + +################################################################################ +## Standard Definition Video Settings +################################################################################ + +## sdtv_mode +## defines the TV standard for composite output +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Normal NTSC (Default) +## 1 Japanese version of NTSC - no pedestal +## 2 Normal PAL +## 3 Brazilian version of PAL - 525/60 rather than 625/50, different +## subcarrier +## +#sdtv_mode=0 + +## sdtv_aspect +## defines the aspect ratio for composite output +## +## Value Description +## ------------------------------------------------------------------------- +## 1 4:3 (Default) +## 2 14:9 +## 3 16:9 +## +#sdtv_aspect=1 + +## sdtv_disable_colourburst +## Disables colour burst on composite output. The picture will be +## monochrome, but possibly sharper +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Colour burst is enabled (Default) +## 1 Colour burst is disabled +## +#sdtv_disable_colourburst=1 + +################################################################################ +## High Definition Video Settings +################################################################################ + +## hdmi_safe +## Use "safe mode" settings to try to boot with maximum hdmi compatibility. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Disabled (Default) +## 1 Enabled (this does: hdmi_force_hotplug=1, +## hdmi_ignore_edid=0xa5000080, +## config_hdmi_boost=4, hdmi_group=2, +## hdmi_mode=4, disable_overscan=0, +## overscan_left=24, overscan_right=24, +## overscan_top=24, overscan_bottom=24) +## +#hdmi_safe=1 + +## hdmi_force_hotplug +## Pretends HDMI hotplug signal is asserted so it appears a HDMI display +## is attached +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Disabled (Default) +## 1 Use HDMI mode even if no HDMI monitor is detected +## +#hdmi_force_hotplug=1 + +## hdmi_ignore_hotplug +## Pretends HDMI hotplug signal is not asserted so it appears a HDMI +## display is not attached +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Disabled (Default) +## 1 Use composite mode even if HDMI monitor is detected +## +#hdmi_ignore_hotplug=1 + +## hdmi_drive +## chooses between HDMI and DVI modes +## +## Value Description +## ------------------------------------------------------------------------- +## 1 Normal DVI mode (No sound) +## 2 Normal HDMI mode (Sound will be sent if supported and enabled) +## +#hdmi_drive=2 + +## hdmi_ignore_edid +## Enables the ignoring of EDID/display data +## +#hdmi_ignore_edid=0xa5000080 + +## hdmi_edid_file +## Read the EDID data from the edid.dat file instead of from the attached +## device +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Read EDID data from attached device (Default) +## 1 Read EDID data from edid.txt file +## +#hdmi_edid_file=1 + +## hdmi_ignore_edid_audio +## Pretends all audio formats are unsupported by display. This means ALSA +## will default to analogue. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use EDID provided values (Default) +## 1 Pretend all audio formats are unsupported +## +#hdmi_ignore_edid_audio=1 + +## hdmi_force_edid_audio +## Pretends all audio formats are supported by display, allowing +## passthrough of DTS/AC3 even when not reported as supported. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use EDID provided values (Default) +## 1 Pretend all audio formats are supported +## +#hdmi_force_edid_audio=1 + +## hdmi_force_edid_3d +## Pretends all CEA modes support 3D even when edid doesn't indicate +## support for them. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use EDID provided values (Default) +## 1 Pretend 3D mode is supported +## +#hdmi_force_edid_3d=1 + +## avoid_edid_fuzzy_match +## Avoid fuzzy matching of modes described in edid. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use fuzzy matching (Default) +## 1 Avoid fuzzy matching +## +#avoid_edid_fuzzy_match=1 + +## hdmi_pixel_encoding +## Force the pixel encoding mode. +## By default it will use the mode requested from edid so shouldn't +## need changing. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use EDID provided values (Default) +## 1 RGB limited (16-235) +## 2 RGB full ( 0-255) +## 3 YCbCr limited (16-235) +## 4 YCbCr limited ( 0-255) +## +#hdmi_pixel_encoding=1 + +## hdmi_group +## Defines the HDMI type +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Use the preferred group reported by the edid (Default) +## 1 CEA +## 2 DMT +## +#hdmi_group=1 + +## hdmi_mode +## defines screen resolution in CEA or DMT format +## +## H means 16:9 variant (of a normally 4:3 mode). +## 2x means pixel doubled (i.e. higher clock rate, with each pixel repeated +## twice) +## 4x means pixel quadrupled (i.e. higher clock rate, with each pixel +## repeated four times) +## reduced blanking means fewer bytes are used for blanking within the data +## stream (i.e. lower clock rate, with fewer wasted bytes) +## +## Value hdmi_group=CEA hdmi_group=DMT +## ------------------------------------------------------------------------- +## 1 VGA 640x350 85Hz +## 2 480p 60Hz 640x400 85Hz +## 3 480p 60Hz H 720x400 85Hz +## 4 720p 60Hz 640x480 60Hz +## 5 1080i 60Hz 640x480 72Hz +## 6 480i 60Hz 640x480 75Hz +## 7 480i 60Hz H 640x480 85Hz +## 8 240p 60Hz 800x600 56Hz +## 9 240p 60Hz H 800x600 60Hz +## 10 480i 60Hz 4x 800x600 72Hz +## 11 480i 60Hz 4x H 800x600 75Hz +## 12 240p 60Hz 4x 800x600 85Hz +## 13 240p 60Hz 4x H 800x600 120Hz +## 14 480p 60Hz 2x 848x480 60Hz +## 15 480p 60Hz 2x H 1024x768 43Hz DO NOT USE +## 16 1080p 60Hz 1024x768 60Hz +## 17 576p 50Hz 1024x768 70Hz +## 18 576p 50Hz H 1024x768 75Hz +## 19 720p 50Hz 1024x768 85Hz +## 20 1080i 50Hz 1024x768 120Hz +## 21 576i 50Hz 1152x864 75Hz +## 22 576i 50Hz H 1280x768 reduced blanking +## 23 288p 50Hz 1280x768 60Hz +## 24 288p 50Hz H 1280x768 75Hz +## 25 576i 50Hz 4x 1280x768 85Hz +## 26 576i 50Hz 4x H 1280x768 120Hz reduced blanking +## 27 288p 50Hz 4x 1280x800 reduced blanking +## 28 288p 50Hz 4x H 1280x800 60Hz +## 29 576p 50Hz 2x 1280x800 75Hz +## 30 576p 50Hz 2x H 1280x800 85Hz +## 31 1080p 50Hz 1280x800 120Hz reduced blanking +## 32 1080p 24Hz 1280x960 60Hz +## 33 1080p 25Hz 1280x960 85Hz +## 34 1080p 30Hz 1280x960 120Hz reduced blanking +## 35 480p 60Hz 4x 1280x1024 60Hz +## 36 480p 60Hz 4x H 1280x1024 75Hz +## 37 576p 50Hz 4x 1280x1024 85Hz +## 38 576p 50Hz 4x H 1280x1024 120Hz reduced blanking +## 39 1080i 50Hz reduced blanking 1360x768 60Hz +## 40 1080i 100Hz 1360x768 120Hz reduced blanking +## 41 720p 100Hz 1400x1050 reduced blanking +## 42 576p 100Hz 1400x1050 60Hz +## 43 576p 100Hz H 1400x1050 75Hz +## 44 576i 100Hz 1400x1050 85Hz +## 45 576i 100Hz H 1400x1050 120Hz reduced blanking +## 46 1080i 120Hz 1440x900 reduced blanking +## 47 720p 120Hz 1440x900 60Hz +## 48 480p 120Hz 1440x900 75Hz +## 49 480p 120Hz H 1440x900 85Hz +## 50 480i 120Hz 1440x900 120Hz reduced blanking +## 51 480i 120Hz H 1600x1200 60Hz +## 52 576p 200Hz 1600x1200 65Hz +## 53 576p 200Hz H 1600x1200 70Hz +## 54 576i 200Hz 1600x1200 75Hz +## 55 576i 200Hz H 1600x1200 85Hz +## 56 480p 240Hz 1600x1200 120Hz reduced blanking +## 57 480p 240Hz H 1680x1050 reduced blanking +## 58 480i 240Hz 1680x1050 60Hz +## 59 480i 240Hz H 1680x1050 75Hz +## 60 1680x1050 85Hz +## 61 1680x1050 120Hz reduced blanking +## 62 1792x1344 60Hz +## 63 1792x1344 75Hz +## 64 1792x1344 120Hz reduced blanking +## 65 1856x1392 60Hz +## 66 1856x1392 75Hz +## 67 1856x1392 120Hz reduced blanking +## 68 1920x1200 reduced blanking +## 69 1920x1200 60Hz +## 70 1920x1200 75Hz +## 71 1920x1200 85Hz +## 72 1920x1200 120Hz reduced blanking +## 73 1920x1440 60Hz +## 74 1920x1440 75Hz +## 75 1920x1440 120Hz reduced blanking +## 76 2560x1600 reduced blanking +## 77 2560x1600 60Hz +## 78 2560x1600 75Hz +## 79 2560x1600 85Hz +## 80 2560x1600 120Hz reduced blanking +## 81 1366x768 60Hz +## 82 1080p 60Hz +## 83 1600x900 reduced blanking +## 84 2048x1152 reduced blanking +## 85 720p 60Hz +## 86 1366x768 reduced blanking +## +#hdmi_mode=1 + +## config_hdmi_boost +## configure the signal strength of the HDMI interface. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 (Default) +## 1 +## 2 +## 3 +## 4 Try if you have interference issues with HDMI +## 5 +## 6 +## 7 Maximum +## +#config_hdmi_boost=0 + +## hdmi_ignore_cec_init +## Doesn't sent initial active source message. Avoids bringing +## (CEC enabled) TV out of standby and channel switch when rebooting. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Normal behaviour (Default) +## 1 Doesn't sent initial active source message +## +#hdmi_ignore_cec_init=1 + +## hdmi_ignore_cec +## Pretends CEC is not supported at all by TV. +## No CEC functions will be supported. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Normal behaviour (Default) +## 1 Pretend CEC is not supported by TV +## +#hdmi_ignore_cec=1 + +################################################################################ +## Overscan Video Settings +################################################################################ + +## overscan_left +## Number of pixels to skip on left +## +#overscan_left=0 + +## overscan_right +## Number of pixels to skip on right +## +#overscan_right=0 + +## overscan_top +## Number of pixels to skip on top +## +#overscan_top=0 + +## overscan_bottom +## Number of pixels to skip on bottom +## +#overscan_bottom=0 + +## disable_overscan +## Set to 1 to disable overscan +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Overscan Enabled (Default) +## 1 Overscan Disabled +## +#disable_overscan=1 + +################################################################################ +## Framebuffer Video Settings +################################################################################ + +## framebuffer_width +## Console framebuffer width in pixels. Default is display width minus +## overscan. +## +#framebuffer_width=0 + +## framebuffer_height +## Console framebuffer height in pixels. Default is display height minus +## overscan. +## +#framebuffer_height=0 + +## framebuffer_depth +## Console framebuffer depth in bits per pixel. +## +## Value Description +## ------------------------------------------------------------------------- +## 8 Valid, but default RGB palette makes an unreadable screen +## 16 (Default) +## 24 Looks better but has corruption issues as of 2012/06/15 +## 32 Has no corruption issues but needs framebuffer_ignore_alpha=1 +## and shows the wrong colors as of 2012/06/15 +## +#framebuffer_depth=16 + +## framebuffer_ignore_alpha +## Set to 1 to disable alpha channel. Helps with 32bit. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Enable Alpha Channel (Default) +## 1 Disable Alpha Channel +## +#framebuffer_ignore_alpha=0 + +################################################################################ +## General Video Settings +################################################################################ + +## display_rotate +## Rotate the display clockwise or flip the display. +## The 90 and 270 degrees rotation options require additional memory on GPU, +## so won't work with the 16M GPU split. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 0 degrees (Default) +## 1 90 degrees +## 2 180 degrees +## 3 270 degrees +## 0x10000 Horizontal flip +## 0x20000 Vertical flip +## +#display_rotate=0 + +## dispmanx_offline +## Set to "1" to enable offline compositing +## +## Default 0 +## +#dispmanx_offline=0 + +################################################################################ +## Licensed Codecs +## +## Hardware decoding of additional codecs can be enabled by purchasing a +## license that is locked to the CPU serial number of your Raspberry Pi. +## +## Up to 8 licenses per CODEC can be specified as a comma seperated list. +## +################################################################################ + +## decode_MPG2 +## License key to allow hardware MPEG-2 decoding. +## +#decode_MPG2=0x12345678 + +## decode_WVC1 +## License key to allow hardware VC-1 decoding. +## +#decode_WVC1=0x12345678 + +################################################################################ +## Camera Settings +################################################################################ + +## start_x +## Set to "1" to enable the camera module. +## +## Enabling the camera requires gpu_mem option to be specified with a value +## of at least 128. +## +## Default 0 +## +#start_x=0 + +## disable_camera_led +## Turn off the red camera led when recording video or taking a still +## picture. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 LED enabled (Default) +## 1 LED disabled +## +#disable_camera_led=1 + +################################################################################ +## Test Settings +################################################################################ + +## test_mode +## Enable test sound/image during boot for manufacturing test. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Disable Test Mod (Default) +## 1 Enable Test Mode +## +#test_mode=0 + +################################################################################ +## Memory Settings +################################################################################ + +## disable_l2cache +## Disable arm access to GPU's L2 cache. Needs corresponding L2 disabled +## kernel. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Enable L2 Cache (Default) +## 1 Disable L2 cache +## +#disable_l2cache=0 + +## gpu_mem +## GPU memory allocation in MB for all board revisions. +## +## Default 64 +## +#gpu_mem=128 + +## gpu_mem_256 +## GPU memory allocation in MB for 256MB board revision. +## This option overrides gpu_mem. +## +#gpu_mem_256=192 + +## gpu_mem_512 +## GPU memory allocation in MB for 512MB board revision. +## This option overrides gpu_mem. +## +#gpu_mem_512=448 + +## gpu_mem_1024 +## GPU memory allocation in MB for 1024MB board revision. +## This option overrides gpu_mem. +## +#gpu_mem_1024=944 + +## disable_pvt +## Disable adjusting the refresh rate of RAM every 500ms +## (measuring RAM temparature). +## +#disable_pvt=1 + +################################################################################ +## CMA - Dynamic Memory Split +## +## CMA enables dynamic management of the ARM and GPU memory split at runtime. +## +## The following options need to be in cmdline.txt for CMA to work: +## coherent_pool=6M smsc95xx.turbo_mode=N +## +################################################################################ + +## cma_lwm +## When GPU has less than cma_lwm (low water mark) memory available it +## will request some from ARM. +## +#cma_lwm=16 + +## cma_hwm +## When GPU has more than cma_hwm (high water mark) memory available it +## will release some to ARM. +## +#cma_hwm=32 + +################################################################################ +## Boot Option Settings +################################################################################ + +## init_uart_baud +## Initial uart baud rate. +## +## Default 115200 +## +#init_uart_baud=115200 + +## init_uart_clock +## Initial uart clock. +## +## Default 3000000 (3MHz) +## +#init_uart_clock=3000000 + +## init_emmc_clock +## Initial emmc clock, increasing this can speedup your SD-card. +## +## Default 100000000 (100mhz) +## +#init_emmc_clock=100000000 + +## boot_delay +## Wait for a given number of seconds in start.elf before loading +## kernel.img. +## +## delay = (1000 * boot_delay) + boot_delay_ms +## +## Default 1 +## +#boot_delay=0 + +## boot_delay_ms +## Wait for a given number of milliseconds in start.elf before loading +## kernel.img. +## +## delay = (1000 * boot_delay) + boot_delay_ms +## +## Default 0 +## +#boot_delay_ms=0 + +## avoid_safe_mode +## Adding a jumper between pins 5 & 6 of P1 enables a recovery Safe Mode. +## If pins 5 & 6 are used for connecting to external devices (e.g. GPIO), +## then this setting can be used to ensure Safe Mode is not triggered. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Respect Safe Mode input (Default) +## 1 Ignore Safe Mode input +## +#avoid_safe_mode=1 + +## disable_splash +## Avoids the rainbow splash screen on boot. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Splash screen enabled (Default) +## 1 Splash screen disabled +## +disable_splash=1 + +################################################################################ +## Overclocking Settings +## +## ARM, SDRAM and GPU each have their own PLLs and can have unrelated +## frequencies. +## +## The GPU core, h264, v3d and isp share a PLL, so need to have related +## frequencies. +## pll_freq = floor(2400 / (2 * core_freq)) * (2 * core_freq) +## gpu_freq = pll_freq / [even number] +## +## The effective gpu_freq is automatically rounded to nearest even integer, so +## asking for core_freq = 500 and gpu_freq = 300 will result in divisor of +## 2000/300 = 6.666 => 6 and so 333.33MHz. +## +## +## Standard Profiles: +## arm_freq core_freq sdram_freq over_voltage +## ------------------------------------------------------------------------- +## None 700 250 400 0 +## Modest 800 300 400 0 +## Medium 900 333 450 2 +## High 950 450 450 6 +## Turbo 1000 500 500 6 +## +################################################################################ + +## force_turbo +## Control the kernel "ondemand" governor. It has no effect if no overclock +## settings are specified. +## May set warrany bit. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Enable dynamic clocks and voltage for the ARM core, GPU core and +## SDRAM (Default). +## Overclocking of h264_freq, v3d_freq and isp_freq is ignored. +## 1 Disable dynamic clocks and voltage for the ARM core, GPU core +## and SDRAM. +## Overclocking of h264_freq, v3d_freq and isp_freq is allowed. +## +#force_turbo=0 + +## initial_turbo +## Enables turbo mode from boot for the given value in seconds (up to 60) +## or until cpufreq sets a frequency. Can help with sdcard corruption if +## overclocked. +## +## Default 0 +## +#initial_turbo=0 + +## temp_limit +## Overheat protection. Sets clocks and voltages to default when the SoC +## reaches this Celsius value. +## Setting this higher than default voids warranty. +## +## Default 85 +## +#temp_limit=85 + +## arm_freq +## Frequency of ARM in MHz. +## +## Default 700. +## +#arm_freq=700 + +## arm_freq_min +## Minimum frequency of ARM in MHz (used for dynamic clocking). +## +## Default 700. +## +#arm_freq_min=700 + +## gpu_freq +## Sets core_freq, h264_freq, isp_freq, v3d_freq together. +## +## Default 250. +## +#gpu_freq=250 + +## core_freq +## Frequency of GPU processor core in MHz. It has an impact on ARM +## performance since it drives L2 cache. +## +## Default 250. +## +#core_freq=250 + +## core_freq_min +## Minimum frequency of GPU processor core in MHz (used for dynamic +## clocking). It has an impact on ARM performance since it drives L2 cache. +## +## Default 250. +## +#core_freq_min=250 + +## h264_freq +## Frequency of hardware video block in MHz. +## +## Default 250. +## +#h264_freq=250 + +## isp_freq +## Frequency of image sensor pipeline block in MHz. +## +## Default 250. +## +#isp_freq=250 + +## v3d_freq +## Frequency of 3D block in MHz. +## +## Default 250. +## +#v3d_freq=250 + +## sdram_freq +## Frequency of SDRAM in MHz. +## +## Default 400. +## +#sdram_freq=400 + +## sdram_freq_min +## Minimum frequency of SDRAM in MHz (used for dynamic clocking). +## +## Default 400. +## +#sdram_freq_min=400 + +## avoid_pwm_pll +## Don't dedicate a pll to PWM audio. This will reduce analogue audio +## quality slightly. The spare PLL allows the core_freq to be set +## independently from the rest of the gpu allowing more control over +## overclocking. +## +## Value Description +## ------------------------------------------------------------------------- +## 0 Linked core_freq (Default) +## 1 Unlinked core_freq +## +#avoid_pwm_pll=1 + +################################################################################ +## Voltage Settings +################################################################################ + +## current_limit_override +## Disables SMPS current limit protection. Can help if you are currently +## hitting a reboot failure when overclocking too high. +## May set warrany bit. +## +#current_limit_override=0x5A000020 + +## over_voltage +## ARM/GPU core voltage adjust. +## May set warrany bit. +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V (requires force_turbo=1 or current_limit_override) +## 8 1.4 V (requires force_turbo=1 or current_limit_override) +## +#over_voltage=0 + +## over_voltage_min +## Minimum ARM/GPU core voltage adjust (used for dynamic clocking). +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V (requires force_turbo=1) +## 8 1.4 V (requires force_turbo=1) +## +#over_voltage_min=0 + +## over_voltage_sdram +## Sets over_voltage_sdram_c, over_voltage_sdram_i, over_voltage_sdram_p +## together +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V +## 8 1.4 V +## +#over_voltage_sdram=0 + +## over_voltage_sdram_c +## SDRAM controller voltage adjust. +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V +## 8 1.4 V +## +#over_voltage_sdram_c=0 + +## over_voltage_sdram_i +## SDRAM I/O voltage adjust. +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V +## 8 1.4 V +## +#over_voltage_sdram_i=0 + +## over_voltage_sdram_p +## SDRAM phy voltage adjust. +## +## Value Description +## ------------------------------------------------------------------------- +## -16 0.8 V +## -15 0.825 V +## -14 0.85 V +## -13 0.875 V +## -12 0.9 V +## -11 0.925 V +## -10 0.95 V +## -9 0.975 V +## -8 1.0 V +## -7 1.025 V +## -6 1.05 V +## -5 1.075 V +## -4 1.1 V +## -3 1.125 V +## -2 1.15 V +## -1 1.175 V +## 0 1.2 V (Default) +## 1 1.225 V +## 2 1.25 V +## 3 1.275 V +## 4 1.3 V +## 5 1.325 V +## 6 1.35 V +## 7 1.375 V +## 8 1.4 V +## +#over_voltage_sdram_p=0 + +################################################################################ +## USB Power +################################################################################ + +## max_usb_current +## When set to 1, change the output current limit (for all 4 USB +## ports combined) from 600mA to double that, 1200mA. +## +## This option is not available for Model A/B boards. +## +## Default 0. +## +#max_usb_current=0 + +################################################################################ +## Base Device Tree Parameters +################################################################################ + +## audio +## Enable the onboard ALSA audio +## +## Default off. +## +dtparam=audio=on + +## i2c_arm +## Enable the ARM's i2c interface +## +## Default off. +## +dtparam=i2c_arm=on + +## i2c_vc +## Enable the i2c interface +## +## Usually reserved for the VideoCore processor +## +## Default off. +## +#dtparam=i2c_vc=off + +## i2c_arm_baudrate +## Set the baudrate of the ARM's i2c interface +## +## Default 100000. +## +#dtparam=i2c_arm_baudrate=100000 + +## i2c_vc_baudrate +## Set the baudrate of the VideoCore i2c interface +## +## Default 100000. +## +#dtparam=i2c_vc_baudrate=100000 + +## i2s +## Set to "on" to enable the i2s interface +## +## Default off. +## +#dtparam=i2s=off + +## spi +## Set to "on" to enable the spi interfaces +## +## Default off. +## +dtparam=spi=on + +## random +## Set to "on" to enable the hardware random +## +## Default off. +## +#dtparam=random=off + +## uart0 +## Set to "off" to disable uart0 +## +## Default on. +## +#dtparam=uart0=on + +## watchdog +## Set to "on" to enable the hardware watchdog +## +## Default off. +## +#dtparam=watchdog=off + +## act_led_trigger +## Choose which activity the LED tracks. +## +## Use "heartbeat" for a nice load indicator. +## +## Default mmc. +## +#dtparam=act_led_trigger=mmc + +## act_led_activelow +## Set to "on" to invert the sense of the LED +## +## Default off. +## +#dtparam=act_led_activelow=off + +## act_led_gpio +## Set which GPIO to use for the activity LED +## +## In case you want to connect it to an external device +## +## Default 16 on a non-Plus board, 47 on a Plus or Pi 2. +## +#dtparam=act_led_gpio=47 + +## pwr_led_trigger +## Choose which activity the LED tracks. +## +## Use "heartbeat" for a nice load indicator. +## +## Not available on Model A/B boards. +## +## Default mmc. +## +#dtparam=pwr_led_trigger=mmc + +## pwr_led_activelow +## Set to "on" to invert the sense of the LED +## +## Not available on Model A/B boards. +## +## Default off. +## +#dtparam=pwr_led_activelow=off + +## pwr_led_gpio +## Set which GPIO to use for the PWR LED +## +## In case you want to connect it to an external device +## +## Not available on Model A/B boards. +## +## Default 35. +## +#dtparam=pwr_led_gpio=35 diff --git a/buildroot-external/board/raspberrypi/hassos-hook.sh b/buildroot-external/board/raspberrypi/hassos-hook.sh new file mode 100755 index 000000000..246bc9437 --- /dev/null +++ b/buildroot-external/board/raspberrypi/hassos-hook.sh @@ -0,0 +1,30 @@ +#!/bin/bash + +function hassos_pre_image() { + local BOOT_DATA="$(path_boot_dir)" + + cp -t ${BOOT_DATA} \ + ${BINARIES_DIR}/u-boot.bin \ + ${BINARIES_DIR}/boot.scr + cp -t ${BOOT_DATA} \ + ${BINARIES_DIR}/*.dtb \ + ${BINARIES_DIR}/rpi-firmware/bootcode.bin \ + ${BINARIES_DIR}/rpi-firmware/fixup.dat \ + ${BINARIES_DIR}/rpi-firmware/start.elf + cp -r ${BINARIES_DIR}/rpi-firmware/overlays ${BOOT_DATA}/ + cp -f ${BOARD_DIR}/../boot-env.txt ${BOOT_DATA}/config.txt + + # Set cmd options + echo "dwc_otg.lpm_enable=0 console=tty1" > ${BOOT_DATA}/cmdline.txt + + # Enable 64bit support + if [ "${BOARD_ID}" == "rpi3-64" ]; then + echo "arm_64bit=1" >> ${BOOT_DATA}/config.txt + fi +} + + +function hassos_post_image() { + convert_disk_image_gz +} + diff --git a/buildroot-external/board/raspberrypi/post-image.sh b/buildroot-external/board/raspberrypi/post-image.sh deleted file mode 100755 index 893a6517c..000000000 --- a/buildroot-external/board/raspberrypi/post-image.sh +++ /dev/null @@ -1,49 +0,0 @@ -#!/bin/bash -set -e - -SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts -BOARD_DIR=${2} -BOOT_DATA=${BINARIES_DIR}/boot - -. ${SCRIPT_DIR}/hdd-image.sh -. ${SCRIPT_DIR}/name.sh -. ${SCRIPT_DIR}/ota.sh -. ${BR2_EXTERNAL_HASSOS_PATH}/info -. ${BOARD_DIR}/info - -# Init boot data -rm -rf ${BOOT_DATA} -mkdir -p ${BOOT_DATA} - -cp -t ${BOOT_DATA} \ - ${BINARIES_DIR}/u-boot.bin \ - ${BINARIES_DIR}/boot.scr -cp -t ${BOOT_DATA} \ - ${BINARIES_DIR}/*.dtb \ - ${BINARIES_DIR}/rpi-firmware/bootcode.bin \ - ${BINARIES_DIR}/rpi-firmware/fixup.dat \ - ${BINARIES_DIR}/rpi-firmware/start.elf -cp -r ${BINARIES_DIR}/rpi-firmware/overlays ${BOOT_DATA}/ - -# Update Boot options -( - echo "kernel=u-boot.bin" - echo "disable_splash=1" - echo "dtparam=audio=on" -) > ${BOOT_DATA}/config.txt - -echo "dwc_otg.lpm_enable=0 console=tty1" > ${BOOT_DATA}/cmdline.txt - -# Enable 64bit support -if [ "${BOARD_ID}" == "rpi3-64" ]; then - echo "arm_64bit=1" >> ${BOOT_DATA}/config.txt -fi - -# Create other layers -prepare_disk_image - -create_disk_image 2 -convert_disk_image_gz - -# OTA -create_ota_update diff --git a/buildroot-external/board/raspberrypi/rpi/info b/buildroot-external/board/raspberrypi/rpi/meta similarity index 87% rename from buildroot-external/board/raspberrypi/rpi/info rename to buildroot-external/board/raspberrypi/rpi/meta index 8475fa254..4e0cc9368 100644 --- a/buildroot-external/board/raspberrypi/rpi/info +++ b/buildroot-external/board/raspberrypi/rpi/meta @@ -3,5 +3,5 @@ BOARD_NAME="RaspberryPi" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=zImage -BOOT_SYS=mbr +BOOT_SYS=hyprid BOOT_ENV_SIZE=0x4000 diff --git a/buildroot-external/board/raspberrypi/rpi0-w/info b/buildroot-external/board/raspberrypi/rpi0-w/meta similarity index 88% rename from buildroot-external/board/raspberrypi/rpi0-w/info rename to buildroot-external/board/raspberrypi/rpi0-w/meta index 80dd3ee2a..056946a6d 100644 --- a/buildroot-external/board/raspberrypi/rpi0-w/info +++ b/buildroot-external/board/raspberrypi/rpi0-w/meta @@ -3,5 +3,5 @@ BOARD_NAME="RaspberryPi Zero-W" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=zImage -BOOT_SYS=mbr +BOOT_SYS=hyprid BOOT_ENV_SIZE=0x4000 diff --git a/buildroot-external/board/raspberrypi/rpi2/info b/buildroot-external/board/raspberrypi/rpi2/meta similarity index 87% rename from buildroot-external/board/raspberrypi/rpi2/info rename to buildroot-external/board/raspberrypi/rpi2/meta index df9e10c43..d24ec65c4 100644 --- a/buildroot-external/board/raspberrypi/rpi2/info +++ b/buildroot-external/board/raspberrypi/rpi2/meta @@ -3,5 +3,5 @@ BOARD_NAME="RaspberryPi 2" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=zImage -BOOT_SYS=mbr +BOOT_SYS=hyprid BOOT_ENV_SIZE=0x4000 diff --git a/buildroot-external/board/raspberrypi/rpi3-64/info b/buildroot-external/board/raspberrypi/rpi3-64/meta similarity index 88% rename from buildroot-external/board/raspberrypi/rpi3-64/info rename to buildroot-external/board/raspberrypi/rpi3-64/meta index 51a01e899..b6dd5c2e4 100644 --- a/buildroot-external/board/raspberrypi/rpi3-64/info +++ b/buildroot-external/board/raspberrypi/rpi3-64/meta @@ -3,5 +3,5 @@ BOARD_NAME="RaspberryPi 3 64bit" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=Image -BOOT_SYS=mbr +BOOT_SYS=hyprid BOOT_ENV_SIZE=0x4000 diff --git a/buildroot-external/board/raspberrypi/rpi3/info b/buildroot-external/board/raspberrypi/rpi3/meta similarity index 87% rename from buildroot-external/board/raspberrypi/rpi3/info rename to buildroot-external/board/raspberrypi/rpi3/meta index 2e5083119..0f8810ab5 100644 --- a/buildroot-external/board/raspberrypi/rpi3/info +++ b/buildroot-external/board/raspberrypi/rpi3/meta @@ -3,5 +3,5 @@ BOARD_NAME="RaspberryPi 3" CHASSIS=embedded BOOTLOADER=uboot KERNEL_FILE=zImage -BOOT_SYS=mbr +BOOT_SYS=hyprid BOOT_ENV_SIZE=0x4000 diff --git a/buildroot-external/board/raspberrypi/uboot.config b/buildroot-external/board/raspberrypi/uboot.config index 0043ca31e..68813977d 100644 --- a/buildroot-external/board/raspberrypi/uboot.config +++ b/buildroot-external/board/raspberrypi/uboot.config @@ -1,3 +1,3 @@ # CONFIG_USB_STORAGE is not set -# CONFIG_ENV_FAT_INTERFACE is not set -# CONFIG_ENV_FAT_DEVICE_AND_PART is not set +# CONFIG_DOS_PARTITION is not set +CONFIG_ENV_IS_IN_MMC=y diff --git a/buildroot-external/board/tinker/post-image.sh b/buildroot-external/board/tinker/post-image.sh deleted file mode 100755 index 369ec6c10..000000000 --- a/buildroot-external/board/tinker/post-image.sh +++ /dev/null @@ -1,35 +0,0 @@ -#!/bin/bash -set -e - -SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts -BOARD_DIR=${2} -BOOT_DATA=${BINARIES_DIR}/boot - -. ${SCRIPT_DIR}/hdd-image.sh -. ${SCRIPT_DIR}/name.sh -. ${SCRIPT_DIR}/ota.sh -. ${BR2_EXTERNAL_HASSOS_PATH}/info -. ${BOARD_DIR}/info - -# Init boot data -rm -rf ${BOOT_DATA} -mkdir -p ${BOOT_DATA} - -cp -t ${BOOT_DATA} \ - ${BINARIES_DIR}/boot.scr \ - ${BINARIES_DIR}/rk3288-tinker.dtb - -echo "console=tty1" > ${BOOT_DATA}/cmdline.txt - -# Create boot binary -rm -f $BINARIES_DIR/u-boot-spl-dtb.img -mkimage -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-spl-dtb.bin $BINARIES_DIR/u-boot-spl-dtb.img -cat $BINARIES_DIR/u-boot-dtb.bin >> $BINARIES_DIR/u-boot-spl-dtb.img - -# Create other layers -prepare_disk_image -create_spl_image u-boot-spl-dtb.img 64 - -create_disk_image 2 -convert_disk_image_gz -create_ota_update diff --git a/buildroot-external/bootloader/uboot.config b/buildroot-external/bootloader/uboot.config index 991646358..3887259b9 100644 --- a/buildroot-external/bootloader/uboot.config +++ b/buildroot-external/bootloader/uboot.config @@ -5,14 +5,12 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOOTDELAY=2 CONFIG_SYS_PROMPT="HassOS> " -# CONFIG_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION=y CONFIG_FS_EXT4=y -# CONFIG_ENV_IS_NOWHERE is not set +CONFIG_FS_FAT=y # CONFIG_ENV_IS_IN_FAT is not set # CONFIG_ENV_IS_IN_EXT4 is not set -CONFIG_ENV_IS_IN_MMC=y CONFIG_CONSOLE_SCROLL_LINES=10 # CONFIG_EFI_LOADER is not set CONFIG_CMD_SETEXPR=y diff --git a/buildroot-external/configs/odroid_c2_defconfig b/buildroot-external/configs/odroid_c2_defconfig new file mode 100644 index 000000000..8ec5031f9 --- /dev/null +++ b/buildroot-external/configs/odroid_c2_defconfig @@ -0,0 +1,95 @@ +BR2_aarch64=y +BR2_DL_DIR="/cache/dl" +BR2_CCACHE=y +BR2_CCACHE_DIR="/cache/cc" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/patches" +BR2_TOOLCHAIN_BUILDROOT_GLIBC=y +BR2_KERNEL_HEADERS_4_14=y +BR2_GCC_VERSION_7_X=y +BR2_TOOLCHAIN_BUILDROOT_CXX=y +BR2_TARGET_GENERIC_HOSTNAME="hassio" +BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS" +BR2_INIT_SYSTEMD=y +BR2_TARGET_GENERIC_GETTY_PORT="tty1" +# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_VERSION=y +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.36" +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/kernel.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" +BR2_LINUX_KERNEL_LZ4=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="amlogic/meson-gxbb-odroidc2" +BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y +BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y +BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config" +BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y +BR2_PACKAGE_JQ=y +BR2_PACKAGE_E2FSPROGS=y +BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y +BR2_PACKAGE_SQUASHFS=y +BR2_PACKAGE_GPTFDISK=y +BR2_PACKAGE_GPTFDISK_SGDISK=y +BR2_PACKAGE_UBOOT_TOOLS=y +BR2_PACKAGE_CA_CERTIFICATES=y +BR2_PACKAGE_LIBDNET=y +BR2_PACKAGE_LIBCGROUP=y +BR2_PACKAGE_LIBCGROUP_TOOLS=y +BR2_PACKAGE_AVAHI=y +# BR2_PACKAGE_AVAHI_AUTOIPD is not set +BR2_PACKAGE_AVAHI_DAEMON=y +BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y +BR2_PACKAGE_BLUEZ5_UTILS=y +BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y +BR2_PACKAGE_BLUEZ5_UTILS_DEPRECATED=y +BR2_PACKAGE_DHCP=y +BR2_PACKAGE_DHCP_CLIENT=y +BR2_PACKAGE_DROPBEAR=y +# BR2_PACKAGE_DROPBEAR_CLIENT is not set +# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set +BR2_PACKAGE_NETWORK_MANAGER=y +BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y +BR2_PACKAGE_TINI=y +BR2_PACKAGE_DOCKER_ENGINE=y +BR2_PACKAGE_RAUC=y +BR2_PACKAGE_RAUC_NETWORK=y +# BR2_PACKAGE_SYSTEMD_HWDB is not set +# BR2_PACKAGE_SYSTEMD_NETWORKD is not set +BR2_PACKAGE_SYSTEMD_RANDOMSEED=y +# BR2_PACKAGE_SYSTEMD_RESOLVED is not set +BR2_PACKAGE_UTIL_LINUX_PARTX=y +BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y +BR2_TARGET_ROOTFS_SQUASHFS=y +BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y +# BR2_TARGET_ROOTFS_TAR is not set +BR2_TARGET_UBOOT=y +BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y +BR2_TARGET_UBOOT_CUSTOM_VERSION=y +BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07" +BR2_TARGET_UBOOT_BOARD_DEFCONFIG="odroid-c2" +BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot.config" +BR2_TARGET_UBOOT_BOOT_SCRIPT=y +BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/uboot-boot.sh" +BR2_PACKAGE_HOST_DOSFSTOOLS=y +BR2_PACKAGE_HOST_E2FSPROGS=y +BR2_PACKAGE_HOST_GPTFDISK=y +BR2_PACKAGE_HOST_MTOOLS=y +BR2_PACKAGE_HOST_RAUC=y +BR2_PACKAGE_HASSOS=y +BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" +BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/odroid-c2-homeassistant" +BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" +BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" +BR2_PACKAGE_HASSOS_CLI="homeassistant/aarch64-hassio-cli" +BR2_PACKAGE_HASSOS_CLI_VERSION="6" +BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2" +BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default" +BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor" +BR2_PACKAGE_APPARMOR=y +BR2_PACKAGE_HARDKERNEL_BOOT=y diff --git a/buildroot-external/configs/ova_defconfig b/buildroot-external/configs/ova_defconfig index 97a41477f..9f9854eee 100644 --- a/buildroot-external/configs/ova_defconfig +++ b/buildroot-external/configs/ova_defconfig @@ -14,11 +14,11 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/ova/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/ova" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.59" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.67" BR2_LINUX_KERNEL_DEFCONFIG="x86_64" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/kernel.config" BR2_LINUX_KERNEL_LZ4=y @@ -77,7 +77,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/amd64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/qemux86-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi0_w_defconfig b/buildroot-external/configs/rpi0_w_defconfig index 64ad4a76d..51395fb6a 100644 --- a/buildroot-external/configs/rpi0_w_defconfig +++ b/buildroot-external/configs/rpi0_w_defconfig @@ -16,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0-w" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi0-w $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6da082a790f857d5163ac99357beae6b59f1eb5" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -85,7 +85,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi2_defconfig b/buildroot-external/configs/rpi2_defconfig index 8ccef5297..97c0f7f5a 100644 --- a/buildroot-external/configs/rpi2_defconfig +++ b/buildroot-external/configs/rpi2_defconfig @@ -16,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi2 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6da082a790f857d5163ac99357beae6b59f1eb5" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -84,7 +84,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi2-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_64_defconfig b/buildroot-external/configs/rpi3_64_defconfig index d4fc8afc4..d2ef3ff88 100644 --- a/buildroot-external/configs/rpi3_64_defconfig +++ b/buildroot-external/configs/rpi3_64_defconfig @@ -16,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6da082a790f857d5163ac99357beae6b59f1eb5" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -85,7 +85,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/aarch64-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-64-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi3_defconfig b/buildroot-external/configs/rpi3_defconfig index 33d1ecf37..35427891f 100644 --- a/buildroot-external/configs/rpi3_defconfig +++ b/buildroot-external/configs/rpi3_defconfig @@ -16,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3 $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6da082a790f857d5163ac99357beae6b59f1eb5" BR2_LINUX_KERNEL_DEFCONFIG="bcm2709" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -85,7 +85,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi3-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/rpi_defconfig b/buildroot-external/configs/rpi_defconfig index 55d8bbe71..c12de5c04 100644 --- a/buildroot-external/configs/rpi_defconfig +++ b/buildroot-external/configs/rpi_defconfig @@ -16,12 +16,12 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_GIT=y BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux" -BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="f6da082a790f857d5163ac99357beae6b59f1eb5" BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y @@ -84,7 +84,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/raspberrypi-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/configs/tinker_defconfig b/buildroot-external/configs/tinker_defconfig index f52564ec1..ff921fa88 100644 --- a/buildroot-external/configs/tinker_defconfig +++ b/buildroot-external/configs/tinker_defconfig @@ -4,7 +4,7 @@ BR2_ARM_FPU_NEON_VFPV4=y BR2_DL_DIR="/cache/dl" BR2_CCACHE=y BR2_CCACHE_DIR="/cache/cc" -BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/patches" +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/patches" BR2_TOOLCHAIN_BUILDROOT_GLIBC=y BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y BR2_GCC_VERSION_7_X=y @@ -16,13 +16,13 @@ BR2_TARGET_GENERIC_GETTY_PORT="tty1" # BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay" BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh" -BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/post-image.sh" -BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker" +BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh" BR2_LINUX_KERNEL=y BR2_LINUX_KERNEL_CUSTOM_VERSION=y -BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.59" +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.67" BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y -BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/kernel.config" +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config" BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config" BR2_LINUX_KERNEL_LZ4=y BR2_LINUX_KERNEL_DTS_SUPPORT=y @@ -75,13 +75,13 @@ BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y BR2_TARGET_UBOOT_CUSTOM_VERSION=y BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07" BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-rk3288" -BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/uboot.config" +BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot.config" BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y BR2_TARGET_UBOOT_SPL=y BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl-dtb.bin" BR2_TARGET_UBOOT_BOOT_SCRIPT=y -BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/uboot-boot.sh" +BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.sh" BR2_PACKAGE_HOST_DOSFSTOOLS=y BR2_PACKAGE_HOST_E2FSPROGS=y BR2_PACKAGE_HOST_GPTFDISK=y @@ -89,7 +89,7 @@ BR2_PACKAGE_HOST_MTOOLS=y BR2_PACKAGE_HOST_RAUC=y BR2_PACKAGE_HASSOS=y BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor" -BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="123" +BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="127" BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor" BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt" diff --git a/buildroot-external/kernel/hassos-4_14.config b/buildroot-external/kernel/hassos-4_14.config index 5e10e7e52..ba4551719 100644 --- a/buildroot-external/kernel/hassos-4_14.config +++ b/buildroot-external/kernel/hassos-4_14.config @@ -23,6 +23,8 @@ CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_NET_CLS_CGROUP=y CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_BPF=y +CONFIG_BPF_SYSCALL=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y @@ -70,6 +72,8 @@ CONFIG_XFRM_USER=y CONFIG_XFRM_ALGO=y CONFIG_NET_L3_MASTER_DEV=y +CONFIG_MISC_FILESYSTEMS=y +CONFIG_BLOCK=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y diff --git a/buildroot-external/info b/buildroot-external/meta similarity index 83% rename from buildroot-external/info rename to buildroot-external/meta index 3be56da15..0a4d30355 100644 --- a/buildroot-external/info +++ b/buildroot-external/meta @@ -1,5 +1,5 @@ VERSION_MAJOR=2 -VERSION_BUILD=1 +VERSION_BUILD=2 HASSOS_NAME="HassOS" HASSOS_ID="hassos" diff --git a/buildroot-external/misc/mbr-part.rules b/buildroot-external/misc/mbr-part.rules new file mode 100644 index 000000000..c8be3b15f --- /dev/null +++ b/buildroot-external/misc/mbr-part.rules @@ -0,0 +1,6 @@ +ENV{ID_PART_ENTRY_UUID}=="48617373-01", SYMLINK+="disk/by-partlabel/hassos-boot" +ENV{ID_PART_ENTRY_UUID}=="48617373-05", SYMLINK+="disk/by-partlabel/hassos-kernel0" +ENV{ID_PART_ENTRY_UUID}=="48617373-06", SYMLINK+="disk/by-partlabel/hassos-system0" +ENV{ID_PART_ENTRY_UUID}=="48617373-07", SYMLINK+="disk/by-partlabel/hassos-kernel1" +ENV{ID_PART_ENTRY_UUID}=="48617373-08", SYMLINK+="disk/by-partlabel/hassos-system1" +ENV{ID_PART_ENTRY_UUID}=="48617373-09", SYMLINK+="disk/by-partlabel/hassos-bootstate" diff --git a/buildroot-external/misc/rauc-hook b/buildroot-external/misc/rauc-hook index 0058d3887..851472e94 100755 --- a/buildroot-external/misc/rauc-hook +++ b/buildroot-external/misc/rauc-hook @@ -5,16 +5,27 @@ # Handle boot hocks if [ "${RAUC_SLOT_CLASS}" = "boot" ]; then - if [ "${1}" = "slot-post-install" ]; then - /usr/lib/rauc/post-install-boot - elif [ "${1}" = "slot-pre-install" ]; then - /usr/lib/rauc/pre-install-boot + BOOT_DATA=/tmp/boot-data + + mkdir -p ${BOOT_DATA} + if [ "${1}" = "slot-pre-install" ]; then + cp -f ${RAUC_SLOT_MOUNT_POINT}/*.txt ${BOOT_DATA}/ + elif [ "${1}" = "slot-post-install" ]; then + cp -f ${BOOT_DATA}/*.txt ${RAUC_SLOT_MOUNT_POINT}/ fi fi # Handle spl install if [ "${RAUC_SLOT_CLASS}" = "spl" ]; then - /usr/lib/rauc/install-spl "${RAUC_IMAGE_NAME}" + DEVICE_CHILD="$(findfs LABEL="hassos-boot")" + DEVICE_ROOT="/dev/$(lsblk -no pkname ${DEVICE_CHILD})" + + if sfdisk -dq ${DEVICE_ROOT} | grep -q 'label: gpt'; then + dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=512 seek=2 skip=2 + else + dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=1 count=440 + dd if=${RAUC_IMAGE_NAME} of=${DEVICE_ROOT} conv=notrunc bs=512 seek=1 skip=1 + fi fi ## diff --git a/buildroot-external/package/hardkernel-boot/Config.in b/buildroot-external/package/hardkernel-boot/Config.in new file mode 100644 index 000000000..8a1462916 --- /dev/null +++ b/buildroot-external/package/hardkernel-boot/Config.in @@ -0,0 +1,19 @@ +config BR2_PACKAGE_HARDKERNEL_BOOT + bool "Hardkernel Secure Boot Loader" + depends on BR2_TARGET_UBOOT + help + Augment uboot for secure loading on hardkernel targets. + +if BR2_PACKAGE_HARDKERNEL_BOOT +choice + prompt "Target" + default BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2 + +config BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2 + bool "Odroid-C2" + help + For the Odroid-C2 + +endchoice + +endif diff --git a/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk b/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk new file mode 100644 index 000000000..d9bbdd7e6 --- /dev/null +++ b/buildroot-external/package/hardkernel-boot/hardkernel-boot.mk @@ -0,0 +1,39 @@ +################################################################################ +# +# hardkernel secure boot loader +# +################################################################################ + +HARDKERNEL_BOOT_VERSION = 205c7b3259559283161703a1a200b787c2c445a5 +HARDKERNEL_BOOT_SOURCE = $(HARDKERNEL_BOOT_VERSION).tar.gz +HARDKERNEL_BOOT_SITE = https://github.com/hardkernel/u-boot/archive +HARDKERNEL_BOOT_LICENSE = GPL-2.0+ +HARDKERNEL_BOOT_LICENSE_FILES = Licenses/gpl-2.0.txt +HARDKERNEL_BOOT_INSTALL_IMAGES = YES +HARDKERNEL_BOOT_DEPENDENCIES = uboot + + +ifeq ($(BR2_PACKAGE_HARDKERNEL_BOOT_ODROID_C2),y) +HARDKERNEL_BOOT_BINS += sd_fuse/bl1.bin.hardkernel \ + u-boot.gxbb +define HARDKERNEL_BOOT_BUILD_CMDS + $(@D)/fip/fip_create --bl30 $(@D)/fip/gxb/bl30.bin \ + --bl301 $(@D)/fip/gxb/bl301.bin \ + --bl31 $(@D)/fip/gxb/bl31.bin \ + --bl33 $(BINARIES_DIR)/u-boot.bin \ + $(@D)/fip.bin + cat $(@D)/fip/gxb/bl2.package $(@D)/fip.bin > $(@D)/boot_new.bin + $(@D)/fip/gxb/aml_encrypt_gxb --bootsig \ + --input $(@D)/boot_new.bin \ + --output $(@D)/u-boot.img + dd if=$(@D)/u-boot.img of=$(@D)/u-boot.gxbb bs=512 skip=96 +endef +endif + +define HARDKERNEL_BOOT_INSTALL_IMAGES_CMDS + $(foreach f,$(HARDKERNEL_BOOT_BINS), \ + cp -dpf $(@D)/$(f) $(BINARIES_DIR)/ + ) +endef + +$(eval $(generic-package)) diff --git a/buildroot-external/rootfs-overlay/usr/lib/rauc/install-spl b/buildroot-external/rootfs-overlay/usr/lib/rauc/install-spl deleted file mode 100755 index 96c06dcfb..000000000 --- a/buildroot-external/rootfs-overlay/usr/lib/rauc/install-spl +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh - -DEVICE_CHILD="$(findfs LABEL="hassos-boot")" -DEVICE_ROOT="/dev/$(lsblk -no pkname ${DEVICE_CHILD})" -IMAGE_FILE="${1}" - -# Check params -if [ ! -f "${IMAGE_FILE}" ]; then - echo "[Error] Can't find image: ${IMAGE_FILE}" - exit 1 -fi - -dd if=${IMAGE_FILE} of=${DEVICE_ROOT} conv=notrunc bs=512 seek=2 diff --git a/buildroot-external/rootfs-overlay/usr/lib/rauc/post-install-boot b/buildroot-external/rootfs-overlay/usr/lib/rauc/post-install-boot deleted file mode 100755 index 53bfd2ded..000000000 --- a/buildroot-external/rootfs-overlay/usr/lib/rauc/post-install-boot +++ /dev/null @@ -1,7 +0,0 @@ -#!/bin/sh - -BOOT_DATA=/tmp/boot-data - -cp -f ${BOOT_DATA}/*.txt ${RAUC_SLOT_MOUNT_POINT}/ - -rm -rf ${BOOT_DATA} diff --git a/buildroot-external/rootfs-overlay/usr/lib/rauc/pre-install-boot b/buildroot-external/rootfs-overlay/usr/lib/rauc/pre-install-boot deleted file mode 100755 index f101d548d..000000000 --- a/buildroot-external/rootfs-overlay/usr/lib/rauc/pre-install-boot +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -BOOT_DATA=/tmp/boot-data - -rm -rf ${BOOT_DATA} -mkdir -p ${BOOT_DATA} - -cp -f ${RAUC_SLOT_MOUNT_POINT}/*.txt ${BOOT_DATA}/ diff --git a/buildroot-external/rootfs-overlay/usr/sbin/hassos-expand b/buildroot-external/rootfs-overlay/usr/sbin/hassos-expand index 29e7b2a39..1a1c323a9 100755 --- a/buildroot-external/rootfs-overlay/usr/sbin/hassos-expand +++ b/buildroot-external/rootfs-overlay/usr/sbin/hassos-expand @@ -3,18 +3,34 @@ set -e DEVICE_CHILD="$(findfs LABEL="hassos-data")" DEVICE_ROOT="/dev/$(lsblk -no pkname ${DEVICE_CHILD})" -PART_NUM="$(sgdisk -p ${DEVICE_ROOT} | awk '/hassos-data/ { print $1 }')" +PART_NUM="${DEVICE_CHILD: -1}" -# Need resize -if [ $(sgdisk -E ${DEVICE_ROOT}) -le 2048 ]; then - echo "[INFO] No resize of data partition needed" - exit +if sfdisk -dq ${DEVICE_ROOT} | grep -q 'label: gpt'; then + + # Need resize + if [ $(sgdisk -E ${DEVICE_ROOT}) -le 2048 ]; then + echo "[INFO] No resize of data partition needed" + exit 0 + fi + + # Resize & Reload partition + echo "[INFO] Update hassos-data partition ${PART_NUM}" + sgdisk -e ${DEVICE_ROOT} + sgdisk -d ${PART_NUM} -n ${PART_NUM}:0:0 -c ${PART_NUM}:"hassos-data" -t ${PART_NUM}:"0FC63DAF-8483-4772-8E79-3D69D8477DE4" -u ${PART_NUM}:"a52a4597-fa3a-4851-aefd-2fbe9f849079" ${DEVICE_ROOT} + sgdisk -v ${DEVICE_ROOT} +else + + # Need resize + UNUSED=$(sfdisk -Fq ${DEVICE_ROOT} | cut -d " " -f 3 | tail -1) + if [ -z "${UNUSED}" ] || [ ${UNUSED} -le 2048 ]; then + echo "[INFO] No resize of data partition needed" + exit 0 + fi + + echo ", +" | sfdisk -N ${PART_NUM} ${DEVICE_ROOT} --force + sfdisk -V ${DEVICE_ROOT} fi -# Resize & Reload partition -echo "[INFO] Update hassos-data partition ${PART_NUM}" -sgdisk -e ${DEVICE_ROOT} -sgdisk -d ${PART_NUM} -n ${PART_NUM}:0:0 -c ${PART_NUM}:"hassos-data" -t ${PART_NUM}:"0FC63DAF-8483-4772-8E79-3D69D8477DE4" -u ${PART_NUM}:"a52a4597-fa3a-4851-aefd-2fbe9f849079" ${DEVICE_ROOT} partx -u ${DEVICE_ROOT} # Resize filesystem diff --git a/buildroot-external/scripts/hdd-image.sh b/buildroot-external/scripts/hdd-image.sh index c8734fd6a..a70e3ce1c 100755 --- a/buildroot-external/scripts/hdd-image.sh +++ b/buildroot-external/scripts/hdd-image.sh @@ -18,6 +18,27 @@ OVERLAY_SIZE=96M DATA_SIZE=1G +function size2sectors() { + s=0 + for v in "${@}" + do + let s+=$(echo $v | awk \ + 'BEGIN{IGNORECASE = 1} + function printsectors(n,b,p) {printf "%u\n", n*b^p/512} + /B$/{ printsectors($1, 1, 0)}; + /K(iB)?$/{printsectors($1, 2, 10)}; + /M(iB)?$/{printsectors($1, 2, 20)}; + /G(iB)?$/{printsectors($1, 2, 30)}; + /T(iB)?$/{printsectors($1, 2, 40)}; + /KB$/{ printsectors($1, 10, 3)}; + /MB$/{ printsectors($1, 10, 6)}; + /GB$/{ printsectors($1, 10, 9)}; + /TB$/{ printsectors($1, 10, 12)}') + done + echo $s +} + + function get_boot_size() { if [ "${BOOT_SYS}" == "spl" ]; then echo "${BOOT_SIZE[1]}" @@ -28,18 +49,15 @@ function get_boot_size() { function create_spl_image() { - local spl_data="${BINARIES_DIR}/${1}" - local spl_img="${BINARIES_DIR}/spl.img" - local spl_seek=$(($2-2)) + local boot_img="$(path_spl_img)" - dd if=/dev/zero of=${spl_img} bs=512 count=16382 - dd if=${spl_data} of=${spl_img} conv=notrunc bs=512 seek=${spl_seek} + dd if=/dev/zero of=${boot_img} bs=512 count=16382 } function create_boot_image() { - local boot_data="${BINARIES_DIR}/boot" - local boot_img="${BINARIES_DIR}/boot.vfat" + local boot_data="$(path_boot_dir)" + local boot_img="$(path_boot_img)" echo "mtools_skip_check=1" > ~/.mtoolsrc dd if=/dev/zero of=${boot_img} bs=$(get_boot_size) count=1 @@ -49,7 +67,7 @@ function create_boot_image() { function create_overlay_image() { - local overlay_img="${BINARIES_DIR}/overlay.ext4" + local overlay_img="$(path_overlay_img)" dd if=/dev/zero of=${overlay_img} bs=${OVERLAY_SIZE} count=1 mkfs.ext4 -L "hassos-overlay" -E lazy_itable_init=0,lazy_journal_init=0 ${overlay_img} @@ -57,7 +75,7 @@ function create_overlay_image() { function create_kernel_image() { - local kernel_img="${BINARIES_DIR}/kernel.ext4" + local kernel_img="$(path_kernel_img)" local kernel="${BINARIES_DIR}/${KERNEL_FILE}" # Make image @@ -72,7 +90,7 @@ function create_kernel_image() { } -function prepare_disk_image() { +function _prepare_disk_image() { create_boot_image create_overlay_image create_kernel_image @@ -80,13 +98,24 @@ function prepare_disk_image() { function create_disk_image() { - local boot_img="${BINARIES_DIR}/boot.vfat" - local rootfs_img="${BINARIES_DIR}/rootfs.squashfs" - local overlay_img="${BINARIES_DIR}/overlay.ext4" - local data_img="${BINARIES_DIR}/data.ext4" - local kernel_img="${BINARIES_DIR}/kernel.ext4" + _prepare_disk_image + + if [ "${BOOT_SYS}" == "mbr" ]; then + _create_disk_mbr + else + _create_disk_gpt + fi +} + + +function _create_disk_gpt() { + local boot_img="$(path_boot_img)" + local rootfs_img="$(path_rootfs_img)" + local overlay_img="$(path_overlay_img)" + local data_img="$(path_data_img)" + local kernel_img="$(path_kernel_img)" local hdd_img="$(hassos_image_name img)" - local hdd_count=${1:-2} + local hdd_count=${DISK_SIZE:-2} local boot_offset=0 local rootfs_offset=0 @@ -146,15 +175,87 @@ function create_disk_image() { dd if=${data_img} of=${hdd_img} conv=notrunc bs=512 seek=${data_offset} # Fix boot - if [ "${BOOT_SYS}" == "mbr" ]; then - fix_disk_image_mbr + if [ "${BOOT_SYS}" == "hyprid" ]; then + _fix_disk_hyprid elif [ "${BOOT_SYS}" == "spl" ]; then - fix_disk_image_spl + _fix_disk_spl_gpt fi } -function fix_disk_image_mbr() { +function _create_disk_mbr() { + local boot_img="$(path_boot_img)" + local rootfs_img="$(path_rootfs_img)" + local overlay_img="$(path_overlay_img)" + local data_img="$(path_data_img)" + local kernel_img="$(path_kernel_img)" + local hdd_img="$(hassos_image_name img)" + local hdd_count=${DISK_SIZE:-2} + local disk_layout="${BINARIES_DIR}/disk.layout" + + # Write new image & MBR + dd if=/dev/zero of=${hdd_img} bs=1G count=${hdd_count} + + let boot_start=16384 + + let boot_size=$(size2sectors ${BOOT_SIZE})+2 + let kernel0_size=$(size2sectors ${KERNEL_SIZE})+2 + let system0_size=$(size2sectors ${SYSTEM_SIZE})+2 + let kernel1_size=$(size2sectors ${KERNEL_SIZE})+2 + let system1_size=$(size2sectors ${SYSTEM_SIZE})+2 + let bootstate_size=$(size2sectors ${BOOTSTATE_SIZE})+2 + let overlay_size=$(size2sectors ${OVERLAY_SIZE})+2 + let data_size=$(size2sectors ${DATA_SIZE})+2 + let extended_size=${kernel0_size}+${system0_size}+${kernel1_size}+${system1_size}+${bootstate_size}+2 + + + let extended_start=${boot_start}+${boot_size}+1 + let kernel0_start=${extended_start}+1 # we add one here for the extended header. + let system0_start=${kernel0_start}+${kernel0_size}+1 + let kernel1_start=${system0_start}+${system0_size}+1 + let system1_start=${kernel1_start}+${kernel1_size}+1 + let bootstate_start=${system1_start}+${system1_size}+1 + let overlay_start=${extended_start}+${extended_size}+1 + let data_start=${overlay_start}+${overlay_size}+1 + + + let boot_offset=${boot_start} + let kernel_offset=${kernel0_start} + let rootfs_offset=${system0_start} + let overlay_offset=${overlay_start} + let data_offset=${data_start} + # Update disk layout + ( + echo "label: dos" + echo "label-id: 0x48617373" + echo "unit: sectors" + echo "hassos-boot : start= ${boot_start}, size= ${boot_size}, type=c, bootable" #create the boot partition + echo "hassos-extended : start= ${extended_start}, size= ${extended_size}, type=5" #Make an extended partition + echo "hassos-kernel : start= ${kernel0_start}, size= ${kernel0_size}, type=83" #Make a logical Linux partition + echo "hassos-system : start= ${system0_start}, size= ${system0_size}, type=83" #Make a logical Linux partition + echo "hassos-kernel : start= ${kernel1_start} size= ${kernel1_size}, type=83" #Make a logical Linux partition + echo "hassos-system : start= ${system1_start}, size= ${system1_size}, type=83" #Make a logical Linux partition + echo "hassos-bootstate : start= ${bootstate_start}, size= ${bootstate_size}, type=83" #Make a logical Linux partition + echo "hassos-overlay : start= ${overlay_start}, size= ${overlay_size}, type=83" #Make a Linux partition + echo "hassos-data : start= ${data_start}, size= ${data_size}, type=83" #Make a Linux partition + ) > ${disk_layout} + + # Update Labels + sfdisk ${hdd_img} < ${disk_layout} + + # Write Images + dd if=${boot_img} of=${hdd_img} conv=notrunc bs=512 seek=${boot_offset} + dd if=${kernel_img} of=${hdd_img} conv=notrunc bs=512 seek=${kernel_offset} + dd if=${rootfs_img} of=${hdd_img} conv=notrunc bs=512 seek=${rootfs_offset} + dd if=${overlay_img} of=${hdd_img} conv=notrunc bs=512 seek=${overlay_offset} + dd if=${data_img} of=${hdd_img} conv=notrunc bs=512 seek=${data_offset} + + # Wripte SPL + _fix_disk_spl_mbr +} + + +function _fix_disk_hyprid() { local hdd_img="$(hassos_image_name img)" sgdisk -t 1:"E3C9E316-0B5C-4DB8-817D-F92DF00215AE" ${hdd_img} @@ -162,13 +263,24 @@ function fix_disk_image_mbr() { } -function fix_disk_image_spl() { +function _fix_disk_spl_gpt() { local hdd_img="$(hassos_image_name img)" - local spl_img="${BINARIES_DIR}/spl.img" + local spl_img="$(path_spl_img)" + local backup="/tmp/mbr-backup.bin" sgdisk -t 1:"E3C9E316-0B5C-4DB8-817D-F92DF00215AE" ${hdd_img} dd if=${BR2_EXTERNAL_HASSOS_PATH}/misc/mbr-spl.img of=${hdd_img} conv=notrunc bs=512 count=1 - dd if=${spl_img} of=${hdd_img} conv=notrunc bs=512 seek=2 + dd if=${spl_img} of=${hdd_img} conv=notrunc bs=512 seek=2 skip=2 +} + + +function _fix_disk_spl_mbr() { + local hdd_img="$(hassos_image_name img)" + local spl_img="$(path_spl_img)" + + # backup MBR + dd if=${spl_img} of=${hdd_img} conv=notrunc bs=1 count=440 + dd if=${spl_img} of=${hdd_img} conv=notrunc bs=512 seek=1 skip=1 } diff --git a/buildroot-external/scripts/name.sh b/buildroot-external/scripts/name.sh index 2307427e0..383bc19f4 100755 --- a/buildroot-external/scripts/name.sh +++ b/buildroot-external/scripts/name.sh @@ -11,3 +11,32 @@ function hassos_rauc_compatible() { function hassos_version() { echo "${VERSION_MAJOR}.${VERSION_BUILD}" } + +function path_spl_img() { + echo "${BINARIES_DIR}/spl.img" +} + +function path_kernel_img() { + echo "${BINARIES_DIR}/kernel.ext4" +} + +function path_boot_img() { + echo "${BINARIES_DIR}/boot.vfat" +} + +function path_boot_dir() { + echo "${BINARIES_DIR}/boot" +} + +function path_data_img() { + echo "${BINARIES_DIR}/data.ext4" +} + +function path_overlay_img() { + echo "${BINARIES_DIR}/overlay.ext4" +} + +function path_rootfs_img() { + echo "${BINARIES_DIR}/rootfs.squashfs" +} + diff --git a/buildroot-external/scripts/ota.sh b/buildroot-external/scripts/ota.sh index d793e35d2..c33aeb414 100755 --- a/buildroot-external/scripts/ota.sh +++ b/buildroot-external/scripts/ota.sh @@ -10,6 +10,11 @@ function create_ota_update() { local key="/build/key.pem" local cert="/build/cert.pem" + # Skeep if no dev key is arround + if [ ! -f "${key}" ]; then + return 0 + fi + rm -rf ${rauc_folder} ${ota_file} mkdir -p ${rauc_folder} diff --git a/buildroot-external/scripts/post-build.sh b/buildroot-external/scripts/post-build.sh index eeb964c2f..0e8a7d770 100755 --- a/buildroot-external/scripts/post-build.sh +++ b/buildroot-external/scripts/post-build.sh @@ -4,9 +4,10 @@ set -e SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts BOARD_DIR=${2} +. ${BR2_EXTERNAL_HASSOS_PATH}/meta +. ${BOARD_DIR}/meta + . ${SCRIPT_DIR}/rootfs-layer.sh -. ${BR2_EXTERNAL_HASSOS_PATH}/info -. ${BOARD_DIR}/info . ${SCRIPT_DIR}/name.sh . ${SCRIPT_DIR}/rauc.sh @@ -35,8 +36,7 @@ install_hassos_cli ) > ${TARGET_DIR}/etc/machine-info -# Setup rauc +# Setup RAUC write_rauc_config install_rauc_certs install_bootloader_config - diff --git a/buildroot-external/scripts/post-image.sh b/buildroot-external/scripts/post-image.sh new file mode 100755 index 000000000..163dd16f4 --- /dev/null +++ b/buildroot-external/scripts/post-image.sh @@ -0,0 +1,30 @@ +#!/bin/bash +set -e + +SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts +BOARD_DIR=${2} +HOOK_FILE=${3} + +. ${BR2_EXTERNAL_HASSOS_PATH}/meta +. ${BOARD_DIR}/meta + +. ${SCRIPT_DIR}/hdd-image.sh +. ${SCRIPT_DIR}/rootfs-layer.sh +. ${SCRIPT_DIR}/name.sh +. ${SCRIPT_DIR}/rauc.sh +. ${SCRIPT_DIR}/ota.sh +. ${HOOK_FILE} + +# Cleanup +rm -rf "$(path_boot_dir)" +mkdir -p "$(path_boot_dir)" + +# Hook pre image build stuff +hassos_pre_image + +# Disk & OTA +create_disk_image +create_ota_update + +# Hook post image build stuff +hassos_post_image diff --git a/buildroot-external/scripts/rauc.sh b/buildroot-external/scripts/rauc.sh index 6327c22c5..b130564e0 100755 --- a/buildroot-external/scripts/rauc.sh +++ b/buildroot-external/scripts/rauc.sh @@ -20,13 +20,15 @@ function _create_rauc_header() { function _write_rauc_boot() { + local boot_device=${1} ( echo "[slot.boot.0]" echo "device=/dev/disk/by-partlabel/hassos-boot" echo "type=vfat" ) >> ${TARGET_DIR}/etc/rauc/system.conf - if [ "${BOOT_SYS}" != "spl" ]; then + # SPL + if ! [[ "${BOOT_SYS}" =~ (spl|mbr) ]]; then return 0 fi @@ -77,9 +79,14 @@ function install_rauc_certs() { function install_bootloader_config() { if [ "${BOOTLOADER}" == "uboot" ]; then - echo -e "/dev/disk/by-partlabel/hassos-bootstate\t0x00\t${BOOT_ENV_SIZE}" > ${TARGET_DIR}/etc/fw_env.config + echo -e "/dev/disk/by-partlabel/hassos-bootstate\t0x0000\t${BOOT_ENV_SIZE}" > ${TARGET_DIR}/etc/fw_env.config else - cp ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${TARGET_DIR}/etc/barebox-state.dtb + cp -f ${BR2_EXTERNAL_HASSOS_PATH}/misc/barebox-state-efi.dtb ${TARGET_DIR}/etc/barebox-state.dtb + fi + + # Fix MBR + if [ "${BOOT_SYS}" == "mbr" ]; then + mkdir -p ${TARGET_DIR}/etc/udev/rules.d + cp -f ${BR2_EXTERNAL_HASSOS_PATH}/misc/mbr-part.rules ${TARGET_DIR}/etc/udev/rules.d/ fi } - diff --git a/buildroot-patches/0006-Pump-raspberry-pi-firmware-for-kernel-4.14.patch b/buildroot-patches/0006-Pump-raspberry-pi-firmware-for-kernel-4.14.patch index fc0454e34..e6f080a3c 100644 --- a/buildroot-patches/0006-Pump-raspberry-pi-firmware-for-kernel-4.14.patch +++ b/buildroot-patches/0006-Pump-raspberry-pi-firmware-for-kernel-4.14.patch @@ -16,7 +16,7 @@ index 4854deae03..3a9f21e877 100644 @@ -1,2 +1,2 @@ # Locally computed -sha256 ea451834e20136d249661e0ed7d1fdfa309249d233a387f44dd6c3b746a454c6 rpi-firmware-36f991382326907419f64917624427e59fd8e4a0.tar.gz -+sha256 59c3b8a817c6e40f34ce7e0d2f1b3f84bbec70761f306ca373aa12a6c3edb6c7 rpi-firmware-bffe7ee6b276f23822883f3d7fd7b705d12c26b9.tar.gz ++sha256 a72ddbd1a4e96ca508fc14d0c31784ec119b68edcab2929c9779ae618db15388 rpi-firmware-200c2f4dd54b2048b5dcb8661ea3f232beb7d81e.tar.gz diff --git a/package/rpi-firmware/rpi-firmware.mk b/package/rpi-firmware/rpi-firmware.mk index eab4c5d307..cb2e9d6cd8 100644 --- a/package/rpi-firmware/rpi-firmware.mk @@ -26,7 +26,7 @@ index eab4c5d307..cb2e9d6cd8 100644 ################################################################################ -RPI_FIRMWARE_VERSION = 36f991382326907419f64917624427e59fd8e4a0 -+RPI_FIRMWARE_VERSION = bffe7ee6b276f23822883f3d7fd7b705d12c26b9 ++RPI_FIRMWARE_VERSION = 200c2f4dd54b2048b5dcb8661ea3f232beb7d81e RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom diff --git a/buildroot/package/rpi-firmware/rpi-firmware.hash b/buildroot/package/rpi-firmware/rpi-firmware.hash index adab8c7b3..61ada8d95 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.hash +++ b/buildroot/package/rpi-firmware/rpi-firmware.hash @@ -1,2 +1,2 @@ # Locally computed -sha256 59c3b8a817c6e40f34ce7e0d2f1b3f84bbec70761f306ca373aa12a6c3edb6c7 rpi-firmware-bffe7ee6b276f23822883f3d7fd7b705d12c26b9.tar.gz +sha256 a72ddbd1a4e96ca508fc14d0c31784ec119b68edcab2929c9779ae618db15388 rpi-firmware-200c2f4dd54b2048b5dcb8661ea3f232beb7d81e.tar.gz diff --git a/buildroot/package/rpi-firmware/rpi-firmware.mk b/buildroot/package/rpi-firmware/rpi-firmware.mk index e5641e621..b1524e730 100644 --- a/buildroot/package/rpi-firmware/rpi-firmware.mk +++ b/buildroot/package/rpi-firmware/rpi-firmware.mk @@ -4,7 +4,7 @@ # ################################################################################ -RPI_FIRMWARE_VERSION = bffe7ee6b276f23822883f3d7fd7b705d12c26b9 +RPI_FIRMWARE_VERSION = 200c2f4dd54b2048b5dcb8661ea3f232beb7d81e RPI_FIRMWARE_SITE = $(call github,raspberrypi,firmware,$(RPI_FIRMWARE_VERSION)) RPI_FIRMWARE_LICENSE = BSD-3-Clause RPI_FIRMWARE_LICENSE_FILES = boot/LICENCE.broadcom diff --git a/scripts/build-all.sh b/scripts/build-all.sh index 59d46a6d9..00917982b 100755 --- a/scripts/build-all.sh +++ b/scripts/build-all.sh @@ -3,7 +3,7 @@ set -e mkdir -p /build/release -all_platforms=(ova rpi rpi0_w rpi2 rpi3 rpi3_64 tinker) +all_platforms=(ova rpi rpi0_w rpi2 rpi3 rpi3_64 tinker odroid_c2) for platform in "${all_platforms[@]}"; do make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external \ ${platform}_defconfig