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Update to 6.6 LTS kernel (#3063)

Browse Source 
* Linux: Update kernel 6.6.15

* Update buildroot packages to work with Linux 6.6

* Fix top-level and pc patches of linux

* Update tinker patch series

* Drop Odroid M1 patches

M1 is now supported in upstream.

* Update Hardkernel patches

Needed larger refactoring because of 379ae64609c7a3301b60483eb65bd8bc78f76328

* Update Green patches

* Update Odroid XU4 patches

Removing the TMU patch/hack for now, need to check if it's still needed.
If it is indeed, then it needs slighter rewrite.

* Move Rockchip RNG patches to M1 and Green dirs

* Update rtl88x2bu package to fix build

* Update gasket package to fix build

* Fix eq3_char_loop build

* Use fan53555 instead of custom rk860x driver

* Fix kernel base configs and fragments after 6.6 update

Mostly removed options that have been removed between releases. Only
a few options have been renamed, then there's bunch of options that
had dependencies added so they are available only on some architectures,
which are not those that we're using.

* Remove deprecated regulator-compatible from Green DTS
This commit is contained in:
Jan Čermák 2024-02-02 14:27:18 +01:00 committed by GitHub
parent c90c175754
commit 9dcf8ae82f
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
73 changed files with 691 additions and 2504 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/kernel.md
View File

@ -5,7 +5,7 @@ Default Kernel tree: 6.1
| Board | Version |
|-------|---------|
| Open Virtual Appliance | 6.1.76 |
| Open Virtual Appliance | 6.6.15 |
| Raspberry Pi | 6.1.63 |
| Raspberry Pi 0-W | 6.1.63 |
| Raspberry Pi 2 | 6.1.63 |
@ -13,13 +13,13 @@ Default Kernel tree: 6.1
| Raspberry Pi 4 | 6.1.63 |
| Raspberry Pi 5 | 6.1.63 |
| Home Assistant Yellow | 6.1.63 |
| Home Assistant Green | 6.1.76 |
| Tinker Board | 6.1.76 |
| ODROID-C2 | 6.1.76 |
| ODROID-C4 | 6.1.76 |
| ODROID-M1 | 6.1.76 |
| ODROID-N2 | 6.1.76 |
| ODROID-XU4 | 6.1.76 |
| Generic aarch64 | 6.1.76 |
| Generic x86-64 | 6.1.76 |
| Khadas VIM3 | 6.1.76 |
| Home Assistant Green | 6.6.15 |
| Tinker Board | 6.6.15 |
| ODROID-C2 | 6.6.15 |
| ODROID-C4 | 6.6.15 |
| ODROID-M1 | 6.6.15 |
| ODROID-N2 | 6.6.15 |
| ODROID-XU4 | 6.6.15 |
| Generic aarch64 | 6.6.15 |
| Generic x86-64 | 6.6.15 |
| Khadas VIM3 | 6.6.15 |

2
buildroot

@ -1 +1 @@
Subproject commit 015e99f244f47c7b7de953af97b21a2979fe5400
Subproject commit 1b68b623a29a5aa768b5aadf61cd4082d18801c9

29
buildroot-external/board/asus/tinker/kernel.config
View File

@ -28,7 +28,6 @@ CONFIG_CGROUP_BPF=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARM_THUMBEE=y
@ -183,7 +182,6 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
@ -319,7 +317,6 @@ CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
@ -402,10 +399,8 @@ CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y
CONFIG_6LOWPAN=m
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
CONFIG_NET_SCH_ATM=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_MULTIQ=m
CONFIG_NET_SCH_RED=m
@ -416,7 +411,6 @@ CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_CBS=m
CONFIG_NET_SCH_ETF=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_DRR=m
CONFIG_NET_SCH_MQPRIO=m
@ -849,7 +843,6 @@ CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_SCH5627=m
CONFIG_SENSORS_SCH5636=m
CONFIG_SENSORS_STTS751=m
CONFIG_SENSORS_SMM665=m
CONFIG_SENSORS_ADC128D818=m
CONFIG_SENSORS_ADS7828=m
CONFIG_SENSORS_ADS7871=m
@ -884,7 +877,7 @@ CONFIG_DW_WATCHDOG=m
CONFIG_MFD_MADERA=m
CONFIG_MFD_MADERA_I2C=m
CONFIG_MFD_CPCAP=m
CONFIG_MFD_RK808=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_TPS6586X=y
CONFIG_MFD_ROHM_BD718XX=m
CONFIG_REGULATOR_FIXED_VOLTAGE=y
@ -972,7 +965,6 @@ CONFIG_VIDEO_USBTV=m
CONFIG_USB_VIDEO_CLASS=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_CX231XX=m
CONFIG_VIDEO_CX231XX_ALSA=m
@ -1033,15 +1025,12 @@ CONFIG_VIDEO_XILINX_TPG=m
CONFIG_SMS_SDIO_DRV=m
CONFIG_SMS_SIANO_DEBUGFS=y
CONFIG_VIDEO_IMX274=m
CONFIG_VIDEO_MT9M032=m
CONFIG_VIDEO_MT9M111=m
CONFIG_VIDEO_MT9P031=m
CONFIG_VIDEO_MT9T001=m
CONFIG_VIDEO_MT9T112=m
CONFIG_VIDEO_MT9V011=m
CONFIG_VIDEO_MT9V032=m
CONFIG_VIDEO_MT9V111=m
CONFIG_VIDEO_NOON010PC30=m
CONFIG_VIDEO_OV13858=m
CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m
@ -1061,14 +1050,9 @@ CONFIG_VIDEO_OV7740=m
CONFIG_VIDEO_OV9650=m
CONFIG_VIDEO_RJ54N1=m
CONFIG_VIDEO_S5C73M3=m
CONFIG_VIDEO_S5K4ECGX=m
CONFIG_VIDEO_S5K5BAF=m
CONFIG_VIDEO_S5K6A3=m
CONFIG_VIDEO_S5K6AA=m
CONFIG_VIDEO_SR030PC30=m
CONFIG_VIDEO_VS6624=m
CONFIG_VIDEO_ET8EK8=m
CONFIG_VIDEO_M5MOLS=m
CONFIG_VIDEO_AK7375=m
CONFIG_VIDEO_DW9807_VCM=m
CONFIG_VIDEO_ADP1653=m
@ -1105,7 +1089,6 @@ CONFIG_VIDEO_TW9903=m
CONFIG_VIDEO_TW9906=m
CONFIG_VIDEO_VPX3220=m
CONFIG_VIDEO_SAA717X=m
CONFIG_VIDEO_AD9389B=m
CONFIG_VIDEO_ADV7170=m
CONFIG_VIDEO_ADV7175=m
CONFIG_VIDEO_ADV7343=m
@ -1349,7 +1332,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
@ -1407,7 +1389,6 @@ CONFIG_PL330_DMA=y
CONFIG_STAGING=y
CONFIG_RTL8723BS=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_FB_TFT=m
CONFIG_FB_TFT_AGM1264K_FL=m
CONFIG_FB_TFT_BD663474=m
@ -1512,7 +1493,6 @@ CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V1=m
CONFIG_QFMT_V2=m
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=y
@ -1533,7 +1513,7 @@ CONFIG_ECRYPT_FS=m
CONFIG_HFS_FS=m
CONFIG_HFSPLUS_FS=m
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_DECOMP_MULTI=y
CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@ -1541,8 +1521,6 @@ CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_PSTORE=y
CONFIG_PSTORE_DEFLATE_COMPRESS=m
CONFIG_PSTORE_LZ4HC_COMPRESS=m
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_RAM=y
CONFIG_NFS_FS=y
@ -1609,7 +1587,7 @@ CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_POLY1305=m
CONFIG_CRYPTO_RMD160=m
CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_SHA3=y
CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_XCBC=m
@ -1649,7 +1627,6 @@ CONFIG_DETECT_HUNG_TASK=y
CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
CONFIG_SCHEDSTATS=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_CREDENTIALS=y
CONFIG_RCU_CPU_STALL_TIMEOUT=60
# CONFIG_RCU_TRACE is not set
CONFIG_FUNCTION_TRACER=y

16
buildroot-external/board/asus/tinker/patches/linux/0001-Revert-ARM-dts-rockchip-use-DMA-channels-for-UARTs-f.patch
View File

@ -1,5 +1,4 @@
From 3553f8a938dbb498aa1846a37ea343b7f53739da Mon Sep 17 00:00:00 2001
Message-Id: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From b4d676729c5bee4b9adb85362f6f2e32f833b6c2 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 17 Feb 2021 19:55:41 +0100
Subject: [PATCH] Revert "ARM: dts: rockchip: use DMA channels for UARTs for
@ -7,13 +6,13 @@ Subject: [PATCH] Revert "ARM: dts: rockchip: use DMA channels for UARTs for
This reverts commit 3425fe335c29310f6628faf9a7947d07f32d8962.
---
arch/arm/boot/dts/rk3288.dtsi | 8 --------
arch/arm/boot/dts/rockchip/rk3288.dtsi | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 487b0e03d4b4..1569b1824c89 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index cb9cdaddffd4..51f1273d6beb 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -378,8 +378,6 @@ uart0: serial@ff180000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
@ -50,6 +49,3 @@ index 487b0e03d4b4..1569b1824c89 100644
pinctrl-names = "default";
pinctrl-0 = <&uart4_xfer>;
status = "disabled";
--
2.39.1

16
buildroot-external/board/asus/tinker/patches/linux/0002-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch
View File

@ -1,7 +1,4 @@
From 695638c05c0bb6f7bcc65e172dd132b3aa280b47 Mon Sep 17 00:00:00 2001
Message-Id: <695638c05c0bb6f7bcc65e172dd132b3aa280b47.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From 02c7d9bb23f497993d52f5a41341ed955e6a2745 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
@ -17,13 +14,13 @@ Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
[move change to rk3288-tinker.dtsi]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 19 +++++++++++++++++++
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
index 09618bb7d872..30430d2e64b9 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
@@ -483,6 +483,25 @@ &sdio0 {
status = "okay";
};
@ -50,6 +47,3 @@ index 09618bb7d872..30430d2e64b9 100644
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
--
2.39.1

16
buildroot-external/board/asus/tinker/patches/linux/0003-ARM-dts-rockchip-enable-I2C1-4-on-rk3288-tinker.patch
View File

@ -1,7 +1,4 @@
From d04122215cb56b57458e05b475e41744b8126533 Mon Sep 17 00:00:00 2001
Message-Id: <d04122215cb56b57458e05b475e41744b8126533.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From bf7869033cf3caa50912cbdfa548428a6571c104 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 4 Sep 2020 21:57:55 +0200
Subject: [PATCH] ARM: dts: rockchip: enable I2C1/4 on rk3288-tinker
@ -10,13 +7,13 @@ Enable I2C devices which are accessible via 40-pin header.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 8 ++++++++
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
index 30430d2e64b9..395afc2b2283 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
@@ -342,10 +342,18 @@ regulator-state-mem {
};
};
@ -36,6 +33,3 @@ index 30430d2e64b9..395afc2b2283 100644
&i2c5 {
status = "okay";
};
--
2.39.1

18
buildroot-external/board/asus/tinker/patches/linux/0004-RK3288-DTSI-rk3288.dtsi-Add-missing-SPI2-pinctrl.patch
View File

@ -1,7 +1,4 @@
From 7d37754f29c379c5066c6abf38c8d01d654b1613 Mon Sep 17 00:00:00 2001
Message-Id: <7d37754f29c379c5066c6abf38c8d01d654b1613.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From a0ef6a86e96920a9cf703d8c65d0126494037d37 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:24:47 +0200
Subject: [PATCH] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
@ -13,13 +10,13 @@ This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
arch/arm/boot/dts/rockchip/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1569b1824c89..478fd1bb85df 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 51f1273d6beb..d8663928bfe2 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -311,7 +311,7 @@ spi2: spi@ff130000 {
dma-names = "tx", "rx";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
@ -29,6 +26,3 @@ index 1569b1824c89..478fd1bb85df 100644
reg = <0x0 0xff130000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.39.1

16
buildroot-external/board/asus/tinker/patches/linux/0005-ARM-DTSI-rk3288-tinker-Improving-the-CPU-max-voltage.patch
View File

@ -1,7 +1,4 @@
From 05fde1d1dbbe7805a58a8c445b8fb19e0df59826 Mon Sep 17 00:00:00 2001
Message-Id: <05fde1d1dbbe7805a58a8c445b8fb19e0df59826.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From e828e0fc2be98e5ad20c93981681505fc97b063b Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:16:05 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
@ -10,13 +7,13 @@ Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
index 395afc2b2283..c7e79e594720 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
@@ -184,7 +184,7 @@ vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
@ -26,6 +23,3 @@ index 395afc2b2283..c7e79e594720 100644
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.39.1

10
buildroot-external/board/asus/tinker/patches/linux/0006-drivers-mmc-dw-mci-rockchip-Handle-ASUS-Tinkerboard-.patch
View File

@ -1,7 +1,4 @@
From 940d61e1e04929166d5a2bcbc1934aa931952ca5 Mon Sep 17 00:00:00 2001
Message-Id: <940d61e1e04929166d5a2bcbc1934aa931952ca5.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From ad1ffd6be5f54a0871e3c303602548687dfe0ffc Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 7 Jan 2018 01:52:44 +0100
Subject: [PATCH] drivers: mmc: dw-mci-rockchip: Handle ASUS Tinkerboard reboot
@ -24,7 +21,7 @@ Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
1 file changed, 66 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 2a99f15f527f..181718374429 100644
index b07190ba4b7a..0badaa1b404e 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -12,6 +12,11 @@
@ -114,6 +111,3 @@ index 2a99f15f527f..181718374429 100644
return 0;
}
--
2.39.1

16
buildroot-external/board/asus/tinker/patches/linux/0007-ARM-dts-rockchip-Add-Bluetooth-to-rk3288-tinker.patch
View File

@ -1,7 +1,4 @@
From 479e2acb95c09b15382b3766391294790ebd200b Mon Sep 17 00:00:00 2001
Message-Id: <479e2acb95c09b15382b3766391294790ebd200b.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From 4e6c3d013c847f199664a3075934f5ca52d8cba4 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Tue, 10 May 2022 22:57:26 +0200
Subject: [PATCH] ARM: dts: rockchip: Add Bluetooth to rk3288-tinker
@ -11,13 +8,13 @@ for Realtek rtl8723bs Bluetooth device.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 26 ++++++++++++++++++++++++++
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
index c7e79e594720..5d261fae6e72 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
@@ -386,6 +386,20 @@ bl_en: bl-en {
};
};
@ -58,6 +55,3 @@ index c7e79e594720..5d261fae6e72 100644
};
&uart1 {
--
2.39.1

32
buildroot-external/board/asus/tinker/patches/linux/0008-usb-audio-add-ASUS-TinkerBoard-s-ALC4040.patch Normal file
View File

@ -0,0 +1,32 @@
From f597ec583c262ed4c3264ddf661e22b503fb8a11 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= <sairon@sairon.cz>
Date: Wed, 10 Jan 2024 16:29:59 +0100
Subject: [PATCH] usb-audio: add ASUS TinkerBoard's ALC4040
Converted to git-series patch from the original plain git diff file
buildroot-external/board/asus/tinker/patches/linux/3001_Tinkerboard-4.19-audio.patch
Co-authored-by: Pascal Vizeli <pascal.vizeli@syshack.ch>
---
sound/usb/card.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 1b2edc0fd2e9..3069ac5b6759 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -521,6 +521,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

19
buildroot-external/board/asus/tinker/patches/linux/3001_Tinkerboard-4.19-audio.patch
View File

@ -1,19 +0,0 @@
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 2bfe4e80a..cea93aaf5 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -382,6 +382,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

15
buildroot-external/board/hardkernel/kernel-amlogic.config
View File

@ -117,7 +117,6 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m
@ -232,7 +231,6 @@ CONFIG_DEVTMPFS_MOUNT=y
CONFIG_BRCMSTB_GISB_ARB=y
CONFIG_VEXPRESS_CONFIG=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_CAPSULE_LOADER=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
@ -257,8 +255,6 @@ CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_CEVA=y
CONFIG_AHCI_XGENE=y
CONFIG_AHCI_QORIQ=y
CONFIG_SATA_SIL24=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_MD=y
@ -382,8 +378,6 @@ CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OPTEE=m
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
# CONFIG_RANDOM_TRUST_CPU is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
@ -395,11 +389,9 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_SLAVE=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=m
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_MESON_SPICC=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=m
CONFIG_SPMI=y
CONFIG_PINCTRL=y
@ -442,7 +434,7 @@ CONFIG_MFD_BD9571MWV=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_HI6421_PMIC=y
CONFIG_MFD_MAX77620=y
CONFIG_MFD_RK808=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_ROHM_BD718XX=y
CONFIG_REGULATOR=y
@ -534,7 +526,6 @@ CONFIG_VIDEO_USBTV=m
CONFIG_USB_VIDEO_CLASS=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_CX231XX=m
CONFIG_VIDEO_CX231XX_ALSA=m
@ -675,7 +666,6 @@ CONFIG_VIRTIO_MMIO=y
CONFIG_XEN_GNTDEV=y
CONFIG_XEN_GRANT_DEV_ALLOC=y
CONFIG_STAGING=y
CONFIG_R8188EU=m
CONFIG_CHROME_PLATFORMS=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
@ -709,7 +699,6 @@ CONFIG_MPL3115=m
CONFIG_PWM=y
CONFIG_PWM_CROS_EC=m
CONFIG_PWM_MESON=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_PHY_SAMSUNG_USB2=y
CONFIG_HISI_PMU=y
@ -728,7 +717,7 @@ CONFIG_BTRFS_FS=m
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS4_FS=y
CONFIG_AUTOFS_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=y

40
buildroot-external/board/hardkernel/kernel-rockchip.config
View File

@ -240,7 +240,6 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
@ -376,7 +375,6 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
@ -482,10 +480,8 @@ CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y
CONFIG_IEEE802154_6LOWPAN=m
CONFIG_MAC802154=m
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
CONFIG_NET_SCH_ATM=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_MULTIQ=m
CONFIG_NET_SCH_RED=m
@ -497,7 +493,6 @@ CONFIG_NET_SCH_CBS=m
CONFIG_NET_SCH_ETF=m
CONFIG_NET_SCH_TAPRIO=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_DRR=m
CONFIG_NET_SCH_MQPRIO=m
@ -719,7 +714,6 @@ CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_DMI_SYSFS=y
CONFIG_ISCSI_IBFT=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_GNSS=m
@ -757,7 +751,6 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=m
CONFIG_OF_OVERLAY=y
CONFIG_PARPORT=m
CONFIG_PARPORT_AX88796=m
CONFIG_BLK_DEV_NULL_BLK=m
CONFIG_ZRAM=m
CONFIG_ZRAM_WRITEBACK=y
@ -803,7 +796,6 @@ CONFIG_BCM_VK=m
CONFIG_MISC_ALCOR_PCI=m
CONFIG_MISC_RTSX_PCI=m
CONFIG_MISC_RTSX_USB=m
CONFIG_HABANA_AI=m
CONFIG_UACCE=m
CONFIG_GP_PCI1XXXX=m
CONFIG_RAID_ATTRS=y
@ -871,7 +863,6 @@ CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_DWC=m
CONFIG_AHCI_SUNXI=y
CONFIG_AHCI_TEGRA=y
CONFIG_AHCI_XGENE=y
CONFIG_SATA_INIC162X=m
CONFIG_SATA_ACARD_AHCI=m
CONFIG_SATA_SIL24=y
@ -1080,7 +1071,6 @@ CONFIG_E1000=m
CONFIG_E1000E=m
CONFIG_IGB=m
CONFIG_IGBVF=m
CONFIG_IXGB=m
CONFIG_IXGBE=m
CONFIG_IXGBE_DCB=y
CONFIG_IXGBEVF=m
@ -1525,12 +1515,10 @@ CONFIG_TOUCHSCREEN_MSG2638=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_MK712=m
CONFIG_TOUCHSCREEN_PENMOUNT=m
CONFIG_TOUCHSCREEN_EDT_FT5X06=m
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_UCB1400=m
CONFIG_TOUCHSCREEN_PIXCIR=m
CONFIG_TOUCHSCREEN_WDT87XX_I2C=m
CONFIG_TOUCHSCREEN_WM97XX=m
@ -1602,7 +1590,6 @@ CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_TEGRA_TCU=y
CONFIG_SERIAL_JSM=m
@ -1625,7 +1612,6 @@ CONFIG_SERIAL_LITEUART=m
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_MOXA_INTELLIO=m
CONFIG_MOXA_SMARTIO=m
CONFIG_SYNCLINK_GT=m
CONFIG_N_HDLC=m
CONFIG_N_GSM=m
CONFIG_NOZOMI=m
@ -1646,7 +1632,6 @@ CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C=m
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_XILLYUSB=m
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=m
CONFIG_I2C_MUX_GPIO=m
@ -1699,7 +1684,6 @@ CONFIG_SPI_DW_PCI=m
CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_HISI_KUNPENG=m
CONFIG_SPI_HISI_SFC_V3XX=m
CONFIG_SPI_NXP_FLEXSPI=m
CONFIG_SPI_GPIO=m
CONFIG_SPI_LM70_LLP=m
CONFIG_SPI_FSL_SPI=m
@ -1784,7 +1768,6 @@ CONFIG_GPIO_BD9571MWV=m
CONFIG_GPIO_MAX77620=y
CONFIG_GPIO_MAX77650=m
CONFIG_GPIO_TQMX86=m
CONFIG_GPIO_UCB1400=m
CONFIG_GPIO_PCI_IDIO_16=m
CONFIG_GPIO_PCIE_IDIO_24=m
CONFIG_GPIO_RDC321X=m
@ -1799,7 +1782,6 @@ CONFIG_GPIO_VIRTIO=m
CONFIG_W1_MASTER_MATROX=m
CONFIG_W1_MASTER_DS2490=m
CONFIG_W1_MASTER_DS2482=m
CONFIG_W1_MASTER_DS1WM=m
CONFIG_W1_MASTER_GPIO=m
CONFIG_W1_MASTER_SGI=m
CONFIG_W1_SLAVE_THERM=m
@ -2017,7 +1999,6 @@ CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_SCH5627=m
CONFIG_SENSORS_SCH5636=m
CONFIG_SENSORS_STTS751=m
CONFIG_SENSORS_SMM665=m
CONFIG_SENSORS_ADC128D818=m
CONFIG_SENSORS_ADS7828=m
CONFIG_SENSORS_ADS7871=m
@ -2097,13 +2078,12 @@ CONFIG_MFD_MAX77650=m
CONFIG_MFD_MT6370=m
CONFIG_MFD_OCELOT=m
CONFIG_MFD_NTXEC=m
CONFIG_UCB1400_CORE=m
CONFIG_MFD_SY7636A=m
CONFIG_MFD_RT4831=m
CONFIG_MFD_RT5033=m
CONFIG_MFD_RT5120=m
CONFIG_MFD_RC5T583=y
CONFIG_MFD_RK808=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_RN5T618=m
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SM501=m
@ -2284,7 +2264,6 @@ CONFIG_VIDEO_GO7007_USB=m
CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_AU0828_RC=y
CONFIG_VIDEO_CX231XX=m
@ -2408,7 +2387,6 @@ CONFIG_VIDEO_TVP514X=m
CONFIG_VIDEO_TVP7002=m
CONFIG_VIDEO_TW9910=m
CONFIG_VIDEO_VPX3220=m
CONFIG_VIDEO_AD9389B=m
CONFIG_VIDEO_ADV7170=m
CONFIG_VIDEO_ADV7175=m
CONFIG_VIDEO_ADV7343=m
@ -3085,7 +3063,6 @@ CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OXU210HP_HCD=m
CONFIG_USB_ISP116X_HCD=m
CONFIG_USB_FOTG210_HCD=m
CONFIG_USB_MAX3421_HCD=m
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
@ -3196,7 +3173,6 @@ CONFIG_USB_LCD=m
CONFIG_USB_CYPRESS_CY7C63=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
CONFIG_USB_FTDI_ELAN=m
CONFIG_USB_APPLEDISPLAY=m
CONFIG_APPLE_MFI_FASTCHARGE=m
CONFIG_USB_SISUSBVGA=m
@ -3219,10 +3195,8 @@ CONFIG_USB_CXACRU=m
CONFIG_USB_UEAGLEATM=m
CONFIG_USB_XUSBATM=m
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=m
CONFIG_USB_ISP1301=m
CONFIG_U_SERIAL_CONSOLE=y
CONFIG_USB_FOTG210_UDC=m
CONFIG_USB_GR_UDC=m
CONFIG_USB_R8A66597=m
CONFIG_USB_PXA27X=m
@ -3367,7 +3341,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
@ -3453,7 +3426,6 @@ CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_HIDMA=y
CONFIG_DW_DMAC=m
CONFIG_DW_DMAC_PCI=m
CONFIG_DW_EDMA_PCIE=m
CONFIG_SF_PDMA=m
CONFIG_ASYNC_TX_DMA=y
CONFIG_UDMABUF=y
@ -3488,7 +3460,6 @@ CONFIG_RTLLIB=m
CONFIG_RTL8192E=m
CONFIG_RTL8723BS=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_RTS5208=m
CONFIG_VT6655=m
CONFIG_VT6656=m
@ -3838,7 +3809,6 @@ CONFIG_PWM_SUN4I=m
CONFIG_PWM_TEGRA=y
CONFIG_PWM_XILINX=m
CONFIG_RESET_TI_TPS380X=m
CONFIG_PHY_XGENE=y
CONFIG_PHY_CAN_TRANSCEIVER=m
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_SUN9I_USB=m
@ -3894,8 +3864,6 @@ CONFIG_MUX_GPIO=m
CONFIG_MUX_MMIO=m
CONFIG_COUNTER=m
CONFIG_INTERRUPT_CNT=m
CONFIG_FTM_QUADDEC=m
CONFIG_INTEL_QEP=m
CONFIG_MOST=m
CONFIG_MOST_SND=m
CONFIG_VALIDATE_FS_PARSER=y
@ -3938,7 +3906,7 @@ CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V1=m
CONFIG_QFMT_V2=m
CONFIG_AUTOFS4_FS=m
CONFIG_AUTOFS_FS=m
CONFIG_FUSE_FS=y
CONFIG_CUSE=m
CONFIG_VIRTIO_FS=m
@ -3983,7 +3951,7 @@ CONFIG_CRAMFS=m
CONFIG_CRAMFS_MTD=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_DIRECT=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@ -3999,7 +3967,6 @@ CONFIG_QNX4FS_FS=m
CONFIG_QNX6FS_FS=m
CONFIG_ROMFS_FS=m
CONFIG_PSTORE=y
CONFIG_PSTORE_LZ4HC_COMPRESS=m
CONFIG_PSTORE_RAM=m
CONFIG_PSTORE_BLK=m
CONFIG_SYSV_FS=m
@ -4230,7 +4197,6 @@ CONFIG_CRC4=m
CONFIG_XZ_DEC_MICROLZMA=y
CONFIG_XZ_DEC_TEST=m
CONFIG_DMA_RESTRICTED_POOL=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=384
CONFIG_GLOB_SELFTEST=m
CONFIG_FONTS=y

455
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0001-arm64-dts-rockchip-Add-Hardkernel-ODROID-M1-board.patch
View File

@ -1,455 +0,0 @@
From d388735d551e09b00317a509859fca51776b9826 Mon Sep 17 00:00:00 2001
Message-ID: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Dongjin Kim <tobetter@gmail.com>
Date: Fri, 30 Sep 2022 07:12:35 +0200
Subject: [PATCH] arm64: dts: rockchip: Add Hardkernel ODROID-M1 board
This patch is to add a device tree for new board Hardkernel ODROID-M1
based on Rockchip RK3568, includes basic peripherals -
uart/eMMC/uSD/i2c and on-board ethernet.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
[aurelien@aurel32.net: addressed issues from initial review]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-3-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 414 ++++++++++++++++++
2 files changed, 415 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 8c15593c0ca4..5dc1607b3ecf 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -71,4 +71,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
new file mode 100644
index 000000000000..b3016437640b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Hardkernel Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3568.dtsi"
+
+/ {
+ model = "Hardkernel ODROID-M1";
+ compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac0;
+ i2c0 = &i2c3;
+ i2c3 = &i2c0;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc0;
+ serial0 = &uart1;
+ serial1 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: led-0 {
+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ default-state = "keep";
+ linux,default-trigger = "default-on";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_power_pin>;
+ };
+ led_work: led-1 {
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_HEARTBEAT;
+ color = <LED_COLOR_ID_BLUE>;
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_work_pin>;
+ };
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&gmac0 {
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+ assigned-clock-rates = <0>, <125000000>;
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus>;
+ status = "okay";
+
+ tx_delay = <0x4f>;
+ rx_delay = <0x2d>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc3v3_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ leds {
+ led_power_pin: led-power-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ led_work_pin: led-work-pin {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+ sd-uhs-sdr50;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
--
2.41.0

22
buildroot-external/patches/linux/0002-hwrng-add-Rockchip-SoC-hwrng-driver.patch → buildroot-external/board/hardkernel/odroid-m1/patches/linux/0001-hwrng-add-Rockchip-SoC-hwrng-driver.patch
View File

@ -1,7 +1,4 @@
From c23703defb6008dde794e198abeaf2de008fe7ae Mon Sep 17 00:00:00 2001
Message-ID: <c23703defb6008dde794e198abeaf2de008fe7ae.1691152222.git.stefan@agner.ch>
In-Reply-To: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
References: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
From ef365072cb06f537f46a70d9e29dc4503aafb23d Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:17 +0100
Subject: [PATCH] hwrng: add Rockchip SoC hwrng driver
@ -29,12 +26,12 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
create mode 100644 drivers/char/hw_random/rockchip-rng.c
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 3da8e85f8aae..8e5c88504f72 100644
index 8de74dcfa18c..f7036ea8e65f 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -549,6 +549,20 @@ config HW_RANDOM_CN10K
To compile this driver as a module, choose M here.
The module will be called cn10k_rng. If unsure, say Y.
@@ -573,6 +573,20 @@ config HW_RANDOM_JH7110
To compile this driver as a module, choose M here.
The module will be called jh7110-trng.
+config HW_RANDOM_ROCKCHIP
+ tristate "Rockchip True Random Number Generator"
@ -54,13 +51,13 @@ index 3da8e85f8aae..8e5c88504f72 100644
config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 3e948cf04476..b7e989535fd6 100644
index 32549a1186dc..5bf0e4692aca 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -47,3 +47,4 @@ obj-$(CONFIG_HW_RANDOM_XIPHERA) += xiphera-trng.o
obj-$(CONFIG_HW_RANDOM_ARM_SMCCC_TRNG) += arm_smccc_trng.o
@@ -49,3 +49,4 @@ obj-$(CONFIG_HW_RANDOM_ARM_SMCCC_TRNG) += arm_smccc_trng.o
obj-$(CONFIG_HW_RANDOM_CN10K) += cn10k-rng.o
obj-$(CONFIG_HW_RANDOM_POLARFIRE_SOC) += mpfs-rng.o
obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o
+obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o
diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c
new file mode 100644
@ -318,6 +315,3 @@ index 000000000000..9b7b334d6410
+MODULE_DESCRIPTION("Rockchip True Random Number Generator driver");
+MODULE_AUTHOR("Lin Jinhan <troy.lin@rock-chips.com>, Aurelien Jarno <aurelien@aurel32.net>");
+MODULE_LICENSE("GPL v2");
--
2.41.0

12
buildroot-external/patches/linux/0003-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch → buildroot-external/board/hardkernel/odroid-m1/patches/linux/0002-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch
View File

@ -1,7 +1,4 @@
From f53dcb8fc3aeaa2b633d6a37086088add896149a Mon Sep 17 00:00:00 2001
Message-ID: <f53dcb8fc3aeaa2b633d6a37086088add896149a.1691152222.git.stefan@agner.ch>
In-Reply-To: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
References: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
From 37125610d7b79d2618671611641be7078653d24f Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:18 +0100
Subject: [PATCH] arm64: dts: rockchip: add DT entry for RNG to RK356x
@ -14,10 +11,10 @@ Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 1d423daae971..2b26031de7f5 100644
index abee88911982..70f92adf86ac 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1771,6 +1771,15 @@ usb2phy1_otg: otg-port {
@@ -1806,6 +1806,15 @@ usb2phy1_otg: otg-port {
};
};
@ -33,6 +30,3 @@ index 1d423daae971..2b26031de7f5 100644
pinctrl: pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <&grf>;
--
2.41.0

38
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0002-arm64-dts-rockchip-add-thermal-support-to-ODROID-M1.patch
View File

@ -1,38 +0,0 @@
From 24048c1753916bd983746542b16d19d2b399eeb7 Mon Sep 17 00:00:00 2001
Message-ID: <24048c1753916bd983746542b16d19d2b399eeb7.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:36 +0200
Subject: [PATCH] arm64: dts: rockchip: add thermal support to ODROID-M1
Add the thermal nodes for the ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-4-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index b3016437640b..112c65af3f55 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -409,6 +409,12 @@ &sdmmc0 {
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
&uart2 {
status = "okay";
};
--
2.41.0

103
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0003-arm64-dts-rockchip-Add-NOR-flash-to-ODROID-M1.patch
View File

@ -1,103 +0,0 @@
From 982bb2beab8e38a7c0a365770be2ad9c5221a650 Mon Sep 17 00:00:00 2001
Message-ID: <982bb2beab8e38a7c0a365770be2ad9c5221a650.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:37 +0200
Subject: [PATCH] arm64: dts: rockchip: Add NOR flash to ODROID-M1
Enable the Rockchip Serial Flash Controller for the ODROID-M1 and add
the corresponding SPI NOR flash entry. The SFC is used in dual I/O mode
and not quad I/O mode, as the FSPI_D2 pin is shared with the EMMC_RSTn
pin.
The partitions addresses and sizes are taken from the ODROID-M1
Partition Table page on the ODROID wiki.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-5-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 112c65af3f55..94e839c9afab 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -351,6 +351,20 @@ rgmii_phy0: ethernet-phy@0 {
};
&pinctrl {
+ fspi {
+ fspi_dual_io_pins: fspi-dual-io-pins {
+ rockchip,pins =
+ /* fspi_clk */
+ <1 RK_PD0 1 &pcfg_pull_none>,
+ /* fspi_cs0n */
+ <1 RK_PD3 1 &pcfg_pull_none>,
+ /* fspi_d0 */
+ <1 RK_PD1 1 &pcfg_pull_none>,
+ /* fspi_d1 */
+ <1 RK_PD2 1 &pcfg_pull_none>;
+ };
+ };
+
leds {
led_power_pin: led-power-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -409,6 +423,50 @@ &sdmmc0 {
status = "okay";
};
+&sfc {
+ /* Dual I/O mode as the D2 pin conflicts with the eMMC */
+ pinctrl-0 = <&fspi_dual_io_pins>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SPL";
+ reg = <0x0 0xe0000>;
+ };
+ partition@e0000 {
+ label = "U-Boot Env";
+ reg = <0xe0000 0x20000>;
+ };
+ partition@100000 {
+ label = "U-Boot";
+ reg = <0x100000 0x200000>;
+ };
+ partition@300000 {
+ label = "splash";
+ reg = <0x300000 0x100000>;
+ };
+ partition@400000 {
+ label = "Filesystem";
+ reg = <0x400000 0xc00000>;
+ };
+ };
+ };
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
--
2.41.0

8
buildroot-external/patches/linux/0004-dt-bindings-RNG-Add-Rockchip-RNG-bindings.patch → buildroot-external/board/hardkernel/odroid-m1/patches/linux/0003-dt-bindings-RNG-Add-Rockchip-RNG-bindings.patch
View File

@ -1,7 +1,4 @@
From 9a6bfcbf61975293991f44b1b319eb9731b85768 Mon Sep 17 00:00:00 2001
Message-ID: <9a6bfcbf61975293991f44b1b319eb9731b85768.1691152222.git.stefan@agner.ch>
In-Reply-To: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
References: <ea06f0028a835c4cafda535f6a36b0d63035fd4c.1691152222.git.stefan@agner.ch>
From 544232e6ab8a71abdd770fe18d6280de7cd74281 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:16 +0100
Subject: [PATCH] dt-bindings: RNG: Add Rockchip RNG bindings
@ -80,6 +77,3 @@ index 000000000000..c2f5ef69cf07
+ };
+
+...
--
2.41.0

102
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0004-arm64-dts-rockchip-Add-analog-audio-on-ODROID-M1.patch
View File

@ -1,102 +0,0 @@
From ae25f92a09abb7dd16a9ad3b74e0c105b385f214 Mon Sep 17 00:00:00 2001
Message-ID: <ae25f92a09abb7dd16a9ad3b74e0c105b385f214.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:38 +0200
Subject: [PATCH] arm64: dts: rockchip: Add analog audio on ODROID-M1
On the ODROID-M1, the I2S1 TDM controller is connected to the rk809
codec in I2S mode. It is used to provide a stereo headphones output and
a mono speaker output. A GPIO with an external pullup is used as an
headphone detection input.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-6-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 43 ++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 94e839c9afab..634c1bd80b4e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -59,6 +59,31 @@ led_work: led-1 {
};
};
+ rk809-sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det_pin>;
+ simple-audio-card,name = "Analog RK817";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -131,10 +156,15 @@ rk809: pmic@20 {
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
#clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
+ pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
@@ -340,6 +370,11 @@ regulator-state-mem {
};
};
+&i2s1_8ch {
+ rockchip,trcm-sync-tx-only;
+ status = "okay";
+};
+
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -379,6 +414,12 @@ pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ rk809 {
+ hp_det_pin: hp-det-pin {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
--
2.41.0

97
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0005-arm64-dts-rockchip-Enable-vop2-and-hdmi-tx-on-ODROID.patch
View File

@ -1,97 +0,0 @@
From 3a1be3d8719ef6335385d4e5e456371e7bf7383f Mon Sep 17 00:00:00 2001
Message-ID: <3a1be3d8719ef6335385d4e5e456371e7bf7383f.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:39 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable vop2 and hdmi tx on ODROID-M1
Enable the RK356x Video Output Processor (VOP) 2 on ODROID M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-7-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 634c1bd80b4e..126b893048fe 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
@@ -37,6 +38,17 @@ dc_12v: dc-12v-regulator {
regulator-max-microvolt = <12000000>;
};
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -131,6 +143,24 @@ &gmac0_rgmii_clk
rx_delay = <0x2d>;
};
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -517,3 +547,20 @@ &tsadc {
&uart2 {
status = "okay";
};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.41.0

48
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0006-arm64-dts-rockchip-Enable-HDMI-audio-on-ODROID-M1.patch
View File

@ -1,48 +0,0 @@
From ded87dc761951205b8b9ba8ee4081e28a850a3db Mon Sep 17 00:00:00 2001
Message-ID: <ded87dc761951205b8b9ba8ee4081e28a850a3db.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:40 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable HDMI audio on ODROID-M1.
This enables the i2s0 controller and the hdmi-sound node on the
ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-8-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 126b893048fe..ac4e94d18feb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -161,6 +161,10 @@ hdmi_out_con: endpoint {
};
};
+&hdmi_sound {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -400,6 +404,10 @@ regulator-state-mem {
};
};
+&i2s0_8ch {
+ status = "okay";
+};
+
&i2s1_8ch {
rockchip,trcm-sync-tx-only;
status = "okay";
--
2.41.0

37
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0007-arm64-dts-rockchip-Enable-the-GPU-on-ODROID-M1.patch
View File

@ -1,37 +0,0 @@
From 13438a717627cae086cc3a1126552cffa2f4bd16 Mon Sep 17 00:00:00 2001
Message-ID: <13438a717627cae086cc3a1126552cffa2f4bd16.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:41 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the GPU on ODROID-M1
Enable the GPU core on the Rockchip RK3568 ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-9-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index ac4e94d18feb..e4b7699d3eea 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -143,6 +143,11 @@ &gmac0_rgmii_clk
rx_delay = <0x2d>;
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;
--
2.41.0

111
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0008-arm64-dts-rockchip-Enable-the-USB-2.0-ports-on-ODROI.patch
View File

@ -1,111 +0,0 @@
From 0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c Mon Sep 17 00:00:00 2001
Message-ID: <0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:42 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 2.0 ports on ODROID-M1
The Rockchip RK3568 has two USB OHCI/EHCI controllers connected to a PHY
providing one host-only port and one OTG port. On the ODROID-M1, they
are both used in host mode. The USB ports are powered by a DC/DC
converter providing 5V and named VCC5V0_SYS on the schematics, followed
by a power switch.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-10-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index e4b7699d3eea..2e4cc20bd676 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -105,6 +105,28 @@ vcc3v3_sys: vcc3v3-sys-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&cpu0 {
@@ -463,6 +485,15 @@ hp_det_pin: hp-det-pin {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
@@ -561,6 +592,36 @@ &uart2 {
status = "okay";
};
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
--
2.41.0

114
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0009-arm64-dts-rockchip-Enable-the-USB-3.0-ports-on-ODROI.patch
View File

@ -1,114 +0,0 @@
From d8abc451c669a8fd36b31db5cb96ec49da819124 Mon Sep 17 00:00:00 2001
Message-ID: <d8abc451c669a8fd36b31db5cb96ec49da819124.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:43 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 3.0 ports on ODROID-M1
The Rockchip RK3568 has two USB XHCI controllers. The USB 2.0 signals
are connected to a PHY providing one host-only port and one OTG port.
The USB 3.0 signals are connected to two USB3.0/PCIE/SATA combo PHY.
The ODROID M1 has 2 type A USB 3.0 connectors, with the USB 3.0 signals
connected to the two combo PHYs. For the USB 2.0 signals, one connector
is connected to the host-only PHY and uses the same power switch as the
USB 2.0 ports. The other connector has its own power switch and is
connected to the OTG PHY, which is also connected to a device only
micro-USB connector. The purpose of this micro-USB connector is for
firmware update using the Rockusb vendor specific USB class. Therefore
it does not make sense to enable this port on Linux, and the PHY is
forced to host mode.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-11-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 49 ++++++++++++++++++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 2e4cc20bd676..9a84a7e76d7a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -127,6 +127,30 @@ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_otg";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&combphy1 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
};
&cpu0 {
@@ -490,7 +514,7 @@ usb {
vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
- vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -600,6 +624,11 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
@@ -608,6 +637,24 @@ &usb_host1_ohci {
status = "okay";
};
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
&usb2phy1 {
status = "okay";
};
--
2.41.0

48
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0010-arm64-dts-rockchip-Add-SATA-support-to-ODROID-M1.patch
View File

@ -1,48 +0,0 @@
From 2f6d4521403932ca22cb4dabef9033f1d52232ba Mon Sep 17 00:00:00 2001
Message-ID: <2f6d4521403932ca22cb4dabef9033f1d52232ba.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:44 +0200
Subject: [PATCH] arm64: dts: rockchip: Add SATA support to ODROID-M1
Enable the Combo PHY and SATA nodes in ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-12-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 9a84a7e76d7a..bd24ccf94e76 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -153,6 +153,11 @@ &combphy1 {
status = "okay";
};
+&combphy2 {
+ /* used for SATA */
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
@@ -538,6 +543,10 @@ &saradc {
status = "okay";
};
+&sata2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
--
2.41.0

80
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0011-arm64-dts-rockchip-Add-PCIEe-v3-nodes-to-ODROID-M1.patch
View File

@ -1,80 +0,0 @@
From 1572a9c5d9fa9f654fbc1909528ae5940ad34aa3 Mon Sep 17 00:00:00 2001
Message-ID: <1572a9c5d9fa9f654fbc1909528ae5940ad34aa3.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:45 +0200
Subject: [PATCH] arm64: dts: rockchip: Add PCIEe v3 nodes to ODROID-M1
Add nodes to ODROID-M1 to support PCIe v3 on the M2 slot.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-13-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index bd24ccf94e76..2f685c606bb9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -96,6 +96,19 @@ simple-audio-card,codec {
};
};
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ enable-active-high;
+ gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie_en_pin>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -479,6 +492,18 @@ rgmii_phy0: ethernet-phy@0 {
};
};
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_pin>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
&pinctrl {
fspi {
fspi_dual_io_pins: fspi-dual-io-pins {
@@ -503,6 +528,15 @@ led_work_pin: led-work-pin {
};
};
+ pcie {
+ pcie_reset_pin: pcie-reset-pin {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
+ rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
--
2.41.0

54
buildroot-external/board/hardkernel/odroid-m1/patches/linux/0012-arm64-dts-rockchip-Add-IR-receiver-node-to-ODROID-M1.patch
View File

@ -1,54 +0,0 @@
From b2eae73eeb32dd9383571de6af18fc8bd39aac3a Mon Sep 17 00:00:00 2001
Message-ID: <b2eae73eeb32dd9383571de6af18fc8bd39aac3a.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:46 +0200
Subject: [PATCH] arm64: dts: rockchip: Add IR receiver node to ODROID-M1
Add the infrared receiver and its associated pinctrl entry. Note that
there is an external pullup to VCC3V3_SYS.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-14-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 2f685c606bb9..59ecf868dbd0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -49,6 +49,13 @@ hdmi_con_in: endpoint {
};
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
leds {
compatible = "gpio-leds";
@@ -519,6 +526,13 @@ fspi_dual_io_pins: fspi-dual-io-pins {
};
};
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ /* external pullup to VCC3V3_SYS */
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
led_power_pin: led-power-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
--
2.41.0

61
buildroot-external/board/hardkernel/odroid-xu4/patches/linux/0001-ODROID-XU4-Update-hack-avoiding-the-invalid-temperat.patch
View File

@ -1,61 +0,0 @@
From d6b82edb420c7df4fa8bb0924dae2476beb649a2 Mon Sep 17 00:00:00 2001
Message-Id: <d6b82edb420c7df4fa8bb0924dae2476beb649a2.1622398359.git.stefan@agner.ch>
From: "charles.park" <charles.park@hardkernel.com>
Date: Fri, 1 Jun 2018 18:12:01 +0900
Subject: [PATCH] ODROID-XU4: Update hack avoiding the invalid temperature by
TMU broken
Change-Id: I6092834427950a50746535458e99bf7089212044
---
drivers/thermal/thermal_helpers.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/thermal/thermal_helpers.c b/drivers/thermal/thermal_helpers.c
index c94bc824e5d3..2880126c5861 100644
--- a/drivers/thermal/thermal_helpers.c
+++ b/drivers/thermal/thermal_helpers.c
@@ -75,6 +75,10 @@ EXPORT_SYMBOL(get_thermal_instance);
*
* Return: On success returns 0, an error code otherwise
*/
+
+#define CRITICAL_TEMP 120000
+int thermal_zone_data[4] = { 0, };
+
int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
{
int ret = -EINVAL;
@@ -108,6 +112,30 @@ int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
*temp = tz->emul_temperature;
}
+ /* save thermal_zone data */
+ if (!ret)
+ thermal_zone_data[tz->id] = *temp;
+ /*
+ * This case is that the thermal sensor is broken.
+ * That's not real temperature. Set the fake temperature value in order to
+ * avoid reaching the ciritical temperature.
+ */
+ if ((thermal_zone_data[tz->id] > CRITICAL_TEMP) && (tz->id != 4)) {
+ int i, broken_sensor = 0, correct_temp = 0;
+ for (i = 0; i < 4; i++) {
+ if ((thermal_zone_data[i] <= CRITICAL_TEMP) &&
+ (correct_temp <= thermal_zone_data[i]))
+ correct_temp = thermal_zone_data[i];
+ if (thermal_zone_data[i] > CRITICAL_TEMP)
+ broken_sensor++;
+ }
+ /*
+ * if all thermal sensor broken then critical temperature data send
+ * for system poweroff.
+ */
+ *temp = (broken_sensor == 4) ? CRITICAL_TEMP : correct_temp;
+ }
+
mutex_unlock(&tz->lock);
exit:
return ret;
--
2.31.1

8
buildroot-external/board/hardkernel/odroid-xu4/patches/linux/0001-ODROID-XU4-regulator-s2mps11-add-ethernet-power-rese.patch
View File

@ -1,5 +1,4 @@
From e7d59e0444170873e945a0675ed1565a65c99e17 Mon Sep 17 00:00:00 2001
Message-Id: <e7d59e0444170873e945a0675ed1565a65c99e17.1676489173.git.stefan@agner.ch>
From c51639443d3c90127a77f1534e39dd01fac1577f Mon Sep 17 00:00:00 2001
From: memeka <mihailescu2m@gmail.com>
Date: Fri, 18 Jan 2019 14:36:21 +1030
Subject: [PATCH] ODROID-XU4: regulator: s2mps11: add ethernet power reset in
@ -17,7 +16,7 @@ Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
1 file changed, 55 insertions(+)
diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index ebc67e3ddd4f..51f128076db9 100644
index 570b61420f3a..286b606660a4 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -1117,6 +1117,57 @@ static const struct regulator_desc s2mpu02_regulators[] = {
@ -89,6 +88,3 @@ index ebc67e3ddd4f..51f128076db9 100644
out:
kfree(rdata);
--
2.39.1

20
buildroot-external/board/hardkernel/patches/linux/0001-arm64-dts-meson-g12b-add-power-button-support.patch
View File

@ -1,5 +1,4 @@
From 86f6a398d2c080f92d51048ededf45efbe3a96d4 Mon Sep 17 00:00:00 2001
Message-Id: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From e780a5f405a02e3102c471415f7b0ad73a5cc036 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 11:20:48 +0100
Subject: [PATCH] arm64: dts: meson: g12b: add power button support
@ -10,15 +9,15 @@ button press is triggered.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 11 +++++++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index fd3fa82e4c33..06bdba57b04c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -39,6 +39,17 @@ emmc_pwrseq: emmc-pwrseq {
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index 9e12a34b2840..c27eae6488ce 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -38,6 +38,17 @@ fan: gpio-fan {
#cooling-cells = <2>;
};
+ gpio-keys-polled {
@ -35,6 +34,3 @@ index fd3fa82e4c33..06bdba57b04c 100644
leds {
compatible = "gpio-leds";
--
2.39.1

28
buildroot-external/board/hardkernel/patches/linux/0002-arm64-dts-meson-g12b-add-GPIO-fan-support.patch
View File

@ -1,7 +1,4 @@
From e269c47ef68371dbed1ff5919a67fcc385d8c6da Mon Sep 17 00:00:00 2001
Message-Id: <e269c47ef68371dbed1ff5919a67fcc385d8c6da.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From cff7ba94733d9103487d87a6474e2ab026bd718c Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 11:38:54 +0100
Subject: [PATCH] arm64: dts: meson: g12b: add GPIO fan support
@ -12,15 +9,15 @@ cannot be modulated.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 11 +++++++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 06bdba57b04c..bcf6d8eacd6e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -39,6 +39,17 @@ emmc_pwrseq: emmc-pwrseq {
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index c27eae6488ce..db8a2dfaf0b3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -49,6 +49,17 @@ power-button {
};
};
+ /*
@ -34,9 +31,6 @@ index 06bdba57b04c..bcf6d8eacd6e 100644
+ status = "okay";
+ };
+
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
--
2.39.1
leds {
compatible = "gpio-leds";

20
buildroot-external/board/hardkernel/patches/linux/0003-arm64-dts-meson-g12b-odroid-n2-add-fan-as-cooling-de.patch
View File

@ -1,7 +1,4 @@
From 8c3e65cf09d62797a2fe50234f30f33f6e4eda44 Mon Sep 17 00:00:00 2001
Message-Id: <8c3e65cf09d62797a2fe50234f30f33f6e4eda44.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 8d781fc504780a3aa8ef751724e3749c2bfda7a9 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 15:53:55 +0100
Subject: [PATCH] arm64: dts: meson: g12b: odroid-n2: add fan as cooling device
@ -16,14 +13,14 @@ downstream kernel.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
.../dts/amlogic/meson-g12b-odroid-n2.dtsi | 38 +++++++++++++++++++
.../boot/dts/amlogic/meson-g12b-odroid.dtsi | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index bcf6d8eacd6e..6dcf990e0efc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -390,6 +390,44 @@ &clkc_audio {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index db8a2dfaf0b3..843e66332369 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -245,6 +245,44 @@ &clkc_audio {
status = "okay";
};
@ -68,6 +65,3 @@ index bcf6d8eacd6e..6dcf990e0efc 100644
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
--
2.39.1

28
buildroot-external/board/hardkernel/patches/linux/0004-arm64-dts-meson-add-uart_A-node.patch
View File

@ -1,7 +1,4 @@
From 433c5a06b1195e2e689f8d260ec471caca2fa1b6 Mon Sep 17 00:00:00 2001
Message-Id: <433c5a06b1195e2e689f8d260ec471caca2fa1b6.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 01ac730fa92a030690a7701c9b8781bc4ef7bcae Mon Sep 17 00:00:00 2001
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Fri, 27 Mar 2020 17:05:22 +0900
Subject: [PATCH] arm64: dts: meson: add uart_A node
@ -11,23 +8,23 @@ available as UART by default.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 7 +++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 6dcf990e0efc..7eaaced7893b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index 843e66332369..61caadd679e2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -12,6 +12,7 @@
/ {
aliases {
serial0 = &uart_AO;
+ serial1 = &uart_A;
ethernet0 = &ethmac;
rtc0 = &rtc;
rtc1 = &vrtc;
@@ -730,6 +731,12 @@ &toddr_c {
status = "okay";
};
@@ -496,6 +497,12 @@ &uart_AO {
pinctrl-names = "default";
};
+&uart_A {
@ -36,9 +33,6 @@ index 6dcf990e0efc..7eaaced7893b 100644
+ pinctrl-names = "default";
+};
+
&uart_AO {
&usb {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
--
2.39.1
};

14
buildroot-external/board/hardkernel/patches/linux/0005-arm64-dts-meson-add-i2c2-node-to-ODROID-N2-N2.patch
View File

@ -1,7 +1,4 @@
From 00129576fb656015b66958f4d7370ee7e2d990e2 Mon Sep 17 00:00:00 2001
Message-Id: <00129576fb656015b66958f4d7370ee7e2d990e2.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From f5676219e12b48a0f591e911797304fae05ca78c Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Thu, 29 Apr 2021 21:32:43 +0200
Subject: [PATCH] arm64: dts: meson: add i2c2 node to ODROID N2/N2+
@ -16,11 +13,11 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 7eaaced7893b..8d183253389c 100644
index 91c9769fda20..ececc6b17639 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -588,6 +588,12 @@ &ir {
linux,rc-map-name = "rc-odroid";
@@ -248,6 +248,12 @@ usb-hub-hog {
};
};
+&i2c2 {
@ -32,6 +29,3 @@ index 7eaaced7893b..8d183253389c 100644
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
--
2.39.1

12
buildroot-external/board/hardkernel/patches/linux/0006-ODROID-C4-arm64-dts-add-uart_A-node.patch
View File

@ -1,7 +1,4 @@
From d6b1ddfb5816b887470452920d273661e361632d Mon Sep 17 00:00:00 2001
Message-Id: <d6b1ddfb5816b887470452920d273661e361632d.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 1c9c3ca476adf09884295e9f8298288ea497e5ac Mon Sep 17 00:00:00 2001
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Tue, 1 Mar 2022 21:51:50 +0100
Subject: [PATCH] ODROID-C4: arm64/dts: add uart_A node
@ -11,7 +8,7 @@ Subject: [PATCH] ODROID-C4: arm64/dts: add uart_A node
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index ddb1b345397f..49b88c1e11cd 100644
index 1db2327bbd13..e67869fbb460 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -10,8 +10,9 @@
@ -25,7 +22,7 @@ index ddb1b345397f..49b88c1e11cd 100644
};
chosen {
@@ -450,6 +451,12 @@ &tohdmitx {
@@ -449,6 +450,12 @@ &tohdmitx {
status = "okay";
};
@ -38,6 +35,3 @@ index ddb1b345397f..49b88c1e11cd 100644
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
--
2.39.1

12
buildroot-external/board/hardkernel/patches/linux/0007-ODROID-C4-arm64-dts-add-i2c2-i2c3-node.patch
View File

@ -1,7 +1,4 @@
From a78a968b4a51a32f44c170c591a46b27326b97f2 Mon Sep 17 00:00:00 2001
Message-Id: <a78a968b4a51a32f44c170c591a46b27326b97f2.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 9cd343da01d9b69ad33444105208949775c909b4 Mon Sep 17 00:00:00 2001
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Tue, 1 Mar 2022 21:53:32 +0100
Subject: [PATCH] ODROID-C4: arm64/dts: add i2c2, i2c3 node
@ -11,7 +8,7 @@ Subject: [PATCH] ODROID-C4: arm64/dts: add i2c2, i2c3 node
1 file changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index 49b88c1e11cd..b8d88310ae3a 100644
index e67869fbb460..90d2eea7fe24 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -11,6 +11,8 @@
@ -23,7 +20,7 @@ index 49b88c1e11cd..b8d88310ae3a 100644
serial0 = &uart_AO;
serial1 = &uart_A;
};
@@ -387,6 +389,57 @@ &ir {
@@ -386,6 +388,57 @@ &ir {
pinctrl-names = "default";
};
@ -81,6 +78,3 @@ index 49b88c1e11cd..b8d88310ae3a 100644
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
--
2.39.1

12
buildroot-external/board/hardkernel/patches/linux/0008-arm64-dts-amlogic-add-uartA-uartC-to-ODROID-C2.patch
View File

@ -1,7 +1,4 @@
From 8263e17f170296c28d3a781d5b05e59778fe4a27 Mon Sep 17 00:00:00 2001
Message-Id: <8263e17f170296c28d3a781d5b05e59778fe4a27.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 299d45dd82df026c0164e170d476b56eada4aa77 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 15 Feb 2023 20:15:07 +0100
Subject: [PATCH] arm64: dts: amlogic: add uartA/uartC to ODROID-C2
@ -12,7 +9,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index 201596247fd9..b2cb12fb46fd 100644
index e6d2de7c45a9..c6a38d890db5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -17,6 +17,8 @@ / {
@ -24,7 +21,7 @@ index 201596247fd9..b2cb12fb46fd 100644
ethernet0 = &ethmac;
};
@@ -399,6 +401,18 @@ &uart_AO {
@@ -383,6 +385,18 @@ &uart_AO {
pinctrl-names = "default";
};
@ -43,6 +40,3 @@ index 201596247fd9..b2cb12fb46fd 100644
&usb0_phy {
status = "disabled";
phy-supply = <&usb_otg_pwr>;
--
2.39.1

10
buildroot-external/board/hardkernel/patches/linux/0009-arm64-dts-amlogic-meson-gx-add-missing-pins-for-I2C-.patch
View File

@ -1,7 +1,4 @@
From ceef8d62bcf0c2c7b3e96831e85a872009657cf0 Mon Sep 17 00:00:00 2001
Message-Id: <ceef8d62bcf0c2c7b3e96831e85a872009657cf0.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From 61a378b42a2f61589cc62ff85334dd607014cb6d Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 15 Feb 2023 20:16:29 +0100
Subject: [PATCH] arm64: dts: amlogic: meson-gx: add missing pins for I2C A/B
@ -12,7 +9,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 7c029f552a23..b3c22861b022 100644
index 12ef6e81c8bd..90ae81493de2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -333,6 +333,8 @@ &hwrng {
@ -33,6 +30,3 @@ index 7c029f552a23..b3c22861b022 100644
};
&i2c_C {
--
2.39.1

8
buildroot-external/board/khadas/kernel-vim.config
View File

@ -302,11 +302,9 @@ CONFIG_I2C_MESON=y
CONFIG_I2C_RK3X=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=m
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_MESON_SPICC=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=m
CONFIG_PINCTRL=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
@ -359,7 +357,7 @@ CONFIG_MFD_BD9571MWV=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_HI6421_PMIC=y
CONFIG_MFD_MAX77620=y
CONFIG_MFD_RK808=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_ROHM_BD718XX=y
CONFIG_MFD_KHADAS_MCU=y
@ -449,7 +447,6 @@ CONFIG_USB_S2255=m
CONFIG_VIDEO_USBTV=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_CX231XX=m
CONFIG_VIDEO_CX231XX_ALSA=m
@ -600,7 +597,6 @@ CONFIG_SENSORS_ISL29018=m
CONFIG_MPL3115=m
CONFIG_PWM=y
CONFIG_PWM_MESON=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_PHY_SAMSUNG_USB2=y
CONFIG_TEE=y
@ -615,7 +611,7 @@ CONFIG_F2FS_FS=m
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS4_FS=y
CONFIG_AUTOFS_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=y

1
buildroot-external/board/nabucasa/green/kernel.config
View File

@ -10,6 +10,5 @@ CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_RK860X=y
# CONFIG_DW_WATCHDOG is not set

40
buildroot-external/board/nabucasa/green/patches/linux/0002-arm64-dts-rockchip-Add-NabuCasa-Green-board.patch → buildroot-external/board/nabucasa/green/patches/linux/0001-arm64-dts-rockchip-Add-NabuCasa-Green-board.patch
View File

@ -1,29 +1,37 @@
From 2a76efca88402072b61e4cb83d6707400da8dfae Mon Sep 17 00:00:00 2001
From 9b1367f47f2e790f155d4aab39878233eedf7b22 Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Thu, 6 Jul 2023 10:05:04 +0000
Subject: [PATCH 2/2] arm64: dts: rockchip: Add NabuCasa Green board
Subject: [PATCH] arm64: dts: rockchip: Add NabuCasa Green board
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
[Replaced custom rk860x driver with upstream fan53555]
Signed-off-by: Jan Čermák <sairon@sairon.cz>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3566-ha-green.dts | 685 ++++++++++++++++++
2 files changed, 686 insertions(+)
.../boot/dts/rockchip/rk3566-ha-green.dts | 684 ++++++++++++++++++
2 files changed, 685 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 8c15593c0..997051975 100644
index e7728007fd1b..475becd793ac 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -72,3 +72,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353ps.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ha-green.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
new file mode 100644
index 000000000..d0830df48
index 000000000000..b5e4a67b3fc7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -0,0 +1,685 @@
@@ -0,0 +1,684 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Seeed Co., Ltd.
@ -228,16 +236,15 @@ index 000000000..d0830df48
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: rk8601@41 {
+ compatible = "rockchip,rk8601";
+ vdd_cpu: regulator@41 {
+ compatible = "rockchip,rk8600";
+ reg = <0x41>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "rk860x-reg";
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <2300>;
+ rockchip,suspend-voltage-selector = <1>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
@ -709,6 +716,3 @@ index 000000000..d0830df48
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.25.1

662
buildroot-external/board/nabucasa/green/patches/linux/0001-drivers-regulator-Supports-rk860x.patch
View File

@ -1,662 +0,0 @@
From b7957b94fe2649a1e8032b10ea293b106cda4532 Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Thu, 6 Jul 2023 10:04:39 +0000
Subject: [PATCH 1/2] drivers: regulator: Supports rk860x
---
drivers/regulator/Kconfig | 11 +
drivers/regulator/Makefile | 1 +
drivers/regulator/rk860x-regulator.c | 607 +++++++++++++++++++++++++++
3 files changed, 619 insertions(+)
create mode 100644 drivers/regulator/rk860x-regulator.c
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 070e4403c..6a3c00c24 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -1047,6 +1047,17 @@ config REGULATOR_RK808
through regulator interface. The device supports multiple DCDC/LDO
outputs which can be controlled by i2c communication.
+config REGULATOR_RK860X
+ tristate "Rockchip RK860X Regulator"
+ depends on I2C
+ select REGMAP_I2C
+ help
+ This driver supports Rockchip RK860X Digitally Programmable
+ Buck Regulator. The RK860X is a step-down switching voltage
+ regulator that delivers a digitally programmable output from an
+ input voltage supply of 2.5V to 5.5V. The output voltage is
+ programmed through an I2C interface.
+
config REGULATOR_RN5T618
tristate "Ricoh RN5T567/618 voltage regulators"
depends on MFD_RN5T618
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 5962307e1..76a156e98 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -125,6 +125,7 @@ obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
obj-$(CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY) += rpi-panel-attiny-regulator.o
obj-$(CONFIG_REGULATOR_RC5T583) += rc5t583-regulator.o
obj-$(CONFIG_REGULATOR_RK808) += rk808-regulator.o
+obj-$(CONFIG_REGULATOR_RK860X) += rk860x-regulator.o
obj-$(CONFIG_REGULATOR_RN5T618) += rn5t618-regulator.o
obj-$(CONFIG_REGULATOR_ROHM) += rohm-regulator.o
obj-$(CONFIG_REGULATOR_RT4801) += rt4801-regulator.o
diff --git a/drivers/regulator/rk860x-regulator.c b/drivers/regulator/rk860x-regulator.c
new file mode 100644
index 000000000..4596761bd
--- /dev/null
+++ b/drivers/regulator/rk860x-regulator.c
@@ -0,0 +1,607 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/param.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/slab.h>
+
+/* Voltage setting */
+
+#define RK860X_VSEL0_A 0x00
+#define RK860X_VSEL1_A 0x01
+#define RK860X_VSEL0_B 0x06
+#define RK860X_VSEL1_B 0x07
+#define RK860X_MAX_SET 0x08
+
+/* Control register */
+#define RK860X_CONTROL 0x02
+/* IC Type */
+#define RK860X_ID1 0x03
+/* IC mask version */
+#define RK860X_ID2 0x04
+/* Monitor register */
+#define RK860X_MONITOR 0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN BIT(7)
+#define VSEL_MODE BIT(6)
+#define VSEL_A_NSEL_MASK 0x3F
+#define VSEL_B_NSEL_MASK 0xff
+
+/* Chip ID */
+#define DIE_ID 0x0f
+#define DIE_REV 0x0f
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG BIT(7)
+#define CTL_SLEW_MASK (0x7 << 4)
+#define CTL_SLEW_SHIFT 4
+#define CTL_RESET BIT(2)
+
+#define RK860X_NVOLTAGES_64 64
+#define RK860X_NVOLTAGES_160 160
+
+/* IC Type */
+enum {
+ RK860X_CHIP_ID_00 = 0,
+ RK860X_CHIP_ID_01,
+ RK860X_CHIP_ID_02,
+ RK860X_CHIP_ID_03,
+};
+
+struct rk860x_platform_data {
+ struct regulator_init_data *regulator;
+ unsigned int slew_rate;
+ /* Sleep VSEL ID */
+ unsigned int sleep_vsel_id;
+ int limit_volt;
+ struct gpio_desc *vsel_gpio;
+};
+
+struct rk860x_device_info {
+ struct regmap *regmap;
+ struct device *dev;
+ struct regulator_desc desc;
+ struct regulator_dev *rdev;
+ struct regulator_init_data *regulator;
+ /* IC Type and Rev */
+ int chip_id;
+ /* Voltage setting register */
+ unsigned int vol_reg;
+ unsigned int sleep_reg;
+ unsigned int en_reg;
+ unsigned int sleep_en_reg;
+ unsigned int mode_reg;
+ unsigned int vol_mask;
+ unsigned int mode_mask;
+ unsigned int slew_reg;
+ unsigned int slew_mask;
+ unsigned int slew_shift;
+ /* Voltage range and step(linear) */
+ unsigned int vsel_min;
+ unsigned int vsel_step;
+ unsigned int n_voltages;
+ /* Voltage slew rate limiting */
+ unsigned int slew_rate;
+ struct gpio_desc *vsel_gpio;
+ unsigned int sleep_vsel_id;
+};
+
+static unsigned int rk860x_map_mode(unsigned int mode)
+{
+ return mode == REGULATOR_MODE_FAST ?
+ REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
+}
+
+static int rk860x_get_voltage(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret;
+
+ ret = regmap_read(di->regmap, RK860X_MAX_SET, &val);
+ if (ret < 0)
+ return ret;
+ ret = regulator_get_voltage_sel_regmap(rdev);
+ if (ret > val)
+ return val;
+
+ return ret;
+}
+
+static int rk860x_set_suspend_voltage(struct regulator_dev *rdev, int uV)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = regulator_map_voltage_linear(rdev, uV, uV);
+ if (ret < 0)
+ return ret;
+ ret = regmap_update_bits(di->regmap, di->sleep_reg,
+ di->vol_mask, ret);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static int rk860x_set_suspend_enable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ return regmap_update_bits(di->regmap, di->sleep_en_reg,
+ VSEL_BUCK_EN, VSEL_BUCK_EN);
+}
+
+static int rk860x_set_suspend_disable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ return regmap_update_bits(di->regmap, di->sleep_en_reg,
+ VSEL_BUCK_EN, 0);
+}
+
+static int rk860x_resume(struct regulator_dev *rdev)
+{
+ int ret;
+
+ if (!rdev->constraints->state_mem.changeable)
+ return 0;
+
+ ret = rk860x_set_suspend_enable(rdev);
+ if (ret)
+ return ret;
+
+ return regulator_suspend_enable(rdev, PM_SUSPEND_MEM);
+}
+
+static int rk860x_set_enable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ if (di->vsel_gpio) {
+ gpiod_set_raw_value(di->vsel_gpio, !di->sleep_vsel_id);
+ return 0;
+ }
+
+ return regmap_update_bits(di->regmap, di->en_reg,
+ VSEL_BUCK_EN, VSEL_BUCK_EN);
+}
+
+static int rk860x_set_disable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ if (di->vsel_gpio) {
+ gpiod_set_raw_value(di->vsel_gpio, di->sleep_vsel_id);
+ return 0;
+ }
+
+ return regmap_update_bits(di->regmap, di->en_reg,
+ VSEL_BUCK_EN, 0);
+}
+
+static int rk860x_is_enabled(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret = 0;
+
+ if (di->vsel_gpio) {
+ if (di->sleep_vsel_id)
+ return !gpiod_get_raw_value(di->vsel_gpio);
+ else
+ return gpiod_get_raw_value(di->vsel_gpio);
+ }
+
+ ret = regmap_read(di->regmap, di->en_reg, &val);
+ if (ret < 0)
+ return ret;
+ if (val & VSEL_BUCK_EN)
+ return 1;
+ else
+ return 0;
+}
+
+static int rk860x_set_mode(struct regulator_dev *rdev, unsigned int mode)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ switch (mode) {
+ case REGULATOR_MODE_FAST:
+ regmap_update_bits(di->regmap, di->mode_reg,
+ di->mode_mask, di->mode_mask);
+ break;
+ case REGULATOR_MODE_NORMAL:
+ regmap_update_bits(di->regmap, di->mode_reg, di->mode_mask, 0);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static unsigned int rk860x_get_mode(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret = 0;
+
+ ret = regmap_read(di->regmap, di->mode_reg, &val);
+ if (ret < 0)
+ return ret;
+ if (val & di->mode_mask)
+ return REGULATOR_MODE_FAST;
+ else
+ return REGULATOR_MODE_NORMAL;
+}
+
+static const int slew_rates[] = {
+ 64000,
+ 32000,
+ 16000,
+ 8000,
+ 4000,
+ 2000,
+ 1000,
+ 500,
+};
+
+static int rk860x_set_ramp(struct regulator_dev *rdev, int ramp)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ int regval = -1, i;
+ const int *slew_rate_t;
+ int slew_rate_n;
+
+ slew_rate_t = slew_rates;
+ slew_rate_n = ARRAY_SIZE(slew_rates);
+
+ for (i = 0; i < slew_rate_n; i++) {
+ if (ramp <= slew_rate_t[i])
+ regval = i;
+ else
+ break;
+ }
+
+ if (regval < 0) {
+ dev_err(di->dev, "unsupported ramp value %d\n", ramp);
+ return -EINVAL;
+ }
+
+ return regmap_update_bits(di->regmap, di->slew_reg,
+ di->slew_mask, regval << di->slew_shift);
+}
+
+static const struct regulator_ops rk860x_regulator_ops = {
+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
+ .get_voltage_sel = rk860x_get_voltage,
+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
+ .map_voltage = regulator_map_voltage_linear,
+ .list_voltage = regulator_list_voltage_linear,
+ .set_suspend_voltage = rk860x_set_suspend_voltage,
+ .enable = rk860x_set_enable,
+ .disable = rk860x_set_disable,
+ .is_enabled = rk860x_is_enabled,
+ .set_mode = rk860x_set_mode,
+ .get_mode = rk860x_get_mode,
+ .set_ramp_delay = rk860x_set_ramp,
+ .set_suspend_enable = rk860x_set_suspend_enable,
+ .set_suspend_disable = rk860x_set_suspend_disable,
+ .resume = rk860x_resume,
+};
+
+/* For 00,01 options:
+ * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
+ * For 02,03 options:
+ * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
+ */
+static int rk860x_device_setup(struct rk860x_device_info *di,
+ struct rk860x_platform_data *pdata)
+{
+ int ret = 0;
+ u32 val = 0;
+
+ switch (di->chip_id) {
+ case RK860X_CHIP_ID_00:
+ case RK860X_CHIP_ID_01:
+ di->vsel_min = 712500;
+ di->vsel_step = 12500;
+ di->n_voltages = RK860X_NVOLTAGES_64;
+ di->vol_mask = VSEL_A_NSEL_MASK;
+ if (di->sleep_vsel_id) {
+ di->sleep_reg = RK860X_VSEL1_A;
+ di->vol_reg = RK860X_VSEL0_A;
+ di->mode_reg = RK860X_VSEL0_A;
+ di->en_reg = RK860X_VSEL0_A;
+ di->sleep_en_reg = RK860X_VSEL1_A;
+ } else {
+ di->sleep_reg = RK860X_VSEL0_A;
+ di->vol_reg = RK860X_VSEL1_A;
+ di->mode_reg = RK860X_VSEL1_A;
+ di->en_reg = RK860X_VSEL1_A;
+ di->sleep_en_reg = RK860X_VSEL0_A;
+ }
+ break;
+ case RK860X_CHIP_ID_02:
+ case RK860X_CHIP_ID_03:
+ di->vsel_min = 500000;
+ di->vsel_step = 6250;
+ di->n_voltages = RK860X_NVOLTAGES_160;
+ di->vol_mask = VSEL_B_NSEL_MASK;
+ if (di->sleep_vsel_id) {
+ di->sleep_reg = RK860X_VSEL1_B;
+ di->vol_reg = RK860X_VSEL0_B;
+ di->mode_reg = RK860X_VSEL0_A;
+ di->en_reg = RK860X_VSEL0_A;
+ di->sleep_en_reg = RK860X_VSEL1_A;
+ } else {
+ di->sleep_reg = RK860X_VSEL0_B;
+ di->vol_reg = RK860X_VSEL1_B;
+ di->mode_reg = RK860X_VSEL1_A;
+ di->en_reg = RK860X_VSEL1_A;
+ di->sleep_en_reg = RK860X_VSEL0_A;
+ }
+ break;
+ default:
+ dev_err(di->dev, "Chip ID %d not supported!\n", di->chip_id);
+ return -EINVAL;
+ }
+
+ di->mode_mask = VSEL_MODE;
+ di->slew_reg = RK860X_CONTROL;
+ di->slew_mask = CTL_SLEW_MASK;
+ di->slew_shift = CTL_SLEW_SHIFT;
+
+ if (pdata->limit_volt) {
+ if (pdata->limit_volt < di->vsel_min ||
+ pdata->limit_volt > 1500000)
+ pdata->limit_volt = 1500000;
+ val = (pdata->limit_volt - di->vsel_min) / di->vsel_step;
+ ret = regmap_write(di->regmap, RK860X_MAX_SET, val);
+ if (ret < 0) {
+ dev_err(di->dev, "Failed to set limit voltage!\n");
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
+static int rk860x_regulator_register(struct rk860x_device_info *di,
+ struct regulator_config *config)
+{
+ struct regulator_desc *rdesc = &di->desc;
+
+ rdesc->name = "rk860x-reg";
+ rdesc->supply_name = "vin";
+ rdesc->ops = &rk860x_regulator_ops;
+ rdesc->type = REGULATOR_VOLTAGE;
+ rdesc->n_voltages = di->n_voltages;
+ rdesc->enable_reg = di->en_reg;
+ rdesc->enable_mask = VSEL_BUCK_EN;
+ rdesc->min_uV = di->vsel_min;
+ rdesc->uV_step = di->vsel_step;
+ rdesc->vsel_reg = di->vol_reg;
+ rdesc->vsel_mask = di->vol_mask;
+ rdesc->owner = THIS_MODULE;
+ rdesc->enable_time = 400;
+
+ di->rdev = devm_regulator_register(di->dev, &di->desc, config);
+ return PTR_ERR_OR_ZERO(di->rdev);
+}
+
+static const struct regmap_config rk860x_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static struct rk860x_platform_data *
+rk860x_parse_dt(struct device *dev, struct device_node *np,
+ const struct regulator_desc *desc)
+{
+ struct rk860x_platform_data *pdata;
+ int ret, flag, limit_volt;
+ u32 tmp;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return NULL;
+
+ pdata->regulator = of_get_regulator_init_data(dev, np, desc);
+ pdata->regulator->constraints.initial_state = PM_SUSPEND_MEM;
+
+ if (!(of_property_read_u32(np, "limit-microvolt", &limit_volt)))
+ pdata->limit_volt = limit_volt;
+
+ ret = of_property_read_u32(np, "rockchip,suspend-voltage-selector",
+ &tmp);
+ if (!ret)
+ pdata->sleep_vsel_id = tmp;
+
+ if (pdata->sleep_vsel_id)
+ flag = GPIOD_OUT_LOW;
+ else
+ flag = GPIOD_OUT_HIGH;
+
+ pdata->vsel_gpio = devm_gpiod_get_index_optional(dev, "vsel", 0, flag);
+ if (IS_ERR(pdata->vsel_gpio)) {
+ ret = PTR_ERR(pdata->vsel_gpio);
+ dev_err(dev, "failed to get vesl gpio (%d)\n", ret);
+ pdata->vsel_gpio = NULL;
+ }
+
+ return pdata;
+}
+
+static const struct of_device_id rk860x_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk8600",
+ .data = (void *)RK860X_CHIP_ID_00
+ },
+ {
+ .compatible = "rockchip,rk8601",
+ .data = (void *)RK860X_CHIP_ID_01
+ },
+ {
+ .compatible = "rockchip,rk8602",
+ .data = (void *)RK860X_CHIP_ID_02
+ },
+ {
+ .compatible = "rockchip,rk8603",
+ .data = (void *)RK860X_CHIP_ID_03
+ },
+
+ { }
+};
+MODULE_DEVICE_TABLE(of, rk860x_dt_ids);
+
+static int rk860x_regulator_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device_node *np = client->dev.of_node;
+ struct rk860x_device_info *di;
+ struct rk860x_platform_data *pdata;
+ struct regulator_config config = { };
+ unsigned int val;
+ int ret;
+
+ di = devm_kzalloc(&client->dev, sizeof(*di), GFP_KERNEL);
+ if (!di)
+ return -ENOMEM;
+
+ di->desc.of_map_mode = rk860x_map_mode;
+
+ pdata = dev_get_platdata(&client->dev);
+ if (!pdata)
+ pdata = rk860x_parse_dt(&client->dev, np, &di->desc);
+
+ if (!pdata || !pdata->regulator) {
+ dev_err(&client->dev, "Platform data not found!\n");
+ return -ENODEV;
+ }
+
+ di->vsel_gpio = pdata->vsel_gpio;
+ di->sleep_vsel_id = pdata->sleep_vsel_id;
+
+ di->regulator = pdata->regulator;
+ if (client->dev.of_node) {
+ di->chip_id =
+ (unsigned long)of_device_get_match_data(&client->dev);
+ } else {
+ /* if no ramp constraint set, get the pdata ramp_delay */
+ if (!di->regulator->constraints.ramp_delay) {
+ int slew_idx = (pdata->slew_rate & 0x7)
+ ? pdata->slew_rate : 0;
+
+ di->regulator->constraints.ramp_delay =
+ slew_rates[slew_idx];
+ }
+ di->chip_id = id->driver_data;
+ }
+
+ di->regmap = devm_regmap_init_i2c(client, &rk860x_regmap_config);
+ if (IS_ERR(di->regmap)) {
+ dev_err(&client->dev, "Failed to allocate regmap!\n");
+ return PTR_ERR(di->regmap);
+ }
+ di->dev = &client->dev;
+ i2c_set_clientdata(client, di);
+ /* Get chip ID */
+ ret = regmap_read(di->regmap, RK860X_ID1, &val);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to get chip ID!\n");
+ return ret;
+ }
+
+ switch (di->chip_id) {
+ case RK860X_CHIP_ID_00:
+ case RK860X_CHIP_ID_01:
+ if ((val & DIE_ID) != 0x8) {
+ dev_err(&client->dev, "Failed to match chip ID!\n");
+ return -EINVAL;
+ }
+ break;
+ case RK860X_CHIP_ID_02:
+ case RK860X_CHIP_ID_03:
+ if ((val & DIE_ID) != 0xa) {
+ dev_err(&client->dev, "Failed to match chip ID!\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Device init */
+ ret = rk860x_device_setup(di, pdata);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to setup device!\n");
+ return ret;
+ }
+ /* Register regulator */
+ config.dev = di->dev;
+ config.init_data = di->regulator;
+ config.regmap = di->regmap;
+ config.driver_data = di;
+ config.of_node = np;
+
+ ret = rk860x_regulator_register(di, &config);
+ if (ret < 0)
+ dev_err(&client->dev, "Failed to register regulator!\n");
+
+ return ret;
+}
+
+static void rk860x_regulator_shutdown(struct i2c_client *client)
+{
+ struct rk860x_device_info *di;
+ int ret;
+
+ di = i2c_get_clientdata(client);
+
+ dev_info(di->dev, "rk860..... reset\n");
+
+ ret = regmap_update_bits(di->regmap, di->slew_reg,
+ CTL_RESET, CTL_RESET);
+
+ if (ret < 0)
+ dev_err(di->dev, "force rk860x_reset error! ret=%d\n", ret);
+ else
+ dev_info(di->dev, "force rk860x_reset ok!\n");
+}
+
+static const struct i2c_device_id rk860x_id[] = {
+ { .name = "rk8600", .driver_data = RK860X_CHIP_ID_00 },
+ { .name = "rk8601", .driver_data = RK860X_CHIP_ID_01 },
+ { .name = "rk8602", .driver_data = RK860X_CHIP_ID_02 },
+ { .name = "rk8603", .driver_data = RK860X_CHIP_ID_03 },
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, rk860x_id);
+
+static struct i2c_driver rk860x_regulator_driver = {
+ .driver = {
+ .name = "rk860-regulator",
+ .of_match_table = of_match_ptr(rk860x_dt_ids),
+ },
+ .probe = rk860x_regulator_probe,
+ .shutdown = rk860x_regulator_shutdown,
+ .id_table = rk860x_id,
+};
+
+module_i2c_driver(rk860x_regulator_driver);
+
+MODULE_AUTHOR("Elaine Zhang <zhangqing@rock-chips.com>");
+MODULE_DESCRIPTION("rk860x regulator driver");
+MODULE_LICENSE("GPL v2");
--
2.25.1

21
buildroot-external/board/nabucasa/green/patches/linux/0003-drivers-mfd-rk808-set-PWRON_LP_OFF_TIME-12s.patch → buildroot-external/board/nabucasa/green/patches/linux/0002-drivers-mfd-rk808-set-PWRON_LP_OFF_TIME-12s.patch
View File

@ -1,18 +1,18 @@
From e86272fa8063a047a55a9548400a95742f1c2d2a Mon Sep 17 00:00:00 2001
From be773999495258994d1df04448a4de43d58db9c4 Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Wed, 12 Jul 2023 02:33:03 +0000
Subject: [PATCH] drivers: mfd: rk808: set PWRON_LP_OFF_TIME 12s
---
drivers/mfd/rk808.c | 1 +
drivers/mfd/rk8xx-core.c | 1 +
include/linux/mfd/rk808.h | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index e00da7c7e..ae3c99809 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -300,6 +300,7 @@ static const struct rk808_reg_data rk817_pre_init_reg[] = {
diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
index a577f950c632..418a4506c99e 100644
--- a/drivers/mfd/rk8xx-core.c
+++ b/drivers/mfd/rk8xx-core.c
@@ -232,6 +232,7 @@ static const struct rk808_reg_data rk817_pre_init_reg[] = {
{RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
{RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
RK817_HOTDIE_105 | RK817_TSD_140},
@ -21,10 +21,10 @@ index e00da7c7e..ae3c99809 100644
static const struct rk808_reg_data rk818_pre_init_reg[] = {
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index 9af1f3105..d02e56e09 100644
index 78e167a92483..0bd7031966d6 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -644,6 +644,11 @@ enum rk809_reg_id {
@@ -1052,6 +1052,11 @@ enum rk809_reg_id {
#define RK817_ON_SOURCE_REG 0xf5
#define RK817_OFF_SOURCE_REG 0xf6
@ -36,6 +36,3 @@ index 9af1f3105..d02e56e09 100644
/* INTERRUPT REGISTER */
#define RK817_INT_STS_REG0 0xf8
#define RK817_INT_STS_MSK_REG0 0xf9
--
2.25.1

9
buildroot-external/board/nabucasa/green/patches/linux/0004-arch-arm64-dts-green-Remove-spiflash-partitions.patch → buildroot-external/board/nabucasa/green/patches/linux/0003-arch-arm64-dts-green-Remove-spiflash-partitions.patch
View File

@ -1,4 +1,4 @@
From 5f1f9863bf1031e608537945fdc97e099cb9e42c Mon Sep 17 00:00:00 2001
From 41026603d639007895de1f48437813f78edb62ea Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Sat, 15 Jul 2023 08:28:16 +0000
Subject: [PATCH] arch: arm64: dts: green: Remove spiflash partitions
@ -8,10 +8,10 @@ Subject: [PATCH] arch: arm64: dts: green: Remove spiflash partitions
1 file changed, 2 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index d0830df48..66ef38600 100644
index b5e4a67b3fc7..debb9459a5aa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -566,36 +566,9 @@ &sfc {
@@ -565,36 +565,9 @@ &sfc {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
@ -50,6 +50,3 @@ index d0830df48..66ef38600 100644
};
};
--
2.25.1

8
buildroot-external/board/nabucasa/green/patches/linux/0005-Input-rk805-pwrkey-reverse-polarity-of-pwrkey.patch → buildroot-external/board/nabucasa/green/patches/linux/0004-Input-rk805-pwrkey-reverse-polarity-of-pwrkey.patch
View File

@ -1,7 +1,4 @@
From 32ee0c67a53f541f42b3a953e992bac12d5375d6 Mon Sep 17 00:00:00 2001
Message-ID: <32ee0c67a53f541f42b3a953e992bac12d5375d6.1689754249.git.stefan@agner.ch>
In-Reply-To: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1689754249.git.stefan@agner.ch>
References: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1689754249.git.stefan@agner.ch>
From 0c8b1453993f15715836123bfc7c164e568913f2 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 19 Jul 2023 10:08:06 +0200
Subject: [PATCH] Input: rk805-pwrkey: reverse polarity of pwrkey
@ -36,6 +33,3 @@ index 76873aa005b4..139419033c84 100644
input_sync(pwr);
return IRQ_HANDLED;
--
2.41.0

9
buildroot-external/board/nabucasa/green/patches/linux/0006-green-emmc-use-HS200-mode.patch → buildroot-external/board/nabucasa/green/patches/linux/0005-green-emmc-use-HS200-mode.patch
View File

@ -1,4 +1,4 @@
From 10c2c3afa62f58c4f795a0777aa8635428e3c78a Mon Sep 17 00:00:00 2001
From 858d26179ee3a06fc7ebadf2c49dc337a7a98485 Mon Sep 17 00:00:00 2001
From: zhangcy <chengyu.zhang@seeed.cc>
Date: Mon, 14 Aug 2023 01:27:34 +0000
Subject: [PATCH] green: emmc use HS200 mode
@ -8,10 +8,10 @@ Subject: [PATCH] green: emmc use HS200 mode
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index f742b904a..3b564950f 100644
index debb9459a5aa..e4b1e80641b9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -533,6 +533,7 @@ &saradc {
@@ -532,6 +532,7 @@ &saradc {
&sdhci {
bus-width = <8>;
@ -19,6 +19,3 @@ index f742b904a..3b564950f 100644
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
--
2.25.1

10
buildroot-external/board/nabucasa/green/patches/linux/0007-arch-arm64-dts-green-Improve-LED-representation.patch → buildroot-external/board/nabucasa/green/patches/linux/0006-arch-arm64-dts-green-Improve-LED-representation.patch
View File

@ -1,7 +1,4 @@
From 6c1abc949a978492bd9a1b30f4faaa2329d93068 Mon Sep 17 00:00:00 2001
Message-ID: <6c1abc949a978492bd9a1b30f4faaa2329d93068.1693860223.git.stefan@agner.ch>
In-Reply-To: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1693860223.git.stefan@agner.ch>
References: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1693860223.git.stefan@agner.ch>
From 6b926b041e939655d3a88202bde32f4901459a65 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 4 Sep 2023 22:36:10 +0200
Subject: [PATCH] arch: arm64: dts: green: Improve LED representation
@ -12,7 +9,7 @@ Fix color and use labels/node names according to the LEDs functionality.
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index 5be4368767a1..d4bd90b7f0d6 100644
index e4b1e80641b9..1d0db11db3e0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -48,16 +48,18 @@ hdmi_con_in: endpoint {
@ -47,6 +44,3 @@ index 5be4368767a1..d4bd90b7f0d6 100644
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_YELLOW>;
--
2.42.0

79
buildroot-external/board/nabucasa/green/patches/linux/0007-dt-bindings-RNG-Add-Rockchip-RNG-bindings.patch Normal file
View File

@ -0,0 +1,79 @@
From 852dec67f3678b98fbd100ac3a0a63550fd86811 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:16 +0100
Subject: [PATCH] dt-bindings: RNG: Add Rockchip RNG bindings
Add the RNG bindings for the RK3568 SoC from Rockchip
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
.../bindings/rng/rockchip,rk3568-rng.yaml | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
diff --git a/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml b/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
new file mode 100644
index 000000000000..c2f5ef69cf07
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/rockchip,rk3568-rng.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/rockchip,rk3568-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip TRNG
+
+description: True Random Number Generator for some Rockchip SoCs
+
+maintainers:
+ - Aurelien Jarno <aurelien@aurel32.net>
+
+properties:
+ compatible:
+ enum:
+ - rockchip,rk3568-rng
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: TRNG clock
+ - description: TRNG AHB clock
+
+ clock-names:
+ items:
+ - const: trng_clk
+ - const: trng_hclk
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3568-cru.h>
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ rng@fe388000 {
+ compatible = "rockchip,rk3568-rng";
+ reg = <0x0 0xfe388000 0x0 0x4000>;
+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+ clock-names = "trng_clk", "trng_hclk";
+ resets = <&cru SRST_TRNG_NS>;
+ };
+ };
+
+...

317
buildroot-external/board/nabucasa/green/patches/linux/0008-hwrng-add-Rockchip-SoC-hwrng-driver.patch Normal file
View File

@ -0,0 +1,317 @@
From 3850733a82a25ae2ee82858e8cf4b322ebc91e98 Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:17 +0100
Subject: [PATCH] hwrng: add Rockchip SoC hwrng driver
Rockchip SoCs used to have a random number generator as part of their
crypto device, and support for it has to be added to the corresponding
driver. However newer Rockchip SoCs like the RK356x have an independent
True Random Number Generator device. This patch adds a driver for it,
greatly inspired from the downstream driver.
The TRNG device does not seem to have a signal conditionner and the FIPS
140-2 test returns a lot of failures. They can be reduced by increasing
RK_RNG_SAMPLE_CNT, in a tradeoff between quality and speed. This value
has been adjusted to get ~90% of successes and the quality value has
been set accordingly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[conservatively estimate quality as per review feedback]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
drivers/char/hw_random/Kconfig | 14 ++
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/rockchip-rng.c | 250 ++++++++++++++++++++++++++
3 files changed, 265 insertions(+)
create mode 100644 drivers/char/hw_random/rockchip-rng.c
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 8de74dcfa18c..f7036ea8e65f 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -573,6 +573,20 @@ config HW_RANDOM_JH7110
To compile this driver as a module, choose M here.
The module will be called jh7110-trng.
+config HW_RANDOM_ROCKCHIP
+ tristate "Rockchip True Random Number Generator"
+ depends on HW_RANDOM && (ARCH_ROCKCHIP || COMPILE_TEST)
+ depends on HAS_IOMEM
+ default HW_RANDOM
+ help
+ This driver provides kernel-side support for the True Random Number
+ Generator hardware found on some Rockchip SoC like RK3566 or RK3568.
+
+ To compile this driver as a module, choose M here: the
+ module will be called rockchip-rng.
+
+ If unsure, say Y.
+
endif # HW_RANDOM
config UML_RANDOM
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 32549a1186dc..5bf0e4692aca 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_HW_RANDOM_ARM_SMCCC_TRNG) += arm_smccc_trng.o
obj-$(CONFIG_HW_RANDOM_CN10K) += cn10k-rng.o
obj-$(CONFIG_HW_RANDOM_POLARFIRE_SOC) += mpfs-rng.o
obj-$(CONFIG_HW_RANDOM_JH7110) += jh7110-trng.o
+obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o
diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c
new file mode 100644
index 000000000000..9b7b334d6410
--- /dev/null
+++ b/drivers/char/hw_random/rockchip-rng.c
@@ -0,0 +1,250 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * rockchip-rng.c True Random Number Generator driver for Rockchip SoCs
+ *
+ * Copyright (c) 2018, Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022, Aurelien Jarno
+ * Authors:
+ * Lin Jinhan <troy.lin@rock-chips.com>
+ * Aurelien Jarno <aurelien@aurel32.net>
+ */
+#include <linux/clk.h>
+#include <linux/hw_random.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+#include <linux/slab.h>
+
+#define RK_RNG_AUTOSUSPEND_DELAY 100
+#define RK_RNG_MAX_BYTE 32
+#define RK_RNG_POLL_PERIOD_US 100
+#define RK_RNG_POLL_TIMEOUT_US 10000
+
+/*
+ * TRNG collects osc ring output bit every RK_RNG_SAMPLE_CNT time. The value is
+ * a tradeoff between speed and quality and has been adjusted to get a quality
+ * of ~900 (~90% of FIPS 140-2 successes).
+ */
+#define RK_RNG_SAMPLE_CNT 1000
+
+/* TRNG registers from RK3568 TRM-Part2, section 5.4.1 */
+#define TRNG_RST_CTL 0x0004
+#define TRNG_RNG_CTL 0x0400
+#define TRNG_RNG_CTL_LEN_64_BIT (0x00 << 4)
+#define TRNG_RNG_CTL_LEN_128_BIT (0x01 << 4)
+#define TRNG_RNG_CTL_LEN_192_BIT (0x02 << 4)
+#define TRNG_RNG_CTL_LEN_256_BIT (0x03 << 4)
+#define TRNG_RNG_CTL_OSC_RING_SPEED_0 (0x00 << 2)
+#define TRNG_RNG_CTL_OSC_RING_SPEED_1 (0x01 << 2)
+#define TRNG_RNG_CTL_OSC_RING_SPEED_2 (0x02 << 2)
+#define TRNG_RNG_CTL_OSC_RING_SPEED_3 (0x03 << 2)
+#define TRNG_RNG_CTL_ENABLE BIT(1)
+#define TRNG_RNG_CTL_START BIT(0)
+#define TRNG_RNG_SAMPLE_CNT 0x0404
+#define TRNG_RNG_DOUT_0 0x0410
+#define TRNG_RNG_DOUT_1 0x0414
+#define TRNG_RNG_DOUT_2 0x0418
+#define TRNG_RNG_DOUT_3 0x041c
+#define TRNG_RNG_DOUT_4 0x0420
+#define TRNG_RNG_DOUT_5 0x0424
+#define TRNG_RNG_DOUT_6 0x0428
+#define TRNG_RNG_DOUT_7 0x042c
+
+struct rk_rng {
+ struct hwrng rng;
+ void __iomem *base;
+ struct reset_control *rst;
+ int clk_num;
+ struct clk_bulk_data *clk_bulks;
+};
+
+/* The mask determine the bits that are updated */
+static void rk_rng_write_ctl(struct rk_rng *rng, u32 val, u32 mask)
+{
+ writel_relaxed((mask << 16) | val, rng->base + TRNG_RNG_CTL);
+}
+
+static int rk_rng_init(struct hwrng *rng)
+{
+ struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+ u32 reg;
+ int ret;
+
+ /* start clocks */
+ ret = clk_bulk_prepare_enable(rk_rng->clk_num, rk_rng->clk_bulks);
+ if (ret < 0) {
+ dev_err((struct device *) rk_rng->rng.priv,
+ "Failed to enable clks %d\n", ret);
+ return ret;
+ }
+
+ /* set the sample period */
+ writel(RK_RNG_SAMPLE_CNT, rk_rng->base + TRNG_RNG_SAMPLE_CNT);
+
+ /* set osc ring speed and enable it */
+ reg = TRNG_RNG_CTL_LEN_256_BIT |
+ TRNG_RNG_CTL_OSC_RING_SPEED_0 |
+ TRNG_RNG_CTL_ENABLE;
+ rk_rng_write_ctl(rk_rng, reg, 0xffff);
+
+ return 0;
+}
+
+static void rk_rng_cleanup(struct hwrng *rng)
+{
+ struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+ u32 reg;
+
+ /* stop TRNG */
+ reg = 0;
+ rk_rng_write_ctl(rk_rng, reg, 0xffff);
+
+ /* stop clocks */
+ clk_bulk_disable_unprepare(rk_rng->clk_num, rk_rng->clk_bulks);
+}
+
+static int rk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
+{
+ struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);
+ u32 reg;
+ int ret = 0;
+ int i;
+
+ pm_runtime_get_sync((struct device *) rk_rng->rng.priv);
+
+ /* Start collecting random data */
+ reg = TRNG_RNG_CTL_START;
+ rk_rng_write_ctl(rk_rng, reg, reg);
+
+ ret = readl_poll_timeout(rk_rng->base + TRNG_RNG_CTL, reg,
+ !(reg & TRNG_RNG_CTL_START),
+ RK_RNG_POLL_PERIOD_US,
+ RK_RNG_POLL_TIMEOUT_US);
+ if (ret < 0)
+ goto out;
+
+ /* Read random data stored in the registers */
+ ret = min_t(size_t, max, RK_RNG_MAX_BYTE);
+ for (i = 0; i < ret; i += 4) {
+ *(u32 *)(buf + i) = readl_relaxed(rk_rng->base + TRNG_RNG_DOUT_0 + i);
+ }
+
+out:
+ pm_runtime_mark_last_busy((struct device *) rk_rng->rng.priv);
+ pm_runtime_put_sync_autosuspend((struct device *) rk_rng->rng.priv);
+
+ return ret;
+}
+
+static int rk_rng_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct rk_rng *rk_rng;
+ int ret;
+
+ rk_rng = devm_kzalloc(dev, sizeof(struct rk_rng), GFP_KERNEL);
+ if (!rk_rng)
+ return -ENOMEM;
+
+ rk_rng->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(rk_rng->base))
+ return PTR_ERR(rk_rng->base);
+
+ rk_rng->clk_num = devm_clk_bulk_get_all(dev, &rk_rng->clk_bulks);
+ if (rk_rng->clk_num < 0)
+ return dev_err_probe(dev, rk_rng->clk_num,
+ "Failed to get clks property\n");
+
+ rk_rng->rst = devm_reset_control_array_get(&pdev->dev, false, false);
+ if (IS_ERR(rk_rng->rst))
+ return dev_err_probe(dev, PTR_ERR(rk_rng->rst),
+ "Failed to get reset property\n");
+
+ reset_control_assert(rk_rng->rst);
+ udelay(2);
+ reset_control_deassert(rk_rng->rst);
+
+ platform_set_drvdata(pdev, rk_rng);
+
+ rk_rng->rng.name = dev_driver_string(dev);
+#ifndef CONFIG_PM
+ rk_rng->rng.init = rk_rng_init;
+ rk_rng->rng.cleanup = rk_rng_cleanup;
+#endif
+ rk_rng->rng.read = rk_rng_read;
+ rk_rng->rng.priv = (unsigned long) dev;
+ rk_rng->rng.quality = 512;
+
+ pm_runtime_set_autosuspend_delay(dev, RK_RNG_AUTOSUSPEND_DELAY);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_enable(dev);
+
+ ret = devm_hwrng_register(dev, &rk_rng->rng);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "Failed to register Rockchip hwrng\n");
+
+ dev_info(&pdev->dev, "Registered Rockchip hwrng\n");
+
+ return 0;
+}
+
+static int rk_rng_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int rk_rng_runtime_suspend(struct device *dev)
+{
+ struct rk_rng *rk_rng = dev_get_drvdata(dev);
+
+ rk_rng_cleanup(&rk_rng->rng);
+
+ return 0;
+}
+
+static int rk_rng_runtime_resume(struct device *dev)
+{
+ struct rk_rng *rk_rng = dev_get_drvdata(dev);
+
+ return rk_rng_init(&rk_rng->rng);
+}
+#endif
+
+static const struct dev_pm_ops rk_rng_pm_ops = {
+ SET_RUNTIME_PM_OPS(rk_rng_runtime_suspend,
+ rk_rng_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+};
+
+static const struct of_device_id rk_rng_dt_match[] = {
+ {
+ .compatible = "rockchip,rk3568-rng",
+ },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, rk_rng_dt_match);
+
+static struct platform_driver rk_rng_driver = {
+ .driver = {
+ .name = "rockchip-rng",
+ .pm = &rk_rng_pm_ops,
+ .of_match_table = rk_rng_dt_match,
+ },
+ .probe = rk_rng_probe,
+ .remove = rk_rng_remove,
+};
+
+module_platform_driver(rk_rng_driver);
+
+MODULE_DESCRIPTION("Rockchip True Random Number Generator driver");
+MODULE_AUTHOR("Lin Jinhan <troy.lin@rock-chips.com>, Aurelien Jarno <aurelien@aurel32.net>");
+MODULE_LICENSE("GPL v2");

32
buildroot-external/board/nabucasa/green/patches/linux/0009-arm64-dts-rockchip-add-DT-entry-for-RNG-to-RK356x.patch Normal file
View File

@ -0,0 +1,32 @@
From 8ca53a7e5b51999c1a48ea27dbb3a56202a975ca Mon Sep 17 00:00:00 2001
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Mon, 28 Nov 2022 19:47:18 +0100
Subject: [PATCH] arm64: dts: rockchip: add DT entry for RNG to RK356x
Enable the just added Rockchip RNG driver for RK356x SoCs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index b7e2b475f070..06ca0dbca2af 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1806,6 +1806,15 @@ usb2phy1_otg: otg-port {
};
};
+ rng: rng@fe388000 {
+ compatible = "rockchip,rk3568-rng";
+ reg = <0x0 0xfe388000 0x0 0x4000>;
+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+ clock-names = "trng_clk", "trng_hclk";
+ resets = <&cru SRST_TRNG_NS>;
+ reset-names = "reset";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3568-pinctrl";
rockchip,grf = <&grf>;

40
buildroot-external/board/nabucasa/kernel-rockchip.config
View File

@ -240,7 +240,6 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
@ -376,7 +375,6 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
@ -482,10 +480,8 @@ CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y
CONFIG_IEEE802154_6LOWPAN=m
CONFIG_MAC802154=m
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
CONFIG_NET_SCH_ATM=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_MULTIQ=m
CONFIG_NET_SCH_RED=m
@ -497,7 +493,6 @@ CONFIG_NET_SCH_CBS=m
CONFIG_NET_SCH_ETF=m
CONFIG_NET_SCH_TAPRIO=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_DRR=m
CONFIG_NET_SCH_MQPRIO=m
@ -719,7 +714,6 @@ CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_DMI_SYSFS=y
CONFIG_ISCSI_IBFT=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_GNSS=m
@ -757,7 +751,6 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=m
CONFIG_OF_OVERLAY=y
CONFIG_PARPORT=m
CONFIG_PARPORT_AX88796=m
CONFIG_BLK_DEV_NULL_BLK=m
CONFIG_ZRAM=m
CONFIG_ZRAM_WRITEBACK=y
@ -803,7 +796,6 @@ CONFIG_BCM_VK=m
CONFIG_MISC_ALCOR_PCI=m
CONFIG_MISC_RTSX_PCI=m
CONFIG_MISC_RTSX_USB=m
CONFIG_HABANA_AI=m
CONFIG_UACCE=m
CONFIG_GP_PCI1XXXX=m
CONFIG_RAID_ATTRS=y
@ -871,7 +863,6 @@ CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_DWC=m
CONFIG_AHCI_SUNXI=y
CONFIG_AHCI_TEGRA=y
CONFIG_AHCI_XGENE=y
CONFIG_SATA_INIC162X=m
CONFIG_SATA_ACARD_AHCI=m
CONFIG_SATA_SIL24=y
@ -1080,7 +1071,6 @@ CONFIG_E1000=m
CONFIG_E1000E=m
CONFIG_IGB=m
CONFIG_IGBVF=m
CONFIG_IXGB=m
CONFIG_IXGBE=m
CONFIG_IXGBE_DCB=y
CONFIG_IXGBEVF=m
@ -1525,12 +1515,10 @@ CONFIG_TOUCHSCREEN_MSG2638=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_MK712=m
CONFIG_TOUCHSCREEN_PENMOUNT=m
CONFIG_TOUCHSCREEN_EDT_FT5X06=m
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_UCB1400=m
CONFIG_TOUCHSCREEN_PIXCIR=m
CONFIG_TOUCHSCREEN_WDT87XX_I2C=m
CONFIG_TOUCHSCREEN_WM97XX=m
@ -1602,7 +1590,6 @@ CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_TEGRA_TCU=y
CONFIG_SERIAL_JSM=m
@ -1625,7 +1612,6 @@ CONFIG_SERIAL_LITEUART=m
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_MOXA_INTELLIO=m
CONFIG_MOXA_SMARTIO=m
CONFIG_SYNCLINK_GT=m
CONFIG_N_HDLC=m
CONFIG_N_GSM=m
CONFIG_NOZOMI=m
@ -1646,7 +1632,6 @@ CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C=m
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_XILLYUSB=m
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=m
CONFIG_I2C_MUX_GPIO=m
@ -1699,7 +1684,6 @@ CONFIG_SPI_DW_PCI=m
CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_HISI_KUNPENG=m
CONFIG_SPI_HISI_SFC_V3XX=m
CONFIG_SPI_NXP_FLEXSPI=m
CONFIG_SPI_GPIO=m
CONFIG_SPI_LM70_LLP=m
CONFIG_SPI_FSL_SPI=m
@ -1784,7 +1768,6 @@ CONFIG_GPIO_BD9571MWV=m
CONFIG_GPIO_MAX77620=y
CONFIG_GPIO_MAX77650=m
CONFIG_GPIO_TQMX86=m
CONFIG_GPIO_UCB1400=m
CONFIG_GPIO_PCI_IDIO_16=m
CONFIG_GPIO_PCIE_IDIO_24=m
CONFIG_GPIO_RDC321X=m
@ -1799,7 +1782,6 @@ CONFIG_GPIO_VIRTIO=m
CONFIG_W1_MASTER_MATROX=m
CONFIG_W1_MASTER_DS2490=m
CONFIG_W1_MASTER_DS2482=m
CONFIG_W1_MASTER_DS1WM=m
CONFIG_W1_MASTER_GPIO=m
CONFIG_W1_MASTER_SGI=m
CONFIG_W1_SLAVE_THERM=m
@ -2017,7 +1999,6 @@ CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_SCH5627=m
CONFIG_SENSORS_SCH5636=m
CONFIG_SENSORS_STTS751=m
CONFIG_SENSORS_SMM665=m
CONFIG_SENSORS_ADC128D818=m
CONFIG_SENSORS_ADS7828=m
CONFIG_SENSORS_ADS7871=m
@ -2097,13 +2078,12 @@ CONFIG_MFD_MAX77650=m
CONFIG_MFD_MT6370=m
CONFIG_MFD_OCELOT=m
CONFIG_MFD_NTXEC=m
CONFIG_UCB1400_CORE=m
CONFIG_MFD_SY7636A=m
CONFIG_MFD_RT4831=m
CONFIG_MFD_RT5033=m
CONFIG_MFD_RT5120=m
CONFIG_MFD_RC5T583=y
CONFIG_MFD_RK808=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_RN5T618=m
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SM501=m
@ -2284,7 +2264,6 @@ CONFIG_VIDEO_GO7007_USB=m
CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_AU0828_RC=y
CONFIG_VIDEO_CX231XX=m
@ -2408,7 +2387,6 @@ CONFIG_VIDEO_TVP514X=m
CONFIG_VIDEO_TVP7002=m
CONFIG_VIDEO_TW9910=m
CONFIG_VIDEO_VPX3220=m
CONFIG_VIDEO_AD9389B=m
CONFIG_VIDEO_ADV7170=m
CONFIG_VIDEO_ADV7175=m
CONFIG_VIDEO_ADV7343=m
@ -3085,7 +3063,6 @@ CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OXU210HP_HCD=m
CONFIG_USB_ISP116X_HCD=m
CONFIG_USB_FOTG210_HCD=m
CONFIG_USB_MAX3421_HCD=m
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
@ -3196,7 +3173,6 @@ CONFIG_USB_LCD=m
CONFIG_USB_CYPRESS_CY7C63=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
CONFIG_USB_FTDI_ELAN=m
CONFIG_USB_APPLEDISPLAY=m
CONFIG_APPLE_MFI_FASTCHARGE=m
CONFIG_USB_SISUSBVGA=m
@ -3219,10 +3195,8 @@ CONFIG_USB_CXACRU=m
CONFIG_USB_UEAGLEATM=m
CONFIG_USB_XUSBATM=m
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=m
CONFIG_USB_ISP1301=m
CONFIG_U_SERIAL_CONSOLE=y
CONFIG_USB_FOTG210_UDC=m
CONFIG_USB_GR_UDC=m
CONFIG_USB_R8A66597=m
CONFIG_USB_PXA27X=m
@ -3367,7 +3341,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
@ -3453,7 +3426,6 @@ CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_HIDMA=y
CONFIG_DW_DMAC=m
CONFIG_DW_DMAC_PCI=m
CONFIG_DW_EDMA_PCIE=m
CONFIG_SF_PDMA=m
CONFIG_ASYNC_TX_DMA=y
CONFIG_UDMABUF=y
@ -3488,7 +3460,6 @@ CONFIG_RTLLIB=m
CONFIG_RTL8192E=m
CONFIG_RTL8723BS=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_RTS5208=m
CONFIG_VT6655=m
CONFIG_VT6656=m
@ -3838,7 +3809,6 @@ CONFIG_PWM_SUN4I=m
CONFIG_PWM_TEGRA=y
CONFIG_PWM_XILINX=m
CONFIG_RESET_TI_TPS380X=m
CONFIG_PHY_XGENE=y
CONFIG_PHY_CAN_TRANSCEIVER=m
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_SUN9I_USB=m
@ -3894,8 +3864,6 @@ CONFIG_MUX_GPIO=m
CONFIG_MUX_MMIO=m
CONFIG_COUNTER=m
CONFIG_INTERRUPT_CNT=m
CONFIG_FTM_QUADDEC=m
CONFIG_INTEL_QEP=m
CONFIG_MOST=m
CONFIG_MOST_SND=m
CONFIG_VALIDATE_FS_PARSER=y
@ -3938,7 +3906,7 @@ CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V1=m
CONFIG_QFMT_V2=m
CONFIG_AUTOFS4_FS=m
CONFIG_AUTOFS_FS=m
CONFIG_FUSE_FS=y
CONFIG_CUSE=m
CONFIG_VIRTIO_FS=m
@ -3983,7 +3951,7 @@ CONFIG_CRAMFS=m
CONFIG_CRAMFS_MTD=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_DIRECT=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@ -3999,7 +3967,6 @@ CONFIG_QNX4FS_FS=m
CONFIG_QNX6FS_FS=m
CONFIG_ROMFS_FS=m
CONFIG_PSTORE=y
CONFIG_PSTORE_LZ4HC_COMPRESS=m
CONFIG_PSTORE_RAM=m
CONFIG_PSTORE_BLK=m
CONFIG_SYSV_FS=m
@ -4230,7 +4197,6 @@ CONFIG_CRC4=m
CONFIG_XZ_DEC_MICROLZMA=y
CONFIG_XZ_DEC_TEST=m
CONFIG_DMA_RESTRICTED_POOL=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=384
CONFIG_GLOB_SELFTEST=m
CONFIG_FONTS=y

28
buildroot-external/board/pc/patches/linux/0001-iwlwifi-Make-missed-beacon-timeout-configurable.patch
View File

@ -1,5 +1,4 @@
From bf633d2f767c88bd54fbe1cf66122703bb1b98ae Mon Sep 17 00:00:00 2001
Message-Id: <bf633d2f767c88bd54fbe1cf66122703bb1b98ae.1676491209.git.stefan@agner.ch>
From 5712a20822709d1cd744a435eba5d9c8ef91a834 Mon Sep 17 00:00:00 2001
From: Zachary Michaels <mikezackles@gmail.com>
Date: Thu, 7 Jan 2021 08:13:11 -0800
Subject: [PATCH] iwlwifi: Make missed beacon timeout configurable
@ -19,10 +18,10 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
4 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-drv.c b/drivers/net/wireless/intel/iwlwifi/iwl-drv.c
index a2203f661321..a8a9d9559b53 100644
index fb5e254757e7..2db7032ea269 100644
--- a/drivers/net/wireless/intel/iwlwifi/iwl-drv.c
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-drv.c
@@ -1779,6 +1779,7 @@ struct iwl_mod_params iwlwifi_mod_params = {
@@ -1866,6 +1866,7 @@ struct iwl_mod_params iwlwifi_mod_params = {
.power_level = IWL_POWER_INDEX_1,
.uapsd_disable = IWL_DISABLE_UAPSD_BSS | IWL_DISABLE_UAPSD_P2P_CLIENT,
.enable_ini = ENABLE_INI,
@ -30,7 +29,7 @@ index a2203f661321..a8a9d9559b53 100644
/* the rest are 0 by default */
};
IWL_EXPORT_SYMBOL(iwlwifi_mod_params);
@@ -1926,6 +1927,9 @@ module_param_cb(enable_ini, &enable_ini_ops, &iwlwifi_mod_params.enable_ini, 064
@@ -1982,6 +1983,9 @@ module_param_named(enable_ini, iwlwifi_mod_params.enable_ini, uint, 0444);
MODULE_PARM_DESC(enable_ini,
"0:disable, 1-15:FW_DBG_PRESET Values, 16:enabled without preset value defined,"
"Debug INI TLV FW debug infrastructure (default: 16)");
@ -41,18 +40,18 @@ index a2203f661321..a8a9d9559b53 100644
/*
* set bt_coex_active to true, uCode will do kill/defer
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h b/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h
index d0b4d02bdab9..f74e85ae0076 100644
index 1cf26ab4f488..ba50b7d21744 100644
--- a/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h
@@ -62,6 +62,7 @@ enum iwl_uapsd_disable {
* @disable_11ac: disable VHT capabilities, default = false.
@@ -63,6 +63,7 @@ enum iwl_uapsd_disable {
* @remove_when_gone: remove an inaccessible device from the PCIe bus.
* @enable_ini: enable new FW debug infratructure (INI TLVs)
* @disable_11be: disable EHT capabilities, default = false.
+ * @beacon_timeout: number of missed beacons before disconnect, default = 16
*/
struct iwl_mod_params {
int swcrypto;
@@ -85,6 +86,7 @@ struct iwl_mod_params {
@@ -86,6 +87,7 @@ struct iwl_mod_params {
bool remove_when_gone;
u32 enable_ini;
bool disable_11be;
@ -61,7 +60,7 @@ index d0b4d02bdab9..f74e85ae0076 100644
static inline bool iwl_enable_rx_ampdu(void)
diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c b/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c
index de0c545d50fd..24eb541209ef 100644
index 9c97691e6038..56c0f98d12b5 100644
--- a/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c
+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c
@@ -8,6 +8,7 @@
@ -72,7 +71,7 @@ index de0c545d50fd..24eb541209ef 100644
#include "iwl-prph.h"
#include "fw-api.h"
#include "mvm.h"
@@ -1398,7 +1399,7 @@ void iwl_mvm_rx_missed_beacons_notif(struct iwl_mvm *mvm,
@@ -1614,7 +1615,7 @@ void iwl_mvm_rx_missed_beacons_notif(struct iwl_mvm *mvm,
* TODO: the threshold should be adjusted based on latency conditions,
* and/or in case of a CS flow on one of the other AP vifs.
*/
@ -82,10 +81,10 @@ index de0c545d50fd..24eb541209ef 100644
else if (rx_missed_bcon_since_rx > IWL_MVM_MISSED_BEACONS_THRESHOLD)
ieee80211_beacon_loss(vif);
diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
index 1ccb3cad7cdc..56611a1b40ee 100644
index 218f3bc31104..4f112ecdf704 100644
--- a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
+++ b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h
@@ -39,7 +39,6 @@
@@ -41,7 +41,6 @@
/* RSSI offset for WkP */
#define IWL_RSSI_OFFSET 50
#define IWL_MVM_MISSED_BEACONS_THRESHOLD 8
@ -93,6 +92,3 @@ index 1ccb3cad7cdc..56611a1b40ee 100644
/* A TimeUnit is 1024 microsecond */
#define MSEC_TO_TU(_msec) (_msec*1000/1024)
--
2.39.1

2
buildroot-external/configs/generic_aarch64_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/arm-uefi/generic-aarch64 $(BR2_EXTERNAL_HASSOS_PATH)/board/arm-uefi/generic-aarch64/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_ARCH_DEFAULT_CONFIG=y
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless-pci.config $(BR2_EXTERNAL_HASSOS_PATH)/board/arm-uefi/generic-aarch64/kernel.config"
BR2_LINUX_KERNEL_LZ4=y

2
buildroot-external/configs/generic_x86_64_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/pc/generic-x86-64 $(BR2_EXTERNAL_HASSOS_PATH)/board/pc/generic-x86-64/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless-pci.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-pci.config $(BR2_EXTERNAL_HASSOS_PATH)/board/pc/generic-x86-64/kernel.config"
BR2_LINUX_KERNEL_LZ4=y

2
buildroot-external/configs/green_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/nabucasa/green $(BR2_EXTERNAL_HASSOS_PATH)/board/nabucasa/green/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/nabucasa/kernel-rockchip.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/board/nabucasa/green/kernel.config"

2
buildroot-external/configs/khadas_vim3_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/khadas/vim3 $(BR2_EXTERNAL_HASSOS_PATH)/board/khadas/vim3/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/khadas/kernel-vim.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config"

2
buildroot-external/configs/odroid_c2_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c2/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config"

2
buildroot-external/configs/odroid_c4_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-c4/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config"

2
buildroot-external/configs/odroid_m1_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-rockchip.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-m1/kernel.config"

2
buildroot-external/configs/odroid_n2_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/kernel-amlogic.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-n2/kernel.config"

4
buildroot-external/configs/odroid_xu4_defconfig
View File

@ -18,12 +18,12 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4 $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_DEFCONFIG="exynos"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/board/hardkernel/odroid-xu4/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="exynos5422-odroidxu4"
BR2_LINUX_KERNEL_INTREE_DTS_NAME="samsung/exynos5422-odroidxu4"
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"

2
buildroot-external/configs/ova_defconfig
View File

@ -17,7 +17,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/pc/ova $(BR2_EXTERNAL_HASSOS_PATH)/board/pc/ova/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-pci.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless-pci.config $(BR2_EXTERNAL_HASSOS_PATH)/board/pc/ova/kernel.config"
BR2_LINUX_KERNEL_LZ4=y

4
buildroot-external/configs/tinker_defconfig
View File

@ -19,13 +19,13 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.1.76"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="6.6.15"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support-wireless.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rk3288-tinker rk3288-tinker-s"
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rockchip/rk3288-tinker rockchip/rk3288-tinker-s"
BR2_LINUX_KERNEL_DTB_OVERLAY_SUPPORT=y
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y

1
buildroot-external/kernel/device-support-wireless.config
View File

@ -70,4 +70,3 @@ CONFIG_RTW89=m
# Staging drivers
CONFIG_STAGING=y
CONFIG_RTL8723BS=m
CONFIG_R8188EU=m

1
buildroot-external/kernel/device-support.config
View File

@ -142,7 +142,6 @@ CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_PVRUSB2_SYSFS=y
CONFIG_VIDEO_PVRUSB2_DVB=y
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_STK1160=m
# Analog/digital capture USB devices

1
buildroot-external/kernel/hassos.config
View File

@ -114,7 +114,6 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m

35
buildroot-external/package/eq3_char_loop/0003-Fix-eq3_char_loop-driver-build-on-Linux-6.4.patch Normal file
View File

@ -0,0 +1,35 @@
From af4cac0d31d166c9ea5992e90b81973d817dd91d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= <sairon@sairon.cz>
Date: Thu, 11 Jan 2024 11:39:47 +0100
Subject: [PATCH] Fix eq3_char_loop driver build on Linux 6.4+
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Jan Čermák <sairon@sairon.cz>
---
KernelDrivers/eq3_char_loop.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/KernelDrivers/eq3_char_loop.c b/KernelDrivers/eq3_char_loop.c
index cc946fd..d01263a 100644
--- a/KernelDrivers/eq3_char_loop.c
+++ b/KernelDrivers/eq3_char_loop.c
@@ -950,7 +950,14 @@ static int __init eq3loop_init(void)
printk(KERN_ERR EQ3LOOP_DRIVER_NAME ": Unable to add driver\n");
goto out_unregister_chrdev_region;
}
+/* Linux changed signature of class_create in 6.4+
+ * see: https://lore.kernel.org/all/20230324100132.1633647-1-gregkh@linuxfoundation.org/
+*/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0)
control_data->class=class_create(THIS_MODULE, EQ3LOOP_DRIVER_NAME);
+#else
+ control_data->class=class_create(EQ3LOOP_DRIVER_NAME);
+#endif
if(IS_ERR(control_data->class)){
ret = -EIO;
printk(KERN_ERR EQ3LOOP_DRIVER_NAME ": Unable to register driver class\n");
--
2.34.1

2
buildroot-external/package/gasket/gasket.mk
View File

@ -1,4 +1,4 @@
GASKET_VERSION = 97aeba584efd18983850c36dcf7384b0185284b3
GASKET_VERSION = 09385d485812088e04a98a6e1227bf92663e0b59
GASKET_SITE = $(call github,google,gasket-driver,$(GASKET_VERSION))
GASKET_LICENSE = GPL-2.0
GASKET_LICENSE_FILES = LICENSE

2
buildroot-external/package/rtl88x2bu/rtl88x2bu.mk
View File

@ -1,4 +1,4 @@
RTL88X2BU_VERSION = 549257e6f62e8d7931e15f963aa06bb3c622ec7e
RTL88X2BU_VERSION = 476ef38727cb539d7987d0cd1da3a8842df7bc58
RTL88X2BU_SITE = $(call github,cilynx,rtl88x2bu,$(RTL88X2BU_VERSION))
RTL88X2BU_LICENSE = GPL-2.0
RTL88X2BU_LICENSE_FILES = LICENSE

12
buildroot-external/patches/linux/0001-ipv6-add-option-to-explicitly-enable-reachability-te.patch
View File

@ -1,5 +1,4 @@
From 5761ca22d64773b901f2578fad418bdefeb08b93 Mon Sep 17 00:00:00 2001
Message-ID: <5761ca22d64773b901f2578fad418bdefeb08b93.1697750485.git.stefan@agner.ch>
From 76591e4075194cf717dc085b8285912f706bcd46 Mon Sep 17 00:00:00 2001
From: Stefan Agner <stefan@agner.ch>
Date: Tue, 28 Mar 2023 12:02:10 +0200
Subject: [PATCH] ipv6: add option to explicitly enable reachability test
@ -18,7 +17,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/net/ipv6/Kconfig b/net/ipv6/Kconfig
index 658bfed1df8b..5147fd4c93ff 100644
index 08d4b7132d4c..242bf2eeb7ae 100644
--- a/net/ipv6/Kconfig
+++ b/net/ipv6/Kconfig
@@ -48,6 +48,15 @@ config IPV6_OPTIMISTIC_DAD
@ -38,10 +37,10 @@ index 658bfed1df8b..5147fd4c93ff 100644
tristate "IPv6: AH transformation"
select XFRM_AH
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 960ab43a49c4..89922091719c 100644
index 56525b5b95a2..916769b9a772 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -2210,7 +2210,8 @@ struct rt6_info *ip6_pol_route(struct net *net, struct fib6_table *table,
@@ -2211,7 +2211,8 @@ struct rt6_info *ip6_pol_route(struct net *net, struct fib6_table *table,
strict |= flags & RT6_LOOKUP_F_IFACE;
strict |= flags & RT6_LOOKUP_F_IGNORE_LINKSTATE;
@ -51,6 +50,3 @@ index 960ab43a49c4..89922091719c 100644
strict |= RT6_LOOKUP_F_REACHABLE;
rcu_read_lock();
--
2.42.0

30
buildroot-external/patches/linux/0005-wifi-mt76-mt7921u-backport-Comfast-CF-952AX-and-Netg.patch
View File

@ -1,30 +0,0 @@
From 65b2dcdb79a0bdf0f3ad432dfeb267979e2bd866 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= <sairon@sairon.cz>
Date: Mon, 4 Dec 2023 11:53:06 +0100
Subject: [PATCH] wifi: mt76: mt7921u: backport Comfast CF-952AX and Netgear
AXE3000 support
This backports support of two mt7921u WiFi cards that only use differend
USB VID/PID but should use the standard mainline driver and firmware too.
---
drivers/net/wireless/mediatek/mt76/mt7921/usb.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/usb.c b/drivers/net/wireless/mediatek/mt76/mt7921/usb.c
index 521bcd577640..67522be28c9a 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7921/usb.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/usb.c
@@ -14,6 +14,10 @@
static const struct usb_device_id mt7921u_device_table[] = {
{ USB_DEVICE_AND_INTERFACE_INFO(0x0e8d, 0x7961, 0xff, 0xff, 0xff) },
+ /* Comfast CF-952AX - e766b7fd41cad2074e43da2e88fc970a88d2c239 backport */
+ { USB_DEVICE_AND_INTERFACE_INFO(0x3574, 0x6211, 0xff, 0xff, 0xff) },
+ /* Netgear, Inc. [A8000,AXE3000] - 03eb52dd78cab08f13925aeec8315fbdbcba3253 backport */
+ { USB_DEVICE_AND_INTERFACE_INFO(0x0846, 0x9060, 0xff, 0xff, 0xff) },
{ },
};
--
2.34.1