From bb72e0ab1e89e2be60e3c411a5a82e48681b88e7 Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Sat, 19 May 2018 16:17:44 +0200
Subject: [PATCH] Create
 0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch

---
 ...HYP-vectors-at-PBL-and-Barebox-entry.patch | 89 +++++++++++++++++++
 1 file changed, 89 insertions(+)
 create mode 100644 buildroot-external/board/rpi3/patches/barebox/0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch

diff --git a/buildroot-external/board/rpi3/patches/barebox/0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch b/buildroot-external/board/rpi3/patches/barebox/0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch
new file mode 100644
index 000000000..d4adb64b6
--- /dev/null
+++ b/buildroot-external/board/rpi3/patches/barebox/0007-install-HYP-vectors-at-PBL-and-Barebox-entry.patch
@@ -0,0 +1,89 @@
+If the CPU was already in HYP mode when entering the PBL, install a
+simple trap handler to allow to get back from SVC to HYP before
+switching to HYP mode.
+
+As the vectors are part of the currently running binary, we need to
+do the same setup when starting the real Barebox binary, as the PBL
+setup vectors might get overwritten. To do this we trap into HYP mode
+just before jumping to Barebox and then re-do the vector setup and
+SVC switch as the first thing in Barebox proper.
+
+Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
+---
+ arch/arm/cpu/lowlevel.S   | 3 +++
+ arch/arm/cpu/start-pbl.c  | 3 +++
+ arch/arm/cpu/start.c      | 3 +++
+ arch/arm/cpu/uncompress.c | 4 ++++
+ 4 files changed, 13 insertions(+)
+
+diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
+index 194ce0e7c274..28ad8508726f 100644
+--- a/arch/arm/cpu/lowlevel.S
++++ b/arch/arm/cpu/lowlevel.S
+@@ -8,6 +8,9 @@ ENTRY(arm_cpu_lowlevel_init)
+ 	/* save lr, since it may be banked away with a processor mode change */
+ 	mov	r2, lr
+ 
++	/* careful: the hyp install corrupts r0 and r1 */
++	bl	__hyp_install
++
+ 	/* set the cpu to SVC32 mode, mask irq and fiq */
+ 	mrs	r12 , cpsr
+ 	eor	r12, r12, #HYP_MODE
+diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
+index e851b4a2da5e..cea1cb200b6f 100644
+--- a/arch/arm/cpu/start-pbl.c
++++ b/arch/arm/cpu/start-pbl.c
+@@ -100,5 +100,8 @@ __noreturn void barebox_single_pbl_start(unsigned long membase,
+ 	else
+ 		barebox = (void *)barebox_base;
+ 
++	if (__boot_cpu_mode == HYP_MODE)
++		armv7_switch_to_hyp();
++
+ 	barebox(membase, memsize, boarddata);
+ }
+diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
+index 171e6ad0eb7a..a0db6436f387 100644
+--- a/arch/arm/cpu/start.c
++++ b/arch/arm/cpu/start.c
+@@ -24,6 +24,7 @@
+ #include <asm/barebox-arm-head.h>
+ #include <asm-generic/memory_layout.h>
+ #include <asm/sections.h>
++#include <asm/secure.h>
+ #include <asm/unaligned.h>
+ #include <asm/cache.h>
+ #include <memory.h>
+@@ -145,6 +146,8 @@ __noreturn void barebox_non_pbl_start(unsigned long membase,
+ 	unsigned long malloc_start, malloc_end;
+ 	unsigned long barebox_size = barebox_image_size + MAX_BSS_SIZE;
+ 
++	armv7_hyp_install();
++
+ 	if (IS_ENABLED(CONFIG_RELOCATABLE)) {
+ 		unsigned long barebox_base = arm_mem_barebox_image(membase,
+ 								   endmem,
+diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c
+index 9d7fe0e921a9..28636aa8101f 100644
+--- a/arch/arm/cpu/uncompress.c
++++ b/arch/arm/cpu/uncompress.c
+@@ -27,6 +27,7 @@
+ #include <asm/barebox-arm-head.h>
+ #include <asm-generic/memory_layout.h>
+ #include <asm/sections.h>
++#include <asm/secure.h>
+ #include <asm/pgtable.h>
+ #include <asm/cache.h>
+ #include <asm/unaligned.h>
+@@ -109,5 +110,8 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase,
+ 
+ 	pr_debug("jumping to uncompressed image at 0x%p\n", barebox);
+ 
++	if (__boot_cpu_mode == HYP_MODE)
++		armv7_switch_to_hyp();
++
+ 	barebox(membase, memsize, boarddata);
+ }
+-- 
+2.15.1