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Tinker linux5.4 (#632)

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* Migrate Tinker to linux 5.4

* Update bootloader
This commit is contained in:
Pascal Vizeli 2020-04-24 15:12:57 +02:00 committed by GitHub
parent 98f13d9282
commit c017b43456
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
89 changed files with 1490 additions and 402404 deletions
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9
buildroot-external/board/asus/hassos-hook.sh
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@ -12,14 +12,15 @@ function hassos_pre_image() {
echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"
# Create boot binary
rm -f "${BINARIES_DIR}/u-boot-spl-dtb.img"
mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-spl-dtb.bin" "${BINARIES_DIR}/u-boot-spl-dtb.img"
cat "${BINARIES_DIR}/u-boot-dtb.bin" >> "${BINARIES_DIR}/u-boot-spl-dtb.img"
rm -f "${BINARIES_DIR}/idbloader.img"
mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-tpl.bin" "${BINARIES_DIR}/idbloader.img"
cat "${BINARIES_DIR}/u-boot-spl.bin" >> "${BINARIES_DIR}/idbloader.img"
# SPL
create_spl_image
dd if="${BINARIES_DIR}/u-boot-spl-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/u-boot-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=12288
}

82447
buildroot-external/board/asus/tinker/patches/linux/0000-mali-r19p0-01rel0.patch
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File diff suppressed because it is too large Load Diff

122
buildroot-external/board/asus/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch
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@ -1,122 +0,0 @@
From 7ba71967a2678e119bcd819ac92d08bd038e1879 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 18:34:33 +0000
Subject: [PATCH 5/5] Mali midgard r19p0 fixes for 4.13 kernels
Mostly due to DMA structure members renamed, and some signatures
modifications done during the development of Linux 4.11.
* mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf
11bac80004499ea59f361ef2a5516c84b6eab675
v4.11-rc1
* sched/headers: Move task->mm handling methods to <linux/sched/mm.h>
68e21be2916b359fd8afb536c1911dc014cfd03e
v4.11-rc1
* sched/headers: Move task-stack related APIs from <linux/sched.h> to
<linux/sched/task_stack.h>
f3ac60671954c8d413532627b1be13a76f394c49
v4.11-rc1
* dma-fence: Introduce drm_fence_set_error() helper
a009e975da5c7d42a7f5eaadc54946eb5f76c9af
v4.11-rc1
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase.h | 4 ++++
drivers/gpu/arm/midgard/mali_kbase_fence.h | 4 ++++
drivers/gpu/arm/midgard/mali_kbase_mem_linux.c | 6 ++++++
drivers/gpu/arm/midgard/mali_kbase_sync_file.c | 12 ++++++++++++
4 files changed, 26 insertions(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
index d77f186..5ee47c4 100644
--- a/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/drivers/gpu/arm/midgard/mali_kbase.h
@@ -35,6 +35,10 @@
#include <linux/mutex.h>
#include <linux/rwsem.h>
#include <linux/sched.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
+#include <linux/sched/task_stack.h>
+#include <linux/sched/mm.h>
+#endif
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/vmalloc.h>
diff --git a/drivers/gpu/arm/midgard/mali_kbase_fence.h b/drivers/gpu/arm/midgard/mali_kbase_fence.h
index 8d39299..3c2e3a9 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_fence.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_fence.h
@@ -134,7 +134,11 @@ static inline bool kbase_fence_out_is_ours(struct kbase_jd_atom *katom)
static inline int kbase_fence_out_signal(struct kbase_jd_atom *katom,
int status)
{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
katom->dma_fence.fence->status = status;
+#else
+ katom->dma_fence.fence->error = status;
+#endif
return dma_fence_signal(katom->dma_fence.fence);
}
diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
index b1f2c46..896aa35 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
@@ -1788,8 +1788,14 @@ static void kbase_cpu_vm_close(struct vm_area_struct *vma)
KBASE_EXPORT_TEST_API(kbase_cpu_vm_close);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
static int kbase_cpu_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
+#else
+static int kbase_cpu_vm_fault(struct vm_fault *vmf)
+{
+ struct vm_area_struct *vma = vmf->vma;
+#endif
struct kbase_cpu_mapping *map = vma->vm_private_data;
pgoff_t rel_pgoff;
size_t i;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
index 4e1621c..d84a54e 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
@@ -161,8 +161,13 @@ static void kbase_fence_wait_callback(struct dma_fence *fence,
struct kbase_context *kctx = katom->kctx;
/* Cancel atom if fence is erroneous */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
if (dma_fence_is_signaled(kcb->fence) && kcb->fence->status < 0)
katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
+#else
+ if (dma_fence_is_signaled(kcb->fence) && kcb->fence->error < 0)
+ katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
+#endif
if (kbase_fence_dep_count_dec_and_test(katom)) {
/* We take responsibility of handling this */
@@ -273,10 +278,17 @@ static void kbase_sync_fence_info_get(struct dma_fence *fence,
* 1 : signaled
*/
if (dma_fence_is_signaled(fence)) {
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
if (fence->status < 0)
info->status = fence->status; /* signaled with error */
else
info->status = 1; /* signaled with success */
+#else
+ if (fence->error < 0)
+ info->status = fence->error; /* signaled with error */
+ else
+ info->status = 1; /* signaled with success */
+#endif
} else {
info->status = 0; /* still active (unsignaled) */
}
--
2.10.2

36
buildroot-external/board/asus/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch
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@ -1,36 +0,0 @@
From f76c9c58669a3bba0456191431be558ab8054f50 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 11:43:00 +0000
Subject: [PATCH 3/5] Using the new header on 4.12 kernels for copy_*_user
These changes are due to :
* generic ...copy_..._user primitives
d597580d373774b1bdab84b3d26ff0b55162b916
Version : 4.12-rc1
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/ump/src/linux/ump_kernel_linux.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/base/ump/src/linux/ump_kernel_linux.c b/drivers/base/ump/src/linux/ump_kernel_linux.c
index d6c3c53..bb3a7f0 100644
--- a/drivers/base/ump/src/linux/ump_kernel_linux.c
+++ b/drivers/base/ump/src/linux/ump_kernel_linux.c
@@ -20,7 +20,12 @@
#include <linux/ump-ioctl.h>
#include <linux/ump.h>
-#include <asm/uaccess.h> /* copy_*_user */
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)
+#include <asm/uaccess.h> /* copy_*_user */
+#else
+#include <linux/uaccess.h> /* copy_*_user */
+#endif
#include <linux/compat.h>
#include <linux/module.h> /* kernel module definitions */
#include <linux/fs.h> /* file system operations */
--
2.10.2

46
buildroot-external/board/asus/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch
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@ -1,46 +0,0 @@
From 63c110cdebc2c692964e1250c6f74f9e8c47c85d Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Tue, 10 Jan 2017 04:28:48 +0000
Subject: [PATCH 4/5] Adapt get_user_pages calls to use the new calling
procedure
These changes are due to this commit:
mm: replace get_user_pages_remote() write/force parameters with gup_flags
9beae1ea89305a9667ceaab6d0bf46a045ad71e7
Kernel: 4.9.0-rc
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/ump/src/linux/ump_kernel_linux_mem.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
index 9186dd0..def4c0e 100644
--- a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
+++ b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
@@ -35,6 +35,10 @@
#include <ump_arch.h>
#include <common/ump_kernel_priv.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0))
+#include <linux/pfn_t.h>
+#endif
+
static void umpp_vm_close(struct vm_area_struct *vma)
{
umpp_cpu_mapping * mapping;
@@ -222,7 +226,11 @@ int umpp_linux_mmap(struct file * filp, struct vm_area_struct * vma)
paddr = alloc->block_array[block_idx].addr;
}
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,0))
err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), paddr >> PAGE_SHIFT);
+#else
+ err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), __pfn_to_pfn_t(paddr >> PAGE_SHIFT, PFN_DEV));
+#endif
paddr += PAGE_SIZE;
}
--
2.10.2

40
buildroot-external/board/asus/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch
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@ -1,40 +0,0 @@
From 7c27055687c595e9f9eca484314f4fe3866a4260 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Tue, 18 Jul 2017 17:35:16 +0000
Subject: [PATCH 2/2] Don't be TOO severe when looking for the IRQ names
Using strncmp with an all caps result in the driver being unable to
initialize itself when using the mainlined RK3288 DTS files, since they
define the IRQ names as "job", "mmu" and "gpu" instead of "JOB", "MMU"
and "GPU".
strncmp calls have been replaced by strncasecmp calls in order to
avoid such issue.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 0cccb0b..9cc65d2 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -938,11 +938,11 @@ static int assign_irqs(struct platform_device *pdev)
}
#ifdef CONFIG_OF
- if (!strncmp(irq_res->name, "JOB", 4)) {
+ if (!strncasecmp(irq_res->name, "JOB", 4)) {
irqtag = JOB_IRQ_TAG;
- } else if (!strncmp(irq_res->name, "MMU", 4)) {
+ } else if (!strncasecmp(irq_res->name, "MMU", 4)) {
irqtag = MMU_IRQ_TAG;
- } else if (!strncmp(irq_res->name, "GPU", 4)) {
+ } else if (!strncasecmp(irq_res->name, "GPU", 4)) {
irqtag = GPU_IRQ_TAG;
} else {
dev_err(&pdev->dev, "Invalid irq res name: '%s'\n",
--
2.10.2

42
buildroot-external/board/asus/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch
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@ -1,42 +0,0 @@
From ef7689887c31d2b1336e14f2c089185e8f60a9f1 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 7 Aug 2017 19:22:39 +0000
Subject: [PATCH] Added the new "compatible" list, mainly used by Rockchip
Because, you know, all the Mali Midgard GPU used to define the GPU
using the 'compatible = "arm,mali-midgard"' property, which worked fine.
But it was removed.
They replaced the "arm,mali-midgard" node by "arm,mali-tXXX" where XXX
is the GPU series, and added "arm,rk3288-mali" which is used by nothing.
Which broke the Mali Midgard GPL kernel driver.
This patch fixes this issue.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 27dcd9c1..cc4932a4 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -4742,6 +4742,12 @@ static const struct dev_pm_ops kbase_pm_ops = {
static const struct of_device_id kbase_dt_ids[] = {
{ .compatible = "arm,malit6xx" },
{ .compatible = "arm,mali-midgard" },
+ { .compatible = "arm,mali-t720" },
+ { .compatible = "arm,mali-t760" },
+ { .compatible = "arm,mali-t820" },
+ { .compatible = "arm,mali-t830" },
+ { .compatible = "arm,mali-t860" },
+ { .compatible = "arm,mali-t880" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, kbase_dt_ids);
--
2.13.0

98
buildroot-external/board/asus/tinker/patches/linux/0006-gpu-arm-Midgard-setup_timer-timer_setup.patch
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@ -1,98 +0,0 @@
From ee7f0a678fff8316ec0be973f1b3780a63f50942 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 11 Dec 2017 21:04:56 +0100
Subject: [PATCH] gpu: arm: Midgard: setup_timer() -> timer_setup()
This patch is due the changes provoked by series of commit ending
at 513ae785c63c30741e46f43960213d4ae5382ec0, and removing the
setup_timer macros.
The previous patches replaced made sure that timers were all set
up with setup_timer and replaced setup_timer calls by timer_setup
calls.
This changed was introduced in the 4.15-rc1.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase.h | 2 +-
drivers/gpu/arm/midgard/mali_kbase_context.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_softjobs.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_tlstream.c | 6 ++----
4 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
index a4ceab9e0..27bde3b71 100644
--- a/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/drivers/gpu/arm/midgard/mali_kbase.h
@@ -213,7 +213,7 @@ int kbase_soft_event_update(struct kbase_context *kctx,
bool kbase_replay_process(struct kbase_jd_atom *katom);
-void kbasep_soft_job_timeout_worker(unsigned long data);
+void kbasep_soft_job_timeout_worker(struct timer_list *t);
void kbasep_complete_triggered_soft_events(struct kbase_context *kctx, u64 evt);
/* api used internally for register access. Contains validation and tracing */
diff --git a/drivers/gpu/arm/midgard/mali_kbase_context.c b/drivers/gpu/arm/midgard/mali_kbase_context.c
index f43db48fd..589df768c 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_context.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_context.c
@@ -165,9 +165,9 @@ kbase_create_context(struct kbase_device *kbdev, bool is_compat)
mutex_init(&kctx->vinstr_cli_lock);
- setup_timer(&kctx->soft_job_timeout,
+ timer_setup(&kctx->soft_job_timeout,
kbasep_soft_job_timeout_worker,
- (uintptr_t)kctx);
+ 0);
return kctx;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
index 127ada07f..019edf562 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
@@ -370,9 +370,9 @@ static void kbase_fence_debug_timeout(struct kbase_jd_atom *katom)
}
#endif /* CONFIG_MALI_FENCE_DEBUG */
-void kbasep_soft_job_timeout_worker(unsigned long data)
+void kbasep_soft_job_timeout_worker(struct timer_list *t)
{
- struct kbase_context *kctx = (struct kbase_context *)data;
+ struct kbase_context *kctx = from_timer(kctx, t, soft_job_timeout);
u32 timeout_ms = (u32)atomic_read(
&kctx->kbdev->js_data.soft_job_timeout_ms);
struct timer_list *timer = &kctx->soft_job_timeout;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
index d01aa23b2..11d8b59c7 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
@@ -1042,13 +1042,11 @@ static void kbasep_tlstream_flush_stream(enum tl_stream_type stype)
* Timer is executed periodically to check if any of the stream contains
* buffer ready to be submitted to user space.
*/
-static void kbasep_tlstream_autoflush_timer_callback(unsigned long data)
+static void kbasep_tlstream_autoflush_timer_callback(struct timer_list *unused)
{
enum tl_stream_type stype;
int rcode;
- CSTD_UNUSED(data);
-
for (stype = 0; stype < TL_STREAM_TYPE_COUNT; stype++) {
struct tl_stream *stream = tl_stream[stype];
unsigned long flags;
@@ -1371,7 +1369,7 @@ int kbase_tlstream_init(void)
/* Initialize autoflush timer. */
atomic_set(&autoflush_timer_active, 0);
- setup_timer(&autoflush_timer,
+ timer_setup(&autoflush_timer,
kbasep_tlstream_autoflush_timer_callback,
0);
--
2.14.1

35
buildroot-external/board/asus/tinker/patches/linux/0007-drivers-gpu-Arm-Midgard-Replace-ACCESS_ONCE-by-READ_.patch
View File

@ -1,35 +0,0 @@
From 44a5ba2e969adfb64c84f294c16490194988dcc7 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 24 Dec 2017 19:30:12 +0100
Subject: [PATCH] drivers: gpu: Arm: Midgard: Replace ACCESS_ONCE by READ_ONCE
The ACCESS_ONCE macro has now been removed in the 4.15.0-rc4,
and every ACCESS_ONCE call has been replaced by either READ_ONCE or
WRITE_ONCE calls.
Since the Midgard GPU drivers are not mainlined, the change
needs to be applied manually.
See commit b899a850431e2dd0943205a63a68573f3e312d0d and its parents,
for more informations.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_mem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem.h b/drivers/gpu/arm/midgard/mali_kbase_mem.h
index e9a8d5dd6..eac685699 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_mem.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_mem.h
@@ -591,7 +591,7 @@ void kbase_mem_pool_free_pages(struct kbase_mem_pool *pool, size_t nr_pages,
*/
static inline size_t kbase_mem_pool_size(struct kbase_mem_pool *pool)
{
- return ACCESS_ONCE(pool->cur_size);
+ return READ_ONCE(pool->cur_size);
}
/**
--
2.14.1

32
buildroot-external/board/asus/tinker/patches/linux/0008-gpu-arm-midgard-Remove-sys_close-references.patch
View File

@ -1,32 +0,0 @@
From 47e8aad9419ff8843a373c3e5aa2c9d261d8cd07 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 23 Apr 2018 20:54:13 +0200
Subject: [PATCH] gpu: arm: midgard: Remove sys_close references
sys_close is now replaced by ksys_close in an effort to remove
in-kernel system calls references.
See 2ca2a09d6215fd9621aa3e2db7cc9428a61f2911 and
https://lkml.org/lkml/2018/3/25/93 for more details.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_sync.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync.h b/drivers/gpu/arm/midgard/mali_kbase_sync.h
index de72147d..33b58059 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_sync.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_sync.h
@@ -156,7 +156,7 @@ void kbase_sync_fence_out_remove(struct kbase_jd_atom *katom);
*/
static inline void kbase_sync_fence_close_fd(int fd)
{
- sys_close(fd);
+ ksys_close(fd);
}
/**
--
2.14.1

34
buildroot-external/board/asus/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch
View File

@ -1,34 +0,0 @@
From 9812105eb6220863af05fc72591118f0a48e1c4e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 21 May 2018 22:32:59 +0200
Subject: [PATCH] GPU: ARM: Midgard: Adapt to the new mmap call checks.
Now, I don't know if this driver is just one of these "buggy" drivers
Linus is talking about, or if this is just standard GPU procedure.
Anyway, this patch is due to this change by Linus Torvalds :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=be83bbf806822b1b89e0a0f23cd87cddc409e429
And the fix is inspired by :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76ef6b28ea4f81c3d511866a9b31392caa833126
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index cc4932a4ead7..89b4cca27cf1 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -1087,6 +1087,7 @@ static int kbase_open(struct inode *inode, struct file *filp)
init_waitqueue_head(&kctx->event_queue);
filp->private_data = kctx;
+ filp->f_mode |= FMODE_UNSIGNED_OFFSET;
kctx->filp = filp;
if (kbdev->infinite_cache_active_default)
--
2.17.0

76
buildroot-external/board/asus/tinker/patches/linux/0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch
View File

@ -1,76 +0,0 @@
From 9bf91a052d8ceddfd5808547a51e167fb7463754 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Wed, 18 Jul 2018 19:59:21 +0200
Subject: [PATCH] GPU: Mali: Midgard: remove rcu_read_lock references
This patch is actually based on @mihailescu2m patch.
This removes references to rcu_read_lock when acquiring the OPP table,
as it is useless since.
See :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/base/power/opp/core.c?id=5b650b388844f26c61c70564865598836d05dcb3
The current rcu_read_lock actually generates some issues with recent
kernels.
See here :
https://community.arm.com/graphics/f/discussions/9207/midgard-r20p0-kernel-drivers-errors
The patch has been recreated since it does not apply directly on r19p0
sources (I guess the affected line numbers slightly differ...).
@mihailescu2m patch for the Mali Midgard r20p0 kernel driver can be
acquired here :
https://github.com/mihailescu2m/linux/commit/bbe73c3c1143e5991bdcaee3afaecf5c31af0647
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
index e280322e..bf69d897 100644
--- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
@@ -87,10 +87,9 @@ kbase_devfreq_target(struct device *dev, unsigned long *target_freq, u32 flags)
freq = *target_freq;
- rcu_read_lock();
opp = devfreq_recommended_opp(dev, &freq, flags);
voltage = dev_pm_opp_get_voltage(opp);
- rcu_read_unlock();
+
if (IS_ERR_OR_NULL(opp)) {
dev_err(dev, "Failed to get opp (%ld)\n", PTR_ERR(opp));
return PTR_ERR(opp);
@@ -186,20 +185,17 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
unsigned long freq;
struct dev_pm_opp *opp;
- rcu_read_lock();
count = dev_pm_opp_get_opp_count(kbdev->dev);
if (count < 0) {
rcu_read_unlock();
return count;
}
- rcu_read_unlock();
dp->freq_table = kmalloc_array(count, sizeof(dp->freq_table[0]),
GFP_KERNEL);
if (!dp->freq_table)
return -ENOMEM;
- rcu_read_lock();
for (i = 0, freq = ULONG_MAX; i < count; i++, freq--) {
opp = dev_pm_opp_find_freq_floor(kbdev->dev, &freq);
if (IS_ERR(opp))
@@ -207,7 +203,6 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
dp->freq_table[i] = freq;
}
- rcu_read_unlock();
if (count != i)
dev_warn(kbdev->dev, "Unable to enumerate all OPPs (%d!=%d\n",
--
2.16.4

2
buildroot-external/board/asus/tinker/patches/linux/1-2-regulator-act8865-add-restart-handler-for-act8846.patch
View File

@ -9,9 +9,9 @@ index 2ff73d7..836d10b 100644
--- a/drivers/regulator/act8865-regulator.c
+++ b/drivers/regulator/act8865-regulator.c
@@ -27,6 +27,7 @@
#include <linux/of_device.h>
#include <linux/regulator/of_regulator.h>
#include <linux/regmap.h>
#include <dt-bindings/regulator/active-semi,8865-regulator.h>
+#include <linux/reboot.h>
/*

39
buildroot-external/board/asus/tinker/patches/linux/1001-drivers-Integrating-Mali-Midgard-video-and-gpu-drive.patch
View File

@ -1,39 +0,0 @@
From fe85565d9ed8212cbda2148d4731418a36a8d088 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 11 Dec 2017 21:53:28 +0100
Subject: [PATCH 1/3] drivers: Integrating Mali Midgard video and gpu drivers.
I'm dropping the UMP drivers. They are not maintained.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/Makefile | 2 +-
drivers/video/Kconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index e9ed439a5..66386b42a 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -2,5 +2,5 @@
# taken to initialize them in the correct order. Link order is the only way
# to ensure this currently.
obj-$(CONFIG_TEGRA_HOST1X) += host1x/
-obj-y += drm/ vga/
+obj-y += drm/ vga/ arm/
obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af999..041e15f2c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
source "drivers/gpu/host1x/Kconfig"
source "drivers/gpu/ipu-v3/Kconfig"
+source "drivers/gpu/arm/midgard/Kconfig"
source "drivers/gpu/drm/Kconfig"
--
2.14.1

0
buildroot-external/board/asus/tinker/patches/linux/2001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch → buildroot-external/board/asus/tinker/patches/linux/1001-dts-rk3288-miqi-Enabling-the-Mali-GPU-node.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch → buildroot-external/board/asus/tinker/patches/linux/1002-ARM-dts-rockchip-fix-the-regulator-s-voltage-range-o.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch → buildroot-external/board/asus/tinker/patches/linux/1003-ARM-dts-rockchip-add-the-MiQi-board-s-fan-definition.patch
View File

30
buildroot-external/board/asus/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch
View File

@ -1,30 +0,0 @@
From 239a5e3016b7f676bc3f56ea509ed172bf954001 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sat, 22 Jul 2017 04:07:36 +0000
Subject: [PATCH] Remove the dependency to the clk_mali symbol.
Inspired by @wzzy2 patch
https://github.com/rockchip-linux/rockchip_forwardports/commit/359865c617129fe5fcc5530f4a88abcfaa6a5cb4
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 9cc65d2..27dcd9c 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -3793,7 +3793,7 @@ static int power_control_init(struct platform_device *pdev)
}
#endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
- kbdev->clock = clk_get(kbdev->dev, "clk_mali");
+ kbdev->clock = of_clk_get(kbdev->dev->of_node, 0);
if (IS_ERR_OR_NULL(kbdev->clock)) {
err = PTR_ERR(kbdev->clock);
kbdev->clock = NULL;
--
2.10.2

157
buildroot-external/board/asus/tinker/patches/linux/1005-ASUS-Tinkerboard-Stupid-reboot.patch
View File

@ -1,157 +0,0 @@
From bf9b932f6ae506baf5b79c8407089448ed77fc56 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 17 Dec 2017 16:15:03 +0100
Subject: [PATCH] ASUS Tinkerboard: Stupid reboot patch
This patch is ugly as shit and will be reworked when possible.
Meanwhile, this fixes an issue with the ASUS Tinkerboard which
cannot reboot correctly. The issue is that the MMC hardware is
shutdown during the reboot phase and is not powered again after
the power cycle, leading to a dead board awaiting a hard power
cycle.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 28 ++++++++++++++++++++++++++++
include/linux/reboot.h | 2 ++
kernel/reboot.c | 1 +
4 files changed, 55 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index a3f1c2b30..52c13733f 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -14,10 +14,12 @@
#include <linux/of_address.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h> // Stupid Tinkerboard Hack
#include <linux/slab.h>
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
+#include "../core/core.h" // Stupid Tinkerboard Hack
#define RK3288_CLKGEN_DIV 2
@@ -365,6 +367,27 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
return 0;
}
+/* Stupid Tinkerboard Hack */
+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
+{
+ struct dw_mci *host = platform_get_drvdata(pdev);
+ struct mmc_host *mmc = host->slot->mmc;
+ int ret;
+
+ if(of_machine_is_compatible("asus,rk3288-tinker")){
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ ret = regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+ }
+}
+
static int dw_mci_rockchip_remove(struct platform_device *pdev)
{
pm_runtime_get_sync(&pdev->dev);
@@ -385,6 +408,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
static struct platform_driver dw_mci_rockchip_pltfm_driver = {
.probe = dw_mci_rockchip_probe,
.remove = dw_mci_rockchip_remove,
+ .shutdown = dw_mci_rockchip_platfm_shutdown, // Stupid Tinkerboard Hack
.driver = {
.name = "dwmmc_rockchip",
.of_match_table = dw_mci_rockchip_match,
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 0aa39975f..70f7ce21b 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -39,8 +39,10 @@
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/mmc/slot-gpio.h>
+#include <linux/reboot.h> // Stupid Tinkerboard Hack
#include "dw_mmc.h"
+#include "../core/core.h" // Stupid Tinkerboard Hack
/* Common flag combinations */
#define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
@@ -2778,6 +2780,29 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+/* Stupid Tinkerboard Hack */
+struct dw_mci *mSdhost;
+void setmmcEmergency() {
+ struct mmc_host *mmc;
+ int ret;
+
+ printk(KERN_ERR "Emergency route taken.\n");
+ if (of_machine_is_compatible("asus,rk3288-tinker")) {
+ mmc = mSdhost->slot->mmc;
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ ret = regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+ }
+}
+EXPORT_SYMBOL(setmmcEmergency);
+
static int dw_mci_init_slot(struct dw_mci *host)
{
struct mmc_host *mmc;
@@ -2809,6 +2834,9 @@ static int dw_mci_init_slot(struct dw_mci *host)
mmc->f_max = freq[1];
}
+ /* Stupid Tinkerboard Hack */
+ if (of_find_property(host->dev->of_node, "supports-sd", NULL))
+ mSdhost = host;
/*if there are external regulators, get them*/
ret = mmc_regulator_get_supply(mmc);
if (ret)
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index e63799a6e..057d3ce0c 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -77,6 +77,8 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
extern void orderly_poweroff(bool force);
extern void orderly_reboot(void);
+/* Stupid Tinkerboard Hack */
+extern void setmmcEmergency(void);
/*
* Emergency restart, callable from an interrupt handler.
diff --git a/kernel/reboot.c b/kernel/reboot.c
index e4ced883d..c8e678ce6 100644
--- a/kernel/reboot.c
+++ b/kernel/reboot.c
@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
void emergency_restart(void)
{
kmsg_dump(KMSG_DUMP_EMERG);
+ setmmcEmergency(); // Stupid Tinkerboard Hack
machine_emergency_restart();
}
EXPORT_SYMBOL_GPL(emergency_restart);
--
2.14.1

0
buildroot-external/board/asus/tinker/patches/linux/2007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch → buildroot-external/board/asus/tinker/patches/linux/1007-RK3288-DTSI-rk3288-Add-missing-SPI2-pinctrl.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2010-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch → buildroot-external/board/asus/tinker/patches/linux/1010-ARM-DTSI-rk3288-Adding-missing-EDP-power-domain.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2011-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch → buildroot-external/board/asus/tinker/patches/linux/1011-ARM-DTSI-rk3288-Adding-missing-VOPB-registers.patch
View File

0
buildroot-external/board/asus/tinker/patches/linux/2012-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch → buildroot-external/board/asus/tinker/patches/linux/1012-ARM-DTSI-rk3288-Fixed-the-SPDIF-node-address.patch
View File

98
buildroot-external/board/asus/tinker/patches/linux/1013-ARM-DTS-rk3288-tinker-Enabling-SDIO-and-Wifi.patch Normal file
View File

@ -0,0 +1,98 @@
From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 21:58:56 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
Adding the appropriate nodes in order to exploit the WiFi capabilities
of the board.
Since these capabilities are provided through SDIO, and the SDIO
nodes were not defined, these were added too.
These seems to depend on each other so they are added in one big
patch.
Split if necessary.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 1e43527aa..d4df13bed 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -6,8 +6,70 @@
/dts-v1/;
#include "rk3288-tinker.dtsi"
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
model = "Rockchip RK3288 Asus Tinker Board";
compatible = "asus,rk3288-tinker", "rockchip,rk3288";
+
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ sdio_vref = <1800>;
+ status = "okay";
+ wifi_chip_type = "8723bs";
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&io_domains {
+ wifi-supply = <&vcc_18>;
+};
+
+&pinctrl {
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+ supports-sdio;
};
--
2.16.4

62
buildroot-external/board/asus/tinker/patches/linux/1014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch Normal file
View File

@ -0,0 +1,62 @@
From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:03:26 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
The most essential being the RTS pin, which is clearly needed to
upload the initial configuration into the Realtek Bluetooth
chip, and make the Bluetooth chip work.
Now, the Bluetooth chip also needs 3 other GPIOS to be enabled.
I'll see how I do that through the DTS file in a near future.
The 3 GPIOS being :
Bluetooth Reset : <&gpio4 29 GPIO_ACTIVE_HIGH>
Bluetooth Wake : <&gpio4 26 GPIO_ACTIVE_HIGH>
Bluetooth Wake_Host_IRQ : <&gpio4 31 GPIO_ACTIVE_HIGH>
These are currently setup manually, through scripts. But it seems that
GPIO handling through /sys entries might not be possible in the long
term, the replacement being libgpio.
Anyway, if you're interesting in enabling the Bluetooth GPIO by hand,
here are the commands :
cd /sys/class/gpio &&
echo 146 > export &&
echo 149 > export &&
echo 151 > export &&
echo high > gpio146/direction &&
echo high > gpio149/direction &&
echo high > gpio151/direction
Resetting the chip is done like this :
echo "Resetting the Bluetooth chip"
cd /sys/class/gpio/gpio149 &&
echo 0 > value &&
sleep 1 &&
echo 1 > value &&
sleep 1
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index d4df13bed..b92e59c1e 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -73,3 +73,9 @@
status = "okay";
supports-sdio;
};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+};
+
--
2.16.4

28
buildroot-external/board/asus/tinker/patches/linux/1015-ARM-DTSI-rk3288-tinker-Improving-the-CPU-max-voltage.patch Normal file
View File

@ -0,0 +1,28 @@
From ebc29962ac27264772a4227f5abd6900cb72fa79 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:16:05 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index aa107ee41..3da1c830f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -164,7 +164,7 @@
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-max-microvolt = <1450000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.16.4

31
buildroot-external/board/asus/tinker/patches/linux/1016-ARM-DTSI-rk3288-tinker-Setting-up-the-SD-regulators.patch Normal file
View File

@ -0,0 +1,31 @@
From 3dacea70a8e434008f5b1f119a7f7da9aebc772c Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:18:58 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Setting up the SD regulators
Some are needed and some are not. Playing with these parameters is
required to get reboot working on these boards.
I still can't believe that these boards can't soft reset correctly.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 3da1c830f..dd1090728 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -254,7 +254,8 @@
};
vccio_sd: LDO_REG5 {
+ regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
--
2.16.4

53
buildroot-external/board/asus/tinker/patches/linux/1017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch Normal file
View File

@ -0,0 +1,53 @@
From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:11:24 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
And all the hardware behind.
Taken from @TonyMac32, Butchered by @Miouyouyou .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index b92e59c1e..96d05fc6b 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -40,6 +40,31 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0 0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
&io_domains {
wifi-supply = <&vcc_18>;
};
--
2.16.4

50
buildroot-external/board/asus/tinker/patches/linux/1018-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch Normal file
View File

@ -0,0 +1,50 @@
From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 96d05fc6b..17bfea298 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -99,6 +99,25 @@
supports-sdio;
};
+&spi2 {
+ max-freq = <50000000>;
+ status = "okay";
+
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
--
2.16.4

33
buildroot-external/board/asus/tinker/patches/linux/1019-ARM-DTSI-rk3288-tinker-Defining-SDMMC-properties.patch Normal file
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@ -0,0 +1,33 @@
From 487db7cefc9861fdaf30579c378a98f0360690ae Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:27:14 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Defining SDMMC properties
I never knew if these properties were required to fix the dreaded
reboot issue...
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index dd1090728..8edd6f681 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -436,7 +436,12 @@
disable-wp; /* wp not hooked up */
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
status = "okay";
+ supports-sd;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};
--
2.16.4

8
buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch → buildroot-external/board/asus/tinker/patches/linux/1020-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch
View File

@ -35,14 +35,6 @@ diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 45ec4e89..46e1b8e2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1230,6 +1230,7 @@
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3288_PD_VIDEO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -1262,6 +1263,7 @@
interrupt-names = "hevc_mmu";
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;

46
buildroot-external/board/asus/tinker/patches/linux/1023-dts-rk3288-support-for-dedicating-npll-to-a-vop.patch Normal file
View File

@ -0,0 +1,46 @@
From 4ab4f88649468dada5d609e1a6f8a71a7d5610c9 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 02:48:59 +0200
Subject: [PATCH 4/6] dts: rk3288: support for dedicating npll to a vop
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
https://www.spinics.net/lists/arm-kernel/msg673156.html
The original description was :
Add the VOP DCLKs to the assigned clocks list so their
parents can be set in the dts include files for
devices that do dedicate npll to a vop.
https://www.spinics.net/lists/arm-kernel/msg673162.html
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d23c7fa55..ff04aab5e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -867,12 +867,14 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
- assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
+ <&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>, <&cru ACLK_CPU>,
<&cru HCLK_CPU>, <&cru PCLK_CPU>,
<&cru ACLK_PERI>, <&cru HCLK_PERI>,
<&cru PCLK_PERI>;
- assigned-clock-rates = <594000000>, <400000000>,
+ assigned-clock-rates = <0>, <0>,
+ <594000000>, <400000000>,
<500000000>, <300000000>,
<150000000>, <75000000>,
<300000000>, <150000000>,
--
2.16.4

32
buildroot-external/board/asus/tinker/patches/linux/1024-arm-dts-veyron-Added-a-flag-to-disable-cache-flush-d.patch Normal file
View File

@ -0,0 +1,32 @@
From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Thu, 1 Nov 2018 21:31:26 +0100
Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
during reset
Flushing the MMC cache of ASUS Chromebooks during initialization or
"recovery" generates 10 minutes hangup, according to @SolidHal.
This is an adaptation of @SolidHal, in order to pinpoint the fix to
Veyron Chromebooks, and avoiding issues other RK3288 boards.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2075120cf..fa4951fd7 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -123,6 +123,7 @@
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
+ no-recovery-cache-flush;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
};
--
2.16.4

63
buildroot-external/board/asus/tinker/patches/linux/1100-media-Add-JPEG_RAW-format.patch
View File

@ -1,63 +0,0 @@
From 1680a655127a62e74cbcfb84782e04a9c55dcf81 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 5 Sep 2018 19:00:09 -0300
Subject: [PATCH 3/6] media: Add JPEG_RAW format
Add V4L2_PIX_FMT_JPEG_RAW format that does not contain
JPEG header in the output frame.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/media/uapi/v4l/pixfmt-compressed.rst | 9 +++++++++
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
include/uapi/linux/videodev2.h | 1 +
3 files changed, 11 insertions(+)
diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
index d382e7a5..4dffe400 100644
--- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
@@ -23,6 +23,15 @@ Compressed Formats
- 'JPEG'
- TBD. See also :ref:`VIDIOC_G_JPEGCOMP <VIDIOC_G_JPEGCOMP>`,
:ref:`VIDIOC_S_JPEGCOMP <VIDIOC_G_JPEGCOMP>`.
+ * .. _V4L2-PIX-FMT-JPEG-RAW:
+
+ - ``V4L2_PIX_FMT_JPEG_RAW``
+ - 'Raw JPEG'
+ - Raw JPEG bitstream, containing a compressed payload. This format
+ contains an image scan, i.e. without any metadata or headers.
+ The user is expected to set the needed metadata such as
+ quantization and entropy encoding tables, via ``V4L2_CID_JPEG``
+ controls, see :ref:`jpeg-control-id`.
* .. _V4L2-PIX-FMT-MPEG:
- ``V4L2_PIX_FMT_MPEG``
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 54afc9c7..0dcd95f4 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1301,6 +1301,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
/* Max description length mask: descr = "0123456789012345678901234567890" */
case V4L2_PIX_FMT_MJPEG: descr = "Motion-JPEG"; break;
case V4L2_PIX_FMT_JPEG: descr = "JFIF JPEG"; break;
+ case V4L2_PIX_FMT_JPEG_RAW: descr = "Raw JPEG"; break;
case V4L2_PIX_FMT_DV: descr = "1394"; break;
case V4L2_PIX_FMT_MPEG: descr = "MPEG-1/2/4"; break;
case V4L2_PIX_FMT_H264: descr = "H.264"; break;
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 5d1a3685..f271048c 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -627,6 +627,7 @@ struct v4l2_pix_format {
/* compressed formats */
#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */
#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */
+#define V4L2_PIX_FMT_JPEG_RAW v4l2_fourcc('J', 'P', 'G', 'R') /* JFIF JPEG RAW without headers */
#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */
#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
--
2.16.4

153
buildroot-external/board/asus/tinker/patches/linux/1101-media-Add-controls-for-JPEG-quantization-tables.patch
View File

@ -1,153 +0,0 @@
From 82da876c36ccc7791d5b20e7ee8b50379f7b19aa Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Wed, 5 Sep 2018 19:00:10 -0300
Subject: [PATCH 4/6] media: Add controls for JPEG quantization tables
Add V4L2_CID_JPEG_QUANTIZATION compound control to allow userspace
configure the JPEG quantization tables.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
Documentation/media/uapi/v4l/extended-controls.rst | 31 ++++++++++++++++++++++
Documentation/media/videodev2.h.rst.exceptions | 1 +
drivers/media/v4l2-core/v4l2-ctrls.c | 10 +++++++
include/uapi/linux/v4l2-controls.h | 12 +++++++++
include/uapi/linux/videodev2.h | 1 +
5 files changed, 55 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
index 9f7312bf..1335d27d 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -3354,7 +3354,38 @@ JPEG Control IDs
Specify which JPEG markers are included in compressed stream. This
control is valid only for encoders.
+.. _jpeg-quant-tables-control:
+``V4L2_CID_JPEG_QUANTIZATION (struct)``
+ Specifies the luma and chroma quantization matrices for encoding
+ or decoding a V4L2_PIX_FMT_JPEG_RAW format buffer. The :ref:`itu-t81`
+ specification allows 8-bit quantization coefficients for
+ baseline profile images, and 8-bit or 16-bit for extended profile
+ images. Supporting or not 16-bit precision coefficients is driver-specific.
+ Coefficients must be set in JPEG zigzag scan order.
+
+
+.. c:type:: struct v4l2_ctrl_jpeg_quantization
+
+.. cssclass:: longtable
+
+.. flat-table:: struct v4l2_ctrl_jpeg_quantization
+ :header-rows: 0
+ :stub-columns: 0
+ :widths: 1 1 2
+
+ * - __u8
+ - ``precision``
+ - Specifies the coefficient precision. User shall set 0
+ for 8-bit, and 1 for 16-bit.
+
+ * - __u16
+ - ``luma_quantization_matrix[64]``
+ - Sets the luma quantization table.
+
+ * - __u16
+ - ``chroma_quantization_matrix[64]``
+ - Sets the chroma quantization table.
.. flat-table::
:header-rows: 0
diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/media/videodev2.h.rst.exceptions
index ca9f0edc..a0a38e92 100644
--- a/Documentation/media/videodev2.h.rst.exceptions
+++ b/Documentation/media/videodev2.h.rst.exceptions
@@ -129,6 +129,7 @@ replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type`
replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type`
+replace symbol V4L2_CTRL_TYPE_JPEG_QUANTIZATION :c:type:`v4l2_ctrl_type`
# V4L2 capability defines
replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
index 599c1cbf..305bd7a9 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -999,6 +999,7 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_JPEG_RESTART_INTERVAL: return "Restart Interval";
case V4L2_CID_JPEG_COMPRESSION_QUALITY: return "Compression Quality";
case V4L2_CID_JPEG_ACTIVE_MARKER: return "Active Markers";
+ case V4L2_CID_JPEG_QUANTIZATION: return "JPEG Quantization Tables";
/* Image source controls */
/* Keep the order of the 'case's the same as in v4l2-controls.h! */
@@ -1286,6 +1287,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
case V4L2_CID_DETECT_MD_REGION_GRID:
*type = V4L2_CTRL_TYPE_U8;
break;
+ case V4L2_CID_JPEG_QUANTIZATION:
+ *type = V4L2_CTRL_TYPE_JPEG_QUANTIZATION;
+ break;
case V4L2_CID_DETECT_MD_THRESHOLD_GRID:
*type = V4L2_CTRL_TYPE_U16;
break;
@@ -1612,6 +1616,9 @@ static int std_validate(const struct v4l2_ctrl *ctrl, u32 idx,
return -ERANGE;
return 0;
+ case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
+ return 0;
+
default:
return -EINVAL;
}
@@ -2133,6 +2140,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
case V4L2_CTRL_TYPE_U32:
elem_size = sizeof(u32);
break;
+ case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
+ elem_size = sizeof(struct v4l2_ctrl_jpeg_quantization);
+ break;
default:
if (type < V4L2_CTRL_COMPOUND_TYPES)
elem_size = sizeof(s32);
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
index e4ee10ee..856b3325 100644
--- a/include/uapi/linux/v4l2-controls.h
+++ b/include/uapi/linux/v4l2-controls.h
@@ -987,6 +987,18 @@ enum v4l2_jpeg_chroma_subsampling {
#define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17)
#define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18)
+#define V4L2_CID_JPEG_QUANTIZATION (V4L2_CID_JPEG_CLASS_BASE + 5)
+struct v4l2_ctrl_jpeg_quantization {
+ /* ITU-T.81 specifies two quantization coefficient precisions:
+ * 8-bit for baseline profile,
+ * 8-bit or 16-bit for extended profile.
+ *
+ * User shall set "precision" to 0 for 8-bit and 1 for 16-bit.
+ */
+ __u8 precision;
+ __u16 luma_quantization_matrix[64];
+ __u16 chroma_quantization_matrix[64];
+};
/* Image source controls */
#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index f271048c..e998d074 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -1630,6 +1630,7 @@ enum v4l2_ctrl_type {
V4L2_CTRL_TYPE_U8 = 0x0100,
V4L2_CTRL_TYPE_U16 = 0x0101,
V4L2_CTRL_TYPE_U32 = 0x0102,
+ V4L2_CTRL_TYPE_JPEG_QUANTIZATION = 0x0103,
};
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
--
2.16.4

0
buildroot-external/board/asus/tinker/patches/linux/1002-clk-rockchip-add-all-known-operating-points-to-the-a.patch → buildroot-external/board/asus/tinker/patches/linux/2002-clk-rockchip-add-all-known-operating-points-to-the-a.patch
View File

41
buildroot-external/board/asus/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch
View File

@ -1,41 +0,0 @@
From e7e092be197c51b4d222a3b4e6638318067b7e6a Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Tue, 2 Aug 2016 08:20:53 +0200
Subject: [PATCH 07/28] ARM: dts: rockchip: add support for 1800 MHz operation
on MiQi board
This board happily supports 1800 MHz operations (and even more), so
let's enable it.
Signed-off-by: Willy Tarreau <w@1wt.eu>
(cherry picked from commit a0b82a29e7873a81f49ac5f50be3df1c7d312a14)
---
arch/arm/boot/dts/rk3288-miqi.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 0e383595..80603a3d 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -126,6 +126,18 @@
&cpu0 {
cpu0-supply = <&vdd_cpu>;
+ operating-points = <
+ /* KHz uV */
+ 1800000 1400000
+ 1704000 1350000
+ 1608000 1300000
+ 1512000 1250000
+ 1416000 1200000
+ 1200000 1100000
+ 1008000 1050000
+ 816000 1000000
+ 600000 900000
+ >;
};
&emmc {
--
2.11.0

170
buildroot-external/board/asus/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch
View File

@ -1,170 +0,0 @@
From de9dcd5ecab0686022eee243464f35d2c7a34c97 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 16 Jan 2017 12:44:56 +0000
Subject: [PATCH 08/28] Readapt: ARM: dts: rockchip: miqi: add turbo-mode
operating points
Readaptation of Willy Tarreau patch.
Here's the original commit message:
By switching to opp-v2 we can declare "turbo-mode" operating points
which are only enabled when /sys/devices/system/cpu/cpufreq/boost is
set. It is convenient because it allows to boot, set a safe powersave
governor, enable boost, limit scaling_max_freq to a safe value, then
change the governor to performance or ondemand, and the frequency can
then be manually adjusted by only touching scaling_max_freq.
New values are 1896, 1920, 1992, 2016, 2040 MHz, 2064, 2088, 2112,
2136, 2160, 2184, 2208. MiQi boards work fine up to 2112 with a very
good power supply (5.2V/3A real) and a strong heatsink. Higher
frequencies may randomly work. At least 1992 is rock solid for hours
using "openssl speed -multi 4". The other ones have only been tested
for a few minutes. Frequencies of 1896 and 1920 MHz use 1.425V.
1992 MHz uses 1.45V. 2016, 2040 and 2064 use 1.475V. 2088 and above
use 1.500V. 2160, 2184 and 2208 cause the lowest frequency to be
picked. It's obvious that it's a sign issue somewhere in the kernel
but this one was not found yet.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 120 +++++++++++++++++++++++++++++++++-----
1 file changed, 107 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 80603a3d..d7fde483 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -122,22 +122,116 @@
regulator-always-on;
regulator-boot-on;
};
-};
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2088000000 {
+ opp-hz = /bits/ 64 <2088000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2112000000 {
+ opp-hz = /bits/ 64 <2112000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2136000000 {
+ opp-hz = /bits/ 64 <2136000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2160000000 {
+ opp-hz = /bits/ 64 <2160000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2184000000 {
+ opp-hz = /bits/ 64 <2184000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2208000000 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ };
+};
+
&cpu0 {
cpu0-supply = <&vdd_cpu>;
- operating-points = <
- /* KHz uV */
- 1800000 1400000
- 1704000 1350000
- 1608000 1300000
- 1512000 1250000
- 1416000 1200000
- 1200000 1100000
- 1008000 1050000
- 816000 1000000
- 600000 900000
- >;
+
+ operating-points-v2 = <&cpu0_opp_table>;
};
&emmc {
--
2.11.0

0
buildroot-external/board/asus/tinker/patches/linux/1005-drivers-mmc-dw-mci-rockchip-Handle-ASUS-Tinkerboard.patch → buildroot-external/board/asus/tinker/patches/linux/2005-drivers-mmc-dw-mci-rockchip-Handle-ASUS-Tinkerboard.patch
View File

61
buildroot-external/board/asus/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch
View File

@ -1,61 +0,0 @@
From 771bcfe1735e42650b763e52a042a9fd98b2fa5b Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:20:43 +0200
Subject: [PATCH 09/28] ARM: DTSI: rk3288.dtsi: Missing GRF handles
Add missing GRF handles.
This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 356ed1e6..5b789528 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -547,6 +547,7 @@
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -655,6 +656,7 @@
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -666,6 +668,7 @@
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -677,6 +680,7 @@
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -688,6 +692,7 @@
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
--
2.11.0

40
buildroot-external/board/asus/tinker/patches/linux/1006-soc-rockchip-power-domain-export-idle-request.patch → buildroot-external/board/asus/tinker/patches/linux/2006-soc-rockchip-power-domain-export-idle-request.patch
View File

@ -1,32 +1,24 @@
From 4ffe79de7272234408a9179aa4c403ee1b67a362 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 7 Dec 2017 21:27:52 +0100
Subject: [PATCH] soc: rockchip: power-domain: export idle request
From e7b60b10cf3fd2f4374ab26c314383121c27fe82 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Tue, 22 Jan 2019 21:24:37 +0100
Subject: [PATCH] soc: rockchip: power-domain: export idle request for RKMPP
We need to put the power status of HEVC/RKVDEC IP into IDLE
unless we can't reset that IP or the SoC would crash down.
rockchip_pmu_idle_request(dev, true)---> enter idle
rockchip_pmu_idle_request(dev, false)---> exit idle
This function, and the added header, are required by the RKMPP driver,
provided by Randy Li. However, I can't attest that the provided code
is correct.
Only the video codec drivers of rockchip platform would
request this patch currently.
I am not sure whether it is necessary to add a new function
at generic power domain. I want someone give me some advises
here.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
include/linux/rockchip_pmu.h | 15 +++++++++++++++
include/soc/rockchip/pm_domains.h | 15 +++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 include/linux/rockchip_pmu.h
create mode 100644 include/soc/rockchip/pm_domains.h
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 40b75748..0006ed53 100644
index 847c7c482..3e2e252cb 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -180,6 +180,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
@@ -199,6 +199,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
return 0;
}
@ -56,11 +48,11 @@ index 40b75748..0006ed53 100644
static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
{
int i;
diff --git a/include/linux/rockchip_pmu.h b/include/linux/rockchip_pmu.h
diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
new file mode 100644
index 00000000..720b3314
index 000000000..720b3314e
--- /dev/null
+++ b/include/linux/rockchip_pmu.h
+++ b/include/soc/rockchip/pm_domains.h
@@ -0,0 +1,15 @@
+/*
+ * pm_domain.h - Definitions and headers related to device power domains.
@ -78,5 +70,5 @@ index 00000000..720b3314
+
+#endif /* _LINUX_ROCKCHIP_PM_H */
--
2.14.1
2.16.4

101
buildroot-external/board/asus/tinker/patches/linux/2007-drivers-wifi-ath9k-reverse-do-not-use-bulk-on-EP3-and-EP4.patch Normal file
View File

@ -0,0 +1,101 @@
FROM: Solidhal <hal@halemmerich.com>
This patch reverses commit 2b721118b7821107757eb1d37af4b60e877b27e7, as can bee seen here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2b721118b7821107757eb1d37af4b60e877b27e7
This commit caused issues on veyron speedy with ath9k and dwc2 drivers. Any ath9k device (ar9271)
would intermittently work, most of the time ending in errors as can bee seen here:
https://github.com/SolidHal/PrawnOS/issues/38
This commit fixes that issue.
This is only a temporary work around while a permenant fix is found, as this commit seems to only cause issues
with dwc2
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
--- b/drivers/net/wireless/ath/ath9k/hif_usb.c
+++ a/drivers/net/wireless/ath/ath9k/hif_usb.c
@@ -115,10 +115,10 @@
cmd->skb = skb;
cmd->hif_dev = hif_dev;
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_sndbulkpipe(hif_dev->udev, USB_REG_OUT_PIPE),
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_sndintpipe(hif_dev->udev, USB_REG_OUT_PIPE),
skb->data, skb->len,
+ hif_usb_regout_cb, cmd);
- hif_usb_regout_cb, cmd, 1);
usb_anchor_urb(urb, &hif_dev->regout_submitted);
ret = usb_submit_urb(urb, GFP_KERNEL);
@@ -723,11 +723,11 @@
return;
}
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_rcvbulkpipe(hif_dev->udev,
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_rcvintpipe(hif_dev->udev,
USB_REG_IN_PIPE),
nskb->data, MAX_REG_IN_BUF_SIZE,
+ ath9k_hif_usb_reg_in_cb, nskb);
- ath9k_hif_usb_reg_in_cb, nskb, 1);
}
resubmit:
@@ -909,11 +909,11 @@
goto err_skb;
}
+ usb_fill_bulk_urb(urb, hif_dev->udev,
+ usb_rcvbulkpipe(hif_dev->udev,
- usb_fill_int_urb(urb, hif_dev->udev,
- usb_rcvintpipe(hif_dev->udev,
USB_REG_IN_PIPE),
skb->data, MAX_REG_IN_BUF_SIZE,
+ ath9k_hif_usb_reg_in_cb, skb);
- ath9k_hif_usb_reg_in_cb, skb, 1);
/* Anchor URB */
usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
@@ -1031,7 +1031,9 @@
static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
{
+ struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
+ struct usb_endpoint_descriptor *endp;
+ int ret, idx;
- int ret;
ret = ath9k_hif_usb_download_fw(hif_dev);
if (ret) {
@@ -1041,6 +1043,20 @@
return ret;
}
+ /* On downloading the firmware to the target, the USB descriptor of EP4
+ * is 'patched' to change the type of the endpoint to Bulk. This will
+ * bring down CPU usage during the scan period.
+ */
+ for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) {
+ endp = &alt->endpoint[idx].desc;
+ if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+ == USB_ENDPOINT_XFER_INT) {
+ endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK;
+ endp->bmAttributes |= USB_ENDPOINT_XFER_BULK;
+ endp->bInterval = 0;
+ }
+ }
+
/* Alloc URBs */
ret = ath9k_hif_usb_alloc_urbs(hif_dev);
if (ret) {
@@ -1252,7 +1268,7 @@
if (!buf)
return;
+ ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE),
- ret = usb_interrupt_msg(udev, usb_sndintpipe(udev, USB_REG_OUT_PIPE),
buf, 4, NULL, USB_MSG_TIMEOUT);
if (ret)
dev_err(&udev->dev, "ath9k_htc: USB reboot failed\n");

27
buildroot-external/board/asus/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch
View File

@ -1,27 +0,0 @@
From af8d73ec0df1dde1e2fe1674c5708d4c30385ba9 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 5 Jun 2017 12:37:17 +0000
Subject: [PATCH 11/28] Added support for Tinkerboard's SPI interface
Imported from ARMbian
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/spi/spidev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index cda10719..a6287475 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -669,6 +669,7 @@ static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "lineartechnology,ltc2488" },
{ .compatible = "ge,achc" },
{ .compatible = "semtech,sx1301" },
+ { .compatible = "rockchip,spi_tinker" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);
--
2.11.0

84
buildroot-external/board/asus/tinker/patches/linux/1009-drivers-clk-rk3288-support-for-dedicating-NPLL-to-a-.patch → buildroot-external/board/asus/tinker/patches/linux/2008-clk-rockchip-rk3288-Support-for-dedicating-NPLL-to-a.patch
View File

@ -1,7 +1,7 @@
From bc16cd0aa3cdaaff27b9bf2d3282ccfff81d8784 Mon Sep 17 00:00:00 2001
From e03d074b8ec00718337e7373e991912f6b6f9a52 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Sat, 29 Sep 2018 02:56:32 +0200
Subject: [PATCH 5/6] drivers: clk-rk3288: support for dedicating NPLL to a VOP
Date: Mon, 5 Nov 2018 19:53:43 +0100
Subject: [PATCH] clk: rockchip: rk3288: Support for dedicating NPLL to a VOP
This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
@ -15,69 +15,21 @@ I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
so I cannot comment on what it's doing and if it's a good idea in
general.
The only thing I know from this patchset is that it works and have
resolved some purple line issue at the left of my HDMI screen, when
connected to MiQi or Tinkerboard devices.
Now, I still have to test if that patch does anything useful on
RK3288 boards. If it doesn't, I might just throw it away on next
versions.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 98 ++++++++++++++++++++++++++++++++-------
drivers/clk/rockchip/clk-rk3288.c | 68 ++++++++++++++++++++++++++++++++-------
drivers/clk/rockchip/clk.h | 3 ++
2 files changed, 85 insertions(+), 16 deletions(-)
2 files changed, 59 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index fd2058f7d..b5b56169d 100644
index 13b38cb89..0d8b99b6b 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -83,22 +83,43 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
RK3066_PLL_RATE( 768000000, 1, 64, 2),
RK3066_PLL_RATE( 742500000, 8, 495, 2),
RK3066_PLL_RATE( 696000000, 1, 58, 2),
+ RK3066_PLL_RATE_NB(621000000, 1, 207, 8, 1),
RK3066_PLL_RATE( 600000000, 1, 50, 2),
RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1),
RK3066_PLL_RATE( 552000000, 1, 46, 2),
RK3066_PLL_RATE( 504000000, 1, 84, 4),
RK3066_PLL_RATE( 500000000, 3, 125, 2),
RK3066_PLL_RATE( 456000000, 1, 76, 4),
+ RK3066_PLL_RATE( 428000000, 1, 107, 6),
RK3066_PLL_RATE( 408000000, 1, 68, 4),
RK3066_PLL_RATE( 400000000, 3, 100, 2),
+ RK3066_PLL_RATE_NB( 394000000, 1, 197, 12, 1),
RK3066_PLL_RATE( 384000000, 2, 128, 4),
RK3066_PLL_RATE( 360000000, 1, 60, 4),
+ RK3066_PLL_RATE_NB( 356000000, 1, 178, 12, 1),
+ RK3066_PLL_RATE_NB( 324000000, 1, 189, 14, 1),
RK3066_PLL_RATE( 312000000, 1, 52, 4),
- RK3066_PLL_RATE( 300000000, 1, 50, 4),
- RK3066_PLL_RATE( 297000000, 2, 198, 8),
+ RK3066_PLL_RATE_NB( 308000000, 1, 154, 12, 1),
+ RK3066_PLL_RATE_NB( 303000000, 1, 202, 16, 1),
+ RK3066_PLL_RATE( 300000000, 1, 75, 6),
+ RK3066_PLL_RATE_NB( 297750000, 2, 397, 16, 1),
+ RK3066_PLL_RATE_NB( 293250000, 2, 391, 16, 1),
+ RK3066_PLL_RATE_NB( 292500000, 1, 195, 16, 1),
+ RK3066_PLL_RATE( 273600000, 1, 114, 10),
+ RK3066_PLL_RATE_NB( 273000000, 1, 182, 16, 1),
+ RK3066_PLL_RATE_NB( 270000000, 1, 180, 16, 1),
+ RK3066_PLL_RATE_NB( 266250000, 2, 355, 16, 1),
+ RK3066_PLL_RATE_NB( 256500000, 1, 171, 16, 1),
RK3066_PLL_RATE( 252000000, 1, 84, 8),
- RK3066_PLL_RATE( 216000000, 1, 72, 8),
- RK3066_PLL_RATE( 148500000, 2, 99, 8),
+ RK3066_PLL_RATE_NB( 250500000, 1, 167, 16, 1),
+ RK3066_PLL_RATE_NB( 243428571, 1, 142, 14, 1),
+ RK3066_PLL_RATE( 238000000, 1, 119, 12),
+ RK3066_PLL_RATE_NB( 219750000, 2, 293, 16, 1),
+ RK3066_PLL_RATE_NB( 216000000, 1, 144, 16, 1),
+ RK3066_PLL_RATE_NB( 213000000, 1, 142, 16, 1),
+ RK3066_PLL_RATE( 195428571, 1, 114, 14),
+ RK3066_PLL_RATE( 160000000, 1, 80, 12),
+ RK3066_PLL_RATE( 157500000, 1, 105, 16),
RK3066_PLL_RATE( 126000000, 1, 84, 16),
RK3066_PLL_RATE( 48000000, 1, 64, 32),
{ /* sentinel */ },
@@ -194,10 +215,14 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
@@ -215,10 +215,13 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu" };
PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
@ -88,14 +40,13 @@ index fd2058f7d..b5b56169d 100644
+PNAME_ED(mux_pll_src_cgn_pll_nonvop_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
+PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
+
PNAME(mux_pll_src_cpll_gpll_usb480m_p) = { "cpll", "gpll", "usbphy480m_src" };
-PNAME(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
PNAME(mux_pll_src_cpll_gpll_usb480m_p) = { "cpll", "gpll", "unstable:usbphy480m_src" };
-PNAME(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "unstable:usbphy480m_src", "npll" };
+PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
PNAME(mux_mmc_src_p) = { "cpll", "gpll", "xin24m", "xin24m" };
PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
@@ -443,24 +468,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
@@ -464,24 +467,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(3), 4, GFLAGS),
@ -125,7 +76,7 @@ index fd2058f7d..b5b56169d 100644
RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
RK3288_CLKGATE_CON(3), 15, GFLAGS),
@@ -469,16 +494,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
@@ -490,16 +493,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
RK3288_CLKGATE_CON(5), 11, GFLAGS),
@ -145,7 +96,7 @@ index fd2058f7d..b5b56169d 100644
RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(13), 15, GFLAGS),
@@ -552,7 +577,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
@@ -573,7 +576,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 11, GFLAGS),
@ -154,15 +105,14 @@ index fd2058f7d..b5b56169d 100644
RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3288_CLKGATE_CON(4), 10, GFLAGS),
@@ -912,6 +937,7 @@ static void __init rk3288_clk_init(struct device_node *np)
@@ -933,5 +936,6 @@ static void __init rk3288_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
struct clk *clk;
+ s32 npll_vop = -1;
rk3288_cru_base = of_iomap(np, 0);
if (!rk3288_cru_base) {
@@ -919,6 +945,46 @@ static void __init rk3288_clk_init(struct device_node *np)
@@ -940,6 +944,46 @@ static void __init rk3288_clk_init(struct device_node *np)
return;
}

56
buildroot-external/board/asus/tinker/patches/linux/2009-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch
View File

@ -1,56 +0,0 @@
From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:39:00 +0200
Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
sizes of MMC nodes
Imported from the Rockchip 4.4 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index be985f02..14ef8202 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -236,6 +236,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0c0000 0x0 0x4000>;
resets = <&cru SRST_MMC0>;
reset-names = "reset";
@@ -250,6 +252,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0d0000 0x0 0x4000>;
resets = <&cru SRST_SDIO0>;
reset-names = "reset";
@@ -264,6 +268,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0e0000 0x0 0x4000>;
resets = <&cru SRST_SDIO1>;
reset-names = "reset";
@@ -278,6 +284,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0f0000 0x0 0x4000>;
resets = <&cru SRST_EMMC>;
reset-names = "reset";
--
2.11.0

42
buildroot-external/board/asus/tinker/patches/linux/1010-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch → buildroot-external/board/asus/tinker/patches/linux/2009-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch
View File

@ -42,17 +42,14 @@ frequencies easier, in case you have a very special HDMI screen.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 269 ++++++++++++++++++----------
1 file changed, 175 insertions(+), 94 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 11309a2a4..740b0aeea 100644
index cdc304d4c..91c7dc07b 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -49,122 +49,141 @@ struct rockchip_hdmi {
struct clk *vpll_clk;
@@ -73,122 +73,141 @@ struct rockchip_hdmi {
struct clk *grf_clk;
struct dw_hdmi *hdmi;
struct phy *phy;
+ u32* rates;
+ u32 rates_cnt;
};
@ -273,7 +270,7 @@ index 11309a2a4..740b0aeea 100644
hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
if (IS_ERR(hdmi->regmap)) {
@@ -192,26 +211,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
@@ -216,26 +235,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
return PTR_ERR(hdmi->grf_clk);
}
@ -338,7 +335,7 @@ index 11309a2a4..740b0aeea 100644
}
static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
@@ -227,7 +275,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
@@ -251,7 +299,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
@ -379,7 +376,7 @@ index 11309a2a4..740b0aeea 100644
}
static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
@@ -280,6 +360,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
@@ -307,6 +387,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
}
static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
@ -387,7 +384,15 @@ index 11309a2a4..740b0aeea 100644
.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
.mode_set = dw_hdmi_rockchip_encoder_mode_set,
.enable = dw_hdmi_rockchip_encoder_enable,
@@ -294,7 +375,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
@@ -406,7 +487,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = {
};
static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -423,7 +503,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
};
static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
@ -395,7 +400,15 @@ index 11309a2a4..740b0aeea 100644
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -308,7 +388,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
@@ -443,7 +522,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = {
};
static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
- .mode_valid = dw_hdmi_rockchip_mode_valid,
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -460,7 +538,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
};
static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
@ -403,7 +416,7 @@ index 11309a2a4..740b0aeea 100644
.mpll_cfg = rockchip_mpll_cfg,
.cur_ctr = rockchip_cur_ctr,
.phy_config = rockchip_phy_config,
@@ -387,6 +466,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
@@ -558,6 +635,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
*/
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
@ -411,7 +424,7 @@ index 11309a2a4..740b0aeea 100644
drm_encoder_cleanup(encoder);
clk_disable_unprepare(hdmi->vpll_clk);
}
@@ -399,6 +479,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
@@ -570,6 +648,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
{
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
@ -419,6 +432,3 @@ index 11309a2a4..740b0aeea 100644
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->vpll_clk);
}
--
2.16.4

165
buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch
View File

@ -1,165 +0,0 @@
From 2715f4a9ab5c169c546029a61eebb0bde6619b0e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:12:48 +0200
Subject: [PATCH 18/28] ARM: DTS: rk3288-tinker.dts: Enabling SDIO, Wireless
and Bluetooth
Adding the appropriate nodes in order to exploit the WiFi capabilities
of the board.
Since these capabilities are provided through SDIO, and the SDIO
nodes were not defined, these were added too.
These seems to depend on each other so they are added in one big
patch.
Split if necessary.
Bluetooth and uart0 (AKA Bluetooth UART) definitions were also added
in order to deal with all the wireless techs in one patch.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 82 ++++++++++++++++++++++++++++++++++++-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 346b0d8b..c552fd95 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -44,6 +44,7 @@
#include "rk3288.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
model = "Rockchip RK3288 Tinker Board";
@@ -114,6 +115,24 @@
};
};
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
+ };
+
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -134,6 +153,28 @@
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "8723bs";
+ sdio_vref = <1800>;
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default","rts_gpio";
+ pinctrl-0 = <&uart0_rts>;
+ pinctrl-1 = <&uart0_gpios>;
+ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
};
&cpu0 {
@@ -373,10 +414,30 @@
&io_domains {
status = "okay";
-
+ rockchip,grf = <&grf>;
+ wifi-supply = <&vcc_18>;
sdcard-supply = <&vccio_sd>;
};
+&sdio0 {
+ status = "okay";
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ supports-sdio;
+
+};
+
&pinctrl {
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
@@ -422,6 +483,16 @@
};
};
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
@@ -453,6 +524,13 @@
rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
};
&pwm0 {
@@ -485,6 +563,8 @@
&uart0 {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
};
&uart1 {
--
2.11.0

22
buildroot-external/board/asus/tinker/patches/linux/2013-spi-Added-support-for-Tinkerboard-s-SPI-interface.patch Normal file
View File

@ -0,0 +1,22 @@
From d4d128324b8f8a9f5c441203d94703e41fa07df3 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 19:57:56 +0100
Subject: [PATCH] spi: Added support for Tinkerboard's SPI interface
Imported from ARMbian
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 255786f2e..3a3f2e6fd 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -665,6 +665,7 @@ static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "lwn,bk4" },
{ .compatible = "dh,dhcom-board" },
{ .compatible = "menlo,m53cpld" },
+ { .compatible = "rockchip,spi_tinker" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);

30
buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch
View File

@ -1,30 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 07b4af4..7755426 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -162,7 +162,7 @@
WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
status = "okay";
};
-
+/*
wireless-bluetooth {
compatible = "bluetooth-platdata";
uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
@@ -174,6 +174,7 @@
BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+*/
};
@@ -620,7 +621,7 @@
&uart0 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
};
&uart1 {

29
buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Improving-the-CPU-max-volt.patch
View File

@ -1,29 +0,0 @@
From d4775f623b25009039a8ef3f28332033c7766ecc Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:20:33 +0200
Subject: [PATCH 19/28] ARM: DTS: rk3288-tinker.dts: Improving the CPU max
voltage
Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index c552fd95..4ce94698 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -243,7 +243,7 @@
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-max-microvolt = <1450000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.11.0

40
buildroot-external/board/asus/tinker/patches/linux/2016-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch
View File

@ -1,40 +0,0 @@
From 39e50ab508d8104a733771a8681908a66a300edd Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:25:03 +0200
Subject: [PATCH 20/28] ARM: DTS: rk3288-tinker.dts: Setting up the SD
regulators
Some are needed and some are not. Playing with these parameters is
required to get reboot working on these boards.
I still can't believe that these boards can't soft reset correctly.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 4ce94698..90c1a251 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -333,6 +333,8 @@
};
vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
@@ -379,7 +381,6 @@
};
vcc33_sd: SWITCH_REG1 {
- regulator-always-on;
regulator-boot-on;
regulator-name = "vcc33_sd";
regulator-state-mem {
--
2.11.0

53
buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch
View File

@ -1,53 +0,0 @@
From b0a552add28bf4590b979abb3530b14b6811eec1 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:33:39 +0200
Subject: [PATCH 21/28] ARM: DTS: rk3288-tinker.dts: Defined the I2C interfaces
And all the hardware behind.
Taken from, and tested by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 90c1a251..67a3ce6f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -400,8 +400,31 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
&i2c2 {
status = "okay";
+
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
};
&i2c5 {
--
2.11.0

35
buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch.disabled
View File

@ -1,35 +0,0 @@
From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:36:02 +0200
Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
Taken from, and tested by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 67a3ce6f..6f4c0843 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -443,6 +443,15 @@
sdcard-supply = <&vccio_sd>;
};
+&mipi_dsi {
+ status = "okay";
+ mipi_panel: mipi-panel {
+ compatible ="asus,tc358762";
+ reg = <0x0 0>;
+ status = "okay";
+ };
+};
+
&sdio0 {
status = "okay";
clock-frequency = <50000000>;
--
2.11.0

33
buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch
View File

@ -1,33 +0,0 @@
From 58d72a1cc693c4c08391487476d0cd6d167a57cf Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:48:36 +0200
Subject: [PATCH 24/28] ARM: DTS: rk3288-tinker.dts: Defining SDMMC properties
I never knew if these properties were required to fix the dreaded
reboot issue...
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index f4b4525c..a0663425 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -601,7 +601,12 @@
disable-wp; /* wp not hooked up */
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
status = "okay";
+ supports-sd;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};
--
2.11.0

107
buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTSI-rk3288-Define-the-VPU-services.patch
View File

@ -1,107 +0,0 @@
From f4480cb8198085607c15e523b49aa21bc38cf62c Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:47:33 +0100
Subject: [PATCH 1/5] ARM: DTSI: rk3288.dtsi: Define the VPU services
Still, you will need appropriate drivers to use them.
Contrary to the previous versions of this patch, these services are :
* NOT enabled by default;
* MUST be activated in each individual DTS;
I currently do not own enough RK3288 boards to ensure that the
VPU and HEVC MMU + services can be activated without issues.
Still this patch does not generate issues like the previous one AND
still enable these services on boot, when activated properly in
individual DTS files.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 30b04257..bc3601ac 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1182,6 +1182,27 @@
status = "disabled";
};
+ vpu_service: vpu-service@ff9a0000 {
+ compatible = "rockchip,vpu_service";
+ reg = <0x0 0xff9a0000 0x0 0x800>;
+ interrupts =
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_enc", "irq_dec";
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk_vcodec", "hclk_vcodec";
+ power-domains = <&power RK3288_PD_VIDEO>;
+ rockchip,grf = <&grf>;
+ resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
+ reset-names = "video_a", "video_h";
+ iommus = <&vpu_mmu>;
+ iommu_enabled = <1>;
+ dev_mode = <0>;
+ status = "disabled";
+ /* 0 means ion, 1 means drm */
+ allocator = <1>;
+ };
+
hevc_mmu: iommu@ff9c0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
@@ -1191,6 +1212,48 @@
status = "disabled";
};
+ hevc_service: hevc-service@ff9c0000 {
+ compatible = "rockchip,hevc_service";
+ reg = <0x0 0xff9c0000 0x0 0x400>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec";
+ clocks =
+ <&cru ACLK_HEVC>,
+ <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CORE>,
+ <&cru SCLK_HEVC_CABAC>;
+ clock-names =
+ "aclk_vcodec",
+ "hclk_vcodec",
+ "clk_core",
+ "clk_cabac";
+ /*
+ * The 4K hevc would also work well with 500/125/300/300,
+ * no more err irq and reset request.
+ */
+ assigned-clocks =
+ <&cru ACLK_HEVC>,
+ <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CORE>,
+ <&cru SCLK_HEVC_CABAC>;
+ assigned-clock-rates =
+ <400000000>,
+ <100000000>,
+ <300000000>,
+ <300000000>;
+
+ resets = <&cru SRST_HEVC>;
+ reset-names = "video";
+ power-domains = <&power RK3288_PD_HEVC>;
+ rockchip,grf = <&grf>;
+ dev_mode = <1>;
+ iommus = <&hevc_mmu>;
+ iommu_enabled = <1>;
+ status = "disabled";
+ /* 0 means ion, 1 means drm */
+ allocator = <1>;
+ };
+
gpu: gpu@ffa30000 {
compatible = "rockchip,rk3288-mali", "arm,mali-t760";
reg = <0x0 0xffa30000 0x0 0x10000>;
--
2.14.1

57
buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch
View File

@ -1,57 +0,0 @@
From 647d6012849191e9909a8acb0fc9ae5df1afc747 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:51:31 +0100
Subject: [PATCH 2/5] ARM: DTS: rk3288-miqi.dts: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU service;
* HEVC MMU;
* HEVC service;
on MiQi devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index d7fde483..dd785c70 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -124,7 +124,7 @@
};
- cpu0_opp_table: opp_table0 {
+ cpu0_opp_table: opp_table {
compatible = "operating-points-v2";
opp-shared;
@@ -575,6 +575,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

48
buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch
View File

@ -1,48 +0,0 @@
From 092c26ead2eb4035a57217f8705c9deed3bfb927 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:54:22 +0100
Subject: [PATCH 3/5] ARM: DTS: rk3288-tinker: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for ASUS Tinkerboard devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index a0663425..07b4af4f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -671,6 +671,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

49
buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch
View File

@ -1,49 +0,0 @@
From 2769b0e656d849c5d652c75db71ce0faff1c0551 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:56:45 +0100
Subject: [PATCH 4/5] ARM: DTSI: rk3288-firefly: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for RK3288 Firefly devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-firefly.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index b9e6f3a9..9961acce 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -606,6 +606,23 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
+
--
2.14.1

48
buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch
View File

@ -1,48 +0,0 @@
From 4766516bcbf023813ad883c2d61c422316770d12 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:58:22 +0100
Subject: [PATCH 5/5] ARM: DTSI: rk3288-veyron: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for RK3288 Chromebook laptops.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 6e5bd897..517b9242 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -450,6 +450,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

39
buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-Renamed-the-VPU-services-clocks.patch
View File

@ -1,39 +0,0 @@
From 29ef524e8890bbfd24602a61e14234259df92349 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 25 Jun 2018 17:05:37 +0200
Subject: [PATCH 25/26] ARM: DTSI: rk3288: Renamed the VPU services clocks
In order to conform to the naming scheme used in the whole DTSI.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 796609e3..45ec4e89 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1242,7 +1242,7 @@
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- clock-names = "aclk_vcodec", "hclk_vcodec";
+ clock-names = "aclk", "iface";
power-domains = <&power RK3288_PD_VIDEO>;
rockchip,grf = <&grf>;
resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
@@ -1277,8 +1277,8 @@
<&cru SCLK_HEVC_CORE>,
<&cru SCLK_HEVC_CABAC>;
clock-names =
- "aclk_vcodec",
- "hclk_vcodec",
+ "aclk",
+ "iface",
"clk_core",
"clk_cabac";
/*
--
2.16.4

43
buildroot-external/board/asus/tinker/patches/linux/2027-ARM-dtsi-The-VPU-service-as-defined-in-the-V4L2-driv.patch
View File

@ -1,43 +0,0 @@
From 7f8607ba9a20f8ddb5c24559d9b875af762d4717 Mon Sep 17 00:00:00 2001
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Tue, 11 Sep 2018 02:55:55 +0200
Subject: [PATCH] ARM: dtsi: The VPU service as defined in the V4L2 driver
Let's try the V4L2 road.
They've got a lot of things ready, like an entire H264
movie with the V4L2 data of *every frame*.
That might help in this endless endeavour.
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 72c36af6..d23c7fa5 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1246,7 +1246,18 @@
clock-names = "aclk", "iface";
power-domains = <&power RK3288_PD_VIDEO>;
#iommu-cells = <0>;
- status = "disabled";
+ };
+
+ vpu: video-codec@ff9a0000 {
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk", "hclk";
+ compatible = "rockchip,rk3288-vpu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vepu", "vdpu";
+ iommus = <&vpu_mmu>;
+ power-domains = <&power RK3288_PD_VIDEO>;
+ reg = <0x0 0xff9a0000 0x0 0x800>;
};
hevc_mmu: iommu@ff9c0440 {
--
2.16.4

395
buildroot-external/board/asus/tinker/patches/linux/261_gpiomem_driver.patch Normal file
View File

@ -0,0 +1,395 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index e5b7ef1a5..f88c913ff 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -544,3 +544,6 @@
&wdt {
status = "okay";
};
+&gpiomem {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index f3ca55496..14bbcb192 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1418,6 +1418,12 @@
interrupts = <GIC_PPI 9 0xf04>;
};
+ gpiomem: rk3288-gpiomem@ff750000 {
+ compatible = "rockchip,rk3288-gpiomem";
+ reg = <0x0 0xff750000 0x0 0x1000>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 3143db5..9c18b74 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -5,6 +5,7 @@
menu "Character devices"
source "drivers/tty/Kconfig"
+source "drivers/char/rockchip/Kconfig"
config DEVMEM
bool "/dev/mem virtual device support"
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index d8a7579..290cb32 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -51,6 +51,8 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o
obj-$(CONFIG_JS_RTC) += js-rtc.o
js-rtc-y = rtc.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
obj-$(CONFIG_ADI) += adi.o
diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
new file mode 100644
index 0000000..6e97486
--- /dev/null
+++ b/drivers/char/rockchip/Kconfig
@@ -0,0 +1,16 @@
+#
+# Broadcom char driver config
+#
+
+menuconfig RK_CHAR_DRIVERS
+ bool "Rockchip Char Drivers"
+ help
+ Rockchip's char drivers
+
+config RK3288_DEVGPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
+ default y
+ help
+ Provides users with root-free access to the GPIO registers
+ on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
+ register page to the user's pointer.
\ No newline at end of file
diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
new file mode 100644
index 0000000..2287ec2
--- /dev/null
+++ b/drivers/char/rockchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
\ No newline at end of file
diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
new file mode 100644
index 0000000..984471c
--- /dev/null
+++ b/drivers/char/rockchip/rk3288-gpiomem.c
@@ -0,0 +1,303 @@
+/**
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the rk3288's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+
+#define DEVICE_NAME "rk3288-gpiomem"
+#define DRIVER_NAME "gpiomem-rk3288"
+#define DEVICE_MINOR 0
+
+struct rk3288_gpiomem_instance {
+ unsigned long gpio_regs_phys;
+ struct device *dev;
+};
+
+static struct cdev rk3288_gpiomem_cdev;
+static dev_t rk3288_gpiomem_devid;
+static struct class *rk3288_gpiomem_class;
+static struct device *rk3288_gpiomem_dev;
+static struct rk3288_gpiomem_instance *inst;
+
+
+/****************************************************************************
+*
+* GPIO mem chardev file ops
+*
+***************************************************************************/
+
+static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+static int address_is_allowed(unsigned long pfn, unsigned long size)
+{
+ unsigned long address = pfn << PAGE_SHIFT;
+
+ dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
+
+ switch(address) {
+
+ case 0xff750000:
+ case 0xff760000:
+ case 0xff780000:
+ case 0xff790000:
+ case 0xff7a0000:
+ case 0xff7b0000:
+ case 0xff7c0000:
+ case 0xff7d0000:
+ case 0xff7e0000:
+ case 0xff7f0000:
+ case 0xff7f2000:
+ case 0xff770000:
+ case 0xff730000:
+ case 0xff680000:
+ dev_info(inst->dev, "address_is_allowed.return 1");
+ return 1;
+ break;
+ default :
+ dev_info(inst->dev, "address_is_allowed.return 0");
+ return 0;
+ }
+}
+
+static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+
+ size_t size;
+
+ size = vma->vm_end - vma->vm_start;
+
+
+ if (!address_is_allowed(vma->vm_pgoff, size))
+ return -EPERM;
+
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
+ size,
+ vma->vm_page_prot);
+
+ vma->vm_ops = &rk3288_gpiomem_vm_ops;
+
+ /* Remap-pfn-range will mark the range VM_IO */
+ if (remap_pfn_range(vma,
+ vma->vm_start,
+ vma->vm_pgoff,
+ size,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static const struct file_operations
+rk3288_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = rk3288_gpiomem_open,
+ .release = rk3288_gpiomem_release,
+ .mmap = rk3288_gpiomem_mmap,
+};
+
+static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ add_uevent_var(env, "DEVMODE=%#o", 0666);
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Probe and remove functions
+*
+***************************************************************************/
+
+
+static int rk3288_gpiomem_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct resource *ioresource;
+
+ /* Allocate buffers and instance data */
+
+ inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (ioresource) {
+ inst->gpio_regs_phys = ioresource->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&rk3288_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
+ rk3288_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
+ ptr_err = rk3288_gpiomem_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+ rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
+ rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
+ rk3288_gpiomem_devid, NULL,
+ "gpiomem");
+ ptr_err = rk3288_gpiomem_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys);
+
+ return 0;
+
+failed_device_create:
+ class_destroy(rk3288_gpiomem_class);
+failed_class_create:
+ cdev_del(&rk3288_gpiomem_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load rk3288_gpiomem");
+ return err;
+}
+
+static int rk3288_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
+ class_destroy(rk3288_gpiomem_class);
+ cdev_del(&rk3288_gpiomem_cdev);
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id rk3288_gpiomem_of_match[] = {
+ {.compatible = "rockchip,rk3288-gpiomem",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
+
+static struct platform_driver rk3288_gpiomem_driver = {
+ .probe = rk3288_gpiomem_probe,
+ .remove = rk3288_gpiomem_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = rk3288_gpiomem_of_match,
+ },
+};
+
+module_platform_driver(rk3288_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-rk3288");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
\ No newline at end of file

45
buildroot-external/board/asus/tinker/patches/linux/3000_RK3288-Tinkerboard-add-1.7_1.8Ghz_OPP.patch
View File

@ -1,45 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 2601316da..08ec7aa4b 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -210,8 +210,8 @@
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1450000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -222,8 +222,8 @@
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <6000>;
regulator-state-mem {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 22bcaaa29..2fcd46098 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -149,6 +149,14 @@
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
};
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
};
amba {

31
buildroot-external/board/asus/tinker/patches/linux/ARM-DTSI-rk3288-add-usbphy-reset.patch
View File

@ -1,31 +0,0 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0840ffb3..5393f2cd 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -894,6 +894,8 @@
reg = <0x320>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBOTG_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
@@ -902,6 +904,8 @@
reg = <0x334>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBHOST0_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
@@ -910,6 +914,8 @@
reg = <0x348>;
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
+ resets = <&cru SRST_USBHOST1_PHY>;
+ reset-names = "phy-reset";
#clock-cells = <0>;
};
};

80
buildroot-external/board/asus/tinker/patches/linux/RK3288-1.8GHz-and-boost.patch Normal file
View File

@ -0,0 +1,80 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 58bd91539..9c0dac199 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -153,6 +153,75 @@
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1350000>;
};
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2088000000 {
+ opp-hz = /bits/ 64 <2088000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2112000000 {
+ opp-hz = /bits/ 64 <2112000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2136000000 {
+ opp-hz = /bits/ 64 <2136000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2160000000 {
+ opp-hz = /bits/ 64 <2160000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2184000000 {
+ opp-hz = /bits/ 64 <2184000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2208000000 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
};
amba {

68
buildroot-external/board/asus/tinker/patches/linux/assert-phy-reset-when-waking-up-in-rk3288-platform.patch
View File

@ -1,68 +0,0 @@
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index cc9c93af..3ff41d87 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -1021,6 +1021,7 @@ struct dwc2_hsotg {
u16 frame_number;
struct phy *phy;
+ struct work_struct phy_rst_work;
struct usb_phy *uphy;
struct dwc2_hsotg_plat *plat;
struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 19ae2595..f1270bf1 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -396,6 +396,7 @@ static void dwc2_wakeup_from_lpm_l1(struct dwc2_hsotg *hsotg)
static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
{
int ret;
+ struct device_node *np = hsotg->dev->of_node;
/* Clear interrupt */
dwc2_writel(hsotg, GINTSTS_WKUPINT, GINTSTS);
@@ -435,6 +436,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
/* Restart the Phy Clock */
pcgcctl &= ~PCGCTL_STOPPCLK;
dwc2_writel(hsotg, pcgcctl, PCGCTL);
+
+ /*
+ * It is a quirk in Rockchip RK3288, causing by
+ * a hardware bug. This will propagate out and
+ * eventually we'll re-enumerate the device.
+ * Not great but the best we can do.
+ */
+ if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
+ schedule_work(&hsotg->phy_rst_work);
+
mod_timer(&hsotg->wkp_timer,
jiffies + msecs_to_jiffies(71));
} else {
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 57764289..748763bd 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -208,6 +208,14 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
return ret;
}
+/* Only used to reset usb phy at interrupter runtime */
+static void dwc2_reset_phy_work(struct work_struct *data)
+{
+ struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg,
+ phy_rst_work);
+ phy_reset(hsotg->phy);
+}
+
static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
{
int i, ret;
@@ -252,6 +260,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
return ret;
}
}
+ INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work);
if (!hsotg->phy) {
hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);

42
buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch
View File

@ -1,25 +1,25 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 77554262..57cce114 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -612,6 +612,20 @@
vqmmc-supply = <&vccio_sd>;
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index f88c913ff..7f04ccbdf 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -547,3 +547,20 @@
&gpiomem {
status = "okay";
};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec_c0>;
+};

665
buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-support-older-eMMC-installs.patch
View File

@ -1,665 +0,0 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 2d0b2f4c4..d5c9022e7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -859,6 +859,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly-beta.dtb \
rk3288-firefly.dtb \
rk3288-firefly-reload.dtb \
+ rk3288-miniarm.dtb \
rk3288-miqi.dtb \
rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
new file mode 100644
index 000000000..d0961c35d
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -0,0 +1,647 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/rockchip,rk808.h>
+
+/ {
+ model = "Rockchip RK3288 Tinker Board";
+ compatible = "asus,rk3288-tinker", "rockchip,rk3288";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory {
+ reg = <0x0 0x0 0x0 0x80000000>;
+ device_type = "memory";
+ };
+
+ ext_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwrbtn>;
+
+ button@0 {
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "GPIO Key Power";
+ linux,input-type = <1>;
+ wakeup-source;
+ debounce-interval = <100>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ act-led {
+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger="mmc0";
+ };
+
+ heartbeat-led {
+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger="heartbeat";
+ };
+
+ pwr-led {
+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,tinker-codec";
+ simple-audio-card,mclk-fs = <512>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ };
+
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pwr>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "8723bs";
+ sdio_vref = <1800>;
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+/*
+ wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default","rts_gpio";
+ pinctrl-0 = <&uart0_rts>;
+ pinctrl-1 = <&uart0_gpios>;
+ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+*/
+
+};
+
+&cpu0 {
+ cpu0-supply = <&vdd_cpu>;
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ phy-supply = <&vcc33_lan>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio4 7 0>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 1000000>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+ status = "ok";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c5>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
+ <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_io>;
+ vcc9-supply = <&vcc_io>;
+ vcc10-supply = <&vcc_io>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_io>;
+ vddio-supply = <&vcc_io>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_arm";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_gpu";
+ regulator-ramp-delay = <6000>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_io";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc18_ldo1: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_ldo1";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc33_mipi: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_mipi";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd_10";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc18_codec: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_codec";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd10_lcd: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vcc_18: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_18";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_lcd: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_lcd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc33_sd: SWITCH_REG1 {
+ regulator-boot-on;
+ regulator-name = "vcc33_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc33_lan: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc33_lan";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2s {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+ rockchip,grf = <&grf>;
+ wifi-supply = <&vcc_18>;
+ sdcard-supply = <&vccio_sd>;
+};
+
+&sdio0 {
+ status = "okay";
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ supports-sdio;
+
+};
+
+&pinctrl {
+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
+ drive-strength = <8>;
+ };
+
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+ backlight {
+ bl_en: bl-en {
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ buttons {
+ pwrbtn: pwrbtn {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ eth_phy {
+ eth_phy_pwr: eth-phy-pwr {
+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic-int {
+ rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
+ &pcfg_pull_up>;
+ };
+
+ dvs_1: dvs-1 {
+ rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
+ &pcfg_pull_down>;
+ };
+
+ dvs_2: dvs-2 {
+ rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
+ &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <6 20 RK_FUNC_1 \
+ &pcfg_pull_none_drv_8ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ };
+
+ sdmmc_pwr: sdmmc-pwr {
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pwr_3g: pwr-3g {
+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcc18_ldo1>;
+ status ="okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp; /* wp not hooked up */
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+ supports-sd;
+ vmmc-supply = <&vcc33_sd>;
+ vqmmc-supply = <&vccio_sd>;
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host1 {
+ status = "okay";
+};
+
+&usb_otg {
+ status= "okay";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
+
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};

10
buildroot-external/board/asus/tinker/patches/linux/general-adjust-tinker-dts-hdmi-sound.patch
View File

@ -1,8 +1,8 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 958c0f3bf..59b8d8eac 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -70,7 +70,7 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 01be2bca9..5439e29e0 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -64,7 +64,7 @@
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";

19
buildroot-external/board/asus/tinker/patches/linux/general-fix-reboot-from-kwiboo.patch Normal file
View File

@ -0,0 +1,19 @@
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 5bd58b95d..48ebe081f 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1684,6 +1684,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
+ mmc_set_initial_signal_voltage(host);
+
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ mmc_delay(host->ios.power_delay_ms);
+
mmc_pwrseq_power_off(host);
host->ios.clock = 0;

27
buildroot-external/board/asus/tinker/patches/linux/general-increasing_DMA_block_memory_allocation_to_2048.patch
View File

@ -1,27 +0,0 @@
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 3216e09..21bce28
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
static struct gen_pool *atomic_pool;
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
static int __init early_coherent_pool(char *p)
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ada8eb2..8df220f
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
VM_ARM_DMA_CONSISTENT | VM_USERMAP);
}
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool __ro_after_init;
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;

22
buildroot-external/board/asus/tinker/patches/linux/remove-broken-dtb.patch Normal file
View File

@ -0,0 +1,22 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a98dee2ae..d3cef7033 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -916,17 +916,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
- rk3288-veyron-brain.dtb \
- rk3288-veyron-fievel.dtb \
- rk3288-veyron-jaq.dtb \
- rk3288-veyron-jerry.dtb \
- rk3288-veyron-mickey.dtb \
- rk3288-veyron-mighty.dtb \
- rk3288-veyron-minnie.dtb \
- rk3288-veyron-pinky.dtb \
- rk3288-veyron-speedy.dtb \
- rk3288-veyron-tiger.dtb \
rk3288-vyasa.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

24
buildroot-external/board/asus/tinker/patches/linux/wifi-2001-01-rtl8188eu-kconfig-makefile.patch
View File

@ -1,24 +0,0 @@
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 95cdb48fad061..db9ee74578012 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -32,6 +32,7 @@ config WIRELESS_WDS
source "drivers/net/wireless/admtek/Kconfig"
source "drivers/net/wireless/ath/Kconfig"
+source "drivers/net/wireless/rtl8188eu/Kconfig"
source "drivers/net/wireless/atmel/Kconfig"
source "drivers/net/wireless/broadcom/Kconfig"
source "drivers/net/wireless/cisco/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index edeb51f6fa551..2c4d8522929bf 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_WLAN_VENDOR_ADMTEK) += admtek/
obj-$(CONFIG_WLAN_VENDOR_ATH) += ath/
+obj-$(CONFIG_RTL8188EU) += rtl8188eu/
obj-$(CONFIG_WLAN_VENDOR_ATMEL) += atmel/
obj-$(CONFIG_WLAN_VENDOR_BROADCOM) += broadcom/
obj-$(CONFIG_WLAN_VENDOR_CISCO) += cisco/

315825
buildroot-external/board/asus/tinker/patches/linux/wifi-2002-02-rtl8188eu.patch
View File

File diff suppressed because it is too large Load Diff

423
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-add-device-tree.patch
View File

@ -1,6 +1,9 @@
diff --git a/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts
new file mode 100644
index 000000000..539e445b4
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts 2018-12-06 21:46:51.493688015 +0000
@@ -0,0 +1,969 @@
+++ b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts
@@ -0,0 +1,1061 @@
+/*
+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
@ -53,55 +56,11 @@
+ model = "XT-Q8L-V10-RK3288";
+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
+
+ memory {
+ memory@0 {
+ reg = <0x0 0x0 0x0 0x80000000>;
+ device_type = "memory";
+ };
+
+ cpu0_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ /*
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ */
+ };
+
+ /*
+ * Peripheral from original q8 device tree, currently no references
+ * for drivers in linux kernel.
@ -127,7 +86,7 @@
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ };
+
+
+ /*
+ * Handle the IR receiver using the gpio-ir-receiver kernel module.
+ * This works flawlessy, the original xt-q8l-v10 remote uses a NEC
@ -141,13 +100,13 @@
+ pinctrl-0 = <&ir_int>;
+ linux,rc-map-name = "rc-xt-q8l-v10";
+ wakeup-source;
+ };
+ };
+
+ keys: gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
@ -159,7 +118,7 @@
+ wakeup-source;
+ debounce-interval = <100>;
+ };
+
+
+ };
+
+ leds {
@ -171,7 +130,7 @@
+ so while there is mass storage access it turns red and
+ when it is idle is blue
+ */
+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+ label = "power";
+ linux,default-trigger = "mmc0";
+ pinctrl-names = "default";
@ -206,35 +165,34 @@
+ regulator-name = "vcc_flash";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ /*gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
+ states = <1800000 0>,
+ <3300000 1>;
+ */
+ vin-supply = <&vcc_io>;
+ startup-delay-us = <100000>;
+ };
+
+ vcc_host_5v: usb-host-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc_host_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+// startup-delay-us = <1000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vcc_sys>;
+ };
+
+
+ vcc_otg_5v: usb-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
+ regulator-name = "vcc_otg_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+// startup-delay-us = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vcc_sys>;
+ };
+
@ -249,7 +207,14 @@
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 29 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <100>;
+ };
+
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ pinctrl-0 = <&emmc_reset>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
+ };
+
+ /*
+ * Sound taken from tinkerboard device tree, adapted to q8.
+ */
@ -267,27 +232,27 @@
+ sound-dai = <&i2s>;
+ };
+ };
+
+ soundcard-spdif {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+ simple-audio-card,dai-link@1 {
+
+ cpu {
+ sound-dai = <&spdif>;
+ };
+
+ codec {
+ sound-dai = <&spdif_out>;
+ };
+
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+ soundcard-spdif {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+ simple-audio-card,dai-link@1 {
+
+ cpu {
+ sound-dai = <&spdif>;
+ };
+
+ codec {
+ sound-dai = <&spdif_out>;
+ };
+
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+};
+
@ -309,23 +274,6 @@
+
+&cpu0 {
+ cpu0-supply = <&vdd_cpu>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ /delete-node/operating-points;
+};
+
+&gmac {
@ -369,6 +317,9 @@
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: syr828@41 {
@ -381,6 +332,9 @@
+ regulator-ramp-delay = <8000>;
+ regulator-always-on;
+ vin-supply = <&vcc_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ hym8563: hym8563@51 {
@ -412,7 +366,7 @@
+ wakeup-source;
+
+ regulators {
+
+
+ /*
+ * Regulator controlling DDR memory - always on
+ */
@ -421,6 +375,12 @@
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -432,6 +392,12 @@
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -445,6 +411,12 @@
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -457,6 +429,12 @@
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -465,9 +443,16 @@
+ */
+ vccio_sd: REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ */
+ };
+
+ /*
@ -479,6 +464,12 @@
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -491,6 +482,14 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ /*
+ The regulator can be set off in suspend, but kernel 5.4 modifications
+ to enable suspend for ACT8865 device break the ACT8846
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -502,6 +501,14 @@
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on; // Turn this on to get SPDIF!
+
+ /*
+ The regulator can be set off in suspend, but kernel 5.4 modifications
+ to enable suspend for ACT8865 device break the ACT8846
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -511,6 +518,13 @@
+ regulator-name = "vcc_lan";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -522,6 +536,13 @@
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -533,6 +554,13 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ /*
+ * Broken in kernel 5.4
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ */
+ };
+
+ /*
@ -545,6 +573,14 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ /*
+ The regulator can be set off in suspend, but kernel 5.4 modifications
+ to enable suspend for ACT8865 device break the ACT8846
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ */
+ };
+ };
+ };
@ -559,7 +595,7 @@
+};
+
+&i2c4 {
+
+
+ /*
+ * Here should go the RK1000 audio codec parts, but seems that
+ * there is no driver in linux kernel at the moment, so we can't
@ -569,7 +605,7 @@
+ * http://dl.radxa.com/rock/docs/hw/ds/RK1000-S%20DATASHEET%20V14.pdf
+ */
+ status = "okay";
+
+
+};
+
+&i2c5 {
@ -599,12 +635,12 @@
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
+ bias-pull-up;
+ drive-strength = <8>;
+ };
+
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ bias-disable;
+ drive-strength = <8>;
@ -618,18 +654,18 @@
+ pcfg_wl_int: pcfg-wl-int {
+ bias-pull-up;
+ };
+
+
+ act8846 {
+
+
+ /*
+ * Original q8 device tree says:
+ * - gpio0 11 HIGH -> power hold
+ * - gpio7 1 LOW -> possibly pmic-vsel, we don't care
+ */
+ * - gpio7 1 LOW -> possibly pmic-vsel, we don't care
+ */
+ pmic_vsel: pmic-vsel {
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+
+
+ pwr_hold: pwr-hold {
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
@ -674,7 +710,7 @@
+ };
+
+ sdmmc {
+
+
+ /*
+ * Copied from firefly board definition to give more drive to
+ * the sdmmc pins. The Q8 seems to be quite able to drive
@ -725,14 +761,22 @@
+ };
+
+ };
+
+
+
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ emmc {
+
+ emmc_reset: emmc-reset {
+ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+};
+
+&saradc {
@ -741,24 +785,34 @@
+};
+
+&emmc {
+
+
+ /*
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
+ * vmmc-supply and vqmmc-supply are removed because they hang
+ * u-boot >= v2018.03
+ * From the original q8l firmware and eMMC datasheet it also should
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
+ * properties are not working
+ * eMMC is a 52Mhz DDR device on q8 devices, so set it here.
+ * Setting default-sample-rate to 180 degrees is very important,
+ * otherwise the eMMC is not stable and may not be able to negotiate
+ * the right clock.
+ * Despite the code already seems to use 180 degree phase when
+ * MMC + 8bit bus is set, we need to set default phase here too.
+ *
+ * Huge hint came from this patch:
+ * https://patchwork.kernel.org/patch/11129183/
+ *
+ */
+ clock-frequency = <50000000>;
+
+ broken-cd;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+
+ disable-wp;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc_flash>;
+
+ mmc-pwrseq = <&emmc_pwrseq>;
+ mmc-ddr-1_8v;
+ rockchip,default-sample-phase = <180>;
+
+ status = "okay";
+};
@ -769,7 +823,8 @@
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpio6 RK_PC6 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
@ -780,39 +835,40 @@
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+
+ status = "okay";
+};
+
+&sdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+
+ bus-width = <4>;
+ mmc-pwrseq = <&sdio0_pwrseq>;
+
+
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc_18>; // This must be the same as in io_domains,
+ vqmmc-supply = <&vcc_18>; // This must be the same as in io_domains,
+ // otherwise the mmc1 device won't be detected properly
+
+// clock-frequency = <50000000>;
+// max-frequency = <50000000>;
+
+ // clock-frequency = <50000000>;
+ // max-frequency = <50000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
+
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
+
+ cap-sdio-irq;
+ no-mmc;
+ no-sd;
+ cap-sd-highspeed; // required, otherwise does not work!
+ supports-sdio;
+ supports-sdio;
+ non-removable;
+
+
+ keep-power-in-suspend;
+ disable-wp;
+
+
+
+
+ status = "okay";
+
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
@ -820,8 +876,8 @@
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ status = "okay";
+ };
+
+ };
+
+ //sd-uhs-sdr104; // required to be disabled, otherwise the device get
+ // detected, but there is no communication
+
@ -843,13 +899,13 @@
+ * These dmas described here for uarts are present in original q8 board
+ * dts, so I replicate them here because documentation says that serial
+ * ports can have dmas.
+ * note:
+ * note:
+ * - uart0 is the serial port connected to the bluetooth module
+ * - uart2 is the onboard serial port
+ *
+ * - uart2 is the onboard serial port
+ *
+ * As ok kernel 4.19 DMA for serial ports is disabled because it makes
+ * the ports unusable
+ *
+ *
+ */
+&uart0 {
+ pinctrl-names = "default";
@ -893,31 +949,25 @@
+ * specify the proper resources for all the phys though.
+ * The reference patch which works in conjuction with the reset lines:
+ * https://patchwork.kernel.org/patch/9469811/
+ *
+ *
+ */
+&usbphy {
+ status = "okay";
+};
+
+&usbphy0 {
+ vbus-supply = <&vcc_otg_5v>;
+};
+
+&usbphy2 {
+ vbus-supply = <&vcc_host_5v>;
+};
+
+&usb_host0_ehci {
+ dr_mode = "host";
+ reg = <0x0 0xff500000 0x0 0x20000>;
+ status = "disable";
+ dr_mode = "host";
+ reg = <0x0 0xff500000 0x0 0x20000>;
+ status = "disable";
+};
+
+&usb_host1 {
+ vbus-supply = <&vcc_host_5v>;
+ status = "okay";
+};
+
+&usb_otg {
+ vbus-supply = <&vcc_otg_5v>;
+ status = "okay";
+};
+
@ -944,18 +994,10 @@
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
@ -970,3 +1012,56 @@
+&spdif {
+ status = "okay";
+};
+
+/*
+ * Redefine some thermals to give a bit more headroom (+5°C)
+ */
+&cpu_alert0 {
+ temperature = <75000>;
+};
+
+&cpu_alert1 {
+ temperature = <80000>;
+};
+
+&gpu_alert0 {
+ temperature = <75000>;
+};
+
+/*
+ * Retouch the operating points for higher frequencies to reduce
+ * the voltage required
+ */
+&cpu_opp_table {
+ opp-1512000000 {
+ opp-microvolt = <1250000>;
+ };
+
+ opp-1608000000 {
+ opp-microvolt = <1300000>;
+ };
+
+ /*
+ Remove the overclocking/turbo frequencies
+ */
+ /delete-node/ opp@1704000000;
+ /delete-node/ opp@1800000000;
+ /delete-node/ opp@1896000000;
+ /delete-node/ opp@1920000000;
+ /delete-node/ opp@1992000000;
+ /delete-node/ opp@2016000000;
+ /delete-node/ opp@2040000000;
+ /delete-node/ opp@2064000000;
+ /delete-node/ opp@2088000000;
+ /delete-node/ opp@2112000000;
+ /delete-node/ opp@2136000000;
+ /delete-node/ opp@2160000000;
+ /delete-node/ opp@2184000000;
+ /delete-node/ opp@2208000000;
+
+
+};
+
+&gpiomem {
+ status = "okay";
+};

3
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-add-dts-makefile.patch
View File

@ -7,6 +7,7 @@ index 37a3de760..6bcfceede 100644
rk3228-evb.dtb \
rk3229-evb.dtb \
+ rk3288-xt-q8l-v10.dtb \
rk3229-xms6.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
rk3288-fennec.dtb \

44
buildroot-external/board/asus/tinker/patches/linux/xt-q8l-v10-remote-keymap.patch
View File

@ -1,25 +1,3 @@
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index bfa3017..c2a21bb 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -277,6 +277,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_WINFAST "rc-winfast"
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_SU3000 "rc-su3000"
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
#define RC_MAP_ZX_IRDEC "rc-zx-irdec"
/*
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index d6b913a..ee00ce5 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -116,4 +116,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-winfast.o \
rc-winfast-usbii-deluxe.o \
rc-su3000.o \
+ rc-xt-q8l-v10.o \
rc-zx-irdec.o
diff --git a/drivers/media/rc/keymaps/rc-xt-q8l-v10.c b/drivers/media/rc/keymaps/rc-xt-q8l-v10.c
index e69de29..19c7d9e 100644
--- /dev/null
@ -101,3 +79,25 @@ index e69de29..19c7d9e 100644
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Paolo Sabatino");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index d621acadf..ad7abdb97 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -278,6 +278,7 @@ struct rc_map *rc_map_get(const char *name);
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_SU3000 "rc-su3000"
#define RC_MAP_XBOX_DVD "rc-xbox-dvd"
+#define RC_MAP_XT_Q8L_V10 "rc-xt-q8l-v10"
#define RC_MAP_X96MAX "rc-x96max"
/*
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 5b1399af6..ec9ce1206 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -117,4 +117,5 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-winfast-usbii-deluxe.o \
rc-su3000.o \
rc-xbox-dvd.o \
+ rc-xt-q8l-v10.o \
rc-x96max.o \

23
buildroot-external/board/asus/tinker/patches/uboot/0001-TLP-Modify-entrypoint-for-u-boot.patch Normal file
View File

@ -0,0 +1,23 @@
From 17735a28503d90db2a7173816861750f475580ea Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 12:41:50 +0000
Subject: [PATCH 1/1] TLP: Modify entrypoint for u-boot
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
configs/tinker-rk3288_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 83c3450839..648a7904be 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -84,3 +84,5 @@ CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x3000
+
--
2.17.1

115
buildroot-external/board/asus/tinker/patches/uboot/0017-Fix-HDMI-some-issues.patch.disabled
View File

@ -1,115 +0,0 @@
From 550e15099408decc58fb439edcd2e320570b8bf4 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 11 Aug 2017 17:47:45 +0800
Subject: [PATCH 17/50] Fix HDMI some issues
This patch:
use 1080P display_timing when connect 4K HDMI screen.
correct rockchip_mpll_config & rockchip_phy_config .mpixelclock.
add some hdmi-to-vga support
Change-Id: Ic7faf4dd7ea490051493397058aa5bad1d8788c1
---
common/Kconfig | 2 +-
drivers/video/dw_hdmi.c | 8 ++++----
drivers/video/rockchip/rk_vop.c | 14 ++++++++++++++
include/dw_hdmi.h | 4 ++--
4 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/common/Kconfig b/common/Kconfig
index 361346b092..355e816c9d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -245,7 +245,7 @@ endmenu
config BOOTDELAY
int "delay in seconds before automatically booting"
- default 2
+ default 5
depends on AUTOBOOT
help
Delay before automatically running bootcmd;
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 6039d676c5..0d7a7c228d 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -340,7 +340,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, u32 mpixelclock)
hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].cpce, PHY_OPMODE_PLLCFG);
hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].gmp, PHY_PLLGMPCTRL);
- hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].curr, PHY_PLLCURRCTRL);
+ hdmi_phy_i2c_write(hdmi, 0x0000, PHY_PLLCURRCTRL);
hdmi_phy_i2c_write(hdmi, 0x0000, PHY_PLLPHBYCTRL);
hdmi_phy_i2c_write(hdmi, 0x0006, PHY_PLLCLKBISTPHASE);
@@ -560,8 +560,8 @@ static int hdmi_read_edid(struct dw_hdmi *hdmi, int block, u8 *buff)
u32 n;
/* set ddc i2c clk which devided from ddc_clk to 100khz */
- hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
- hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+ //hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+ //hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
hdmi_mod(hdmi, HDMI_I2CM_DIV, HDMI_I2CM_DIV_FAST_STD_MODE,
HDMI_I2CM_DIV_STD_MODE);
@@ -663,7 +663,7 @@ int dw_hdmi_phy_wait_for_hpd(struct dw_hdmi *hdmi)
if (hdmi_get_plug_in_status(hdmi))
return 0;
udelay(100);
- } while (get_timer(start) < 300);
+ } while (get_timer(start) < 5000);
return -1;
}
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index c979049b5b..7bcc3df69b 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -277,6 +277,20 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
return ret;
}
+ /* Use 1080p display_timing when connect 4K HDMI screen */
+ if (timing.hactive.typ >= 3840) {
+ timing.pixelclock.typ = 148500000;
+ timing.hactive.typ = 1920;
+ timing.vactive.typ = 1080;
+ timing.hsync_len.typ = 44;
+ timing.hback_porch.typ = 148;
+ timing.vsync_len.typ = 5;
+ timing.vback_porch.typ = 36;
+ timing.hfront_porch.typ = 88;
+ timing.vfront_porch.typ = 4;
+ debug("Use default 1080P settings \n");
+ }
+
ret = clk_get_by_index(dev, 1, &clk);
if (!ret)
ret = clk_set_rate(&clk, timing.pixelclock.typ);
diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h
index 902abd4d44..c1f1fbff6a 100644
--- a/include/dw_hdmi.h
+++ b/include/dw_hdmi.h
@@ -448,7 +448,7 @@ enum {
};
struct hdmi_mpll_config {
- u64 mpixelclock;
+ u32 mpixelclock;
/* Mode of Operation and PLL Dividers Control Register */
u32 cpce;
/* PLL Gmp Control Register */
@@ -458,7 +458,7 @@ struct hdmi_mpll_config {
};
struct hdmi_phy_config {
- u64 mpixelclock;
+ u32 mpixelclock;
u32 sym_ctr; /* clock symbol and transmitter control */
u32 term; /* transmission termination value */
u32 vlev_ctr; /* voltage level control */
--
2.17.1

37
buildroot-external/board/asus/tinker/patches/uboot/0018-pmic-enable-LDO2-vcc33_mipi-at-bootup.patch
View File

@ -1,32 +1,28 @@
From d0d5938a3f8a524a884c460c5870c0c966daf152 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 11 Aug 2017 18:10:22 +0800
Subject: [PATCH 18/50] pmic: enable LDO2 vcc33_mipi at bootup
From 4147d34a63f74f78a8ff9a3dcf2f4c9cd8d6be3a Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 11:37:55 +0000
Subject: [PATCH 1/1] pmic: enable LDO2 vcc33_mipi at bootup
power up camera module to prevent i2c-2 SDA pulled low
Change-Id: I199bef9c8aa4385dbda33117e2ca0c64dc7a13d4
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
board/rockchip/tinker_rk3288/tinker-rk3288.c | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
mode change 100644 => 100755 board/rockchip/tinker_rk3288/tinker-rk3288.c
board/rockchip/tinker_rk3288/tinker-rk3288.c | 37 ++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index c2872e7330..5618bd9923 100644
index 7af39e10cd..f12409933d 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -8,6 +8,8 @@
#include <dm.h>
#include <i2c_eeprom.h>
@@ -12,6 +12,7 @@
#include <netdev.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/io.h>
+#include <power/regulator.h>
+
static int get_ethaddr_from_eeprom(u8 *addr)
{
@@ -33,3 +35,39 @@ int rk_board_late_init(void)
return 0;
@@ -47,3 +48,39 @@ int mmc_get_env_dev(void)
return 1;
}
+
+
@ -64,7 +60,6 @@ index c2872e7330..5618bd9923 100644
+ return 0;
+}
+#endif
\ No newline at end of file
--
--
2.17.1

206
buildroot-external/board/asus/tinker/patches/uboot/0036-auto-enable-ums-mode-when-TinkerBoard-is-connected-t.patch
View File

@ -1,206 +0,0 @@
From 11b9e1141895e719e2ad4421f746c4b5359c671b Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Thu, 12 Oct 2017 11:47:27 +0800
Subject: [PATCH 36/50] auto enable ums mode when TinkerBoard is connected to
PC
Change-Id: Ice3f37906ab1ae0428c1d23867a58c5c720aa8ab
---
arch/arm/include/asm/arch-rockchip/gpio.h | 22 ++++++++
arch/arm/mach-rockchip/rk3288-board.c | 62 +++++++++++++++++++++++
cmd/usb_mass_storage.c | 2 +-
common/autoboot.c | 17 +++++++
common/board_r.c | 1 +
include/common.h | 1 +
6 files changed, 104 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h b/arch/arm/include/asm/arch-rockchip/gpio.h
index e39218d0a9..10f4f41e67 100644
--- a/arch/arm/include/asm/arch-rockchip/gpio.h
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
@@ -25,4 +25,26 @@ struct rockchip_gpio_regs {
};
check_member(rockchip_gpio_regs, ls_sync, 0x60);
+/*
+ * RK3288 IO memory map:
+ *
+ */
+#define RKIO_GPIO0_PHYS 0xFF750000
+#define RKIO_GRF_PHYS 0xFF770000
+#define RKIO_GPIO1_PHYS 0xFF780000
+#define RKIO_GPIO2_PHYS 0xFF790000
+#define RKIO_GPIO3_PHYS 0xFF7A0000
+#define RKIO_GPIO4_PHYS 0xFF7B0000
+#define RKIO_GPIO5_PHYS 0xFF7C0000
+#define RKIO_GPIO6_PHYS 0xFF7D0000
+
+/* gpio power down/up control */
+#define GRF_GPIO2A_P 0x150
+#define GRF_GPIO6A_P 0x190
+
+/* gpio input/output control */
+#define GPIO_SWPORT_DR 0x00
+#define GPIO_SWPORT_DDR 0x04
+#define GPIO_EXT_PORT 0x50
+
#endif
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index f1569e62b6..32f70a5920 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -22,6 +22,19 @@
DECLARE_GLOBAL_DATA_PTR;
+enum project_id {
+ TinkerBoardS = 0,
+ TinkerBoard = 7,
+};
+
+enum pcb_id {
+ SR,
+ ER,
+ PR,
+};
+
+extern bool force_ums;
+
__weak int rk_board_late_init(void)
{
return 0;
@@ -91,6 +104,55 @@ int board_late_init(void)
return rk_board_late_init();
}
+int check_force_enter_ums_mode(void)
+{
+ int tmp;
+ enum pcb_id pcbid;
+ enum project_id projectid;
+
+ // GPIO2_A1/GPIO2_A2/GPIO2_A3 pull up enable
+ // please check TRM V1.2 part1 page 152
+ tmp = readl(RKIO_GRF_PHYS + GRF_GPIO2A_P);
+ writel((tmp&~(0x03F<<2)) | 0x3F<<(16 + 2) | 0x15<<2, RKIO_GRF_PHYS + GRF_GPIO2A_P);
+
+ // GPIO2_A1/GPIO2_A2/GPIO2_A3/GPIO2_B0/GPIO2_B1/GPIO2_B2 set to input
+ tmp = readl(RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp & ~(0x70E), RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
+
+ // GPIO6_A5 pull up/down disable
+ tmp = readl(RKIO_GRF_PHYS + GRF_GPIO6A_P);
+ writel((tmp&~(0x03<<10)) | 0x03<<(16 + 10), RKIO_GRF_PHYS + GRF_GPIO6A_P);
+
+ // GPIO6_A5 set to input
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp & ~(0x20), RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+
+ mdelay(10);
+
+ // read GPIO2_A1/GPIO2_A2/GPIO2_A3 value
+ projectid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x0E) >>1;
+
+ // read GPIO2_B0/GPIO2_B1/GPIO2_B2 value
+ pcbid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x700) >> 8;
+
+ // only Tinker Board S and the PR stage PCB has this function
+ if(projectid!=TinkerBoard && pcbid >= ER){
+ printf("PC event = 0x%x\n", readl(RKIO_GPIO6_PHYS + GPIO_EXT_PORT)&0x20);
+ if((readl(RKIO_GPIO6_PHYS + GPIO_EXT_PORT)&0x20)==0x20) {
+ // SDP detected, enable EMMC and unlock usb current limit
+ printf("usb connected to SDP, force enter ums mode\n");
+ force_ums = true;
+ // unlock usb current limit and re-enable EMMC
+ // set GPIO6_A6, GPIO6_A7 to high
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ }
+ }
+ return 0;
+}
+
#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
static int veyron_init(void)
{
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 3353f95c74..cb5260b558 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -133,7 +133,7 @@ cleanup:
return ret;
}
-static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
+int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
const char *usb_controller;
diff --git a/common/autoboot.c b/common/autoboot.c
index c52bad84a4..d63a4d7e79 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -28,6 +28,8 @@ DECLARE_GLOBAL_DATA_PTR;
/* Stored value of bootdelay, used by autoboot_command() */
static int stored_bootdelay;
+bool force_ums = false;
+
#if defined(CONFIG_AUTOBOOT_KEYED)
#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
@@ -339,10 +341,25 @@ const char *bootdelay_process(void)
return s;
}
+extern int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+
void autoboot_command(const char *s)
{
debug("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
+ if (force_ums) {
+ // force to enter ums mode
+ char *local_args[4];
+ char str1[]="ums", str2[]="1", str3[]="mmc", str4[]="0";
+
+ local_args[0]=str1;
+ local_args[1]=str2;
+ local_args[2]=str3;
+ local_args[3]=str4;
+ do_usb_mass_storage(NULL, 0, 4, local_args);
+ return;
+ }
+
if (stored_bootdelay != -1 && s && !abortboot(stored_bootdelay)) {
#if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
int prev = disable_ctrlc(1); /* disable Control C checking */
diff --git a/common/board_r.c b/common/board_r.c
index ecca1edb04..77b3a05693 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -800,6 +800,7 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_CMD_ONENAND
initr_onenand,
#endif
+ check_force_enter_ums_mode,
#ifdef CONFIG_MMC
initr_mmc,
#endif
diff --git a/include/common.h b/include/common.h
index 751665f8a4..13a6e563c3 100644
--- a/include/common.h
+++ b/include/common.h
@@ -418,6 +418,7 @@ extern ssize_t spi_write (uchar *, int, uchar *, int);
int board_early_init_f (void);
int board_fix_fdt (void *rw_fdt_blob); /* manipulate the U-Boot fdt before its relocation */
int board_late_init (void);
+int check_force_enter_ums_mode (void);
int board_postclk_init (void); /* after clocks/timebase, before env/serial */
int board_early_init_r (void);
void board_poweroff (void);
--
2.17.1

25
buildroot-external/board/asus/tinker/patches/uboot/0037-add-10ms-delay-after-re-enable-EMMC.patch
View File

@ -1,25 +0,0 @@
From b41031b54e5d4355d2f27f7297b72c030f435167 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Tue, 17 Oct 2017 14:38:28 +0800
Subject: [PATCH 37/50] add 10ms delay after re-enable EMMC
Change-Id: I022d050be22c5436822cb2057e70b17d88e65d7a
---
arch/arm/mach-rockchip/rk3288-board.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 32f70a5920..07f4125780 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -136,6 +136,7 @@ int check_force_enter_ums_mode(void)
writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ mdelay(10);
}
}
return 0;
--
2.17.1

160
buildroot-external/board/asus/tinker/patches/uboot/0039-fixed-enter-ums-mode-fail-sometimes.patch
View File

@ -1,160 +0,0 @@
From eff570086cca1c909725dc71b26b84f5bfd2b7a9 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 27 Oct 2017 16:09:06 +0800
Subject: [PATCH 39/50] fixed enter ums mode fail sometimes
Change-Id: I9e40cb0d8d5873588f7bf9b844e036071d13ff16
---
arch/arm/mach-rockchip/rk3288-board-spl.c | 22 +++++++
arch/arm/mach-rockchip/rk3288-board.c | 70 +++++++++++++++++++----
2 files changed, 80 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index a0d0ce2ff4..5f7ff2dc49 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -185,6 +185,27 @@ static int phycore_init(void)
}
#endif
+/*
+*
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+*
+*/
+void usb_current_limit_ctrl(bool unlock_current)
+{
+ int tmp;
+
+#include <asm/arch/gpio.h>
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(unlock_current == true)
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+}
+
void board_init_f(ulong dummy)
{
struct udevice *pinctrl;
@@ -213,6 +234,7 @@ void board_init_f(ulong dummy)
*/
debug_uart_init();
debug("\nspl:debug uart enabled in %s\n", __func__);
+ usb_current_limit_ctrl(true);
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 07f4125780..f73520925b 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -92,18 +92,67 @@ int board_late_init(void)
return rk_board_late_init();
}
+/*
+*
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+*
+*/
+void usb_current_limit_ctrl(bool unlock_current)
+{
+ int tmp;
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(unlock_current == true)
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+}
+
+/*
+*
+* eMMC maskrom mode : GPIO6_A7 (H:disable maskrom, L:enable maskrom)
+*
+*/
+void rk3288_maskrom_ctrl(bool enable_emmc)
+{
+ int tmp;
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(enable_emmc == true)
+ writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ mdelay(10);
+}
+
+/*
+*
+* project id : GPIO2_A3 GPIO2_A2 GPIO2_A1
+* pcb id : GPIO2_B2 GPIO2_B1 GPIO2_B0
+* SDP/CDP : GPIO6_A5 (H:SDP, L:CDP)
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+* eMMC maskrom mode : GPIO6_A7 (H:disable maskrom, L:enable maskrom)
+*
+* Please check TRM V1.2 part1 page 152 for the following register settings
+*
+*/
int check_force_enter_ums_mode(void)
{
int tmp;
enum pcb_id pcbid;
enum project_id projectid;
- // GPIO2_A1/GPIO2_A2/GPIO2_A3 pull up enable
- // please check TRM V1.2 part1 page 152
+ // GPIO2_A3/GPIO2_A2/GPIO2_A1 pull up enable
tmp = readl(RKIO_GRF_PHYS + GRF_GPIO2A_P);
writel((tmp&~(0x03F<<2)) | 0x3F<<(16 + 2) | 0x15<<2, RKIO_GRF_PHYS + GRF_GPIO2A_P);
- // GPIO2_A1/GPIO2_A2/GPIO2_A3/GPIO2_B0/GPIO2_B1/GPIO2_B2 set to input
+ // GPIO2_A3/GPIO2_A2/GPIO2_A1/GPIO2_B2/GPIO2_B1/GPIO2_B0 set to input
tmp = readl(RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
writel(tmp & ~(0x70E), RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
@@ -117,10 +166,10 @@ int check_force_enter_ums_mode(void)
mdelay(10);
- // read GPIO2_A1/GPIO2_A2/GPIO2_A3 value
+ // read GPIO2_A3/GPIO2_A2/GPIO2_A1 value
projectid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x0E) >>1;
- // read GPIO2_B0/GPIO2_B1/GPIO2_B2 value
+ // read GPIO2_B2/GPIO2_B1/GPIO2_B0 value
pcbid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x700) >> 8;
// only Tinker Board S and the PR stage PCB has this function
@@ -130,13 +179,10 @@ int check_force_enter_ums_mode(void)
// SDP detected, enable EMMC and unlock usb current limit
printf("usb connected to SDP, force enter ums mode\n");
force_ums = true;
- // unlock usb current limit and re-enable EMMC
- // set GPIO6_A6, GPIO6_A7 to high
- tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
- writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
- tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
- writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
- mdelay(10);
+ rk3288_maskrom_ctrl(true);
+ usb_current_limit_ctrl(true);
+ } else {
+ usb_current_limit_ctrl(false);
}
}
return 0;
--
2.17.1

32
buildroot-external/board/asus/tinker/patches/uboot/0045-modify-UMS-name-of-uboot.patch
View File

@ -1,32 +0,0 @@
From f5ada57f6298f3485e1fc6250ca2ab3be28862bb Mon Sep 17 00:00:00 2001
From: scorpio_chang <Scorpio_Chang@asus.com>
Date: Thu, 1 Feb 2018 09:46:47 +0800
Subject: [PATCH 45/50] modify UMS name of uboot
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Change-Id: Ibab54e15374db3c3c88460d2c3180e9787e4c426
Reviewed-on: https://tp-biosrd-v02/gerrit/82114
Reviewed-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
Tested-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
---
cmd/usb_mass_storage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index cb5260b558..4c3da13115 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -108,7 +108,7 @@ static int ums_init(const char *devtype, const char *devnums_part_str)
name = malloc(UMS_NAME_LEN);
if (!name)
goto cleanup;
- snprintf(name, UMS_NAME_LEN, "UMS disk %d", ums_count);
+ snprintf(name, UMS_NAME_LEN, "Armbian UMS disk %d", ums_count);
ums[ums_count].name = name;
ums[ums_count].block_dev = *block_dev;
--
2.17.1

146
buildroot-external/board/asus/tinker/patches/uboot/0049-added-timeout-when-force-entering-UMS-mode.patch
View File

@ -1,146 +0,0 @@
From 7ffd3d083ac59f2b40ebea5b10334c541a5c6311 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Thu, 22 Feb 2018 15:28:45 +0800
Subject: [PATCH 49/50] added timeout when force entering UMS mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Change-Id: I971d105a86628fa4282d1d801e05fabebf0b6569
Reviewed-on: https://tp-biosrd-v02/gerrit/82232
Reviewed-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
Tested-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
---
arch/arm/mach-rockchip/rk3288-board.c | 4 +++-
cmd/usb_mass_storage.c | 4 ++++
common/autoboot.c | 8 ++++++--
drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 1 +
drivers/usb/gadget/f_mass_storage.c | 10 +++++++++-
include/linux/usb/gadget.h | 3 +++
6 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index f73520925b..1e40429af9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -101,6 +101,7 @@ void usb_current_limit_ctrl(bool unlock_current)
{
int tmp;
+ printf("%s: unlock_current = %d\n", __func__, unlock_current);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
if(unlock_current == true)
writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
@@ -120,6 +121,7 @@ void rk3288_maskrom_ctrl(bool enable_emmc)
{
int tmp;
+ printf("%s: enable_emmc = %d\n", __func__, enable_emmc);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
if(enable_emmc == true)
writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 4c3da13115..806b2e3dc0 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -215,6 +215,10 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
usb_gadget_handle_interrupts(controller_index);
rc = fsg_main_thread(NULL);
+
+ if (rc == -ETIMEDOUT) {
+ goto cleanup_register;
+ }
if (rc) {
/* Check I/O error */
if (rc == -EIO)
diff --git a/common/autoboot.c b/common/autoboot.c
index d63a4d7e79..81b6579f7c 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -29,6 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int stored_bootdelay;
bool force_ums = false;
+bool getdescriptor = false;
#if defined(CONFIG_AUTOBOOT_KEYED)
#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
@@ -356,8 +357,11 @@ void autoboot_command(const char *s)
local_args[1]=str2;
local_args[2]=str3;
local_args[3]=str4;
- do_usb_mass_storage(NULL, 0, 4, local_args);
- return;
+
+ if (do_usb_mass_storage(NULL, 0, 4, local_args) == -ETIMEDOUT) {
+ rk3288_maskrom_ctrl(false);
+ usb_current_limit_ctrl(false);
+ }
}
if (stored_bootdelay != -1 && s && !abortboot(stored_bootdelay)) {
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 0d6d2fba8a..b9277b8b0a 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -1368,6 +1368,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
debug_cond(DEBUG_SETUP != 0,
"%s: *** USB_REQ_GET_DESCRIPTOR\n",
__func__);
+ getdescriptor = true;
break;
case USB_REQ_SET_INTERFACE:
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1ecb92ac6b..aad8fa4951 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -666,7 +666,7 @@ static void busy_indicator(void)
static int sleep_thread(struct fsg_common *common)
{
int rc = 0;
- int i = 0, k = 0;
+ int i = 0, k = 0, j = 0;
/* Wait until a signal arrives or we are woken up */
for (;;) {
@@ -677,6 +677,7 @@ static int sleep_thread(struct fsg_common *common)
busy_indicator();
i = 0;
k++;
+ j++;
}
if (k == 10) {
@@ -691,6 +692,13 @@ static int sleep_thread(struct fsg_common *common)
k = 0;
}
+ if (j == 300) { //about 3 seconds
+ if(force_ums && !getdescriptor) {
+ printf("wait for usb get descriptor cmd timeout\n");
+ return -ETIMEDOUT;
+ }
+ }
+
usb_gadget_handle_interrupts(0);
}
common->thread_wakeup_needed = 0;
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index b824f13477..305cc56b04 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -24,6 +24,9 @@
struct usb_ep;
+extern bool force_ums;
+extern bool getdescriptor;
+
/**
* struct usb_request - describes one i/o request
* @buf: Buffer used for data. Always provide this; some controllers
--
2.17.1

17
buildroot-external/board/asus/tinker/patches/uboot/0050-USB-VID-PID.patch
View File

@ -1,17 +0,0 @@
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index ac878c71..e2bed4e0 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -72,9 +72,9 @@ CONFIG_USB_DWC2=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
+CONFIG_USB_GADGET_MANUFACTURER="ASUS"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0b05
+CONFIG_USB_GADGET_PRODUCT_NUM=0x7820
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_USB_HOST_ETHER=y

54
buildroot-external/board/asus/tinker/patches/uboot/100-tinker-s-eMMC-bootable.patch
View File

@ -1,54 +0,0 @@
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index a752458..14cca73 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -143,6 +143,21 @@
vqmmc-supply = <&vccio_sd>;
};
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 58eea3c..cc585dc 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -7,17 +7,14 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define ROCKCHIP_DEVICE_SETTINGS
-#include <configs/rk3288_common.h>
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,cros-ec-keyb\0"\
+ "stdout=serial,vidconsole\0"\
+ "stderr=serial,vidconsole\0"
-#undef BOOT_TARGET_DEVICES
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dchp, na)
+#include <configs/rk3288_common.h>
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
#endif

25
buildroot-external/board/asus/tinker/patches/uboot/101-u-boot-0002-rockchip-tinker-enable-rockchip-video-driver.patch.disabled
View File

@ -1,25 +0,0 @@
From cd0236ef771fd72e2975ca294ba2f1872d7dbc0b Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 22 Oct 2017 12:48:24 +0200
Subject: [PATCH 2/2] rockchip: tinker: enable rockchip video driver
---
configs/tinker-rk3288_defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 1315be3ee8..3a81328b48 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -78,6 +78,11 @@ CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y

9
buildroot-external/configs/tinker_defconfig
View File

@ -24,7 +24,7 @@ BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/hassos-hook.sh"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.19.88"
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.4.32"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/docker.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
@ -85,16 +85,17 @@ BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.11"
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2020.01"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-rk3288"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot.config"
BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
BR2_TARGET_UBOOT_NEEDS_PYLIBFDT=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl-dtb.bin"
BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl.bin tpl/u-boot-tpl.bin"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/asus/tinker/uboot-boot.ush"
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_19=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_4=y
BR2_PACKAGE_HOST_DOSFSTOOLS=y
BR2_PACKAGE_HOST_E2FSPROGS=y
BR2_PACKAGE_HOST_GPTFDISK=y