diff --git a/buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-arm-bcm-Convert-BCM2835-firmware-binding.patch b/buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-arm-bcm-Convert-BCM2835-firmware-binding.patch index 88696e9ec..7c860ccf2 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-arm-bcm-Convert-BCM2835-firmware-binding.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0001-dt-bindings-arm-bcm-Convert-BCM2835-firmware-binding.patch @@ -1,5 +1,5 @@ From 3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73 Mon Sep 17 00:00:00 2001 -Message-Id: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Florian Fainelli Date: Mon, 15 Jun 2020 10:40:41 +0200 Subject: [PATCH 1/8] dt-bindings: arm: bcm: Convert BCM2835 firmware binding @@ -83,5 +83,5 @@ index 000000000000..cec540c052b6 + }; +... -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0002-dt-bindings-clock-Add-a-binding-for-the-RPi-Firmware.patch b/buildroot-external/board/raspberrypi/patches/linux/0002-dt-bindings-clock-Add-a-binding-for-the-RPi-Firmware.patch index 5321d3571..a9be7c49d 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0002-dt-bindings-clock-Add-a-binding-for-the-RPi-Firmware.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0002-dt-bindings-clock-Add-a-binding-for-the-RPi-Firmware.patch @@ -1,7 +1,7 @@ From 3ad7fb9329eabd1d7f692f612742ca5ac38854a5 Mon Sep 17 00:00:00 2001 -Message-Id: <3ad7fb9329eabd1d7f692f612742ca5ac38854a5.1604762912.git.stefan@agner.ch> -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: <3ad7fb9329eabd1d7f692f612742ca5ac38854a5.1605346684.git.stefan@agner.ch> +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Maxime Ripard Date: Mon, 15 Jun 2020 10:40:42 +0200 Subject: [PATCH 2/8] dt-bindings: clock: Add a binding for the RPi Firmware @@ -67,5 +67,5 @@ index cec540c052b6..b48ed875eb8e 100644 }; ... -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0003-dt-bindings-arm-bcm-Add-a-select-to-the-RPI-Firmware.patch b/buildroot-external/board/raspberrypi/patches/linux/0003-dt-bindings-arm-bcm-Add-a-select-to-the-RPI-Firmware.patch index d650ccd25..3fe2ba0b6 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0003-dt-bindings-arm-bcm-Add-a-select-to-the-RPI-Firmware.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0003-dt-bindings-arm-bcm-Add-a-select-to-the-RPI-Firmware.patch @@ -1,7 +1,7 @@ From 305aeb868929695699e04e26dd590e64ad3c42dd Mon Sep 17 00:00:00 2001 -Message-Id: <305aeb868929695699e04e26dd590e64ad3c42dd.1604762912.git.stefan@agner.ch> -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: <305aeb868929695699e04e26dd590e64ad3c42dd.1605346684.git.stefan@agner.ch> +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Maxime Ripard Date: Fri, 26 Jun 2020 13:54:33 +0200 Subject: [PATCH 3/8] dt-bindings: arm: bcm: Add a select to the RPI Firmware @@ -46,5 +46,5 @@ index b48ed875eb8e..17e4f20c8d39 100644 compatible: items: -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0004-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch b/buildroot-external/board/raspberrypi/patches/linux/0004-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch index 401580baa..f64bd028b 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0004-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0004-dt-bindings-reset-Add-a-binding-for-the-RPi-Firmware.patch @@ -1,7 +1,7 @@ From 33743cfcff296b1011e46168ecab185a00e0f00d Mon Sep 17 00:00:00 2001 -Message-Id: <33743cfcff296b1011e46168ecab185a00e0f00d.1604762912.git.stefan@agner.ch> -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: <33743cfcff296b1011e46168ecab185a00e0f00d.1605346684.git.stefan@agner.ch> +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Nicolas Saenz Julienne Date: Mon, 29 Jun 2020 18:18:37 +0200 Subject: [PATCH 4/8] dt-bindings: reset: Add a binding for the RPi Firmware @@ -79,5 +79,5 @@ index 000000000000..1a4f4c792723 + +#endif -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0005-ARM-dts-bcm2711-Add-firmware-usb-reset-node.patch b/buildroot-external/board/raspberrypi/patches/linux/0005-ARM-dts-bcm2711-Add-firmware-usb-reset-node.patch index 11a9f34be..52c050e46 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0005-ARM-dts-bcm2711-Add-firmware-usb-reset-node.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0005-ARM-dts-bcm2711-Add-firmware-usb-reset-node.patch @@ -1,7 +1,7 @@ From fecb02cc3664de0d1c43ce566ff95c1b68fca51e Mon Sep 17 00:00:00 2001 -Message-Id: -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Nicolas Saenz Julienne Date: Mon, 29 Jun 2020 18:18:39 +0200 Subject: [PATCH 5/8] ARM: dts: bcm2711: Add firmware usb reset node @@ -35,5 +35,5 @@ index 21b20e334b1a..d77d61d41bbc 100644 &gpio { -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0006-ARM-dts-bcm2711-Add-reset-controller-to-xHCI-node.patch b/buildroot-external/board/raspberrypi/patches/linux/0006-ARM-dts-bcm2711-Add-reset-controller-to-xHCI-node.patch index 57f85dae1..32b65b20f 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0006-ARM-dts-bcm2711-Add-reset-controller-to-xHCI-node.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0006-ARM-dts-bcm2711-Add-reset-controller-to-xHCI-node.patch @@ -1,7 +1,7 @@ From e0231cd65d8c13be1cebae1e6b5fbef61be6be0d Mon Sep 17 00:00:00 2001 -Message-Id: -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> +Message-Id: +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Nicolas Saenz Julienne Date: Mon, 29 Jun 2020 18:18:40 +0200 Subject: [PATCH 6/8] ARM: dts: bcm2711: Add reset controller to xHCI node @@ -56,5 +56,5 @@ index d77d61d41bbc..513cae21e64c 100644 &uart0 { pinctrl-names = "default"; -- -2.29.1 +2.29.2 diff --git a/buildroot-external/board/raspberrypi/patches/linux/0007-arch-pgtable-define-MAX_POSSIBLE_PHYSMEM_BITS-where-.patch b/buildroot-external/board/raspberrypi/patches/linux/0007-arch-pgtable-define-MAX_POSSIBLE_PHYSMEM_BITS-where-.patch new file mode 100644 index 000000000..b42684790 --- /dev/null +++ b/buildroot-external/board/raspberrypi/patches/linux/0007-arch-pgtable-define-MAX_POSSIBLE_PHYSMEM_BITS-where-.patch @@ -0,0 +1,233 @@ +From 5038cc5a33a1534bd0e521674314938224838ce4 Mon Sep 17 00:00:00 2001 +Message-Id: <5038cc5a33a1534bd0e521674314938224838ce4.1605346684.git.stefan@agner.ch> +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +From: Arnd Bergmann +Date: Fri, 13 Nov 2020 15:59:32 +0100 +Subject: [PATCH 7/8] arch: pgtable: define MAX_POSSIBLE_PHYSMEM_BITS where + needed + +Stefan Agner reported a bug when using zsram on 32-bit Arm machines +with RAM above the 4GB address boundary: + + Unable to handle kernel NULL pointer dereference at virtual address 00000000 + pgd = a27bd01c + [00000000] *pgd=236a0003, *pmd=1ffa64003 + Internal error: Oops: 207 [#1] SMP ARM + Modules linked in: mdio_bcm_unimac(+) brcmfmac cfg80211 brcmutil raspberrypi_hwmon hci_uart crc32_arm_ce bcm2711_thermal phy_generic genet + CPU: 0 PID: 123 Comm: mkfs.ext4 Not tainted 5.9.6 #1 + Hardware name: BCM2711 + PC is at zs_map_object+0x94/0x338 + LR is at zram_bvec_rw.constprop.0+0x330/0xa64 + pc : [] lr : [] psr: 60000013 + sp : e376bbe0 ip : 00000000 fp : c1e2921c + r10: 00000002 r9 : c1dda730 r8 : 00000000 + r7 : e8ff7a00 r6 : 00000000 r5 : 02f9ffa0 r4 : e3710000 + r3 : 000fdffe r2 : c1e0ce80 r1 : ebf979a0 r0 : 00000000 + Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user + Control: 30c5383d Table: 235c2a80 DAC: fffffffd + Process mkfs.ext4 (pid: 123, stack limit = 0x495a22e6) + Stack: (0xe376bbe0 to 0xe376c000) + +As it turns out, zsram needs to know the maximum memory size, which +is defined in MAX_PHYSMEM_BITS when CONFIG_SPARSEMEM is set, or in +MAX_POSSIBLE_PHYSMEM_BITS on the x86 architecture. + +The same problem will be hit on all 32-bit architectures that have a +physical address space larger than 4GB and happen to not enable sparsemem +and include asm/sparsemem.h from asm/pgtable.h. + +After the initial discussion, I suggested just always defining +MAX_POSSIBLE_PHYSMEM_BITS whenever CONFIG_PHYS_ADDR_T_64BIT is +set, or provoking a build error otherwise. This addresses all +configurations that can currently have this runtime bug, but +leaves all other configurations unchanged. + +I looked up the possible number of bits in source code and +datasheets, here is what I found: + + - on ARC, CONFIG_ARC_HAS_PAE40 controls whether 32 or 40 bits are used + - on ARM, CONFIG_LPAE enables 40 bit addressing, without it we never + support more than 32 bits, even though supersections in theory allow + up to 40 bits as well. + - on MIPS, some MIPS32r1 or later chips support 36 bits, and MIPS32r5 + XPA supports up to 60 bits in theory, but 40 bits are more than + anyone will ever ship + - On PowerPC, there are three different implementations of 36 bit + addressing, but 32-bit is used without CONFIG_PTE_64BIT + - On RISC-V, the normal page table format can support 34 bit + addressing. There is no highmem support on RISC-V, so anything + above 2GB is unused, but it might be useful to eventually support + CONFIG_ZRAM for high pages. + +Fixes: 61989a80fb3a ("staging: zsmalloc: zsmalloc memory allocation library") +Fixes: 02390b87a945 ("mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS") +Cc: Stefan Agner +Cc: Mike Rapoport +Cc: Kirill A. Shutemov +Cc: Nitin Gupta +Cc: Minchan Kim +Cc: Vineet Gupta +Cc: linux-snps-arc@lists.infradead.org +Cc: Russell King +Cc: linux-arm-kernel@lists.infradead.org +Cc: Thomas Bogendoerfer +Cc: linux-mips@vger.kernel.org +Cc: Michael Ellerman +Cc: Benjamin Herrenschmidt +Cc: Paul Mackerras +Cc: linuxppc-dev@lists.ozlabs.org +Cc: Paul Walmsley +Cc: Palmer Dabbelt +Cc: Albert Ou +Cc: linux-riscv@lists.infradead.org +Link: https://lore.kernel.org/linux-mm/bdfa44bf1c570b05d6c70898e2bbb0acf234ecdf.1604762181.git.stefan@agner.ch/ +Signed-off-by: Arnd Bergmann +--- + arch/arc/include/asm/pgtable.h | 2 ++ + arch/arm/include/asm/pgtable-2level.h | 2 ++ + arch/arm/include/asm/pgtable-3level.h | 2 ++ + arch/mips/include/asm/pgtable-32.h | 3 +++ + arch/powerpc/include/asm/book3s/32/pgtable.h | 2 ++ + arch/powerpc/include/asm/nohash/32/pgtable.h | 2 ++ + arch/riscv/include/asm/pgtable-32.h | 2 ++ + include/asm-generic/pgtable.h | 13 +++++++++++++ + 8 files changed, 28 insertions(+) + +diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h +index 7addd0301c51..6bdcf9b495b8 100644 +--- a/arch/arc/include/asm/pgtable.h ++++ b/arch/arc/include/asm/pgtable.h +@@ -135,8 +135,10 @@ + + #ifdef CONFIG_ARC_HAS_PAE40 + #define PTE_BITS_NON_RWX_IN_PD1 (0xff00000000 | PAGE_MASK | _PAGE_CACHEABLE) ++#define MAX_POSSIBLE_PHYSMEM_BITS 40 + #else + #define PTE_BITS_NON_RWX_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE) ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 + #endif + + /************************************************************************** +diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h +index 51beec41d48c..50b51ac91fcb 100644 +--- a/arch/arm/include/asm/pgtable-2level.h ++++ b/arch/arm/include/asm/pgtable-2level.h +@@ -75,6 +75,8 @@ + #define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t)) + #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32)) + ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 ++ + /* + * PMD_SHIFT determines the size of the area a second-level page table can map + * PGDIR_SHIFT determines what a third-level page table entry can map +diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h +index 5b18295021a0..8006a56cc2ce 100644 +--- a/arch/arm/include/asm/pgtable-3level.h ++++ b/arch/arm/include/asm/pgtable-3level.h +@@ -25,6 +25,8 @@ + #define PTE_HWTABLE_OFF (0) + #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64)) + ++#define MAX_POSSIBLE_PHYSMEM_BITS 40 ++ + /* + * PGDIR_SHIFT determines the size a top-level page table entry can map. + */ +diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h +index ba967148b016..2604fab8a92d 100644 +--- a/arch/mips/include/asm/pgtable-32.h ++++ b/arch/mips/include/asm/pgtable-32.h +@@ -155,6 +155,7 @@ static inline void pmd_clear(pmd_t *pmdp) + + #if defined(CONFIG_XPA) + ++#define MAX_POSSIBLE_PHYSMEM_BITS 40 + #define pte_pfn(x) (((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT)) + static inline pte_t + pfn_pte(unsigned long pfn, pgprot_t prot) +@@ -170,6 +171,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot) + + #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) + ++#define MAX_POSSIBLE_PHYSMEM_BITS 36 + #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) + + static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) +@@ -184,6 +186,7 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) + + #else + ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 + #ifdef CONFIG_CPU_VR41XX + #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2))) + #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot)) +diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h +index 0796533d37dd..7b6349be621a 100644 +--- a/arch/powerpc/include/asm/book3s/32/pgtable.h ++++ b/arch/powerpc/include/asm/book3s/32/pgtable.h +@@ -37,8 +37,10 @@ static inline bool pte_user(pte_t pte) + */ + #ifdef CONFIG_PTE_64BIT + #define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1)) ++#define MAX_POSSIBLE_PHYSMEM_BITS 36 + #else + #define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1)) ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 + #endif + + /* +diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h b/arch/powerpc/include/asm/nohash/32/pgtable.h +index 552b96eef0c8..3d32d7103ec8 100644 +--- a/arch/powerpc/include/asm/nohash/32/pgtable.h ++++ b/arch/powerpc/include/asm/nohash/32/pgtable.h +@@ -148,8 +148,10 @@ int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot); + */ + #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) + #define PTE_RPN_MASK (~((1ULL << PTE_RPN_SHIFT) - 1)) ++#define MAX_POSSIBLE_PHYSMEM_BITS 36 + #else + #define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1)) ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 + #endif + + /* +diff --git a/arch/riscv/include/asm/pgtable-32.h b/arch/riscv/include/asm/pgtable-32.h +index b0ab66e5fdb1..5b2e79e5bfa5 100644 +--- a/arch/riscv/include/asm/pgtable-32.h ++++ b/arch/riscv/include/asm/pgtable-32.h +@@ -14,4 +14,6 @@ + #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) + #define PGDIR_MASK (~(PGDIR_SIZE - 1)) + ++#define MAX_POSSIBLE_PHYSMEM_BITS 34 ++ + #endif /* _ASM_RISCV_PGTABLE_32_H */ +diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h +index 6fd08cf04add..7a8c43dee873 100644 +--- a/include/asm-generic/pgtable.h ++++ b/include/asm-generic/pgtable.h +@@ -1163,6 +1163,19 @@ static inline bool arch_has_pfn_modify_check(void) + #define io_remap_pfn_range remap_pfn_range + #endif + ++#if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT) ++#ifdef CONFIG_PHYS_ADDR_T_64BIT ++/* ++ * ZSMALLOC needs to know the highest PFN on 32-bit architectures ++ * with physical address space extension, but falls back to ++ * BITS_PER_LONG otherwise. ++ */ ++#error Missing MAX_POSSIBLE_PHYSMEM_BITS definition ++#else ++#define MAX_POSSIBLE_PHYSMEM_BITS 32 ++#endif ++#endif ++ + #ifndef has_transparent_hugepage + #ifdef CONFIG_TRANSPARENT_HUGEPAGE + #define has_transparent_hugepage() 1 +-- +2.29.2 + diff --git a/buildroot-external/board/raspberrypi/patches/linux/0007-mm-zsmalloc-include-sparsemem.h-for-MAX_PHYSMEM_BITS.patch b/buildroot-external/board/raspberrypi/patches/linux/0007-mm-zsmalloc-include-sparsemem.h-for-MAX_PHYSMEM_BITS.patch deleted file mode 100644 index cf0025ea2..000000000 --- a/buildroot-external/board/raspberrypi/patches/linux/0007-mm-zsmalloc-include-sparsemem.h-for-MAX_PHYSMEM_BITS.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 635706b878ef1263c4d495947a51c70c88707bbf Mon Sep 17 00:00:00 2001 -Message-Id: <635706b878ef1263c4d495947a51c70c88707bbf.1604762912.git.stefan@agner.ch> -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1604762912.git.stefan@agner.ch> -From: Stefan Agner -Date: Sat, 7 Nov 2020 16:00:09 +0100 -Subject: [PATCH 7/8] mm/zsmalloc: include sparsemem.h for MAX_PHYSMEM_BITS - -Most architectures define MAX_PHYSMEM_BITS in asm/sparsemem.h and don't -include it in asm/pgtable.h. Include asm/sparsemem.h directly to get -the MAX_PHYSMEM_BITS define on all architectures. - -This fixes a crash when accessing zram on 32-bit ARM platform with LPAE and -more than 4GB of memory: - Unable to handle kernel NULL pointer dereference at virtual address 00000000 - pgd = a27bd01c - [00000000] *pgd=236a0003, *pmd=1ffa64003 - Internal error: Oops: 207 [#1] SMP ARM - Modules linked in: mdio_bcm_unimac(+) brcmfmac cfg80211 brcmutil raspberrypi_hwmon hci_uart crc32_arm_ce bcm2711_thermal phy_generic genet - CPU: 0 PID: 123 Comm: mkfs.ext4 Not tainted 5.9.6 #1 - Hardware name: BCM2711 - PC is at zs_map_object+0x94/0x338 - LR is at zram_bvec_rw.constprop.0+0x330/0xa64 - pc : [] lr : [] psr: 60000013 - sp : e376bbe0 ip : 00000000 fp : c1e2921c - r10: 00000002 r9 : c1dda730 r8 : 00000000 - r7 : e8ff7a00 r6 : 00000000 r5 : 02f9ffa0 r4 : e3710000 - r3 : 000fdffe r2 : c1e0ce80 r1 : ebf979a0 r0 : 00000000 - Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user - Control: 30c5383d Table: 235c2a80 DAC: fffffffd - Process mkfs.ext4 (pid: 123, stack limit = 0x495a22e6) - Stack: (0xe376bbe0 to 0xe376c000) - ... - [] (zs_map_object) from [] (zram_bvec_rw.constprop.0+0x330/0xa64) - [] (zram_bvec_rw.constprop.0) from [] (zram_submit_bio+0x1a4/0x40c) - [] (zram_submit_bio) from [] (submit_bio_noacct+0xd0/0x3c8) - [] (submit_bio_noacct) from [] (submit_bio+0x4c/0x190) - [] (submit_bio) from [] (submit_bh_wbc+0x188/0x1b8) - [] (submit_bh_wbc) from [] (__block_write_full_page+0x340/0x5e4) - [] (__block_write_full_page) from [] (block_write_full_page+0x128/0x170) - [] (block_write_full_page) from [] (__writepage+0x14/0x68) - [] (__writepage) from [] (write_cache_pages+0x1bc/0x494) - [] (write_cache_pages) from [] (generic_writepages+0x58/0x8c) - [] (generic_writepages) from [] (do_writepages+0x48/0xec) - [] (do_writepages) from [] (__filemap_fdatawrite_range+0xf0/0x128) - [] (__filemap_fdatawrite_range) from [] (file_write_and_wait_range+0x48/0x98) - [] (file_write_and_wait_range) from [] (blkdev_fsync+0x1c/0x44) - [] (blkdev_fsync) from [] (do_fsync+0x3c/0x70) - [] (do_fsync) from [] (__sys_trace_return+0x0/0x2c) - Exception stack(0xe376bfa8 to 0xe376bff0) - bfa0: 0003d2e0 b6f7b6f0 00000003 00046e40 00001000 00000000 - bfc0: 0003d2e0 b6f7b6f0 00000000 00000076 00000000 00000000 befcbb20 befcbb28 - bfe0: b6f4e060 befcbad8 b6f23e0c b6dc4a80 - Code: e5927000 e0050391 e0871005 e5918018 (e5983000) - -Fixes: 61989a80fb3a ("staging: zsmalloc: zsmalloc memory allocation library") -Signed-off-by: Stefan Agner ---- - mm/zsmalloc.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c -index 22d17ecfe7df..b815c39dda19 100644 ---- a/mm/zsmalloc.c -+++ b/mm/zsmalloc.c -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - #include - #include --- -2.29.1 - diff --git a/buildroot-external/board/raspberrypi/patches/linux/0008-ARM-dts-bcm283x-add-compatible-picked-up-by-U-Boot.patch b/buildroot-external/board/raspberrypi/patches/linux/0008-ARM-dts-bcm283x-add-compatible-picked-up-by-U-Boot.patch index 7a7baa3d1..8a639ac59 100644 --- a/buildroot-external/board/raspberrypi/patches/linux/0008-ARM-dts-bcm283x-add-compatible-picked-up-by-U-Boot.patch +++ b/buildroot-external/board/raspberrypi/patches/linux/0008-ARM-dts-bcm283x-add-compatible-picked-up-by-U-Boot.patch @@ -1,7 +1,7 @@ -From df50ba2a4538ce9a43d28c2a9ef56377b7bad59f Mon Sep 17 00:00:00 2001 -Message-Id: -In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605026982.git.stefan@agner.ch> -References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605026982.git.stefan@agner.ch> +From c18ca341da823bd2ec5aa04ea5970d3867eaae73 Mon Sep 17 00:00:00 2001 +Message-Id: +In-Reply-To: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> +References: <3651b4af52d63d4e37f40c7a6d0809b0a6c9dd73.1605346684.git.stefan@agner.ch> From: Pascal Vizeli Date: Tue, 2 Jun 2020 21:20:08 +0000 Subject: [PATCH 8/8] ARM: dts: bcm283x: add compatible picked up by U-Boot @@ -72,5 +72,5 @@ index 4426f9e6ba92..abcf677fe416 100644 interrupts = <2 25>; clocks = <&clocks BCM2835_CLOCK_UART>, -- -2.29.1 +2.29.2