tinker: Initial support (#140)

* tinker: initial support

* Fix info

* Fix uboot defconfig

* Split kernel config

* Fix name

* Add post-image

* Init different boot

* Add SPL images

* Dynamic rauc config

* Support SPL for OTA

* Fix expand script style

* Fix SPL

* Bump build u-boot

* Cleanup

* Add cmd for scritps

* Use kernel from armbian

* Fix u-boot

* Add bluetooth support

* Fix bt

* Fix env

* Change uart debug like rpi

* move config
This commit is contained in:
Pascal Vizeli 2018-08-03 13:21:55 +02:00 committed by GitHub
parent 48500a6c6e
commit fbb45e1544
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
111 changed files with 1402795 additions and 93 deletions

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@ -15,7 +15,7 @@ RUN apt-get update && apt-get install -y \
# Build Tools
RUN apt-get update && apt-get install -y \
wget patch vim cpio python unzip rsync bc bzip2 ncurses-dev \
git make g++ file perl bash binutils locales qemu-utils \
git make g++ file perl bash binutils locales qemu-utils bison flex \
&& rm -rf /var/lib/apt/lists/*
# Init entry

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@ -2,3 +2,4 @@ source "$BR2_EXTERNAL_HASSOS_PATH/package/hassos/Config.in"
source "$BR2_EXTERNAL_HASSOS_PATH/package/libapparmor/Config.in"
source "$BR2_EXTERNAL_HASSOS_PATH/package/apparmor/Config.in"
source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in"
source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in"

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@ -3,3 +3,4 @@ BOARD_NAME="Open Virtual Appliance"
CHASSIS=vm
BOOTLOADER=barebox
KERNEL_FILE=bzImage
BOOT_SYS=gpt

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@ -1,13 +1,5 @@
CONFIG_EFI_STUB=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_SIMPLE=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_ACM=m
CONFIG_VIRTIO=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_NET=y

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@ -27,4 +27,6 @@ prepare_disk_image
# Create disk images
create_disk_image 6
convert_disk_image_vmdk
# OTA
create_ota_update

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@ -43,6 +43,7 @@ fi
prepare_disk_image
create_disk_image 2
fix_disk_image_mbr
convert_disk_image_gz
# OTA
create_ota_update

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@ -3,3 +3,4 @@ BOARD_NAME="RaspberryPi"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=zImage
BOOT_SYS=mbr

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@ -3,3 +3,4 @@ BOARD_NAME="RaspberryPi Zero-W"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=zImage
BOOT_SYS=mbr

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@ -3,3 +3,4 @@ BOARD_NAME="RaspberryPi 2"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=zImage
BOOT_SYS=mbr

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@ -3,3 +3,4 @@ BOARD_NAME="RaspberryPi 3 64bit"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=Image
BOOT_SYS=mbr

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@ -3,3 +3,4 @@ BOARD_NAME="RaspberryPi 3"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=zImage
BOOT_SYS=mbr

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@ -0,0 +1,6 @@
BOARD_ID=tinker
BOARD_NAME="Tinker Board"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=zImage
BOOT_SYS=spl

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@ -0,0 +1,902 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZ4=y
CONFIG_DEFAULT_HOSTNAME="localhost"
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_USELIB=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_CGROUPS=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_RDMA=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_PROFILING=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_BLK_DEV_THROTTLING=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_MAC_PARTITION=y
CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARM_THUMBEE=y
# CONFIG_ARM_ERRATA_643719 is not set
CONFIG_ARM_ERRATA_818325_852422=y
CONFIG_ARM_ERRATA_821420=y
CONFIG_ARM_ERRATA_825619=y
CONFIG_SMP=y
CONFIG_PREEMPT=y
CONFIG_HZ_1000=y
CONFIG_HIGHMEM=y
# CONFIG_HIGHPTE is not set
# CONFIG_COMPACTION is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_ZSMALLOC=y
CONFIG_SECCOMP=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_PM_DEBUG=y
CONFIG_PM_ADVANCED_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_DIAG=m
CONFIG_UNIX=y
CONFIG_UNIX_DIAG=m
CONFIG_TLS=m
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IPGRE=m
CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=y
CONFIG_INET_DIAG=m
CONFIG_INET_UDP_DIAG=m
CONFIG_INET_RAW_DIAG=m
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_HSTCP=m
CONFIG_TCP_CONG_HYBLA=m
CONFIG_TCP_CONG_NV=m
CONFIG_TCP_CONG_SCALABLE=m
CONFIG_TCP_CONG_LP=y
CONFIG_TCP_CONG_VENO=m
CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_CONG_ILLINOIS=m
CONFIG_TCP_CONG_DCTCP=m
CONFIG_TCP_CONG_CDG=m
CONFIG_TCP_CONG_BBR=m
CONFIG_TCP_MD5SIG=y
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_NETLABEL=y
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=y
CONFIG_NF_CONNTRACK=m
CONFIG_NF_LOG_NETDEV=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_TIMEOUT=y
CONFIG_NF_CONNTRACK_TIMESTAMP=y
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_H323=m
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_SNMP=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_SANE=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_CT_NETLINK=m
CONFIG_NF_CT_NETLINK_TIMEOUT=m
CONFIG_NF_CT_NETLINK_HELPER=m
CONFIG_NETFILTER_NETLINK_GLUE_CT=y
CONFIG_NF_TABLES=m
CONFIG_NF_TABLES_INET=m
CONFIG_NF_TABLES_NETDEV=m
CONFIG_NFT_EXTHDR=m
CONFIG_NFT_META=m
CONFIG_NFT_RT=m
CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m
CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m
CONFIG_NFT_HASH=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
CONFIG_NETFILTER_XT_TARGET_CT=m
CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_HMARK=m
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
CONFIG_NETFILTER_XT_TARGET_LED=m
CONFIG_NETFILTER_XT_TARGET_LOG=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_TEE=m
CONFIG_NETFILTER_XT_TARGET_TPROXY=m
CONFIG_NETFILTER_XT_TARGET_SECMARK=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
CONFIG_NETFILTER_XT_MATCH_BPF=m
CONFIG_NETFILTER_XT_MATCH_CGROUP=m
CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_CPU=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
CONFIG_NETFILTER_XT_MATCH_DSCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
CONFIG_NETFILTER_XT_MATCH_IPVS=m
CONFIG_NETFILTER_XT_MATCH_L2TP=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_NFACCT=m
CONFIG_NETFILTER_XT_MATCH_OSF=m
CONFIG_NETFILTER_XT_MATCH_OWNER=m
CONFIG_NETFILTER_XT_MATCH_POLICY=m
CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
CONFIG_NETFILTER_XT_MATCH_RATEEST=m
CONFIG_NETFILTER_XT_MATCH_REALM=m
CONFIG_NETFILTER_XT_MATCH_RECENT=m
CONFIG_NETFILTER_XT_MATCH_SCTP=m
CONFIG_NETFILTER_XT_MATCH_SOCKET=m
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
CONFIG_NETFILTER_XT_MATCH_TIME=m
CONFIG_NETFILTER_XT_MATCH_U32=m
CONFIG_IP_SET=m
CONFIG_IP_SET_BITMAP_IP=m
CONFIG_IP_SET_BITMAP_IPMAC=m
CONFIG_IP_SET_BITMAP_PORT=m
CONFIG_IP_SET_HASH_IP=m
CONFIG_IP_SET_HASH_IPMARK=m
CONFIG_IP_SET_HASH_IPPORT=m
CONFIG_IP_SET_HASH_IPPORTIP=m
CONFIG_IP_SET_HASH_IPPORTNET=m
CONFIG_IP_SET_HASH_IPMAC=m
CONFIG_IP_SET_HASH_MAC=m
CONFIG_IP_SET_HASH_NETPORTNET=m
CONFIG_IP_SET_HASH_NET=m
CONFIG_IP_SET_HASH_NETNET=m
CONFIG_IP_SET_HASH_NETPORT=m
CONFIG_IP_SET_HASH_NETIFACE=m
CONFIG_IP_SET_LIST_SET=m
CONFIG_IP_VS=m
CONFIG_IP_VS_IPV6=y
CONFIG_IP_VS_RR=m
CONFIG_IP_VS_WRR=m
CONFIG_IP_VS_LC=m
CONFIG_IP_VS_WLC=m
CONFIG_IP_VS_FO=m
CONFIG_IP_VS_OVF=m
CONFIG_IP_VS_LBLC=m
CONFIG_IP_VS_LBLCR=m
CONFIG_IP_VS_DH=m
CONFIG_IP_VS_SH=m
CONFIG_IP_VS_SED=m
CONFIG_IP_VS_NQ=m
CONFIG_IP_VS_NFCT=y
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_NF_SOCKET_IPV4=y
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_DUP_IPV4=m
CONFIG_NFT_FIB_IPV4=m
CONFIG_NF_TABLES_ARP=m
CONFIG_NF_LOG_ARP=m
CONFIG_NF_REJECT_IPV4=y
CONFIG_NFT_CHAIN_NAT_IPV4=m
CONFIG_NFT_MASQ_IPV4=m
CONFIG_NFT_REDIR_IPV4=m
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_RPFILTER=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_SYNPROXY=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_SECURITY=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NF_CONNTRACK_IPV6=m
CONFIG_NF_SOCKET_IPV6=y
CONFIG_NF_NAT_IPV6=m
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_IPV6HEADER=y
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=y
CONFIG_IP6_NF_MANGLE=y
CONFIG_NF_TABLES_BRIDGE=m
CONFIG_BRIDGE_NF_EBTABLES=m
CONFIG_BRIDGE=y
CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_HFSC=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_MULTIQ=m
CONFIG_NET_SCH_RED=m
CONFIG_NET_SCH_SFB=m
CONFIG_NET_SCH_SFQ=m
CONFIG_NET_SCH_TEQL=m
CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_DRR=m
CONFIG_NET_SCH_MQPRIO=m
CONFIG_NET_SCH_CHOKE=m
CONFIG_NET_SCH_QFQ=m
CONFIG_NET_SCH_CODEL=m
CONFIG_NET_SCH_FQ_CODEL=m
CONFIG_NET_SCH_FQ=m
CONFIG_NET_SCH_HHF=m
CONFIG_NET_SCH_PIE=m
CONFIG_NET_SCH_PLUG=m
CONFIG_NET_SCH_DEFAULT=y
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
CONFIG_CLS_U32_PERF=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_BPF=m
CONFIG_NET_CLS_FLOWER=m
CONFIG_NET_CLS_MATCHALL=m
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_CMP=m
CONFIG_NET_EMATCH_NBYTE=m
CONFIG_NET_EMATCH_U32=m
CONFIG_NET_EMATCH_META=m
CONFIG_NET_EMATCH_TEXT=m
CONFIG_NET_EMATCH_IPSET=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=m
CONFIG_NET_ACT_GACT=m
CONFIG_GACT_PROB=y
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_SAMPLE=m
CONFIG_NET_ACT_IPT=m
CONFIG_NET_ACT_NAT=m
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_ACT_SIMP=m
CONFIG_NET_ACT_SKBEDIT=m
CONFIG_NET_ACT_CSUM=m
CONFIG_NET_ACT_VLAN=m
CONFIG_NET_ACT_BPF=m
CONFIG_NET_ACT_CONNMARK=m
CONFIG_NET_ACT_SKBMOD=m
CONFIG_NET_ACT_IFE=m
CONFIG_NET_ACT_TUNNEL_KEY=m
CONFIG_NET_IFE_SKBMARK=m
CONFIG_NET_IFE_SKBPRIO=m
CONFIG_NET_IFE_SKBTCINDEX=m
CONFIG_NET_CLS_IND=y
CONFIG_CGROUP_NET_PRIO=y
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_HIDP=y
CONFIG_BT_HCIBTUSB=y
CONFIG_BT_HCIBTSDIO=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_3WIRE=y
CONFIG_BT_HCIBFUSB=y
CONFIG_BT_HCIVHCI=y
CONFIG_BT_MRVL=y
CONFIG_BT_MRVL_SDIO=y
CONFIG_CFG80211=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CFG80211_DEBUGFS=y
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211=y
CONFIG_MAC80211_MESH=y
CONFIG_MAC80211_DEBUGFS=y
CONFIG_MAC80211_DEBUG_MENU=y
CONFIG_MAC80211_VERBOSE_DEBUG=y
CONFIG_RFKILL=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DEBUG_DEVRES=y
CONFIG_DMA_FENCE_TRACE=y
CONFIG_CONNECTOR=y
CONFIG_ZRAM=m
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
CONFIG_ATA_OVER_ETH=m
CONFIG_EEPROM_AT24=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=m
CONFIG_DUMMY=y
CONFIG_MACVLAN=y
CONFIG_MACVTAP=m
CONFIG_VXLAN=y
CONFIG_GENEVE=m
CONFIG_GTP=m
CONFIG_MACSEC=m
CONFIG_TUN=y
CONFIG_VETH=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
CONFIG_EMAC_ROCKCHIP=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_STMMAC_ETH=y
CONFIG_LED_TRIGGER_PHY=y
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_USB_PEGASUS=y
CONFIG_USB_RTL8150=y
CONFIG_USB_RTL8152=y
CONFIG_USB_NET_CDC_MBIM=y
CONFIG_USB_NET_DM9601=y
CONFIG_USB_NET_SMSC75XX=y
CONFIG_USB_NET_SMSC95XX=y
CONFIG_USB_NET_MCS7830=y
# CONFIG_USB_NET_CDC_SUBSET is not set
# CONFIG_USB_NET_ZAURUS is not set
CONFIG_ATH9K_HTC=m
CONFIG_CARL9170=m
CONFIG_AR5523=m
CONFIG_ATH10K=m
CONFIG_ATH10K_SDIO=m
CONFIG_ATH10K_USB=m
CONFIG_WCN36XX=m
CONFIG_RTL8188EU=m
CONFIG_AT76C50X_USB=m
CONFIG_HOSTAP=y
CONFIG_HOSTAP_FIRMWARE=y
CONFIG_HOSTAP_FIRMWARE_NVRAM=y
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_USB=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_LIBERTAS_SPI=m
CONFIG_LIBERTAS_THINFIRM=y
CONFIG_LIBERTAS_THINFIRM_USB=m
CONFIG_MWIFIEX=y
CONFIG_MWIFIEX_SDIO=y
CONFIG_MWIFIEX_USB=m
CONFIG_RTL8812AU=m
CONFIG_RTL8814AU=m
CONFIG_MT7601U=m
CONFIG_RT2X00=y
CONFIG_RT2500USB=y
CONFIG_RT73USB=y
CONFIG_RT2800USB=y
CONFIG_RT2800USB_RT3573=y
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_RTL8187=m
CONFIG_RTL_CARDS=m
CONFIG_RTL8192CU=m
# CONFIG_RTLWIFI_DEBUG is not set
CONFIG_RTL8XXXU=y
CONFIG_USB_ZD1201=m
CONFIG_ZD1211RW=m
CONFIG_USB_NET_RNDIS_WLAN=y
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_KEYBOARD_SUNKBD=y
CONFIG_KEYBOARD_TM2_TOUCHKEY=m
CONFIG_KEYBOARD_CROS_EC=y
# CONFIG_MOUSE_PS2 is not set
CONFIG_MOUSE_CYAPA=y
CONFIG_MOUSE_ELAN_I2C=y
CONFIG_INPUT_JOYSTICK=y
CONFIG_JOYSTICK_IFORCE=y
CONFIG_JOYSTICK_IFORCE_USB=y
CONFIG_JOYSTICK_XPAD=y
CONFIG_JOYSTICK_XPAD_FF=y
CONFIG_JOYSTICK_XPAD_LEDS=y
CONFIG_INPUT_TABLET=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_TOUCHSCREEN_ELAN=y
CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
CONFIG_TOUCHSCREEN_ZET6223=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_SERIO_RAW=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_RK_CHAR_DRIVERS=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_HW_RANDOM=y
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_RK3X=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_STUB=m
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_POWER_AVS=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_SYSCON_REBOOT_MODE=m
CONFIG_BATTERY_SBS=y
CONFIG_CHARGER_GPIO=y
CONFIG_CHARGER_BQ24735=y
CONFIG_THERMAL=y
CONFIG_CPU_THERMAL=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_SOFT_WATCHDOG=m
CONFIG_DW_WATCHDOG=m
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_SPI=y
CONFIG_MFD_CPCAP=m
CONFIG_MFD_RK808=y
CONFIG_MFD_TPS6586X=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_ACT8865=y
CONFIG_REGULATOR_CPCAP=m
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_TPS6586X=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
CONFIG_DVB_DYNAMIC_MINORS=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=y
# CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV is not set
# CONFIG_USB_GSPCA is not set
CONFIG_VIDEO_AU0828=m
CONFIG_DVB_USB_V2=m
CONFIG_DVB_USB_AF9015=m
CONFIG_DVB_USB_AF9035=m
CONFIG_DVB_USB_ANYSEE=m
CONFIG_DVB_USB_AU6610=m
CONFIG_DVB_USB_AZ6007=m
CONFIG_DVB_USB_CE6230=m
CONFIG_DVB_USB_EC168=m
CONFIG_DVB_USB_GL861=m
CONFIG_DVB_USB_MXL111SF=m
CONFIG_DVB_USB_RTL28XXU=m
CONFIG_DVB_USB_DVBSKY=m
CONFIG_DVB_USB_ZD1301=m
CONFIG_SMS_USB_DRV=m
CONFIG_DVB_B2C2_FLEXCOP_USB=m
CONFIG_DVB_AS102=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
CONFIG_SOC_CAMERA_PLATFORM=m
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_V4L_TEST_DRIVERS=y
CONFIG_SMS_SDIO_DRV=m
CONFIG_SOC_CAMERA_IMX074=m
CONFIG_SOC_CAMERA_MT9M001=m
CONFIG_SOC_CAMERA_MT9M111=m
CONFIG_SOC_CAMERA_MT9T031=m
CONFIG_SOC_CAMERA_MT9T112=m
CONFIG_SOC_CAMERA_MT9V022=m
CONFIG_SOC_CAMERA_OV5642=m
CONFIG_SOC_CAMERA_OV772X=m
CONFIG_SOC_CAMERA_OV9640=m
CONFIG_SOC_CAMERA_OV9740=m
CONFIG_SOC_CAMERA_RJ54N1=m
CONFIG_SOC_CAMERA_TW9910=m
CONFIG_MALI_MIDGARD=m
CONFIG_MALI_GATOR_SUPPORT=y
CONFIG_DRM=y
CONFIG_DRM_DEBUG_MM=y
CONFIG_DRM_DEBUG_MM_SELFTEST=m
CONFIG_DRM_ROCKCHIP=y
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_DRM_UDL=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TINYDRM=m
CONFIG_TINYDRM_MI0283QT=m
CONFIG_FB_MODE_HELPERS=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_HRTIMER=y
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=y
CONFIG_SND_DUMMY=m
CONFIG_SND_ALOOP=m
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_ROCKCHIP=y
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m
CONFIG_SND_SOC_RT5616=y
CONFIG_SND_SOC_SPDIF=y
CONFIG_SND_SOC_NAU8540=m
CONFIG_SND_SIMPLE_CARD=y
CONFIG_HID_BATTERY_STRENGTH=y
CONFIG_HIDRAW=y
CONFIG_UHID=y
CONFIG_HID_APPLE=y
CONFIG_HID_CHERRY=y
CONFIG_HID_KENSINGTON=y
CONFIG_HID_LOGITECH=y
CONFIG_HID_LOGITECH_DJ=y
CONFIG_HID_MAGICMOUSE=y
CONFIG_HID_MICROSOFT=y
CONFIG_HID_MULTITOUCH=y
CONFIG_HID_PLANTRONICS=y
CONFIG_HID_PRIMAX=y
CONFIG_HID_SONY=y
CONFIG_HID_RMI=y
CONFIG_HID_WIIMOTE=y
CONFIG_USB_HIDDEV=y
CONFIG_I2C_HID=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
# CONFIG_USB_DEFAULT_PERSIST is not set
CONFIG_USB_OTG=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=m
CONFIG_USB_DWC2=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_CH341=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_KEYSPAN=y
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_OTI6858=y
CONFIG_USB_SERIAL_QUALCOMM=y
CONFIG_USB_SERIAL_SIERRAWIRELESS=y
CONFIG_USB_SERIAL_OPTION=y
CONFIG_USB_LCD=m
CONFIG_USB_HUB_USB251XB=m
CONFIG_USB_GADGET=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_PWRSEQ_SD8787=m
CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_TEST=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_CADENCE=m
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_USER=m
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_ABX80X=m
CONFIG_RTC_DRV_DS1307=m
CONFIG_RTC_DRV_DS1374=m
CONFIG_RTC_DRV_DS1374_WDT=y
CONFIG_RTC_DRV_DS1672=m
CONFIG_RTC_DRV_HYM8563=m
CONFIG_RTC_DRV_MAX6900=m
CONFIG_RTC_DRV_RK808=y
CONFIG_RTC_DRV_RS5C372=m
CONFIG_RTC_DRV_ISL1208=m
CONFIG_RTC_DRV_ISL12022=m
CONFIG_RTC_DRV_X1205=m
CONFIG_RTC_DRV_PCF8523=m
CONFIG_RTC_DRV_PCF85063=m
CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF8583=m
CONFIG_RTC_DRV_M41T80=m
CONFIG_RTC_DRV_M41T80_WDT=y
CONFIG_RTC_DRV_BQ32K=m
CONFIG_RTC_DRV_TPS6586X=m
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_FM3130=m
CONFIG_RTC_DRV_RX8010=m
CONFIG_RTC_DRV_RX8581=m
CONFIG_RTC_DRV_RX8025=m
CONFIG_RTC_DRV_EM3027=m
CONFIG_RTC_DRV_RV8803=m
CONFIG_RTC_DRV_M41T93=m
CONFIG_RTC_DRV_M41T94=m
CONFIG_RTC_DRV_DS1302=m
CONFIG_RTC_DRV_DS1305=m
CONFIG_RTC_DRV_DS1343=m
CONFIG_RTC_DRV_DS1347=m
CONFIG_RTC_DRV_DS1390=m
CONFIG_RTC_DRV_MAX6916=m
CONFIG_RTC_DRV_R9701=m
CONFIG_RTC_DRV_RX4581=m
CONFIG_RTC_DRV_RX6110=m
CONFIG_RTC_DRV_RS5C348=m
CONFIG_RTC_DRV_MAX6902=m
CONFIG_RTC_DRV_PCF2123=m
CONFIG_RTC_DRV_MCP795=m
CONFIG_RTC_DRV_DS3232=m
CONFIG_RTC_DRV_PCF2127=m
CONFIG_RTC_DRV_RV3029C2=m
CONFIG_DMADEVICES=y
CONFIG_PL330_DMA=y
CONFIG_STAGING=y
CONFIG_RTL8723BS=m
CONFIG_ASHMEM=y
CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_VC5=m
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_PM_DEVFREQ=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_MEMORY=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_TRIGGER=y
CONFIG_ROCKCHIP_SARADC=y
CONFIG_SENSORS_ISL29018=y
CONFIG_SENSORS_TSL2563=y
CONFIG_TSL2583=y
CONFIG_IIO_SYSFS_TRIGGER=y
CONFIG_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_DP=y
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_ANDROID=y
CONFIG_DAX=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_REISERFS_FS=y
CONFIG_JFS_FS=y
CONFIG_XFS_FS=y
CONFIG_BTRFS_FS=y
CONFIG_BTRFS_FS_POSIX_ACL=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V1=m
CONFIG_QFMT_V2=m
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=m
CONFIG_FSCACHE=y
CONFIG_FSCACHE_STATS=y
CONFIG_FSCACHE_HISTOGRAM=y
CONFIG_CACHEFILES=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=y
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y
CONFIG_NTFS_RW=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_ECRYPT_FS=y
CONFIG_HFSPLUS_FS=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_DIRECT=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_PSTORE=y
CONFIG_PSTORE_CONSOLE=y
CONFIG_PSTORE_RAM=y
CONFIG_NFS_FS=y
# CONFIG_NFS_V2 is not set
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_ROOT_NFS=y
CONFIG_NFS_FSCACHE=y
CONFIG_NFSD=m
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_V4_SECURITY_LABEL=y
CONFIG_NFSD_FAULT_INJECTION=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_CIFS_WEAK_PW_HASH=y
CONFIG_CIFS_UPCALL=y
CONFIG_CIFS_XATTR=y
CONFIG_CIFS_POSIX=y
CONFIG_CIFS_ACL=y
CONFIG_CIFS_DFS_UPCALL=y
CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_DETECT_HUNG_TASK=y
CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
CONFIG_SCHEDSTATS=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_CREDENTIALS=y
CONFIG_RCU_CPU_STALL_TIMEOUT=60
CONFIG_FUNCTION_TRACER=y
CONFIG_BLK_DEV_IO_TRACE=y
# CONFIG_UPROBE_EVENTS is not set
CONFIG_LKDTM=y
CONFIG_TEST_UDELAY=y
CONFIG_STRICT_DEVMEM=y
CONFIG_SECURITY=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_PATH=y
CONFIG_SECURITY_YAMA=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_LZ4=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_X509_CERTIFICATE_PARSER=y
CONFIG_PKCS7_MESSAGE_PARSER=y
CONFIG_SYSTEM_TRUSTED_KEYRING=y
CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM=m
CONFIG_CRYPTO_SHA256_ARM=m
CONFIG_CRYPTO_SHA512_ARM=m
CONFIG_CRYPTO_AES_ARM=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC7=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_SPARC is not set

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@ -0,0 +1,122 @@
From 7ba71967a2678e119bcd819ac92d08bd038e1879 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 18:34:33 +0000
Subject: [PATCH 5/5] Mali midgard r19p0 fixes for 4.13 kernels
Mostly due to DMA structure members renamed, and some signatures
modifications done during the development of Linux 4.11.
* mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf
11bac80004499ea59f361ef2a5516c84b6eab675
v4.11-rc1
* sched/headers: Move task->mm handling methods to <linux/sched/mm.h>
68e21be2916b359fd8afb536c1911dc014cfd03e
v4.11-rc1
* sched/headers: Move task-stack related APIs from <linux/sched.h> to
<linux/sched/task_stack.h>
f3ac60671954c8d413532627b1be13a76f394c49
v4.11-rc1
* dma-fence: Introduce drm_fence_set_error() helper
a009e975da5c7d42a7f5eaadc54946eb5f76c9af
v4.11-rc1
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase.h | 4 ++++
drivers/gpu/arm/midgard/mali_kbase_fence.h | 4 ++++
drivers/gpu/arm/midgard/mali_kbase_mem_linux.c | 6 ++++++
drivers/gpu/arm/midgard/mali_kbase_sync_file.c | 12 ++++++++++++
4 files changed, 26 insertions(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
index d77f186..5ee47c4 100644
--- a/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/drivers/gpu/arm/midgard/mali_kbase.h
@@ -35,6 +35,10 @@
#include <linux/mutex.h>
#include <linux/rwsem.h>
#include <linux/sched.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
+#include <linux/sched/task_stack.h>
+#include <linux/sched/mm.h>
+#endif
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/vmalloc.h>
diff --git a/drivers/gpu/arm/midgard/mali_kbase_fence.h b/drivers/gpu/arm/midgard/mali_kbase_fence.h
index 8d39299..3c2e3a9 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_fence.h
+++ b/drivers/gpu/arm/midgard/mali_kbase_fence.h
@@ -134,7 +134,11 @@ static inline bool kbase_fence_out_is_ours(struct kbase_jd_atom *katom)
static inline int kbase_fence_out_signal(struct kbase_jd_atom *katom,
int status)
{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
katom->dma_fence.fence->status = status;
+#else
+ katom->dma_fence.fence->error = status;
+#endif
return dma_fence_signal(katom->dma_fence.fence);
}
diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
index b1f2c46..896aa35 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
@@ -1788,8 +1788,14 @@ static void kbase_cpu_vm_close(struct vm_area_struct *vma)
KBASE_EXPORT_TEST_API(kbase_cpu_vm_close);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
static int kbase_cpu_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
+#else
+static int kbase_cpu_vm_fault(struct vm_fault *vmf)
+{
+ struct vm_area_struct *vma = vmf->vma;
+#endif
struct kbase_cpu_mapping *map = vma->vm_private_data;
pgoff_t rel_pgoff;
size_t i;
diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
index 4e1621c..d84a54e 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
@@ -161,8 +161,13 @@ static void kbase_fence_wait_callback(struct dma_fence *fence,
struct kbase_context *kctx = katom->kctx;
/* Cancel atom if fence is erroneous */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
if (dma_fence_is_signaled(kcb->fence) && kcb->fence->status < 0)
katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
+#else
+ if (dma_fence_is_signaled(kcb->fence) && kcb->fence->error < 0)
+ katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
+#endif
if (kbase_fence_dep_count_dec_and_test(katom)) {
/* We take responsibility of handling this */
@@ -273,10 +278,17 @@ static void kbase_sync_fence_info_get(struct dma_fence *fence,
* 1 : signaled
*/
if (dma_fence_is_signaled(fence)) {
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
if (fence->status < 0)
info->status = fence->status; /* signaled with error */
else
info->status = 1; /* signaled with success */
+#else
+ if (fence->error < 0)
+ info->status = fence->error; /* signaled with error */
+ else
+ info->status = 1; /* signaled with success */
+#endif
} else {
info->status = 0; /* still active (unsignaled) */
}
--
2.10.2

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@ -0,0 +1,36 @@
From f76c9c58669a3bba0456191431be558ab8054f50 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 11:43:00 +0000
Subject: [PATCH 3/5] Using the new header on 4.12 kernels for copy_*_user
These changes are due to :
* generic ...copy_..._user primitives
d597580d373774b1bdab84b3d26ff0b55162b916
Version : 4.12-rc1
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/ump/src/linux/ump_kernel_linux.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/base/ump/src/linux/ump_kernel_linux.c b/drivers/base/ump/src/linux/ump_kernel_linux.c
index d6c3c53..bb3a7f0 100644
--- a/drivers/base/ump/src/linux/ump_kernel_linux.c
+++ b/drivers/base/ump/src/linux/ump_kernel_linux.c
@@ -20,7 +20,12 @@
#include <linux/ump-ioctl.h>
#include <linux/ump.h>
-#include <asm/uaccess.h> /* copy_*_user */
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)
+#include <asm/uaccess.h> /* copy_*_user */
+#else
+#include <linux/uaccess.h> /* copy_*_user */
+#endif
#include <linux/compat.h>
#include <linux/module.h> /* kernel module definitions */
#include <linux/fs.h> /* file system operations */
--
2.10.2

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@ -0,0 +1,46 @@
From 63c110cdebc2c692964e1250c6f74f9e8c47c85d Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Tue, 10 Jan 2017 04:28:48 +0000
Subject: [PATCH 4/5] Adapt get_user_pages calls to use the new calling
procedure
These changes are due to this commit:
mm: replace get_user_pages_remote() write/force parameters with gup_flags
9beae1ea89305a9667ceaab6d0bf46a045ad71e7
Kernel: 4.9.0-rc
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/ump/src/linux/ump_kernel_linux_mem.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
index 9186dd0..def4c0e 100644
--- a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
+++ b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
@@ -35,6 +35,10 @@
#include <ump_arch.h>
#include <common/ump_kernel_priv.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0))
+#include <linux/pfn_t.h>
+#endif
+
static void umpp_vm_close(struct vm_area_struct *vma)
{
umpp_cpu_mapping * mapping;
@@ -222,7 +226,11 @@ int umpp_linux_mmap(struct file * filp, struct vm_area_struct * vma)
paddr = alloc->block_array[block_idx].addr;
}
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,0))
err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), paddr >> PAGE_SHIFT);
+#else
+ err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), __pfn_to_pfn_t(paddr >> PAGE_SHIFT, PFN_DEV));
+#endif
paddr += PAGE_SIZE;
}
--
2.10.2

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@ -0,0 +1,40 @@
From 7c27055687c595e9f9eca484314f4fe3866a4260 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Tue, 18 Jul 2017 17:35:16 +0000
Subject: [PATCH 2/2] Don't be TOO severe when looking for the IRQ names
Using strncmp with an all caps result in the driver being unable to
initialize itself when using the mainlined RK3288 DTS files, since they
define the IRQ names as "job", "mmu" and "gpu" instead of "JOB", "MMU"
and "GPU".
strncmp calls have been replaced by strncasecmp calls in order to
avoid such issue.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 0cccb0b..9cc65d2 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -938,11 +938,11 @@ static int assign_irqs(struct platform_device *pdev)
}
#ifdef CONFIG_OF
- if (!strncmp(irq_res->name, "JOB", 4)) {
+ if (!strncasecmp(irq_res->name, "JOB", 4)) {
irqtag = JOB_IRQ_TAG;
- } else if (!strncmp(irq_res->name, "MMU", 4)) {
+ } else if (!strncasecmp(irq_res->name, "MMU", 4)) {
irqtag = MMU_IRQ_TAG;
- } else if (!strncmp(irq_res->name, "GPU", 4)) {
+ } else if (!strncasecmp(irq_res->name, "GPU", 4)) {
irqtag = GPU_IRQ_TAG;
} else {
dev_err(&pdev->dev, "Invalid irq res name: '%s'\n",
--
2.10.2

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@ -0,0 +1,42 @@
From ef7689887c31d2b1336e14f2c089185e8f60a9f1 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 7 Aug 2017 19:22:39 +0000
Subject: [PATCH] Added the new "compatible" list, mainly used by Rockchip
Because, you know, all the Mali Midgard GPU used to define the GPU
using the 'compatible = "arm,mali-midgard"' property, which worked fine.
But it was removed.
They replaced the "arm,mali-midgard" node by "arm,mali-tXXX" where XXX
is the GPU series, and added "arm,rk3288-mali" which is used by nothing.
Which broke the Mali Midgard GPL kernel driver.
This patch fixes this issue.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 27dcd9c1..cc4932a4 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -4742,6 +4742,12 @@ static const struct dev_pm_ops kbase_pm_ops = {
static const struct of_device_id kbase_dt_ids[] = {
{ .compatible = "arm,malit6xx" },
{ .compatible = "arm,mali-midgard" },
+ { .compatible = "arm,mali-t720" },
+ { .compatible = "arm,mali-t760" },
+ { .compatible = "arm,mali-t820" },
+ { .compatible = "arm,mali-t830" },
+ { .compatible = "arm,mali-t860" },
+ { .compatible = "arm,mali-t880" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, kbase_dt_ids);
--
2.13.0

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@ -0,0 +1,34 @@
From 9812105eb6220863af05fc72591118f0a48e1c4e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 21 May 2018 22:32:59 +0200
Subject: [PATCH] GPU: ARM: Midgard: Adapt to the new mmap call checks.
Now, I don't know if this driver is just one of these "buggy" drivers
Linus is talking about, or if this is just standard GPU procedure.
Anyway, this patch is due to this change by Linus Torvalds :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=be83bbf806822b1b89e0a0f23cd87cddc409e429
And the fix is inspired by :
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76ef6b28ea4f81c3d511866a9b31392caa833126
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index cc4932a4ead7..89b4cca27cf1 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -1087,6 +1087,7 @@ static int kbase_open(struct inode *inode, struct file *filp)
init_waitqueue_head(&kctx->event_queue);
filp->private_data = kctx;
+ filp->f_mode |= FMODE_UNSIGNED_OFFSET;
kctx->filp = filp;
if (kbdev->infinite_cache_active_default)
--
2.17.0

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@ -0,0 +1,65 @@
From 7de25b73e152830587740d8f2ffaad94c72d90ac Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 11:24:47 +0000
Subject: [PATCH 1/5] Integrating the Mali drivers
Changses required in order to select and compile the previously copied
Mali Midgard drivers.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/base/Kconfig | 2 ++
drivers/base/Makefile | 1 +
drivers/gpu/Makefile | 2 +-
drivers/video/Kconfig | 1 +
4 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index f046d21..b0982fc 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -348,3 +348,5 @@ config GENERIC_ARCH_TOPOLOGY
runtime.
endmenu
+
+source "drivers/base/ump/Kconfig"
diff --git a/drivers/base/Makefile b/drivers/base/Makefile
index 397e5c3..251e0cf 100644
--- a/drivers/base/Makefile
+++ b/drivers/base/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_PINCTRL) += pinctrl.o
obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o
obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
+obj-$(CONFIG_UMP) += ump/
obj-y += test/
diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
index e9ed439..66386b4 100644
--- a/drivers/gpu/Makefile
+++ b/drivers/gpu/Makefile
@@ -2,5 +2,5 @@
# taken to initialize them in the correct order. Link order is the only way
# to ensure this currently.
obj-$(CONFIG_TEGRA_HOST1X) += host1x/
-obj-y += drm/ vga/
+obj-y += drm/ vga/ arm/
obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3c20af9..041e15f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
source "drivers/gpu/host1x/Kconfig"
source "drivers/gpu/ipu-v3/Kconfig"
+source "drivers/gpu/arm/midgard/Kconfig"
source "drivers/gpu/drm/Kconfig"
--
2.10.2

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@ -0,0 +1,50 @@
From e0c5a419cf5464cd02996431afa98e3b22dc6801 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 17 Jul 2017 23:14:48 +0000
Subject: [PATCH] clk: rockchip: add all known operating points to the allowed
CPU freqs
Patch from Willy Tarreau
Original commit message :
At least 1920 MHz runs stable on the MiQi even on openssl speed -multi 4,
which is by far the most intensive workload, and 1992/2016 work fine on
the CS-008 until it starts to heat too much. So add all of them so that
the device tree can simply manipulate them.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 753c649..fd2058f 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -145,6 +145,23 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
}
static struct rockchip_cpuclk_rate_table rk3288_cpuclk_rates[] __initdata = {
+ RK3288_CPUCLK_RATE(2208000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2184000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2160000000U, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2136000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2112000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2088000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2064000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2040000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(2016000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1992000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1968000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1944000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1920000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1896000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1872000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1848000000, 1, 3, 1, 3, 3),
+ RK3288_CPUCLK_RATE(1824000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1800000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1704000000, 1, 3, 1, 3, 3),
RK3288_CPUCLK_RATE(1608000000, 1, 3, 1, 3, 3),
--
2.10.2

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@ -0,0 +1,41 @@
From b82f540967f6a732a22bbd236457b864951aeda7 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sun, 14 May 2017 10:13:26 +0000
Subject: [PATCH] clk: rockchip: rk3288: prefer vdpu for vcodec clock source
Patch provided by Randy Li. The original commit message reads :
_______________
The RK3288 CRU system clock solution would suggest use
the vdpu clock source for the VPU(aclk_vpu and hclk_vpu).
Reading the registers of VPU(both VEPU and VDPU) would become all high
when the vepu is used as the clock source. It may be a bug in the SoC,
not sure whether it is fixed at RK3288W.
Signed-off-by: Randy Li <ayaka@soulik.info>
_______________
This also resolves a freeze when loading the OOT Video Codec driver
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 1227f74..f218256 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -215,7 +215,7 @@ PNAME(mux_hsadcout_p) = { "hsadc_src", "ext_hsadc" };
PNAME(mux_edp_24m_p) = { "ext_edp_24m", "xin24m" };
PNAME(mux_tspout_p) = { "cpll", "gpll", "npll", "xin27m" };
-PNAME(mux_aclk_vcodec_pre_p) = { "aclk_vepu", "aclk_vdpu" };
+PNAME(mux_aclk_vcodec_pre_p) = { "aclk_vdpu", "aclk_vepu" };
PNAME(mux_usbphy480m_p) = { "sclk_otgphy1_480m", "sclk_otgphy2_480m",
"sclk_otgphy0_480m" };
PNAME(mux_hsicphy480m_p) = { "cpll", "gpll", "usbphy480m_src" };
--
2.10.2

View File

@ -0,0 +1,30 @@
From 239a5e3016b7f676bc3f56ea509ed172bf954001 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sat, 22 Jul 2017 04:07:36 +0000
Subject: [PATCH] Remove the dependency to the clk_mali symbol.
Inspired by @wzzy2 patch
https://github.com/rockchip-linux/rockchip_forwardports/commit/359865c617129fe5fcc5530f4a88abcfaa6a5cb4
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
index 9cc65d2..27dcd9c 100644
--- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
@@ -3793,7 +3793,7 @@ static int power_control_init(struct platform_device *pdev)
}
#endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
- kbdev->clock = clk_get(kbdev->dev, "clk_mali");
+ kbdev->clock = of_clk_get(kbdev->dev->of_node, 0);
if (IS_ERR_OR_NULL(kbdev->clock)) {
err = PTR_ERR(kbdev->clock);
kbdev->clock = NULL;
--
2.10.2

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@ -0,0 +1,156 @@
From 1aeeeeaf10ad5888c1a5b3ab9b780be91c7dada9 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 24 Jul 2017 23:09:31 +0000
Subject: [PATCH] Last try for the reboot hack
If this one does not work, get a refund for your CantRebootBoard.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
drivers/mmc/host/dw_mmc.c | 26 ++++++++++++++++++++++++++
include/linux/reboot.h | 3 +++
kernel/reboot.c | 1 +
4 files changed, 54 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index aaed6f9b..71131020 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -14,10 +14,12 @@
#include <linux/of_address.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h> // Hack
#include <linux/slab.h>
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
+#include "../core/core.h" // Hack
#define RK3288_CLKGEN_DIV 2
@@ -365,6 +367,27 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
return 0;
}
+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
+{
+ struct dw_mci *host = platform_get_drvdata(pdev);
+ struct mmc_host *mmc = host->slot->mmc;
+ int ret;
+
+ if(of_machine_is_compatible("asus,rk3288-tinker")){
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ ret = regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+ }
+}
+
+
static int dw_mci_rockchip_remove(struct platform_device *pdev)
{
pm_runtime_get_sync(&pdev->dev);
@@ -385,6 +408,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
static struct platform_driver dw_mci_rockchip_pltfm_driver = {
.probe = dw_mci_rockchip_probe,
.remove = dw_mci_rockchip_remove,
+ .shutdown = dw_mci_rockchip_platfm_shutdown,
.driver = {
.name = "dwmmc_rockchip",
.of_match_table = dw_mci_rockchip_match,
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index a9dfb269..ee956a57 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -39,8 +39,10 @@
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/mmc/slot-gpio.h>
+#include <linux/reboot.h> // Hack
#include "dw_mmc.h"
+#include "../core/core.h" // Hack
/* Common flag combinations */
#define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
@@ -2687,6 +2689,28 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+struct dw_mci *mSdhost;
+void setmmcEmergency() {
+ struct mmc_host *mmc;
+ int ret;
+
+ printk(KERN_ERR "Emergency route taken.\n");
+ if (of_machine_is_compatible("asus,rk3288-tinker")) {
+ mmc = mSdhost->slot->mmc;
+
+ mmc_power_off(mmc);
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ ret = regulator_enable(mmc->supply.vmmc);
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+ }
+}
+EXPORT_SYMBOL(setmmcEmergency);
+
static int dw_mci_init_slot(struct dw_mci *host)
{
struct mmc_host *mmc;
@@ -2718,6 +2742,8 @@ static int dw_mci_init_slot(struct dw_mci *host)
mmc->f_max = freq[1];
}
+ if (of_find_property(host->dev->of_node, "supports-sd", NULL))
+ mSdhost = host;
/*if there are external regulators, get them*/
ret = mmc_regulator_get_supply(mmc);
if (ret == -EPROBE_DEFER)
diff --git a/include/linux/reboot.h b/include/linux/reboot.h
index a7ff409f..586e4504 100644
--- a/include/linux/reboot.h
+++ b/include/linux/reboot.h
@@ -72,12 +72,15 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
extern void orderly_poweroff(bool force);
extern void orderly_reboot(void);
+// Wonderful ASUS hack
+extern void setmmcEmergency(void);
/*
* Emergency restart, callable from an interrupt handler.
*/
extern void emergency_restart(void);
+
#include <asm/emergency-restart.h>
#endif /* _LINUX_REBOOT_H */
diff --git a/kernel/reboot.c b/kernel/reboot.c
index bd30a973..9f99488f 100644
--- a/kernel/reboot.c
+++ b/kernel/reboot.c
@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
void emergency_restart(void)
{
kmsg_dump(KMSG_DUMP_EMERG);
+ setmmcEmergency();
machine_emergency_restart();
}
EXPORT_SYMBOL_GPL(emergency_restart);
--
2.13.0

View File

@ -0,0 +1,59 @@
From c9f505dba7e4a3adc62054b852349e8bbae10326 Mon Sep 17 00:00:00 2001
From: Jacob Chen <jacob-chen@iotwrt.com>
Date: Mon, 26 Jun 2017 22:53:22 +0800
Subject: [PATCH 5/9] dt-bindings: Document the Rockchip RGA bindings
Add DT bindings documentation for Rockchip RGA
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
---
.../devicetree/bindings/media/rockchip-rga.txt | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt
diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt
new file mode 100644
index 00000000..48a260e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
@@ -0,0 +1,36 @@
+device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)
+
+RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D
+graphics operations, such as point/line drawing, image scaling, rotation,
+BitBLT, alpha blending and image blur/sharpness.
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3228-rga";
+ "rockchip,rk3288-rga";
+ "rockchip,rk3399-rga";
+
+- interrupts: RGA interrupt number.
+
+- clocks: phandle to RGA sclk/hclk/aclk clocks
+
+- clock-names: should be "aclk" "hclk" and "sclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+- reset-names: should be "core" "axi" and "ahb"
+
+Example:
+SoC specific DT entry:
+ rga: rga@ff680000 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0xff680000 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
+ reset-names = "core, "axi", "ahb";
+ status = "disabled";
+ };
--
2.13.0

View File

@ -0,0 +1,83 @@
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 7b6eb0ad513b..96b6935dc0d7 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -2748,6 +2748,8 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
chan->xfer_len = urb->length - urb->actual_length;
chan->xfer_count = 0;
+ chan->csplit_nak = 0;
+
/* Set the split attributes if required */
if (qh->do_split)
dwc2_hc_init_split(hsotg, chan, qtd, urb);
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 78e9e01051b5..e54f1351225b 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -143,6 +143,7 @@ struct dwc2_host_chan {
u8 halt_pending;
u8 do_split;
u8 complete_split;
+ u8 csplit_nak;
u8 hub_addr;
u8 hub_port;
u8 xact_pos;
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index 916d991b96b8..551cfacd2252 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -691,6 +691,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
enum dwc2_transaction_type tr_type;
u32 haintmsk;
int free_qtd = 0;
+ int continue_trans = 1;
if (dbg_hc(chan))
dev_vdbg(hsotg->dev, " %s: channel %d, halt_status %d\n",
@@ -719,6 +720,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
* deactivated. Don't want to do anything except release the
* host channel and try to queue more transfers.
*/
+ continue_trans = 0;
goto cleanup;
case DWC2_HC_XFER_PERIODIC_INCOMPLETE:
dev_vdbg(hsotg->dev, " Complete URB with I/O error\n");
@@ -730,6 +732,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
break;
}
+ if (chan->csplit_nak) {
+ continue_trans = 0;
+ chan->csplit_nak = 0;
+ }
+
dwc2_deactivate_qh(hsotg, chan->qh, free_qtd);
cleanup:
@@ -767,9 +774,11 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
dwc2_writel(haintmsk, hsotg->regs + HAINTMSK);
/* Try to queue more transfers now that there's a free channel */
- tr_type = dwc2_hcd_select_transactions(hsotg);
- if (tr_type != DWC2_TRANSACTION_NONE)
- dwc2_hcd_queue_transactions(hsotg, tr_type);
+ if (continue_trans) {
+ tr_type = dwc2_hcd_select_transactions(hsotg);
+ if (tr_type != DWC2_TRANSACTION_NONE)
+ dwc2_hcd_queue_transactions(hsotg, tr_type);
+ }
}
/*
@@ -1205,6 +1214,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
if (chan->do_split) {
if (chan->complete_split)
qtd->error_count = 0;
+ chan->csplit_nak = 1;
qtd->complete_split = 0;
dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_NAK);
goto handle_nak_done;
--
2.11.0

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@ -0,0 +1,35 @@
From 604ea7fc311af2b3a41e7fe3b4fbde0ee03dfb9c Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:09:50 +0200
Subject: [PATCH 04/28] dts: rk3288: miqi: Enabling the Mali GPU node
Why is the MiQi the only one left without a working mali GPU node ?
Seriously, is there a rk3288 chipset WITHOUT a mali GPU ? Couldn't
they enable it once in the DTSI, instead of defining it as "disabled"
and enabling it in every DTS file ?
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 4d923aa6..3cd60674 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -149,6 +149,11 @@
status = "ok";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
--
2.11.0

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@ -0,0 +1,45 @@
From 89e5763110ca77d68a4be00cd97a638adc2401d5 Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Tue, 2 Aug 2016 08:31:00 +0200
Subject: [PATCH 05/28] ARM: dts: rockchip: fix the regulator's voltage range
on MiQi board
The board declared too narrow a voltage range for the CPU and GPU
regulators, preventing it from using the full CPU frequency range.
The regulators support 712500 to 1500000 microvolts.
Signed-off-by: Willy Tarreau <w@1wt.eu>
(cherry picked from commit 95330e63a9295a2632cee8cce5db80677f01857a)
---
arch/arm/boot/dts/rk3288-miqi.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 3cd60674..a1c3cdaa 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -168,8 +168,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x40>;
regulator-name = "vdd_cpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-enable-ramp-delay = <300>;
@@ -182,8 +182,8 @@
fcs,suspend-voltage-selector = <1>;
reg = <0x41>;
regulator-name = "vdd_gpu";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
--
2.11.0

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@ -0,0 +1,46 @@
From c27e445527e949f3ef46d5326066196969c17d23 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Sun, 12 Mar 2017 19:43:15 +0000
Subject: [PATCH 06/28] ARM: dts: rockchip: add the MiQi board's fan definition
The MiQi board is sold with an enclosure in which a fan is connected
to the second LED output, and configured by default in "heartbeat"
mode so that it rotates slowly and increases when the CPU load
increases, ensuring appropriate cooling by default. This LED output
is called "Fan" in the original kernel and connected to GPIO18
(gpiochip 0, pin 18). Here we called it "miqi:green:fan" to stay
consistent with the kernel's naming conventions.
It's worth noting that without this patch the fan doesn't work at
all, risking to make the board overheat.
Fixes: 162718c (v4.7)
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Myy <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index a1c3cdaa..0e383595 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -67,6 +67,13 @@
leds {
compatible = "gpio-leds";
+ fan {
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "miqi:green:fan";
+ linux,default-trigger = "heartbeat";
+ };
+
+
work {
gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "miqi:green:user";
--
2.11.0

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@ -0,0 +1,41 @@
From e7e092be197c51b4d222a3b4e6638318067b7e6a Mon Sep 17 00:00:00 2001
From: Willy Tarreau <w@1wt.eu>
Date: Tue, 2 Aug 2016 08:20:53 +0200
Subject: [PATCH 07/28] ARM: dts: rockchip: add support for 1800 MHz operation
on MiQi board
This board happily supports 1800 MHz operations (and even more), so
let's enable it.
Signed-off-by: Willy Tarreau <w@1wt.eu>
(cherry picked from commit a0b82a29e7873a81f49ac5f50be3df1c7d312a14)
---
arch/arm/boot/dts/rk3288-miqi.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 0e383595..80603a3d 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -126,6 +126,18 @@
&cpu0 {
cpu0-supply = <&vdd_cpu>;
+ operating-points = <
+ /* KHz uV */
+ 1800000 1400000
+ 1704000 1350000
+ 1608000 1300000
+ 1512000 1250000
+ 1416000 1200000
+ 1200000 1100000
+ 1008000 1050000
+ 816000 1000000
+ 600000 900000
+ >;
};
&emmc {
--
2.11.0

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@ -0,0 +1,170 @@
From de9dcd5ecab0686022eee243464f35d2c7a34c97 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 16 Jan 2017 12:44:56 +0000
Subject: [PATCH 08/28] Readapt: ARM: dts: rockchip: miqi: add turbo-mode
operating points
Readaptation of Willy Tarreau patch.
Here's the original commit message:
By switching to opp-v2 we can declare "turbo-mode" operating points
which are only enabled when /sys/devices/system/cpu/cpufreq/boost is
set. It is convenient because it allows to boot, set a safe powersave
governor, enable boost, limit scaling_max_freq to a safe value, then
change the governor to performance or ondemand, and the frequency can
then be manually adjusted by only touching scaling_max_freq.
New values are 1896, 1920, 1992, 2016, 2040 MHz, 2064, 2088, 2112,
2136, 2160, 2184, 2208. MiQi boards work fine up to 2112 with a very
good power supply (5.2V/3A real) and a strong heatsink. Higher
frequencies may randomly work. At least 1992 is rock solid for hours
using "openssl speed -multi 4". The other ones have only been tested
for a few minutes. Frequencies of 1896 and 1920 MHz use 1.425V.
1992 MHz uses 1.45V. 2016, 2040 and 2064 use 1.475V. 2088 and above
use 1.500V. 2160, 2184 and 2208 cause the lowest frequency to be
picked. It's obvious that it's a sign issue somewhere in the kernel
but this one was not found yet.
Signed-off-by: Myy <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 120 +++++++++++++++++++++++++++++++++-----
1 file changed, 107 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 80603a3d..d7fde483 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -122,22 +122,116 @@
regulator-always-on;
regulator-boot-on;
};
-};
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2088000000 {
+ opp-hz = /bits/ 64 <2088000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2112000000 {
+ opp-hz = /bits/ 64 <2112000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2136000000 {
+ opp-hz = /bits/ 64 <2136000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2160000000 {
+ opp-hz = /bits/ 64 <2160000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2184000000 {
+ opp-hz = /bits/ 64 <2184000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ opp@2208000000 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-microvolt = <1500000>;
+ turbo-mode;
+ };
+ };
+};
+
&cpu0 {
cpu0-supply = <&vdd_cpu>;
- operating-points = <
- /* KHz uV */
- 1800000 1400000
- 1704000 1350000
- 1608000 1300000
- 1512000 1250000
- 1416000 1200000
- 1200000 1100000
- 1008000 1050000
- 816000 1000000
- 600000 900000
- >;
+
+ operating-points-v2 = <&cpu0_opp_table>;
};
&emmc {
--
2.11.0

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@ -0,0 +1,61 @@
From 771bcfe1735e42650b763e52a042a9fd98b2fa5b Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:20:43 +0200
Subject: [PATCH 09/28] ARM: DTSI: rk3288.dtsi: Missing GRF handles
Add missing GRF handles.
This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 356ed1e6..5b789528 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -547,6 +547,7 @@
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -655,6 +656,7 @@
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -666,6 +668,7 @@
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -677,6 +680,7 @@
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -688,6 +692,7 @@
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
+ rockchip,grf = <&grf>;
status = "disabled";
};
--
2.11.0

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@ -0,0 +1,31 @@
From 062488e4b8fd552c01e1104b3bc91a6f7ffe6c41 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:24:47 +0200
Subject: [PATCH 10/28] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
The spi2_cs1 pin reference is missing in the spi2 first pin control
definition.
This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 5b789528..9ed532cc 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -334,7 +334,7 @@
dma-names = "tx", "rx";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
+ pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0 &spi2_cs1>;
reg = <0x0 0xff130000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.11.0

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@ -0,0 +1,27 @@
From af8d73ec0df1dde1e2fe1674c5708d4c30385ba9 Mon Sep 17 00:00:00 2001
From: Myy <myy@miouyouyou.fr>
Date: Mon, 5 Jun 2017 12:37:17 +0000
Subject: [PATCH 11/28] Added support for Tinkerboard's SPI interface
Imported from ARMbian
Signed-off-by: Myy <myy@miouyouyou.fr>
---
drivers/spi/spidev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index cda10719..a6287475 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -669,6 +669,7 @@ static const struct of_device_id spidev_dt_ids[] = {
{ .compatible = "lineartechnology,ltc2488" },
{ .compatible = "ge,achc" },
{ .compatible = "semtech,sx1301" },
+ { .compatible = "rockchip,spi_tinker" },
{},
};
MODULE_DEVICE_TABLE(of, spidev_dt_ids);
--
2.11.0

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@ -0,0 +1,56 @@
From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:39:00 +0200
Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
sizes of MMC nodes
Imported from the Rockchip 4.4 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index be985f02..14ef8202 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -236,6 +236,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0c0000 0x0 0x4000>;
resets = <&cru SRST_MMC0>;
reset-names = "reset";
@@ -250,6 +252,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0d0000 0x0 0x4000>;
resets = <&cru SRST_SDIO0>;
reset-names = "reset";
@@ -264,6 +268,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0e0000 0x0 0x4000>;
resets = <&cru SRST_SDIO1>;
reset-names = "reset";
@@ -278,6 +284,8 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x0 0xff0f0000 0x0 0x4000>;
resets = <&cru SRST_EMMC>;
reset-names = "reset";
--
2.11.0

View File

@ -0,0 +1,27 @@
From ac220d592aa38b9b717d36f7bb93f7be5a08f6b3 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:43:51 +0200
Subject: [PATCH 14/28] ARM: DTSI: rk3288.dtsi: Adding missing EDP power domain
Imported from Rockchip 4.4 kernel patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 14ef8202..10ecebb4 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1105,6 +1105,7 @@
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
+ power-domains = <&power RK3288_PD_VIO>;
phys = <&edp_phy>;
phy-names = "dp";
resets = <&cru SRST_EDP>;
--
2.11.0

View File

@ -0,0 +1,40 @@
From 3fe37d29b53e3d06c8f4314cfc113bfa679f67eb Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:48:05 +0200
Subject: [PATCH 15/28] ARM: DTSI: rk3288.dtsi: Add the RGA node
Imported from @wzyy2 patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 10ecebb4..455446f6 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1159,6 +1159,20 @@
};
};
+ rga: rga@ff920000 {
+ compatible = "rockchip,rk3288-rga";
+ reg = <0x0 0xff920000 0x0 0x180>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "rga";
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+ clock-names = "aclk", "hclk", "sclk";
+ power-domains = <&power RK3288_PD_VIO>;
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>;
+
+ reset-names = "core", "axi", "ahb";
+ status = "disabled";
+ };
+
vpu_mmu: iommu@ff9a0800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0800 0x0 0x100>;
--
2.11.0

View File

@ -0,0 +1,28 @@
From c5af6798c9a411b3f550f463182a4b4904a21ec2 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:51:14 +0200
Subject: [PATCH 16/28] ARM: DTSI: rk3288.dtsi: Adding missing VOPB registers
Imported from @wzyy2 patches... I think...
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 455446f6..125f8835 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -987,7 +987,7 @@
vopb: vop@ff930000 {
compatible = "rockchip,rk3288-vop";
- reg = <0x0 0xff930000 0x0 0x19c>;
+ reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
--
2.11.0

View File

@ -0,0 +1,31 @@
From a0602b2724893de7ac9b4190a7a6bb66458da2d5 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:54:37 +0200
Subject: [PATCH 17/28] ARM: DTSI: rk3288.dtsi: Fixed the SPDIF node address
Now, the typo is only in the name of the node itself, not in the
actual registers addresses definition.
Still, this ought to be fixed one day !
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 125f8835..e5d3d3c9 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -922,7 +922,7 @@
status = "disabled";
};
- spdif: sound@ff88b0000 {
+ spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;
--
2.11.0

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@ -0,0 +1,165 @@
From 2715f4a9ab5c169c546029a61eebb0bde6619b0e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:12:48 +0200
Subject: [PATCH 18/28] ARM: DTS: rk3288-tinker.dts: Enabling SDIO, Wireless
and Bluetooth
Adding the appropriate nodes in order to exploit the WiFi capabilities
of the board.
Since these capabilities are provided through SDIO, and the SDIO
nodes were not defined, these were added too.
These seems to depend on each other so they are added in one big
patch.
Split if necessary.
Bluetooth and uart0 (AKA Bluetooth UART) definitions were also added
in order to deal with all the wireless techs in one patch.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 82 ++++++++++++++++++++++++++++++++++++-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 346b0d8b..c552fd95 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -44,6 +44,7 @@
#include "rk3288.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
model = "Rockchip RK3288 Tinker Board";
@@ -114,6 +115,24 @@
};
};
+ /* This is essential to get SDIO devices working.
+ The Wifi depends on SDIO ! */
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
+ };
+
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -134,6 +153,28 @@
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
+
+ wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "8723bs";
+ sdio_vref = <1800>;
+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default","rts_gpio";
+ pinctrl-0 = <&uart0_rts>;
+ pinctrl-1 = <&uart0_gpios>;
+ BT,reset_gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
};
&cpu0 {
@@ -373,10 +414,30 @@
&io_domains {
status = "okay";
-
+ rockchip,grf = <&grf>;
+ wifi-supply = <&vcc_18>;
sdcard-supply = <&vccio_sd>;
};
+&sdio0 {
+ status = "okay";
+ clock-frequency = <50000000>;
+ clock-freq-min-max = <200000 50000000>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ supports-sdio;
+
+};
+
&pinctrl {
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
@@ -422,6 +483,16 @@
};
};
+ sdio-pwrseq {
+ wifi_enable_h: wifienable-h {
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ chip_enable_h: chip-enable-h {
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
@@ -453,6 +524,13 @@
rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
};
&pwm0 {
@@ -485,6 +563,8 @@
&uart0 {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
};
&uart1 {
--
2.11.0

View File

@ -0,0 +1,40 @@
From 39e50ab508d8104a733771a8681908a66a300edd Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:25:03 +0200
Subject: [PATCH 20/28] ARM: DTS: rk3288-tinker.dts: Setting up the SD
regulators
Some are needed and some are not. Playing with these parameters is
required to get reboot working on these boards.
I still can't believe that these boards can't soft reset correctly.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 4ce94698..90c1a251 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -333,6 +333,8 @@
};
vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
@@ -379,7 +381,6 @@
};
vcc33_sd: SWITCH_REG1 {
- regulator-always-on;
regulator-boot-on;
regulator-name = "vcc33_sd";
regulator-state-mem {
--
2.11.0

View File

@ -0,0 +1,53 @@
From b0a552add28bf4590b979abb3530b14b6811eec1 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:33:39 +0200
Subject: [PATCH 21/28] ARM: DTS: rk3288-tinker.dts: Defined the I2C interfaces
And all the hardware behind.
Taken from, and tested by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 90c1a251..67a3ce6f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -400,8 +400,31 @@
};
};
+&i2c1 {
+ status = "okay";
+};
+
&i2c2 {
status = "okay";
+
+ afc0:af-controller@0 {
+ status = "okay";
+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
+ reg = <0x0 0x0c>;
+ };
+
+ eeprom:m24c08@50 {
+ compatible = "at,24c08";
+ reg = <0x0 0x50>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
};
&i2c5 {
--
2.11.0

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@ -0,0 +1,35 @@
From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:36:02 +0200
Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
Taken from, and tested by @TonyMac32 .
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 67a3ce6f..6f4c0843 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -443,6 +443,15 @@
sdcard-supply = <&vccio_sd>;
};
+&mipi_dsi {
+ status = "okay";
+ mipi_panel: mipi-panel {
+ compatible ="asus,tc358762";
+ reg = <0x0 0>;
+ status = "okay";
+ };
+};
+
&sdio0 {
status = "okay";
clock-frequency = <50000000>;
--
2.11.0

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@ -0,0 +1,49 @@
From 14f951ca2d354ad8fd068d0f3d8648d5c0d1e60e Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:40:26 +0200
Subject: [PATCH 23/28] ARM: DTS: rk3288-tinker.dts: Defining the SPI interface
Taken from, and tested by @TonyMac32 .
Well, the original one was tested by him but I had to adapt the
registers definitions to the new 64-bits LPAE-compliant syntax.
Therefore that *might* break, along with a few other patches.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 6f4c0843..f4b4525c 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -471,6 +471,24 @@
};
+&spi2 {
+ status = "okay";
+ max-freq = <50000000>;
+ spidev@0 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 0>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+ spidev@1 {
+ compatible = "rockchip,spi_tinker";
+ reg = <0x0 1>;
+ spi-max-frequency = <50000000>;
+ spi-cpha = <1>;
+ };
+};
+
+
&pinctrl {
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
--
2.11.0

View File

@ -0,0 +1,33 @@
From 58d72a1cc693c4c08391487476d0cd6d167a57cf Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 22:48:36 +0200
Subject: [PATCH 24/28] ARM: DTS: rk3288-tinker.dts: Defining SDMMC properties
I never knew if these properties were required to fix the dreaded
reboot issue...
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index f4b4525c..a0663425 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -601,7 +601,12 @@
disable-wp; /* wp not hooked up */
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
status = "okay";
+ supports-sd;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};
--
2.11.0

View File

@ -0,0 +1,107 @@
From f4480cb8198085607c15e523b49aa21bc38cf62c Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:47:33 +0100
Subject: [PATCH 1/5] ARM: DTSI: rk3288.dtsi: Define the VPU services
Still, you will need appropriate drivers to use them.
Contrary to the previous versions of this patch, these services are :
* NOT enabled by default;
* MUST be activated in each individual DTS;
I currently do not own enough RK3288 boards to ensure that the
VPU and HEVC MMU + services can be activated without issues.
Still this patch does not generate issues like the previous one AND
still enable these services on boot, when activated properly in
individual DTS files.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 30b04257..bc3601ac 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1182,6 +1182,27 @@
status = "disabled";
};
+ vpu_service: vpu-service@ff9a0000 {
+ compatible = "rockchip,vpu_service";
+ reg = <0x0 0xff9a0000 0x0 0x800>;
+ interrupts =
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_enc", "irq_dec";
+ clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+ clock-names = "aclk_vcodec", "hclk_vcodec";
+ power-domains = <&power RK3288_PD_VIDEO>;
+ rockchip,grf = <&grf>;
+ resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
+ reset-names = "video_a", "video_h";
+ iommus = <&vpu_mmu>;
+ iommu_enabled = <1>;
+ dev_mode = <0>;
+ status = "disabled";
+ /* 0 means ion, 1 means drm */
+ allocator = <1>;
+ };
+
hevc_mmu: iommu@ff9c0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
@@ -1191,6 +1212,48 @@
status = "disabled";
};
+ hevc_service: hevc-service@ff9c0000 {
+ compatible = "rockchip,hevc_service";
+ reg = <0x0 0xff9c0000 0x0 0x400>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_dec";
+ clocks =
+ <&cru ACLK_HEVC>,
+ <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CORE>,
+ <&cru SCLK_HEVC_CABAC>;
+ clock-names =
+ "aclk_vcodec",
+ "hclk_vcodec",
+ "clk_core",
+ "clk_cabac";
+ /*
+ * The 4K hevc would also work well with 500/125/300/300,
+ * no more err irq and reset request.
+ */
+ assigned-clocks =
+ <&cru ACLK_HEVC>,
+ <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CORE>,
+ <&cru SCLK_HEVC_CABAC>;
+ assigned-clock-rates =
+ <400000000>,
+ <100000000>,
+ <300000000>,
+ <300000000>;
+
+ resets = <&cru SRST_HEVC>;
+ reset-names = "video";
+ power-domains = <&power RK3288_PD_HEVC>;
+ rockchip,grf = <&grf>;
+ dev_mode = <1>;
+ iommus = <&hevc_mmu>;
+ iommu_enabled = <1>;
+ status = "disabled";
+ /* 0 means ion, 1 means drm */
+ allocator = <1>;
+ };
+
gpu: gpu@ffa30000 {
compatible = "rockchip,rk3288-mali", "arm,mali-t760";
reg = <0x0 0xffa30000 0x0 0x10000>;
--
2.14.1

View File

@ -0,0 +1,57 @@
From 647d6012849191e9909a8acb0fc9ae5df1afc747 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:51:31 +0100
Subject: [PATCH 2/5] ARM: DTS: rk3288-miqi.dts: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU service;
* HEVC MMU;
* HEVC service;
on MiQi devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-miqi.dts | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index d7fde483..dd785c70 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -124,7 +124,7 @@
};
- cpu0_opp_table: opp_table0 {
+ cpu0_opp_table: opp_table {
compatible = "operating-points-v2";
opp-shared;
@@ -575,6 +575,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

View File

@ -0,0 +1,48 @@
From 092c26ead2eb4035a57217f8705c9deed3bfb927 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:54:22 +0100
Subject: [PATCH 3/5] ARM: DTS: rk3288-tinker: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for ASUS Tinkerboard devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-tinker.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index a0663425..07b4af4f 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -671,6 +671,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

View File

@ -0,0 +1,49 @@
From 2769b0e656d849c5d652c75db71ce0faff1c0551 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:56:45 +0100
Subject: [PATCH 4/5] ARM: DTSI: rk3288-firefly: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for RK3288 Firefly devices.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-firefly.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index b9e6f3a9..9961acce 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -606,6 +606,23 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
+
--
2.14.1

View File

@ -0,0 +1,48 @@
From 4766516bcbf023813ad883c2d61c422316770d12 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Tue, 21 Nov 2017 21:58:22 +0100
Subject: [PATCH 5/5] ARM: DTSI: rk3288-veyron: Enable the Video encoding MMU
and services
Enable the :
* VPU MMU;
* VPU Service;
* HEVC MMU;
* HEVC Service;
for RK3288 Chromebook laptops.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 6e5bd897..517b9242 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -450,6 +450,22 @@
status = "okay";
};
+&vpu_mmu {
+ status = "okay";
+};
+
+&vpu_service {
+ status = "okay";
+};
+
+&hevc_mmu {
+ status = "okay";
+};
+
+&hevc_service {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
--
2.14.1

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@ -0,0 +1,19 @@
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 23d1d23..98610ae 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -434,6 +434,14 @@ static int snd_usb_audio_create(struct usb_interface *intf,
}
strim(card->shortname);
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
+
/* retrieve the vendor and device strings as longname */
if (quirk && quirk->vendor_name && *quirk->vendor_name) {
len = strlcpy(card->longname, quirk->vendor_name, sizeof(card->longname));

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@ -0,0 +1,30 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 07b4af4..7755426 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -162,7 +162,7 @@
WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
status = "okay";
};
-
+/*
wireless-bluetooth {
compatible = "bluetooth-platdata";
uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
@@ -174,6 +174,7 @@
BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+*/
};
@@ -620,7 +621,7 @@
&uart0 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
};
&uart1 {

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@ -0,0 +1,17 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 925b277..33b198e 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -100,6 +100,12 @@
};
};
+ rk3288-gpiomem {
+ compatible = "rockchip,rk3288-gpiomem";
+ reg = <0x0 0xff750000 0x0 0x1000>;
+ status = "okay";
+ };
+
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";

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@ -0,0 +1,364 @@
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index c28dca0..d9df49d 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -6,6 +6,7 @@
menu "Character devices"
source "drivers/tty/Kconfig"
+source "drivers/char/rockchip/Kconfig"
config DEVMEM
bool "/dev/mem virtual device support"
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 7dc3abe..5d43b1d 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -60,3 +60,5 @@ js-rtc-y = rtc.o
obj-$(CONFIG_TILE_SROM) += tile-srom.o
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
+
+obj-$(CONFIG_RK_CHAR_DRIVERS) += rockchip/
diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
new file mode 100644
index 0000000..867d51e
--- /dev/null
+++ b/drivers/char/rockchip/Kconfig
@@ -0,0 +1,16 @@
+#
+# Broadcom char driver config
+#
+
+menuconfig RK_CHAR_DRIVERS
+ bool "Rockchip Char Drivers"
+ help
+ Rockchip's char drivers
+
+config RK3288_DEVGPIOMEM
+ tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
+ default y
+ help
+ Provides users with root-free access to the GPIO registers
+ on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
+ register page to the user's pointer.
diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
new file mode 100644
index 0000000..e7df7f2
--- /dev/null
+++ b/drivers/char/rockchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
new file mode 100644
index 0000000..c289041
--- /dev/null
+++ b/drivers/char/rockchip/rk3288-gpiomem.c
@@ -0,0 +1,307 @@
+/**
+ * GPIO memory device driver
+ *
+ * Creates a chardev /dev/gpiomem which will provide user access to
+ * the rk3288's GPIO registers when it is mmap()'d.
+ * No longer need root for user GPIO access, but without relaxing permissions
+ * on /dev/mem.
+ *
+ * Written by Luke Wren <luke@raspberrypi.org>
+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2, as published by the Free
+ * Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Ported to rk3288 from Jörg Wolff, 2017
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/cdev.h>
+#include <linux/pagemap.h>
+#include <linux/io.h>
+
+#define DEVICE_NAME "rk3288-gpiomem"
+#define DRIVER_NAME "gpiomem-rk3288"
+#define DEVICE_MINOR 0
+
+struct rk3288_gpiomem_instance {
+ unsigned long gpio_regs_phys;
+ struct device *dev;
+};
+
+static struct cdev rk3288_gpiomem_cdev;
+static dev_t rk3288_gpiomem_devid;
+static struct class *rk3288_gpiomem_class;
+static struct device *rk3288_gpiomem_dev;
+static struct rk3288_gpiomem_instance *inst;
+
+
+/****************************************************************************
+*
+* GPIO mem chardev file ops
+*
+***************************************************************************/
+
+static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device: %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
+{
+ int dev = iminor(inode);
+ int ret = 0;
+
+ if (dev != DEVICE_MINOR) {
+ dev_err(inst->dev, "Unknown minor device %d", dev);
+ ret = -ENXIO;
+ }
+ return ret;
+}
+
+static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+ .access = generic_access_phys
+#endif
+};
+static int address_is_allowed(unsigned long pfn, unsigned long size)
+{
+ unsigned long address = pfn << PAGE_SHIFT;
+
+ dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
+
+ switch(address) {
+
+ case 0xff750000:
+ case 0xff760000:
+ case 0xff780000:
+ case 0xff790000:
+ case 0xff7a0000:
+ case 0xff7b0000:
+ case 0xff7c0000:
+ case 0xff7d0000:
+ case 0xff7e0000:
+ case 0xff7f0000:
+ case 0xff7f2000:
+ case 0xff770000:
+ case 0xff730000:
+ case 0xff680000:
+ dev_info(inst->dev, "address_is_allowed.return 1");
+ return 1;
+ break;
+ default :
+ dev_info(inst->dev, "address_is_allowed.return 0");
+ return 0;
+ }
+}
+
+static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+
+ size_t size;
+
+ size = vma->vm_end - vma->vm_start;
+
+
+ if (!address_is_allowed(vma->vm_pgoff, size))
+ return -EPERM;
+
+ vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
+ size,
+ vma->vm_page_prot);
+
+ vma->vm_ops = &rk3288_gpiomem_vm_ops;
+
+ /* Remap-pfn-range will mark the range VM_IO */
+ if (remap_pfn_range(vma,
+ vma->vm_start,
+ vma->vm_pgoff,
+ size,
+ vma->vm_page_prot)) {
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+static const struct file_operations
+rk3288_gpiomem_fops = {
+ .owner = THIS_MODULE,
+ .open = rk3288_gpiomem_open,
+ .release = rk3288_gpiomem_release,
+ .mmap = rk3288_gpiomem_mmap,
+};
+
+static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ add_uevent_var(env, "DEVMODE=%#o", 0660);
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Probe and remove functions
+*
+***************************************************************************/
+
+
+static int rk3288_gpiomem_probe(struct platform_device *pdev)
+{
+ int err;
+ void *ptr_err;
+ struct device *dev = &pdev->dev;
+ struct resource *ioresource;
+
+ /* Allocate buffers and instance data */
+
+ inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
+
+ if (!inst) {
+ err = -ENOMEM;
+ goto failed_inst_alloc;
+ }
+
+ inst->dev = dev;
+
+ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (ioresource) {
+ inst->gpio_regs_phys = ioresource->start;
+ } else {
+ dev_err(inst->dev, "failed to get IO resource");
+ err = -ENOENT;
+ goto failed_get_resource;
+ }
+
+ /* Create character device entries */
+
+ err = alloc_chrdev_region(&rk3288_gpiomem_devid,
+ DEVICE_MINOR, 1, DEVICE_NAME);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to allocate device number");
+ goto failed_alloc_chrdev;
+ }
+ cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
+ rk3288_gpiomem_cdev.owner = THIS_MODULE;
+ err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
+ if (err != 0) {
+ dev_err(inst->dev, "unable to register device");
+ goto failed_cdev_add;
+ }
+
+ /* Create sysfs entries */
+
+ rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
+ ptr_err = rk3288_gpiomem_class;
+ if (IS_ERR(ptr_err))
+ goto failed_class_create;
+ rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
+ rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
+ rk3288_gpiomem_devid, NULL,
+ "gpiomem");
+ ptr_err = rk3288_gpiomem_dev;
+ if (IS_ERR(ptr_err))
+ goto failed_device_create;
+
+ dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
+ inst->gpio_regs_phys);
+
+ return 0;
+
+failed_device_create:
+ class_destroy(rk3288_gpiomem_class);
+failed_class_create:
+ cdev_del(&rk3288_gpiomem_cdev);
+ err = PTR_ERR(ptr_err);
+failed_cdev_add:
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+failed_alloc_chrdev:
+failed_get_resource:
+ kfree(inst);
+failed_inst_alloc:
+ dev_err(inst->dev, "could not load rk3288_gpiomem");
+ return err;
+}
+
+static int rk3288_gpiomem_remove(struct platform_device *pdev)
+{
+ struct device *dev = inst->dev;
+
+ kfree(inst);
+ device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
+ class_destroy(rk3288_gpiomem_class);
+ cdev_del(&rk3288_gpiomem_cdev);
+ unregister_chrdev_region(rk3288_gpiomem_devid, 1);
+
+ dev_info(dev, "GPIO mem driver removed - OK");
+ return 0;
+}
+
+ /****************************************************************************
+*
+* Register the driver with device tree
+*
+***************************************************************************/
+
+static const struct of_device_id rk3288_gpiomem_of_match[] = {
+ {.compatible = "rockchip,rk3288-gpiomem",},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
+
+static struct platform_driver rk3288_gpiomem_driver = {
+ .probe = rk3288_gpiomem_probe,
+ .remove = rk3288_gpiomem_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = rk3288_gpiomem_of_match,
+ },
+};
+
+module_platform_driver(rk3288_gpiomem_driver);
+
+MODULE_ALIAS("platform:gpiomem-rk3288");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");

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@ -0,0 +1,32 @@
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index bc3601a..37ae378 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -467,13 +467,6 @@
};
thermal-zones {
- reserve_thermal: reserve_thermal {
- polling-delay-passive = <1000>; /* milliseconds */
- polling-delay = <5000>; /* milliseconds */
-
- thermal-sensors = <&tsadc 0>;
- };
-
cpu_thermal: cpu_thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -539,6 +532,13 @@
};
};
};
+
+ reserve_thermal: reserve_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ thermal-sensors = <&tsadc 0>;
+ };
};
tsadc: tsadc@ff280000 {

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@ -0,0 +1,122 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 07b4af4..f71fa24
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -175,10 +175,83 @@
status = "okay";
};
+ cpu0_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ };
+ opp@816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ };
+ opp@1416000000 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1200000>;
+ };
+ opp@1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp@1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1300000>;
+ };
+ opp@1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
+ /* boot-only frequencies below */
+ opp@1896000000 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1920000000 {
+ opp-hz = /bits/ 64 <1920000000>;
+ opp-microvolt = <1425000>;
+ turbo-mode;
+ };
+ opp@1992000000 {
+ opp-hz = /bits/ 64 <1992000000>;
+ opp-microvolt = <1450000>;
+ turbo-mode;
+ };
+ opp@2016000000 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2040000000 {
+ opp-hz = /bits/ 64 <2040000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ opp@2064000000 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-microvolt = <1475000>;
+ turbo-mode;
+ };
+ };
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
&gmac {
@@ -345,8 +345,8 @@
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <1350000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -357,8 +357,8 @@
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <6000>;
regulator-state-mem {
@@ -652,6 +755,11 @@
};
&usb_otg {
+ /*
+ * The otg controller is the only system power source,
+ * so needs to always stay in device mode.
+ */
+ dr_mode = "peripheral";
status= "okay";
};

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@ -0,0 +1,13 @@
diff --git a/sound/soc/rockchip/rk3288_hdmi_analog.c b/sound/soc/rockchip/rk3288_hdmi_analog.c
index fa44e3901336..929b3fe289b0 100644
--- a/sound/soc/rockchip/rk3288_hdmi_analog.c
+++ b/sound/soc/rockchip/rk3288_hdmi_analog.c
@@ -155,7 +155,7 @@ static struct snd_soc_dai_link_component rk_codecs[] = {
{ },
{
.name = "hdmi-audio-codec.2.auto",
- .dai_name = "hdmi-hifi.0",
+ .dai_name = "i2s-hifi",
},
};

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@ -0,0 +1,20 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index eff87a3..58fade2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -762,6 +762,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
+ rk3288-miniarm.dtb \
rk3288-veyron-brain.dtb \
rk3288-veyron-jaq.dtb \
rk3288-veyron-jerry.dtb \
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
new file mode 120000
index 0000000..830ab68
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -0,0 +1 @@
+rk3288-tinker.dts
\ No newline at end of file

View File

@ -0,0 +1,25 @@
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 77554262..57cce114 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -612,6 +612,20 @@
vqmmc-supply = <&vccio_sd>;
};
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */

View File

@ -0,0 +1,13 @@
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index bd83c53..af7cfe3
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -374,7 +374,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
VM_ARM_DMA_CONSISTENT | VM_USERMAP);
}
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static struct gen_pool *atomic_pool;
static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;

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@ -0,0 +1,26 @@
diff --git a/drivers/staging/rtl8723bs/hal/sdio_ops.c
b/drivers/staging/rtl8723bs/hal/sdio_ops.c
index 6285b72faa9a..ad65cd74c3c8 100644
--- a/drivers/staging/rtl8723bs/hal/sdio_ops.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_ops.c
@@ -1008,6 +1008,7 @@ static struct recv_buf *sd_recv_rxfifo(struct
adapter *padapter, u32 size)
}
if (precvbuf->pskb == NULL) {
+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
DBG_871X("%s: alloc_skb fail! read =%d\n", __func__, readsize);
return NULL;
}
@@ -1017,6 +1018,7 @@ static struct recv_buf *sd_recv_rxfifo(struct
adapter *padapter, u32 size)
preadbuf = precvbuf->pskb->data;
ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID,
readsize, preadbuf);
if (ret == _FAIL) {
+ rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue);
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n",
__func__));
return NULL;
}

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@ -0,0 +1,22 @@
diff --git a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
index 820a061506cc..80cf5a8b1557 100644
--- a/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
+++ b/drivers/staging/rtl8723bs/core/rtw_pwrctrl.c
@@ -34,7 +34,7 @@ void _ips_enter(struct adapter *padapter)
if (rf_off == pwrpriv->change_rfpwrstate) {
pwrpriv->bpower_saving = true;
- DBG_871X_LEVEL(_drv_always_, "nolinked power save enter\n");
+ DBG_871X("nolinked power save enter\n");
if (pwrpriv->ips_mode == IPS_LEVEL_2)
pwrpriv->bkeepfwalive = true;
@@ -73,7 +73,7 @@ int _ips_leave(struct adapter *padapter)
if (result == _SUCCESS) {
pwrpriv->rf_pwrstate = rf_on;
}
- DBG_871X_LEVEL(_drv_always_, "nolinked power save leave\n");
+ DBG_871X("nolinked power save leave\n");
DBG_871X("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;

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@ -0,0 +1,26 @@
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 918f449..561b71c 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -39,6 +39,8 @@ source "drivers/net/wireless/cisco/Kconfig"
source "drivers/net/wireless/intel/Kconfig"
source "drivers/net/wireless/intersil/Kconfig"
source "drivers/net/wireless/marvell/Kconfig"
+source "drivers/net/wireless/rtl8812au/Kconfig"
+source "drivers/net/wireless/rtl8814au/Kconfig"
source "drivers/net/wireless/mediatek/Kconfig"
source "drivers/net/wireless/ralink/Kconfig"
source "drivers/net/wireless/realtek/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 59df552..614ddf4 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -12,6 +12,8 @@ obj-$(CONFIG_WLAN_VENDOR_CISCO) += cisco/
obj-$(CONFIG_WLAN_VENDOR_INTEL) += intel/
obj-$(CONFIG_WLAN_VENDOR_INTERSIL) += intersil/
obj-$(CONFIG_WLAN_VENDOR_MARVELL) += marvell/
+obj-$(CONFIG_RTL8812AU) += rtl8812au/
+obj-$(CONFIG_RTL8814AU) += rtl8814au/
obj-$(CONFIG_WLAN_VENDOR_MEDIATEK) += mediatek/
obj-$(CONFIG_WLAN_VENDOR_RALINK) += ralink/
obj-$(CONFIG_WLAN_VENDOR_REALTEK) += realtek/

View File

@ -0,0 +1,46 @@
diff --git a/drivers/net/wireless/rtl8812au/Kconfig b/drivers/net/wireless/rtl8812au/Kconfig
index 16d3567..f87653d 100644
--- a/drivers/net/wireless/rtl8812au/Kconfig
+++ b/drivers/net/wireless/rtl8812au/Kconfig
@@ -4,8 +4,3 @@ config RTL8812AU
---help---
Help message of RTL8812AU
-config RTL8814AU
- tristate "Realtek 8814A USB WiFi"
- depends on USB
- ---help---
- Help message of RTL8814AU
diff --git a/drivers/net/wireless/rtl8814au/Kconfig b/drivers/net/wireless/rtl8814au/Kconfig
index 16d3567..730c4e0 100644
--- a/drivers/net/wireless/rtl8814au/Kconfig
+++ b/drivers/net/wireless/rtl8814au/Kconfig
@@ -1,9 +1,3 @@
-config RTL8812AU
- tristate "Realtek 8812A USB WiFi"
- depends on USB
- ---help---
- Help message of RTL8812AU
-
config RTL8814AU
tristate "Realtek 8814A USB WiFi"
depends on USB
diff --git a/drivers/net/wireless/rtl8814au/Makefile b/drivers/net/wireless/rtl8814au/Makefile
index ef959e7..f71f524 100644
--- a/drivers/net/wireless/rtl8814au/Makefile
+++ b/drivers/net/wireless/rtl8814au/Makefile
@@ -32,11 +32,11 @@ CONFIG_AUTOCFG_CP = n
########################## WIFI IC ############################
CONFIG_MULTIDRV = n
CONFIG_RTL8188E = n
-CONFIG_RTL8812A = y
-CONFIG_RTL8821A = y
+CONFIG_RTL8812A = n
+CONFIG_RTL8821A = n
CONFIG_RTL8192E = n
CONFIG_RTL8723B = n
-CONFIG_RTL8814A = n
+CONFIG_RTL8814A = y
CONFIG_RTL8723C = n
CONFIG_RTL8188F = n
CONFIG_RTL8822B = n

View File

@ -0,0 +1,24 @@
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index 95cdb48fad061..db9ee74578012 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -32,6 +32,7 @@ config WIRELESS_WDS
source "drivers/net/wireless/admtek/Kconfig"
source "drivers/net/wireless/ath/Kconfig"
+source "drivers/net/wireless/rtl8188eu/Kconfig"
source "drivers/net/wireless/atmel/Kconfig"
source "drivers/net/wireless/broadcom/Kconfig"
source "drivers/net/wireless/cisco/Kconfig"
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index edeb51f6fa551..2c4d8522929bf 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_WLAN_VENDOR_ADMTEK) += admtek/
obj-$(CONFIG_WLAN_VENDOR_ATH) += ath/
+obj-$(CONFIG_RTL8188EU) += rtl8188eu/
obj-$(CONFIG_WLAN_VENDOR_ATMEL) += atmel/
obj-$(CONFIG_WLAN_VENDOR_BROADCOM) += broadcom/
obj-$(CONFIG_WLAN_VENDOR_CISCO) += cisco/

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,28 @@
From 1529062f72cee8061b4733e1148357d227639900 Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Mon, 11 Jun 2018 11:09:10 +0000
Subject: [PATCH 1/1] Support HassOS bootstate partition
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
env/mmc.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/env/mmc.c b/env/mmc.c
index 5e3da6dca7..75c06899d1 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -18,6 +18,10 @@
#include <search.h>
#include <errno.h>
+#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_ENV_OFFSET 0x25100000
+#define CONFIG_ENV_SIZE 0x400000
+
#define __STR(X) #X
#define STR(X) __STR(X)
--
2.17.1

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@ -0,0 +1,115 @@
From 550e15099408decc58fb439edcd2e320570b8bf4 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 11 Aug 2017 17:47:45 +0800
Subject: [PATCH 17/50] Fix HDMI some issues
This patch:
use 1080P display_timing when connect 4K HDMI screen.
correct rockchip_mpll_config & rockchip_phy_config .mpixelclock.
add some hdmi-to-vga support
Change-Id: Ic7faf4dd7ea490051493397058aa5bad1d8788c1
---
common/Kconfig | 2 +-
drivers/video/dw_hdmi.c | 8 ++++----
drivers/video/rockchip/rk_vop.c | 14 ++++++++++++++
include/dw_hdmi.h | 4 ++--
4 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/common/Kconfig b/common/Kconfig
index 361346b092..355e816c9d 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -245,7 +245,7 @@ endmenu
config BOOTDELAY
int "delay in seconds before automatically booting"
- default 2
+ default 5
depends on AUTOBOOT
help
Delay before automatically running bootcmd;
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 6039d676c5..0d7a7c228d 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -340,7 +340,7 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, u32 mpixelclock)
hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].cpce, PHY_OPMODE_PLLCFG);
hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].gmp, PHY_PLLGMPCTRL);
- hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].curr, PHY_PLLCURRCTRL);
+ hdmi_phy_i2c_write(hdmi, 0x0000, PHY_PLLCURRCTRL);
hdmi_phy_i2c_write(hdmi, 0x0000, PHY_PLLPHBYCTRL);
hdmi_phy_i2c_write(hdmi, 0x0006, PHY_PLLCLKBISTPHASE);
@@ -560,8 +560,8 @@ static int hdmi_read_edid(struct dw_hdmi *hdmi, int block, u8 *buff)
u32 n;
/* set ddc i2c clk which devided from ddc_clk to 100khz */
- hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
- hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+ //hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+ //hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
hdmi_mod(hdmi, HDMI_I2CM_DIV, HDMI_I2CM_DIV_FAST_STD_MODE,
HDMI_I2CM_DIV_STD_MODE);
@@ -663,7 +663,7 @@ int dw_hdmi_phy_wait_for_hpd(struct dw_hdmi *hdmi)
if (hdmi_get_plug_in_status(hdmi))
return 0;
udelay(100);
- } while (get_timer(start) < 300);
+ } while (get_timer(start) < 5000);
return -1;
}
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index c979049b5b..7bcc3df69b 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -277,6 +277,20 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
return ret;
}
+ /* Use 1080p display_timing when connect 4K HDMI screen */
+ if (timing.hactive.typ >= 3840) {
+ timing.pixelclock.typ = 148500000;
+ timing.hactive.typ = 1920;
+ timing.vactive.typ = 1080;
+ timing.hsync_len.typ = 44;
+ timing.hback_porch.typ = 148;
+ timing.vsync_len.typ = 5;
+ timing.vback_porch.typ = 36;
+ timing.hfront_porch.typ = 88;
+ timing.vfront_porch.typ = 4;
+ debug("Use default 1080P settings \n");
+ }
+
ret = clk_get_by_index(dev, 1, &clk);
if (!ret)
ret = clk_set_rate(&clk, timing.pixelclock.typ);
diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h
index 902abd4d44..c1f1fbff6a 100644
--- a/include/dw_hdmi.h
+++ b/include/dw_hdmi.h
@@ -448,7 +448,7 @@ enum {
};
struct hdmi_mpll_config {
- u64 mpixelclock;
+ u32 mpixelclock;
/* Mode of Operation and PLL Dividers Control Register */
u32 cpce;
/* PLL Gmp Control Register */
@@ -458,7 +458,7 @@ struct hdmi_mpll_config {
};
struct hdmi_phy_config {
- u64 mpixelclock;
+ u32 mpixelclock;
u32 sym_ctr; /* clock symbol and transmitter control */
u32 term; /* transmission termination value */
u32 vlev_ctr; /* voltage level control */
--
2.17.1

View File

@ -0,0 +1,70 @@
From d0d5938a3f8a524a884c460c5870c0c966daf152 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 11 Aug 2017 18:10:22 +0800
Subject: [PATCH 18/50] pmic: enable LDO2 vcc33_mipi at bootup
power up camera module to prevent i2c-2 SDA pulled low
Change-Id: I199bef9c8aa4385dbda33117e2ca0c64dc7a13d4
---
board/rockchip/tinker_rk3288/tinker-rk3288.c | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
mode change 100644 => 100755 board/rockchip/tinker_rk3288/tinker-rk3288.c
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index c2872e7330..5618bd9923 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -8,6 +8,8 @@
#include <dm.h>
#include <i2c_eeprom.h>
#include <netdev.h>
+#include <power/regulator.h>
+
static int get_ethaddr_from_eeprom(u8 *addr)
{
@@ -33,3 +35,39 @@ int rk_board_late_init(void)
return 0;
}
+
+
+#ifdef CONFIG_DM_PMIC
+static int rockchip_set_regulator_on(const char *name, uint uv)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = regulator_get_by_platname(name, &dev);
+ if (ret) {
+ debug("%s: Cannot find regulator %s\n", __func__, name);
+ return ret;
+ }
+ ret = regulator_set_value(dev, uv);
+ if (ret) {
+ debug("%s: Cannot set regulator %s\n", __func__, name);
+ return ret;
+ }
+ ret = regulator_set_enable(dev, 1);
+ if (ret) {
+ debug("%s: Cannot enable regulator %s\n", __func__, name);
+ return ret;
+ }
+
+ return 0;
+}
+
+int power_init_board(void)
+{
+ int ret = rockchip_set_regulator_on("vcc33_mipi", 3300000);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+#endif
\ No newline at end of file
--
2.17.1

View File

@ -0,0 +1,206 @@
From 11b9e1141895e719e2ad4421f746c4b5359c671b Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Thu, 12 Oct 2017 11:47:27 +0800
Subject: [PATCH 36/50] auto enable ums mode when TinkerBoard is connected to
PC
Change-Id: Ice3f37906ab1ae0428c1d23867a58c5c720aa8ab
---
arch/arm/include/asm/arch-rockchip/gpio.h | 22 ++++++++
arch/arm/mach-rockchip/rk3288-board.c | 62 +++++++++++++++++++++++
cmd/usb_mass_storage.c | 2 +-
common/autoboot.c | 17 +++++++
common/board_r.c | 1 +
include/common.h | 1 +
6 files changed, 104 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h b/arch/arm/include/asm/arch-rockchip/gpio.h
index e39218d0a9..10f4f41e67 100644
--- a/arch/arm/include/asm/arch-rockchip/gpio.h
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
@@ -25,4 +25,26 @@ struct rockchip_gpio_regs {
};
check_member(rockchip_gpio_regs, ls_sync, 0x60);
+/*
+ * RK3288 IO memory map:
+ *
+ */
+#define RKIO_GPIO0_PHYS 0xFF750000
+#define RKIO_GRF_PHYS 0xFF770000
+#define RKIO_GPIO1_PHYS 0xFF780000
+#define RKIO_GPIO2_PHYS 0xFF790000
+#define RKIO_GPIO3_PHYS 0xFF7A0000
+#define RKIO_GPIO4_PHYS 0xFF7B0000
+#define RKIO_GPIO5_PHYS 0xFF7C0000
+#define RKIO_GPIO6_PHYS 0xFF7D0000
+
+/* gpio power down/up control */
+#define GRF_GPIO2A_P 0x150
+#define GRF_GPIO6A_P 0x190
+
+/* gpio input/output control */
+#define GPIO_SWPORT_DR 0x00
+#define GPIO_SWPORT_DDR 0x04
+#define GPIO_EXT_PORT 0x50
+
#endif
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index f1569e62b6..32f70a5920 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -22,6 +22,19 @@
DECLARE_GLOBAL_DATA_PTR;
+enum project_id {
+ TinkerBoardS = 0,
+ TinkerBoard = 7,
+};
+
+enum pcb_id {
+ SR,
+ ER,
+ PR,
+};
+
+extern bool force_ums;
+
__weak int rk_board_late_init(void)
{
return 0;
@@ -91,6 +104,55 @@ int board_late_init(void)
return rk_board_late_init();
}
+int check_force_enter_ums_mode(void)
+{
+ int tmp;
+ enum pcb_id pcbid;
+ enum project_id projectid;
+
+ // GPIO2_A1/GPIO2_A2/GPIO2_A3 pull up enable
+ // please check TRM V1.2 part1 page 152
+ tmp = readl(RKIO_GRF_PHYS + GRF_GPIO2A_P);
+ writel((tmp&~(0x03F<<2)) | 0x3F<<(16 + 2) | 0x15<<2, RKIO_GRF_PHYS + GRF_GPIO2A_P);
+
+ // GPIO2_A1/GPIO2_A2/GPIO2_A3/GPIO2_B0/GPIO2_B1/GPIO2_B2 set to input
+ tmp = readl(RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp & ~(0x70E), RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
+
+ // GPIO6_A5 pull up/down disable
+ tmp = readl(RKIO_GRF_PHYS + GRF_GPIO6A_P);
+ writel((tmp&~(0x03<<10)) | 0x03<<(16 + 10), RKIO_GRF_PHYS + GRF_GPIO6A_P);
+
+ // GPIO6_A5 set to input
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp & ~(0x20), RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+
+ mdelay(10);
+
+ // read GPIO2_A1/GPIO2_A2/GPIO2_A3 value
+ projectid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x0E) >>1;
+
+ // read GPIO2_B0/GPIO2_B1/GPIO2_B2 value
+ pcbid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x700) >> 8;
+
+ // only Tinker Board S and the PR stage PCB has this function
+ if(projectid!=TinkerBoard && pcbid >= ER){
+ printf("PC event = 0x%x\n", readl(RKIO_GPIO6_PHYS + GPIO_EXT_PORT)&0x20);
+ if((readl(RKIO_GPIO6_PHYS + GPIO_EXT_PORT)&0x20)==0x20) {
+ // SDP detected, enable EMMC and unlock usb current limit
+ printf("usb connected to SDP, force enter ums mode\n");
+ force_ums = true;
+ // unlock usb current limit and re-enable EMMC
+ // set GPIO6_A6, GPIO6_A7 to high
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ }
+ }
+ return 0;
+}
+
#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
static int veyron_init(void)
{
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 3353f95c74..cb5260b558 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -133,7 +133,7 @@ cleanup:
return ret;
}
-static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
+int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
const char *usb_controller;
diff --git a/common/autoboot.c b/common/autoboot.c
index c52bad84a4..d63a4d7e79 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -28,6 +28,8 @@ DECLARE_GLOBAL_DATA_PTR;
/* Stored value of bootdelay, used by autoboot_command() */
static int stored_bootdelay;
+bool force_ums = false;
+
#if defined(CONFIG_AUTOBOOT_KEYED)
#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
@@ -339,10 +341,25 @@ const char *bootdelay_process(void)
return s;
}
+extern int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+
void autoboot_command(const char *s)
{
debug("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
+ if (force_ums) {
+ // force to enter ums mode
+ char *local_args[4];
+ char str1[]="ums", str2[]="1", str3[]="mmc", str4[]="0";
+
+ local_args[0]=str1;
+ local_args[1]=str2;
+ local_args[2]=str3;
+ local_args[3]=str4;
+ do_usb_mass_storage(NULL, 0, 4, local_args);
+ return;
+ }
+
if (stored_bootdelay != -1 && s && !abortboot(stored_bootdelay)) {
#if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
int prev = disable_ctrlc(1); /* disable Control C checking */
diff --git a/common/board_r.c b/common/board_r.c
index ecca1edb04..77b3a05693 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -800,6 +800,7 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_CMD_ONENAND
initr_onenand,
#endif
+ check_force_enter_ums_mode,
#ifdef CONFIG_MMC
initr_mmc,
#endif
diff --git a/include/common.h b/include/common.h
index 751665f8a4..13a6e563c3 100644
--- a/include/common.h
+++ b/include/common.h
@@ -418,6 +418,7 @@ extern ssize_t spi_write (uchar *, int, uchar *, int);
int board_early_init_f (void);
int board_fix_fdt (void *rw_fdt_blob); /* manipulate the U-Boot fdt before its relocation */
int board_late_init (void);
+int check_force_enter_ums_mode (void);
int board_postclk_init (void); /* after clocks/timebase, before env/serial */
int board_early_init_r (void);
void board_poweroff (void);
--
2.17.1

View File

@ -0,0 +1,25 @@
From b41031b54e5d4355d2f27f7297b72c030f435167 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Tue, 17 Oct 2017 14:38:28 +0800
Subject: [PATCH 37/50] add 10ms delay after re-enable EMMC
Change-Id: I022d050be22c5436822cb2057e70b17d88e65d7a
---
arch/arm/mach-rockchip/rk3288-board.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 32f70a5920..07f4125780 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -136,6 +136,7 @@ int check_force_enter_ums_mode(void)
writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ mdelay(10);
}
}
return 0;
--
2.17.1

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@ -0,0 +1,160 @@
From eff570086cca1c909725dc71b26b84f5bfd2b7a9 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Fri, 27 Oct 2017 16:09:06 +0800
Subject: [PATCH 39/50] fixed enter ums mode fail sometimes
Change-Id: I9e40cb0d8d5873588f7bf9b844e036071d13ff16
---
arch/arm/mach-rockchip/rk3288-board-spl.c | 22 +++++++
arch/arm/mach-rockchip/rk3288-board.c | 70 +++++++++++++++++++----
2 files changed, 80 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index a0d0ce2ff4..5f7ff2dc49 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -185,6 +185,27 @@ static int phycore_init(void)
}
#endif
+/*
+*
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+*
+*/
+void usb_current_limit_ctrl(bool unlock_current)
+{
+ int tmp;
+
+#include <asm/arch/gpio.h>
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(unlock_current == true)
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+}
+
void board_init_f(ulong dummy)
{
struct udevice *pinctrl;
@@ -213,6 +234,7 @@ void board_init_f(ulong dummy)
*/
debug_uart_init();
debug("\nspl:debug uart enabled in %s\n", __func__);
+ usb_current_limit_ctrl(true);
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 07f4125780..f73520925b 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -92,18 +92,67 @@ int board_late_init(void)
return rk_board_late_init();
}
+/*
+*
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+*
+*/
+void usb_current_limit_ctrl(bool unlock_current)
+{
+ int tmp;
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(unlock_current == true)
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+}
+
+/*
+*
+* eMMC maskrom mode : GPIO6_A7 (H:disable maskrom, L:enable maskrom)
+*
+*/
+void rk3288_maskrom_ctrl(bool enable_emmc)
+{
+ int tmp;
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ if(enable_emmc == true)
+ writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+ else
+ writel(tmp & ~0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
+
+ tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
+ mdelay(10);
+}
+
+/*
+*
+* project id : GPIO2_A3 GPIO2_A2 GPIO2_A1
+* pcb id : GPIO2_B2 GPIO2_B1 GPIO2_B0
+* SDP/CDP : GPIO6_A5 (H:SDP, L:CDP)
+* usb current limit : GPIO6_A6 (H:unlock, L:lock)
+* eMMC maskrom mode : GPIO6_A7 (H:disable maskrom, L:enable maskrom)
+*
+* Please check TRM V1.2 part1 page 152 for the following register settings
+*
+*/
int check_force_enter_ums_mode(void)
{
int tmp;
enum pcb_id pcbid;
enum project_id projectid;
- // GPIO2_A1/GPIO2_A2/GPIO2_A3 pull up enable
- // please check TRM V1.2 part1 page 152
+ // GPIO2_A3/GPIO2_A2/GPIO2_A1 pull up enable
tmp = readl(RKIO_GRF_PHYS + GRF_GPIO2A_P);
writel((tmp&~(0x03F<<2)) | 0x3F<<(16 + 2) | 0x15<<2, RKIO_GRF_PHYS + GRF_GPIO2A_P);
- // GPIO2_A1/GPIO2_A2/GPIO2_A3/GPIO2_B0/GPIO2_B1/GPIO2_B2 set to input
+ // GPIO2_A3/GPIO2_A2/GPIO2_A1/GPIO2_B2/GPIO2_B1/GPIO2_B0 set to input
tmp = readl(RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
writel(tmp & ~(0x70E), RKIO_GPIO2_PHYS + GPIO_SWPORT_DDR);
@@ -117,10 +166,10 @@ int check_force_enter_ums_mode(void)
mdelay(10);
- // read GPIO2_A1/GPIO2_A2/GPIO2_A3 value
+ // read GPIO2_A3/GPIO2_A2/GPIO2_A1 value
projectid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x0E) >>1;
- // read GPIO2_B0/GPIO2_B1/GPIO2_B2 value
+ // read GPIO2_B2/GPIO2_B1/GPIO2_B0 value
pcbid = (readl(RKIO_GPIO2_PHYS + GPIO_EXT_PORT) & 0x700) >> 8;
// only Tinker Board S and the PR stage PCB has this function
@@ -130,13 +179,10 @@ int check_force_enter_ums_mode(void)
// SDP detected, enable EMMC and unlock usb current limit
printf("usb connected to SDP, force enter ums mode\n");
force_ums = true;
- // unlock usb current limit and re-enable EMMC
- // set GPIO6_A6, GPIO6_A7 to high
- tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
- writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
- tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
- writel(tmp | 0xc0, RKIO_GPIO6_PHYS + GPIO_SWPORT_DDR);
- mdelay(10);
+ rk3288_maskrom_ctrl(true);
+ usb_current_limit_ctrl(true);
+ } else {
+ usb_current_limit_ctrl(false);
}
}
return 0;
--
2.17.1

View File

@ -0,0 +1,32 @@
From f5ada57f6298f3485e1fc6250ca2ab3be28862bb Mon Sep 17 00:00:00 2001
From: scorpio_chang <Scorpio_Chang@asus.com>
Date: Thu, 1 Feb 2018 09:46:47 +0800
Subject: [PATCH 45/50] modify UMS name of uboot
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Change-Id: Ibab54e15374db3c3c88460d2c3180e9787e4c426
Reviewed-on: https://tp-biosrd-v02/gerrit/82114
Reviewed-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
Tested-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
---
cmd/usb_mass_storage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index cb5260b558..4c3da13115 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -108,7 +108,7 @@ static int ums_init(const char *devtype, const char *devnums_part_str)
name = malloc(UMS_NAME_LEN);
if (!name)
goto cleanup;
- snprintf(name, UMS_NAME_LEN, "UMS disk %d", ums_count);
+ snprintf(name, UMS_NAME_LEN, "Armbian UMS disk %d", ums_count);
ums[ums_count].name = name;
ums[ums_count].block_dev = *block_dev;
--
2.17.1

View File

@ -0,0 +1,146 @@
From 7ffd3d083ac59f2b40ebea5b10334c541a5c6311 Mon Sep 17 00:00:00 2001
From: jamess_huang <Jamess_Huang@asus.com>
Date: Thu, 22 Feb 2018 15:28:45 +0800
Subject: [PATCH 49/50] added timeout when force entering UMS mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Change-Id: I971d105a86628fa4282d1d801e05fabebf0b6569
Reviewed-on: https://tp-biosrd-v02/gerrit/82232
Reviewed-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
Tested-by: Jamess Huang(黃以民) <Jamess_Huang@asus.com>
---
arch/arm/mach-rockchip/rk3288-board.c | 4 +++-
cmd/usb_mass_storage.c | 4 ++++
common/autoboot.c | 8 ++++++--
drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 1 +
drivers/usb/gadget/f_mass_storage.c | 10 +++++++++-
include/linux/usb/gadget.h | 3 +++
6 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index f73520925b..1e40429af9 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -101,6 +101,7 @@ void usb_current_limit_ctrl(bool unlock_current)
{
int tmp;
+ printf("%s: unlock_current = %d\n", __func__, unlock_current);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
if(unlock_current == true)
writel(tmp | 0x40, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
@@ -120,6 +121,7 @@ void rk3288_maskrom_ctrl(bool enable_emmc)
{
int tmp;
+ printf("%s: enable_emmc = %d\n", __func__, enable_emmc);
tmp = readl(RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
if(enable_emmc == true)
writel(tmp | 0x80, RKIO_GPIO6_PHYS + GPIO_SWPORT_DR);
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 4c3da13115..806b2e3dc0 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -215,6 +215,10 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
usb_gadget_handle_interrupts(controller_index);
rc = fsg_main_thread(NULL);
+
+ if (rc == -ETIMEDOUT) {
+ goto cleanup_register;
+ }
if (rc) {
/* Check I/O error */
if (rc == -EIO)
diff --git a/common/autoboot.c b/common/autoboot.c
index d63a4d7e79..81b6579f7c 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -29,6 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int stored_bootdelay;
bool force_ums = false;
+bool getdescriptor = false;
#if defined(CONFIG_AUTOBOOT_KEYED)
#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
@@ -356,8 +357,11 @@ void autoboot_command(const char *s)
local_args[1]=str2;
local_args[2]=str3;
local_args[3]=str4;
- do_usb_mass_storage(NULL, 0, 4, local_args);
- return;
+
+ if (do_usb_mass_storage(NULL, 0, 4, local_args) == -ETIMEDOUT) {
+ rk3288_maskrom_ctrl(false);
+ usb_current_limit_ctrl(false);
+ }
}
if (stored_bootdelay != -1 && s && !abortboot(stored_bootdelay)) {
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 0d6d2fba8a..b9277b8b0a 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -1368,6 +1368,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
debug_cond(DEBUG_SETUP != 0,
"%s: *** USB_REQ_GET_DESCRIPTOR\n",
__func__);
+ getdescriptor = true;
break;
case USB_REQ_SET_INTERFACE:
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1ecb92ac6b..aad8fa4951 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -666,7 +666,7 @@ static void busy_indicator(void)
static int sleep_thread(struct fsg_common *common)
{
int rc = 0;
- int i = 0, k = 0;
+ int i = 0, k = 0, j = 0;
/* Wait until a signal arrives or we are woken up */
for (;;) {
@@ -677,6 +677,7 @@ static int sleep_thread(struct fsg_common *common)
busy_indicator();
i = 0;
k++;
+ j++;
}
if (k == 10) {
@@ -691,6 +692,13 @@ static int sleep_thread(struct fsg_common *common)
k = 0;
}
+ if (j == 300) { //about 3 seconds
+ if(force_ums && !getdescriptor) {
+ printf("wait for usb get descriptor cmd timeout\n");
+ return -ETIMEDOUT;
+ }
+ }
+
usb_gadget_handle_interrupts(0);
}
common->thread_wakeup_needed = 0;
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index b824f13477..305cc56b04 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -24,6 +24,9 @@
struct usb_ep;
+extern bool force_ums;
+extern bool getdescriptor;
+
/**
* struct usb_request - describes one i/o request
* @buf: Buffer used for data. Always provide this; some controllers
--
2.17.1

View File

@ -0,0 +1,17 @@
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index ac878c71..e2bed4e0 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -72,9 +72,9 @@ CONFIG_USB_DWC2=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
+CONFIG_USB_GADGET_MANUFACTURER="ASUS"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0b05
+CONFIG_USB_GADGET_PRODUCT_NUM=0x7820
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_USB_HOST_ETHER=y

View File

@ -0,0 +1,54 @@
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index a752458..14cca73 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -143,6 +143,21 @@
vqmmc-supply = <&vccio_sd>;
};
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ max-frequency = <150000000>;
+ mmc-hs200-1_8v;
+ mmc-ddr-1_8v;
+ status = "okay";
+};
+
+
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h
index 58eea3c..cc585dc 100644
--- a/include/configs/tinker_rk3288.h
+++ b/include/configs/tinker_rk3288.h
@@ -7,17 +7,14 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define ROCKCHIP_DEVICE_SETTINGS
-#include <configs/rk3288_common.h>
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,cros-ec-keyb\0"\
+ "stdout=serial,vidconsole\0"\
+ "stderr=serial,vidconsole\0"
-#undef BOOT_TARGET_DEVICES
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dchp, na)
+#include <configs/rk3288_common.h>
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_DEV 0
#endif

View File

@ -0,0 +1,71 @@
From db6c0eae291df886af7efd46703b78b0129ecb22 Mon Sep 17 00:00:00 2001
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 3 Aug 2018 10:22:02 +0000
Subject: [PATCH 1/1] tinker uart3 debug
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
arch/arm/dts/rk3288-tinker.dts | 4 ++--
arch/arm/mach-rockchip/rk3288-board-spl.c | 10 ++++++----
configs/tinker-rk3288_defconfig | 2 +-
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 3edd21cc2f4..372ab8bacdb 100644
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -11,7 +11,7 @@
compatible = "rockchip,rk3288-tinker", "rockchip,rk3288";
chosen {
- stdout-path = &uart2;
+ stdout-path = &uart3;
};
};
@@ -41,7 +41,7 @@
status = "okay";
};
-&uart2 {
+&uart3 {
u-boot,dm-pre-reloc;
reg-shift = <2>;
};
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index ea6a14af4f0..8b7fa053a8d 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -154,10 +154,12 @@ void board_init_f(ulong dummy)
#define GRF_BASE 0xff770000
struct rk3288_grf * const grf = (void *)GRF_BASE;
- rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
- GPIO7C6_MASK << GPIO7C6_SHIFT,
- GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
- GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+ rk_clrsetreg(&grf->gpio7a_iomux,
+ GPIO7A7_MASK << GPIO7A7_SHIFT,
+ GPIO7A7_UART3GPS_SIN << GPIO7A7_SHIFT);
+ rk_clrsetreg(&grf->gpio7b_iomux,
+ GPIO7B0_MASK << GPIO7B0_SHIFT,
+ GPIO7B0_UART3GPS_SOUT << GPIO7B0_SHIFT);
/*
* Debug UART can be used from here if required:
*
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 679d6e29eaf..5f8da09ded8 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_TINKER_RK3288=y
-CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_BASE=0xff1b0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
--
2.17.1

View File

@ -0,0 +1,35 @@
#!/bin/bash
set -e
SCRIPT_DIR=${BR2_EXTERNAL_HASSOS_PATH}/scripts
BOARD_DIR=${2}
BOOT_DATA=${BINARIES_DIR}/boot
. ${SCRIPT_DIR}/hdd-image.sh
. ${SCRIPT_DIR}/name.sh
. ${SCRIPT_DIR}/ota.sh
. ${BR2_EXTERNAL_HASSOS_PATH}/info
. ${BOARD_DIR}/info
# Init boot data
rm -rf ${BOOT_DATA}
mkdir -p ${BOOT_DATA}
cp -t ${BOOT_DATA} \
${BINARIES_DIR}/boot.scr \
${BINARIES_DIR}/rk3288-tinker.dtb
echo "console=tty1" > ${BOOT_DATA}/cmdline.txt
# Create boot binary
rm -f $BINARIES_DIR/u-boot-spl-dtb.img
mkimage -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-spl-dtb.bin $BINARIES_DIR/u-boot-spl-dtb.img
cat $BINARIES_DIR/u-boot-dtb.bin >> $BINARIES_DIR/u-boot-spl-dtb.img
# Create other layers
prepare_disk_image
create_spl_image u-boot-spl-dtb.img 64
create_disk_image 2
convert_disk_image_gz
create_ota_update

View File

@ -0,0 +1,55 @@
test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
# HassOS bootargs
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 apparmor=1 security=apparmor rootwait console=ttyS1,115200n8 console=ttyS2,115200n8"
# HassOS system A/B
setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro"
setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro"
# Load extraargs
fileenv mmc 1:1 ${fdt_addr_r} cmdline.txt cmdline
# Load device tree
fatload mmc 1:1 ${fdt_addr_r} rk3288-tinker.dtb
setenv bootargs
for BOOT_SLOT in "${BOOT_ORDER}"; do
if test "x${bootargs}" != "x"; then
# skip remaining slots
elif test "x${BOOT_SLOT}" = "xA"; then
if test ${BOOT_A_LEFT} -gt 0; then
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
echo "Found valid slot A, ${BOOT_A_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc 1:2 ${kernel_addr_r} zImage"
setenv bootargs "${bootargs_hassos} ${bootargs_a} ${cmdline} rauc.slot=A"
fi
elif test "x${BOOT_SLOT}" = "xB"; then
if test ${BOOT_B_LEFT} -gt 0; then
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
echo "Found valid slot B, ${BOOT_B_LEFT} attempts remaining"
setenv load_kernel "ext4load mmc 1:4 ${kernel_addr_r} zImage"
setenv bootargs "${bootargs_hassos} ${bootargs_b} ${cmdline} rauc.slot=B"
fi
fi
done
if test -n "${bootargs}"; then
saveenv
else
echo "No valid slot found, resetting tries to 3"
setenv BOOT_A_LEFT 3
setenv BOOT_B_LEFT 3
saveenv
reset
fi
echo "Loading kernel"
run load_kernel
echo " Starting kernel"
bootz ${kernel_addr_r} - ${fdt_addr_r}
echo "Fails on boot"
reset

View File

@ -0,0 +1,4 @@
# CONFIG_USB_STORAGE is not set
CONFIG_DM_VIDEO=y
CONFIG_CMD_FILEENV=y

View File

@ -14,3 +14,6 @@ CONFIG_FS_EXT4=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_CONSOLE_SCROLL_LINES=10
# CONFIG_EFI_LOADER is not set
CONFIG_CMD_SETEXPR=y
CONFIG_ENV_OFFSET=0x25100000
CONFIG_ENV_SIZE=0x400000

View File

@ -20,7 +20,7 @@ BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.59"
BR2_LINUX_KERNEL_DEFCONFIG="x86_64"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config $(BR2_EXTERNAL_HASSOS_PATH)/board/ova/kernel.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y

View File

@ -4,7 +4,7 @@ BR2_ARM_EABIHF=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
@ -23,7 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-0-w"
@ -77,6 +77,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.05"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_0_w"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y

View File

@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
@ -23,7 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2709-rpi-2-b"
@ -76,6 +76,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.05"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_2"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y

View File

@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
@ -23,7 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi3"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="broadcom/bcm2710-rpi-3-b broadcom/bcm2837-rpi-3-b broadcom/bcm2710-rpi-3-b-plus"
@ -77,6 +77,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.05"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/rpi3-64/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y

View File

@ -4,7 +4,7 @@ BR2_ARM_FPU_VFPV4=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
@ -23,7 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328"
BR2_LINUX_KERNEL_DEFCONFIG="bcm2709"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3"
@ -77,6 +77,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.05"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi_3_32b"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y

View File

@ -4,7 +4,7 @@ BR2_ARM_EABIHF=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
@ -23,7 +23,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/raspberrypi/linux"
BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a06f9e522301dfacc1f382d72e6a9792d8350328"
BR2_LINUX_KERNEL_DEFCONFIG="bcmrpi"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm"
@ -76,6 +76,7 @@ BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.05"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="rpi"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/raspberrypi/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y

View File

@ -0,0 +1,105 @@
BR2_arm=y
BR2_cortex_a17=y
BR2_ARM_FPU_NEON_VFPV4=y
BR2_DL_DIR="/cache/dl"
BR2_CCACHE=y
BR2_CCACHE_DIR="/cache/cc"
BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_HASSOS_PATH)/patches $(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/patches"
BR2_TOOLCHAIN_BUILDROOT_GLIBC=y
BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_4_14=y
BR2_GCC_VERSION_7_X=y
BR2_TOOLCHAIN_BUILDROOT_CXX=y
BR2_TARGET_GENERIC_HOSTNAME="hassio"
BR2_TARGET_GENERIC_ISSUE="Welcome to HassOS"
BR2_INIT_SYSTEMD=y
BR2_TARGET_GENERIC_GETTY_PORT="tty1"
# BR2_TARGET_GENERIC_REMOUNT_ROOTFS_RW is not set
BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_HASSOS_PATH)/rootfs-overlay"
BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/scripts/post-build.sh"
BR2_ROOTFS_POST_IMAGE_SCRIPT="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/post-image.sh"
BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.14.59"
BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/kernel.config"
BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/kernel/hassos-4_14.config $(BR2_EXTERNAL_HASSOS_PATH)/kernel/device-support.config"
BR2_LINUX_KERNEL_LZ4=y
BR2_LINUX_KERNEL_DTS_SUPPORT=y
BR2_LINUX_KERNEL_INTREE_DTS_NAME="rk3288-tinker"
BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
BR2_LINUX_KERNEL_NEEDS_HOST_LIBELF=y
BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_EXTERNAL_HASSOS_PATH)/busybox.config"
BR2_PACKAGE_BUSYBOX_INDIVIDUAL_BINARIES=y
BR2_PACKAGE_JQ=y
BR2_PACKAGE_E2FSPROGS=y
BR2_PACKAGE_E2FSPROGS_RESIZE2FS=y
BR2_PACKAGE_SQUASHFS=y
BR2_PACKAGE_LINUX_FIRMWARE=y
BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y
BR2_PACKAGE_GPTFDISK=y
BR2_PACKAGE_GPTFDISK_SGDISK=y
BR2_PACKAGE_UBOOT_TOOLS=y
BR2_PACKAGE_CA_CERTIFICATES=y
BR2_PACKAGE_LIBDNET=y
BR2_PACKAGE_LIBCGROUP=y
BR2_PACKAGE_LIBCGROUP_TOOLS=y
BR2_PACKAGE_AVAHI=y
# BR2_PACKAGE_AVAHI_AUTOIPD is not set
BR2_PACKAGE_AVAHI_DAEMON=y
BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
BR2_PACKAGE_BLUEZ5_UTILS=y
BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
BR2_PACKAGE_DHCP=y
BR2_PACKAGE_DHCP_CLIENT=y
BR2_PACKAGE_DROPBEAR=y
# BR2_PACKAGE_DROPBEAR_CLIENT is not set
# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set
BR2_PACKAGE_NETWORK_MANAGER=y
BR2_PACKAGE_NETWORK_MANAGER_MODEM_MANAGER=y
BR2_PACKAGE_TINI=y
BR2_PACKAGE_DOCKER_ENGINE=y
BR2_PACKAGE_RAUC=y
BR2_PACKAGE_RAUC_NETWORK=y
# BR2_PACKAGE_SYSTEMD_HWDB is not set
# BR2_PACKAGE_SYSTEMD_NETWORKD is not set
BR2_PACKAGE_SYSTEMD_RANDOMSEED=y
# BR2_PACKAGE_SYSTEMD_RESOLVED is not set
BR2_PACKAGE_UTIL_LINUX_PARTX=y
BR2_PACKAGE_UTIL_LINUX_ZRAMCTL=y
BR2_TARGET_ROOTFS_SQUASHFS=y
BR2_TARGET_ROOTFS_SQUASHFS4_LZ4=y
# BR2_TARGET_ROOTFS_TAR is not set
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BUILD_SYSTEM_KCONFIG=y
BR2_TARGET_UBOOT_CUSTOM_VERSION=y
BR2_TARGET_UBOOT_CUSTOM_VERSION_VALUE="2018.07"
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="tinker-rk3288"
BR2_TARGET_UBOOT_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_HASSOS_PATH)/bootloader/uboot.config $(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/uboot.config"
BR2_TARGET_UBOOT_NEEDS_DTC=y
BR2_TARGET_UBOOT_NEEDS_OPENSSL=y
BR2_TARGET_UBOOT_FORMAT_DTB_BIN=y
BR2_TARGET_UBOOT_FORMAT_DTB_IMG=y
BR2_TARGET_UBOOT_SPL=y
BR2_TARGET_UBOOT_SPL_NAME="spl/u-boot-spl-dtb.bin"
BR2_TARGET_UBOOT_BOOT_SCRIPT=y
BR2_TARGET_UBOOT_BOOT_SCRIPT_SOURCE="$(BR2_EXTERNAL_HASSOS_PATH)/board/tinker/uboot-boot.sh"
BR2_PACKAGE_HOST_DOSFSTOOLS=y
BR2_PACKAGE_HOST_E2FSPROGS=y
BR2_PACKAGE_HOST_GENIMAGE=y
BR2_PACKAGE_HOST_GPTFDISK=y
BR2_PACKAGE_HOST_MTOOLS=y
BR2_PACKAGE_HOST_RAUC=y
BR2_PACKAGE_HASSOS=y
BR2_PACKAGE_HASSOS_SUPERVISOR="homeassistant/armhf-hassio-supervisor"
BR2_PACKAGE_HASSOS_SUPERVISOR_VERSION="121"
BR2_PACKAGE_HASSOS_SUPERVISOR_ARGS="-e HOMEASSISTANT_REPOSITORY=homeassistant/tinker-homeassistant"
BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE="hassio-supervisor"
BR2_PACKAGE_HASSOS_SUPERVISOR_PROFILE_URL="http://s3.amazonaws.com/hassio-version/apparmor.txt"
BR2_PACKAGE_HASSOS_CLI="homeassistant/armhf-hassio-cli"
BR2_PACKAGE_HASSOS_CLI_VERSION="6"
BR2_PACKAGE_HASSOS_CLI_ARGS="--network=hassio --add-host hassio:172.30.32.2"
BR2_PACKAGE_HASSOS_CLI_PROFILE="docker-default"
BR2_PACKAGE_HASSOS_APPARMOR_DIR="supervisor/apparmor"
BR2_PACKAGE_APPARMOR=y
BR2_PACKAGE_BLUETOOTH_RTL8723=y

View File

@ -0,0 +1,8 @@
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_SIMPLE=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_ACM=m

View File

@ -12,6 +12,11 @@ if [ "${RAUC_SLOT_CLASS}" = "boot" ]; then
fi
fi
# Handle spl install
if [ "${RAUC_SLOT_CLASS}" = "spl" ]; then
/usr/lib/rauc/install-spl "${RAUC_IMAGE_NAME}"
fi
##
# Fixups

View File

@ -0,0 +1,5 @@
config BR2_PACKAGE_BLUETOOTH_RTL8723
bool "bluetooth rtl8723"
depends on BR2_PACKAGE_BLUEZ5_UTILS_CLIENT
help
Install bluetooth for rtl8723.

View File

@ -0,0 +1,21 @@
#!/bin/sh
echo "Setup the Bluetooth chip"
echo 146 > /sys/class/gpio/export
echo 149 > /sys/class/gpio/export
echo 151 > /sys/class/gpio/export
echo high > /sys/class/gpio/gpio146/direction
echo high > /sys/class/gpio/gpio149/direction
echo high > /sys/class/gpio/gpio151/direction
echo "Resetting the Bluetooth chip"
echo 0 > /sys/class/gpio/gpio149/value
echo -e "\tBluetooth chip power down..."
sleep 1
echo 1 > /sys/class/gpio/gpio149/value
echo -e "\tBluetooth chip power up..."
sleep 1
echo -e "\tResetting done"
/usr/sbin/rtk_hciattach -n -s 115200 /dev/ttyS0 rtk_h5

View File

@ -0,0 +1,31 @@
################################################################################
#
# Bluetooth RTL8723
#
################################################################################
BLUETOOTH_RTL8723_VERSION = 1.0.0
BLUETOOTH_RTL8723_LICENSE = Apache License 2.0
BLUETOOTH_RTL8723_LICENSE_FILES = $(BR2_EXTERNAL_HASSOS_PATH)/../LICENSE
BLUETOOTH_RTL8723_SITE = $(BR2_EXTERNAL_HASSOS_PATH)/package/bluetooth-rtl8723
BLUETOOTH_RTL8723_SITE_METHOD = local
define BLUETOOTH_RTL8723_BUILD_CMDS
curl -o $(@D)/rtk_hciattach https://github.com/armbian/build/raw/dee62df8bb2fe8611fd41ddf02063fa15533298c/packages/bsp/rockchip/rtk_hciattach
curl -o $(@D)/rtl8723b_config.bin https://github.com/armbian/firmware/raw/4723bbb3d1ef70b5fbe7d2599c47d078ab125c47/rtl_bt/rtl8723b_config.bin
curl -o $(@D)/rtl8723b_fw.bin https://github.com/armbian/firmware/raw/4723bbb3d1ef70b5fbe7d2599c47d078ab125c47/rtl_bt/rtl8723b_fw.bin
endef
define BLUETOOTH_RTL8723_INSTALL_TARGET_CMDS
$(INSTALL) -d $(TARGET_DIR)/etc/systemd/system/hassos-hardware.target.wants
$(INSTALL) -m 0755 $(@D)/bluetooth-rtl8723 $(TARGET_DIR)/usr/sbin/
$(INSTALL) -m 0644 $(@D)/bluetooth-rtl8723.service $(TARGET_DIR)/usr/lib/systemd/system/
ln -fs /usr/lib/systemd/system/bluetooth-rtl8723.service $(TARGET_DIR)/etc/systemd/system/hassos-hardware.target.wants/
$(INSTALL) -d $(TARGET_DIR)/lib/firmware/rtl_bt
$(INSTALL) -m 0644 $(@D)/*.bin $(TARGET_DIR)/lib/firmware/rtl_bt/
$(INSTALL) -m 0755 $(@D)/rtk_hciattach $(TARGET_DIR)/usr/sbin/
endef
$(eval $(generic-package))

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