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linux: update rockchip-4.4 to bca24644

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This commit is contained in:
Jonas Karlman 2018-08-21 23:37:45 +02:00
parent 0088480416
commit 436325306d
21 changed files with 5883 additions and 2782 deletions
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4
packages/linux/package.mk
View File

@ -35,8 +35,8 @@ case "$LINUX" in
PKG_BUILD_PERF="no"
;;
rockchip-4.4)
PKG_VERSION="eae92ae2b930999857df47c3057327c1c490454b"
PKG_SHA256="da453ca6ecefc3719a1165bc7b08fe00fc2b50ab64f6289ef6f3670a9fc1ceca"
PKG_VERSION="bca2464422eb8dd734f9218265dae256a82299be"
PKG_SHA256="baaea04ca4a1b34e0bfce36bfcf74d65b06ae371e29fa2ef96d26327e55b690d"
PKG_URL="https://github.com/rockchip-linux/kernel/archive/$PKG_VERSION.tar.gz"
PKG_SOURCE_DIR="kernel-$PKG_VERSION"
;;

1
projects/Rockchip/README.md
View File

@ -38,3 +38,4 @@ You may have luck if your device vendor is open source friendly, otherwise keep
* `cat /sys/kernel/debug/clk/clk_summary`
* `hexdump -C /sys/class/drm/card0-HDMI-A-1/edid`
* `edid-decode /sys/class/drm/card0-HDMI-A-1/edid`
* `cat /sys/kernel/debug/dma_buf/bufinfo`

148
projects/Rockchip/devices/MiQi/linux/rockchip-4.4/linux.arm.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.4.114 Kernel Configuration
# Linux/arm 4.4.143 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y
@ -152,6 +152,7 @@ CONFIG_RD_GZIP=y
CONFIG_RD_XZ=y
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@ -237,6 +238,7 @@ CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_BITS_MAX=16
CONFIG_ARCH_MMAP_RND_BITS=8
@ -471,7 +473,6 @@ CONFIG_ARM_CPU_TOPOLOGY=y
# CONFIG_SCHED_SMT is not set
CONFIG_HAVE_ARM_SCU=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_HAVE_ARM_TWD=y
# CONFIG_MCPM is not set
# CONFIG_BIG_LITTLE is not set
CONFIG_VMSPLIT_3G=y
@ -511,9 +512,11 @@ CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_BOUNCE=y
@ -521,11 +524,14 @@ CONFIG_BOUNCE=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
CONFIG_ZSMALLOC=m
CONFIG_PGTABLE_MAPPING=y
# CONFIG_ZSMALLOC_STAT is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_FORCE_MAX_ZONEORDER=11
@ -547,7 +553,7 @@ CONFIG_ATAGS=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_ARM_APPENDED_DTB is not set
CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1"
CONFIG_CMDLINE="usbcore.autosuspend=-1"
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_CMDLINE_EXTEND=y
# CONFIG_CMDLINE_FORCE is not set
@ -566,13 +572,13 @@ CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_TIMES=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@ -1016,6 +1022,7 @@ CONFIG_RFKILL_GPIO=y
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
CONFIG_HAVE_BPF_JIT=y
#
@ -1051,6 +1058,17 @@ CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y
#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8
#
# Bus devices
@ -1078,8 +1096,8 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
CONFIG_ZRAM=y
# CONFIG_ZRAM_LZ4_COMPRESS is not set
CONFIG_ZRAM=m
CONFIG_ZRAM_LZ4_COMPRESS=y
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
@ -1097,7 +1115,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
#
# Misc devices
#
# CONFIG_ROCKCHIP_SCR is not set
CONFIG_ROCKCHIP_SCR=y
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
@ -1329,7 +1347,7 @@ CONFIG_PHYLIB=y
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_ROCKCHIP_PHY is not set
CONFIG_ROCKCHIP_PHY=y
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
@ -1434,7 +1452,8 @@ CONFIG_RT2X00_LIB_LEDS=y
CONFIG_WL_ROCKCHIP=y
CONFIG_WIFI_BUILD_MODULE=y
# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set
CONFIG_AP6XXX=m
# CONFIG_AP6XXX is not set
# CONFIG_CYW_BCMDHD is not set
CONFIG_RTL_WIRELESS_SOLUTION=y
# CONFIG_RTL8188EU is not set
# CONFIG_RTL8188FU is not set
@ -1444,6 +1463,12 @@ CONFIG_RTL8723BS=m
# CONFIG_RTL8723BU is not set
# CONFIG_RTL8723CS is not set
# CONFIG_RTL8723DS is not set
# CONFIG_MVL88W8977 is not set
#
# SouthSV 6XXX WLAN support
#
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@ -1578,6 +1603,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_FT6236 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_GSLX680A is not set
# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
# CONFIG_TOUCHSCREEN_GSLX680_VR is not set
@ -1892,6 +1918,7 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_PINCTRL_AMD is not set
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PINCTRL_RK805 is not set
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
@ -2304,6 +2331,7 @@ CONFIG_REGULATOR_RK808=y
# CONFIG_REGULATOR_RK818 is not set
# CONFIG_REGULATOR_SYR82X is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS549B22 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
@ -2311,6 +2339,7 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_TPS6586X=y
# CONFIG_REGULATOR_XZ3216 is not set
CONFIG_CEC_CORE=y
CONFIG_CEC_NOTIFIER=y
CONFIG_MEDIA_SUPPORT=y
#
@ -2346,15 +2375,15 @@ CONFIG_IR_SHARP_DECODER=y
CONFIG_IR_MCE_KBD_DECODER=y
CONFIG_IR_XMP_DECODER=y
CONFIG_RC_DEVICES=y
# CONFIG_RC_ATI_REMOTE is not set
# CONFIG_IR_HIX5HD2 is not set
# CONFIG_IR_IMON is not set
# CONFIG_IR_MCEUSB is not set
# CONFIG_IR_REDRAT3 is not set
# CONFIG_IR_STREAMZAP is not set
# CONFIG_IR_IGORPLUGUSB is not set
# CONFIG_IR_IGUANA is not set
# CONFIG_IR_TTUSBIR is not set
CONFIG_RC_ATI_REMOTE=m
CONFIG_IR_HIX5HD2=m
CONFIG_IR_IMON=m
CONFIG_IR_MCEUSB=m
CONFIG_IR_REDRAT3=m
CONFIG_IR_STREAMZAP=m
CONFIG_IR_IGORPLUGUSB=m
CONFIG_IR_IGUANA=m
CONFIG_IR_TTUSBIR=m
# CONFIG_RC_LOOPBACK is not set
CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -2364,6 +2393,7 @@ CONFIG_MEDIA_USB_SUPPORT=y
#
CONFIG_USB_PULSE8_CEC=y
CONFIG_USB_RAINSHADOW_CEC=y
# CONFIG_ROCKCHIP_TSP is not set
#
# Supported MMC/SDIO adapters
@ -2399,7 +2429,7 @@ CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
# CONFIG_DRM_SCDC_HELPER is not set
CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_DMA_SYNC is not set
#
# I2C encoder or helper chips
@ -2411,13 +2441,14 @@ CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_EXYNOS is not set
CONFIG_DRM_ROCKCHIP=y
# CONFIG_ROCKCHIP_DRM_DEBUG is not set
# CONFIG_ROCKCHIP_CDN_DP is not set
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_ANALOGIX_DP=y
CONFIG_ROCKCHIP_INNO_HDMI=y
CONFIG_ROCKCHIP_LVDS=y
# CONFIG_ROCKCHIP_DRM_TVE is not set
CONFIG_ROCKCHIP_DRM_TVE=y
# CONFIG_ROCKCHIP_RGB is not set
# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set
# CONFIG_ROCKCHIP_RK3066_HDMI is not set
@ -2444,22 +2475,22 @@ CONFIG_DRM_BRIDGE=y
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_RK1000 is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_LONTIUM_LT8912 is not set
CONFIG_DRM_ANALOGIX_DP=y
CONFIG_DRM_DW_HDMI=y
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
# CONFIG_DRM_DW_HDMI_CEC is not set
CONFIG_DRM_DW_HDMI_CEC=y
# CONFIG_DRM_STI is not set
# CONFIG_POWERVR_ROGUE_M is not set
# CONFIG_MALI400 is not set
CONFIG_MALI_DEVFREQ=y
CONFIG_MALI_MIDGARD_FOR_ANDROID=y
# CONFIG_MALI_MIDGARD_FOR_LINUX is not set
CONFIG_MALI_MIDGARD=m
# CONFIG_MALI_GATOR_SUPPORT is not set
# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set
# CONFIG_MALI_DMA_FENCE is not set
CONFIG_MALI_EXPERT=y
# CONFIG_MALI_CORESTACK is not set
# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set
# CONFIG_MALI_PLATFORM_FAKE is not set
# CONFIG_MALI_PLATFORM_DEVICETREE is not set
@ -2470,8 +2501,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk"
# CONFIG_MALI_TRACE_TIMELINE is not set
# CONFIG_MALI_SYSTEM_TRACE is not set
# CONFIG_MALI_GPU_MMU_AARCH64 is not set
CONFIG_MALI_PWRSOFT_765=y
# CONFIG_MALI_KUTF is not set
# CONFIG_MALI_BIFROST_FOR_ANDROID is not set
CONFIG_MALI_BIFROST_FOR_LINUX=y
# CONFIG_MALI_BIFROST is not set
# CONFIG_MALI_PWRSOFT_765 is not set
#
# Frame buffer Devices
@ -2568,7 +2602,8 @@ CONFIG_RK_VCODEC=y
#
# ROCKCHIP_MPP
#
# CONFIG_ROCKCHIP_MPP_SERVICE is not set
CONFIG_ROCKCHIP_MPP_SERVICE=y
CONFIG_ROCKCHIP_MPP_DEVICE=y
# CONFIG_VGASTATE is not set
CONFIG_VIDEOMODE_HELPERS=y
CONFIG_HDMI=y
@ -2656,13 +2691,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
CONFIG_SND_SOC_ROCKCHIP=y
# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set
CONFIG_SND_SOC_ROCKCHIP_I2S=y
# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set
# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set
# CONFIG_SND_SOC_ROCKCHIP_PDM is not set
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set
# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set
# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set
@ -2698,6 +2739,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_CX20810 is not set
# CONFIG_SND_SOC_DUMMY_CODEC is not set
# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_ES8316 is not set
CONFIG_SND_SOC_ES8323=y
@ -2715,6 +2757,7 @@ CONFIG_SND_SOC_MAX98090=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK312X is not set
# CONFIG_SND_SOC_RK3228 is not set
# CONFIG_SND_SOC_RK3308 is not set
# CONFIG_SND_SOC_RK3328 is not set
# CONFIG_SND_SOC_RK817 is not set
CONFIG_SND_SOC_RL6231=y
@ -3061,7 +3104,6 @@ CONFIG_USB_EZUSB_FX2=y
# CONFIG_USB_PHY is not set
# CONFIG_USB_OTG_WAKELOCK is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_AM335X_PHY_USB is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_ULPI is not set
@ -3255,6 +3297,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_FAKE is not set
CONFIG_RTC_DRV_HYM8563=y
# CONFIG_RTC_DRV_MAX6900 is not set
CONFIG_RTC_DRV_RK808=y
@ -3518,15 +3561,11 @@ CONFIG_COMMON_CLK_RK808=y
#
CONFIG_CLKSRC_OF=y
CONFIG_CLKSRC_PROBE=y
CONFIG_DW_APB_TIMER=y
CONFIG_DW_APB_TIMER_OF=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
CONFIG_ARM_GLOBAL_TIMER=y
# CONFIG_ARM_TIMER_SP804 is not set
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
@ -3560,13 +3599,31 @@ CONFIG_ROCKCHIP_IOMMU=y
# SOC (System On Chip) specific Drivers
#
# CONFIG_SOC_BRCMSTB is not set
#
# CPU selection
#
# CONFIG_CPU_RK312X is not set
# CONFIG_CPU_RK3036 is not set
# CONFIG_CPU_RK30XX is not set
# CONFIG_CPU_RK3188 is not set
CONFIG_CPU_RK3288=y
# CONFIG_CPU_RK322X is not set
# CONFIG_CPU_RV110X is not set
# CONFIG_CPU_PX30 is not set
# CONFIG_CPU_RK3308 is not set
# CONFIG_CPU_RK3328 is not set
# CONFIG_CPU_RK3366 is not set
# CONFIG_CPU_RK3368 is not set
# CONFIG_CPU_RK3399 is not set
CONFIG_ANDROID_VERSION=0x07010000
CONFIG_ROCKCHIP_CPUINFO=y
# CONFIG_ROCKCHIP_DEVICEINFO is not set
# CONFIG_ROCKCHIP_PM_TEST is not set
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
# CONFIG_ROCKCHIP_PVTM is not set
CONFIG_ROCKCHIP_PVTM=y
CONFIG_ROCKCHIP_SUSPEND_MODE=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
CONFIG_PM_DEVFREQ=y
@ -3582,6 +3639,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
#
# DEVFREQ Drivers
#
CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y
CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
@ -3745,6 +3803,7 @@ CONFIG_SENSORS_TSL2563=y
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VL6180 is not set
#
# Magnetometer sensors
@ -3804,8 +3863,10 @@ CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_CROS_EC is not set
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_GPIO=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
# CONFIG_PWM_ROCKCHIP_I2S is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
# CONFIG_IPACK_BUS is not set
@ -3824,7 +3885,7 @@ CONFIG_GENERIC_PHY=y
CONFIG_PHY_ROCKCHIP_USB=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set
# CONFIG_PHY_ROCKCHIP_EMMC is not set
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_DP=y
# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set
@ -3846,6 +3907,7 @@ CONFIG_ANDROID=y
# CONFIG_ANDROID_BINDER_IPC is not set
CONFIG_NVMEM=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_ROCKCHIP_OTP=y
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
@ -3854,6 +3916,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FPGA is not set
# CONFIG_TEE is not set
# CONFIG_RK_FLASH is not set
# CONFIG_RK_NAND is not set
#
@ -3866,7 +3929,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_HAVE_ARM_SMCCC=y
# CONFIG_ROCKCHIP_SIP is not set
CONFIG_ROCKCHIP_SIP=y
#
# File systems
@ -3964,6 +4027,7 @@ CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_PROC_UID=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
@ -3993,6 +4057,7 @@ CONFIG_SQUASHFS_ZLIB=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_ZSTD=y
# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
@ -4415,6 +4480,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SPECK is not set
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
@ -4446,6 +4512,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y
# CONFIG_CRYPTO_USER_API_AEAD is not set
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_PUBLIC_KEY_ALGO_RSA=y
@ -4487,13 +4554,16 @@ CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
# CONFIG_CRC8 is not set
CONFIG_XXHASH=y
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_COMPRESS=m
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set

120
projects/Rockchip/devices/RK3328/linux/rockchip-4.4/linux.aarch64.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.114 Kernel Configuration
# Linux/arm64 4.4.143 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -12,8 +12,8 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_CONT_SHIFT=4
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
@ -157,6 +157,7 @@ CONFIG_RD_GZIP=y
CONFIG_RD_XZ=y
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@ -392,6 +393,7 @@ CONFIG_ARM64_ERRATUM_819472=y
# CONFIG_ARM64_ERRATUM_832075 is not set
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
# CONFIG_ARM64_ERRATUM_1024718 is not set
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
# CONFIG_CAVIUM_ERRATUM_27456 is not set
@ -434,9 +436,11 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
@ -445,11 +449,14 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
# CONFIG_TRANSPARENT_HUGEPAGE is not set
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
CONFIG_ZSMALLOC=m
CONFIG_PGTABLE_MAPPING=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
@ -475,7 +482,7 @@ CONFIG_ARM64_MODULE_CMODEL_LARGE=y
#
# Boot options
#
CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1"
CONFIG_CMDLINE="usbcore.autosuspend=-1"
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_CMDLINE_EXTEND=y
# CONFIG_CMDLINE_FORCE is not set
@ -549,13 +556,13 @@ CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
CONFIG_CPU_FREQ_TIMES=y
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@ -934,7 +941,9 @@ CONFIG_RFKILL_GPIO=y
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_EBPF_JIT=y
#
# Device Drivers
@ -970,6 +979,17 @@ CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y
#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8
#
# Bus devices
@ -1074,8 +1094,8 @@ CONFIG_OF_RESERVED_MEM=y
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
CONFIG_ZRAM=y
# CONFIG_ZRAM_LZ4_COMPRESS is not set
CONFIG_ZRAM=m
CONFIG_ZRAM_LZ4_COMPRESS=y
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
@ -1538,6 +1558,7 @@ CONFIG_WL_ROCKCHIP=y
CONFIG_WIFI_BUILD_MODULE=y
# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set
CONFIG_AP6XXX=m
# CONFIG_CYW_BCMDHD is not set
CONFIG_RTL_WIRELESS_SOLUTION=y
# CONFIG_RTL8188EU is not set
# CONFIG_RTL8188FU is not set
@ -1548,6 +1569,12 @@ CONFIG_RTL8723BS=m
# CONFIG_RTL8723CS is not set
# CONFIG_RTL8723DS is not set
# CONFIG_RTL8822BE is not set
# CONFIG_MVL88W8977 is not set
#
# SouthSV 6XXX WLAN support
#
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@ -1683,6 +1710,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_FT6236 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_GSLX680A is not set
# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
# CONFIG_TOUCHSCREEN_GSLX680_VR is not set
@ -2026,6 +2054,7 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_PINCTRL_AMD is not set
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_RK805=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
@ -2116,6 +2145,7 @@ CONFIG_CHARGER_BQ24735=y
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_CHARGER_SY6982C is not set
# CONFIG_CHARGER_UNIVERSAL is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_BATTERY_EC is not set
# CONFIG_BATTERY_CW2015 is not set
@ -2458,6 +2488,7 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_RK818=y
# CONFIG_REGULATOR_SYR82X is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS549B22 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
@ -2501,15 +2532,15 @@ CONFIG_IR_SHARP_DECODER=y
CONFIG_IR_MCE_KBD_DECODER=y
CONFIG_IR_XMP_DECODER=y
CONFIG_RC_DEVICES=y
# CONFIG_RC_ATI_REMOTE is not set
# CONFIG_IR_HIX5HD2 is not set
# CONFIG_IR_IMON is not set
# CONFIG_IR_MCEUSB is not set
# CONFIG_IR_REDRAT3 is not set
# CONFIG_IR_STREAMZAP is not set
# CONFIG_IR_IGORPLUGUSB is not set
# CONFIG_IR_IGUANA is not set
# CONFIG_IR_TTUSBIR is not set
CONFIG_RC_ATI_REMOTE=m
CONFIG_IR_HIX5HD2=m
CONFIG_IR_IMON=m
CONFIG_IR_MCEUSB=m
CONFIG_IR_REDRAT3=m
CONFIG_IR_STREAMZAP=m
CONFIG_IR_IGORPLUGUSB=m
CONFIG_IR_IGUANA=m
CONFIG_IR_TTUSBIR=m
# CONFIG_RC_LOOPBACK is not set
CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -2520,6 +2551,7 @@ CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_PULSE8_CEC=y
CONFIG_USB_RAINSHADOW_CEC=y
# CONFIG_MEDIA_PCI_SUPPORT is not set
# CONFIG_ROCKCHIP_TSP is not set
#
# Supported MMC/SDIO adapters
@ -2555,7 +2587,7 @@ CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
# CONFIG_DRM_SCDC_HELPER is not set
CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_DMA_SYNC is not set
#
# I2C encoder or helper chips
@ -2574,6 +2606,7 @@ CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_SAVAGE is not set
# CONFIG_DRM_VGEM is not set
CONFIG_DRM_ROCKCHIP=y
# CONFIG_ROCKCHIP_DRM_DEBUG is not set
# CONFIG_ROCKCHIP_CDN_DP is not set
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
@ -2609,6 +2642,7 @@ CONFIG_DRM_BRIDGE=y
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_RK1000 is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_LONTIUM_LT8912 is not set
CONFIG_DRM_ANALOGIX_DP=y
CONFIG_DRM_DW_HDMI=y
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
@ -2627,11 +2661,11 @@ CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y
CONFIG_MALI_DT=y
CONFIG_MALI_DEVFREQ=y
# CONFIG_MALI_QUIET is not set
CONFIG_MALI_MIDGARD_FOR_ANDROID=y
# CONFIG_MALI_MIDGARD_FOR_LINUX is not set
# CONFIG_MALI_MIDGARD is not set
# CONFIG_MALI_KUTF is not set
# CONFIG_MALI_BIFROST_FOR_ANDROID is not set
CONFIG_MALI_BIFROST_FOR_LINUX=y
# CONFIG_MALI_BIFROST is not set
# CONFIG_MALI_PWRSOFT_765 is not set
#
# Frame buffer Devices
@ -2842,13 +2876,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
CONFIG_SND_SOC_ROCKCHIP=y
# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set
CONFIG_SND_SOC_ROCKCHIP_I2S=y
# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set
# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set
# CONFIG_SND_SOC_ROCKCHIP_PDM is not set
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set
# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set
# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set
@ -2884,6 +2924,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_CX20810 is not set
# CONFIG_SND_SOC_DUMMY_CODEC is not set
# CONFIG_SND_SOC_BT_SCO is not set
CONFIG_SND_SOC_ES8316=y
# CONFIG_SND_SOC_ES8323 is not set
@ -2901,6 +2942,7 @@ CONFIG_SND_SOC_MAX98090=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK312X is not set
# CONFIG_SND_SOC_RK3228 is not set
# CONFIG_SND_SOC_RK3308 is not set
CONFIG_SND_SOC_RK3328=y
# CONFIG_SND_SOC_RK817 is not set
CONFIG_SND_SOC_RL6231=y
@ -3471,6 +3513,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_FAKE is not set
CONFIG_RTC_DRV_HYM8563=y
# CONFIG_RTC_DRV_MAX6900 is not set
CONFIG_RTC_DRV_RK808=y
@ -3694,6 +3737,7 @@ CONFIG_TSL2583=y
# CONFIG_ANDROID_TIMED_OUTPUT is not set
# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set
# CONFIG_SYNC is not set
# CONFIG_ANDROID_VSOC is not set
# CONFIG_ION is not set
# CONFIG_FIQ_DEBUGGER is not set
# CONFIG_FIQ_WATCHDOG is not set
@ -3729,7 +3773,7 @@ CONFIG_COMMON_CLK_RK808=y
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_CLK_QORIQ is not set
CONFIG_COMMON_CLK_XGENE=y
# CONFIG_COMMON_CLK_XGENE is not set
# CONFIG_COMMON_CLK_PWM is not set
# CONFIG_COMMON_CLK_PXA is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
@ -3746,7 +3790,7 @@ CONFIG_CLKSRC_PROBE=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
@ -3786,13 +3830,23 @@ CONFIG_ROCKCHIP_IOMMU=y
#
# SOC (System On Chip) specific Drivers
#
#
# CPU selection
#
# CONFIG_CPU_PX30 is not set
# CONFIG_CPU_RK3308 is not set
CONFIG_CPU_RK3328=y
# CONFIG_CPU_RK3366 is not set
# CONFIG_CPU_RK3368 is not set
# CONFIG_CPU_RK3399 is not set
CONFIG_ANDROID_VERSION=0x07010000
CONFIG_ROCKCHIP_CPUINFO=y
# CONFIG_ROCKCHIP_DEVICEINFO is not set
# CONFIG_ROCKCHIP_PM_TEST is not set
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
# CONFIG_ROCKCHIP_PVTM is not set
CONFIG_ROCKCHIP_PVTM=y
CONFIG_ROCKCHIP_SUSPEND_MODE=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
@ -3809,6 +3863,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
#
# DEVFREQ Drivers
#
CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y
CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
@ -3981,6 +4036,7 @@ CONFIG_SENSORS_TSL2563=y
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VL6180 is not set
#
# Magnetometer sensors
@ -4042,8 +4098,10 @@ CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_CROS_EC is not set
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_GPIO=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
# CONFIG_PWM_ROCKCHIP_I2S is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
@ -4091,6 +4149,7 @@ CONFIG_ANDROID=y
# CONFIG_LIBNVDIMM is not set
CONFIG_NVMEM=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_ROCKCHIP_OTP=y
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
@ -4099,6 +4158,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FPGA is not set
# CONFIG_TEE is not set
# CONFIG_RK_FLASH is not set
# CONFIG_RK_NAND is not set
#
@ -4213,6 +4273,7 @@ CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_PROC_UID=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
@ -4244,6 +4305,7 @@ CONFIG_SQUASHFS_ZLIB=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_ZSTD=y
# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
@ -4665,6 +4727,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SPECK is not set
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
@ -4697,6 +4760,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_CCP is not set
# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_PUBLIC_KEY_ALGO_RSA=y
@ -4719,6 +4783,7 @@ CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
# CONFIG_CRYPTO_CRC32_ARM64 is not set
# CONFIG_CRYPTO_SPECK_NEON is not set
CONFIG_BINARY_PRINTF=y
#
@ -4747,13 +4812,16 @@ CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
# CONFIG_CRC8 is not set
CONFIG_XXHASH=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_COMPRESS=m
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set

126
projects/Rockchip/devices/RK3399/linux/rockchip-4.4/linux.aarch64.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 4.4.114 Kernel Configuration
# Linux/arm64 4.4.143 Kernel Configuration
#
CONFIG_ARM64=y
CONFIG_64BIT=y
@ -12,8 +12,8 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_CONT_SHIFT=4
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
@ -157,6 +157,7 @@ CONFIG_RD_GZIP=y
CONFIG_RD_XZ=y
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@ -392,6 +393,7 @@ CONFIG_ARM64_ERRATUM_819472=y
# CONFIG_ARM64_ERRATUM_832075 is not set
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
# CONFIG_ARM64_ERRATUM_1024718 is not set
# CONFIG_CAVIUM_ERRATUM_22375 is not set
# CONFIG_CAVIUM_ERRATUM_23154 is not set
# CONFIG_CAVIUM_ERRATUM_27456 is not set
@ -434,9 +436,11 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
@ -445,11 +449,14 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
# CONFIG_TRANSPARENT_HUGEPAGE is not set
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
CONFIG_ZSMALLOC=m
CONFIG_PGTABLE_MAPPING=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_GENERIC_EARLY_IOREMAP=y
# CONFIG_IDLE_PAGE_TRACKING is not set
@ -475,7 +482,7 @@ CONFIG_ARM64_MODULE_CMODEL_LARGE=y
#
# Boot options
#
CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1"
CONFIG_CMDLINE="usbcore.autosuspend=-1"
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_CMDLINE_EXTEND=y
# CONFIG_CMDLINE_FORCE is not set
@ -549,13 +556,13 @@ CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
CONFIG_CPU_FREQ_TIMES=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@ -934,7 +941,9 @@ CONFIG_RFKILL_GPIO=y
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
CONFIG_HAVE_BPF_JIT=y
CONFIG_HAVE_EBPF_JIT=y
#
# Device Drivers
@ -970,6 +979,17 @@ CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y
#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8
#
# Bus devices
@ -1074,8 +1094,8 @@ CONFIG_OF_RESERVED_MEM=y
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
CONFIG_ZRAM=y
# CONFIG_ZRAM_LZ4_COMPRESS is not set
CONFIG_ZRAM=m
CONFIG_ZRAM_LZ4_COMPRESS=y
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
@ -1538,6 +1558,7 @@ CONFIG_WL_ROCKCHIP=y
CONFIG_WIFI_BUILD_MODULE=y
# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set
CONFIG_AP6XXX=m
# CONFIG_CYW_BCMDHD is not set
CONFIG_RTL_WIRELESS_SOLUTION=y
# CONFIG_RTL8188EU is not set
# CONFIG_RTL8188FU is not set
@ -1548,6 +1569,12 @@ CONFIG_RTL8723BS=m
# CONFIG_RTL8723CS is not set
# CONFIG_RTL8723DS is not set
# CONFIG_RTL8822BE is not set
# CONFIG_MVL88W8977 is not set
#
# SouthSV 6XXX WLAN support
#
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@ -1683,6 +1710,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_FT6236 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_GSLX680A is not set
# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
# CONFIG_TOUCHSCREEN_GSLX680_VR is not set
@ -2026,6 +2054,7 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_PINCTRL_AMD is not set
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PINCTRL_RK805 is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
@ -2116,6 +2145,7 @@ CONFIG_CHARGER_BQ24735=y
# CONFIG_CHARGER_BQ25890 is not set
# CONFIG_CHARGER_SMB347 is not set
# CONFIG_CHARGER_SY6982C is not set
# CONFIG_CHARGER_UNIVERSAL is not set
# CONFIG_BATTERY_GAUGE_LTC2941 is not set
# CONFIG_BATTERY_EC is not set
# CONFIG_BATTERY_CW2015 is not set
@ -2458,6 +2488,7 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_RK818=y
# CONFIG_REGULATOR_SYR82X is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS549B22 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
@ -2501,15 +2532,15 @@ CONFIG_IR_SHARP_DECODER=y
CONFIG_IR_MCE_KBD_DECODER=y
CONFIG_IR_XMP_DECODER=y
CONFIG_RC_DEVICES=y
# CONFIG_RC_ATI_REMOTE is not set
# CONFIG_IR_HIX5HD2 is not set
# CONFIG_IR_IMON is not set
# CONFIG_IR_MCEUSB is not set
# CONFIG_IR_REDRAT3 is not set
# CONFIG_IR_STREAMZAP is not set
# CONFIG_IR_IGORPLUGUSB is not set
# CONFIG_IR_IGUANA is not set
# CONFIG_IR_TTUSBIR is not set
CONFIG_RC_ATI_REMOTE=m
CONFIG_IR_HIX5HD2=m
CONFIG_IR_IMON=m
CONFIG_IR_MCEUSB=m
CONFIG_IR_REDRAT3=m
CONFIG_IR_STREAMZAP=m
CONFIG_IR_IGORPLUGUSB=m
CONFIG_IR_IGUANA=m
CONFIG_IR_TTUSBIR=m
# CONFIG_RC_LOOPBACK is not set
CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -2520,6 +2551,7 @@ CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_PULSE8_CEC=y
CONFIG_USB_RAINSHADOW_CEC=y
# CONFIG_MEDIA_PCI_SUPPORT is not set
# CONFIG_ROCKCHIP_TSP is not set
#
# Supported MMC/SDIO adapters
@ -2555,7 +2587,7 @@ CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
# CONFIG_DRM_SCDC_HELPER is not set
CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_DMA_SYNC is not set
#
# I2C encoder or helper chips
@ -2574,7 +2606,8 @@ CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_SAVAGE is not set
# CONFIG_DRM_VGEM is not set
CONFIG_DRM_ROCKCHIP=y
# CONFIG_ROCKCHIP_CDN_DP is not set
# CONFIG_ROCKCHIP_DRM_DEBUG is not set
CONFIG_ROCKCHIP_CDN_DP=y
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_ANALOGIX_DP=y
@ -2609,6 +2642,7 @@ CONFIG_DRM_BRIDGE=y
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_RK1000 is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_LONTIUM_LT8912 is not set
CONFIG_DRM_ANALOGIX_DP=y
CONFIG_DRM_DW_HDMI=y
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
@ -2617,13 +2651,12 @@ CONFIG_DRM_DW_HDMI_CEC=y
# CONFIG_POWERVR_ROGUE_M is not set
# CONFIG_MALI400 is not set
CONFIG_MALI_DEVFREQ=y
CONFIG_MALI_MIDGARD_FOR_ANDROID=y
# CONFIG_MALI_MIDGARD_FOR_LINUX is not set
CONFIG_MALI_MIDGARD=m
# CONFIG_MALI_GATOR_SUPPORT is not set
# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set
# CONFIG_MALI_DMA_FENCE is not set
CONFIG_MALI_EXPERT=y
# CONFIG_MALI_CORESTACK is not set
# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set
# CONFIG_MALI_PLATFORM_FAKE is not set
# CONFIG_MALI_PLATFORM_DEVICETREE is not set
@ -2634,8 +2667,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk"
# CONFIG_MALI_TRACE_TIMELINE is not set
# CONFIG_MALI_SYSTEM_TRACE is not set
# CONFIG_MALI_GPU_MMU_AARCH64 is not set
CONFIG_MALI_PWRSOFT_765=y
# CONFIG_MALI_KUTF is not set
# CONFIG_MALI_BIFROST_FOR_ANDROID is not set
CONFIG_MALI_BIFROST_FOR_LINUX=y
# CONFIG_MALI_BIFROST is not set
# CONFIG_MALI_PWRSOFT_765 is not set
#
# Frame buffer Devices
@ -2846,13 +2882,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
CONFIG_SND_SOC_ROCKCHIP=y
# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set
CONFIG_SND_SOC_ROCKCHIP_I2S=y
# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set
# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set
# CONFIG_SND_SOC_ROCKCHIP_PDM is not set
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set
# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set
# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set
@ -2888,6 +2930,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_CX20810 is not set
# CONFIG_SND_SOC_DUMMY_CODEC is not set
# CONFIG_SND_SOC_BT_SCO is not set
CONFIG_SND_SOC_ES8316=y
# CONFIG_SND_SOC_ES8323 is not set
@ -2905,7 +2948,8 @@ CONFIG_SND_SOC_MAX98090=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK312X is not set
# CONFIG_SND_SOC_RK3228 is not set
CONFIG_SND_SOC_RK3328=y
# CONFIG_SND_SOC_RK3308 is not set
# CONFIG_SND_SOC_RK3328 is not set
# CONFIG_SND_SOC_RK817 is not set
CONFIG_SND_SOC_RL6231=y
CONFIG_SND_SOC_RT5616=y
@ -3475,6 +3519,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_FAKE is not set
CONFIG_RTC_DRV_HYM8563=y
# CONFIG_RTC_DRV_MAX6900 is not set
CONFIG_RTC_DRV_RK808=y
@ -3698,6 +3743,7 @@ CONFIG_TSL2583=y
# CONFIG_ANDROID_TIMED_OUTPUT is not set
# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set
# CONFIG_SYNC is not set
# CONFIG_ANDROID_VSOC is not set
# CONFIG_ION is not set
# CONFIG_FIQ_DEBUGGER is not set
# CONFIG_FIQ_WATCHDOG is not set
@ -3733,7 +3779,7 @@ CONFIG_COMMON_CLK_RK808=y
# CONFIG_COMMON_CLK_SI570 is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
# CONFIG_CLK_QORIQ is not set
CONFIG_COMMON_CLK_XGENE=y
# CONFIG_COMMON_CLK_XGENE is not set
# CONFIG_COMMON_CLK_PWM is not set
# CONFIG_COMMON_CLK_PXA is not set
# CONFIG_COMMON_CLK_CDCE706 is not set
@ -3750,7 +3796,7 @@ CONFIG_CLKSRC_PROBE=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
@ -3790,13 +3836,23 @@ CONFIG_ROCKCHIP_IOMMU=y
#
# SOC (System On Chip) specific Drivers
#
#
# CPU selection
#
# CONFIG_CPU_PX30 is not set
# CONFIG_CPU_RK3308 is not set
# CONFIG_CPU_RK3328 is not set
# CONFIG_CPU_RK3366 is not set
# CONFIG_CPU_RK3368 is not set
CONFIG_CPU_RK3399=y
CONFIG_ANDROID_VERSION=0x07010000
CONFIG_ROCKCHIP_CPUINFO=y
# CONFIG_ROCKCHIP_DEVICEINFO is not set
# CONFIG_ROCKCHIP_PM_TEST is not set
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
# CONFIG_ROCKCHIP_PVTM is not set
CONFIG_ROCKCHIP_PVTM=y
CONFIG_ROCKCHIP_SUSPEND_MODE=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
@ -3813,6 +3869,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
#
# DEVFREQ Drivers
#
CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y
CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
@ -3985,6 +4042,7 @@ CONFIG_SENSORS_TSL2563=y
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VL6180 is not set
#
# Magnetometer sensors
@ -4046,8 +4104,10 @@ CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_CROS_EC is not set
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_GPIO=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
# CONFIG_PWM_ROCKCHIP_I2S is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
@ -4095,6 +4155,7 @@ CONFIG_ANDROID=y
# CONFIG_LIBNVDIMM is not set
CONFIG_NVMEM=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_ROCKCHIP_OTP=y
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
@ -4103,6 +4164,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FPGA is not set
# CONFIG_TEE is not set
# CONFIG_RK_FLASH is not set
# CONFIG_RK_NAND is not set
#
@ -4217,6 +4279,7 @@ CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_PROC_UID=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
@ -4248,6 +4311,7 @@ CONFIG_SQUASHFS_ZLIB=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_ZSTD=y
# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
@ -4670,6 +4734,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SPECK is not set
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
@ -4702,6 +4767,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_CCP is not set
# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_PUBLIC_KEY_ALGO_RSA=y
@ -4724,6 +4790,7 @@ CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
# CONFIG_CRYPTO_CRC32_ARM64 is not set
# CONFIG_CRYPTO_SPECK_NEON is not set
CONFIG_BINARY_PRINTF=y
#
@ -4752,13 +4819,16 @@ CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
# CONFIG_CRC8 is not set
CONFIG_XXHASH=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_COMPRESS=m
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set

152
projects/Rockchip/devices/TinkerBoard/linux/rockchip-4.4/linux.arm.conf
View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 4.4.114 Kernel Configuration
# Linux/arm 4.4.143 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_ARM_HAS_SG_CHAIN=y
@ -152,6 +152,7 @@ CONFIG_RD_GZIP=y
CONFIG_RD_XZ=y
# CONFIG_RD_LZO is not set
# CONFIG_RD_LZ4 is not set
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@ -237,6 +238,7 @@ CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
CONFIG_HAVE_EXIT_THREAD=y
CONFIG_ARCH_MMAP_RND_BITS_MIN=8
CONFIG_ARCH_MMAP_RND_BITS_MAX=16
CONFIG_ARCH_MMAP_RND_BITS=8
@ -471,7 +473,6 @@ CONFIG_ARM_CPU_TOPOLOGY=y
# CONFIG_SCHED_SMT is not set
CONFIG_HAVE_ARM_SCU=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_HAVE_ARM_TWD=y
# CONFIG_MCPM is not set
# CONFIG_BIG_LITTLE is not set
CONFIG_VMSPLIT_3G=y
@ -511,9 +512,11 @@ CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_BOUNCE=y
@ -521,11 +524,14 @@ CONFIG_BOUNCE=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
CONFIG_CMA=y
# CONFIG_CMA_DEBUG is not set
CONFIG_CMA_DEBUGFS=y
CONFIG_CMA_AREAS=7
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
CONFIG_ZSMALLOC=y
# CONFIG_PGTABLE_MAPPING is not set
CONFIG_ZSMALLOC=m
CONFIG_PGTABLE_MAPPING=y
# CONFIG_ZSMALLOC_STAT is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
CONFIG_FORCE_MAX_ZONEORDER=11
@ -547,7 +553,7 @@ CONFIG_ATAGS=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_ARM_APPENDED_DTB is not set
CONFIG_CMDLINE="root=/dev/ram0 rdinit=/init usbcore.autosuspend=-1"
CONFIG_CMDLINE="usbcore.autosuspend=-1"
# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_CMDLINE_EXTEND=y
# CONFIG_CMDLINE_FORCE is not set
@ -566,13 +572,13 @@ CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_TIMES=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHED is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@ -1016,6 +1022,7 @@ CONFIG_RFKILL_GPIO=y
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
CONFIG_HAVE_BPF_JIT=y
#
@ -1051,6 +1058,17 @@ CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
# CONFIG_FENCE_TRACE is not set
CONFIG_DMA_CMA=y
#
# Default contiguous memory area size:
#
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_ALIGNMENT=8
#
# Bus devices
@ -1078,8 +1096,8 @@ CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
CONFIG_ZRAM=y
# CONFIG_ZRAM_LZ4_COMPRESS is not set
CONFIG_ZRAM=m
CONFIG_ZRAM_LZ4_COMPRESS=y
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
@ -1097,7 +1115,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
#
# Misc devices
#
# CONFIG_ROCKCHIP_SCR is not set
CONFIG_ROCKCHIP_SCR=y
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
@ -1329,7 +1347,7 @@ CONFIG_PHYLIB=y
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_ROCKCHIP_PHY is not set
CONFIG_ROCKCHIP_PHY=y
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
@ -1432,18 +1450,25 @@ CONFIG_RT2X00_LIB_LEDS=y
# CONFIG_RTL_CARDS is not set
# CONFIG_RTL8XXXU is not set
CONFIG_WL_ROCKCHIP=y
# CONFIG_WIFI_BUILD_MODULE is not set
CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y
CONFIG_WIFI_BUILD_MODULE=y
# CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP is not set
# CONFIG_AP6XXX is not set
# CONFIG_CYW_BCMDHD is not set
CONFIG_RTL_WIRELESS_SOLUTION=y
# CONFIG_RTL8188EU is not set
# CONFIG_RTL8188FU is not set
# CONFIG_RTL8189ES is not set
# CONFIG_RTL8189FS is not set
CONFIG_RTL8723BS=y
CONFIG_RTL8723BS=m
# CONFIG_RTL8723BU is not set
# CONFIG_RTL8723CS is not set
# CONFIG_RTL8723DS is not set
# CONFIG_MVL88W8977 is not set
#
# SouthSV 6XXX WLAN support
#
# CONFIG_SSV6051 is not set
# CONFIG_WL_TI is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
@ -1578,6 +1603,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_FT6236 is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_GSLX680A is not set
# CONFIG_TOUCHSCREEN_GSLX680_D708 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
# CONFIG_TOUCHSCREEN_GSLX680_VR is not set
@ -1892,6 +1918,7 @@ CONFIG_GENERIC_PINCONF=y
# CONFIG_PINCTRL_AMD is not set
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PINCTRL_RK805 is not set
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
@ -2304,6 +2331,7 @@ CONFIG_REGULATOR_RK808=y
# CONFIG_REGULATOR_RK818 is not set
# CONFIG_REGULATOR_SYR82X is not set
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS549B22 is not set
# CONFIG_REGULATOR_TPS62360 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
@ -2311,6 +2339,7 @@ CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_TPS6586X=y
# CONFIG_REGULATOR_XZ3216 is not set
CONFIG_CEC_CORE=y
CONFIG_CEC_NOTIFIER=y
CONFIG_MEDIA_SUPPORT=y
#
@ -2346,15 +2375,15 @@ CONFIG_IR_SHARP_DECODER=y
CONFIG_IR_MCE_KBD_DECODER=y
CONFIG_IR_XMP_DECODER=y
CONFIG_RC_DEVICES=y
# CONFIG_RC_ATI_REMOTE is not set
# CONFIG_IR_HIX5HD2 is not set
# CONFIG_IR_IMON is not set
# CONFIG_IR_MCEUSB is not set
# CONFIG_IR_REDRAT3 is not set
# CONFIG_IR_STREAMZAP is not set
# CONFIG_IR_IGORPLUGUSB is not set
# CONFIG_IR_IGUANA is not set
# CONFIG_IR_TTUSBIR is not set
CONFIG_RC_ATI_REMOTE=m
CONFIG_IR_HIX5HD2=m
CONFIG_IR_IMON=m
CONFIG_IR_MCEUSB=m
CONFIG_IR_REDRAT3=m
CONFIG_IR_STREAMZAP=m
CONFIG_IR_IGORPLUGUSB=m
CONFIG_IR_IGUANA=m
CONFIG_IR_TTUSBIR=m
# CONFIG_RC_LOOPBACK is not set
CONFIG_IR_GPIO_CIR=y
CONFIG_MEDIA_USB_SUPPORT=y
@ -2364,6 +2393,7 @@ CONFIG_MEDIA_USB_SUPPORT=y
#
CONFIG_USB_PULSE8_CEC=y
CONFIG_USB_RAINSHADOW_CEC=y
# CONFIG_ROCKCHIP_TSP is not set
#
# Supported MMC/SDIO adapters
@ -2399,7 +2429,7 @@ CONFIG_DRM_KMS_FB_HELPER=y
CONFIG_DRM_FBDEV_EMULATION=y
# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
# CONFIG_DRM_SCDC_HELPER is not set
CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_DMA_SYNC is not set
#
# I2C encoder or helper chips
@ -2411,13 +2441,14 @@ CONFIG_DRM_DMA_SYNC=y
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_EXYNOS is not set
CONFIG_DRM_ROCKCHIP=y
# CONFIG_ROCKCHIP_DRM_DEBUG is not set
# CONFIG_ROCKCHIP_CDN_DP is not set
CONFIG_ROCKCHIP_DW_HDMI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_ANALOGIX_DP=y
CONFIG_ROCKCHIP_INNO_HDMI=y
CONFIG_ROCKCHIP_LVDS=y
# CONFIG_ROCKCHIP_DRM_TVE is not set
CONFIG_ROCKCHIP_DRM_TVE=y
# CONFIG_ROCKCHIP_RGB is not set
# CONFIG_ROCKCHIP_DRM_BACKLIGHT is not set
# CONFIG_ROCKCHIP_RK3066_HDMI is not set
@ -2444,22 +2475,22 @@ CONFIG_DRM_BRIDGE=y
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_RK1000 is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
# CONFIG_DRM_LONTIUM_LT8912 is not set
CONFIG_DRM_ANALOGIX_DP=y
CONFIG_DRM_DW_HDMI=y
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
# CONFIG_DRM_DW_HDMI_CEC is not set
CONFIG_DRM_DW_HDMI_CEC=y
# CONFIG_DRM_STI is not set
# CONFIG_POWERVR_ROGUE_M is not set
# CONFIG_MALI400 is not set
CONFIG_MALI_DEVFREQ=y
CONFIG_MALI_MIDGARD_FOR_ANDROID=y
# CONFIG_MALI_MIDGARD_FOR_LINUX is not set
CONFIG_MALI_MIDGARD=m
# CONFIG_MALI_GATOR_SUPPORT is not set
# CONFIG_MALI_MIDGARD_ENABLE_TRACE is not set
# CONFIG_MALI_DMA_FENCE is not set
CONFIG_MALI_EXPERT=y
# CONFIG_MALI_CORESTACK is not set
# CONFIG_MALI_PRFCNT_SET_SECONDARY is not set
# CONFIG_MALI_PLATFORM_FAKE is not set
# CONFIG_MALI_PLATFORM_DEVICETREE is not set
@ -2470,8 +2501,11 @@ CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk"
# CONFIG_MALI_TRACE_TIMELINE is not set
# CONFIG_MALI_SYSTEM_TRACE is not set
# CONFIG_MALI_GPU_MMU_AARCH64 is not set
CONFIG_MALI_PWRSOFT_765=y
# CONFIG_MALI_KUTF is not set
# CONFIG_MALI_BIFROST_FOR_ANDROID is not set
CONFIG_MALI_BIFROST_FOR_LINUX=y
# CONFIG_MALI_BIFROST is not set
# CONFIG_MALI_PWRSOFT_765 is not set
#
# Frame buffer Devices
@ -2568,7 +2602,8 @@ CONFIG_RK_VCODEC=y
#
# ROCKCHIP_MPP
#
# CONFIG_ROCKCHIP_MPP_SERVICE is not set
CONFIG_ROCKCHIP_MPP_SERVICE=y
CONFIG_ROCKCHIP_MPP_DEVICE=y
# CONFIG_VGASTATE is not set
CONFIG_VIDEOMODE_HELPERS=y
CONFIG_HDMI=y
@ -2656,13 +2691,19 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_FSL_ESAI is not set
# CONFIG_SND_SOC_IMX_AUDMUX is not set
CONFIG_SND_SOC_ROCKCHIP=y
# CONFIG_SND_SOC_ROCKCHIP_FORCE_SRAM is not set
CONFIG_SND_SOC_ROCKCHIP_I2S=y
# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set
# CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS is not set
# CONFIG_SND_SOC_ROCKCHIP_PDM is not set
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
# CONFIG_SND_SOC_ROCKCHIP_SPDIFRX is not set
# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
# CONFIG_SND_SOC_ROCKCHIP_DA7219 is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_ANALOG is not set
# CONFIG_SND_SOC_ROCKCHIP_HDMI_DP is not set
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
# CONFIG_SND_SOC_ROCKCHIP_RT5651_TC358749 is not set
# CONFIG_SND_SOC_ROCKCHIP_CDNDP is not set
@ -2698,6 +2739,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_CS4349 is not set
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_CX20810 is not set
# CONFIG_SND_SOC_DUMMY_CODEC is not set
# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_ES8316 is not set
CONFIG_SND_SOC_ES8323=y
@ -2715,6 +2757,7 @@ CONFIG_SND_SOC_MAX98090=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK312X is not set
# CONFIG_SND_SOC_RK3228 is not set
# CONFIG_SND_SOC_RK3308 is not set
# CONFIG_SND_SOC_RK3328 is not set
# CONFIG_SND_SOC_RK817 is not set
CONFIG_SND_SOC_RL6231=y
@ -3061,7 +3104,6 @@ CONFIG_USB_EZUSB_FX2=y
# CONFIG_USB_PHY is not set
# CONFIG_USB_OTG_WAKELOCK is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_AM335X_PHY_USB is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_ULPI is not set
@ -3255,6 +3297,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_FAKE is not set
CONFIG_RTC_DRV_HYM8563=y
# CONFIG_RTC_DRV_MAX6900 is not set
CONFIG_RTC_DRV_RK808=y
@ -3518,15 +3561,11 @@ CONFIG_COMMON_CLK_RK808=y
#
CONFIG_CLKSRC_OF=y
CONFIG_CLKSRC_PROBE=y
CONFIG_DW_APB_TIMER=y
CONFIG_DW_APB_TIMER_OF=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y
CONFIG_ARM_GLOBAL_TIMER=y
# CONFIG_ARM_TIMER_SP804 is not set
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
# CONFIG_ATMEL_PIT is not set
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
@ -3560,13 +3599,31 @@ CONFIG_ROCKCHIP_IOMMU=y
# SOC (System On Chip) specific Drivers
#
# CONFIG_SOC_BRCMSTB is not set
#
# CPU selection
#
# CONFIG_CPU_RK312X is not set
# CONFIG_CPU_RK3036 is not set
# CONFIG_CPU_RK30XX is not set
# CONFIG_CPU_RK3188 is not set
CONFIG_CPU_RK3288=y
# CONFIG_CPU_RK322X is not set
# CONFIG_CPU_RV110X is not set
# CONFIG_CPU_PX30 is not set
# CONFIG_CPU_RK3308 is not set
# CONFIG_CPU_RK3328 is not set
# CONFIG_CPU_RK3366 is not set
# CONFIG_CPU_RK3368 is not set
# CONFIG_CPU_RK3399 is not set
CONFIG_ANDROID_VERSION=0x07010000
CONFIG_ROCKCHIP_CPUINFO=y
# CONFIG_ROCKCHIP_DEVICEINFO is not set
# CONFIG_ROCKCHIP_PM_TEST is not set
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
# CONFIG_ROCKCHIP_PVTM is not set
CONFIG_ROCKCHIP_PVTM=y
CONFIG_ROCKCHIP_SUSPEND_MODE=y
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
CONFIG_PM_DEVFREQ=y
@ -3582,6 +3639,7 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
#
# DEVFREQ Drivers
#
CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y
CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
@ -3745,6 +3803,7 @@ CONFIG_SENSORS_TSL2563=y
# CONFIG_TSL4531 is not set
# CONFIG_US5182D is not set
# CONFIG_VCNL4000 is not set
# CONFIG_VL6180 is not set
#
# Magnetometer sensors
@ -3804,8 +3863,10 @@ CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_CROS_EC is not set
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_GPIO=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
# CONFIG_PWM_ROCKCHIP_I2S is not set
CONFIG_IRQCHIP=y
CONFIG_ARM_GIC=y
# CONFIG_IPACK_BUS is not set
@ -3824,7 +3885,7 @@ CONFIG_GENERIC_PHY=y
CONFIG_PHY_ROCKCHIP_USB=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_INNO_USB3 is not set
# CONFIG_PHY_ROCKCHIP_EMMC is not set
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_DP=y
# CONFIG_PHY_ROCKCHIP_INNO_MIPI_DPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_HDMI_PHY is not set
@ -3846,6 +3907,7 @@ CONFIG_ANDROID=y
# CONFIG_ANDROID_BINDER_IPC is not set
CONFIG_NVMEM=y
CONFIG_ROCKCHIP_EFUSE=y
CONFIG_ROCKCHIP_OTP=y
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
@ -3854,6 +3916,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FPGA is not set
# CONFIG_TEE is not set
# CONFIG_RK_FLASH is not set
# CONFIG_RK_NAND is not set
#
@ -3866,7 +3929,7 @@ CONFIG_ROCKCHIP_EFUSE=y
#
# CONFIG_FIRMWARE_MEMMAP is not set
CONFIG_HAVE_ARM_SMCCC=y
# CONFIG_ROCKCHIP_SIP is not set
CONFIG_ROCKCHIP_SIP=y
#
# File systems
@ -3964,6 +4027,7 @@ CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_PROC_UID=y
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
@ -3993,6 +4057,7 @@ CONFIG_SQUASHFS_ZLIB=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_SQUASHFS_ZSTD=y
# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
@ -4415,6 +4480,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SPECK is not set
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
@ -4446,6 +4512,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y
# CONFIG_CRYPTO_USER_API_AEAD is not set
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_PUBLIC_KEY_ALGO_RSA=y
@ -4487,13 +4554,16 @@ CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
# CONFIG_CRC8 is not set
CONFIG_XXHASH=y
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_COMPRESS=m
CONFIG_LZO_DECOMPRESS=y
CONFIG_LZ4_COMPRESS=m
CONFIG_LZ4_DECOMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set

287
projects/Rockchip/devices/TinkerBoard/patches/linux/rockchip-4.4/linux-0001-miniarm.patch
View File

@ -1,287 +0,0 @@
From f490b48f29fb0b976b7f3d749f14dd4bbb95705a Mon Sep 17 00:00:00 2001
From: Ziyuan Xu <xzy.xu@rock-chips.com>
Date: Fri, 23 Sep 2016 13:43:18 +0800
Subject: [PATCH] MINIARM: HACK: switch vccio_sd to 3.3v while shutdowning
Change-Id: I80d6d2b61b31f16b6b42b9ffcaab077231a7a91c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
---
drivers/mmc/host/dw_mmc-rockchip.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 29e3ae99edbc..531ad93ff912 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -13,6 +13,7 @@
#include <linux/mmc/host.h>
#include <linux/mmc/dw_mmc.h>
#include <linux/of_address.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include "dw_mmc.h"
@@ -285,6 +286,15 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
return dw_mci_pltfm_register(pdev, drv_data);
}
+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
+{
+ struct dw_mci *host = platform_get_drvdata(pdev);
+ struct mmc_host *mmc = host->cur_slot->mmc;
+
+ if (!IS_ERR(mmc->supply.vqmmc))
+ regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
+}
+
#ifdef CONFIG_PM_SLEEP
static int dw_mci_rockchip_suspend(struct device *dev)
{
@@ -308,6 +318,7 @@ static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops,
static struct platform_driver dw_mci_rockchip_pltfm_driver = {
.probe = dw_mci_rockchip_probe,
.remove = dw_mci_pltfm_remove,
+ .shutdown = dw_mci_rockchip_platfm_shutdown,
.driver = {
.name = "dwmmc_rockchip",
.of_match_table = dw_mci_rockchip_match,
From dcd64488045c2c7b54f4257a0f5e6d56f93f28f6 Mon Sep 17 00:00:00 2001
From: Ziyuan Xu <xzy.xu@rock-chips.com>
Date: Mon, 6 Feb 2017 08:39:46 +0800
Subject: [PATCH] MINIARM: HACK: mmc: dw_mmc-rockchip: enable vmmc supply for
reboot
Mmc core has already power off the vmmc since shutdown, re-enable it so
that card is active in next reboot.
Change-Id: Id64ed02844db9d834c820ed5b8c5bf7a0afe4ed5
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
---
drivers/mmc/host/dw_mmc-rockchip.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index 531ad93ff912..eae304077e17 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -15,6 +15,7 @@
#include <linux/of_address.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
@@ -290,6 +291,12 @@ static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
{
struct dw_mci *host = platform_get_drvdata(pdev);
struct mmc_host *mmc = host->cur_slot->mmc;
+ int ret;
+
+ mdelay(20);
+
+ if (!IS_ERR(mmc->supply.vmmc))
+ ret = regulator_enable(mmc->supply.vmmc);
if (!IS_ERR(mmc->supply.vqmmc))
regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
From 6947d06a6b9bccb4fca863cb40638b3cdf487fa8 Mon Sep 17 00:00:00 2001
From: Jacob Chen <jacob-chen@iotwrt.com>
Date: Sat, 22 Jul 2017 19:55:09 +0800
Subject: [PATCH] MINIARM: drm/rockchip: update phy settings
Change-Id: I9e92a4191115e13999183a5d7656d6708adda632
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index bdc96cd4253d..cea7b9d6bdb3 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -347,8 +347,7 @@ static struct dw_hdmi_phy_config rockchip_phy_config[] = {
/*pixelclk symbol term vlev*/
{ 74250000, 0x8009, 0x0004, 0x0272},
{ 165000000, 0x802b, 0x0004, 0x0209},
- { 297000000, 0x8039, 0x0005, 0x028d},
- { 594000000, 0x8039, 0x0000, 0x019d},
+ { 297000000, 0x802d, 0x0001, 0x0149},
{ ~0UL, 0x0000, 0x0000, 0x0000}
};
From 8b96d29710578f258442bb7975581e30c5c1a209 Mon Sep 17 00:00:00 2001
From: Nickey Yang <nickey.yang@rock-chips.com>
Date: Mon, 17 Jul 2017 16:35:34 +0800
Subject: [PATCH] MINIARM: set npll be used for hdmi only
Change-Id: I8bebfb2cfb68e3dad172e5547d3886526ad5e912
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
---
arch/arm/boot/dts/rk3288.dtsi | 4 +++-
drivers/clk/rockchip/clk-rk3288.c | 6 +++---
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index b37d1954d27c..904a7955e347 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1027,7 +1027,7 @@
<&cru PCLK_PERI>;
assigned-clock-rates = <594000000>,
<500000000>, <300000000>,
- <150000000>, <75000000>,
+ <0>, <75000000>,
<300000000>, <150000000>,
<75000000>;
};
@@ -1265,6 +1265,8 @@
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
reset-names = "axi", "ahb", "dclk";
iommus = <&vopb_mmu>;
+ assigned-clocks = <&cru DCLK_VOP0>;
+ assigned-clock-parents = <&cru PLL_NPLL>;
status = "disabled";
vopb_out: port {
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 4adbace24ff7..9df15059d584 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -211,9 +211,9 @@ static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = {
[cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8),
RK3288_MODE_CON, 8, 7, 0, rk3288_pll_rates),
[gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
- RK3288_MODE_CON, 12, 8, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
+ RK3288_MODE_CON, 12, 8, 0, rk3288_pll_rates),
[npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
- RK3288_MODE_CON, 14, 9, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
+ RK3288_MODE_CON, 14, 9, 0, rk3288_pll_rates),
};
static struct clk_div_table div_hclk_cpu_t[] = {
@@ -428,7 +428,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(3), 4, GFLAGS),
- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
RK3288_CLKGATE_CON(3), 1, GFLAGS),
COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
From 07d84a3e6f43def7af179d417224a610ca7aaf98 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 11 Dec 2017 23:09:54 +0100
Subject: [PATCH] clk: rockchip: rk3288: add more pixel clock rates
---
drivers/clk/rockchip/clk-rk3288.c | 79 +++++++++++++++++++++++++++++++++++++--
1 file changed, 75 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 9df15059d584..e1f3bd273a58 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -84,23 +84,94 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
RK3066_PLL_RATE( 742500000, 8, 495, 2),
RK3066_PLL_RATE( 696000000, 1, 58, 2),
RK3066_PLL_RATE( 600000000, 1, 50, 2),
- RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1),
+ RK3066_PLL_RATE( 594000000, 2, 99, 2),
+ RK3066_PLL_RATE( 552750000, 16, 737, 2),
RK3066_PLL_RATE( 552000000, 1, 46, 2),
+ RK3066_PLL_RATE( 505250000, 24, 2021, 4),
RK3066_PLL_RATE( 504000000, 1, 84, 4),
RK3066_PLL_RATE( 500000000, 3, 125, 2),
RK3066_PLL_RATE( 456000000, 1, 76, 4),
+ RK3066_PLL_RATE( 443250000, 8, 591, 4),
RK3066_PLL_RATE( 408000000, 1, 68, 4),
RK3066_PLL_RATE( 400000000, 3, 100, 2),
RK3066_PLL_RATE( 384000000, 2, 128, 4),
+ RK3066_PLL_RATE( 380500000, 12, 761, 4),
RK3066_PLL_RATE( 360000000, 1, 60, 4),
+ RK3066_PLL_RATE( 356500000, 8, 713, 6),
+ RK3066_PLL_RATE( 348500000, 8, 697, 6),
+ RK3066_PLL_RATE( 333250000, 16, 1333, 6),
+ RK3066_PLL_RATE( 317000000, 4, 317, 6),
+ RK3066_PLL_RATE( 312250000, 16, 1249, 6),
RK3066_PLL_RATE( 312000000, 1, 52, 4),
RK3066_PLL_RATE( 300000000, 1, 50, 4),
- RK3066_PLL_RATE( 297000000, 2, 198, 8),
+ RK3066_PLL_RATE( 297000000, 4, 297, 6),
+ RK3066_PLL_RATE( 288000000, 1, 72, 6),
+ RK3066_PLL_RATE( 281250000, 16, 1125, 6),
+ RK3066_PLL_RATE( 268500000, 2, 179, 8),
+ RK3066_PLL_RATE( 268250000, 12, 1073, 8),
+ RK3066_PLL_RATE( 261000000, 1, 87, 8),
RK3066_PLL_RATE( 252000000, 1, 84, 8),
+ RK3066_PLL_RATE( 245500000, 6, 491, 8),
+ RK3066_PLL_RATE( 245250000, 4, 327, 8),
+ RK3066_PLL_RATE( 241500000, 2, 161, 8),
+ RK3066_PLL_RATE( 234000000, 1, 78, 8),
+ RK3066_PLL_RATE( 229500000, 2, 153, 8),
+ RK3066_PLL_RATE( 218250000, 16, 1455, 10),
RK3066_PLL_RATE( 216000000, 1, 72, 8),
- RK3066_PLL_RATE( 148500000, 2, 99, 8),
+ RK3066_PLL_RATE( 214750000, 12, 859, 8),
+ RK3066_PLL_RATE( 208000000, 3, 260, 10),
+ RK3066_PLL_RATE( 204750000, 16, 1365, 10),
+ RK3066_PLL_RATE( 202500000, 8, 675, 10),
+ RK3066_PLL_RATE( 193250000, 48, 3865, 10),
+ RK3066_PLL_RATE( 189000000, 4, 315, 10),
+ RK3066_PLL_RATE( 187250000, 48, 3745, 10),
+ RK3066_PLL_RATE( 187000000, 12, 935, 10),
+ RK3066_PLL_RATE( 182750000, 8, 731, 12),
+ RK3066_PLL_RATE( 179500000, 4, 359, 12),
+ RK3066_PLL_RATE( 175500000, 4, 351, 12),
+ RK3066_PLL_RATE( 162000000, 1, 81, 12),
+ RK3066_PLL_RATE( 157500000, 4, 315, 12),
+ RK3066_PLL_RATE( 157000000, 12, 1099, 14),
+ RK3066_PLL_RATE( 156750000, 16, 1463, 14),
+ RK3066_PLL_RATE( 156000000, 1, 91, 14),
+ RK3066_PLL_RATE( 154000000, 6, 539, 14),
+ RK3066_PLL_RATE( 148500000, 8, 693, 14),
+ RK3066_PLL_RATE( 148250000, 8, 593, 12),
+ RK3066_PLL_RATE( 146250000, 16, 1365, 14),
+ RK3066_PLL_RATE( 140250000, 16, 1309, 14),
+ RK3066_PLL_RATE( 136750000, 6, 547, 16),
+ RK3066_PLL_RATE( 135000000, 1, 90, 16),
RK3066_PLL_RATE( 126000000, 1, 84, 16),
- RK3066_PLL_RATE( 48000000, 1, 64, 32),
+ RK3066_PLL_RATE( 122500000, 3, 245, 16),
+ RK3066_PLL_RATE( 121750000, 6, 487, 16),
+ RK3066_PLL_RATE( 119000000, 3, 238, 16),
+ RK3066_PLL_RATE( 117500000, 3, 235, 16),
+ RK3066_PLL_RATE( 115500000, 1, 77, 16),
+ RK3066_PLL_RATE( 108000000, 1, 72, 16),
+ RK3066_PLL_RATE( 106500000, 1, 71, 16),
+ RK3066_PLL_RATE( 102250000, 6, 409, 16),
+ RK3066_PLL_RATE( 101000000, 3, 202, 16),
+ RK3066_PLL_RATE( 94500000, 1, 63, 16),
+ RK3066_PLL_RATE( 88750000, 6, 355, 16),
+ RK3066_PLL_RATE( 85500000, 1, 57, 16),
+ RK3066_PLL_RATE( 83500000, 3, 167, 16),
+ RK3066_PLL_RATE( 79500000, 1, 53, 16),
+ RK3066_PLL_RATE( 78750000, 2, 105, 16),
+ RK3066_PLL_RATE( 75000000, 1, 50, 16),
+ RK3066_PLL_RATE( 74250000, 2, 99, 16),
+ RK3066_PLL_RATE( 73250000, 6, 293, 16),
+ RK3066_PLL_RATE( 72000000, 1, 48, 16),
+ RK3066_PLL_RATE( 71000000, 3, 142, 16),
+ RK3066_PLL_RATE( 68250000, 2, 91, 16),
+ RK3066_PLL_RATE( 65000000, 3, 130, 16),
+ RK3066_PLL_RATE( 56250000, 2, 75, 16),
+ RK3066_PLL_RATE( 50000000, 3, 100, 16),
+ RK3066_PLL_RATE( 49500000, 1, 33, 16),
+ RK3066_PLL_RATE( 40000000, 3, 80, 16),
+ RK3066_PLL_RATE( 36000000, 1, 24, 16),
+ RK3066_PLL_RATE( 35500000, 3, 71, 16),
+ RK3066_PLL_RATE( 33750000, 2, 45, 16),
+ RK3066_PLL_RATE( 31500000, 1, 21, 16),
{ /* sentinel */ },
};

834
projects/Rockchip/patches/linux/rockchip-4.4/linux-0001-rockchip.patch
View File

File diff suppressed because it is too large Load Diff

202
projects/Rockchip/patches/linux/rockchip-4.4/linux-0002-ir.patch
View File

@ -1,4 +1,4 @@
From abd68c63a163f8cd1efb40087f6a8569fafe7d64 Mon Sep 17 00:00:00 2001
From 65d921fb8b2ec126c5e1ff2b846c179d0ab0e4d1 Mon Sep 17 00:00:00 2001
From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Date: Thu, 19 Nov 2015 11:41:36 -0200
Subject: [PATCH] UPSTREAM: smsir.h: remove a now duplicated definition
@ -26,7 +26,7 @@ index fc8b7925c532..d9abd96ef48b 100644
struct ir_t {
From 8fcf408f26690b403ea41a34c419a7cf25430b4f Mon Sep 17 00:00:00 2001
From 3e5e8aa798a67f94158f7fbdfca9b31021ffab90 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 6 Sep 2017 18:39:09 +0200
Subject: [PATCH] [media] rc/keymaps: add keytable for Pine64 IR Remote
@ -135,7 +135,7 @@ index 7c4bbc4dfab4..3a34a9631dd1 100644
#define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey"
#define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd"
From 3b5e2f781693301e6ba4b3d9dcfc23f05402251c Mon Sep 17 00:00:00 2001
From 8eab80060ab0c45ed3843ea1ab1d355c2e61c417 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 6 Sep 2017 18:39:09 +0200
Subject: [PATCH] [media] rc/keymaps: add keytable for ODROID IR Remote
@ -231,7 +231,7 @@ index 3a34a9631dd1..f1badbfbca90 100644
#define RC_MAP_PINE64 "rc-pine64"
#define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color"
From b78470cab538b641350de506371924b48c19455e Mon Sep 17 00:00:00 2001
From e4e4bf0e4ffdf3715d29ce0fdc40ac4942b0b509 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 6 Sep 2017 18:39:09 +0200
Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Hub Remote
@ -327,7 +327,7 @@ index f1badbfbca90..cd8590c99e22 100644
#define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
#define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr"
From 03250f10b133c09eb0d8793b89afe760572c1f9e Mon Sep 17 00:00:00 2001
From c603eb8c844555707072415329d7bb2572d64fdf Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 6 Sep 2017 18:39:09 +0200
Subject: [PATCH] [media] rc/keymaps: add keytable for WeTek Play 2 Remote
@ -453,3 +453,195 @@ index cd8590c99e22..93cac05a5170 100644
#define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"
#define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
#define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr"
From 6c88a757042bd1f3ea3ec197aa930b7beb48e11a Mon Sep 17 00:00:00 2001
From: hzq <hzq@t-firefly.com>
Date: Mon, 19 Mar 2018 16:47:24 +0800
Subject: [PATCH] [media] rc/keymaps: add keytable for ROC-RK3328-CC Remote
Controller
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-roc-cc.c | 52 ++++++++++++++++++++++++++++++++++++
include/media/rc-map.h | 1 +
3 files changed, 54 insertions(+)
create mode 100644 drivers/media/rc/keymaps/rc-roc-cc.c
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index 650481039f00..b743914487a5 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -83,6 +83,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-rc6-mce.o \
rc-real-audio-220-32-keys.o \
rc-reddo.o \
+ rc-roc-cc.o \
rc-snapstream-firefly.o \
rc-streamzap.o \
rc-tbs-nec.o \
diff --git a/drivers/media/rc/keymaps/rc-roc-cc.c b/drivers/media/rc/keymaps/rc-roc-cc.c
new file mode 100644
index 000000000000..3a2a255d5723
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-roc-cc.c
@@ -0,0 +1,52 @@
+/* Keytable for ROC-RK3328-CC IR Remote Controller
+ *
+ * Copyright (c) 2017 ROC-RK3328-CC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+static struct rc_map_table roc_cc[] = {
+ { 0x28d7, KEY_POWER },
+ { 0xc837, KEY_MUTE },
+ { 0xe01f, KEY_ENTER},
+ { 0xc03f, KEY_UP },
+ { 0x40bf, KEY_DOWN },
+ { 0x708f, KEY_LEFT },
+ { 0x58a7, KEY_RIGHT },
+ { 0x1ae5, KEY_VOLUMEDOWN },
+ { 0xd02f, KEY_VOLUMEUP },
+ { 0x3ac5, KEY_WWW },
+ { 0x807f, KEY_BACK },
+ { 0x12ed, KEY_HOME },
+};
+
+static struct rc_map_list roc_cc_map = {
+ .map = {
+ .scan = roc_cc,
+ .size = ARRAY_SIZE(roc_cc),
+ .rc_type = RC_TYPE_NEC,
+ .name = RC_MAP_ROC_CC,
+ }
+};
+
+static int __init init_rc_map_roc_cc(void)
+{
+ return rc_map_register(&roc_cc_map);
+}
+
+static void __exit exit_rc_map_roc_cc(void)
+{
+ rc_map_unregister(&roc_cc_map);
+}
+
+module_init(init_rc_map_roc_cc)
+module_exit(exit_rc_map_roc_cc)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("ROC-RK3328-CC");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index 93cac05a5170..8bbe335e650c 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -191,6 +191,7 @@ void rc_map_init(void);
#define RC_MAP_RC6_MCE "rc-rc6-mce"
#define RC_MAP_REAL_AUDIO_220_32_KEYS "rc-real-audio-220-32-keys"
#define RC_MAP_REDDO "rc-reddo"
+#define RC_MAP_ROC_CC "rc-roc-cc"
#define RC_MAP_SNAPSTREAM_FIREFLY "rc-snapstream-firefly"
#define RC_MAP_STREAMZAP "rc-streamzap"
#define RC_MAP_TBS_NEC "rc-tbs-nec"
From 04a93492c4c715a6a826c93f69e0855ca5534e81 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 3 Jul 2018 21:55:56 +0200
Subject: [PATCH] [media] rc/keymaps: add keytable for T-Chip TRN9 IR Remote
Controller
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-trn9.c | 52 ++++++++++++++++++++++++++++++++++++++
include/media/rc-map.h | 1 +
3 files changed, 54 insertions(+)
create mode 100644 drivers/media/rc/keymaps/rc-trn9.c
diff --git a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
index b743914487a5..2aaa1b33ddca 100644
--- a/drivers/media/rc/keymaps/Makefile
+++ b/drivers/media/rc/keymaps/Makefile
@@ -102,6 +102,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
rc-tt-1500.o \
rc-twinhan-dtv-cab-ci.o \
rc-twinhan1027.o \
+ rc-trn9.o \
rc-wetek-hub.o \
rc-wetek-play-2.o \
rc-videomate-m1f.o \
diff --git a/drivers/media/rc/keymaps/rc-trn9.c b/drivers/media/rc/keymaps/rc-trn9.c
new file mode 100644
index 000000000000..f81bc3a419b3
--- /dev/null
+++ b/drivers/media/rc/keymaps/rc-trn9.c
@@ -0,0 +1,52 @@
+/* Keytable for T-Chip TRN9 IR Remote Controller
+ *
+ * Copyright (c) 2018 Omegamoon
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <media/rc-map.h>
+#include <linux/module.h>
+
+static struct rc_map_table trn9[] = {
+ { 0x0014, KEY_POWER },
+ { 0x0013, KEY_MENU },
+ { 0x0003, KEY_UP },
+ { 0x0002, KEY_DOWN },
+ { 0x000e, KEY_LEFT },
+ { 0x001a, KEY_RIGHT },
+ { 0x0007, KEY_OK },
+ { 0x0058, KEY_VOLUMEDOWN },
+ { 0x005c, KEY_MUTE },
+ { 0x000b, KEY_VOLUMEUP },
+ { 0x0001, KEY_BACK },
+ { 0x0048, KEY_HOME },
+};
+
+static struct rc_map_list trn9_map = {
+ .map = {
+ .scan = trn9,
+ .size = ARRAY_SIZE(trn9),
+ .rc_type = RC_TYPE_NEC,
+ .name = RC_MAP_TRN9,
+ }
+};
+
+static int __init init_rc_map_trn9(void)
+{
+ return rc_map_register(&trn9_map);
+}
+
+static void __exit exit_rc_map_trn9(void)
+{
+ rc_map_unregister(&trn9_map);
+}
+
+module_init(init_rc_map_trn9)
+module_exit(exit_rc_map_trn9)
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Omegamoon");
diff --git a/include/media/rc-map.h b/include/media/rc-map.h
index 8bbe335e650c..66e1c50b38fc 100644
--- a/include/media/rc-map.h
+++ b/include/media/rc-map.h
@@ -210,6 +210,7 @@ void rc_map_init(void);
#define RC_MAP_TT_1500 "rc-tt-1500"
#define RC_MAP_TWINHAN_DTV_CAB_CI "rc-twinhan-dtv-cab-ci"
#define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027"
+#define RC_MAP_TRN9 "rc-trn9"
#define RC_MAP_WETEK_HUB "rc-wetek-hub"
#define RC_MAP_WETEK_PLAY_2 "rc-wetek-play-2"
#define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"

32
projects/Rockchip/patches/linux/rockchip-4.4/linux-0003-cec.patch
View File

@ -1,4 +1,4 @@
From 830aaed8ea116ecac827f830729f1d57f96ac22e Mon Sep 17 00:00:00 2001
From dbd999a2a4e11f420098860e84bfb3c9151b4622 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 4 Sep 2017 22:34:19 +0200
Subject: [PATCH] BACKPORT: HDMI CEC support from v4.15
@ -2392,10 +2392,10 @@ index 000000000000..bdad4b197bcd
+ERESTARTSYS
+ The wait for a successful transmit was interrupted (e.g. by Ctrl-C).
diff --git a/MAINTAINERS b/MAINTAINERS
index b88e249026a1..bb1aa323019c 100644
index 443bc975b562..225ab2c1d35b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2657,6 +2657,22 @@ F: drivers/net/ieee802154/cc2520.c
@@ -2674,6 +2674,22 @@ F: drivers/net/ieee802154/cc2520.c
F: include/linux/spi/cc2520.h
F: Documentation/devicetree/bindings/net/ieee802154/cc2520.txt
@ -2781,7 +2781,7 @@ index 3f0f71adabb4..a639ea653c7e 100644
/**
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index dcf26537c935..1957c340878d 100644
index a52ca5cba015..b0b96fc01da3 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -57,6 +57,7 @@
@ -3041,7 +3041,7 @@ index 2758687300b4..41e8dff588e1 100644
/*
* MT_TOOL types
From d97e3abed49306c25ac724841c21c4705c55a6ea Mon Sep 17 00:00:00 2001
From 48d7f1f5bd8f2a2252158e7eda0d83975d7b170b Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 4 Sep 2017 22:34:22 +0200
Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15
@ -3061,10 +3061,10 @@ Subject: [PATCH] BACKPORT: Pulse Eight HDMI CEC from v4.15
create mode 100644 drivers/media/usb/pulse8-cec/pulse8-cec.c
diff --git a/MAINTAINERS b/MAINTAINERS
index bb1aa323019c..3ba807edf5c6 100644
index 225ab2c1d35b..0c1232c326a5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8637,6 +8637,13 @@ F: include/linux/tracehook.h
@@ -8673,6 +8673,13 @@ F: include/linux/tracehook.h
F: include/uapi/linux/ptrace.h
F: kernel/ptrace.c
@ -3944,7 +3944,7 @@ index becdd78295cc..4588c66a8df0 100644
#endif /* _UAPI_SERIO_H */
From 6af6d21e67410357403b1f99082ab2c825044657 Mon Sep 17 00:00:00 2001
From c9a3bba3534d8673f07a233e5298d12979ada5b8 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 4 Sep 2017 22:34:24 +0200
Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15
@ -3963,10 +3963,10 @@ Subject: [PATCH] BACKPORT: RainShadow Tech HDMI CEC from v4.15
create mode 100644 drivers/media/usb/rainshadow-cec/rainshadow-cec.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 3ba807edf5c6..c6413ddaa627 100644
index 0c1232c326a5..551555a162c3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8876,6 +8876,13 @@ L: linux-fbdev@vger.kernel.org
@@ -8912,6 +8912,13 @@ L: linux-fbdev@vger.kernel.org
S: Maintained
F: drivers/video/fbdev/aty/aty128fb.c
@ -4427,7 +4427,7 @@ index 4588c66a8df0..89b72003fb68 100644
#endif /* _UAPI_SERIO_H */
From 4ceffb68390fda7643be488544dc25e439bc164d Mon Sep 17 00:00:00 2001
From d7ef718f1c62b9f4e0b7042d5b4040a14335c369 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 2 Sep 2017 16:23:11 +0200
Subject: [PATCH] [media] rc/keymaps: initialize rc-cec early
@ -4450,7 +4450,7 @@ index 354c8e724b8e..fb0c2b1f3814 100644
MODULE_LICENSE("GPL");
From 3365306ff585f94071383606546cd0f0000c1bb3 Mon Sep 17 00:00:00 2001
From e583e082ee42c04d3458ee71521175d39b4daed5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 2 Sep 2017 16:23:11 +0200
Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event
@ -4460,10 +4460,10 @@ Subject: [PATCH] drm/bridge: dw-hdmi: read edid on hpd event
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index a7f2e381a5bd..b98a1c828657 100644
index d57d999c50a5..4ae2735f59e4 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2465,6 +2465,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge)
@@ -2479,6 +2479,7 @@ static void dw_hdmi_bridge_nop(struct drm_bridge *bridge)
static enum drm_connector_status
dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
{
@ -4471,7 +4471,7 @@ index a7f2e381a5bd..b98a1c828657 100644
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
connector);
@@ -2474,7 +2475,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
@@ -2488,7 +2489,24 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
dw_hdmi_update_phy_mask(hdmi);
mutex_unlock(&hdmi->mutex);
@ -4497,7 +4497,7 @@ index a7f2e381a5bd..b98a1c828657 100644
}
static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
@@ -2867,9 +2885,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
@@ -2891,9 +2909,6 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
dw_hdmi_update_phy_mask(hdmi);
}
mutex_unlock(&hdmi->mutex);

372
projects/Rockchip/patches/linux/rockchip-4.4/linux-0004-audio.patch
View File

@ -1,4 +1,4 @@
From d2ee02d81c40aef4fdf0278bd0dc529a1793af79 Mon Sep 17 00:00:00 2001
From dabace918ba0543c5a12e03fb823886891cd82dc Mon Sep 17 00:00:00 2001
From: Chris Zhong <zyw@rock-chips.com>
Date: Mon, 18 Jul 2016 22:34:34 +0800
Subject: [PATCH] UPSTREAM: ASoC: rockchip: correct the spdif clk
@ -18,7 +18,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c
index 44b8c72e6a16..feaba2ad6022 100644
index c211750b54ee..784941ca2408 100644
--- a/sound/soc/rockchip/rockchip_spdif.c
+++ b/sound/soc/rockchip/rockchip_spdif.c
@@ -105,21 +105,7 @@ static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
@ -53,7 +53,7 @@ index 44b8c72e6a16..feaba2ad6022 100644
SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE |
SDPIF_CFGR_VDW_MASK,
From 2316686749dfb94a33efc7f9238319c050f2c2e2 Mon Sep 17 00:00:00 2001
From 3069a5725338532939d13e3dc329f2b3d183b260 Mon Sep 17 00:00:00 2001
From: Sugar Zhang <sugar.zhang@rock-chips.com>
Date: Wed, 7 Sep 2016 14:30:21 +0800
Subject: [PATCH] UPSTREAM: ASoC: rockchip: spdif: restore register during
@ -70,10 +70,10 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c
index feaba2ad6022..cac85a5538d5 100644
index 784941ca2408..831e4caf29d3 100644
--- a/sound/soc/rockchip/rockchip_spdif.c
+++ b/sound/soc/rockchip/rockchip_spdif.c
@@ -69,6 +69,7 @@ static int rk_spdif_runtime_suspend(struct device *dev)
@@ -69,6 +69,7 @@ static int __maybe_unused rk_spdif_runtime_suspend(struct device *dev)
{
struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
@ -81,7 +81,7 @@ index feaba2ad6022..cac85a5538d5 100644
clk_disable_unprepare(spdif->mclk);
clk_disable_unprepare(spdif->hclk);
@@ -92,7 +93,16 @@ static int rk_spdif_runtime_resume(struct device *dev)
@@ -92,7 +93,16 @@ static int __maybe_unused rk_spdif_runtime_resume(struct device *dev)
return ret;
}
@ -100,7 +100,7 @@ index feaba2ad6022..cac85a5538d5 100644
static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
From f7d622d11eba15ed1a68b8aedfd920ee4ba5ab12 Mon Sep 17 00:00:00 2001
From d852c659ff563456480c55cfea53c578399c04ff Mon Sep 17 00:00:00 2001
From: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Date: Tue, 3 Jan 2017 16:52:50 +0100
Subject: [PATCH] UPSTREAM: DRM: add help to get ELD speaker allocation
@ -148,7 +148,7 @@ index 85861b63e77a..55201e7e2ede 100644
int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
size_t len),
From a0dc556877d94de213dd9522af39156f0a5bfe2b Mon Sep 17 00:00:00 2001
From 4e08e72298c858a65950b98ca62613fb95cd0a35 Mon Sep 17 00:00:00 2001
From: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Date: Tue, 3 Jan 2017 16:52:51 +0100
Subject: [PATCH] UPSTREAM: ASoC: core: add optional pcm_new callback for DAI
@ -183,10 +183,10 @@ index 212eaaf172ed..345e4f8ee93f 100644
bool bus_control;
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 49263f3a50b0..c583022d7910 100644
index 3c6713da3ad9..e46e80c0e07d 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1277,6 +1277,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order)
@@ -1289,6 +1289,27 @@ static int soc_probe_dai(struct snd_soc_dai *dai, int order)
return 0;
}
@ -214,7 +214,7 @@ index 49263f3a50b0..c583022d7910 100644
static int soc_link_dai_widgets(struct snd_soc_card *card,
struct snd_soc_dai_link *dai_link,
struct snd_soc_pcm_runtime *rtd)
@@ -1388,6 +1409,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
@@ -1400,6 +1421,13 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order)
dai_link->stream_name, ret);
return ret;
}
@ -229,7 +229,7 @@ index 49263f3a50b0..c583022d7910 100644
INIT_DELAYED_WORK(&rtd->delayed_work,
codec2codec_close_delayed_work);
From 5c39a02d6f966de9f9f26a98a401c90651ebeb41 Mon Sep 17 00:00:00 2001
From 900f1d7bb2cddd1f445e0f3ef92fb0f7056a4c5a Mon Sep 17 00:00:00 2001
From: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Date: Tue, 3 Jan 2017 16:52:52 +0100
Subject: [PATCH] UPSTREAM: ASoC: hdmi-codec: add channel mapping control
@ -715,7 +715,7 @@ index 028d60c196ae..cb78d8971b41 100644
snd_soc_unregister_codec(&pdev->dev);
return 0;
From 4eb5c7bce96c6856f0e949e598bd9f8ec21d7b56 Mon Sep 17 00:00:00 2001
From 5ad6154eea74dec3635e2417f06ad12d3f0a36c4 Mon Sep 17 00:00:00 2001
From: Christophe Jaillet <christophe.jaillet@wanadoo.fr>
Date: Thu, 15 Jun 2017 07:53:11 +0200
Subject: [PATCH] UPSTREAM: ASoC: rockchip: Fix an error handling in
@ -734,7 +734,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 7687368779db..5a3436351efb 100644
index b359639c1038..02ff642499bf 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -658,12 +658,13 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
@ -756,7 +756,7 @@ index 7687368779db..5a3436351efb 100644
if (val >= 2 && val <= 8)
soc_dai->playback.channels_max = val;
From 3fd7ca46725a4a16a1a52530ac2421bc8e037088 Mon Sep 17 00:00:00 2001
From 9aeca2222a8f8a700c446fc9a38235ab2e3a4efd Mon Sep 17 00:00:00 2001
From: Markus Elfring <elfring@users.sourceforge.net>
Date: Thu, 10 Aug 2017 18:38:09 +0200
Subject: [PATCH] UPSTREAM: ASoC: rockchip: Delete an error message for a
@ -775,7 +775,7 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 5a3436351efb..1da10e79a1bb 100644
index 02ff642499bf..16ff8d5e0033 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -594,10 +594,8 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
@ -791,7 +791,7 @@ index 5a3436351efb..1da10e79a1bb 100644
i2s->dev = &pdev->dev;
From d6adb14ce27f7ef3687c6d965e781782329c790d Mon Sep 17 00:00:00 2001
From dad1bc0769692d7fd45701a4ab3fb55be012e01e Mon Sep 17 00:00:00 2001
From: John Keeping <john@metanate.com>
Date: Thu, 14 Sep 2017 16:58:55 +0100
Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix unbalanced clk_disable
@ -808,10 +808,10 @@ Signed-off-by: Mark Brown <broonie@kernel.org>
1 file changed, 1 deletion(-)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 1da10e79a1bb..f131dba7645d 100644
index 16ff8d5e0033..986ad2efc8e9 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -713,7 +713,6 @@ static int rockchip_i2s_remove(struct platform_device *pdev)
@@ -727,7 +727,6 @@ static int rockchip_i2s_remove(struct platform_device *pdev)
if (!pm_runtime_status_suspended(&pdev->dev))
i2s_runtime_suspend(&pdev->dev);
@ -820,77 +820,7 @@ index 1da10e79a1bb..f131dba7645d 100644
return 0;
From 2c4899311942a4aaf098faf513ac7200cbc71f11 Mon Sep 17 00:00:00 2001
From: Stefan Potyra <Stefan.Potyra@elektrobit.com>
Date: Wed, 6 Dec 2017 16:03:24 +0100
Subject: [PATCH] UPSTREAM: ASoC: rockchip: disable clock on error
Disable the clocks in rk_spdif_probe when an error occurs after one
of the clocks has been enabled previously.
Found by Linux Driver Verification project (linuxtesting.org).
Fixes: f874b80e1571 ASoC: rockchip: Add rockchip SPDIF transceiver driver
Signed-off-by: Stefan Potyra <Stefan.Potyra@elektrobit.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit c7b92172a61b91936be985cb9bc499a4ebc6489b)
---
sound/soc/rockchip/rockchip_spdif.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c
index cac85a5538d5..6ff8b195acf4 100644
--- a/sound/soc/rockchip/rockchip_spdif.c
+++ b/sound/soc/rockchip/rockchip_spdif.c
@@ -322,26 +322,30 @@ static int rk_spdif_probe(struct platform_device *pdev)
spdif->mclk = devm_clk_get(&pdev->dev, "mclk");
if (IS_ERR(spdif->mclk)) {
dev_err(&pdev->dev, "Can't retrieve rk_spdif master clock\n");
- return PTR_ERR(spdif->mclk);
+ ret = PTR_ERR(spdif->mclk);
+ goto err_disable_hclk;
}
ret = clk_prepare_enable(spdif->mclk);
if (ret) {
dev_err(spdif->dev, "clock enable failed %d\n", ret);
- return ret;
+ goto err_disable_clocks;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(regs))
- return PTR_ERR(regs);
+ if (IS_ERR(regs)) {
+ ret = PTR_ERR(regs);
+ goto err_disable_clocks;
+ }
spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs,
&rk_spdif_regmap_config);
if (IS_ERR(spdif->regmap)) {
dev_err(&pdev->dev,
"Failed to initialise managed register map\n");
- return PTR_ERR(spdif->regmap);
+ ret = PTR_ERR(spdif->regmap);
+ goto err_disable_clocks;
}
spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR;
@@ -373,6 +377,10 @@ static int rk_spdif_probe(struct platform_device *pdev)
err_pm_runtime:
pm_runtime_disable(&pdev->dev);
+err_disable_clocks:
+ clk_disable_unprepare(spdif->mclk);
+err_disable_hclk:
+ clk_disable_unprepare(spdif->hclk);
return ret;
}
From 4cc851cd3ae5216602422e85bde844f1ff0e592c Mon Sep 17 00:00:00 2001
From 20b260f46771f7313ecd6e296ec6c08a43967eb4 Mon Sep 17 00:00:00 2001
From: John Keeping <john@metanate.com>
Date: Mon, 8 Jan 2018 16:01:04 +0000
Subject: [PATCH] UPSTREAM: ASoC: rockchip: i2s: fix playback after runtime
@ -926,7 +856,7 @@ Signed-off-by: John Keeping <john@metanate.com>
1 file changed, 6 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index f131dba7645d..0b9bb973b5a7 100644
index 986ad2efc8e9..5297373fe6c4 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -514,6 +514,7 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg)
@ -957,7 +887,7 @@ index f131dba7645d..0b9bb973b5a7 100644
return false;
}
From 4d40b158d955d27eef520c49f221cd7ed31d9ae0 Mon Sep 17 00:00:00 2001
From fa8e48f2fd0abe00ee0f04128a2e9b4fed184c3f Mon Sep 17 00:00:00 2001
From: Romain Perier <romain.perier@collabora.com>
Date: Fri, 14 Apr 2017 10:31:12 +0200
Subject: [PATCH] UPSTREAM: drm: dw-hdmi: add specific I2S and AHB functions
@ -981,23 +911,24 @@ Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170414083113.4255-2-romain.perier@collabora.com
(cherry picked from commit a7d555d2f2bd675d641e742a202a5e4b37d4d019)
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 26 ++++++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 27 +++++++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index a7f2e381a5bd..da4340491fea 100644
index d57d999c50a5..0541d96be662 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -261,6 +261,8 @@ struct dw_hdmi {
void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
@@ -263,6 +263,9 @@ struct dw_hdmi {
u8 (*read)(struct dw_hdmi *hdmi, int offset);
bool initialized; /* hdmi is enabled before bind */
+
+ void (*enable_audio)(struct dw_hdmi *hdmi);
+ void (*disable_audio)(struct dw_hdmi *hdmi);
};
#define HDMI_IH_PHY_STAT0_RX_SENSE \
@@ -811,13 +813,29 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
@@ -821,13 +824,29 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
}
EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate);
@ -1028,7 +959,7 @@ index a7f2e381a5bd..da4340491fea 100644
spin_unlock_irqrestore(&hdmi->audio_lock, flags);
}
EXPORT_SYMBOL_GPL(dw_hdmi_audio_enable);
@@ -828,7 +846,8 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
@@ -838,7 +857,8 @@ void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
spin_lock_irqsave(&hdmi->audio_lock, flags);
hdmi->audio_enable = false;
@ -1038,7 +969,7 @@ index a7f2e381a5bd..da4340491fea 100644
spin_unlock_irqrestore(&hdmi->audio_lock, flags);
}
EXPORT_SYMBOL_GPL(dw_hdmi_audio_disable);
@@ -3677,6 +3696,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
@@ -3706,6 +3726,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
audio.irq = irq;
audio.hdmi = hdmi;
audio.eld = hdmi->connector.eld;
@ -1047,7 +978,7 @@ index a7f2e381a5bd..da4340491fea 100644
pdevinfo.name = "dw-hdmi-ahb-audio";
pdevinfo.data = &audio;
@@ -3690,6 +3711,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
@@ -3719,6 +3741,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
audio.write = hdmi_writeb;
audio.read = hdmi_readb;
audio.mod = hdmi_modb;
@ -1056,7 +987,7 @@ index a7f2e381a5bd..da4340491fea 100644
pdevinfo.name = "dw-hdmi-i2s-audio";
pdevinfo.data = &audio;
From 4ea3fd9308b3bc3b5e7699e4a52e3f7bca6e857e Mon Sep 17 00:00:00 2001
From f856228e8933ba1e6375dbda53cc59da8d71647a Mon Sep 17 00:00:00 2001
From: Romain Perier <romain.perier@collabora.com>
Date: Thu, 20 Apr 2017 14:34:34 +0530
Subject: [PATCH] UPSTREAM: drm: dw-hdmi: gate audio clock from the I2S
@ -1084,10 +1015,10 @@ Signed-off-by: Archit Taneja <architt@codeaurora.org>
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index da4340491fea..e1a5966ce394 100644
index 0541d96be662..f3a2034a0883 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -813,6 +813,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
@@ -824,6 +824,15 @@ void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
}
EXPORT_SYMBOL_GPL(dw_hdmi_set_sample_rate);
@ -1103,7 +1034,7 @@ index da4340491fea..e1a5966ce394 100644
static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
{
hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
@@ -826,6 +835,12 @@ static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi)
@@ -837,6 +846,12 @@ static void dw_hdmi_ahb_audio_disable(struct dw_hdmi *hdmi)
static void dw_hdmi_i2s_audio_enable(struct dw_hdmi *hdmi)
{
hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
@ -1116,7 +1047,7 @@ index da4340491fea..e1a5966ce394 100644
}
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
@@ -2138,12 +2153,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
@@ -2149,12 +2164,6 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
HDMI_MC_FLOWCTRL);
}
@ -1129,7 +1060,7 @@ index da4340491fea..e1a5966ce394 100644
/* Workaround to clear the overflow condition */
static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
{
@@ -2295,7 +2304,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
@@ -2306,7 +2315,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
/* HDMI Initialization Step E - Configure audio */
hdmi_clk_regenerator_update_pixel_clock(hdmi);
@ -1138,7 +1069,7 @@ index da4340491fea..e1a5966ce394 100644
}
/* not for DVI mode */
@@ -3712,6 +3721,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
@@ -3742,6 +3751,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
audio.read = hdmi_readb;
audio.mod = hdmi_modb;
hdmi->enable_audio = dw_hdmi_i2s_audio_enable;
@ -1147,7 +1078,7 @@ index da4340491fea..e1a5966ce394 100644
pdevinfo.name = "dw-hdmi-i2s-audio";
pdevinfo.data = &audio;
From df0540deb663a3d0b3852b88ded0817146f20e67 Mon Sep 17 00:00:00 2001
From 5736074e471dc5306e07581bf0958043cf434341 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 7 Aug 2017 22:24:15 +0200
Subject: [PATCH] drm: dw-hdmi-i2s: sync with upstream
@ -1226,7 +1157,7 @@ index f1f62d8c1d16..5ff993a35ab6 100644
.name = DRIVER_NAME,
.owner = THIS_MODULE,
From 8835208cc656c44c6c1238f637a428f6f5403bf4 Mon Sep 17 00:00:00 2001
From d2f29756df76806c12fa12b668aeb8ac5f626bdd Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 2 Apr 2017 11:33:39 +0200
Subject: [PATCH] drm: dw-hdmi-i2s: implement get_eld
@ -1283,10 +1214,10 @@ index 5ff993a35ab6..e7312571e2cb 100644
static int snd_dw_hdmi_probe(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index e1a5966ce394..605a55e3693d 100644
index f3a2034a0883..c222b6455f03 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3720,6 +3720,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
@@ -3750,6 +3750,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
audio.write = hdmi_writeb;
audio.read = hdmi_readb;
audio.mod = hdmi_modb;
@ -1295,7 +1226,7 @@ index e1a5966ce394..605a55e3693d 100644
hdmi->disable_audio = dw_hdmi_i2s_audio_disable;
From 572da20ab103a328f7b3afdb78c93fb62947ff78 Mon Sep 17 00:00:00 2001
From 18a9fcdb5cbde0462179d04336622cb4f97c2a7e Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 17 Apr 2017 13:09:16 +0200
Subject: [PATCH] drm: dw-hdmi-i2s: configure channel allocation
@ -1318,29 +1249,7 @@ index e7312571e2cb..1d4570e3fbed 100644
/* Set LFEPBLDOWN-MIX INH and LSV */
hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3);
From 1f19793a9437b295d7dfca822f511e487c47ef4a Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 2 May 2017 18:57:19 +0200
Subject: [PATCH] ASoC: hdmi-codec: fix I2S audio in Kodi
---
sound/soc/codecs/hdmi-codec.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index cb78d8971b41..9ebca57014e4 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -758,7 +758,6 @@ static struct snd_soc_dai_driver hdmi_i2s_dai = {
.channels_max = 8,
.rates = HDMI_RATES,
.formats = I2S_FORMATS,
- .sig_bits = 24,
},
.ops = &hdmi_dai_ops,
.pcm_new = hdmi_codec_pcm_new,
From 559c23102f957335d697de310dce921f72fff040 Mon Sep 17 00:00:00 2001
From c19ba12d08a8c491d21a1daf305b1b58231ca362 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 14 Aug 2017 00:14:05 +0200
Subject: [PATCH] ASoC: hdmi-codec: reorder channel map
@ -1350,7 +1259,7 @@ Subject: [PATCH] ASoC: hdmi-codec: reorder channel map
1 file changed, 52 insertions(+), 61 deletions(-)
diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c
index 9ebca57014e4..e65060ae8ffc 100644
index cb78d8971b41..b74659bc3bbc 100644
--- a/sound/soc/codecs/hdmi-codec.c
+++ b/sound/soc/codecs/hdmi-codec.c
@@ -205,78 +205,69 @@ const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
@ -1485,7 +1394,7 @@ index 9ebca57014e4..e65060ae8ffc 100644
struct hdmi_codec_priv {
From d6e589fc6c9211db345d667545f191e187640e41 Mon Sep 17 00:00:00 2001
From 0b22ce2a2766052fe28a3162623d19ba38adaef5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 27 Aug 2017 23:32:40 +0200
Subject: [PATCH] ASoC: codecs: rk3328: limit to working rates
@ -1513,20 +1422,109 @@ index af1b7429b6d4..d0b4578ffa0e 100644
SNDRV_PCM_FMTBIT_S20_3LE |
SNDRV_PCM_FMTBIT_S24_LE |
From 8f4b1d8cd40d4e052214c4abc200ab68f1a4bb78 Mon Sep 17 00:00:00 2001
From f96be8cf25bfda88d5c492f42e1f6ca5951356f3 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Mon, 14 Aug 2017 00:14:05 +0200
Date: Sun, 8 Jul 2018 12:34:43 +0200
Subject: [PATCH] drm: dw-hdmi: change audio config
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 9 ++-------
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 15 ++++++++++++---
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
index 1d4570e3fbed..d0904f6b7a82 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
@@ -110,8 +110,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
HDMI_AUD_INT_FIFO_FULL_MSK, HDMI_AUD_INT);
hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET,
HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
- hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK,
- HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
+ hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
switch (hparms->mode) {
case NLPCM:
@@ -193,11 +192,6 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
/* Set LFEPBLDOWN-MIX INH and LSV */
hdmi_write(audio, 0x00, HDMI_FC_AUDICONF3);
- hdmi_update_bits(audio, HDMI_AUD_CONF0_SW_RESET,
- HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
- hdmi_update_bits(audio, HDMI_MC_SWRSTZ_I2S_RESET_MSK,
- HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
-
dw_hdmi_audio_enable(hdmi);
return 0;
@@ -211,6 +205,7 @@ static void dw_hdmi_i2s_audio_shutdown(struct device *dev, void *data)
dw_hdmi_audio_disable(hdmi);
hdmi_write(audio, HDMI_AUD_CONF0_SW_RESET, HDMI_AUD_CONF0);
+ hdmi_write(audio, (u8)~HDMI_MC_SWRSTZ_I2S_RESET_MSK, HDMI_MC_SWRSTZ);
}
static int dw_hdmi_i2s_get_eld(struct device *dev, void *data, u8 *buf, size_t len)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 605a55e3693d..661b1259ebe0 100644
index c222b6455f03..065723179791 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -628,18 +628,14 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
@@ -89,6 +89,7 @@ static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = {
{ .tmds = 71000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
{ .tmds = 72000000, .n_32k = 4096, .n_44k1 = 5635, .n_48k = 6144, },
{ .tmds = 73250000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+ { .tmds = 74176000, .n_32k = 11648, .n_44k1 = 17836, .n_48k = 11648, },
{ .tmds = 74250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
{ .tmds = 75000000, .n_32k = 4096, .n_44k1 = 5880, .n_48k = 6144, },
{ .tmds = 78750000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
@@ -105,13 +106,16 @@ static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = {
{ .tmds = 119000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
{ .tmds = 135000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
{ .tmds = 146250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
- { .tmds = 148500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+ { .tmds = 148352000, .n_32k = 11648, .n_44k1 = 8918, .n_48k = 5824, },
+ { .tmds = 148500000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
{ .tmds = 154000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
{ .tmds = 162000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
/* For 297 MHz+ HDMI spec have some other rule for setting N */
- { .tmds = 297000000, .n_32k = 3073, .n_44k1 = 4704, .n_48k = 5120, },
- { .tmds = 594000000, .n_32k = 3073, .n_44k1 = 9408, .n_48k = 10240, },
+ { .tmds = 296703000, .n_32k = 5824, .n_44k1 = 4459, .n_48k = 5824, },
+ { .tmds = 297000000, .n_32k = 3072, .n_44k1 = 4704, .n_48k = 5120, },
+ { .tmds = 593407000, .n_32k = 5824, .n_44k1 = 8918, .n_48k = 5824, },
+ { .tmds = 594000000, .n_32k = 3072, .n_44k1 = 9408, .n_48k = 6144, },
/* End of table */
{ .tmds = 0, .n_32k = 0, .n_44k1 = 0, .n_48k = 0, },
@@ -831,6 +835,11 @@ static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi, bool enable)
else
hdmi->mc_clkdis |= HDMI_MC_CLKDIS_AUDCLK_DISABLE;
hdmi_writeb(hdmi, hdmi->mc_clkdis, HDMI_MC_CLKDIS);
+
+ if (enable) {
+ hdmi_set_cts_n(hdmi, 0, 0);
+ hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
+ }
}
static void dw_hdmi_ahb_audio_enable(struct dw_hdmi *hdmi)
From ed2e01d46f3bbf3eda4d37ce2a6e8874b15a478a Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 8 Jul 2018 12:56:51 +0200
Subject: [PATCH] WIP: drm: dw-hdmi: use Auto CTS mode
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 52 ++++++++++++++++++-------------
1 file changed, 31 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 065723179791..841bdfcae3e0 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -643,14 +643,18 @@ static struct i2c_adapter *dw_hdmi_i2c_adapter(struct dw_hdmi *hdmi)
static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
unsigned int n)
{
@ -1535,35 +1533,65 @@ index 605a55e3693d..661b1259ebe0 100644
-
- /* nshift factor = 0 */
- hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
+ hdmi_modb(hdmi, 0x80, 0x80, HDMI_AUD_N3);
hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
-
- hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
- HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+ /* Use Auto CTS mode with CTS is unknown */
+ if (cts) {
+ /* Must be set/cleared first */
+ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+
+ /* nshift factor = 0 */
+ hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
+
+ hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
+ HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+ } else
+ hdmi_writeb(hdmi, 0, HDMI_AUD_CTS3);
hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
- hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
+ hdmi_writeb(hdmi, ((n >> 16) & 0x0f) | 0x80, HDMI_AUD_N3);
hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
}
@@ -784,7 +780,7 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
@@ -777,24 +781,30 @@ static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
{
unsigned long ftdms = pixel_clk;
unsigned int n, cts;
+ u8 config3;
u64 tmp;
n = hdmi_find_n(hdmi, pixel_clk, sample_rate);
- /*
- * Compute the CTS value from the N value. Note that CTS and N
- * can be up to 20 bits in total, so we need 64-bit math. Also
- * note that our TDMS clock is not fully accurate; it is accurate
- * to kHz. This can introduce an unnecessary remainder in the
- * calculation below, so we don't try to warn about that.
- */
- tmp = (u64)ftdms * n;
- do_div(tmp, 128 * sample_rate);
- cts = tmp;
+ config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
- dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
- __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000,
- n, cts);
+ if (config3 & HDMI_CONFIG3_AHBAUDDMA) {
+ /*
+ * Compute the CTS value from the N value. Note that CTS and N
+ * can be up to 20 bits in total, so we need 64-bit math. Also
+ * note that our TDMS clock is not fully accurate; it is accurate
+ * to kHz. This can introduce an unnecessary remainder in the
+ * calculation below, so we don't try to warn about that.
+ */
+ tmp = (u64)ftdms * n;
+ do_div(tmp, 128 * sample_rate);
+ cts = tmp;
+
+ dev_dbg(hdmi->dev, "%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n",
+ __func__, sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000,
+ n, cts);
+ } else
+ cts = 0;
spin_lock_irq(&hdmi->audio_lock);
hdmi->audio_n = n;
hdmi->audio_cts = cts;
- hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
+ hdmi_set_cts_n(hdmi, cts, n);
spin_unlock_irq(&hdmi->audio_lock);
}
@@ -3721,8 +3717,8 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
audio.read = hdmi_readb;
audio.mod = hdmi_modb;
audio.eld = hdmi->connector.eld;
- hdmi->enable_audio = dw_hdmi_i2s_audio_enable;
- hdmi->disable_audio = dw_hdmi_i2s_audio_disable;
+ //hdmi->enable_audio = dw_hdmi_i2s_audio_enable;
+ //hdmi->disable_audio = dw_hdmi_i2s_audio_disable;
pdevinfo.name = "dw-hdmi-i2s-audio";
pdevinfo.data = &audio;

3461
projects/Rockchip/patches/linux/rockchip-4.4/linux-0005-dts.patch
View File

File diff suppressed because it is too large Load Diff

24
projects/Rockchip/patches/linux/rockchip-4.4/linux-0006-rtl8211f.patch
View File

@ -1,4 +1,4 @@
From 7894722c99f2be6806a245c2db1c0df61e890096 Mon Sep 17 00:00:00 2001
From c5300de0fe982ae8a78e1b95ef7bf30b744e4ca1 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Fri, 25 Nov 2016 14:12:01 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: fix enabling of the TX-delay for
@ -66,7 +66,7 @@ index 43ab691362d4..686f3b259dc0 100644
return 0;
}
From 91f88fe0a8ae6a575e42384236ddac74a7343f33 Mon Sep 17 00:00:00 2001
From 647c38d9964680f7fbb24c5a889ef74b23b4cbd4 Mon Sep 17 00:00:00 2001
From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Date: Tue, 12 Sep 2017 18:54:35 +0900
Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL8211F_PAGE_SELECT to
@ -132,7 +132,7 @@ index 686f3b259dc0..d58cc8f518ac 100644
return 0;
}
From 418a6d18802923ffc35b9d8d40ce97a7d44f4482 Mon Sep 17 00:00:00 2001
From 724532e7b4ad78722821763c639a73383a0f4418 Mon Sep 17 00:00:00 2001
From: Jassi Brar <jaswinder.singh@linaro.org>
Date: Tue, 12 Sep 2017 18:54:36 +0900
Subject: [PATCH] UPSTREAM: net: phy: realtek: add RTL8201F phy-id and
@ -235,7 +235,7 @@ index d58cc8f518ac..422cf1f6a60c 100644
{ 0x001cc914, 0x001fffff },
{ 0x001cc915, 0x001fffff },
From 0e7b02714fa25f16aebcb917fa7017aded5bdf06 Mon Sep 17 00:00:00 2001
From 933e1e195c40a941b6e5dec0c6a3a4bb7f804cf7 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sun, 12 Nov 2017 16:16:04 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: fix RTL8211F interrupt mode
@ -280,7 +280,7 @@ index 422cf1f6a60c..a30d0c08c63b 100644
return err;
}
From 013120bec5f5e717baf7465e0eaafd6e5141d8c6 Mon Sep 17 00:00:00 2001
From 046a2dc318a05236e06b09d8c0ca3f1005cbceca Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 22:51:24 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: use the BIT and GENMASK macros
@ -329,7 +329,7 @@ index a30d0c08c63b..f8dc29a75828 100644
#define RTL8201F_ISR 0x1e
#define RTL8201F_IER 0x13
From ac2c0298c225eacc49b74a6f723b18a99a7b4b28 Mon Sep 17 00:00:00 2001
From 7894b1cae69475242cdb1ca0fb639a5d70ac6316 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 22:51:25 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: rename RTL821x_INER_INIT to
@ -370,7 +370,7 @@ index f8dc29a75828..89308eac4088 100644
err = phy_write(phydev, RTL821x_INER, 0);
From 68e38ec78893a72b91255eaf56e1aa5dfcf81d1f Mon Sep 17 00:00:00 2001
From f6e8b6c88c6b3d4925607575bc4387a289d49708 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 22:51:26 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: group all register bit #defines
@ -414,7 +414,7 @@ index 89308eac4088..df97d903d2bf 100644
#define RTL8211F_TX_DELAY BIT(8)
From 89b955d9f11cc268626cdedbf75561ccc607bb90 Mon Sep 17 00:00:00 2001
From d5e2b112bb8e5707fc2fb727122ee5a8444ee462 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 22:51:27 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: use the same indentation for all
@ -474,7 +474,7 @@ index df97d903d2bf..701f34ad7d8d 100644
MODULE_DESCRIPTION("Realtek PHY driver");
MODULE_AUTHOR("Johnson Leung");
From 304312f104de088682456d4cf7353732685fe455 Mon Sep 17 00:00:00 2001
From 8c16425a3c99a1cca4458eb17bd6414d65074027 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 22:51:28 +0100
Subject: [PATCH] UPSTREAM: net: phy: realtek: add utility functions to
@ -645,7 +645,7 @@ index 701f34ad7d8d..b1d52e61d91c 100644
return 0;
}
From aa354e4db670dda7682b1c4aed23cd6ffb51f715 Mon Sep 17 00:00:00 2001
From 13e556c6d4ece3c890edc414f205cc26381e9826 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 23:06:48 +0100
Subject: [PATCH] FROMLIST: net: phy: realtek: add support for configuring the
@ -755,7 +755,7 @@ index b1d52e61d91c..890ea9d18d27 100644
return ret;
From 1503227b699167969f0c630a95f73e7760edefbc Mon Sep 17 00:00:00 2001
From e8fa4ce26460af84f028b7d215134caa33aa9ecb Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 23:06:49 +0100
Subject: [PATCH] FROMLIST: net: phy: realtek: configure the INTB pin on
@ -834,7 +834,7 @@ index 890ea9d18d27..f307d220b49a 100644
return rtl8211x_page_write(phydev, 0xa42, RTL821x_INER, val);
}
From 429c1855e10305c2838913a9dc074bd70831bb14 Mon Sep 17 00:00:00 2001
From dd026c252cd898bca0b85eb14aa6479b415d2471 Mon Sep 17 00:00:00 2001
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Sat, 2 Dec 2017 23:06:50 +0100
Subject: [PATCH] FROMLIST: net: phy: realtek: add more interrupt bits for

6
projects/Rockchip/patches/linux/rockchip-4.4/linux-0007-dtoverlay-configfs.patch
View File

@ -1,4 +1,4 @@
From 59a82f24064c60e03af52938e5a2257038e1ee07 Mon Sep 17 00:00:00 2001
From bb0e3fa6305fe3dead0aa670d7979d6ebcbaf47d Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Thu, 22 Oct 2015 23:30:04 +0300
Subject: [PATCH] UPSTREAM: configfs: implement binary attributes
@ -651,7 +651,7 @@ index 758a029011b1..f7300d023dbe 100644
* If allow_link() exists, the item can symlink(2) out to other
* items. If the item is a group, it may support mkdir(2).
From e35c4a7f4a74aa78fb3518e6eaccb7387600eccb Mon Sep 17 00:00:00 2001
From 5bbcb67edd92f639228cbaf7d597af715442db16 Mon Sep 17 00:00:00 2001
From: Octavian Purdila <octavian.purdila@intel.com>
Date: Wed, 23 Mar 2016 14:14:48 +0200
Subject: [PATCH] UPSTREAM: configfs: fix CONFIGFS_BIN_ATTR_[RW]O definitions
@ -689,7 +689,7 @@ index f7300d023dbe..658066d63180 100644
.ca_name = __stringify(_name), \
.ca_mode = S_IWUSR, \
From b0f4ef7b999ed084376777763e20644dc9061ad3 Mon Sep 17 00:00:00 2001
From 34d6438a4d2cedcd1b47f55a3cc63374252c6682 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Wed, 4 Dec 2013 19:32:00 +0200
Subject: [PATCH] FROMLIST: OF: DT-Overlay configfs interface (v7)

18
projects/Rockchip/patches/linux/rockchip-4.4/linux-0008-mmc-pwrseq.patch
View File

@ -1,4 +1,4 @@
From 3c894b625c24537d22213836dbc44e1973b2b1f4 Mon Sep 17 00:00:00 2001
From 75bb99dc815464846a4add357494acf04212271d Mon Sep 17 00:00:00 2001
From: Julia Lawall <Julia.Lawall@lip6.fr>
Date: Sat, 14 Nov 2015 18:05:20 +0100
Subject: [PATCH] UPSTREAM: mmc: pwrseq: constify mmc_pwrseq_ops structures
@ -56,7 +56,7 @@ index d10538bb5e07..2b16263458af 100644
.post_power_on = mmc_pwrseq_simple_post_power_on,
.power_off = mmc_pwrseq_simple_power_off,
From 11396ee87b7a090c5807c2fc2b8a640d109c30ce Mon Sep 17 00:00:00 2001
From 1977551c6ef29f55b398a02112e3075c9a38649d Mon Sep 17 00:00:00 2001
From: Martin Fuzzey <mfuzzey@parkeon.com>
Date: Wed, 20 Jan 2016 16:08:03 +0100
Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Make reset-gpios optional to
@ -128,7 +128,7 @@ index 2b16263458af..aba786daebca 100644
goto clk_put;
}
From eecad6e4c48e9e82ec2f8415dec690f67c7ba12b Mon Sep 17 00:00:00 2001
From e79ed0004dc68dc2f2189256bf00a1f579c78f1a Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@freescale.com>
Date: Wed, 6 Jan 2016 11:34:10 +0800
Subject: [PATCH] UPSTREAM: mmc: core: pwrseq_simple: remove unused header file
@ -153,7 +153,7 @@ index aba786daebca..bc173e18b71c 100644
#include <linux/mmc/host.h>
From ea74f89b7e6bb89a2824df5bf3ae94786f6b30b3 Mon Sep 17 00:00:00 2001
From 545d059f7a0a4c470acfdb0fff30397899597f09 Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Thu, 14 Apr 2016 14:02:14 +0100
Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: add to_pwrseq_simple() macro
@ -220,7 +220,7 @@ index bc173e18b71c..f94271bb1f6b 100644
if (!IS_ERR(pwrseq->reset_gpios))
gpiod_put_array(pwrseq->reset_gpios);
From 11bf8cedf08ee10e4053d8787268c69a0bd7419b Mon Sep 17 00:00:00 2001
From e8c5f0b9383e6a528c8fc00d61755f8187e4c0b8 Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Thu, 14 Apr 2016 14:02:15 +0100
Subject: [PATCH] UPSTREAM: mmc: pwrseq_emmc: add to_pwrseq_emmc() macro
@ -267,7 +267,7 @@ index 4a82bc77fe49..c2d732aa464c 100644
unregister_restart_handler(&pwrseq->reset_nb);
gpiod_put(pwrseq->reset_gpio);
From 9a32c48a17c3a0de3bd96cc6e9289d9fb8710b91 Mon Sep 17 00:00:00 2001
From ef2f3c5b7375b930697a64c85f30f9109e631cb0 Mon Sep 17 00:00:00 2001
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date: Thu, 14 Apr 2016 14:02:16 +0100
Subject: [PATCH] UPSTREAM: mmc: pwrseq: convert to proper platform device
@ -785,7 +785,7 @@ index f94271bb1f6b..450d907c6e6c 100644
+module_platform_driver(mmc_pwrseq_simple_driver);
+MODULE_LICENSE("GPL v2");
From d94057e963bb557eb61324a2f05e5a0a743813c5 Mon Sep 17 00:00:00 2001
From 42eb02ddb70002e4f72fa627037b6acbdd4cb7a1 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Sun, 7 Aug 2016 21:02:38 +0200
Subject: [PATCH] UPSTREAM: mmc: pwrseq-simple: Add an optional
@ -861,7 +861,7 @@ index 450d907c6e6c..1304160de168 100644
pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops;
pwrseq->pwrseq.owner = THIS_MODULE;
From 50e40e09e01a67684fd3b7ef2422f194a656dd93 Mon Sep 17 00:00:00 2001
From bf90ebd56d6f327f77bd7add55b3593679cd5c67 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Sat, 6 May 2017 11:41:30 +0200
Subject: [PATCH] UPSTREAM: mmc: dt: pwrseq-simple: Invent power-off-delay-us
@ -897,7 +897,7 @@ index e25436861867..9029b45b8a22 100644
Example:
From e4960aff45ecb83728279dd1e524f4e62ec11240 Mon Sep 17 00:00:00 2001
From bc79b1f8ca4d16d45b93c2888474bb3f11b10226 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Sat, 6 May 2017 11:43:05 +0200
Subject: [PATCH] UPSTREAM: mmc: pwrseq_simple: Parse DTS for the

633
projects/Rockchip/patches/linux/rockchip-4.4/linux-0009-mmc.patch Normal file
View File

@ -0,0 +1,633 @@
From 38396ba52ab85ea1eabea3c92fd7532f8732f92e Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 24 Jul 2018 15:49:29 +0200
Subject: [PATCH] mmc: core: use hs400es voltage flags
---
drivers/mmc/core/mmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index a814eb6882aa..1d950f0b3aa6 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1259,10 +1259,10 @@ static int mmc_select_hs400es(struct mmc_card *card)
goto out_err;
}
- if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_2V)
+ if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V)
err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
- if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_8V)
+ if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V)
err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
/* If fails try again during next card power cycle */
From 92a57737adc14e15e80b6913932bb5d2d3478068 Mon Sep 17 00:00:00 2001
From: Haibo Chen <haibo.chen@nxp.com>
Date: Tue, 8 Aug 2017 18:54:01 +0800
Subject: [PATCH] UPSTREAM: mmc: mmc: correct the logic for setting HS400ES
signal voltage
Change the default err value to -EINVAL, make sure the card only
has type EXT_CSD_CARD_TYPE_HS400_1_8V also do the signal voltage
setting when select hs400es mode.
Fixes: commit 1720d3545b77 ("mmc: core: switch to 1V8 or 1V2 for hs400es mode")
Cc: <stable@vger.kernel.org>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 92ddd95919466de5d34f3cb43635da9a7f9ab814)
---
drivers/mmc/core/mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 1d950f0b3aa6..70de514dd061 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1251,7 +1251,7 @@ out_err:
static int mmc_select_hs400es(struct mmc_card *card)
{
struct mmc_host *host = card->host;
- int err = 0;
+ int err = -EINVAL;
u8 val;
if (!(host->caps & MMC_CAP_8_BIT_DATA)) {
From 108a045df9dc1cee2127aec0bdd327ba7f2fdb81 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Wed, 25 Jan 2017 10:12:10 +0100
Subject: [PATCH] UPSTREAM: mmc: core: Remove redundant code in
mmc_set_signal_voltage()
The mmc_set_signal_voltage() function is used for SD/SDIO when switching to
1.8V for UHS mode. Therefore let's remove the redundant code dealing with
MMC_SIGNAL_VOLTAGE_330.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Jan Glauber <jglauber@cavium.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
(cherry picked from commit a44efa4796249c6d4341935e90e9105d6e1a5f15)
---
drivers/mmc/core/core.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 3e3c79feb07b..b69c96ad9486 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1598,13 +1598,6 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr)
BUG_ON(!host);
- /*
- * Send CMD11 only if the request is to switch the card to
- * 1.8V signalling.
- */
- if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
- return __mmc_set_signal_voltage(host, signal_voltage);
-
/*
* If we cannot switch voltages, return failure so the caller
* can continue without UHS mode
From d28c1bfff6556db2c4ce1093091293cf20542202 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Wed, 25 Jan 2017 10:25:01 +0100
Subject: [PATCH] UPSTREAM: mmc: core: Clarify usage of
mmc_set_signal_voltage()
The mmc_set_signal_voltage() function is used for SD/SDIO when switching to
1.8V for UHS mode. To clarify this let's do the following changes.
- We are always providing MMC_SIGNAL_VOLTAGE_180 as the signal_voltage
parameter to the function. Then, let's just remove the parameter as it
serves no purpose.
- Rename the function to mmc_set_uhs_voltage().
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Jan Glauber <jglauber@cavium.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
(cherry picked from commit 2ed573b603f78289dd1435c94597aa25a97e2b76)
---
drivers/mmc/core/core.c | 4 ++--
drivers/mmc/core/core.h | 2 +-
drivers/mmc/core/sd.c | 3 +--
drivers/mmc/core/sdio.c | 3 +--
4 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index b69c96ad9486..35d19d57d2c5 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1590,7 +1590,7 @@ int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
}
-int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr)
+int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr)
{
struct mmc_command cmd = {0};
int err = 0;
@@ -1636,7 +1636,7 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr)
host->ios.clock = 0;
mmc_set_ios(host);
- if (__mmc_set_signal_voltage(host, signal_voltage)) {
+ if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) {
/*
* Voltages may not have been switched, but we've already
* sent CMD11, so a power cycle is required anyway
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index ed7c3167763a..88ef50b2e0be 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -43,7 +43,7 @@ void mmc_set_clock(struct mmc_host *host, unsigned int hz);
void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode);
void mmc_set_bus_width(struct mmc_host *host, unsigned int width);
u32 mmc_select_voltage(struct mmc_host *host, u32 ocr);
-int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr);
+int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr);
int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
void mmc_set_timing(struct mmc_host *host, unsigned int timing);
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index cd437d6b1843..d9943d82db95 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -742,8 +742,7 @@ try_again:
*/
if (!mmc_host_is_spi(host) && rocr &&
((*rocr & 0x41000000) == 0x41000000)) {
- err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180,
- pocr);
+ err = mmc_set_uhs_voltage(host, pocr);
if (err == -EAGAIN) {
retries--;
goto try_again;
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index c586b11a40b5..f221418542e2 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -648,8 +648,7 @@ try_again:
* to make sure which speed mode should work.
*/
if (!powered_resume && (rocr & ocr & R4_18V_PRESENT)) {
- err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180,
- ocr_card);
+ err = mmc_set_uhs_voltage(host, ocr_card);
if (err == -EAGAIN) {
mmc_sdio_resend_if_cond(host, card);
retries--;
From 0f61c64862ed54163c5f88389170c95055a74f68 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Wed, 25 Jan 2017 11:12:34 +0100
Subject: [PATCH] UPSTREAM: mmc: core: Rename __mmc_set_signal_voltage() to
mmc_set_signal_voltage()
Earlier the mmc_set_signal_voltage() existed, but since it has been renamed
to mmc_set_uhs_voltage(), we can now use that name instead.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Jan Glauber <jglauber@cavium.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
(cherry picked from commit 4e74b6b3c6e9adfe6a8fdebfc56a6416a996d905)
---
drivers/mmc/core/core.c | 10 +++++-----
drivers/mmc/core/core.h | 2 +-
drivers/mmc/core/mmc.c | 16 ++++++++--------
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 35d19d57d2c5..ba285431c2d0 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1574,7 +1574,7 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr)
return ocr;
}
-int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
+int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
{
int err = 0;
int old_signal_voltage = host->ios.signal_voltage;
@@ -1636,7 +1636,7 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr)
host->ios.clock = 0;
mmc_set_ios(host);
- if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) {
+ if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) {
/*
* Voltages may not have been switched, but we've already
* sent CMD11, so a power cycle is required anyway
@@ -1745,11 +1745,11 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
mmc_set_initial_state(host);
/* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */
- if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330) == 0)
+ if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330))
dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n");
- else if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180) == 0)
+ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180))
dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n");
- else if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120) == 0)
+ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120))
dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n");
/*
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 88ef50b2e0be..0e4bc1c7a773 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -44,7 +44,7 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode);
void mmc_set_bus_width(struct mmc_host *host, unsigned int width);
u32 mmc_select_voltage(struct mmc_host *host, u32 ocr);
int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr);
-int __mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
+int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
void mmc_set_timing(struct mmc_host *host, unsigned int timing);
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
int mmc_select_drive_strength(struct mmc_card *card, unsigned int max_dtr,
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 70de514dd061..dd0040a10c0b 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1088,14 +1088,14 @@ static int mmc_select_hs_ddr(struct mmc_card *card)
*/
err = -EINVAL;
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
if (err && (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_8V))
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
/* make sure vccq is 3.3v after switching disaster */
if (err)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330);
if (!err)
mmc_set_timing(host, MMC_TIMING_MMC_DDR52);
@@ -1260,10 +1260,10 @@ static int mmc_select_hs400es(struct mmc_card *card)
}
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_2V)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
/* If fails try again during next card power cycle */
if (err)
@@ -1362,10 +1362,10 @@ static int mmc_select_hs200(struct mmc_card *card)
old_signal_voltage = host->ios.signal_voltage;
if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_2V)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120);
if (err && card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200_1_8V)
- err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
+ err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
/* If fails try again during next card power cycle */
if (err)
@@ -1393,7 +1393,7 @@ static int mmc_select_hs200(struct mmc_card *card)
err:
if (err) {
/* fall back to the old signal voltage, if fails report error */
- if (__mmc_set_signal_voltage(host, old_signal_voltage))
+ if (mmc_set_signal_voltage(host, old_signal_voltage))
err = -EIO;
pr_err("%s: %s failed, error %d\n", mmc_hostname(card->host),
From db9fd591980256d95de5675ebd84759b9cc9831c Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Mon, 25 Sep 2017 11:29:03 +0300
Subject: [PATCH] UPSTREAM: mmc: core: Factor out mmc_host_set_uhs_voltage()
Factor out mmc_host_set_uhs_voltage() so it can be reused.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 3f496afb6fb361b282f37968ff7d3d80b0f1b5cb)
---
drivers/mmc/core/core.c | 38 ++++++++++++++++++++++++--------------
drivers/mmc/core/core.h | 1 +
2 files changed, 25 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index ba285431c2d0..dae82afcbc99 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1590,11 +1590,33 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
}
+int mmc_host_set_uhs_voltage(struct mmc_host *host)
+{
+ u32 clock;
+
+ /*
+ * During a signal voltage level switch, the clock must be gated
+ * for 5 ms according to the SD spec
+ */
+ clock = host->ios.clock;
+ host->ios.clock = 0;
+ mmc_set_ios(host);
+
+ if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180))
+ return -EAGAIN;
+
+ /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
+ mmc_delay(10);
+ host->ios.clock = clock;
+ mmc_set_ios(host);
+
+ return 0;
+}
+
int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr)
{
struct mmc_command cmd = {0};
int err = 0;
- u32 clock;
BUG_ON(!host);
@@ -1628,15 +1650,8 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr)
err = -EAGAIN;
goto power_cycle;
}
- /*
- * During a signal voltage level switch, the clock must be gated
- * for 5 ms according to the SD spec
- */
- clock = host->ios.clock;
- host->ios.clock = 0;
- mmc_set_ios(host);
- if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180)) {
+ if (mmc_host_set_uhs_voltage(host)) {
/*
* Voltages may not have been switched, but we've already
* sent CMD11, so a power cycle is required anyway
@@ -1645,11 +1660,6 @@ int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr)
goto power_cycle;
}
- /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
- mmc_delay(10);
- host->ios.clock = clock;
- mmc_set_ios(host);
-
/* Wait for at least 1 ms according to spec */
mmc_delay(1);
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 0e4bc1c7a773..11f3d2c22ecb 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -44,6 +44,7 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode);
void mmc_set_bus_width(struct mmc_host *host, unsigned int width);
u32 mmc_select_voltage(struct mmc_host *host, u32 ocr);
int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr);
+int mmc_host_set_uhs_voltage(struct mmc_host *host);
int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
void mmc_set_timing(struct mmc_host *host, unsigned int timing);
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
From 9c2d593200bd835b8e55eb6e0ba188e4dd9c744e Mon Sep 17 00:00:00 2001
From: Adrian Hunter <adrian.hunter@intel.com>
Date: Mon, 25 Sep 2017 11:29:04 +0300
Subject: [PATCH] UPSTREAM: mmc: sd: Fix signal voltage when there is no power
cycle
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. However there are various circumstances when a card
might be re-initialized, such as after system resume, warm re-boot, or
error handling. However, a UHS card will continue to use 1.8V signaling
unless it is power cycled.
If the card has not been power cycled, it may still be using 1.8V
signaling. According to the SD spec., the Bus Speed Mode (function group 1)
bits 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus
they can be used to determine if the card has already switched to 1.8V
signaling. Detect that situation and try to initialize a UHS-I (1.8V)
transfer mode.
Tested with the following cards:
Transcend 4GB High Speed
Kingston 64GB SDR104
Lexar by Micron HIGH-PERFORMANCE 300x 16GB DDR50
SanDisk Ultra 8GB DDR50
Transcend Ultimate 600x 16GB SDR104
Transcend Premium 300x 64GB SDR104
Lexar by Micron Professional 1000x 32GB UHS-II SDR104
SanDisk Extreme Pro 16GB SDR104
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Tested-by: Zhoujie Wu <zjwu@marvell.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 6a11fc47f175c8d87018e89cb58e2d36c66534cb)
---
drivers/mmc/core/sd.c | 47 +++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 45 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index d9943d82db95..2808a281d094 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -898,6 +898,18 @@ unsigned mmc_sd_get_max_clock(struct mmc_card *card)
return max_dtr;
}
+static bool mmc_sd_card_using_v18(struct mmc_card *card)
+{
+ /*
+ * According to the SD spec., the Bus Speed Mode (function group 1) bits
+ * 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus
+ * they can be used to determine if the card has already switched to
+ * 1.8V signaling.
+ */
+ return card->sw_caps.sd3_bus_mode &
+ (SD_MODE_UHS_SDR50 | SD_MODE_UHS_SDR104 | SD_MODE_UHS_DDR50);
+}
+
/*
* Handle the detection and initialisation of a card.
*
@@ -911,10 +923,11 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
int err;
u32 cid[4];
u32 rocr = 0;
+ bool v18_fixup_failed = false;
BUG_ON(!host);
WARN_ON(!host->claimed);
-
+retry:
err = mmc_sd_get_cid(host, ocr, cid, &rocr);
if (err)
return err;
@@ -980,6 +993,36 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
if (err)
goto free_card;
+ /*
+ * If the card has not been power cycled, it may still be using 1.8V
+ * signaling. Detect that situation and try to initialize a UHS-I (1.8V)
+ * transfer mode.
+ */
+ if (!v18_fixup_failed && !mmc_host_is_spi(host) && mmc_host_uhs(host) &&
+ mmc_sd_card_using_v18(card) &&
+ host->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
+ /*
+ * Re-read switch information in case it has changed since
+ * oldcard was initialized.
+ */
+ if (oldcard) {
+ err = mmc_read_switch(card);
+ if (err)
+ goto free_card;
+ }
+ if (mmc_sd_card_using_v18(card)) {
+ if (mmc_host_set_uhs_voltage(host) ||
+ mmc_sd_init_uhs_card(card)) {
+ v18_fixup_failed = true;
+ mmc_power_cycle(host, ocr);
+ if (!oldcard)
+ mmc_remove_card(card);
+ goto retry;
+ }
+ goto done;
+ }
+ }
+
/* Initialization sequence for UHS-I cards */
if (rocr & SD_ROCR_S18A && mmc_host_uhs(host)) {
err = mmc_sd_init_uhs_card(card);
@@ -1012,7 +1055,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr,
mmc_set_bus_width(host, MMC_BUS_WIDTH_4);
}
}
-
+done:
host->card = card;
return 0;
From 6ee3035196c307a77f95b1c1f3cc537e467fb838 Mon Sep 17 00:00:00 2001
From: Ulf Hansson <ulf.hansson@linaro.org>
Date: Thu, 5 Apr 2018 21:24:15 +0200
Subject: [PATCH] UPSTREAM: mmc: core: Share internal function to set initial
signal voltage
Move the corresponding code for setting the initial signal voltage, from
mmc_power_up() into a new function, mmc_set_initial_signal_voltage().
Make the function internally available to the mmc core, as to allow the
following changes to make use of it.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Quentin Schulz <quentin.schulz@bootlin.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from commit 508c9864ccede5dd4b8a7220b3fe6998763e4407)
---
drivers/mmc/core/core.c | 19 ++++++++++++-------
drivers/mmc/core/core.h | 1 +
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index dae82afcbc99..7aa83beea957 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1590,6 +1590,17 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
}
+void mmc_set_initial_signal_voltage(struct mmc_host *host)
+{
+ /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */
+ if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330))
+ dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n");
+ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180))
+ dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n");
+ else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120))
+ dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n");
+}
+
int mmc_host_set_uhs_voltage(struct mmc_host *host)
{
u32 clock;
@@ -1754,13 +1765,7 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
/* Set initial state and call mmc_set_ios */
mmc_set_initial_state(host);
- /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */
- if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330))
- dev_dbg(mmc_dev(host), "Initial signal voltage of 3.3v\n");
- else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180))
- dev_dbg(mmc_dev(host), "Initial signal voltage of 1.8v\n");
- else if (!mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120))
- dev_dbg(mmc_dev(host), "Initial signal voltage of 1.2v\n");
+ mmc_set_initial_signal_voltage(host);
/*
* This delay should be sufficient to allow the power supply
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 11f3d2c22ecb..2634722265ad 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -46,6 +46,7 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr);
int mmc_set_uhs_voltage(struct mmc_host *host, u32 ocr);
int mmc_host_set_uhs_voltage(struct mmc_host *host);
int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
+void mmc_set_initial_signal_voltage(struct mmc_host *host);
void mmc_set_timing(struct mmc_host *host, unsigned int timing);
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
int mmc_select_drive_strength(struct mmc_card *card, unsigned int max_dtr,
From adadab9687a3e07be7557e4272fdf5a007b4c604 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Tue, 24 Jul 2018 15:50:06 +0200
Subject: [PATCH] mmc: core: set initial signal voltage on power off
---
drivers/mmc/core/core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 7aa83beea957..d2c59b5e04ab 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1792,6 +1792,14 @@ void mmc_power_off(struct mmc_host *host)
if (host->ios.power_mode == MMC_POWER_OFF)
return;
+ mmc_set_initial_signal_voltage(host);
+
+ /*
+ * This delay should be sufficient to allow the power supply
+ * to reach the minimum voltage.
+ */
+ mmc_delay(10);
+
mmc_pwrseq_power_off(host);
host->ios.clock = 0;

190
projects/Rockchip/patches/linux/rockchip-4.4/linux-0011-add-bitfield-header.patch → projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvb.patch
View File

@ -1,7 +1,7 @@
From 9260fcc02a97e6acceb6dc0ef064939382b6b74d Mon Sep 17 00:00:00 2001
From ae39146426642d51de99ba3bdef54912c579991b Mon Sep 17 00:00:00 2001
From: Jakub Kicinski <jakub.kicinski@netronome.com>
Date: Wed, 31 Aug 2016 12:46:44 +0100
Subject: [PATCH 1/2] add basic register-field manipulation macros
Subject: [PATCH] UPSTREAM: add basic register-field manipulation macros
Common approach to accessing register fields is to define
structures or sets of macros containing mask and shift pair.
@ -39,6 +39,7 @@ GCC < 6.0.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Dinan Gunawardena <dinan.gunawardena@netronome.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
(cherry picked from commit 3e9b3112ec74f192eaab976c3889e34255cae940)
---
include/linux/bitfield.h | 93 ++++++++++++++++++++++++++++++++++++++++++++++++
include/linux/bug.h | 3 ++
@ -165,20 +166,18 @@ index 7f4818673c41..edd3d8d3cd90 100644
#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \
BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
--
2.11.0
From ae411606724c694ec6fa0f255ed8d7788094109d Mon Sep 17 00:00:00 2001
From 8c11cf13e9f5c633bc2d1f3414d3b95c9cc82e4c Mon Sep 17 00:00:00 2001
From: Jakub Kicinski <jakub.kicinski@netronome.com>
Date: Thu, 9 Feb 2017 09:17:27 -0800
Subject: [PATCH 2/2] bitfield.h: add FIELD_FIT() helper
Subject: [PATCH] UPSTREAM: bitfield.h: add FIELD_FIT() helper
Add a helper for checking at runtime that a value will fit inside
a specified field/mask.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 1697599ee301a52cded6499a09bd609f7f63fd06)
---
include/linux/bitfield.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
@ -187,10 +186,11 @@ diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
index f6505d83069d..8b9d6fff002d 100644
--- a/include/linux/bitfield.h
+++ b/include/linux/bitfield.h
@@ -63,6 +63,19 @@
@@ -62,6 +62,19 @@
(1ULL << __bf_shf(_mask))); \
})
/**
+/**
+ * FIELD_FIT() - check if value fits in the field
+ * @_mask: shifted mask defining the field's length and position
+ * @_val: value to test against the field
@ -203,10 +203,174 @@ index f6505d83069d..8b9d6fff002d 100644
+ !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
+ })
+
+/**
/**
* FIELD_PREP() - prepare a bitfield element
* @_mask: shifted mask defining the field's length and position
* @_val: value to put in the field
--
2.11.0
From 9b03f083c3ba2b3ca6dbcfdc76bf24edfe8b2947 Mon Sep 17 00:00:00 2001
From: Laurent Defert <laurent.defert@smartjog.com>
Date: Wed, 11 Oct 2017 08:46:52 +0200
Subject: [PATCH] FROMLIST: compat_ioctl: add compat handler for
FE_SET_PROPERTY and FE_GET_PROPERTY
https://patchwork.linuxtv.org/patch/8209/
---
fs/compat_ioctl.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 138 insertions(+)
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index a52ca5cba015..438ce0c6851e 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -223,6 +223,140 @@ static int do_video_set_spu_palette(unsigned int fd, unsigned int cmd,
return err;
}
+struct compat_dtv_property {
+ __u32 cmd;
+ __u32 reserved[3];
+ union {
+ __u32 data;
+ struct {
+ __u8 data[32];
+ __u32 len;
+ __u32 reserved1[3];
+ compat_uptr_t reserved2;
+ } buffer;
+ } u;
+ int result;
+};
+
+struct compat_dtv_properties {
+ __u32 num;
+ compat_uptr_t props;
+};
+
+#define FE_SET_PROPERTY32 _IOW('o', 82, struct compat_dtv_properties)
+#define FE_GET_PROPERTY32 _IOR('o', 83, struct compat_dtv_properties)
+
+static int do_fe_set_property(unsigned int fd, unsigned int cmd,
+ struct compat_dtv_properties __user *dtv32)
+{
+ struct dtv_properties __user *dtv;
+ struct dtv_property __user *properties;
+ struct compat_dtv_property __user *properties32;
+ compat_uptr_t data;
+
+ int err;
+ int i;
+ __u32 num;
+
+ err = get_user(num, &dtv32->num);
+ err |= get_user(data, &dtv32->props);
+
+ if(err)
+ return -EFAULT;
+
+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) +
+ sizeof(struct dtv_property) * num);
+ properties = (struct dtv_property*)((char*)dtv +
+ sizeof(struct dtv_properties));
+
+ err = put_user(properties, &dtv->props);
+ err |= put_user(num, &dtv->num);
+
+ properties32 = compat_ptr(data);
+
+ if(err)
+ return -EFAULT;
+
+ for(i = 0; i < num; i++) {
+ compat_uptr_t reserved2;
+
+ err |= copy_in_user(&properties[i], &properties32[i],
+ (8 * sizeof(__u32)) + (32 * sizeof(__u8)));
+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2);
+ err |= put_user(compat_ptr(reserved2),
+ &properties[i].u.buffer.reserved2);
+ }
+
+ if(err)
+ return -EFAULT;
+
+ err = sys_ioctl(fd, FE_SET_PROPERTY, (unsigned long) dtv);
+
+ for(i = 0; i < num; i++) {
+ if(copy_in_user(&properties32[i].result, &properties[i].result,
+ sizeof(int)))
+ return -EFAULT;
+ }
+
+ return err;
+}
+
+static int do_fe_get_property(unsigned int fd, unsigned int cmd,
+ struct compat_dtv_properties __user *dtv32)
+{
+ struct dtv_properties __user *dtv;
+ struct dtv_property __user *properties;
+ struct compat_dtv_property __user *properties32;
+ compat_uptr_t data;
+
+ int err;
+ int i;
+ __u32 num;
+
+ err = get_user(num, &dtv32->num);
+ err |= get_user(data, &dtv32->props);
+
+ if(err)
+ return -EFAULT;
+
+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) +
+ sizeof(struct dtv_property) * num);
+ properties = (struct dtv_property*)((char*)dtv +
+ sizeof(struct dtv_properties));
+
+ err = put_user(properties, &dtv->props);
+ err |= put_user(num, &dtv->num);
+
+ properties32 = compat_ptr(data);
+
+ if(err)
+ return -EFAULT;
+
+ for(i = 0; i < num; i++) {
+ compat_uptr_t reserved2;
+
+ err |= copy_in_user(&properties[i], &properties32[i],
+ (8 * sizeof(__u32)) + (32 * sizeof(__u8)));
+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2);
+ err |= put_user(compat_ptr(reserved2),
+ &properties[i].u.buffer.reserved2);
+ }
+
+ if(err)
+ return -EFAULT;
+
+ err = sys_ioctl(fd, FE_GET_PROPERTY, (unsigned long) dtv);
+
+ for(i = 0; i < num; i++) {
+
+ if(copy_in_user(&properties32[i], &properties[i],
+ sizeof(properties32[i])))
+ return -EFAULT;
+ }
+
+ return err;
+}
+
#ifdef CONFIG_BLOCK
typedef struct sg_io_hdr32 {
compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
@@ -1483,6 +1617,10 @@ static long do_ioctl_trans(int fd, unsigned int cmd,
return do_video_stillpicture(fd, cmd, argp);
case VIDEO_SET_SPU_PALETTE:
return do_video_set_spu_palette(fd, cmd, argp);
+ case FE_SET_PROPERTY32:
+ return do_fe_set_property(fd, cmd, argp);
+ case FE_GET_PROPERTY32:
+ return do_fe_get_property(fd, cmd, argp);
}
/*

167
projects/Rockchip/patches/linux/rockchip-4.4/linux-0010-dvbcompat.patch
View File

@ -1,167 +0,0 @@
From 23e9ba535d09e96564c8bc6a28afefbadb5ee619 Mon Sep 17 00:00:00 2001
From: Laurent Defert <laurent.defert@smartjog.com>
Date: Wed, 11 Oct 2017 08:46:52 +0200
Subject: [PATCH] [media] compat_ioctl: add compat handler for FE_SET_PROPERTY
and FE_GET_PROPERTY
https://patchwork.linuxtv.org/patch/8209/
---
fs/compat_ioctl.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 138 insertions(+)
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index 76e1f2dc669..f6b4144d94d 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -224,6 +224,140 @@ static int do_video_set_spu_palette(unsigned int fd, unsigned int cmd,
return err;
}
+struct compat_dtv_property {
+ __u32 cmd;
+ __u32 reserved[3];
+ union {
+ __u32 data;
+ struct {
+ __u8 data[32];
+ __u32 len;
+ __u32 reserved1[3];
+ compat_uptr_t reserved2;
+ } buffer;
+ } u;
+ int result;
+};
+
+struct compat_dtv_properties {
+ __u32 num;
+ compat_uptr_t props;
+};
+
+#define FE_SET_PROPERTY32 _IOW('o', 82, struct compat_dtv_properties)
+#define FE_GET_PROPERTY32 _IOR('o', 83, struct compat_dtv_properties)
+
+static int do_fe_set_property(unsigned int fd, unsigned int cmd,
+ struct compat_dtv_properties __user *dtv32)
+{
+ struct dtv_properties __user *dtv;
+ struct dtv_property __user *properties;
+ struct compat_dtv_property __user *properties32;
+ compat_uptr_t data;
+
+ int err;
+ int i;
+ __u32 num;
+
+ err = get_user(num, &dtv32->num);
+ err |= get_user(data, &dtv32->props);
+
+ if(err)
+ return -EFAULT;
+
+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) +
+ sizeof(struct dtv_property) * num);
+ properties = (struct dtv_property*)((char*)dtv +
+ sizeof(struct dtv_properties));
+
+ err = put_user(properties, &dtv->props);
+ err |= put_user(num, &dtv->num);
+
+ properties32 = compat_ptr(data);
+
+ if(err)
+ return -EFAULT;
+
+ for(i = 0; i < num; i++) {
+ compat_uptr_t reserved2;
+
+ err |= copy_in_user(&properties[i], &properties32[i],
+ (8 * sizeof(__u32)) + (32 * sizeof(__u8)));
+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2);
+ err |= put_user(compat_ptr(reserved2),
+ &properties[i].u.buffer.reserved2);
+ }
+
+ if(err)
+ return -EFAULT;
+
+ err = sys_ioctl(fd, FE_SET_PROPERTY, (unsigned long) dtv);
+
+ for(i = 0; i < num; i++) {
+ if(copy_in_user(&properties32[i].result, &properties[i].result,
+ sizeof(int)))
+ return -EFAULT;
+ }
+
+ return err;
+}
+
+static int do_fe_get_property(unsigned int fd, unsigned int cmd,
+ struct compat_dtv_properties __user *dtv32)
+{
+ struct dtv_properties __user *dtv;
+ struct dtv_property __user *properties;
+ struct compat_dtv_property __user *properties32;
+ compat_uptr_t data;
+
+ int err;
+ int i;
+ __u32 num;
+
+ err = get_user(num, &dtv32->num);
+ err |= get_user(data, &dtv32->props);
+
+ if(err)
+ return -EFAULT;
+
+ dtv = compat_alloc_user_space(sizeof(struct dtv_properties) +
+ sizeof(struct dtv_property) * num);
+ properties = (struct dtv_property*)((char*)dtv +
+ sizeof(struct dtv_properties));
+
+ err = put_user(properties, &dtv->props);
+ err |= put_user(num, &dtv->num);
+
+ properties32 = compat_ptr(data);
+
+ if(err)
+ return -EFAULT;
+
+ for(i = 0; i < num; i++) {
+ compat_uptr_t reserved2;
+
+ err |= copy_in_user(&properties[i], &properties32[i],
+ (8 * sizeof(__u32)) + (32 * sizeof(__u8)));
+ err |= get_user(reserved2, &properties32[i].u.buffer.reserved2);
+ err |= put_user(compat_ptr(reserved2),
+ &properties[i].u.buffer.reserved2);
+ }
+
+ if(err)
+ return -EFAULT;
+
+ err = sys_ioctl(fd, FE_GET_PROPERTY, (unsigned long) dtv);
+
+ for(i = 0; i < num; i++) {
+
+ if(copy_in_user(&properties32[i], &properties[i],
+ sizeof(properties32[i])))
+ return -EFAULT;
+ }
+
+ return err;
+}
+
#ifdef CONFIG_BLOCK
typedef struct sg_io_hdr32 {
compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
@@ -1489,6 +1623,10 @@ static long do_ioctl_trans(int fd, unsigned int cmd,
return do_video_stillpicture(fd, cmd, argp);
case VIDEO_SET_SPU_PALETTE:
return do_video_set_spu_palette(fd, cmd, argp);
+ case FE_SET_PROPERTY32:
+ return do_fe_set_property(fd, cmd, argp);
+ case FE_GET_PROPERTY32:
+ return do_fe_get_property(fd, cmd, argp);
}
/*

49
projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-limit.patch Normal file
View File

@ -0,0 +1,49 @@
From 6ed983631422dcce52d8b029818617b4cd067a93 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 21 Apr 2018 12:52:58 +0200
Subject: [PATCH] drm/rockchip: skip 4K 50/60Hz clocks for RK3328
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index e2aad6e2149b..6399bb2f3a32 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -519,6 +519,10 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
if (hdmi->dev_type == RK3288_HDMI && (mode->clock < 27500 || mode->clock > 340000))
return MODE_CLOCK_RANGE;
+ /* Skip 4K 50/60Hz clocks for RK3328 */
+ if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000)
+ return MODE_CLOCK_RANGE;
+
/*
* ensure all drm display mode can work, if someone want support more
* resolutions, please limit the possible_crtc, only connect to
From 3953395d6056914e32f4d3459cdb0d5bd8c362a0 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 21 Apr 2018 12:53:04 +0200
Subject: [PATCH] drm/rockchip: skip 4K 50/60Hz clocks for RK3399
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 6399bb2f3a32..3171c21f1c78 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -523,6 +523,10 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
if (hdmi->dev_type == RK3328_HDMI && mode->clock > 340000)
return MODE_CLOCK_RANGE;
+ /* Skip 4K 50/60Hz clocks for RK3399 */
+ if (hdmi->dev_type == RK3399_HDMI && mode->clock > 340000)
+ return MODE_CLOCK_RANGE;
+
/*
* ensure all drm display mode can work, if someone want support more
* resolutions, please limit the possible_crtc, only connect to

894
projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-pl330.patch
View File

File diff suppressed because it is too large Load Diff

945
projects/Rockchip/patches/linux/rockchip-4.4/linux-1000-vcodec.patch Normal file
View File

@ -0,0 +1,945 @@
From 499f15c3237602cca9ccebe902d31bd7404fb2db Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 5 Jul 2018 00:14:14 +0200
Subject: [PATCH] Revert "drm/drm-prime: cache dma_buf import context"
This reverts commit 5a90381e5acc2cf32be03099a14d05d4362b3348.
---
drivers/gpu/drm/drm_prime.c | 46 ++---------------------------
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 1 +
2 files changed, 3 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 6f207d5946dc..6b7417a194a3 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -71,11 +71,6 @@ struct drm_prime_attachment {
enum dma_data_direction dir;
};
-struct drm_prime_callback_data {
- struct drm_gem_object *obj;
- struct sg_table *sgt;
-};
-
static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv,
struct dma_buf *dma_buf, uint32_t handle)
{
@@ -524,23 +519,6 @@ out_unlock:
}
EXPORT_SYMBOL(drm_gem_prime_handle_to_fd);
-static void drm_gem_prime_dmabuf_release_callback(void *data)
-{
- struct drm_prime_callback_data *cb_data = data;
-
- if (cb_data && cb_data->obj && cb_data->obj->import_attach) {
- struct dma_buf_attachment *attach = cb_data->obj->import_attach;
- struct sg_table *sgt = cb_data->sgt;
-
- if (sgt)
- dma_buf_unmap_attachment(attach, sgt,
- DMA_BIDIRECTIONAL);
- dma_buf_detach(attach->dmabuf, attach);
- drm_gem_object_unreference_unlocked(cb_data->obj);
- kfree(cb_data);
- }
-}
-
/**
* drm_gem_prime_import - helper library implementation of the import callback
* @dev: drm_device to import into
@@ -555,7 +533,6 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
struct dma_buf_attachment *attach;
struct sg_table *sgt;
struct drm_gem_object *obj;
- struct drm_prime_callback_data *cb_data;
int ret;
if (dma_buf->ops == &drm_gem_prime_dmabuf_ops) {
@@ -570,13 +547,6 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
}
}
- cb_data = dma_buf_get_release_callback_data(dma_buf,
- drm_gem_prime_dmabuf_release_callback);
- if (cb_data && cb_data->obj && cb_data->obj->dev == dev) {
- drm_gem_object_reference(cb_data->obj);
- return cb_data->obj;
- }
-
if (!dev->driver->gem_prime_import_sg_table)
return ERR_PTR(-EINVAL);
@@ -585,16 +555,11 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
return ERR_CAST(attach);
get_dma_buf(dma_buf);
- cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
- if (!cb_data) {
- ret = -ENOMEM;
- goto fail_detach;
- }
sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
if (IS_ERR(sgt)) {
ret = PTR_ERR(sgt);
- goto fail_free;
+ goto fail_detach;
}
obj = dev->driver->gem_prime_import_sg_table(dev, attach, sgt);
@@ -602,20 +567,13 @@ struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
ret = PTR_ERR(obj);
goto fail_unmap;
}
+
obj->import_attach = attach;
- cb_data->obj = obj;
- cb_data->sgt = sgt;
- dma_buf_set_release_callback(dma_buf,
- drm_gem_prime_dmabuf_release_callback, cb_data);
- dma_buf_put(dma_buf);
- drm_gem_object_reference(obj);
return obj;
fail_unmap:
dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
-fail_free:
- kfree(cb_data);
fail_detach:
dma_buf_detach(dma_buf, attach);
dma_buf_put(dma_buf);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index 273a52b5eb66..85bbd19c87b0 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -649,6 +649,7 @@ void rockchip_gem_free_object(struct drm_gem_object *obj)
dma_unmap_sg(drm->dev, rk_obj->sgt->sgl,
rk_obj->sgt->nents, DMA_BIDIRECTIONAL);
}
+ drm_prime_gem_destroy(obj, rk_obj->sgt);
} else {
rockchip_gem_free_buf(rk_obj);
}
From 3dd29985f5f1cec249c833b1b2ca33e131f79825 Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@gmail.com>
Date: Thu, 9 Jun 2016 15:29:19 -0400
Subject: [PATCH] UPSTREAM: drm/prime: fix error path deadlock fail
There were a couple messed up things about this fail path.
(1) it would drop object_name_lock twice
(2) drm_gem_handle_delete() (in drm_gem_remove_prime_handles())
needs to grab prime_lock
Reported-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1465500559-17873-1-git-send-email-robdclark@gmail.com
(cherry picked from commit bd6e2732f0e2894ce792f344c41fc32591436fe3)
---
drivers/gpu/drm/drm_prime.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 6b7417a194a3..d8d85286764d 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -628,7 +628,7 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
get_dma_buf(dma_buf);
}
- /* drm_gem_handle_create_tail unlocks dev->object_name_lock. */
+ /* _handle_create_tail unconditionally unlocks dev->object_name_lock. */
ret = drm_gem_handle_create_tail(file_priv, obj, handle);
drm_gem_object_unreference_unlocked(obj);
if (ret)
@@ -636,11 +636,10 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
ret = drm_prime_add_buf_handle(&file_priv->prime,
dma_buf, *handle);
+ mutex_unlock(&file_priv->prime.lock);
if (ret)
goto fail;
- mutex_unlock(&file_priv->prime.lock);
-
dma_buf_put(dma_buf);
return 0;
@@ -650,11 +649,14 @@ fail:
* to detach.. which seems ok..
*/
drm_gem_handle_delete(file_priv, *handle);
+ dma_buf_put(dma_buf);
+ return ret;
+
out_unlock:
mutex_unlock(&dev->object_name_lock);
out_put:
- dma_buf_put(dma_buf);
mutex_unlock(&file_priv->prime.lock);
+ dma_buf_put(dma_buf);
return ret;
}
EXPORT_SYMBOL(drm_gem_prime_fd_to_handle);
From a689159fac372a8210d2c63ba63da3a097388b97 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon, 26 Sep 2016 21:44:14 +0100
Subject: [PATCH] UPSTREAM: drm: Convert prime dma-buf <-> handle to rbtree
Currently we use a linear walk to lookup a handle and return a dma-buf,
and vice versa. A long overdue TODO task is to convert that to a
hashtable. Since the initial implementation of dma-buf/prime, we now
have resizeable hashtables we can use (and now a future task is to RCU
enable the lookup!). However, this patch opts to use an rbtree instead
to provide O(lgN) lookups (and insertion, deletion). rbtrees were chosen
over using the RCU backed resizable hashtable to firstly avoid the
reallocations (rbtrees can be embedded entirely within the parent
struct) and to favour simpler code with predictable worst case
behaviour. In simple testing, the difference between using the constant
lookup and insertion of the rhashtable and the rbtree was less than 10%
of the wall time (igt/benchmarks/prime_lookup) - both are dramatic
improvements over the existing linear lists.
v2: Favour rbtree over rhashtable
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94631
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20160926204414.23222-1-chris@chris-wilson.co.uk
(cherry picked from commit 077675c1e8a193a6355d4a7c8c7bf63be310b472)
---
drivers/gpu/drm/drm_prime.c | 85 +++++++++++++++++++++++++++++++++++++++------
include/drm/drmP.h | 5 +--
2 files changed, 77 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index d8d85286764d..4c49e736bc9c 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -28,6 +28,7 @@
#include <linux/export.h>
#include <linux/dma-buf.h>
+#include <linux/rbtree.h>
#include <drm/drmP.h>
#include <drm/drm_gem.h>
@@ -61,9 +62,11 @@
*/
struct drm_prime_member {
- struct list_head entry;
struct dma_buf *dma_buf;
uint32_t handle;
+
+ struct rb_node dmabuf_rb;
+ struct rb_node handle_rb;
};
struct drm_prime_attachment {
@@ -75,6 +78,7 @@ static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv,
struct dma_buf *dma_buf, uint32_t handle)
{
struct drm_prime_member *member;
+ struct rb_node **p, *rb;
member = kmalloc(sizeof(*member), GFP_KERNEL);
if (!member)
@@ -83,18 +87,56 @@ static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv,
get_dma_buf(dma_buf);
member->dma_buf = dma_buf;
member->handle = handle;
- list_add(&member->entry, &prime_fpriv->head);
+
+ rb = NULL;
+ p = &prime_fpriv->dmabufs.rb_node;
+ while (*p) {
+ struct drm_prime_member *pos;
+
+ rb = *p;
+ pos = rb_entry(rb, struct drm_prime_member, dmabuf_rb);
+ if (dma_buf > pos->dma_buf)
+ p = &rb->rb_right;
+ else
+ p = &rb->rb_left;
+ }
+ rb_link_node(&member->dmabuf_rb, rb, p);
+ rb_insert_color(&member->dmabuf_rb, &prime_fpriv->dmabufs);
+
+ rb = NULL;
+ p = &prime_fpriv->handles.rb_node;
+ while (*p) {
+ struct drm_prime_member *pos;
+
+ rb = *p;
+ pos = rb_entry(rb, struct drm_prime_member, handle_rb);
+ if (handle > pos->handle)
+ p = &rb->rb_right;
+ else
+ p = &rb->rb_left;
+ }
+ rb_link_node(&member->handle_rb, rb, p);
+ rb_insert_color(&member->handle_rb, &prime_fpriv->handles);
+
return 0;
}
static struct dma_buf *drm_prime_lookup_buf_by_handle(struct drm_prime_file_private *prime_fpriv,
uint32_t handle)
{
- struct drm_prime_member *member;
+ struct rb_node *rb;
+
+ rb = prime_fpriv->handles.rb_node;
+ while (rb) {
+ struct drm_prime_member *member;
- list_for_each_entry(member, &prime_fpriv->head, entry) {
+ member = rb_entry(rb, struct drm_prime_member, handle_rb);
if (member->handle == handle)
return member->dma_buf;
+ else if (member->handle < handle)
+ rb = rb->rb_right;
+ else
+ rb = rb->rb_left;
}
return NULL;
@@ -104,14 +146,23 @@ static int drm_prime_lookup_buf_handle(struct drm_prime_file_private *prime_fpri
struct dma_buf *dma_buf,
uint32_t *handle)
{
- struct drm_prime_member *member;
+ struct rb_node *rb;
+
+ rb = prime_fpriv->dmabufs.rb_node;
+ while (rb) {
+ struct drm_prime_member *member;
- list_for_each_entry(member, &prime_fpriv->head, entry) {
+ member = rb_entry(rb, struct drm_prime_member, dmabuf_rb);
if (member->dma_buf == dma_buf) {
*handle = member->handle;
return 0;
+ } else if (member->dma_buf < dma_buf) {
+ rb = rb->rb_right;
+ } else {
+ rb = rb->rb_left;
}
}
+
return -ENOENT;
}
@@ -166,13 +217,24 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf,
void drm_prime_remove_buf_handle_locked(struct drm_prime_file_private *prime_fpriv,
struct dma_buf *dma_buf)
{
- struct drm_prime_member *member, *safe;
+ struct rb_node *rb;
- list_for_each_entry_safe(member, safe, &prime_fpriv->head, entry) {
+ rb = prime_fpriv->dmabufs.rb_node;
+ while (rb) {
+ struct drm_prime_member *member;
+
+ member = rb_entry(rb, struct drm_prime_member, dmabuf_rb);
if (member->dma_buf == dma_buf) {
+ rb_erase(&member->handle_rb, &prime_fpriv->handles);
+ rb_erase(&member->dmabuf_rb, &prime_fpriv->dmabufs);
+
dma_buf_put(dma_buf);
- list_del(&member->entry);
kfree(member);
+ return;
+ } else if (member->dma_buf < dma_buf) {
+ rb = rb->rb_right;
+ } else {
+ rb = rb->rb_left;
}
}
}
@@ -794,12 +856,13 @@ EXPORT_SYMBOL(drm_prime_gem_destroy);
void drm_prime_init_file_private(struct drm_prime_file_private *prime_fpriv)
{
- INIT_LIST_HEAD(&prime_fpriv->head);
mutex_init(&prime_fpriv->lock);
+ prime_fpriv->dmabufs = RB_ROOT;
+ prime_fpriv->handles = RB_ROOT;
}
void drm_prime_destroy_file_private(struct drm_prime_file_private *prime_fpriv)
{
/* by now drm_gem_release should've made sure the list is empty */
- WARN_ON(!list_empty(&prime_fpriv->head));
+ WARN_ON(!RB_EMPTY_ROOT(&prime_fpriv->dmabufs));
}
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 04edcd32b409..93da65df2e7e 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -51,6 +51,7 @@
#include <linux/platform_device.h>
#include <linux/poll.h>
#include <linux/ratelimit.h>
+#include <linux/rbtree.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/types.h>
@@ -365,10 +366,10 @@ struct drm_pending_event {
void (*destroy)(struct drm_pending_event *event);
};
-/* initial implementaton using a linked list - todo hashtab */
struct drm_prime_file_private {
- struct list_head head;
struct mutex lock;
+ struct rb_root dmabufs;
+ struct rb_root handles;
};
/** File private data */
From f977098a9a02ac2df267eafe860370cb4c407d69 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 5 Oct 2016 13:21:44 +0100
Subject: [PATCH] UPSTREAM: drm/prime: Take a ref on the drm_dev when exporting
a dma_buf
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
dma_buf may live a long time, longer than the last direct user of the
driver. We already hold a reference to the owner module (that prevents
the object code from disappearing), but there is no reference to the
drm_dev - so the pointers to the driver backend themselves may vanish.
v2: Resist temptation to fix the bug in armada_gem.c not setting the
correct flags on the exported dma-buf (it should pass the flags through
and not be arbitrarily setting O_RDWR).
Use a common wrapper for exporting the dmabuf and acquiring the
reference to the drm_device.
Testcase: igt/vgem_basic/unload
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org
Tested-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161005122145.1507-2-chris@chris-wilson.co.uk
(cherry picked from commit a4fce9cb782ad340ee5576a38e934e5e75832dc6)
---
drivers/gpu/drm/armada/armada_gem.c | 2 +-
drivers/gpu/drm/drm_prime.c | 30 +++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 2 +-
drivers/gpu/drm/tegra/gem.c | 2 +-
drivers/gpu/drm/udl/udl_dmabuf.c | 2 +-
include/drm/drmP.h | 4 ++++
6 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_gem.c b/drivers/gpu/drm/armada/armada_gem.c
index 60a688ef81c7..cd5bb991f49a 100644
--- a/drivers/gpu/drm/armada/armada_gem.c
+++ b/drivers/gpu/drm/armada/armada_gem.c
@@ -546,7 +546,7 @@ armada_gem_prime_export(struct drm_device *dev, struct drm_gem_object *obj,
exp_info.flags = O_RDWR;
exp_info.priv = obj;
- return dma_buf_export(&exp_info);
+ return drm_gem_dmabuf_export(dev, &exp_info);
}
struct drm_gem_object *
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 4c49e736bc9c..94b4872255c8 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -283,19 +283,47 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
/* nothing to be done here */
}
+/**
+ * drm_gem_dmabuf_export - dma_buf export implementation for GEM
+ * @dma_buf: buffer to be exported
+ *
+ * This wraps dma_buf_export() for use by generic GEM drivers that are using
+ * drm_gem_dmabuf_release(). In addition to calling dma_buf_export(), we take
+ * a reference to the drm_device which is released by drm_gem_dmabuf_release().
+ *
+ * Returns the new dmabuf.
+ */
+struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
+ struct dma_buf_export_info *exp_info)
+{
+ struct dma_buf *dma_buf;
+
+ dma_buf = dma_buf_export(exp_info);
+ if (!IS_ERR(dma_buf))
+ drm_dev_ref(dev);
+
+ return dma_buf;
+}
+EXPORT_SYMBOL(drm_gem_dmabuf_export);
+
/**
* drm_gem_dmabuf_release - dma_buf release implementation for GEM
* @dma_buf: buffer to be released
*
* Generic release function for dma_bufs exported as PRIME buffers. GEM drivers
* must use this in their dma_buf ops structure as the release callback.
+ * drm_gem_dmabuf_release() should be used in conjunction with
+ * drm_gem_dmabuf_export().
*/
void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
{
struct drm_gem_object *obj = dma_buf->priv;
+ struct drm_device *dev = obj->dev;
/* drop the reference on the export fd holds */
drm_gem_object_unreference_unlocked(obj);
+
+ drm_dev_unref(dev);
}
EXPORT_SYMBOL(drm_gem_dmabuf_release);
@@ -444,7 +472,7 @@ struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
if (dev->driver->gem_prime_res_obj)
exp_info.resv = dev->driver->gem_prime_res_obj(obj);
- return dma_buf_export(&exp_info);
+ return drm_gem_dmabuf_export(dev, &exp_info);
}
EXPORT_SYMBOL(drm_gem_prime_export);
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index e9c2bfd85b52..d4a021629bd6 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -244,7 +244,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
return ERR_PTR(ret);
}
- return dma_buf_export(&exp_info);
+ return drm_gem_dmabuf_export(dev, &exp_info);
}
static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index 01e16e146bfe..da06f1c1ee0f 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -625,7 +625,7 @@ struct dma_buf *tegra_gem_prime_export(struct drm_device *drm,
exp_info.flags = flags;
exp_info.priv = gem;
- return dma_buf_export(&exp_info);
+ return drm_gem_dmabuf_export(drm, &exp_info);
}
struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm,
diff --git a/drivers/gpu/drm/udl/udl_dmabuf.c b/drivers/gpu/drm/udl/udl_dmabuf.c
index e2243edd1ce3..ac90ffdb5912 100644
--- a/drivers/gpu/drm/udl/udl_dmabuf.c
+++ b/drivers/gpu/drm/udl/udl_dmabuf.c
@@ -209,7 +209,7 @@ struct dma_buf *udl_gem_prime_export(struct drm_device *dev,
exp_info.flags = flags;
exp_info.priv = obj;
- return dma_buf_export(&exp_info);
+ return drm_gem_dmabuf_export(dev, &exp_info);
}
static int udl_prime_create(struct drm_device *dev,
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 93da65df2e7e..4aba6478d718 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1124,6 +1124,8 @@ static inline int drm_debugfs_remove_files(const struct drm_info_list *files,
}
#endif
+struct dma_buf_export_info;
+
extern struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
struct drm_gem_object *obj,
int flags);
@@ -1134,6 +1136,8 @@ extern struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
struct dma_buf *dma_buf);
extern int drm_gem_prime_fd_to_handle(struct drm_device *dev,
struct drm_file *file_priv, int prime_fd, uint32_t *handle);
+struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
+ struct dma_buf_export_info *exp_info);
extern void drm_gem_dmabuf_release(struct dma_buf *dma_buf);
extern int drm_prime_sg_to_page_addr_arrays(struct sg_table *sgt, struct page **pages,
From f30ee0d19425a6c21a9959513e482282ba08dd6a Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 7 Dec 2016 21:45:27 +0000
Subject: [PATCH] UPSTREAM: drm: Take ownership of the dmabuf->obj when
exporting
Currently the reference for the dmabuf->obj is incremented for the
dmabuf in drm_gem_prime_handle_to_fd() (at the high level userspace
interface), but is released in drm_gem_dmabuf_release() (the lowlevel
handler). Improve the symmetry of the dmabuf->obj ownership by acquiring
the reference in drm_gem_dmabuf_export(). This makes it easier to use
the prime functions directly.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Update kerneldoc.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161207214527.22533-1-chris@chris-wilson.co.uk
(cherry picked from commit 72a93e8dd52c9feea42f1258d555e6070680a347)
---
drivers/gpu/drm/drm_prime.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 94b4872255c8..dbd34fa7f71c 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -289,7 +289,8 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
*
* This wraps dma_buf_export() for use by generic GEM drivers that are using
* drm_gem_dmabuf_release(). In addition to calling dma_buf_export(), we take
- * a reference to the drm_device which is released by drm_gem_dmabuf_release().
+ * a reference to the &drm_device and the exported &drm_gem_object (stored in
+ * exp_info->priv) which is released by drm_gem_dmabuf_release().
*
* Returns the new dmabuf.
*/
@@ -299,8 +300,11 @@ struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
struct dma_buf *dma_buf;
dma_buf = dma_buf_export(exp_info);
- if (!IS_ERR(dma_buf))
- drm_dev_ref(dev);
+ if (IS_ERR(dma_buf))
+ return dma_buf;
+
+ drm_dev_ref(dev);
+ drm_gem_object_reference(exp_info->priv);
return dma_buf;
}
@@ -503,8 +507,6 @@ static struct dma_buf *export_and_register_object(struct drm_device *dev,
*/
obj->dma_buf = dmabuf;
get_dma_buf(obj->dma_buf);
- /* Grab a new ref since the callers is now used by the dma-buf */
- drm_gem_object_reference(obj);
return dmabuf;
}
From a1fe1ad6076ec27f60555a9393f40959cea94bff Mon Sep 17 00:00:00 2001
From: Lucas Stach <l.stach@pengutronix.de>
Date: Thu, 30 Nov 2017 18:34:28 +0100
Subject: [PATCH] UPSTREAM: drm/prime: skip CPU sync in map/unmap dma_buf
Dma-bufs should already be device coherent, as they are only pulled in the
CPU domain via the begin/end cpu_access calls. As we cache the mapping set
up by dma_map_sg a CPU sync at this point will not actually guarantee proper
coherency on non-coherent architectures, so we can as well stop pretending.
This is an important performance fix for architectures which need explicit
cache synchronization and userspace doing lots of dma-buf imports.
Improves Weston on Etnaviv performance 5x, where before this patch > 90%
of Weston CPU time was spent synchronizing caches for buffers which are
already device coherent.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20171130173428.8666-1-l.stach@pengutronix.de
(cherry picked from commit ca0e68e21aae10220eff71a297e7d794425add77)
---
drivers/gpu/drm/drm_prime.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index dbd34fa7f71c..133362279591 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -203,9 +203,12 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf,
sgt = prime_attach->sgt;
if (sgt) {
+ DEFINE_DMA_ATTRS(attrs);
+ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs);
if (prime_attach->dir != DMA_NONE)
- dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents,
- prime_attach->dir);
+ dma_unmap_sg_attrs(attach->dev, sgt->sgl, sgt->nents,
+ prime_attach->dir,
+ &attrs);
sg_free_table(sgt);
}
@@ -263,7 +266,9 @@ static struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
sgt = obj->dev->driver->gem_prime_get_sg_table(obj);
if (!IS_ERR(sgt)) {
- if (!dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir)) {
+ DEFINE_DMA_ATTRS(attrs);
+ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs);
+ if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir, &attrs)) {
sg_free_table(sgt);
kfree(sgt);
sgt = ERR_PTR(-ENOMEM);
From bdfc956545f8292cf462a7feee96d811f5d34414 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <ckoenig.leichtzumerken@gmail.com>
Date: Tue, 27 Feb 2018 12:49:56 +0100
Subject: [PATCH] UPSTREAM: drm/prime: fix potential race in drm_gem_map_detach
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Unpin the GEM object only after freeing the sg table.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-1-christian.koenig@amd.com
(cherry picked from commit 681066ec1d41e4b299146bada52cef846b323c04)
---
drivers/gpu/drm/drm_prime.c | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 133362279591..95ecc69d03a0 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -193,28 +193,28 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf,
struct drm_prime_attachment *prime_attach = attach->priv;
struct drm_gem_object *obj = dma_buf->priv;
struct drm_device *dev = obj->dev;
- struct sg_table *sgt;
-
- if (dev->driver->gem_prime_unpin)
- dev->driver->gem_prime_unpin(obj);
- if (!prime_attach)
- return;
+ if (prime_attach) {
+ struct sg_table *sgt = prime_attach->sgt;
+
+ if (sgt) {
+ DEFINE_DMA_ATTRS(attrs);
+ dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs);
+ if (prime_attach->dir != DMA_NONE)
+ dma_unmap_sg_attrs(attach->dev, sgt->sgl,
+ sgt->nents,
+ prime_attach->dir,
+ &attrs);
+ sg_free_table(sgt);
+ }
- sgt = prime_attach->sgt;
- if (sgt) {
- DEFINE_DMA_ATTRS(attrs);
- dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs);
- if (prime_attach->dir != DMA_NONE)
- dma_unmap_sg_attrs(attach->dev, sgt->sgl, sgt->nents,
- prime_attach->dir,
- &attrs);
- sg_free_table(sgt);
+ kfree(sgt);
+ kfree(prime_attach);
+ attach->priv = NULL;
}
- kfree(sgt);
- kfree(prime_attach);
- attach->priv = NULL;
+ if (dev->driver->gem_prime_unpin)
+ dev->driver->gem_prime_unpin(obj);
}
void drm_prime_remove_buf_handle_locked(struct drm_prime_file_private *prime_fpriv,
From 54f13f6370c654d59a9a5938e5953888a65c1980 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <ckoenig.leichtzumerken@gmail.com>
Date: Tue, 27 Feb 2018 12:49:57 +0100
Subject: [PATCH] UPSTREAM: drm/prime: make the pages array optional for
drm_prime_sg_to_page_addr_arrays
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Most of the time we only need the dma addresses.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-2-christian.koenig@amd.com
Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-3-christian.koenig@amd.com
Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-4-christian.koenig@amd.com
Link: https://patchwork.freedesktop.org/patch/msgid/20180227115000.4105-5-christian.koenig@amd.com
Link: https://patchwork.freedesktop.org/patch/msgid/BN6PR12MB18262C0DE9B5F07B9A42EAE7F2C60@BN6PR12MB1826.namprd12.prod.outlook.com
(cherry picked from commit 186ca446aea19e49d2e1433dd170c6e1c211a52a)
---
drivers/gpu/drm/drm_prime.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 95ecc69d03a0..7ea65c4105c1 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -827,40 +827,40 @@ EXPORT_SYMBOL(drm_prime_pages_to_sg);
/**
* drm_prime_sg_to_page_addr_arrays - convert an sg table into a page array
* @sgt: scatter-gather table to convert
- * @pages: array of page pointers to store the page array in
+ * @pages: optional array of page pointers to store the page array in
* @addrs: optional array to store the dma bus address of each page
- * @max_pages: size of both the passed-in arrays
+ * @max_entries: size of both the passed-in arrays
*
* Exports an sg table into an array of pages and addresses. This is currently
* required by the TTM driver in order to do correct fault handling.
*/
int drm_prime_sg_to_page_addr_arrays(struct sg_table *sgt, struct page **pages,
- dma_addr_t *addrs, int max_pages)
+ dma_addr_t *addrs, int max_entries)
{
unsigned count;
struct scatterlist *sg;
struct page *page;
- u32 len;
- int pg_index;
+ u32 len, index;
dma_addr_t addr;
- pg_index = 0;
+ index = 0;
for_each_sg(sgt->sgl, sg, sgt->nents, count) {
len = sg->length;
page = sg_page(sg);
addr = sg_dma_address(sg);
while (len > 0) {
- if (WARN_ON(pg_index >= max_pages))
+ if (WARN_ON(index >= max_entries))
return -1;
- pages[pg_index] = page;
+ if (pages)
+ pages[index] = page;
if (addrs)
- addrs[pg_index] = addr;
+ addrs[index] = addr;
page++;
addr += PAGE_SIZE;
len -= PAGE_SIZE;
- pg_index++;
+ index++;
}
}
return 0;
From c5e39a7e46511dffadabea97e3d74310561d1ba0 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Sat, 19 Aug 2017 13:05:58 +0100
Subject: [PATCH] UPSTREAM: drm: Release driver tracking before making the
object available again
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This is the same bug as we fixed in commit f6cd7daecff5 ("drm: Release
driver references to handle before making it available again"), but now
the exposure is via the PRIME lookup tables. If we remove the
object/handle from the PRIME lut, then a new request for the same
object/fd will generate a new handle, thus for a short window that
object is known to userspace by two different handles. Fix this by
releasing the driver tracking before PRIME.
Fixes: 0ff926c7d4f0 ("drm/prime: add exported buffers to current fprivs
imported buffer list (v2)")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170819120558.6465-1-chris@chris-wilson.co.uk
(cherry picked from commit d0a133f7f5bc3583e460ba6bb54474a50ada5201)
---
drivers/gpu/drm/drm_gem.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index d7f39a03c2c9..966ea63581b1 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -255,13 +255,13 @@ drm_gem_object_release_handle(int id, void *ptr, void *data)
struct drm_gem_object *obj = ptr;
struct drm_device *dev = obj->dev;
+ if (dev->driver->gem_close_object)
+ dev->driver->gem_close_object(obj, file_priv);
+
if (drm_core_check_feature(dev, DRIVER_PRIME))
drm_gem_remove_prime_handles(obj, file_priv);
drm_vma_node_revoke(&obj->vma_node, file_priv->filp);
- if (dev->driver->gem_close_object)
- dev->driver->gem_close_object(obj, file_priv);
-
drm_gem_object_handle_unreference_unlocked(obj);
return 0;
From 42f26aa9c8d429886b0af174b740f72741e571e2 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 17 Feb 2018 05:30:36 +0100
Subject: [PATCH] vcodec: skip reduce freq
---
drivers/video/rockchip/vcodec/vcodec_service.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/rockchip/vcodec/vcodec_service.c b/drivers/video/rockchip/vcodec/vcodec_service.c
index 0f177d9ab4c2..903ea8554649 100644
--- a/drivers/video/rockchip/vcodec/vcodec_service.c
+++ b/drivers/video/rockchip/vcodec/vcodec_service.c
@@ -1602,9 +1602,6 @@ static void try_set_reg(struct vpu_subdev_data *data)
reg_from_wait_to_run(pservice, reg);
reg_copy_to_hw(reg->data, reg);
}
- } else {
- if (pservice->hw_ops->reduce_freq)
- pservice->hw_ops->reduce_freq(pservice);
}
mutex_unlock(&pservice->shutdown_lock);
@@ -2353,6 +2350,7 @@ static void vcodec_set_freq_rk3328(struct vpu_service_info *pservice,
if (curr == reg->freq)
return;
+ atomic_set(&pservice->freq_status, reg->freq);
if (pservice->dev_id == VCODEC_DEVICE_ID_RKVDEC) {
if (reg->reg[1] & 0x00800000) {
if (rkv_dec_get_fmt(reg->reg) == FMT_H264D)