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gpu-sunxi-midgard: Initial package

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This commit is contained in:
Jernej Skrabec 2018-12-02 08:39:37 +01:00
parent a54e52af18
commit 5273f88996
9 changed files with 2266 additions and 0 deletions
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27
packages/linux-drivers/gpu-sunxi-midgard/package.mk Normal file
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# SPDX-License-Identifier: GPL-2.0
# Copyright (C) 2018-present Team LibreELEC (https://libreelec.tv)
PKG_NAME="gpu-sunxi-midgard"
PKG_VERSION="r22p0-01rel0"
PKG_SHA256="02f80e777dc945d645fce888afc926555ec61b70079c1da289bf1a3a9544452f"
PKG_ARCH="arm aarch64"
PKG_LICENSE="GPL"
PKG_SITE="https://developer.arm.com/products/software/mali-drivers/"
PKG_URL="https://developer.arm.com/-/media/Files/downloads/mali-drivers/kernel/mali-midgard-gpu/TX011-SW-99002-$PKG_VERSION.tgz"
PKG_DEPENDS_TARGET="toolchain linux"
PKG_NEED_UNPACK="$LINUX_DEPENDS"
PKG_LONGDESC="gpu-sunxi-midgard: Linux drivers for Mali GPUs found in Allwinner SoCs"
PKG_TOOLCHAIN="manual"
PKG_IS_KERNEL_PKG="yes"
make_target() {
kernel_make -C $(kernel_path) M=$PKG_BUILD/driver/product/kernel/drivers/gpu/arm/midgard/ \
EXTRA_CFLAGS="-DCONFIG_MALI_PLATFORM_DEVICETREE -DCONFIG_MALI_BACKEND=gpu -DCONFIG_MALI_DEVFREQ" CONFIG_MALI_DEVFREQ=y \
CONFIG_MALI_MIDGARD=m CONFIG_MALI_PLATFORM_DEVICETREE=y CONFIG_MALI_BACKEND=gpu modules
}
makeinstall_target() {
kernel_make -C $(kernel_path) M=$PKG_BUILD/driver/product/kernel/drivers/gpu/arm/midgard/ \
INSTALL_MOD_PATH=$INSTALL/$(get_kernel_overlay_dir) INSTALL_MOD_STRIP=1 DEPMOD=: \
modules_install
}

89
packages/linux-drivers/gpu-sunxi-midgard/patches/01-add-bus-clk-and-reset.patch Normal file
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@ -0,0 +1,89 @@
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c 2018-03-06 18:05:25.000000000 +0100
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c 2018-04-04 22:26:50.310273475 +0200
@@ -3225,6 +3225,20 @@
}
#endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
+ kbdev->mali_rst = of_reset_control_get_by_index(kbdev->dev->of_node, 0);
+ if (IS_ERR(kbdev->mali_rst)) {
+ dev_err(kbdev->dev, "Couldn't get mali reset line\n");
+ err = PTR_ERR(kbdev->mali_rst);
+ goto fail;
+ }
+
+ kbdev->bus_clk = of_clk_get(kbdev->dev->of_node, 1);
+ if (IS_ERR(kbdev->bus_clk)) {
+ dev_err(kbdev->dev, "Couldn't get the mali bus clock\n");
+ err = PTR_ERR(kbdev->bus_clk);
+ goto fail;
+ }
+
kbdev->clock = of_clk_get(kbdev->dev->of_node, 0);
if (IS_ERR_OR_NULL(kbdev->clock)) {
err = PTR_ERR(kbdev->clock);
@@ -3236,6 +3250,8 @@
dev_info(kbdev->dev, "Continuing without Mali clock control\n");
/* Allow probe to continue without clock. */
} else {
+ reset_control_deassert(kbdev->mali_rst);
+ clk_prepare_enable(kbdev->bus_clk);
err = clk_prepare_enable(kbdev->clock);
if (err) {
dev_err(kbdev->dev,
@@ -3268,6 +3284,16 @@
kbdev->clock = NULL;
}
+if (kbdev->bus_clk) {
+ clk_put(kbdev->bus_clk);
+ kbdev->bus_clk = NULL;
+}
+
+if (kbdev->mali_rst) {
+ reset_control_put(kbdev->mali_rst);
+ kbdev->mali_rst = NULL;
+}
+
#ifdef CONFIG_REGULATOR
if (NULL != kbdev->regulator) {
regulator_put(kbdev->regulator);
@@ -3293,6 +3319,18 @@
kbdev->clock = NULL;
}
+ if (kbdev->bus_clk) {
+ clk_disable_unprepare(kbdev->bus_clk);
+ clk_put(kbdev->bus_clk);
+ kbdev->bus_clk = NULL;
+ }
+
+ if (kbdev->mali_rst) {
+ reset_control_assert(kbdev->mali_rst);
+ reset_control_put(kbdev->mali_rst);
+ kbdev->mali_rst = NULL;
+ }
+
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 12, 0)) && defined(CONFIG_OF) \
&& defined(CONFIG_REGULATOR)
if (kbdev->regulator) {
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h 2018-03-06 18:05:25.000000000 +0100
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h 2018-04-04 22:05:56.017916193 +0200
@@ -68,6 +68,7 @@
#endif /* CONFIG_MALI_DEVFREQ */
#include <linux/clk.h>
+#include <linux/reset.h>
#include <linux/regulator/consumer.h>
#if defined(CONFIG_PM_RUNTIME) || \
@@ -1434,6 +1435,8 @@
} irqs[3];
struct clk *clock;
+ struct clk *bus_clk;
+ struct reset_control *mali_rst;
#ifdef CONFIG_REGULATOR
struct regulator *regulator;
#endif

1880
packages/linux-drivers/gpu-sunxi-midgard/patches/02-restore-old-api.patch Normal file
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98
packages/linux-drivers/gpu-sunxi-midgard/patches/03-gpu-arm-Midgard-setup_timer-timer_setup.patch Normal file
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From ee7f0a678fff8316ec0be973f1b3780a63f50942 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 11 Dec 2017 21:04:56 +0100
Subject: [PATCH] gpu: arm: Midgard: setup_timer() -> timer_setup()
This patch is due the changes provoked by series of commit ending
at 513ae785c63c30741e46f43960213d4ae5382ec0, and removing the
setup_timer macros.
The previous patches replaced made sure that timers were all set
up with setup_timer and replaced setup_timer calls by timer_setup
calls.
This changed was introduced in the 4.15-rc1.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase.h | 2 +-
drivers/gpu/arm/midgard/mali_kbase_context.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_softjobs.c | 4 ++--
drivers/gpu/arm/midgard/mali_kbase_tlstream.c | 6 ++----
4 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase.h b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase.h
index a4ceab9e0..27bde3b71 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase.h
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase.h
@@ -213,7 +213,7 @@ int kbase_soft_event_update(struct kbase_context *kctx,
bool kbase_replay_process(struct kbase_jd_atom *katom);
-void kbasep_soft_job_timeout_worker(unsigned long data);
+void kbasep_soft_job_timeout_worker(struct timer_list *t);
void kbasep_complete_triggered_soft_events(struct kbase_context *kctx, u64 evt);
/* api used internally for register access. Contains validation and tracing */
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_context.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_context.c
index f43db48fd..589df768c 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_context.c
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_context.c
@@ -165,9 +165,9 @@ kbase_create_context(struct kbase_device *kbdev, bool is_compat)
mutex_init(&kctx->vinstr_cli_lock);
- setup_timer(&kctx->soft_job_timeout,
+ timer_setup(&kctx->soft_job_timeout,
kbasep_soft_job_timeout_worker,
- (uintptr_t)kctx);
+ 0);
return kctx;
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
index 127ada07f..019edf562 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
@@ -370,9 +370,9 @@ static void kbase_fence_debug_timeout(struct kbase_jd_atom *katom)
}
#endif /* CONFIG_MALI_FENCE_DEBUG */
-void kbasep_soft_job_timeout_worker(unsigned long data)
+void kbasep_soft_job_timeout_worker(struct timer_list *t)
{
- struct kbase_context *kctx = (struct kbase_context *)data;
+ struct kbase_context *kctx = from_timer(kctx, t, soft_job_timeout);
u32 timeout_ms = (u32)atomic_read(
&kctx->kbdev->js_data.soft_job_timeout_ms);
struct timer_list *timer = &kctx->soft_job_timeout;
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_tlstream.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
index d01aa23b2..11d8b59c7 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
@@ -1042,13 +1042,11 @@ static void kbasep_tlstream_flush_stream(enum tl_stream_type stype)
* Timer is executed periodically to check if any of the stream contains
* buffer ready to be submitted to user space.
*/
-static void kbasep_tlstream_autoflush_timer_callback(unsigned long data)
+static void kbasep_tlstream_autoflush_timer_callback(struct timer_list *unused)
{
enum tl_stream_type stype;
int rcode;
- CSTD_UNUSED(data);
-
for (stype = 0; stype < TL_STREAM_TYPE_COUNT; stype++) {
struct tl_stream *stream = tl_stream[stype];
unsigned long flags;
@@ -1371,7 +1369,7 @@ int kbase_tlstream_init(void)
/* Initialize autoflush timer. */
atomic_set(&autoflush_timer_active, 0);
- setup_timer(&autoflush_timer,
+ timer_setup(&autoflush_timer,
kbasep_tlstream_autoflush_timer_callback,
0);
--
2.14.1

35
packages/linux-drivers/gpu-sunxi-midgard/patches/04-drivers-gpu-Arm-Midgard-Replace-ACCESS_ONCE-by-READ_.patch Normal file
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@ -0,0 +1,35 @@
From 44a5ba2e969adfb64c84f294c16490194988dcc7 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 24 Dec 2017 19:30:12 +0100
Subject: [PATCH] drivers: gpu: Arm: Midgard: Replace ACCESS_ONCE by READ_ONCE
The ACCESS_ONCE macro has now been removed in the 4.15.0-rc4,
and every ACCESS_ONCE call has been replaced by either READ_ONCE or
WRITE_ONCE calls.
Since the Midgard GPU drivers are not mainlined, the change
needs to be applied manually.
See commit b899a850431e2dd0943205a63a68573f3e312d0d and its parents,
for more informations.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_mem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h
index e9a8d5dd6..eac685699 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h
@@ -591,7 +591,7 @@ void kbase_mem_pool_free_pages(struct kbase_mem_pool *pool, size_t nr_pages,
*/
static inline size_t kbase_mem_pool_size(struct kbase_mem_pool *pool)
{
- return ACCESS_ONCE(pool->cur_size);
+ return READ_ONCE(pool->cur_size);
}
/**
--
2.14.1

32
packages/linux-drivers/gpu-sunxi-midgard/patches/05-gpu-arm-midgard-Remove-sys_close-references.patch Normal file
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@ -0,0 +1,32 @@
From 47e8aad9419ff8843a373c3e5aa2c9d261d8cd07 Mon Sep 17 00:00:00 2001
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Mon, 23 Apr 2018 20:54:13 +0200
Subject: [PATCH] gpu: arm: midgard: Remove sys_close references
sys_close is now replaced by ksys_close in an effort to remove
in-kernel system calls references.
See 2ca2a09d6215fd9621aa3e2db7cc9428a61f2911 and
https://lkml.org/lkml/2018/3/25/93 for more details.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
drivers/gpu/arm/midgard/mali_kbase_sync.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h b/drivers/gpu/arm/midgard/mali_kbase_sync.h
index de72147d..33b58059 100644
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h
@@ -156,7 +156,7 @@ void kbase_sync_fence_out_remove(struct kbase_jd_atom *katom);
*/
static inline void kbase_sync_fence_close_fd(int fd)
{
- sys_close(fd);
+ ksys_close(fd);
}
/**
--
2.14.1

60
packages/linux-drivers/gpu-sunxi-midgard/patches/06-fix-4.20-build.patch Normal file
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@ -0,0 +1,60 @@
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c c/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c 2018-12-01 17:49:08.000000000 +0100
+++ c/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c 2018-12-01 20:27:42.057964019 +0100
@@ -1668,6 +1668,7 @@
struct kbase_cpu_mapping *map = vma->vm_private_data;
pgoff_t rel_pgoff;
size_t i;
+ int ret = VM_FAULT_SIGBUS;
pgoff_t addr;
KBASE_DEBUG_ASSERT(map);
@@ -1693,9 +1694,9 @@
addr = (pgoff_t)(vmf->address >> PAGE_SHIFT);
#endif
while (i < map->alloc->nents && (addr < vma->vm_end >> PAGE_SHIFT)) {
- int ret = vm_insert_pfn(vma, addr << PAGE_SHIFT,
+ ret = vmf_insert_pfn(vma, addr << PAGE_SHIFT,
PFN_DOWN(as_phys_addr_t(map->alloc->pages[i])));
- if (ret < 0 && ret != -EBUSY)
+ if (unlikely(ret & VM_FAULT_ERROR))
goto locked_bad_fault;
i++; addr++;
@@ -1707,7 +1708,7 @@
locked_bad_fault:
kbase_gpu_vm_unlock(map->kctx);
- return VM_FAULT_SIGBUS;
+ return ret;
}
const struct vm_operations_struct kbase_vm_ops = {
@@ -1776,10 +1777,11 @@
phys_addr_t phys;
phys = as_phys_addr_t(page_array[i + start_off]);
- err = vm_insert_pfn(vma, addr, PFN_DOWN(phys));
- if (WARN_ON(err))
+ err = vmf_insert_pfn(vma, addr, PFN_DOWN(phys));
+ if (unlikely(WARN_ON(err & VM_FAULT_ERROR)))
break;
+ err = 0;
addr += PAGE_SIZE;
}
} else {
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c c/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c 2018-01-13 23:26:00.000000000 +0100
+++ c/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c 2018-12-01 20:03:30.071690693 +0100
@@ -27,6 +27,10 @@
#include <linux/compiler.h>
+#ifndef __asmeq
+#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
+#endif
+
static noinline u64 invoke_smc_fid(u64 function_id,
u64 arg0, u64 arg1, u64 arg2)
{

30
packages/linux-drivers/gpu-sunxi-midgard/patches/07-some-fixes.patch Normal file
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@ -0,0 +1,30 @@
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c 2018-12-01 21:10:15.000000000 +0100
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c 2018-12-01 23:28:48.956901556 +0100
@@ -3815,12 +3815,18 @@
"Continuing without Mali regulator control\n");
/* Allow probe to continue without regulator */
}
+ err = regulator_enable(kbdev->regulator);
+ if (err) {
+ dev_err(kbdev->dev, "Failed to enable regulator\n");
+ return err;
+ }
#endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
kbdev->mali_rst = of_reset_control_get_by_index(kbdev->dev->of_node, 0);
if (IS_ERR(kbdev->mali_rst)) {
dev_err(kbdev->dev, "Couldn't get mali reset line\n");
err = PTR_ERR(kbdev->mali_rst);
+ kbdev->mali_rst = NULL;
goto fail;
}
@@ -3828,6 +3834,7 @@
if (IS_ERR(kbdev->bus_clk)) {
dev_err(kbdev->dev, "Couldn't get the mali bus clock\n");
err = PTR_ERR(kbdev->bus_clk);
+ kbdev->bus_clk = NULL;
goto fail;
}

15
packages/linux-drivers/gpu-sunxi-midgard/patches/08-fix-building-with-5.0.patch Normal file
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@ -0,0 +1,15 @@
diff -Nur a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
--- a/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c 2019-02-09 23:20:20.000000000 +0100
+++ b/driver/product/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c 2019-02-10 08:26:47.874751287 +0100
@@ -243,7 +243,11 @@
/* Populate the base_gpu_props structure */
kbase_gpuprops_update_core_props_gpu_id(gpu_props);
gpu_props->core_props.log2_program_counter_size = KBASE_GPU_PC_SIZE_LOG2;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,0,0)
+ gpu_props->core_props.gpu_available_memory_size = totalram_pages() << PAGE_SHIFT;
+#else
gpu_props->core_props.gpu_available_memory_size = totalram_pages << PAGE_SHIFT;
+#endif
for (i = 0; i < BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS; i++)
gpu_props->core_props.texture_features[i] = gpu_props->raw_props.texture_features[i];