mirror of
https://github.com/LibreELEC/LibreELEC.tv.git
synced 2025-07-29 21:56:42 +00:00
Merge pull request #6131 from jernejsk/vp9-test
This commit is contained in:
commit
6827b2cdf0
File diff suppressed because it is too large
Load Diff
@ -3309,6 +3309,8 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
# CONFIG_VIDEO_ADV_DEBUG is not set
|
||||
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
|
||||
CONFIG_VIDEO_TUNER=m
|
||||
CONFIG_V4L2_H264=m
|
||||
CONFIG_V4L2_VP9=m
|
||||
CONFIG_V4L2_MEM2MEM_DEV=y
|
||||
CONFIG_V4L2_FWNODE=m
|
||||
CONFIG_V4L2_ASYNC=m
|
||||
@ -5158,6 +5160,8 @@ CONFIG_R8188EU=m
|
||||
# end of IIO staging drivers
|
||||
|
||||
CONFIG_STAGING_MEDIA=y
|
||||
CONFIG_VIDEO_HANTRO=m
|
||||
CONFIG_VIDEO_HANTRO_SUNXI=y
|
||||
CONFIG_VIDEO_SUNXI=y
|
||||
CONFIG_VIDEO_SUNXI_CEDRUS=y
|
||||
|
||||
|
@ -0,0 +1,31 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Tue, 5 Oct 2021 17:22:04 +0200
|
||||
Subject: [PATCH] drm/sun4i: virtual CMA addresses are not needed
|
||||
|
||||
Driver never uses virtual address of DRM CMA buffers. Switch to CMA
|
||||
helpers which don't deal with virtual mapping.
|
||||
|
||||
This was actually already the case before commit ad408c766cef
|
||||
("drm/sun4i: Use DRM_GEM_CMA_VMAP_DRIVER_OPS for GEM operations"),
|
||||
but only convenient macro at the time used helpers with virtual
|
||||
mapping.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c
|
||||
index 54dd562e294c..b630614b3d72 100644
|
||||
--- a/drivers/gpu/drm/sun4i/sun4i_drv.c
|
||||
+++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
|
||||
@@ -53,7 +53,7 @@ static const struct drm_driver sun4i_drv_driver = {
|
||||
.minor = 0,
|
||||
|
||||
/* GEM Operations */
|
||||
- DRM_GEM_CMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create),
|
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+ DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create),
|
||||
};
|
||||
|
||||
static int sun4i_drv_bind(struct device *dev)
|
@ -0,0 +1,42 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:31 +0100
|
||||
Subject: [PATCH] hantro: postproc: Fix motion vector space size
|
||||
|
||||
When the post-processor hardware block is enabled, the driver
|
||||
allocates an internal queue of buffers for the decoder enginer,
|
||||
and uses the vb2 queue for the post-processor engine.
|
||||
|
||||
For instance, on a G1 core, the decoder engine produces NV12 buffers
|
||||
and the post-processor engine can produce YUY2 buffers. The decoder
|
||||
engine expects motion vectors to be appended to the NV12 buffers,
|
||||
but this is only required for CODECs that need motion vectors,
|
||||
such as H.264.
|
||||
|
||||
Fix the post-processor logic accordingly.
|
||||
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro_postproc.c | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
index ed8916c950a4..07842152003f 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_postproc.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
@@ -132,9 +132,10 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx)
|
||||
unsigned int num_buffers = cap_queue->num_buffers;
|
||||
unsigned int i, buf_size;
|
||||
|
||||
- buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage +
|
||||
- hantro_h264_mv_size(ctx->dst_fmt.width,
|
||||
- ctx->dst_fmt.height);
|
||||
+ buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage;
|
||||
+ if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE)
|
||||
+ buf_size += hantro_h264_mv_size(ctx->dst_fmt.width,
|
||||
+ ctx->dst_fmt.height);
|
||||
|
||||
for (i = 0; i < num_buffers; ++i) {
|
||||
struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i];
|
@ -0,0 +1,229 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:32 +0100
|
||||
Subject: [PATCH] hantro: postproc: Introduce struct hantro_postproc_ops
|
||||
|
||||
Turns out the post-processor block on the G2 core is substantially
|
||||
different from the one on the G1 core. Introduce hantro_postproc_ops
|
||||
with .enable and .disable methods, which will allow to support
|
||||
the G2 post-processor cleanly.
|
||||
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 5 +--
|
||||
drivers/staging/media/hantro/hantro_hw.h | 13 ++++++-
|
||||
.../staging/media/hantro/hantro_postproc.c | 35 +++++++++++++------
|
||||
drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +-
|
||||
.../staging/media/hantro/rockchip_vpu_hw.c | 6 ++--
|
||||
.../staging/media/hantro/sama5d4_vdec_hw.c | 2 +-
|
||||
6 files changed, 45 insertions(+), 18 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index c2e2dca38628..c2e01959dc00 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -28,6 +28,7 @@
|
||||
|
||||
struct hantro_ctx;
|
||||
struct hantro_codec_ops;
|
||||
+struct hantro_postproc_ops;
|
||||
|
||||
#define HANTRO_JPEG_ENCODER BIT(0)
|
||||
#define HANTRO_ENCODERS 0x0000ffff
|
||||
@@ -59,6 +60,7 @@ struct hantro_irq {
|
||||
* @num_dec_fmts: Number of decoder formats.
|
||||
* @postproc_fmts: Post-processor formats.
|
||||
* @num_postproc_fmts: Number of post-processor formats.
|
||||
+ * @postproc_ops: Post-processor ops.
|
||||
* @codec: Supported codecs
|
||||
* @codec_ops: Codec ops.
|
||||
* @init: Initialize hardware, optional.
|
||||
@@ -69,7 +71,6 @@ struct hantro_irq {
|
||||
* @num_clocks: number of clocks in the array
|
||||
* @reg_names: array of register range names
|
||||
* @num_regs: number of register range names in the array
|
||||
- * @postproc_regs: &struct hantro_postproc_regs pointer
|
||||
*/
|
||||
struct hantro_variant {
|
||||
unsigned int enc_offset;
|
||||
@@ -80,6 +81,7 @@ struct hantro_variant {
|
||||
unsigned int num_dec_fmts;
|
||||
const struct hantro_fmt *postproc_fmts;
|
||||
unsigned int num_postproc_fmts;
|
||||
+ const struct hantro_postproc_ops *postproc_ops;
|
||||
unsigned int codec;
|
||||
const struct hantro_codec_ops *codec_ops;
|
||||
int (*init)(struct hantro_dev *vpu);
|
||||
@@ -90,7 +92,6 @@ struct hantro_variant {
|
||||
int num_clocks;
|
||||
const char * const *reg_names;
|
||||
int num_regs;
|
||||
- const struct hantro_postproc_regs *postproc_regs;
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
|
||||
index 267a6d33a47b..2f85430682d8 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_hw.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_hw.h
|
||||
@@ -174,6 +174,17 @@ struct hantro_postproc_ctx {
|
||||
struct hantro_aux_buf dec_q[VB2_MAX_FRAME];
|
||||
};
|
||||
|
||||
+/**
|
||||
+ * struct hantro_postproc_ops - post-processor operations
|
||||
+ *
|
||||
+ * @enable: Enable the post-processor block. Optional.
|
||||
+ * @disable: Disable the post-processor block. Optional.
|
||||
+ */
|
||||
+struct hantro_postproc_ops {
|
||||
+ void (*enable)(struct hantro_ctx *ctx);
|
||||
+ void (*disable)(struct hantro_ctx *ctx);
|
||||
+};
|
||||
+
|
||||
/**
|
||||
* struct hantro_codec_ops - codec mode specific operations
|
||||
*
|
||||
@@ -221,7 +232,7 @@ extern const struct hantro_variant rk3328_vpu_variant;
|
||||
extern const struct hantro_variant rk3399_vpu_variant;
|
||||
extern const struct hantro_variant sama5d4_vdec_variant;
|
||||
|
||||
-extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
|
||||
+extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
|
||||
|
||||
extern const u32 hantro_vp8_dec_mc_filter[8][6];
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
index 07842152003f..882fb8bc5ddd 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_postproc.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
@@ -15,14 +15,14 @@
|
||||
#define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \
|
||||
{ \
|
||||
hantro_reg_write(vpu, \
|
||||
- &(vpu)->variant->postproc_regs->reg_name, \
|
||||
+ &hantro_g1_postproc_regs.reg_name, \
|
||||
val); \
|
||||
}
|
||||
|
||||
#define HANTRO_PP_REG_WRITE_S(vpu, reg_name, val) \
|
||||
{ \
|
||||
hantro_reg_write_s(vpu, \
|
||||
- &(vpu)->variant->postproc_regs->reg_name, \
|
||||
+ &hantro_g1_postproc_regs.reg_name, \
|
||||
val); \
|
||||
}
|
||||
|
||||
@@ -64,16 +64,13 @@ bool hantro_needs_postproc(const struct hantro_ctx *ctx,
|
||||
return fmt->fourcc != V4L2_PIX_FMT_NV12;
|
||||
}
|
||||
|
||||
-void hantro_postproc_enable(struct hantro_ctx *ctx)
|
||||
+static void hantro_postproc_g1_enable(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
struct vb2_v4l2_buffer *dst_buf;
|
||||
u32 src_pp_fmt, dst_pp_fmt;
|
||||
dma_addr_t dst_dma;
|
||||
|
||||
- if (!vpu->variant->postproc_regs)
|
||||
- return;
|
||||
-
|
||||
/* Turn on pipeline mode. Must be done first. */
|
||||
HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x1);
|
||||
|
||||
@@ -154,12 +151,30 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx)
|
||||
return 0;
|
||||
}
|
||||
|
||||
-void hantro_postproc_disable(struct hantro_ctx *ctx)
|
||||
+static void hantro_postproc_g1_disable(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
|
||||
- if (!vpu->variant->postproc_regs)
|
||||
- return;
|
||||
-
|
||||
HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0);
|
||||
}
|
||||
+
|
||||
+void hantro_postproc_disable(struct hantro_ctx *ctx)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = ctx->dev;
|
||||
+
|
||||
+ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->disable)
|
||||
+ vpu->variant->postproc_ops->disable(ctx);
|
||||
+}
|
||||
+
|
||||
+void hantro_postproc_enable(struct hantro_ctx *ctx)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = ctx->dev;
|
||||
+
|
||||
+ if (vpu->variant->postproc_ops && vpu->variant->postproc_ops->enable)
|
||||
+ vpu->variant->postproc_ops->enable(ctx);
|
||||
+}
|
||||
+
|
||||
+const struct hantro_postproc_ops hantro_g1_postproc_ops = {
|
||||
+ .enable = hantro_postproc_g1_enable,
|
||||
+ .disable = hantro_postproc_g1_disable,
|
||||
+};
|
||||
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
index ea919bfb9891..22fa7d2f3b64 100644
|
||||
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
@@ -262,7 +262,7 @@ const struct hantro_variant imx8mq_vpu_variant = {
|
||||
.num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts),
|
||||
.postproc_fmts = imx8m_vpu_postproc_fmts,
|
||||
.num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts),
|
||||
- .postproc_regs = &hantro_g1_postproc_regs,
|
||||
+ .postproc_ops = &hantro_g1_postproc_ops,
|
||||
.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
|
||||
HANTRO_H264_DECODER,
|
||||
.codec_ops = imx8mq_vpu_codec_ops,
|
||||
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
index d4f52957cc53..6c1ad5534ce5 100644
|
||||
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
@@ -460,7 +460,7 @@ const struct hantro_variant rk3036_vpu_variant = {
|
||||
.num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts),
|
||||
.postproc_fmts = rockchip_vpu1_postproc_fmts,
|
||||
.num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts),
|
||||
- .postproc_regs = &hantro_g1_postproc_regs,
|
||||
+ .postproc_ops = &hantro_g1_postproc_ops,
|
||||
.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
|
||||
HANTRO_H264_DECODER,
|
||||
.codec_ops = rk3036_vpu_codec_ops,
|
||||
@@ -485,7 +485,7 @@ const struct hantro_variant rk3066_vpu_variant = {
|
||||
.num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts),
|
||||
.postproc_fmts = rockchip_vpu1_postproc_fmts,
|
||||
.num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts),
|
||||
- .postproc_regs = &hantro_g1_postproc_regs,
|
||||
+ .postproc_ops = &hantro_g1_postproc_ops,
|
||||
.codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |
|
||||
HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
|
||||
.codec_ops = rk3066_vpu_codec_ops,
|
||||
@@ -505,7 +505,7 @@ const struct hantro_variant rk3288_vpu_variant = {
|
||||
.num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts),
|
||||
.postproc_fmts = rockchip_vpu1_postproc_fmts,
|
||||
.num_postproc_fmts = ARRAY_SIZE(rockchip_vpu1_postproc_fmts),
|
||||
- .postproc_regs = &hantro_g1_postproc_regs,
|
||||
+ .postproc_ops = &hantro_g1_postproc_ops,
|
||||
.codec = HANTRO_JPEG_ENCODER | HANTRO_MPEG2_DECODER |
|
||||
HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
|
||||
.codec_ops = rk3288_vpu_codec_ops,
|
||||
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
index 9c3b8cd0b239..f3fecc7248c4 100644
|
||||
--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
@@ -100,7 +100,7 @@ const struct hantro_variant sama5d4_vdec_variant = {
|
||||
.num_dec_fmts = ARRAY_SIZE(sama5d4_vdec_fmts),
|
||||
.postproc_fmts = sama5d4_vdec_postproc_fmts,
|
||||
.num_postproc_fmts = ARRAY_SIZE(sama5d4_vdec_postproc_fmts),
|
||||
- .postproc_regs = &hantro_g1_postproc_regs,
|
||||
+ .postproc_ops = &hantro_g1_postproc_ops,
|
||||
.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
|
||||
HANTRO_H264_DECODER,
|
||||
.codec_ops = sama5d4_vdec_codec_ops,
|
@ -0,0 +1,97 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:33 +0100
|
||||
Subject: [PATCH] hantro: Simplify postprocessor
|
||||
|
||||
Add a 'postprocessed' boolean property to struct hantro_fmt
|
||||
to signal that a format is produced by the post-processor.
|
||||
This will allow to introduce the G2 post-processor in a simple way.
|
||||
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 2 ++
|
||||
drivers/staging/media/hantro/hantro_postproc.c | 8 +-------
|
||||
drivers/staging/media/hantro/imx8m_vpu_hw.c | 1 +
|
||||
drivers/staging/media/hantro/rockchip_vpu_hw.c | 1 +
|
||||
drivers/staging/media/hantro/sama5d4_vdec_hw.c | 1 +
|
||||
5 files changed, 6 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index c2e01959dc00..dd5e56765d4e 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -263,6 +263,7 @@ struct hantro_ctx {
|
||||
* @max_depth: Maximum depth, for bitstream formats
|
||||
* @enc_fmt: Format identifier for encoder registers.
|
||||
* @frmsize: Supported range of frame sizes (only for bitstream formats).
|
||||
+ * @postprocessed: Indicates if this format needs the post-processor.
|
||||
*/
|
||||
struct hantro_fmt {
|
||||
char *name;
|
||||
@@ -272,6 +273,7 @@ struct hantro_fmt {
|
||||
int max_depth;
|
||||
enum hantro_enc_fmt enc_fmt;
|
||||
struct v4l2_frmsize_stepwise frmsize;
|
||||
+ bool postprocessed;
|
||||
};
|
||||
|
||||
struct hantro_reg {
|
||||
diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
index 882fb8bc5ddd..4549aec08feb 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_postproc.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
@@ -53,15 +53,9 @@ const struct hantro_postproc_regs hantro_g1_postproc_regs = {
|
||||
bool hantro_needs_postproc(const struct hantro_ctx *ctx,
|
||||
const struct hantro_fmt *fmt)
|
||||
{
|
||||
- struct hantro_dev *vpu = ctx->dev;
|
||||
-
|
||||
if (ctx->is_encoder)
|
||||
return false;
|
||||
-
|
||||
- if (!vpu->variant->postproc_fmts)
|
||||
- return false;
|
||||
-
|
||||
- return fmt->fourcc != V4L2_PIX_FMT_NV12;
|
||||
+ return fmt->postprocessed;
|
||||
}
|
||||
|
||||
static void hantro_postproc_g1_enable(struct hantro_ctx *ctx)
|
||||
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
index 22fa7d2f3b64..02e61438220a 100644
|
||||
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
@@ -82,6 +82,7 @@ static const struct hantro_fmt imx8m_vpu_postproc_fmts[] = {
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_YUYV,
|
||||
.codec_mode = HANTRO_MODE_NONE,
|
||||
+ .postprocessed = true,
|
||||
},
|
||||
};
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
index 6c1ad5534ce5..f372f767d4ff 100644
|
||||
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
@@ -62,6 +62,7 @@ static const struct hantro_fmt rockchip_vpu1_postproc_fmts[] = {
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_YUYV,
|
||||
.codec_mode = HANTRO_MODE_NONE,
|
||||
+ .postprocessed = true,
|
||||
},
|
||||
};
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/sama5d4_vdec_hw.c b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
index f3fecc7248c4..b2fc1c5613e1 100644
|
||||
--- a/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
+++ b/drivers/staging/media/hantro/sama5d4_vdec_hw.c
|
||||
@@ -15,6 +15,7 @@ static const struct hantro_fmt sama5d4_vdec_postproc_fmts[] = {
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_YUYV,
|
||||
.codec_mode = HANTRO_MODE_NONE,
|
||||
+ .postprocessed = true,
|
||||
},
|
||||
};
|
||||
|
@ -0,0 +1,65 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:34 +0100
|
||||
Subject: [PATCH] hantro: Add quirk for NV12/NV12_4L4 capture format
|
||||
|
||||
The G2 core decoder engine produces NV12_4L4 format,
|
||||
which is a simple NV12 4x4 tiled format. The driver currently
|
||||
hides this format by always enabling the post-processor engine,
|
||||
and therefore offering NV12 directly.
|
||||
|
||||
This is done without using the logic in hantro_postproc.c
|
||||
and therefore makes it difficult to add VP9 cleanly.
|
||||
|
||||
Since fixing this is not easy, add a small quirk to force
|
||||
NV12 if HEVC was configured, but otherwise declare NV12_4L4
|
||||
as the pixel format in imx8mq_vpu_g2_variant.dec_fmts.
|
||||
|
||||
This will be used by the VP9 decoder which will be added soon.
|
||||
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro_v4l2.c | 14 ++++++++++++++
|
||||
drivers/staging/media/hantro/imx8m_vpu_hw.c | 2 +-
|
||||
2 files changed, 15 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c
|
||||
index bcb0bdff4a9a..d1f060c55fed 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_v4l2.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_v4l2.c
|
||||
@@ -150,6 +150,20 @@ static int vidioc_enum_fmt(struct file *file, void *priv,
|
||||
unsigned int num_fmts, i, j = 0;
|
||||
bool skip_mode_none;
|
||||
|
||||
+ /*
|
||||
+ * The HEVC decoder on the G2 core needs a little quirk to offer NV12
|
||||
+ * only on the capture side. Once the post-processor logic is used,
|
||||
+ * we will be able to expose NV12_4L4 and NV12 as the other cases,
|
||||
+ * and therefore remove this quirk.
|
||||
+ */
|
||||
+ if (capture && ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) {
|
||||
+ if (f->index == 0) {
|
||||
+ f->pixelformat = V4L2_PIX_FMT_NV12;
|
||||
+ return 0;
|
||||
+ }
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
/*
|
||||
* When dealing with an encoder:
|
||||
* - on the capture side we want to filter out all MODE_NONE formats.
|
||||
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
index 02e61438220a..a40b161e5956 100644
|
||||
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
@@ -134,7 +134,7 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
|
||||
|
||||
static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = {
|
||||
{
|
||||
- .fourcc = V4L2_PIX_FMT_NV12,
|
||||
+ .fourcc = V4L2_PIX_FMT_NV12_4L4,
|
||||
.codec_mode = HANTRO_MODE_NONE,
|
||||
},
|
||||
{
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,138 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:38 +0100
|
||||
Subject: [PATCH] media: hantro: Rename registers
|
||||
|
||||
Add more consistency in the way registers are named.
|
||||
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
.../staging/media/hantro/hantro_g2_hevc_dec.c | 40 +++++++++----------
|
||||
drivers/staging/media/hantro/hantro_g2_regs.h | 28 ++++++-------
|
||||
2 files changed, 34 insertions(+), 34 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
index 76a921163b9a..abae36f9b418 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
@@ -448,9 +448,9 @@ static int set_ref(struct hantro_ctx *ctx)
|
||||
if (dpb[i].rps == V4L2_HEVC_DPB_ENTRY_RPS_LT_CURR)
|
||||
dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i);
|
||||
|
||||
- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr);
|
||||
- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr);
|
||||
- hantro_write_addr(vpu, G2_REG_DMV_REF(i), mv_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), mv_addr);
|
||||
}
|
||||
|
||||
luma_addr = hantro_hevc_get_ref_buf(ctx, decode_params->pic_order_cnt_val);
|
||||
@@ -460,20 +460,20 @@ static int set_ref(struct hantro_ctx *ctx)
|
||||
chroma_addr = luma_addr + cr_offset;
|
||||
mv_addr = luma_addr + mv_offset;
|
||||
|
||||
- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), luma_addr);
|
||||
- hantro_write_addr(vpu, G2_REG_CHR_REF(i), chroma_addr);
|
||||
- hantro_write_addr(vpu, G2_REG_DMV_REF(i++), mv_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), luma_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), chroma_addr);
|
||||
+ hantro_write_addr(vpu, G2_REF_MV_ADDR(i++), mv_addr);
|
||||
|
||||
- hantro_write_addr(vpu, G2_ADDR_DST, luma_addr);
|
||||
- hantro_write_addr(vpu, G2_ADDR_DST_CHR, chroma_addr);
|
||||
- hantro_write_addr(vpu, G2_ADDR_DST_MV, mv_addr);
|
||||
+ hantro_write_addr(vpu, G2_OUT_LUMA_ADDR, luma_addr);
|
||||
+ hantro_write_addr(vpu, G2_OUT_CHROMA_ADDR, chroma_addr);
|
||||
+ hantro_write_addr(vpu, G2_OUT_MV_ADDR, mv_addr);
|
||||
|
||||
hantro_hevc_ref_remove_unused(ctx);
|
||||
|
||||
for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) {
|
||||
- hantro_write_addr(vpu, G2_REG_ADDR_REF(i), 0);
|
||||
- hantro_write_addr(vpu, G2_REG_CHR_REF(i), 0);
|
||||
- hantro_write_addr(vpu, G2_REG_DMV_REF(i), 0);
|
||||
+ hantro_write_addr(vpu, G2_REF_LUMA_ADDR(i), 0);
|
||||
+ hantro_write_addr(vpu, G2_REF_CHROMA_ADDR(i), 0);
|
||||
+ hantro_write_addr(vpu, G2_REF_MV_ADDR(i), 0);
|
||||
}
|
||||
|
||||
hantro_reg_write(vpu, &g2_refer_lterm_e, dpb_longterm_e);
|
||||
@@ -499,7 +499,7 @@ static void set_buffers(struct hantro_ctx *ctx)
|
||||
src_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
|
||||
src_buf_len = vb2_plane_size(&src_buf->vb2_buf, 0);
|
||||
|
||||
- hantro_write_addr(vpu, G2_ADDR_STR, src_dma);
|
||||
+ hantro_write_addr(vpu, G2_STREAM_ADDR, src_dma);
|
||||
hantro_reg_write(vpu, &g2_stream_len, src_len);
|
||||
hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
|
||||
hantro_reg_write(vpu, &g2_strm_start_offset, 0);
|
||||
@@ -508,12 +508,12 @@ static void set_buffers(struct hantro_ctx *ctx)
|
||||
/* Destination (decoded frame) buffer. */
|
||||
dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf);
|
||||
|
||||
- hantro_write_addr(vpu, G2_RASTER_SCAN, dst_dma);
|
||||
- hantro_write_addr(vpu, G2_RASTER_SCAN_CHR, dst_dma + cr_offset);
|
||||
- hantro_write_addr(vpu, G2_ADDR_TILE_SIZE, ctx->hevc_dec.tile_sizes.dma);
|
||||
- hantro_write_addr(vpu, G2_TILE_FILTER, ctx->hevc_dec.tile_filter.dma);
|
||||
- hantro_write_addr(vpu, G2_TILE_SAO, ctx->hevc_dec.tile_sao.dma);
|
||||
- hantro_write_addr(vpu, G2_TILE_BSD, ctx->hevc_dec.tile_bsd.dma);
|
||||
+ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma);
|
||||
+ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + cr_offset);
|
||||
+ hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
|
||||
+ hantro_write_addr(vpu, G2_TILE_FILTER_ADDR, ctx->hevc_dec.tile_filter.dma);
|
||||
+ hantro_write_addr(vpu, G2_TILE_SAO_ADDR, ctx->hevc_dec.tile_sao.dma);
|
||||
+ hantro_write_addr(vpu, G2_TILE_BSD_ADDR, ctx->hevc_dec.tile_bsd.dma);
|
||||
}
|
||||
|
||||
static void prepare_scaling_list_buffer(struct hantro_ctx *ctx)
|
||||
@@ -563,7 +563,7 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx)
|
||||
for (k = 0; k < 8; k++)
|
||||
*p++ = sc->scaling_list_32x32[i][8 * k + j];
|
||||
|
||||
- hantro_write_addr(vpu, HEVC_SCALING_LIST, ctx->hevc_dec.scaling_lists.dma);
|
||||
+ hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma);
|
||||
}
|
||||
|
||||
static void hantro_g2_check_idle(struct hantro_dev *vpu)
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
index bb22fa921914..24b18f839ff8 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
@@ -177,20 +177,20 @@
|
||||
#define G2_REG_CONFIG_DEC_CLK_GATE_E BIT(16)
|
||||
#define G2_REG_CONFIG_DEC_CLK_GATE_IDLE_E BIT(17)
|
||||
|
||||
-#define G2_ADDR_DST (G2_SWREG(65))
|
||||
-#define G2_REG_ADDR_REF(i) (G2_SWREG(67) + ((i) * 0x8))
|
||||
-#define G2_ADDR_DST_CHR (G2_SWREG(99))
|
||||
-#define G2_REG_CHR_REF(i) (G2_SWREG(101) + ((i) * 0x8))
|
||||
-#define G2_ADDR_DST_MV (G2_SWREG(133))
|
||||
-#define G2_REG_DMV_REF(i) (G2_SWREG(135) + ((i) * 0x8))
|
||||
-#define G2_ADDR_TILE_SIZE (G2_SWREG(167))
|
||||
-#define G2_ADDR_STR (G2_SWREG(169))
|
||||
-#define HEVC_SCALING_LIST (G2_SWREG(171))
|
||||
-#define G2_RASTER_SCAN (G2_SWREG(175))
|
||||
-#define G2_RASTER_SCAN_CHR (G2_SWREG(177))
|
||||
-#define G2_TILE_FILTER (G2_SWREG(179))
|
||||
-#define G2_TILE_SAO (G2_SWREG(181))
|
||||
-#define G2_TILE_BSD (G2_SWREG(183))
|
||||
+#define G2_OUT_LUMA_ADDR (G2_SWREG(65))
|
||||
+#define G2_REF_LUMA_ADDR(i) (G2_SWREG(67) + ((i) * 0x8))
|
||||
+#define G2_OUT_CHROMA_ADDR (G2_SWREG(99))
|
||||
+#define G2_REF_CHROMA_ADDR(i) (G2_SWREG(101) + ((i) * 0x8))
|
||||
+#define G2_OUT_MV_ADDR (G2_SWREG(133))
|
||||
+#define G2_REF_MV_ADDR(i) (G2_SWREG(135) + ((i) * 0x8))
|
||||
+#define G2_TILE_SIZES_ADDR (G2_SWREG(167))
|
||||
+#define G2_STREAM_ADDR (G2_SWREG(169))
|
||||
+#define G2_HEVC_SCALING_LIST_ADDR (G2_SWREG(171))
|
||||
+#define G2_RS_OUT_LUMA_ADDR (G2_SWREG(175))
|
||||
+#define G2_RS_OUT_CHROMA_ADDR (G2_SWREG(177))
|
||||
+#define G2_TILE_FILTER_ADDR (G2_SWREG(179))
|
||||
+#define G2_TILE_SAO_ADDR (G2_SWREG(181))
|
||||
+#define G2_TILE_BSD_ADDR (G2_SWREG(183))
|
||||
|
||||
#define g2_strm_buffer_len G2_DEC_REG(258, 0, 0xffffffff)
|
||||
#define g2_strm_start_offset G2_DEC_REG(259, 0, 0xffffffff)
|
@ -0,0 +1,178 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:39 +0100
|
||||
Subject: [PATCH] media: hantro: Prepare for other G2 codecs
|
||||
|
||||
VeriSilicon Hantro G2 core supports other codecs besides hevc.
|
||||
Factor out some common code in preparation for vp9 support.
|
||||
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/Makefile | 1 +
|
||||
drivers/staging/media/hantro/hantro.h | 7 +++++
|
||||
drivers/staging/media/hantro/hantro_drv.c | 5 +++
|
||||
drivers/staging/media/hantro/hantro_g2.c | 26 ++++++++++++++++
|
||||
.../staging/media/hantro/hantro_g2_hevc_dec.c | 31 -------------------
|
||||
drivers/staging/media/hantro/hantro_g2_regs.h | 7 +++++
|
||||
drivers/staging/media/hantro/hantro_hw.h | 2 ++
|
||||
7 files changed, 48 insertions(+), 31 deletions(-)
|
||||
create mode 100644 drivers/staging/media/hantro/hantro_g2.c
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
|
||||
index 90036831fec4..fe6d84871d07 100644
|
||||
--- a/drivers/staging/media/hantro/Makefile
|
||||
+++ b/drivers/staging/media/hantro/Makefile
|
||||
@@ -12,6 +12,7 @@ hantro-vpu-y += \
|
||||
hantro_g1_mpeg2_dec.o \
|
||||
hantro_g2_hevc_dec.o \
|
||||
hantro_g1_vp8_dec.o \
|
||||
+ hantro_g2.o \
|
||||
rockchip_vpu2_hw_jpeg_enc.o \
|
||||
rockchip_vpu2_hw_h264_dec.o \
|
||||
rockchip_vpu2_hw_mpeg2_dec.o \
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index dd5e56765d4e..d91eb2b1c509 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -369,6 +369,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
|
||||
writel(val, vpu->dec_base + reg);
|
||||
}
|
||||
|
||||
+static inline void hantro_write_addr(struct hantro_dev *vpu,
|
||||
+ unsigned long offset,
|
||||
+ dma_addr_t addr)
|
||||
+{
|
||||
+ vdpu_write(vpu, addr & 0xffffffff, offset);
|
||||
+}
|
||||
+
|
||||
static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
|
||||
{
|
||||
u32 val = readl(vpu->dec_base + reg);
|
||||
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
|
||||
index fb82b9297a2b..bb72e5e208b7 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_drv.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_drv.c
|
||||
@@ -907,6 +907,11 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset;
|
||||
vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset;
|
||||
|
||||
+ /**
|
||||
+ * TODO: Eventually allow taking advantage of full 64-bit address space.
|
||||
+ * Until then we assume the MSB portion of buffers' base addresses is
|
||||
+ * always 0 due to this masking operation.
|
||||
+ */
|
||||
ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
|
||||
if (ret) {
|
||||
dev_err(vpu->dev, "Could not set DMA coherent mask.\n");
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c
|
||||
new file mode 100644
|
||||
index 000000000000..6f3e1f797f83
|
||||
--- /dev/null
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2.c
|
||||
@@ -0,0 +1,26 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Hantro VPU codec driver
|
||||
+ *
|
||||
+ * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
+ */
|
||||
+
|
||||
+#include "hantro_hw.h"
|
||||
+#include "hantro_g2_regs.h"
|
||||
+
|
||||
+void hantro_g2_check_idle(struct hantro_dev *vpu)
|
||||
+{
|
||||
+ int i;
|
||||
+
|
||||
+ for (i = 0; i < 3; i++) {
|
||||
+ u32 status;
|
||||
+
|
||||
+ /* Make sure the VPU is idle */
|
||||
+ status = vdpu_read(vpu, G2_REG_INTERRUPT);
|
||||
+ if (status & G2_REG_INTERRUPT_DEC_E) {
|
||||
+ dev_warn(vpu->dev, "device still running, aborting");
|
||||
+ status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS;
|
||||
+ vdpu_write(vpu, status, G2_REG_INTERRUPT);
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
index abae36f9b418..f62608b0b408 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c
|
||||
@@ -8,20 +8,6 @@
|
||||
#include "hantro_hw.h"
|
||||
#include "hantro_g2_regs.h"
|
||||
|
||||
-#define HEVC_DEC_MODE 0xC
|
||||
-
|
||||
-#define BUS_WIDTH_32 0
|
||||
-#define BUS_WIDTH_64 1
|
||||
-#define BUS_WIDTH_128 2
|
||||
-#define BUS_WIDTH_256 3
|
||||
-
|
||||
-static inline void hantro_write_addr(struct hantro_dev *vpu,
|
||||
- unsigned long offset,
|
||||
- dma_addr_t addr)
|
||||
-{
|
||||
- vdpu_write(vpu, addr & 0xffffffff, offset);
|
||||
-}
|
||||
-
|
||||
static void prepare_tile_info_buffer(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
@@ -566,23 +552,6 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx)
|
||||
hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma);
|
||||
}
|
||||
|
||||
-static void hantro_g2_check_idle(struct hantro_dev *vpu)
|
||||
-{
|
||||
- int i;
|
||||
-
|
||||
- for (i = 0; i < 3; i++) {
|
||||
- u32 status;
|
||||
-
|
||||
- /* Make sure the VPU is idle */
|
||||
- status = vdpu_read(vpu, G2_REG_INTERRUPT);
|
||||
- if (status & G2_REG_INTERRUPT_DEC_E) {
|
||||
- dev_warn(vpu->dev, "device still running, aborting");
|
||||
- status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS;
|
||||
- vdpu_write(vpu, status, G2_REG_INTERRUPT);
|
||||
- }
|
||||
- }
|
||||
-}
|
||||
-
|
||||
int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
index 24b18f839ff8..136ba6d98a1f 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
@@ -27,6 +27,13 @@
|
||||
#define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4)
|
||||
#define G2_REG_INTERRUPT_DEC_E BIT(0)
|
||||
|
||||
+#define HEVC_DEC_MODE 0xc
|
||||
+
|
||||
+#define BUS_WIDTH_32 0
|
||||
+#define BUS_WIDTH_64 1
|
||||
+#define BUS_WIDTH_128 2
|
||||
+#define BUS_WIDTH_256 3
|
||||
+
|
||||
#define g2_strm_swap G2_DEC_REG(2, 28, 0xf)
|
||||
#define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
|
||||
index 2f85430682d8..1d869abf90b2 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_hw.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_hw.h
|
||||
@@ -312,4 +312,6 @@ void hantro_vp8_dec_exit(struct hantro_ctx *ctx);
|
||||
void hantro_vp8_prob_update(struct hantro_ctx *ctx,
|
||||
const struct v4l2_ctrl_vp8_frame *hdr);
|
||||
|
||||
+void hantro_g2_check_idle(struct hantro_dev *vpu);
|
||||
+
|
||||
#endif /* HANTRO_HW_H_ */
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,27 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:41 +0100
|
||||
Subject: [PATCH] media: hantro: Staticize a struct in postprocessor code
|
||||
|
||||
The struct is not used outside this file, so it can be static.
|
||||
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro_postproc.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
index 4549aec08feb..89de43021779 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_postproc.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
@@ -33,7 +33,7 @@
|
||||
#define VPU_PP_OUT_RGB 0x0
|
||||
#define VPU_PP_OUT_YUYV 0x3
|
||||
|
||||
-const struct hantro_postproc_regs hantro_g1_postproc_regs = {
|
||||
+static const struct hantro_postproc_regs hantro_g1_postproc_regs = {
|
||||
.pipeline_en = {G1_REG_PP_INTERRUPT, 1, 0x1},
|
||||
.max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f},
|
||||
.clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1},
|
@ -0,0 +1,161 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Date: Tue, 16 Nov 2021 15:38:42 +0100
|
||||
Subject: [PATCH] media: hantro: Support NV12 on the G2 core
|
||||
|
||||
The G2 decoder block produces NV12 4x4 tiled format (NV12_4L4).
|
||||
Enable the G2 post-processor block, in order to produce regular NV12.
|
||||
|
||||
The logic in hantro_postproc.c is leveraged to take care of allocating
|
||||
the extra buffers and configure the post-processor, which is
|
||||
significantly simpler than the one on the G1.
|
||||
|
||||
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
---
|
||||
.../staging/media/hantro/hantro_g2_vp9_dec.c | 6 ++--
|
||||
drivers/staging/media/hantro/hantro_hw.h | 1 +
|
||||
.../staging/media/hantro/hantro_postproc.c | 31 +++++++++++++++++++
|
||||
drivers/staging/media/hantro/imx8m_vpu_hw.c | 11 +++++++
|
||||
4 files changed, 46 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
index fc55b03a8004..e04242d10fa2 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
@@ -152,7 +152,7 @@ static void config_output(struct hantro_ctx *ctx,
|
||||
hantro_reg_write(ctx->dev, &g2_out_dis, 0);
|
||||
hantro_reg_write(ctx->dev, &g2_output_format, 0);
|
||||
|
||||
- luma_addr = vb2_dma_contig_plane_dma_addr(&dst->base.vb.vb2_buf, 0);
|
||||
+ luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf);
|
||||
hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr);
|
||||
|
||||
chroma_addr = luma_addr + chroma_offset(ctx, dec_params);
|
||||
@@ -191,7 +191,7 @@ static void config_ref(struct hantro_ctx *ctx,
|
||||
hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width);
|
||||
hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height);
|
||||
|
||||
- luma_addr = vb2_dma_contig_plane_dma_addr(&buf->base.vb.vb2_buf, 0);
|
||||
+ luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf);
|
||||
hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr);
|
||||
|
||||
chroma_addr = luma_addr + chroma_offset(ctx, dec_params);
|
||||
@@ -236,7 +236,7 @@ static void config_ref_registers(struct hantro_ctx *ctx,
|
||||
config_ref(ctx, dst, &ref_regs[1], dec_params, dec_params->golden_frame_ts);
|
||||
config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts);
|
||||
|
||||
- mv_addr = vb2_dma_contig_plane_dma_addr(&mv_ref->base.vb.vb2_buf, 0) +
|
||||
+ mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) +
|
||||
mv_offset(ctx, dec_params);
|
||||
hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr);
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
|
||||
index fe5b51046d33..dbe51303724b 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_hw.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_hw.h
|
||||
@@ -310,6 +310,7 @@ extern const struct hantro_variant rk3399_vpu_variant;
|
||||
extern const struct hantro_variant sama5d4_vdec_variant;
|
||||
|
||||
extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
|
||||
+extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
|
||||
|
||||
extern const u32 hantro_vp8_dec_mc_filter[8][6];
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
index 89de43021779..a7774ad4c445 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_postproc.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_postproc.c
|
||||
@@ -11,6 +11,7 @@
|
||||
#include "hantro.h"
|
||||
#include "hantro_hw.h"
|
||||
#include "hantro_g1_regs.h"
|
||||
+#include "hantro_g2_regs.h"
|
||||
|
||||
#define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \
|
||||
{ \
|
||||
@@ -99,6 +100,21 @@ static void hantro_postproc_g1_enable(struct hantro_ctx *ctx)
|
||||
HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width);
|
||||
}
|
||||
|
||||
+static void hantro_postproc_g2_enable(struct hantro_ctx *ctx)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = ctx->dev;
|
||||
+ struct vb2_v4l2_buffer *dst_buf;
|
||||
+ size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height;
|
||||
+ dma_addr_t dst_dma;
|
||||
+
|
||||
+ dst_buf = hantro_get_dst_buf(ctx);
|
||||
+ dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
|
||||
+
|
||||
+ hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma);
|
||||
+ hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset);
|
||||
+ hantro_reg_write(vpu, &g2_out_rs_e, 1);
|
||||
+}
|
||||
+
|
||||
void hantro_postproc_free(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
@@ -127,6 +143,9 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx)
|
||||
if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE)
|
||||
buf_size += hantro_h264_mv_size(ctx->dst_fmt.width,
|
||||
ctx->dst_fmt.height);
|
||||
+ else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME)
|
||||
+ buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width,
|
||||
+ ctx->dst_fmt.height);
|
||||
|
||||
for (i = 0; i < num_buffers; ++i) {
|
||||
struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i];
|
||||
@@ -152,6 +171,13 @@ static void hantro_postproc_g1_disable(struct hantro_ctx *ctx)
|
||||
HANTRO_PP_REG_WRITE_S(vpu, pipeline_en, 0x0);
|
||||
}
|
||||
|
||||
+static void hantro_postproc_g2_disable(struct hantro_ctx *ctx)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = ctx->dev;
|
||||
+
|
||||
+ hantro_reg_write(vpu, &g2_out_rs_e, 0);
|
||||
+}
|
||||
+
|
||||
void hantro_postproc_disable(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
@@ -172,3 +198,8 @@ const struct hantro_postproc_ops hantro_g1_postproc_ops = {
|
||||
.enable = hantro_postproc_g1_enable,
|
||||
.disable = hantro_postproc_g1_disable,
|
||||
};
|
||||
+
|
||||
+const struct hantro_postproc_ops hantro_g2_postproc_ops = {
|
||||
+ .enable = hantro_postproc_g2_enable,
|
||||
+ .disable = hantro_postproc_g2_disable,
|
||||
+};
|
||||
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
index 455a107ffb02..1a43f6fceef9 100644
|
||||
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
@@ -132,6 +132,14 @@ static const struct hantro_fmt imx8m_vpu_dec_fmts[] = {
|
||||
},
|
||||
};
|
||||
|
||||
+static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
|
||||
+ {
|
||||
+ .fourcc = V4L2_PIX_FMT_NV12,
|
||||
+ .codec_mode = HANTRO_MODE_NONE,
|
||||
+ .postprocessed = true,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = {
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_NV12_4L4,
|
||||
@@ -301,6 +309,9 @@ const struct hantro_variant imx8mq_vpu_g2_variant = {
|
||||
.dec_offset = 0x0,
|
||||
.dec_fmts = imx8m_vpu_g2_dec_fmts,
|
||||
.num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts),
|
||||
+ .postproc_fmts = imx8m_vpu_g2_postproc_fmts,
|
||||
+ .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_g2_postproc_fmts),
|
||||
+ .postproc_ops = &hantro_g2_postproc_ops,
|
||||
.codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER,
|
||||
.codec_ops = imx8mq_vpu_g2_codec_ops,
|
||||
.init = imx8mq_vpu_hw_init,
|
@ -0,0 +1,39 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Mon, 29 Nov 2021 18:31:35 +0100
|
||||
Subject: [PATCH] media: hantro: Fix probe func error path
|
||||
|
||||
If clocks for some reason couldn't be enabled, probe function returns
|
||||
immediately, without disabling PM. This obviously leaves PM ref counters
|
||||
unbalanced.
|
||||
|
||||
Fix that by jumping to appropriate error path, so effects of PM functions
|
||||
are reversed.
|
||||
|
||||
Fixes: 775fec69008d ("media: add Rockchip VPU JPEG encoder driver")
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro_drv.c | 3 ++-
|
||||
1 file changed, 2 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
|
||||
index ab2467998d29..3d3107a39dae 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_drv.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_drv.c
|
||||
@@ -981,7 +981,7 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to prepare clocks\n");
|
||||
- return ret;
|
||||
+ goto err_pm_disable;
|
||||
}
|
||||
|
||||
ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
|
||||
@@ -1037,6 +1037,7 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
v4l2_device_unregister(&vpu->v4l2_dev);
|
||||
err_clk_unprepare:
|
||||
clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
|
||||
+err_pm_disable:
|
||||
pm_runtime_dont_use_autosuspend(vpu->dev);
|
||||
pm_runtime_disable(vpu->dev);
|
||||
return ret;
|
@ -0,0 +1,92 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sat, 7 Aug 2021 17:29:11 +0200
|
||||
Subject: [PATCH] media: hantro: add support for reset lines
|
||||
|
||||
Some SoCs like Allwinner H6 use reset lines for resetting Hantro G2. Add
|
||||
support for them.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 3 +++
|
||||
drivers/staging/media/hantro/hantro_drv.c | 15 ++++++++++++++-
|
||||
2 files changed, 17 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index 7da23f7f207a..33eb3e092cc1 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -16,6 +16,7 @@
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/clk.h>
|
||||
+#include <linux/reset.h>
|
||||
|
||||
#include <media/v4l2-ctrls.h>
|
||||
#include <media/v4l2-device.h>
|
||||
@@ -171,6 +172,7 @@ hantro_vdev_to_func(struct video_device *vdev)
|
||||
* @dev: Pointer to device for convenient logging using
|
||||
* dev_ macros.
|
||||
* @clocks: Array of clock handles.
|
||||
+ * @resets: Array of reset handles.
|
||||
* @reg_bases: Mapped addresses of VPU registers.
|
||||
* @enc_base: Mapped address of VPU encoder register for convenience.
|
||||
* @dec_base: Mapped address of VPU decoder register for convenience.
|
||||
@@ -190,6 +192,7 @@ struct hantro_dev {
|
||||
struct platform_device *pdev;
|
||||
struct device *dev;
|
||||
struct clk_bulk_data *clocks;
|
||||
+ struct reset_control *resets;
|
||||
void __iomem **reg_bases;
|
||||
void __iomem *enc_base;
|
||||
void __iomem *dec_base;
|
||||
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
|
||||
index 3d3107a39dae..770f4ce71d29 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_drv.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_drv.c
|
||||
@@ -905,6 +905,10 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(vpu->clocks[0].clk);
|
||||
}
|
||||
|
||||
+ vpu->resets = devm_reset_control_array_get(&pdev->dev, false, true);
|
||||
+ if (IS_ERR(vpu->resets))
|
||||
+ return PTR_ERR(vpu->resets);
|
||||
+
|
||||
num_bases = vpu->variant->num_regs ?: 1;
|
||||
vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases,
|
||||
sizeof(*vpu->reg_bases), GFP_KERNEL);
|
||||
@@ -978,10 +982,16 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
pm_runtime_use_autosuspend(vpu->dev);
|
||||
pm_runtime_enable(vpu->dev);
|
||||
|
||||
+ ret = reset_control_deassert(vpu->resets);
|
||||
+ if (ret) {
|
||||
+ dev_err(&pdev->dev, "Failed to deassert resets\n");
|
||||
+ goto err_pm_disable;
|
||||
+ }
|
||||
+
|
||||
ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Failed to prepare clocks\n");
|
||||
- goto err_pm_disable;
|
||||
+ goto err_rst_assert;
|
||||
}
|
||||
|
||||
ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
|
||||
@@ -1037,6 +1047,8 @@ static int hantro_probe(struct platform_device *pdev)
|
||||
v4l2_device_unregister(&vpu->v4l2_dev);
|
||||
err_clk_unprepare:
|
||||
clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
|
||||
+err_rst_assert:
|
||||
+ reset_control_assert(vpu->resets);
|
||||
err_pm_disable:
|
||||
pm_runtime_dont_use_autosuspend(vpu->dev);
|
||||
pm_runtime_disable(vpu->dev);
|
||||
@@ -1056,6 +1068,7 @@ static int hantro_remove(struct platform_device *pdev)
|
||||
v4l2_m2m_release(vpu->m2m_dev);
|
||||
v4l2_device_unregister(&vpu->v4l2_dev);
|
||||
clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
|
||||
+ reset_control_assert(vpu->resets);
|
||||
pm_runtime_dont_use_autosuspend(vpu->dev);
|
||||
pm_runtime_disable(vpu->dev);
|
||||
return 0;
|
@ -0,0 +1,63 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sun, 21 Nov 2021 20:39:11 +0100
|
||||
Subject: [PATCH] media: hantro: vp9: use double buffering if needed
|
||||
|
||||
Some G2 variants need double buffering to be enabled in order to work
|
||||
correctly, like that found in Allwinner H6 SoC.
|
||||
|
||||
Add platform quirk for that.
|
||||
|
||||
Reviewed-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 2 ++
|
||||
drivers/staging/media/hantro/hantro_g2_regs.h | 1 +
|
||||
drivers/staging/media/hantro/hantro_g2_vp9_dec.c | 2 ++
|
||||
3 files changed, 5 insertions(+)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index 33eb3e092cc1..d03824fa3222 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -73,6 +73,7 @@ struct hantro_irq {
|
||||
* @num_clocks: number of clocks in the array
|
||||
* @reg_names: array of register range names
|
||||
* @num_regs: number of register range names in the array
|
||||
+ * @double_buffer: core needs double buffering
|
||||
*/
|
||||
struct hantro_variant {
|
||||
unsigned int enc_offset;
|
||||
@@ -94,6 +95,7 @@ struct hantro_variant {
|
||||
int num_clocks;
|
||||
const char * const *reg_names;
|
||||
int num_regs;
|
||||
+ unsigned int double_buffer : 1;
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
index 9c857dd1ad9b..15a391a4650e 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
@@ -270,6 +270,7 @@
|
||||
#define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff)
|
||||
|
||||
#define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1)
|
||||
+#define g2_double_buffer_e G2_DEC_REG(58, 15, 0x1)
|
||||
#define g2_buswidth G2_DEC_REG(58, 8, 0x7)
|
||||
#define g2_max_burst G2_DEC_REG(58, 0, 0xff)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
index e04242d10fa2..d4fc649a4da1 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
@@ -847,6 +847,8 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p
|
||||
hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1);
|
||||
hantro_reg_write(ctx->dev, &g2_max_cb_size, 6);
|
||||
hantro_reg_write(ctx->dev, &g2_min_cb_size, 3);
|
||||
+ if (ctx->dev->variant->double_buffer)
|
||||
+ hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1);
|
||||
|
||||
config_output(ctx, dst, dec_params);
|
||||
|
@ -0,0 +1,242 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Sun, 26 Sep 2021 19:47:03 +0200
|
||||
Subject: [PATCH] media: hantro: vp9: add support for legacy register set
|
||||
|
||||
Some older G2 cores uses slightly different register set for HEVC and
|
||||
VP9. Since vast majority of registers and logic is the same, it doesn't
|
||||
make sense to introduce another drivers.
|
||||
|
||||
Add legacy_regs quirk and implement only VP9 changes for now. HEVC
|
||||
changes will be introduced later, if needed.
|
||||
|
||||
Reviewed-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 2 +
|
||||
drivers/staging/media/hantro/hantro_g2_regs.h | 16 ++++
|
||||
.../staging/media/hantro/hantro_g2_vp9_dec.c | 74 ++++++++++++++-----
|
||||
3 files changed, 75 insertions(+), 17 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index d03824fa3222..83ed25d9657b 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -74,6 +74,7 @@ struct hantro_irq {
|
||||
* @reg_names: array of register range names
|
||||
* @num_regs: number of register range names in the array
|
||||
* @double_buffer: core needs double buffering
|
||||
+ * @legacy_regs: core uses legacy register set
|
||||
*/
|
||||
struct hantro_variant {
|
||||
unsigned int enc_offset;
|
||||
@@ -96,6 +97,7 @@ struct hantro_variant {
|
||||
const char * const *reg_names;
|
||||
int num_regs;
|
||||
unsigned int double_buffer : 1;
|
||||
+ unsigned int legacy_regs : 1;
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_regs.h b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
index 15a391a4650e..b7c6f9877b9d 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_regs.h
|
||||
@@ -36,7 +36,13 @@
|
||||
#define BUS_WIDTH_256 3
|
||||
|
||||
#define g2_strm_swap G2_DEC_REG(2, 28, 0xf)
|
||||
+#define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f)
|
||||
+#define g2_pic_swap G2_DEC_REG(2, 22, 0x1f)
|
||||
#define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf)
|
||||
+#define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f)
|
||||
+#define g2_tab0_swap_old G2_DEC_REG(2, 12, 0x1f)
|
||||
+#define g2_tab1_swap_old G2_DEC_REG(2, 7, 0x1f)
|
||||
+#define g2_tab2_swap_old G2_DEC_REG(2, 2, 0x1f)
|
||||
|
||||
#define g2_mode G2_DEC_REG(3, 27, 0x1f)
|
||||
#define g2_compress_swap G2_DEC_REG(3, 20, 0xf)
|
||||
@@ -45,6 +51,8 @@
|
||||
#define g2_out_dis G2_DEC_REG(3, 15, 0x1)
|
||||
#define g2_out_filtering_dis G2_DEC_REG(3, 14, 0x1)
|
||||
#define g2_write_mvs_e G2_DEC_REG(3, 12, 0x1)
|
||||
+#define g2_tab3_swap_old G2_DEC_REG(3, 7, 0x1f)
|
||||
+#define g2_rscan_swap G2_DEC_REG(3, 2, 0x1f)
|
||||
|
||||
#define g2_pic_width_in_cbs G2_DEC_REG(4, 19, 0x1fff)
|
||||
#define g2_pic_height_in_cbs G2_DEC_REG(4, 6, 0x1fff)
|
||||
@@ -58,6 +66,7 @@
|
||||
#define g2_tempor_mvp_e G2_DEC_REG(5, 11, 0x1)
|
||||
#define g2_max_cu_qpd_depth G2_DEC_REG(5, 5, 0x3f)
|
||||
#define g2_cu_qpd_e G2_DEC_REG(5, 4, 0x1)
|
||||
+#define g2_pix_shift G2_DEC_REG(5, 0, 0xf)
|
||||
|
||||
#define g2_stream_len G2_DEC_REG(6, 0, 0xffffffff)
|
||||
|
||||
@@ -80,21 +89,28 @@
|
||||
|
||||
#define g2_const_intra_e G2_DEC_REG(8, 31, 0x1)
|
||||
#define g2_filt_ctrl_pres G2_DEC_REG(8, 30, 0x1)
|
||||
+#define g2_bit_depth_y G2_DEC_REG(8, 21, 0xf)
|
||||
+#define g2_bit_depth_c G2_DEC_REG(8, 17, 0xf)
|
||||
#define g2_idr_pic_e G2_DEC_REG(8, 16, 0x1)
|
||||
#define g2_bit_depth_pcm_y G2_DEC_REG(8, 12, 0xf)
|
||||
#define g2_bit_depth_pcm_c G2_DEC_REG(8, 8, 0xf)
|
||||
#define g2_bit_depth_y_minus8 G2_DEC_REG(8, 6, 0x3)
|
||||
#define g2_bit_depth_c_minus8 G2_DEC_REG(8, 4, 0x3)
|
||||
+#define g2_rs_out_bit_depth G2_DEC_REG(8, 4, 0xf)
|
||||
#define g2_output_8_bits G2_DEC_REG(8, 3, 0x1)
|
||||
#define g2_output_format G2_DEC_REG(8, 0, 0x7)
|
||||
+#define g2_pp_pix_shift G2_DEC_REG(8, 0, 0xf)
|
||||
|
||||
#define g2_refidx1_active G2_DEC_REG(9, 19, 0x1f)
|
||||
#define g2_refidx0_active G2_DEC_REG(9, 14, 0x1f)
|
||||
#define g2_hdr_skip_length G2_DEC_REG(9, 0, 0x3fff)
|
||||
|
||||
#define g2_start_code_e G2_DEC_REG(10, 31, 0x1)
|
||||
+#define g2_init_qp_old G2_DEC_REG(10, 25, 0x3f)
|
||||
#define g2_init_qp G2_DEC_REG(10, 24, 0x3f)
|
||||
+#define g2_num_tile_cols_old G2_DEC_REG(10, 20, 0x1f)
|
||||
#define g2_num_tile_cols G2_DEC_REG(10, 19, 0x1f)
|
||||
+#define g2_num_tile_rows_old G2_DEC_REG(10, 15, 0x1f)
|
||||
#define g2_num_tile_rows G2_DEC_REG(10, 14, 0x1f)
|
||||
#define g2_tile_e G2_DEC_REG(10, 1, 0x1)
|
||||
#define g2_entropy_sync_e G2_DEC_REG(10, 0, 0x1)
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
index d4fc649a4da1..91c21b634fab 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c
|
||||
@@ -150,7 +150,8 @@ static void config_output(struct hantro_ctx *ctx,
|
||||
dma_addr_t luma_addr, chroma_addr, mv_addr;
|
||||
|
||||
hantro_reg_write(ctx->dev, &g2_out_dis, 0);
|
||||
- hantro_reg_write(ctx->dev, &g2_output_format, 0);
|
||||
+ if (!ctx->dev->variant->legacy_regs)
|
||||
+ hantro_reg_write(ctx->dev, &g2_output_format, 0);
|
||||
|
||||
luma_addr = hantro_get_dec_buf_addr(ctx, &dst->base.vb.vb2_buf);
|
||||
hantro_write_addr(ctx->dev, G2_OUT_LUMA_ADDR, luma_addr);
|
||||
@@ -327,6 +328,7 @@ config_tiles(struct hantro_ctx *ctx,
|
||||
struct hantro_aux_buf *tile_edge = &vp9_ctx->tile_edge;
|
||||
dma_addr_t addr;
|
||||
unsigned short *tile_mem;
|
||||
+ unsigned int rows, cols;
|
||||
|
||||
addr = misc->dma + vp9_ctx->tile_info_offset;
|
||||
hantro_write_addr(ctx->dev, G2_TILE_SIZES_ADDR, addr);
|
||||
@@ -344,17 +346,24 @@ config_tiles(struct hantro_ctx *ctx,
|
||||
|
||||
fill_tile_info(ctx, tile_r, tile_c, sbs_r, sbs_c, tile_mem);
|
||||
|
||||
+ cols = tile_c;
|
||||
+ rows = tile_r;
|
||||
hantro_reg_write(ctx->dev, &g2_tile_e, 1);
|
||||
- hantro_reg_write(ctx->dev, &g2_num_tile_cols, tile_c);
|
||||
- hantro_reg_write(ctx->dev, &g2_num_tile_rows, tile_r);
|
||||
-
|
||||
} else {
|
||||
tile_mem[0] = hantro_vp9_num_sbs(dst->vp9.width);
|
||||
tile_mem[1] = hantro_vp9_num_sbs(dst->vp9.height);
|
||||
|
||||
+ cols = 1;
|
||||
+ rows = 1;
|
||||
hantro_reg_write(ctx->dev, &g2_tile_e, 0);
|
||||
- hantro_reg_write(ctx->dev, &g2_num_tile_cols, 1);
|
||||
- hantro_reg_write(ctx->dev, &g2_num_tile_rows, 1);
|
||||
+ }
|
||||
+
|
||||
+ if (ctx->dev->variant->legacy_regs) {
|
||||
+ hantro_reg_write(ctx->dev, &g2_num_tile_cols_old, cols);
|
||||
+ hantro_reg_write(ctx->dev, &g2_num_tile_rows_old, rows);
|
||||
+ } else {
|
||||
+ hantro_reg_write(ctx->dev, &g2_num_tile_cols, cols);
|
||||
+ hantro_reg_write(ctx->dev, &g2_num_tile_rows, rows);
|
||||
}
|
||||
|
||||
/* provide aux buffers even if no tiles are used */
|
||||
@@ -505,8 +514,22 @@ static void config_picture_dimensions(struct hantro_ctx *ctx, struct hantro_deco
|
||||
static void
|
||||
config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params)
|
||||
{
|
||||
- hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8);
|
||||
- hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8);
|
||||
+ if (ctx->dev->variant->legacy_regs) {
|
||||
+ u8 pp_shift = 0;
|
||||
+
|
||||
+ hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth);
|
||||
+ hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth);
|
||||
+ hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth);
|
||||
+
|
||||
+ if (dec_params->bit_depth > 8)
|
||||
+ pp_shift = 16 - dec_params->bit_depth;
|
||||
+
|
||||
+ hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift);
|
||||
+ hantro_reg_write(ctx->dev, &g2_pix_shift, 0);
|
||||
+ } else {
|
||||
+ hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8);
|
||||
+ hantro_reg_write(ctx->dev, &g2_bit_depth_c_minus8, dec_params->bit_depth - 8);
|
||||
+ }
|
||||
}
|
||||
|
||||
static inline bool is_lossless(const struct v4l2_vp9_quantization *quant)
|
||||
@@ -784,9 +807,13 @@ config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_para
|
||||
+ dec_params->compressed_header_size;
|
||||
|
||||
stream_base = vb2_dma_contig_plane_dma_addr(&vb2_src->vb2_buf, 0);
|
||||
- hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base);
|
||||
|
||||
tmp_addr = stream_base + headres_size;
|
||||
+ if (ctx->dev->variant->legacy_regs)
|
||||
+ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, (tmp_addr & ~0xf));
|
||||
+ else
|
||||
+ hantro_write_addr(ctx->dev, G2_STREAM_ADDR, stream_base);
|
||||
+
|
||||
start_bit = (tmp_addr & 0xf) * 8;
|
||||
hantro_reg_write(ctx->dev, &g2_start_bit, start_bit);
|
||||
|
||||
@@ -794,10 +821,12 @@ config_source(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_para
|
||||
src_len += start_bit / 8 - headres_size;
|
||||
hantro_reg_write(ctx->dev, &g2_stream_len, src_len);
|
||||
|
||||
- tmp_addr &= ~0xf;
|
||||
- hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base);
|
||||
- src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0);
|
||||
- hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len);
|
||||
+ if (!ctx->dev->variant->legacy_regs) {
|
||||
+ tmp_addr &= ~0xf;
|
||||
+ hantro_reg_write(ctx->dev, &g2_strm_start_offset, tmp_addr - stream_base);
|
||||
+ src_buf_len = vb2_plane_size(&vb2_src->vb2_buf, 0);
|
||||
+ hantro_reg_write(ctx->dev, &g2_strm_buffer_len, src_buf_len);
|
||||
+ }
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -837,13 +866,24 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p
|
||||
|
||||
/* configure basic registers */
|
||||
hantro_reg_write(ctx->dev, &g2_mode, VP9_DEC_MODE);
|
||||
- hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf);
|
||||
- hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf);
|
||||
- hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf);
|
||||
+ if (!ctx->dev->variant->legacy_regs) {
|
||||
+ hantro_reg_write(ctx->dev, &g2_strm_swap, 0xf);
|
||||
+ hantro_reg_write(ctx->dev, &g2_dirmv_swap, 0xf);
|
||||
+ hantro_reg_write(ctx->dev, &g2_compress_swap, 0xf);
|
||||
+ hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1);
|
||||
+ } else {
|
||||
+ hantro_reg_write(ctx->dev, &g2_strm_swap_old, 0x1f);
|
||||
+ hantro_reg_write(ctx->dev, &g2_pic_swap, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_dirmv_swap_old, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_tab0_swap_old, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_tab1_swap_old, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_tab2_swap_old, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_tab3_swap_old, 0x10);
|
||||
+ hantro_reg_write(ctx->dev, &g2_rscan_swap, 0x10);
|
||||
+ }
|
||||
hantro_reg_write(ctx->dev, &g2_buswidth, BUS_WIDTH_128);
|
||||
hantro_reg_write(ctx->dev, &g2_max_burst, 16);
|
||||
hantro_reg_write(ctx->dev, &g2_apf_threshold, 8);
|
||||
- hantro_reg_write(ctx->dev, &g2_ref_compress_bypass, 1);
|
||||
hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1);
|
||||
hantro_reg_write(ctx->dev, &g2_max_cb_size, 6);
|
||||
hantro_reg_write(ctx->dev, &g2_min_cb_size, 3);
|
@ -0,0 +1,62 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Mon, 22 Nov 2021 18:33:14 +0100
|
||||
Subject: [PATCH] media: hantro: move postproc enablement for old cores
|
||||
|
||||
Older G2 cores, like that in Allwinner H6, seem to have issue with
|
||||
latching postproc register values if this is first thing done in job.
|
||||
Moving that to the end solves the issue.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro.h | 2 ++
|
||||
drivers/staging/media/hantro/hantro_drv.c | 9 ++++++++-
|
||||
2 files changed, 10 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
|
||||
index 83ed25d9657b..06d0f3597694 100644
|
||||
--- a/drivers/staging/media/hantro/hantro.h
|
||||
+++ b/drivers/staging/media/hantro/hantro.h
|
||||
@@ -75,6 +75,7 @@ struct hantro_irq {
|
||||
* @num_regs: number of register range names in the array
|
||||
* @double_buffer: core needs double buffering
|
||||
* @legacy_regs: core uses legacy register set
|
||||
+ * @late_postproc: postproc must be set up at the end of the job
|
||||
*/
|
||||
struct hantro_variant {
|
||||
unsigned int enc_offset;
|
||||
@@ -98,6 +99,7 @@ struct hantro_variant {
|
||||
int num_regs;
|
||||
unsigned int double_buffer : 1;
|
||||
unsigned int legacy_regs : 1;
|
||||
+ unsigned int late_postproc : 1;
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
|
||||
index 770f4ce71d29..33bf78be145b 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_drv.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_drv.c
|
||||
@@ -130,7 +130,7 @@ void hantro_start_prepare_run(struct hantro_ctx *ctx)
|
||||
v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
|
||||
&ctx->ctrl_handler);
|
||||
|
||||
- if (!ctx->is_encoder) {
|
||||
+ if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) {
|
||||
if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt))
|
||||
hantro_postproc_enable(ctx);
|
||||
else
|
||||
@@ -142,6 +142,13 @@ void hantro_end_prepare_run(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct vb2_v4l2_buffer *src_buf;
|
||||
|
||||
+ if (!ctx->is_encoder && ctx->dev->variant->late_postproc) {
|
||||
+ if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt))
|
||||
+ hantro_postproc_enable(ctx);
|
||||
+ else
|
||||
+ hantro_postproc_disable(ctx);
|
||||
+ }
|
||||
+
|
||||
src_buf = hantro_get_src_buf(ctx);
|
||||
v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
|
||||
&ctx->ctrl_handler);
|
@ -0,0 +1,92 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Mon, 29 Nov 2021 19:02:17 +0100
|
||||
Subject: [PATCH] media: hantro: Convert imx8m_vpu_g2_irq to helper
|
||||
|
||||
It turns out that imx8m_vpu_g2_irq() doesn't depend on any platform
|
||||
specifics and can be used with other G2 platform drivers too.
|
||||
|
||||
Move it to common code.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/hantro_g2.c | 18 ++++++++++++++++++
|
||||
drivers/staging/media/hantro/hantro_hw.h | 1 +
|
||||
drivers/staging/media/hantro/imx8m_vpu_hw.c | 20 +-------------------
|
||||
3 files changed, 20 insertions(+), 19 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/hantro_g2.c b/drivers/staging/media/hantro/hantro_g2.c
|
||||
index 6f3e1f797f83..ee5f14c5f8f2 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_g2.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_g2.c
|
||||
@@ -24,3 +24,21 @@ void hantro_g2_check_idle(struct hantro_dev *vpu)
|
||||
}
|
||||
}
|
||||
}
|
||||
+
|
||||
+irqreturn_t hantro_g2_irq(int irq, void *dev_id)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = dev_id;
|
||||
+ enum vb2_buffer_state state;
|
||||
+ u32 status;
|
||||
+
|
||||
+ status = vdpu_read(vpu, G2_REG_INTERRUPT);
|
||||
+ state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
|
||||
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
|
||||
+
|
||||
+ vdpu_write(vpu, 0, G2_REG_INTERRUPT);
|
||||
+ vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
|
||||
+
|
||||
+ hantro_irq_done(vpu, state);
|
||||
+
|
||||
+ return IRQ_HANDLED;
|
||||
+}
|
||||
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
|
||||
index dbe51303724b..c33b1f5df37b 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_hw.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_hw.h
|
||||
@@ -413,5 +413,6 @@ void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx);
|
||||
int hantro_vp9_dec_init(struct hantro_ctx *ctx);
|
||||
void hantro_vp9_dec_exit(struct hantro_ctx *ctx);
|
||||
void hantro_g2_check_idle(struct hantro_dev *vpu);
|
||||
+irqreturn_t hantro_g2_irq(int irq, void *dev_id);
|
||||
|
||||
#endif /* HANTRO_HW_H_ */
|
||||
diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
index 1a43f6fceef9..f5991b8e553a 100644
|
||||
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
|
||||
@@ -191,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
-static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id)
|
||||
-{
|
||||
- struct hantro_dev *vpu = dev_id;
|
||||
- enum vb2_buffer_state state;
|
||||
- u32 status;
|
||||
-
|
||||
- status = vdpu_read(vpu, G2_REG_INTERRUPT);
|
||||
- state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
|
||||
- VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
|
||||
-
|
||||
- vdpu_write(vpu, 0, G2_REG_INTERRUPT);
|
||||
- vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
|
||||
-
|
||||
- hantro_irq_done(vpu, state);
|
||||
-
|
||||
- return IRQ_HANDLED;
|
||||
-}
|
||||
-
|
||||
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
|
||||
{
|
||||
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
|
||||
@@ -280,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = {
|
||||
};
|
||||
|
||||
static const struct hantro_irq imx8mq_g2_irqs[] = {
|
||||
- { "g2", imx8m_vpu_g2_irq },
|
||||
+ { "g2", hantro_g2_irq },
|
||||
};
|
||||
|
||||
static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" };
|
@ -0,0 +1,172 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Thu, 5 Aug 2021 20:43:03 +0200
|
||||
Subject: [PATCH] media: hantro: Add support for Allwinner H6
|
||||
|
||||
Allwinner H6 has a Hantro G2 core used for VP9 decoding. It's not clear
|
||||
at this time if HEVC is also supported or not.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/Kconfig | 10 ++-
|
||||
drivers/staging/media/hantro/Makefile | 3 +
|
||||
drivers/staging/media/hantro/hantro_drv.c | 3 +
|
||||
drivers/staging/media/hantro/hantro_hw.h | 1 +
|
||||
drivers/staging/media/hantro/sunxi_vpu_hw.c | 86 +++++++++++++++++++++
|
||||
5 files changed, 102 insertions(+), 1 deletion(-)
|
||||
create mode 100644 drivers/staging/media/hantro/sunxi_vpu_hw.c
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
|
||||
index 00a57d88c92e..3c5d833322c8 100644
|
||||
--- a/drivers/staging/media/hantro/Kconfig
|
||||
+++ b/drivers/staging/media/hantro/Kconfig
|
||||
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
config VIDEO_HANTRO
|
||||
tristate "Hantro VPU driver"
|
||||
- depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || COMPILE_TEST
|
||||
+ depends on ARCH_MXC || ARCH_ROCKCHIP || ARCH_AT91 || ARCH_SUNXI || COMPILE_TEST
|
||||
depends on VIDEO_DEV && VIDEO_V4L2
|
||||
select MEDIA_CONTROLLER
|
||||
select MEDIA_CONTROLLER_REQUEST_API
|
||||
@@ -40,3 +40,11 @@ config VIDEO_HANTRO_ROCKCHIP
|
||||
default y
|
||||
help
|
||||
Enable support for RK3288, RK3328, and RK3399 SoCs.
|
||||
+
|
||||
+config VIDEO_HANTRO_SUNXI
|
||||
+ bool "Hantro VPU Allwinner support"
|
||||
+ depends on VIDEO_HANTRO
|
||||
+ depends on ARCH_SUNXI || COMPILE_TEST
|
||||
+ default y
|
||||
+ help
|
||||
+ Enable support for H6 SoC.
|
||||
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
|
||||
index 28af0a1ee4bf..ebd5ede7bef7 100644
|
||||
--- a/drivers/staging/media/hantro/Makefile
|
||||
+++ b/drivers/staging/media/hantro/Makefile
|
||||
@@ -33,3 +33,6 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SAMA5D4) += \
|
||||
|
||||
hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
|
||||
rockchip_vpu_hw.o
|
||||
+
|
||||
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \
|
||||
+ sunxi_vpu_hw.o
|
||||
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
|
||||
index 33bf78be145b..6a51f39dde56 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_drv.c
|
||||
+++ b/drivers/staging/media/hantro/hantro_drv.c
|
||||
@@ -620,6 +620,9 @@ static const struct of_device_id of_hantro_match[] = {
|
||||
#endif
|
||||
#ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
|
||||
{ .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
|
||||
+#endif
|
||||
+#ifdef CONFIG_VIDEO_HANTRO_SUNXI
|
||||
+ { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, },
|
||||
#endif
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
|
||||
index c33b1f5df37b..c92a6ec4b187 100644
|
||||
--- a/drivers/staging/media/hantro/hantro_hw.h
|
||||
+++ b/drivers/staging/media/hantro/hantro_hw.h
|
||||
@@ -308,6 +308,7 @@ extern const struct hantro_variant rk3288_vpu_variant;
|
||||
extern const struct hantro_variant rk3328_vpu_variant;
|
||||
extern const struct hantro_variant rk3399_vpu_variant;
|
||||
extern const struct hantro_variant sama5d4_vdec_variant;
|
||||
+extern const struct hantro_variant sunxi_vpu_variant;
|
||||
|
||||
extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
|
||||
extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
|
||||
diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c
|
||||
new file mode 100644
|
||||
index 000000000000..90633406c4eb
|
||||
--- /dev/null
|
||||
+++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c
|
||||
@@ -0,0 +1,86 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Allwinner Hantro G2 VPU codec driver
|
||||
+ *
|
||||
+ * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/clk.h>
|
||||
+
|
||||
+#include "hantro.h"
|
||||
+
|
||||
+static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = {
|
||||
+ {
|
||||
+ .fourcc = V4L2_PIX_FMT_NV12,
|
||||
+ .codec_mode = HANTRO_MODE_NONE,
|
||||
+ .postprocessed = true,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static const struct hantro_fmt sunxi_vpu_dec_fmts[] = {
|
||||
+ {
|
||||
+ .fourcc = V4L2_PIX_FMT_NV12_4L4,
|
||||
+ .codec_mode = HANTRO_MODE_NONE,
|
||||
+ },
|
||||
+ {
|
||||
+ .fourcc = V4L2_PIX_FMT_VP9_FRAME,
|
||||
+ .codec_mode = HANTRO_MODE_VP9_DEC,
|
||||
+ .max_depth = 2,
|
||||
+ .frmsize = {
|
||||
+ .min_width = 48,
|
||||
+ .max_width = 3840,
|
||||
+ .step_width = MB_DIM,
|
||||
+ .min_height = 48,
|
||||
+ .max_height = 2160,
|
||||
+ .step_height = MB_DIM,
|
||||
+ },
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static int sunxi_vpu_hw_init(struct hantro_dev *vpu)
|
||||
+{
|
||||
+ clk_set_rate(vpu->clocks[0].clk, 300000000);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void sunxi_vpu_reset(struct hantro_ctx *ctx)
|
||||
+{
|
||||
+ struct hantro_dev *vpu = ctx->dev;
|
||||
+
|
||||
+ reset_control_reset(vpu->resets);
|
||||
+}
|
||||
+
|
||||
+static const struct hantro_codec_ops sunxi_vpu_codec_ops[] = {
|
||||
+ [HANTRO_MODE_VP9_DEC] = {
|
||||
+ .run = hantro_g2_vp9_dec_run,
|
||||
+ .done = hantro_g2_vp9_dec_done,
|
||||
+ .reset = sunxi_vpu_reset,
|
||||
+ .init = hantro_vp9_dec_init,
|
||||
+ .exit = hantro_vp9_dec_exit,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static const struct hantro_irq sunxi_irqs[] = {
|
||||
+ { NULL, hantro_g2_irq },
|
||||
+};
|
||||
+
|
||||
+static const char * const sunxi_clk_names[] = { "mod", "bus" };
|
||||
+
|
||||
+const struct hantro_variant sunxi_vpu_variant = {
|
||||
+ .dec_fmts = sunxi_vpu_dec_fmts,
|
||||
+ .num_dec_fmts = ARRAY_SIZE(sunxi_vpu_dec_fmts),
|
||||
+ .postproc_fmts = sunxi_vpu_postproc_fmts,
|
||||
+ .num_postproc_fmts = ARRAY_SIZE(sunxi_vpu_postproc_fmts),
|
||||
+ .postproc_ops = &hantro_g2_postproc_ops,
|
||||
+ .codec = HANTRO_VP9_DECODER,
|
||||
+ .codec_ops = sunxi_vpu_codec_ops,
|
||||
+ .init = sunxi_vpu_hw_init,
|
||||
+ .irqs = sunxi_irqs,
|
||||
+ .num_irqs = ARRAY_SIZE(sunxi_irqs),
|
||||
+ .clk_names = sunxi_clk_names,
|
||||
+ .num_clocks = ARRAY_SIZE(sunxi_clk_names),
|
||||
+ .double_buffer = 1,
|
||||
+ .legacy_regs = 1,
|
||||
+ .late_postproc = 1,
|
||||
+};
|
@ -0,0 +1,33 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Thu, 5 Aug 2021 22:32:38 +0200
|
||||
Subject: [PATCH] arm64: dts: allwinner: h6: Add Hantro G2 node
|
||||
|
||||
H6 SoC has a second VPU, dedicated to VP9 decoding. It's a slightly
|
||||
older design, though.
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
index 4c4547f7d0c7..878061e75098 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
|
||||
@@ -153,6 +153,15 @@ mixer0_out_tcon_top_mixer0: endpoint {
|
||||
};
|
||||
};
|
||||
|
||||
+ video-codec-g2@1c00000 {
|
||||
+ compatible = "allwinner,sun50i-h6-vpu-g2";
|
||||
+ reg = <0x01c00000 0x1000>;
|
||||
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>;
|
||||
+ clock-names = "bus", "mod";
|
||||
+ resets = <&ccu RST_BUS_VP9>;
|
||||
+ };
|
||||
+
|
||||
video-codec@1c0e000 {
|
||||
compatible = "allwinner,sun50i-h6-video-engine";
|
||||
reg = <0x01c0e000 0x2000>;
|
@ -1,66 +0,0 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Sun, 19 Sep 2021 13:10:55 +0200
|
||||
Subject: [PATCH] v4l2_request: validate supported framesizes
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
libavcodec/v4l2_request.c | 38 +++++++++++++++++++++++++++++++++++++-
|
||||
1 file changed, 37 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/libavcodec/v4l2_request.c b/libavcodec/v4l2_request.c
|
||||
index a8f0ee79ee..2fbe166341 100644
|
||||
--- a/libavcodec/v4l2_request.c
|
||||
+++ b/libavcodec/v4l2_request.c
|
||||
@@ -376,6 +376,42 @@ int ff_v4l2_request_decode_frame(AVCodecContext *avctx, AVFrame *frame, struct v
|
||||
return v4l2_request_queue_decode(avctx, frame, control, count, 1, 1);
|
||||
}
|
||||
|
||||
+static int v4l2_request_try_framesize(AVCodecContext *avctx, uint32_t pixelformat)
|
||||
+{
|
||||
+ V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data;
|
||||
+ struct v4l2_frmsizeenum frmsize = {
|
||||
+ .index = 0,
|
||||
+ .pixel_format = pixelformat,
|
||||
+ };
|
||||
+
|
||||
+ if (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) < 0)
|
||||
+ return 0;
|
||||
+
|
||||
+ /*
|
||||
+ * We only validate min/max framesize for V4L2_FRMSIZE_TYPE_STEPWISE here, since the alignment
|
||||
+ * which is eventually needed will be done driver-side later in VIDIOC_S_FMT and there is no need
|
||||
+ * validate step_width/step_height here
|
||||
+ */
|
||||
+
|
||||
+ do {
|
||||
+
|
||||
+ if (frmsize.type == V4L2_FRMSIZE_TYPE_DISCRETE && frmsize.discrete.width == avctx->coded_width &&
|
||||
+ frmsize.discrete.height == avctx->coded_height)
|
||||
+ return 0;
|
||||
+ else if ((frmsize.type == V4L2_FRMSIZE_TYPE_STEPWISE || frmsize.type == V4L2_FRMSIZE_TYPE_CONTINUOUS) &&
|
||||
+ avctx->coded_width >= frmsize.stepwise.min_width && avctx->coded_height >= frmsize.stepwise.min_height &&
|
||||
+ avctx->coded_width <= frmsize.stepwise.max_width && avctx->coded_height <= frmsize.stepwise.max_height)
|
||||
+ return 0;
|
||||
+
|
||||
+ frmsize.index++;
|
||||
+
|
||||
+ } while (ioctl(ctx->video_fd, VIDIOC_ENUM_FRAMESIZES, &frmsize) >= 0);
|
||||
+
|
||||
+ av_log(avctx, AV_LOG_INFO, "%s: pixelformat %u not supported for width %u height %u\n", __func__, pixelformat, avctx->coded_width, avctx->coded_height);
|
||||
+
|
||||
+ return -1;
|
||||
+}
|
||||
+
|
||||
static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type type, uint32_t pixelformat)
|
||||
{
|
||||
V4L2RequestContext *ctx = avctx->internal->hwaccel_priv_data;
|
||||
@@ -404,7 +440,7 @@ static int v4l2_request_try_format(AVCodecContext *avctx, enum v4l2_buf_type typ
|
||||
|
||||
while (ioctl(ctx->video_fd, VIDIOC_ENUM_FMT, &fmtdesc) >= 0) {
|
||||
if (fmtdesc.pixelformat == pixelformat)
|
||||
- return 0;
|
||||
+ return v4l2_request_try_framesize(avctx, pixelformat);
|
||||
|
||||
fmtdesc.index++;
|
||||
}
|
@ -270,10 +270,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
|
||||
index 95fedcf56e4a..38e75b275bb6 100644
|
||||
index 368f10405e13..238d70df6c80 100644
|
||||
--- a/drivers/mmc/core/core.c
|
||||
+++ b/drivers/mmc/core/core.c
|
||||
@@ -1355,6 +1355,14 @@ void mmc_power_off(struct mmc_host *host)
|
||||
@@ -1356,6 +1356,14 @@ void mmc_power_off(struct mmc_host *host)
|
||||
if (host->ios.power_mode == MMC_POWER_OFF)
|
||||
return;
|
||||
|
||||
@ -305,7 +305,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 14 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index 5b2020590f53..df46edbec82c 100644
|
||||
index 39db0b85b4da..d0410ae4def2 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -975,6 +975,20 @@ usb_host0_ohci: usb@ff5d0000 {
|
||||
@ -346,7 +346,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index df46edbec82c..cfc57be009a6 100644
|
||||
index d0410ae4def2..cc46855aba46 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -853,6 +853,8 @@ sdmmc: mmc@ff500000 {
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -20,7 +20,7 @@ Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
index 76e97cbe2512..af44a16c0c4a 100644
|
||||
index 951e19231da2..3becb0186062 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
@@ -752,7 +752,7 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,
|
||||
@ -47,10 +47,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 7131156c1f2c..65a8334a188b 100644
|
||||
index ad2624c30843..efd316550807 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -233,6 +233,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
@@ -268,6 +268,8 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
pix_mp->pixelformat = coded_desc->decoded_fmts[0];
|
||||
|
||||
/* Always apply the frmsize constraint of the coded end. */
|
||||
@ -83,7 +83,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
2 files changed, 12 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
index af44a16c0c4a..9852c3519f56 100644
|
||||
index 3becb0186062..a379e43147fb 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
@@ -671,8 +671,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
|
||||
@ -98,7 +98,7 @@ index af44a16c0c4a..9852c3519f56 100644
|
||||
FRAME_MBS_ONLY_FLAG);
|
||||
WRITE_PPS(!!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD),
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 65a8334a188b..f4c5ee4a1e26 100644
|
||||
index efd316550807..c88e817cac0a 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -29,8 +29,11 @@
|
||||
@ -146,7 +146,7 @@ Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
index 9852c3519f56..f3ff3e709169 100644
|
||||
index a379e43147fb..503ae683d0fd 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
|
||||
@@ -661,8 +661,8 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,
|
||||
@ -180,10 +180,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 38 insertions(+), 39 deletions(-)
|
||||
|
||||
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
|
||||
index 04af03285a20..ae585828c388 100644
|
||||
index df34b2a283bc..287488016ff2 100644
|
||||
--- a/drivers/media/v4l2-core/v4l2-common.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-common.c
|
||||
@@ -333,6 +333,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf
|
||||
@@ -336,6 +336,33 @@ static inline unsigned int v4l2_format_block_height(const struct v4l2_format_inf
|
||||
return info->block_h[plane];
|
||||
}
|
||||
|
||||
@ -217,7 +217,7 @@ index 04af03285a20..ae585828c388 100644
|
||||
void v4l2_apply_frmsize_constraints(u32 *width, u32 *height,
|
||||
const struct v4l2_frmsize_stepwise *frmsize)
|
||||
{
|
||||
@@ -368,37 +395,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt,
|
||||
@@ -371,37 +398,19 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt,
|
||||
|
||||
if (info->mem_planes == 1) {
|
||||
plane = &pixfmt->plane_fmt[0];
|
||||
@ -262,7 +262,7 @@ index 04af03285a20..ae585828c388 100644
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
@@ -422,22 +431,12 @@ int v4l2_fill_pixfmt(struct v4l2_pix_format *pixfmt, u32 pixelformat,
|
||||
@@ -425,22 +434,12 @@ int v4l2_fill_pixfmt(struct v4l2_pix_format *pixfmt, u32 pixelformat,
|
||||
pixfmt->width = width;
|
||||
pixfmt->height = height;
|
||||
pixfmt->pixelformat = pixelformat;
|
||||
@ -317,7 +317,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
3 files changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c
|
||||
index ae585828c388..5bafbdbe30b0 100644
|
||||
index 287488016ff2..01f8a50586eb 100644
|
||||
--- a/drivers/media/v4l2-core/v4l2-common.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-common.c
|
||||
@@ -267,6 +267,9 @@ const struct v4l2_format_info *v4l2_format_info(u32 format)
|
||||
@ -331,10 +331,10 @@ index ae585828c388..5bafbdbe30b0 100644
|
||||
{ .format = V4L2_PIX_FMT_YVU410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
|
||||
{ .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 },
|
||||
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
|
||||
index 05d5db3d85e5..fe43d785414c 100644
|
||||
index 51289d4741dc..e6f2c65e24ca 100644
|
||||
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
|
||||
@@ -1282,6 +1282,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
|
||||
@@ -1299,6 +1299,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
|
||||
case V4L2_PIX_FMT_NV61: descr = "Y/CrCb 4:2:2"; break;
|
||||
case V4L2_PIX_FMT_NV24: descr = "Y/CbCr 4:4:4"; break;
|
||||
case V4L2_PIX_FMT_NV42: descr = "Y/CrCb 4:4:4"; break;
|
||||
@ -342,12 +342,12 @@ index 05d5db3d85e5..fe43d785414c 100644
|
||||
+ case V4L2_PIX_FMT_NV20: descr = "10-bit Y/CbCr 4:2:2 (Packed)"; break;
|
||||
case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break;
|
||||
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
|
||||
index 9260791b8438..169f8ad6fade 100644
|
||||
index df8b9c486ba1..9845ce720b4e 100644
|
||||
--- a/include/uapi/linux/videodev2.h
|
||||
+++ b/include/uapi/linux/videodev2.h
|
||||
@@ -603,6 +603,9 @@ struct v4l2_pix_format {
|
||||
@@ -602,6 +602,9 @@ struct v4l2_pix_format {
|
||||
#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
|
||||
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
|
||||
|
||||
@ -420,7 +420,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 15 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index f4c5ee4a1e26..d8d0eab9e25d 100644
|
||||
index c88e817cac0a..d4ae792874bb 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -27,6 +27,17 @@
|
||||
@ -441,7 +441,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
|
||||
static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
|
||||
{
|
||||
struct rkvdec_ctx *ctx = container_of(ctrl->handler, struct rkvdec_ctx, ctrl_hdl);
|
||||
@@ -177,13 +188,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
|
||||
@@ -212,13 +223,9 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
|
||||
|
||||
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
|
||||
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
|
||||
@ -458,7 +458,7 @@ index f4c5ee4a1e26..d8d0eab9e25d 100644
|
||||
}
|
||||
|
||||
static int rkvdec_enum_framesizes(struct file *file, void *priv,
|
||||
@@ -249,13 +256,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
@@ -284,13 +291,7 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
&pix_mp->height,
|
||||
&coded_desc->frmsize);
|
||||
|
||||
@ -492,7 +492,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
2 files changed, 55 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index d8d0eab9e25d..d31344c4acaa 100644
|
||||
index d4ae792874bb..3cbb1d26b972 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -38,6 +38,16 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
|
||||
@ -551,7 +551,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
|
||||
};
|
||||
|
||||
static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
|
||||
@@ -186,6 +219,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
|
||||
@@ -221,6 +254,7 @@ static void rkvdec_reset_decoded_fmt(struct rkvdec_ctx *ctx)
|
||||
{
|
||||
struct v4l2_format *f = &ctx->decoded_fmt;
|
||||
|
||||
@ -559,7 +559,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
|
||||
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->decoded_fmts[0]);
|
||||
f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
|
||||
f->fmt.pix_mp.width = ctx->coded_fmt.fmt.pix_mp.width;
|
||||
@@ -241,13 +275,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
@@ -276,13 +310,17 @@ static int rkvdec_try_capture_fmt(struct file *file, void *priv,
|
||||
if (WARN_ON(!coded_desc))
|
||||
return -EINVAL;
|
||||
|
||||
@ -583,7 +583,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
|
||||
|
||||
/* Always apply the frmsize constraint of the coded end. */
|
||||
pix_mp->width = max(pix_mp->width, ctx->coded_fmt.fmt.pix_mp.width);
|
||||
@@ -322,6 +360,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
|
||||
@@ -346,6 +384,7 @@ static int rkvdec_s_capture_fmt(struct file *file, void *priv,
|
||||
return ret;
|
||||
|
||||
ctx->decoded_fmt = *f;
|
||||
@ -591,7 +591,7 @@ index d8d0eab9e25d..d31344c4acaa 100644
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -411,6 +450,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
|
||||
@@ -446,6 +485,14 @@ static int rkvdec_enum_capture_fmt(struct file *file, void *priv,
|
||||
if (WARN_ON(!ctx->coded_fmt_desc))
|
||||
return -EINVAL;
|
||||
|
||||
@ -607,10 +607,10 @@ index d8d0eab9e25d..d31344c4acaa 100644
|
||||
return -EINVAL;
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
index 52ac3874c5e5..7b6f44ee8a1a 100644
|
||||
index 2f4ea1786b93..c26c472baa6f 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
@@ -62,6 +62,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
|
||||
@@ -66,6 +66,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf)
|
||||
struct rkvdec_coded_fmt_ops {
|
||||
int (*adjust_fmt)(struct rkvdec_ctx *ctx,
|
||||
struct v4l2_format *f);
|
||||
@ -618,7 +618,7 @@ index 52ac3874c5e5..7b6f44ee8a1a 100644
|
||||
int (*start)(struct rkvdec_ctx *ctx);
|
||||
void (*stop)(struct rkvdec_ctx *ctx);
|
||||
int (*run)(struct rkvdec_ctx *ctx);
|
||||
@@ -95,6 +96,7 @@ struct rkvdec_ctx {
|
||||
@@ -99,6 +100,7 @@ struct rkvdec_ctx {
|
||||
struct v4l2_fh fh;
|
||||
struct v4l2_format coded_fmt;
|
||||
struct v4l2_format decoded_fmt;
|
||||
@ -685,7 +685,7 @@ index 88f5f4bb320b..c9a551dbd9bc 100644
|
||||
.stop = rkvdec_h264_stop,
|
||||
.run = rkvdec_h264_run,
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index d31344c4acaa..d068383aeea8 100644
|
||||
index 3cbb1d26b972..bd106b23f4a0 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -31,7 +31,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx,
|
||||
@ -724,11 +724,11 @@ index d31344c4acaa..d068383aeea8 100644
|
||||
if (ctx->valid_fmt && ctx->valid_fmt != rkvdec_valid_fmt(ctx, ctrl))
|
||||
@@ -155,6 +151,9 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
|
||||
|
||||
static const u32 rkvdec_h264_decoded_fmts[] = {
|
||||
static const u32 rkvdec_h264_vp9_decoded_fmts[] = {
|
||||
V4L2_PIX_FMT_NV12,
|
||||
+ V4L2_PIX_FMT_NV15,
|
||||
+ V4L2_PIX_FMT_NV16,
|
||||
+ V4L2_PIX_FMT_NV20,
|
||||
};
|
||||
|
||||
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
|
||||
|
@ -24,10 +24,10 @@ Reviewed-by: Sandy Huang <hjc@rock-chips.com>
|
||||
2 files changed, 10 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
|
||||
index eda832f9200d..9498e9d466fb 100644
|
||||
index 25837b1d6639..f11080d63331 100644
|
||||
--- a/drivers/gpu/drm/drm_fourcc.c
|
||||
+++ b/drivers/gpu/drm/drm_fourcc.c
|
||||
@@ -258,6 +258,14 @@ const struct drm_format_info *__drm_format_info(u32 format)
|
||||
@@ -261,6 +261,14 @@ const struct drm_format_info *__drm_format_info(u32 format)
|
||||
.num_planes = 2, .char_per_block = { 5, 5, 0 },
|
||||
.block_w = { 4, 2, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
|
||||
.vsub = 2, .is_yuv = true },
|
||||
@ -43,10 +43,10 @@ index eda832f9200d..9498e9d466fb 100644
|
||||
.num_planes = 3, .char_per_block = { 2, 2, 2 },
|
||||
.block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
|
||||
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
|
||||
index f7156322aba5..a30bb7ef7632 100644
|
||||
index 7f652c96845b..37824734633c 100644
|
||||
--- a/include/uapi/drm/drm_fourcc.h
|
||||
+++ b/include/uapi/drm/drm_fourcc.h
|
||||
@@ -279,6 +279,8 @@ extern "C" {
|
||||
@@ -285,6 +285,8 @@ extern "C" {
|
||||
* index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
|
||||
*/
|
||||
#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */
|
||||
@ -76,7 +76,7 @@ Reviewed-by: Sandy Huang <hjc@rock-chips.com>
|
||||
3 files changed, 54 insertions(+), 8 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index f5b9028a16a3..9df4a271f3aa 100644
|
||||
index a25b98b7f5bd..91ded8a096ba 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -262,6 +262,18 @@ static bool has_rb_swapped(uint32_t format)
|
||||
@ -160,7 +160,7 @@ index 857d97cdc67c..b7169010622a 100644
|
||||
struct vop_reg act_info;
|
||||
struct vop_reg dsp_info;
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index ca7cc82125cb..fff9c3387b9d 100644
|
||||
index 1f7353f0684a..474cc8807ac9 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -50,6 +50,23 @@ static const uint32_t formats_win_full[] = {
|
||||
@ -257,7 +257,7 @@ Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c
|
||||
index 8ab3247dbc4a..8429c6706ec5 100644
|
||||
index 16497c31d9f9..e46963577854 100644
|
||||
--- a/drivers/gpu/drm/rockchip/cdn-dp-core.c
|
||||
+++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c
|
||||
@@ -100,7 +100,7 @@ static int cdn_dp_clk_enable(struct cdn_dp_device *dp)
|
||||
@ -294,7 +294,7 @@ Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 9df4a271f3aa..c3c0de25b8e6 100644
|
||||
index 91ded8a096ba..967f29625d7c 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -603,7 +603,7 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
|
||||
@ -306,7 +306,7 @@ index 9df4a271f3aa..c3c0de25b8e6 100644
|
||||
if (ret < 0) {
|
||||
DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret);
|
||||
return ret;
|
||||
@@ -1956,7 +1956,7 @@ static int vop_initial(struct vop *vop)
|
||||
@@ -1953,7 +1953,7 @@ static int vop_initial(struct vop *vop)
|
||||
return PTR_ERR(vop->dclk);
|
||||
}
|
||||
|
||||
@ -340,10 +340,10 @@ Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
|
||||
index 489d63c05c0d..aaf0b6bbcb85 100644
|
||||
index be74c87a8be4..288462fd5d8e 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
|
||||
@@ -145,7 +145,7 @@ static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
|
||||
@@ -146,7 +146,7 @@ static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
|
||||
DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
@ -352,7 +352,7 @@ index 489d63c05c0d..aaf0b6bbcb85 100644
|
||||
if (ret < 0) {
|
||||
DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
|
||||
clk_disable(lvds->pclk);
|
||||
@@ -329,7 +329,7 @@ static int px30_lvds_poweron(struct rockchip_lvds *lvds)
|
||||
@@ -330,7 +330,7 @@ static int px30_lvds_poweron(struct rockchip_lvds *lvds)
|
||||
{
|
||||
int ret;
|
||||
|
||||
@ -384,10 +384,10 @@ Tested-by: Heiko Stuebner <heiko@sntech.de>
|
||||
4 files changed, 15 insertions(+), 52 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
|
||||
index b730b8d5d949..2e3ab573a817 100644
|
||||
index e4ebe60b3cc1..69c699459dce 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
|
||||
@@ -208,16 +208,7 @@ static void rockchip_drm_unbind(struct device *dev)
|
||||
@@ -199,16 +199,7 @@ static void rockchip_drm_unbind(struct device *dev)
|
||||
drm_dev_put(drm_dev);
|
||||
}
|
||||
|
||||
@ -405,7 +405,7 @@ index b730b8d5d949..2e3ab573a817 100644
|
||||
|
||||
static const struct drm_driver rockchip_drm_driver = {
|
||||
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
|
||||
@@ -226,7 +217,7 @@ static const struct drm_driver rockchip_drm_driver = {
|
||||
@@ -217,7 +208,7 @@ static const struct drm_driver rockchip_drm_driver = {
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_import_sg_table = rockchip_gem_prime_import_sg_table,
|
||||
@ -528,4 +528,3 @@ index 5a70a56cd406..47c1861eece0 100644
|
||||
struct rockchip_gem_object *
|
||||
rockchip_gem_create_object(struct drm_device *drm, unsigned int size,
|
||||
bool alloc_kmap);
|
||||
|
||||
|
@ -13,10 +13,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index c3c0de25b8e6..395b7160a3c5 100644
|
||||
index 967f29625d7c..08940fecaac3 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1578,7 +1578,11 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)
|
||||
@@ -1575,7 +1575,11 @@ static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)
|
||||
{
|
||||
struct rockchip_crtc_state *rockchip_state;
|
||||
|
||||
@ -47,10 +47,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 54 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 395b7160a3c5..3603bf81b58b 100644
|
||||
index 08940fecaac3..084d060051da 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1181,6 +1181,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
|
||||
@@ -1180,6 +1180,59 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
|
||||
spin_unlock_irqrestore(&vop->irq_lock, flags);
|
||||
}
|
||||
|
||||
@ -110,7 +110,7 @@ index 395b7160a3c5..3603bf81b58b 100644
|
||||
static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
@@ -1561,6 +1614,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
|
||||
@@ -1558,6 +1611,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
|
||||
}
|
||||
|
||||
static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = {
|
||||
@ -133,10 +133,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 3603bf81b58b..91ed741d09cd 100644
|
||||
index 084d060051da..5b28c707b44c 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1219,6 +1219,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
@@ -1218,6 +1218,9 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
if (!vop_crtc_is_tmds(crtc))
|
||||
return MODE_OK;
|
||||
|
||||
@ -183,7 +183,7 @@ index b7169010622a..0b1984585082 100644
|
||||
#define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
|
||||
#define VOP_FEATURE_INTERNAL_RGB BIT(1)
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index fff9c3387b9d..37e623bdf287 100644
|
||||
index 474cc8807ac9..1d750cc492ec 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -734,6 +734,7 @@ static const struct vop_intr rk3288_vop_intr = {
|
||||
@ -256,10 +256,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 16 insertions(+)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 91ed741d09cd..5badaf5a87e7 100644
|
||||
index 5b28c707b44c..f906eb758b33 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1213,6 +1213,7 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
@@ -1212,6 +1212,7 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
struct vop *vop = to_vop(crtc);
|
||||
@ -267,7 +267,7 @@ index 91ed741d09cd..5badaf5a87e7 100644
|
||||
long rounded_rate;
|
||||
long lowest, highest;
|
||||
|
||||
@@ -1234,6 +1235,10 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
@@ -1233,6 +1234,10 @@ static enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
|
||||
if (rounded_rate > highest)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
||||
@ -278,7 +278,7 @@ index 91ed741d09cd..5badaf5a87e7 100644
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
@@ -1242,8 +1247,19 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
||||
@@ -1241,8 +1246,19 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct vop *vop = to_vop(crtc);
|
||||
@ -846,7 +846,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 18 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index 37e623bdf287..28df0bc79812 100644
|
||||
index 1d750cc492ec..91bdb85fdfd3 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -731,7 +731,7 @@ static const struct vop_intr rk3288_vop_intr = {
|
||||
@ -903,10 +903,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 9c5a7791a1ab..b64b8fbe388d 100644
|
||||
index aaaa61875701..7160118864df 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1018,7 +1018,7 @@ rga: rga@ff920000 {
|
||||
@@ -1016,7 +1016,7 @@ rga: rga@ff920000 {
|
||||
};
|
||||
|
||||
vopb: vop@ff930000 {
|
||||
@ -915,7 +915,7 @@ index 9c5a7791a1ab..b64b8fbe388d 100644
|
||||
reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
|
||||
@@ -1068,7 +1068,7 @@ vopb_mmu: iommu@ff930300 {
|
||||
@@ -1065,7 +1065,7 @@ vopb_mmu: iommu@ff930300 {
|
||||
};
|
||||
|
||||
vopl: vop@ff940000 {
|
||||
@ -939,7 +939,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
3 files changed, 10 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index e7c7c9b9c646..ee1968ecaa8f 100644
|
||||
index f08d0fded61f..0af70d3839dd 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -137,7 +137,8 @@ struct dw_hdmi_phy_data {
|
||||
@ -952,7 +952,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644
|
||||
};
|
||||
|
||||
struct dw_hdmi {
|
||||
@@ -1441,7 +1442,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
|
||||
@@ -1442,7 +1443,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
|
||||
*/
|
||||
static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
const struct dw_hdmi_plat_data *pdata,
|
||||
@ -962,7 +962,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644
|
||||
{
|
||||
const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
|
||||
const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
|
||||
@@ -1516,9 +1518,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi,
|
||||
@@ -1517,9 +1519,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi,
|
||||
|
||||
/* Write to the PHY as configured by the platform */
|
||||
if (pdata->configure_phy)
|
||||
@ -975,7 +975,7 @@ index e7c7c9b9c646..ee1968ecaa8f 100644
|
||||
dev_err(hdmi->dev, "PHY configuration failed (clock %lu)\n",
|
||||
mpixelclock);
|
||||
diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
|
||||
index 7b8ec8310699..539d86131fd4 100644
|
||||
index 18ed14911b98..9c75095a25c5 100644
|
||||
--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
|
||||
+++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
|
||||
@@ -53,7 +53,8 @@ rcar_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
|
||||
@ -989,10 +989,10 @@ index 7b8ec8310699..539d86131fd4 100644
|
||||
const struct rcar_hdmi_phy_params *params = rcar_hdmi_phy_params;
|
||||
|
||||
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
|
||||
index 6a5716655619..182c8a8781df 100644
|
||||
index 2a1f85f9a8a3..85be16b9cfbf 100644
|
||||
--- a/include/drm/bridge/dw_hdmi.h
|
||||
+++ b/include/drm/bridge/dw_hdmi.h
|
||||
@@ -152,7 +152,8 @@ struct dw_hdmi_plat_data {
|
||||
@@ -154,7 +154,8 @@ struct dw_hdmi_plat_data {
|
||||
const struct dw_hdmi_curr_ctrl *cur_ctr;
|
||||
const struct dw_hdmi_phy_config *phy_config;
|
||||
int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
|
||||
@ -1016,10 +1016,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 12 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index ee1968ecaa8f..8b3ce725b211 100644
|
||||
index 0af70d3839dd..48a343c9bcc3 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -1448,6 +1448,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
@@ -1449,6 +1449,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
|
||||
const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
|
||||
const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
|
||||
@ -1027,7 +1027,7 @@ index ee1968ecaa8f..8b3ce725b211 100644
|
||||
|
||||
/* TOFIX Will need 420 specific PHY configuration tables */
|
||||
|
||||
@@ -1457,11 +1458,11 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
@@ -1458,11 +1459,11 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
break;
|
||||
|
||||
for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
|
||||
@ -1041,7 +1041,7 @@ index ee1968ecaa8f..8b3ce725b211 100644
|
||||
break;
|
||||
|
||||
if (mpll_config->mpixelclock == ~0UL ||
|
||||
@@ -1469,11 +1470,17 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
@@ -1470,11 +1471,17 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
phy_config->mpixelclock == ~0UL)
|
||||
return -EINVAL;
|
||||
|
||||
@ -1075,10 +1075,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
2 files changed, 4 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 8b3ce725b211..473db9629a66 100644
|
||||
index 48a343c9bcc3..90e683c65cbe 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -1450,7 +1450,9 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
@@ -1451,7 +1451,9 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
|
||||
const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
|
||||
int depth;
|
||||
|
||||
@ -1090,10 +1090,10 @@ index 8b3ce725b211..473db9629a66 100644
|
||||
/* PLL/MPLL Cfg - always match on final entry */
|
||||
for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
|
||||
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
|
||||
index 182c8a8781df..5387d2cd1560 100644
|
||||
index 85be16b9cfbf..bf45a37170ea 100644
|
||||
--- a/include/drm/bridge/dw_hdmi.h
|
||||
+++ b/include/drm/bridge/dw_hdmi.h
|
||||
@@ -149,6 +149,7 @@ struct dw_hdmi_plat_data {
|
||||
@@ -151,6 +151,7 @@ struct dw_hdmi_plat_data {
|
||||
|
||||
/* Synopsys PHY support */
|
||||
const struct dw_hdmi_mpll_config *mpll_cfg;
|
||||
@ -1501,10 +1501,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 4 insertions(+), 32 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 5badaf5a87e7..af9e40d7f49b 100644
|
||||
index f906eb758b33..ee6f7f653754 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1877,19 +1877,10 @@ static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1874,19 +1874,10 @@ static int vop_create_crtc(struct vop *vop)
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
@ -1524,7 +1524,7 @@ index 5badaf5a87e7..af9e40d7f49b 100644
|
||||
ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base,
|
||||
0, &vop_plane_funcs,
|
||||
win_data->phy->data_formats,
|
||||
@@ -1922,32 +1913,13 @@ static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1919,32 +1910,13 @@ static int vop_create_crtc(struct vop *vop)
|
||||
drm_crtc_enable_color_mgmt(crtc, 0, false, vop_data->lut_size);
|
||||
}
|
||||
|
||||
@ -1587,10 +1587,10 @@ index 3aa37e177667..a2b59faa9184 100644
|
||||
dev->mode_config.helper_private = &rockchip_mode_config_helpers;
|
||||
}
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index af9e40d7f49b..ab3ae8d03231 100644
|
||||
index ee6f7f653754..350391e92c46 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1854,7 +1854,7 @@ static irqreturn_t vop_isr(int irq, void *data)
|
||||
@@ -1851,7 +1851,7 @@ static irqreturn_t vop_isr(int irq, void *data)
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1599,7 +1599,7 @@ index af9e40d7f49b..ab3ae8d03231 100644
|
||||
const struct vop_win_data *win_data)
|
||||
{
|
||||
unsigned int flags = 0;
|
||||
@@ -1864,6 +1864,8 @@ static void vop_plane_add_properties(struct drm_plane *plane,
|
||||
@@ -1861,6 +1861,8 @@ static void vop_plane_add_properties(struct drm_plane *plane,
|
||||
if (flags)
|
||||
drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
|
||||
DRM_MODE_ROTATE_0 | flags);
|
||||
@ -1608,7 +1608,7 @@ index af9e40d7f49b..ab3ae8d03231 100644
|
||||
}
|
||||
|
||||
static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1895,7 +1897,7 @@ static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1892,7 +1894,7 @@ static int vop_create_crtc(struct vop *vop)
|
||||
|
||||
plane = &vop_win->base;
|
||||
drm_plane_helper_add(plane, &plane_helper_funcs);
|
||||
@ -1629,10 +1629,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 30 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index ab3ae8d03231..8c6d1881787c 100644
|
||||
index 350391e92c46..6f72c52db2d2 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -1854,8 +1854,23 @@ static irqreturn_t vop_isr(int irq, void *data)
|
||||
@@ -1851,8 +1851,23 @@ static irqreturn_t vop_isr(int irq, void *data)
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1657,7 +1657,7 @@ index ab3ae8d03231..8c6d1881787c 100644
|
||||
{
|
||||
unsigned int flags = 0;
|
||||
|
||||
@@ -1866,6 +1881,19 @@ static void vop_plane_add_properties(struct drm_plane *plane, int zpos,
|
||||
@@ -1863,6 +1878,19 @@ static void vop_plane_add_properties(struct drm_plane *plane, int zpos,
|
||||
DRM_MODE_ROTATE_0 | flags);
|
||||
|
||||
drm_plane_create_zpos_immutable_property(plane, zpos);
|
||||
@ -1677,7 +1677,7 @@ index ab3ae8d03231..8c6d1881787c 100644
|
||||
}
|
||||
|
||||
static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1897,7 +1925,7 @@ static int vop_create_crtc(struct vop *vop)
|
||||
@@ -1894,7 +1922,7 @@ static int vop_create_crtc(struct vop *vop)
|
||||
|
||||
plane = &vop_win->base;
|
||||
drm_plane_helper_add(plane, &plane_helper_funcs);
|
||||
@ -1703,10 +1703,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
2 files changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index b64b8fbe388d..38da07f42cd5 100644
|
||||
index 7160118864df..402492268dad 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1027,6 +1027,8 @@ vopb: vop@ff930000 {
|
||||
@@ -1025,6 +1025,8 @@ vopb: vop@ff930000 {
|
||||
resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
|
||||
reset-names = "axi", "ahb", "dclk";
|
||||
iommus = <&vopb_mmu>;
|
||||
@ -1857,7 +1857,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 26 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
|
||||
index 62a4f2543960..980223c32aba 100644
|
||||
index 306910a3a0d3..1db62a3a4c67 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3399.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3399.c
|
||||
@@ -105,6 +105,25 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
|
||||
@ -1947,10 +1947,10 @@ Subject: [PATCH] HACK: dts: rockchip: do not use vopl for hdmi
|
||||
2 files changed, 18 deletions(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 38da07f42cd5..831484253e27 100644
|
||||
index 402492268dad..eb9d3bdf1d5e 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1085,11 +1085,6 @@ vopl_out: port {
|
||||
@@ -1082,11 +1082,6 @@ vopl_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -1962,7 +1962,7 @@ index 38da07f42cd5..831484253e27 100644
|
||||
vopl_out_edp: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&edp_in_vopl>;
|
||||
@@ -1230,10 +1225,6 @@ hdmi_in_vopb: endpoint@0 {
|
||||
@@ -1226,10 +1221,6 @@ hdmi_in_vopb: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vopb_out_hdmi>;
|
||||
};
|
||||
@ -1974,10 +1974,10 @@ index 38da07f42cd5..831484253e27 100644
|
||||
};
|
||||
};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index 44def886b391..52a748053a97 100644
|
||||
index d3cdf6f42a30..e21b93d57300 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1642,11 +1642,6 @@ vopl_out_edp: endpoint@1 {
|
||||
@@ -1702,11 +1702,6 @@ vopl_out_edp: endpoint@1 {
|
||||
remote-endpoint = <&edp_in_vopl>;
|
||||
};
|
||||
|
||||
@ -1989,7 +1989,7 @@ index 44def886b391..52a748053a97 100644
|
||||
vopl_out_mipi1: endpoint@3 {
|
||||
reg = <3>;
|
||||
remote-endpoint = <&mipi1_in_vopl>;
|
||||
@@ -1840,10 +1835,6 @@ hdmi_in_vopb: endpoint@0 {
|
||||
@@ -1900,10 +1895,6 @@ hdmi_in_vopb: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vopb_out_hdmi>;
|
||||
};
|
||||
@ -2012,10 +2012,10 @@ Subject: [PATCH] WIP: drm/bridge: dw-hdmi: limit mode and bus format to
|
||||
1 file changed, 76 insertions(+), 44 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 473db9629a66..53fb6cf26137 100644
|
||||
index 90e683c65cbe..419fd9124d7b 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -1859,6 +1859,21 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
|
||||
@@ -1860,6 +1860,21 @@ static void hdmi_config_drm_infoframe(struct dw_hdmi *hdmi,
|
||||
HDMI_FC_PACKET_TX_EN_DRM_MASK, HDMI_FC_PACKET_TX_EN);
|
||||
}
|
||||
|
||||
@ -2037,7 +2037,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
static void hdmi_av_composer(struct dw_hdmi *hdmi,
|
||||
const struct drm_display_info *display,
|
||||
const struct drm_display_mode *mode)
|
||||
@@ -1870,29 +1885,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
|
||||
@@ -1871,29 +1886,11 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
|
||||
unsigned int vdisplay, hdisplay;
|
||||
|
||||
vmode->mpixelclock = mode->clock * 1000;
|
||||
@ -2070,7 +2070,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
dev_dbg(hdmi->dev, "final tmdsclock = %d\n", vmode->mtmdsclock);
|
||||
|
||||
/* Set up HDMI_FC_INVIDCONF */
|
||||
@@ -2528,8 +2525,21 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
|
||||
@@ -2529,8 +2526,21 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
|
||||
* - MEDIA_BUS_FMT_RGB888_1X24,
|
||||
*/
|
||||
|
||||
@ -2094,7 +2094,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
|
||||
static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
struct drm_bridge_state *bridge_state,
|
||||
@@ -2541,8 +2551,6 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
@@ -2542,8 +2552,6 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
struct drm_display_info *info = &conn->display_info;
|
||||
struct drm_display_mode *mode = &crtc_state->mode;
|
||||
u8 max_bpc = conn_state->max_requested_bpc;
|
||||
@ -2103,7 +2103,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
u32 *output_fmts;
|
||||
unsigned int i = 0;
|
||||
|
||||
@@ -2565,29 +2573,33 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
@@ -2566,29 +2574,33 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
* If the current mode enforces 4:2:0, force the output but format
|
||||
* to 4:2:0 and do not add the YUV422/444/RGB formats
|
||||
*/
|
||||
@ -2145,7 +2145,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -2596,40 +2608,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
@@ -2597,40 +2609,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
*/
|
||||
|
||||
if (max_bpc >= 16 && info->bpc == 16) {
|
||||
@ -2208,7 +2208,7 @@ index 473db9629a66..53fb6cf26137 100644
|
||||
|
||||
*num_output_fmts = i;
|
||||
|
||||
@@ -2809,11 +2832,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
|
||||
@@ -2811,11 +2834,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
|
||||
struct dw_hdmi *hdmi = bridge->driver_private;
|
||||
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
|
||||
enum drm_mode_status mode_status = MODE_OK;
|
||||
@ -2335,7 +2335,7 @@ index 134c2db8d0fe..cba63dd5e8c8 100644
|
||||
return NULL;
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
|
||||
index e33c2dcd0d4b..03944e08b6c7 100644
|
||||
index aa0909e8edf9..59716b037205 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
|
||||
@@ -31,6 +31,8 @@ struct rockchip_crtc_state {
|
||||
@ -2359,10 +2359,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 7 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 53fb6cf26137..df8ff6af9157 100644
|
||||
index 419fd9124d7b..21b4e5873630 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -1646,6 +1646,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
|
||||
@@ -1647,6 +1647,7 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
|
||||
const struct drm_connector *connector,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
@ -2370,7 +2370,7 @@ index 53fb6cf26137..df8ff6af9157 100644
|
||||
struct hdmi_avi_infoframe frame;
|
||||
u8 val;
|
||||
|
||||
@@ -1703,6 +1704,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
|
||||
@@ -1704,6 +1705,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
|
||||
HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
|
||||
}
|
||||
|
||||
@ -2379,7 +2379,7 @@ index 53fb6cf26137..df8ff6af9157 100644
|
||||
/*
|
||||
* The Designware IP uses a different byte format from standard
|
||||
* AVI info frames, though generally the bits are in the correct
|
||||
@@ -2416,7 +2419,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
|
||||
@@ -2417,7 +2420,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector,
|
||||
if (!crtc)
|
||||
return 0;
|
||||
|
||||
@ -2389,7 +2389,7 @@ index 53fb6cf26137..df8ff6af9157 100644
|
||||
crtc_state = drm_atomic_get_crtc_state(state, crtc);
|
||||
if (IS_ERR(crtc_state))
|
||||
return PTR_ERR(crtc_state);
|
||||
@@ -2484,6 +2488,8 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
|
||||
@@ -2485,6 +2489,8 @@ static int dw_hdmi_connector_create(struct dw_hdmi *hdmi)
|
||||
|
||||
drm_connector_attach_max_bpc_property(connector, 8, 16);
|
||||
|
||||
@ -2490,7 +2490,7 @@ index cba63dd5e8c8..6429892ac4df 100644
|
||||
|
||||
static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 8c6d1881787c..abf3442baac0 100644
|
||||
index 6f72c52db2d2..68251bb45459 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -326,6 +326,17 @@ static int vop_convert_afbc_format(uint32_t format)
|
||||
@ -2511,7 +2511,7 @@ index 8c6d1881787c..abf3442baac0 100644
|
||||
static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
|
||||
uint32_t dst, bool is_horizontal,
|
||||
int vsu_mode, int *vskiplines)
|
||||
@@ -1395,6 +1406,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
@@ -1392,6 +1403,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
u16 vact_end = vact_st + vdisplay;
|
||||
uint32_t pin_pol, val;
|
||||
int dither_bpc = s->output_bpc ? s->output_bpc : 10;
|
||||
@ -2519,7 +2519,7 @@ index 8c6d1881787c..abf3442baac0 100644
|
||||
int ret;
|
||||
|
||||
if (old_state && old_state->self_refresh_active) {
|
||||
@@ -1468,6 +1480,8 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
@@ -1465,6 +1477,8 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
!(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
|
||||
s->output_mode = ROCKCHIP_OUT_MODE_P888;
|
||||
|
||||
@ -2528,7 +2528,7 @@ index 8c6d1881787c..abf3442baac0 100644
|
||||
if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && dither_bpc <= 8)
|
||||
VOP_REG_SET(vop, common, pre_dither_down, 1);
|
||||
else
|
||||
@@ -1483,6 +1497,21 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
@@ -1480,6 +1494,21 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
|
||||
VOP_REG_SET(vop, common, out_mode, s->output_mode);
|
||||
|
||||
@ -2572,7 +2572,7 @@ index 0b1984585082..72dd670bf2a7 100644
|
||||
|
||||
struct vop_intr {
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index 28df0bc79812..e64cedf7c7a1 100644
|
||||
index 91bdb85fdfd3..6abf72b6a751 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -696,6 +696,11 @@ static const struct vop_common rk3288_common = {
|
||||
@ -2688,7 +2688,7 @@ index 6429892ac4df..257770ea2dc7 100644
|
||||
|
||||
static struct rockchip_hdmi_chip_data rk3399_chip_data = {
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index abf3442baac0..5238bcbc7bae 100644
|
||||
index 68251bb45459..fb0ceda19fa4 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -327,6 +327,19 @@ static int vop_convert_afbc_format(uint32_t format)
|
||||
@ -2711,7 +2711,7 @@ index abf3442baac0..5238bcbc7bae 100644
|
||||
{
|
||||
switch (bus_format) {
|
||||
case MEDIA_BUS_FMT_YUV8_1X24:
|
||||
@@ -1480,7 +1493,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
@@ -1477,7 +1490,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
!(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
|
||||
s->output_mode = ROCKCHIP_OUT_MODE_P888;
|
||||
|
||||
@ -2720,7 +2720,7 @@ index abf3442baac0..5238bcbc7bae 100644
|
||||
|
||||
if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && dither_bpc <= 8)
|
||||
VOP_REG_SET(vop, common, pre_dither_down, 1);
|
||||
@@ -1497,6 +1510,9 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
@@ -1494,6 +1507,9 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
|
||||
|
||||
VOP_REG_SET(vop, common, out_mode, s->output_mode);
|
||||
|
||||
@ -2760,7 +2760,7 @@ index 72dd670bf2a7..a997578e174a 100644
|
||||
/* output flags */
|
||||
#define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index e64cedf7c7a1..a13059052124 100644
|
||||
index 6abf72b6a751..bcdfa9de3d62 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -698,6 +698,7 @@ static const struct vop_common rk3288_common = {
|
||||
@ -2874,7 +2874,7 @@ Subject: [PATCH] !fixup drm/rockchip: rk3368's vop does not support 10-bit
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index a13059052124..11a80117f5bc 100644
|
||||
index bcdfa9de3d62..d70c61d64155 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -785,8 +785,8 @@ static const struct vop_intr rk3368_vop_intr = {
|
||||
@ -2900,7 +2900,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 27 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
index 11a80117f5bc..43541a042a81 100644
|
||||
index d70c61d64155..5b79d7911ad7 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
|
||||
@@ -1103,12 +1103,36 @@ static const struct vop_intr rk3328_vop_intr = {
|
||||
@ -2954,7 +2954,7 @@ Subject: [PATCH] rockchip: vop: force skip lines if image too big
|
||||
1 file changed, 10 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 5238bcbc7bae..20e45a23edf4 100644
|
||||
index fb0ceda19fa4..0513649886e1 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -941,6 +941,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
|
||||
@ -3014,7 +3014,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index cfc57be009a6..9c10b6e3b9bc 100644
|
||||
index cc46855aba46..908cacb91c6a 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -793,8 +793,8 @@ cru: clock-controller@ff440000 {
|
||||
@ -3085,7 +3085,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 6 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index df8ff6af9157..5642a8c9bed5 100644
|
||||
index 21b4e5873630..e694655845e9 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -81,15 +81,15 @@ static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
|
||||
@ -3131,7 +3131,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 28 insertions(+), 14 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
|
||||
index 980223c32aba..09c6f8020212 100644
|
||||
index 1db62a3a4c67..b4f559e2b86c 100644
|
||||
--- a/drivers/clk/rockchip/clk-rk3399.c
|
||||
+++ b/drivers/clk/rockchip/clk-rk3399.c
|
||||
@@ -107,20 +107,34 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
|
||||
@ -3445,10 +3445,10 @@ Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 5642a8c9bed5..84cc52858ffb 100644
|
||||
index e694655845e9..fb3ed58d0e77 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -1060,7 +1060,7 @@ static void hdmi_video_csc(struct dw_hdmi *hdmi)
|
||||
@@ -1061,7 +1061,7 @@ static void hdmi_video_csc(struct dw_hdmi *hdmi)
|
||||
if (is_color_space_interpolation(hdmi))
|
||||
interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
|
||||
else if (is_color_space_decimation(hdmi))
|
||||
@ -3457,6 +3457,7 @@ index 5642a8c9bed5..84cc52858ffb 100644
|
||||
|
||||
switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
|
||||
case 8:
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Tue, 1 Jun 2021 19:24:37 +0200
|
||||
@ -3474,7 +3475,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
index 8d1d2b8d038b..07e1327acf5e 100644
|
||||
index 976dd3c9c26f..a5929367ddbe 100644
|
||||
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
|
||||
@@ -329,7 +329,7 @@ dw_hdmi_rockchip_mode_valid(struct dw_hdmi *hdmi, void *data,
|
||||
@ -3487,7 +3488,7 @@ index 8d1d2b8d038b..07e1327acf5e 100644
|
||||
|
||||
static void
|
||||
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
index 20a73cb3005e..b1473459a579 100644
|
||||
index 0513649886e1..ab2935df35c5 100644
|
||||
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
|
||||
@@ -402,8 +402,8 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win,
|
||||
@ -3502,7 +3503,6 @@ index 20a73cb3005e..b1473459a579 100644
|
||||
}
|
||||
|
||||
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Tue, 1 Oct 2019 20:52:42 +0000
|
||||
@ -3562,10 +3562,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
4 files changed, 29 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/media/cec/core/cec-adap.c b/drivers/media/cec/core/cec-adap.c
|
||||
index 79fa36de8a04..ffc934df0f4c 100644
|
||||
index cd9cb354dc2c..b9a3d7af4a0b 100644
|
||||
--- a/drivers/media/cec/core/cec-adap.c
|
||||
+++ b/drivers/media/cec/core/cec-adap.c
|
||||
@@ -1613,8 +1613,15 @@ void cec_s_phys_addr(struct cec_adapter *adap, u16 phys_addr, bool block)
|
||||
@@ -1614,8 +1614,15 @@ void cec_s_phys_addr(struct cec_adapter *adap, u16 phys_addr, bool block)
|
||||
if (IS_ERR_OR_NULL(adap))
|
||||
return;
|
||||
|
||||
@ -3657,6 +3657,7 @@ index 208c9613c07e..6cea463b37bd 100644
|
||||
const struct cec_adap_ops *ops;
|
||||
void *priv;
|
||||
u32 capabilities;
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Fri, 22 Oct 2021 11:17:30 +0200
|
||||
@ -3672,14 +3673,14 @@ depending on sink's implementation.
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++++++++--------
|
||||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 +++++++++--------
|
||||
1 file changed, 9 insertions(+), 8 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 84cc52858ffb..3c20ef3bd3c1 100644
|
||||
index fb3ed58d0e77..29ed45025745 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -3036,18 +3036,11 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
|
||||
@@ -3038,18 +3038,11 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
|
||||
* ask the source to re-read the EDID.
|
||||
*/
|
||||
if (intr_stat &
|
||||
@ -3699,7 +3700,7 @@ index 84cc52858ffb..3c20ef3bd3c1 100644
|
||||
if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
|
||||
enum drm_connector_status status = phy_int_pol & HDMI_PHY_HPD
|
||||
? connector_status_connected
|
||||
@@ -3061,6 +3054,14 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
|
||||
@@ -3063,6 +3056,14 @@ static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
|
||||
drm_helper_hpd_irq_event(hdmi->bridge.dev);
|
||||
drm_bridge_hpd_notify(&hdmi->bridge, status);
|
||||
}
|
||||
|
@ -10,10 +10,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index d068383aeea8..5c03fdbd45ec 100644
|
||||
index bd106b23f4a0..5d1d50e4fd57 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -986,7 +986,8 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
|
||||
@@ -1021,7 +1021,8 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
|
||||
state = (status & RKVDEC_RDY_STA) ?
|
||||
VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
|
||||
|
||||
@ -23,7 +23,7 @@ index d068383aeea8..5c03fdbd45ec 100644
|
||||
if (cancel_delayed_work(&rkvdec->watchdog_work)) {
|
||||
struct rkvdec_ctx *ctx;
|
||||
|
||||
@@ -1007,7 +1008,8 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
@@ -1042,7 +1043,8 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
|
||||
if (ctx) {
|
||||
dev_err(rkvdec->dev, "Frame processing timed out!\n");
|
||||
@ -46,10 +46,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 5c03fdbd45ec..ad5e02bbd8d0 100644
|
||||
index 5d1d50e4fd57..18f36e8546d9 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -1105,9 +1105,9 @@ static int rkvdec_remove(struct platform_device *pdev)
|
||||
@@ -1138,9 +1138,9 @@ static int rkvdec_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rkvdec_dev *rkvdec = platform_get_drvdata(pdev);
|
||||
|
||||
@ -651,7 +651,7 @@ index 15b9bee92016..3acc914888f6 100644
|
||||
#define RKVDEC_REG_SYSCTRL 0x008
|
||||
#define RKVDEC_IN_ENDIAN BIT(0)
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
index 18f36e8546d9..8d2495bee04d 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -10,12 +10,15 @@
|
||||
@ -670,7 +670,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
#include <linux/slab.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/workqueue.h>
|
||||
@@ -687,6 +690,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx,
|
||||
@@ -722,6 +725,11 @@ static void rkvdec_job_finish(struct rkvdec_ctx *ctx,
|
||||
|
||||
pm_runtime_mark_last_busy(rkvdec->dev);
|
||||
pm_runtime_put_autosuspend(rkvdec->dev);
|
||||
@ -682,7 +682,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
rkvdec_job_finish_no_pm(ctx, result);
|
||||
}
|
||||
|
||||
@@ -724,6 +732,33 @@ static void rkvdec_device_run(void *priv)
|
||||
@@ -759,6 +767,33 @@ static void rkvdec_device_run(void *priv)
|
||||
|
||||
if (WARN_ON(!desc))
|
||||
return;
|
||||
@ -716,7 +716,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
|
||||
ret = pm_runtime_resume_and_get(rkvdec->dev);
|
||||
if (ret < 0) {
|
||||
@@ -991,6 +1026,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
|
||||
@@ -1026,6 +1061,11 @@ static irqreturn_t rkvdec_irq_handler(int irq, void *priv)
|
||||
if (cancel_delayed_work(&rkvdec->watchdog_work)) {
|
||||
struct rkvdec_ctx *ctx;
|
||||
|
||||
@ -728,7 +728,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
|
||||
rkvdec_job_finish(ctx, state);
|
||||
}
|
||||
@@ -1008,6 +1048,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
@@ -1043,6 +1083,7 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
ctx = v4l2_m2m_get_curr_priv(rkvdec->m2m_dev);
|
||||
if (ctx) {
|
||||
dev_err(rkvdec->dev, "Frame processing timed out!\n");
|
||||
@ -736,7 +736,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
writel(RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_IRQ_DIS,
|
||||
rkvdec->regs + RKVDEC_REG_INTERRUPT);
|
||||
writel(0, rkvdec->regs + RKVDEC_REG_SYSCTRL);
|
||||
@@ -1085,6 +1126,18 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
@@ -1118,6 +1159,18 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -756,7 +756,7 @@ index ad5e02bbd8d0..6abce36eee7f 100644
|
||||
pm_runtime_use_autosuspend(&pdev->dev);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
index 7b6f44ee8a1a..fa24bcb6ff42 100644
|
||||
index c26c472baa6f..f360f2ef799f 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
@@ -11,10 +11,11 @@
|
||||
@ -785,7 +785,7 @@ index 7b6f44ee8a1a..fa24bcb6ff42 100644
|
||||
struct rkvdec_ctx;
|
||||
|
||||
struct rkvdec_ctrl_desc {
|
||||
@@ -90,6 +97,8 @@ struct rkvdec_dev {
|
||||
@@ -94,6 +101,8 @@ struct rkvdec_dev {
|
||||
void __iomem *regs;
|
||||
struct mutex vdev_lock; /* serializes ioctls */
|
||||
struct delayed_work watchdog_work;
|
||||
@ -805,10 +805,10 @@ Subject: [PATCH] WIP: arm64: dts: add resets to vdec for RK3399
|
||||
1 file changed, 9 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index 52a748053a97..2c7b263a82cd 100644
|
||||
index e21b93d57300..638224b6ff70 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -993,7 +993,10 @@ power-domain@RK3399_PD_VCODEC {
|
||||
@@ -1053,7 +1053,10 @@ power-domain@RK3399_PD_VCODEC {
|
||||
power-domain@RK3399_PD_VDU {
|
||||
reg = <RK3399_PD_VDU>;
|
||||
clocks = <&cru ACLK_VDU>,
|
||||
@ -820,7 +820,7 @@ index 52a748053a97..2c7b263a82cd 100644
|
||||
pm_qos = <&qos_video_m1_r>,
|
||||
<&qos_video_m1_w>;
|
||||
#power-domain-cells = <0>;
|
||||
@@ -1266,6 +1269,11 @@ vdec: video-codec@ff660000 {
|
||||
@@ -1326,6 +1329,11 @@ vdec: video-codec@ff660000 {
|
||||
clock-names = "axi", "ahb", "cabac", "core";
|
||||
iommus = <&vdec_mmu>;
|
||||
power-domains = <&power RK3399_PD_VDU>;
|
||||
@ -844,10 +844,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index 2c7b263a82cd..ec3561d147d5 100644
|
||||
index 638224b6ff70..533a031c7e24 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1262,7 +1262,7 @@ vpu_mmu: iommu@ff650800 {
|
||||
@@ -1322,7 +1322,7 @@ vpu_mmu: iommu@ff650800 {
|
||||
|
||||
vdec: video-codec@ff660000 {
|
||||
compatible = "rockchip,rk3399-vdec";
|
||||
@ -883,7 +883,7 @@ index 3f4772c8d095..21a78372dae6 100644
|
||||
reg:
|
||||
maxItems: 1
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index 9c10b6e3b9bc..23021373e15b 100644
|
||||
index 908cacb91c6a..d8a812a7d23b 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -306,6 +306,10 @@ power-domain@RK3328_PD_HEVC {
|
||||
@ -944,10 +944,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 5 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 6abce36eee7f..fbaf0303f7c2 100644
|
||||
index 8d2495bee04d..19b31bef0bb3 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -1096,10 +1096,12 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
@@ -1130,10 +1130,12 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
@ -961,8 +961,8 @@ index 6abce36eee7f..fbaf0303f7c2 100644
|
||||
- clk_set_rate(rkvdec->clocks[0].clk, 500 * 1000 * 1000);
|
||||
+ clk_set_rate(rkvdec->clocks[0].clk, 400 * 1000 * 1000);
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
rkvdec->regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
rkvdec->regs = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(rkvdec->regs))
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
@ -977,7 +977,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 11 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
index d4f52957cc53..3d98e2251ea5 100644
|
||||
index f372f767d4ff..f0014823a093 100644
|
||||
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
@@ -15,7 +15,8 @@
|
||||
@ -990,7 +990,7 @@ index d4f52957cc53..3d98e2251ea5 100644
|
||||
|
||||
/*
|
||||
* Supported formats.
|
||||
@@ -272,13 +273,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
|
||||
@@ -273,13 +274,20 @@ static int rk3066_vpu_hw_init(struct hantro_dev *vpu)
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1012,7 +1012,7 @@ index d4f52957cc53..3d98e2251ea5 100644
|
||||
static void rk3066_vpu_dec_reset(struct hantro_ctx *ctx)
|
||||
{
|
||||
struct hantro_dev *vpu = ctx->dev;
|
||||
@@ -511,7 +519,7 @@ const struct hantro_variant rk3288_vpu_variant = {
|
||||
@@ -512,7 +520,7 @@ const struct hantro_variant rk3288_vpu_variant = {
|
||||
.codec_ops = rk3288_vpu_codec_ops,
|
||||
.irqs = rockchip_vpu1_irqs,
|
||||
.num_irqs = ARRAY_SIZE(rockchip_vpu1_irqs),
|
||||
@ -1021,3 +1021,59 @@ index d4f52957cc53..3d98e2251ea5 100644
|
||||
.clk_names = rockchip_vpu_clk_names,
|
||||
.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
|
||||
};
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Sun, 16 Jan 2022 18:38:23 +0100
|
||||
Subject: [PATCH] media: rkvdec: split vp9/h264 decoded_fmts
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
drivers/staging/media/rkvdec/rkvdec.c | 14 +++++++++-----
|
||||
1 file changed, 9 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 19b31bef0bb3..63385d92880e 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -152,13 +152,17 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
|
||||
.num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
|
||||
};
|
||||
|
||||
-static const u32 rkvdec_h264_vp9_decoded_fmts[] = {
|
||||
+static const u32 rkvdec_h264_decoded_fmts[] = {
|
||||
V4L2_PIX_FMT_NV12,
|
||||
V4L2_PIX_FMT_NV15,
|
||||
V4L2_PIX_FMT_NV16,
|
||||
V4L2_PIX_FMT_NV20,
|
||||
};
|
||||
|
||||
+static const u32 rkvdec_vp9_decoded_fmts[] = {
|
||||
+ V4L2_PIX_FMT_NV12,
|
||||
+};
|
||||
+
|
||||
static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = {
|
||||
{
|
||||
.cfg.id = V4L2_CID_STATELESS_VP9_FRAME,
|
||||
@@ -192,8 +196,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
},
|
||||
.ctrls = &rkvdec_h264_ctrls,
|
||||
.ops = &rkvdec_h264_fmt_ops,
|
||||
- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
|
||||
- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
|
||||
+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
|
||||
+ .decoded_fmts = rkvdec_h264_decoded_fmts,
|
||||
},
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_VP9_FRAME,
|
||||
@@ -207,8 +211,8 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
},
|
||||
.ctrls = &rkvdec_vp9_ctrls,
|
||||
.ops = &rkvdec_vp9_fmt_ops,
|
||||
- .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_vp9_decoded_fmts),
|
||||
- .decoded_fmts = rkvdec_h264_vp9_decoded_fmts,
|
||||
+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
|
||||
+ .decoded_fmts = rkvdec_vp9_decoded_fmts,
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -1,3 +1,55 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Sun, 4 Jul 2021 15:19:44 +0200
|
||||
Subject: [PATCH] media: rkvdec: disable QoS for VP9 (corruptions on RK3328
|
||||
otherwise)
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
drivers/staging/media/rkvdec/rkvdec-regs.h | 2 ++
|
||||
drivers/staging/media/rkvdec/rkvdec-vp9.c | 8 ++++++++
|
||||
2 files changed, 10 insertions(+)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
index 3acc914888f6..265f5234f4eb 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
@@ -222,6 +222,8 @@
|
||||
#define RKVDEC_REG_H264_ERR_E 0x134
|
||||
#define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff)
|
||||
|
||||
+#define RKVDEC_QOS_CTRL 0x18C
|
||||
+
|
||||
#define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410
|
||||
#define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-vp9.c b/drivers/staging/media/rkvdec/rkvdec-vp9.c
|
||||
index 311a12656072..ea270262bbed 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-vp9.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-vp9.c
|
||||
@@ -802,6 +802,7 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
|
||||
struct rkvdec_dev *rkvdec = ctx->dev;
|
||||
struct rkvdec_vp9_run run = { };
|
||||
int ret;
|
||||
+ u32 reg;
|
||||
|
||||
ret = rkvdec_vp9_run_preamble(ctx, &run);
|
||||
if (ret) {
|
||||
@@ -823,6 +824,13 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx)
|
||||
writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND);
|
||||
|
||||
writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN);
|
||||
+
|
||||
+ /* disable QOS for RK3328 - no effect on other SoCs */
|
||||
+ reg = readl(rkvdec->regs + RKVDEC_QOS_CTRL);
|
||||
+ reg |= 0xFFFF;
|
||||
+ reg &= (~BIT(12));
|
||||
+ writel(reg, rkvdec->regs + RKVDEC_QOS_CTRL);
|
||||
+
|
||||
/* Start decoding! */
|
||||
writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E |
|
||||
RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E,
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Wed, 2 Sep 2020 19:52:02 +0200
|
||||
@ -11,11 +63,11 @@ is running at the same time (voltage to high)
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 34 ++++++++++++++++++++++++
|
||||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 35 ++++++++++++++++++++++++
|
||||
1 file changed, 35 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index 23021373e15b..ca03c8ed9708 100644
|
||||
index d8a812a7d23b..e4c6a33b4b7e 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -300,6 +300,11 @@ power: power-controller {
|
||||
@ -150,10 +202,10 @@ index 9c1e38c54eae..ee332fc9cf1f 100644
|
||||
|
||||
simple-audio-card,codec {
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index ec3561d147d5..b2ed593a229c 100644
|
||||
index 533a031c7e24..c4894053b3f6 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1807,7 +1807,7 @@ hdmi_sound: hdmi-sound {
|
||||
@@ -1867,7 +1867,7 @@ hdmi_sound: hdmi-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
@ -174,10 +226,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
|
||||
index d62fb1a3c916..e46165bed006 100644
|
||||
index 4dcdec6487bb..6549651b9978 100644
|
||||
--- a/drivers/gpu/drm/drm_gem.c
|
||||
+++ b/drivers/gpu/drm/drm_gem.c
|
||||
@@ -1073,7 +1073,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
|
||||
@@ -1051,7 +1051,7 @@ int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
|
||||
ret = obj->funcs->mmap(obj, vma);
|
||||
if (ret)
|
||||
goto err_drm_gem_object_put;
|
||||
@ -517,7 +569,7 @@ Subject: [PATCH] WIP: dw-hdmi-cec: sleep 100ms on error
|
||||
1 file changed, 16 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
index 70ab4fbdc23e..bf54bc70624f 100644
|
||||
index c8f44bcb298a..d4280ce4542c 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c
|
||||
@@ -4,6 +4,7 @@
|
||||
@ -581,10 +633,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index b2ed593a229c..27938ff0d208 100644
|
||||
index c4894053b3f6..b39a3390bd7d 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1393,7 +1393,7 @@ cru: clock-controller@ff760000 {
|
||||
@@ -1453,7 +1453,7 @@ cru: clock-controller@ff760000 {
|
||||
<1000000000>,
|
||||
<150000000>, <75000000>,
|
||||
<37500000>,
|
||||
@ -632,10 +684,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 1 insertion(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
index 3d98e2251ea5..b201700ccc8a 100644
|
||||
index f0014823a093..db4b9fe26256 100644
|
||||
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
@@ -530,8 +530,7 @@ const struct hantro_variant rk3328_vpu_variant = {
|
||||
@@ -531,8 +531,7 @@ const struct hantro_variant rk3328_vpu_variant = {
|
||||
.dec_offset = 0x400,
|
||||
.dec_fmts = rk3399_vpu_dec_fmts,
|
||||
.num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
|
||||
@ -646,7 +698,6 @@ index 3d98e2251ea5..b201700ccc8a 100644
|
||||
.irqs = rockchip_vdpu2_irqs,
|
||||
.num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
|
||||
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Alex Bee <knaerzche@gmail.com>
|
||||
Date: Sat, 30 Oct 2021 12:19:19 +0200
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -2653,7 +2653,7 @@ index 000000000000..c3cceba837c2
|
||||
+ .run = rkvdec_hevc_run,
|
||||
+};
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec-regs.h b/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
index 3acc914888f6..4addfaefdfb4 100644
|
||||
index 265f5234f4eb..4319ee3ccbbc 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec-regs.h
|
||||
@@ -48,6 +48,7 @@
|
||||
@ -2665,7 +2665,7 @@ index 3acc914888f6..4addfaefdfb4 100644
|
||||
#define RKVDEC_MODE_VP9 2
|
||||
#define RKVDEC_RPS_MODE BIT(24)
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 2c0c6dcbd066..c269e4a21a29 100644
|
||||
index 63385d92880e..7340972faead 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -147,6 +147,58 @@ static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = {
|
||||
@ -2727,7 +2727,7 @@ index 2c0c6dcbd066..c269e4a21a29 100644
|
||||
static const struct rkvdec_ctrls rkvdec_h264_ctrls = {
|
||||
.ctrls = rkvdec_h264_ctrl_descs,
|
||||
.num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs),
|
||||
@@ -208,6 +260,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
@@ -199,6 +251,21 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
.num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts),
|
||||
.decoded_fmts = rkvdec_h264_decoded_fmts,
|
||||
},
|
||||
@ -2750,7 +2750,7 @@ index 2c0c6dcbd066..c269e4a21a29 100644
|
||||
.fourcc = V4L2_PIX_FMT_VP9_FRAME,
|
||||
.frmsize = {
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
index 18dd721172d8..d60840c179a4 100644
|
||||
index f360f2ef799f..53719e825c70 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
@@ -131,6 +131,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run);
|
||||
@ -2874,7 +2874,7 @@ index c3cceba837c2..5c341b5fa534 100644
|
||||
V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS);
|
||||
run->slices_params = ctrl ? ctrl->p_cur.p : NULL;
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index c269e4a21a29..e91c2b3e9fd9 100644
|
||||
index 7340972faead..722d9912b332 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -163,6 +163,9 @@ static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = {
|
||||
@ -2928,7 +2928,7 @@ index 5c341b5fa534..8ea2ad9f4f3a 100644
|
||||
.stop = rkvdec_hevc_stop,
|
||||
.run = rkvdec_hevc_run,
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index e91c2b3e9fd9..da32a6350344 100644
|
||||
index 722d9912b332..62e728777cd4 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -79,6 +79,26 @@ static int rkvdec_try_ctrl(struct v4l2_ctrl *ctrl)
|
||||
@ -3125,7 +3125,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
2 files changed, 84 insertions(+), 30 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index da32a6350344..4fb05e8b5a54 100644
|
||||
index 62e728777cd4..a5552ccc9460 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -14,6 +14,7 @@
|
||||
@ -3136,7 +3136,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
@@ -269,21 +270,6 @@ static const u32 rkvdec_vp9_decoded_fmts[] = {
|
||||
@@ -260,21 +261,6 @@ static const struct rkvdec_ctrls rkvdec_vp9_ctrls = {
|
||||
};
|
||||
|
||||
static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
@ -3158,7 +3158,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_HEVC_SLICE,
|
||||
.frmsize = {
|
||||
@@ -298,6 +284,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
@@ -289,6 +275,23 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
.ops = &rkvdec_hevc_fmt_ops,
|
||||
.num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts),
|
||||
.decoded_fmts = rkvdec_hevc_decoded_fmts,
|
||||
@ -3182,7 +3182,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
},
|
||||
{
|
||||
.fourcc = V4L2_PIX_FMT_VP9_FRAME,
|
||||
@@ -313,16 +316,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
@@ -304,16 +307,31 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = {
|
||||
.ops = &rkvdec_vp9_fmt_ops,
|
||||
.num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts),
|
||||
.decoded_fmts = rkvdec_vp9_decoded_fmts,
|
||||
@ -3217,7 +3217,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
return &rkvdec_coded_fmts[i];
|
||||
}
|
||||
|
||||
@@ -345,7 +363,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
|
||||
@@ -336,7 +354,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx)
|
||||
{
|
||||
struct v4l2_format *f = &ctx->coded_fmt;
|
||||
|
||||
@ -3226,7 +3226,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc);
|
||||
|
||||
f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
|
||||
@@ -372,11 +390,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv,
|
||||
@@ -363,11 +381,13 @@ static int rkvdec_enum_framesizes(struct file *file, void *priv,
|
||||
struct v4l2_frmsizeenum *fsize)
|
||||
{
|
||||
const struct rkvdec_coded_fmt_desc *fmt;
|
||||
@ -3241,7 +3241,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
if (!fmt)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -447,10 +467,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv,
|
||||
@@ -438,10 +458,11 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv,
|
||||
struct rkvdec_ctx *ctx = fh_to_rkvdec_ctx(priv);
|
||||
const struct rkvdec_coded_fmt_desc *desc;
|
||||
|
||||
@ -3256,7 +3256,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
}
|
||||
|
||||
v4l2_apply_frmsize_constraints(&pix_mp->width,
|
||||
@@ -537,7 +558,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
|
||||
@@ -519,7 +540,8 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv,
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -3266,7 +3266,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
if (!desc)
|
||||
return -EINVAL;
|
||||
ctx->coded_fmt_desc = desc;
|
||||
@@ -585,7 +607,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv,
|
||||
@@ -567,7 +589,10 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv,
|
||||
static int rkvdec_enum_output_fmt(struct file *file, void *priv,
|
||||
struct v4l2_fmtdesc *f)
|
||||
{
|
||||
@ -3278,7 +3278,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
return -EINVAL;
|
||||
|
||||
f->pixelformat = rkvdec_coded_fmts[f->index].fourcc;
|
||||
@@ -993,14 +1018,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
|
||||
@@ -975,14 +1000,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx)
|
||||
int ret;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++)
|
||||
@ -3300,7 +3300,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
}
|
||||
|
||||
ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl);
|
||||
@@ -1204,8 +1232,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
@@ -1186,8 +1214,17 @@ static void rkvdec_watchdog_func(struct work_struct *work)
|
||||
}
|
||||
}
|
||||
|
||||
@ -3319,7 +3319,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, of_rkvdec_match);
|
||||
@@ -1218,6 +1255,7 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
@@ -1199,6 +1236,7 @@ static const char * const rkvdec_clk_names[] = {
|
||||
static int rkvdec_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct rkvdec_dev *rkvdec;
|
||||
@ -3327,7 +3327,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
unsigned int i;
|
||||
int ret, irq;
|
||||
|
||||
@@ -1243,6 +1281,12 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
@@ -1224,6 +1262,12 @@ static int rkvdec_probe(struct platform_device *pdev)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -3341,7 +3341,7 @@ index da32a6350344..4fb05e8b5a54 100644
|
||||
* Don't bump ACLK to max. possible freq. (500 MHz) to improve performance,
|
||||
* since it will lead to non-recoverable decoder lockups in case of decoding
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.h b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
index d60840c179a4..ac1e7d053f62 100644
|
||||
index 53719e825c70..d2096ec351e1 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.h
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.h
|
||||
@@ -29,6 +29,10 @@
|
||||
@ -3397,10 +3397,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 8 insertions(+)
|
||||
|
||||
diff --git a/drivers/staging/media/rkvdec/rkvdec.c b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
index 4fb05e8b5a54..8767b1149009 100644
|
||||
index a5552ccc9460..5fc6d30fd7c4 100644
|
||||
--- a/drivers/staging/media/rkvdec/rkvdec.c
|
||||
+++ b/drivers/staging/media/rkvdec/rkvdec.c
|
||||
@@ -1238,11 +1238,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
|
||||
@@ -1220,11 +1220,19 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = {
|
||||
RKVDEC_CAPABILITY_VP9
|
||||
};
|
||||
|
||||
@ -3432,10 +3432,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 20 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 831484253e27..64b36cc8ef94 100644
|
||||
index eb9d3bdf1d5e..2c1f0a7e0603 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -1252,6 +1252,25 @@ vpu_mmu: iommu@ff9a0800 {
|
||||
@@ -1247,6 +1247,25 @@ vpu_mmu: iommu@ff9a0800 {
|
||||
power-domains = <&power RK3288_PD_VIDEO>;
|
||||
};
|
||||
|
||||
@ -3461,7 +3461,7 @@ index 831484253e27..64b36cc8ef94 100644
|
||||
hevc_mmu: iommu@ff9c0440 {
|
||||
compatible = "rockchip,iommu";
|
||||
reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
|
||||
@@ -1260,7 +1279,7 @@ hevc_mmu: iommu@ff9c0440 {
|
||||
@@ -1254,7 +1273,7 @@ hevc_mmu: iommu@ff9c0440 {
|
||||
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
|
||||
clock-names = "aclk", "iface";
|
||||
#iommu-cells = <0>;
|
@ -109,10 +109,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
create mode 100644 drivers/media/platform/rockchip/iep/iep.h
|
||||
|
||||
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
|
||||
index 157c924686e4..d77056060c7f 100644
|
||||
index cf4adc64c953..79b850a71449 100644
|
||||
--- a/drivers/media/platform/Kconfig
|
||||
+++ b/drivers/media/platform/Kconfig
|
||||
@@ -527,6 +527,20 @@ config VIDEO_RENESAS_VSP1
|
||||
@@ -546,6 +546,20 @@ config VIDEO_RENESAS_VSP1
|
||||
To compile this driver as a module, choose M here: the module
|
||||
will be called vsp1.
|
||||
|
||||
@ -134,7 +134,7 @@ index 157c924686e4..d77056060c7f 100644
|
||||
tristate "Rockchip Raster 2d Graphic Acceleration Unit"
|
||||
depends on VIDEO_DEV && VIDEO_V4L2
|
||||
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
|
||||
index 73ce083c2fc6..d1cf1cf99027 100644
|
||||
index a148553babfc..08fcccdbbb49 100644
|
||||
--- a/drivers/media/platform/Makefile
|
||||
+++ b/drivers/media/platform/Makefile
|
||||
@@ -54,6 +54,7 @@ obj-$(CONFIG_VIDEO_RENESAS_FDP1) += rcar_fdp1.o
|
||||
@ -1680,10 +1680,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 22 insertions(+)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
index ca03c8ed9708..ef0d04afc1b1 100644
|
||||
index e4c6a33b4b7e..54a3d0022363 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -759,6 +759,28 @@ vop_mmu: iommu@ff373f00 {
|
||||
@@ -760,6 +760,28 @@ vop_mmu: iommu@ff373f00 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1724,10 +1724,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 12 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
index 27938ff0d208..9adfc422ae90 100644
|
||||
index b39a3390bd7d..f9769857d147 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1286,14 +1286,25 @@ vdec_mmu: iommu@ff660480 {
|
||||
@@ -1346,14 +1346,25 @@ vdec_mmu: iommu@ff660480 {
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
@ -1766,10 +1766,10 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
1 file changed, 12 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
|
||||
index 64b36cc8ef94..159c22805d03 100644
|
||||
index 2c1f0a7e0603..afcc4d9ec746 100644
|
||||
--- a/arch/arm/boot/dts/rk3288.dtsi
|
||||
+++ b/arch/arm/boot/dts/rk3288.dtsi
|
||||
@@ -983,6 +983,17 @@ crypto: cypto-controller@ff8a0000 {
|
||||
@@ -983,14 +983,25 @@ crypto: cypto-controller@ff8a0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -1787,8 +1787,7 @@ index 64b36cc8ef94..159c22805d03 100644
|
||||
iep_mmu: iommu@ff900800 {
|
||||
compatible = "rockchip,iommu";
|
||||
reg = <0x0 0xff900800 0x0 0x40>;
|
||||
@@ -990,8 +1001,8 @@ iep_mmu: iommu@ff900800 {
|
||||
interrupt-names = "iep_mmu";
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
|
||||
clock-names = "aclk", "iface";
|
||||
+ power-domains = <&power RK3288_PD_VIO>;
|
Loading…
x
Reference in New Issue
Block a user