Merge pull request #7069 from knaerzche/rk-misc-fixes

Rockchip: various fixes and enhancements
This commit is contained in:
Jernej Škrabec 2022-10-31 18:52:31 +01:00 committed by GitHub
commit d841dd3d44
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
16 changed files with 702 additions and 822 deletions

View File

@ -4302,13 +4302,13 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
# CONFIG_USB_EHCI_FSL is not set
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
# CONFIG_USB_MAX3421_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_HCD_PLATFORM is not set
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_SL811_HCD is not set
CONFIG_USB_R8A66597_HCD=m
# CONFIG_USB_HCD_BCMA is not set
@ -5752,7 +5752,7 @@ CONFIG_GENERIC_PHY=y
CONFIG_PHY_ROCKCHIP_DP=m
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
CONFIG_PHY_ROCKCHIP_EMMC=m
CONFIG_PHY_ROCKCHIP_INNO_HDMI=m
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_USB2=m
# CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set

View File

@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.0.3-rc1 Kernel Configuration
# Linux/arm64 6.0.3 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-none-elf-gcc-12.2.0 (GCC) 12.2.0"
CONFIG_CC_IS_GCC=y
@ -14,7 +14,7 @@ CONFIG_LLD_VERSION=0
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_INLINE=y
CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y
CONFIG_PAHOLE_VERSION=0
CONFIG_PAHOLE_VERSION=122
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_TABLE_SORT=y
CONFIG_THREAD_INFO_IN_TASK=y
@ -4218,6 +4218,8 @@ CONFIG_DVB_SP2=m
# Graphics support
#
CONFIG_DRM=y
CONFIG_DRM_MIPI_DBI=y
CONFIG_DRM_MIPI_DSI=y
# CONFIG_DRM_DEBUG_MM is not set
# CONFIG_DRM_DEBUG_SELFTEST is not set
CONFIG_DRM_KMS_HELPER=y
@ -4262,7 +4264,7 @@ CONFIG_ROCKCHIP_VOP=y
# CONFIG_ROCKCHIP_ANALOGIX_DP is not set
# CONFIG_ROCKCHIP_CDN_DP is not set
CONFIG_ROCKCHIP_DW_HDMI=y
# CONFIG_ROCKCHIP_DW_MIPI_DSI is not set
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
# CONFIG_ROCKCHIP_INNO_HDMI is not set
# CONFIG_ROCKCHIP_LVDS is not set
# CONFIG_ROCKCHIP_RGB is not set
@ -4281,35 +4283,80 @@ CONFIG_DRM_PANEL=y
#
# Display Panels
#
# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set
# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
CONFIG_DRM_PANEL_ABT_Y030XX067A=y
CONFIG_DRM_PANEL_ARM_VERSATILE=y
CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596=y
CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=y
CONFIG_DRM_PANEL_BOE_HIMAX8279D=y
CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=y
CONFIG_DRM_PANEL_DSI_CM=y
# CONFIG_DRM_PANEL_LVDS is not set
# CONFIG_DRM_PANEL_SIMPLE is not set
CONFIG_DRM_PANEL_EDP=y
# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
# CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set
# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set
# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
CONFIG_DRM_PANEL_SIMPLE=y
# CONFIG_DRM_PANEL_EDP is not set
CONFIG_DRM_PANEL_EBBG_FT8719=y
CONFIG_DRM_PANEL_ELIDA_KD35T133=y
CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y
CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=y
CONFIG_DRM_PANEL_ILITEK_IL9322=y
CONFIG_DRM_PANEL_ILITEK_ILI9341=y
CONFIG_DRM_PANEL_ILITEK_ILI9881C=y
CONFIG_DRM_PANEL_INNOLUX_EJ030NA=y
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=y
CONFIG_DRM_PANEL_JDI_LT070ME05000=y
CONFIG_DRM_PANEL_JDI_R63452=y
CONFIG_DRM_PANEL_KHADAS_TS050=y
CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=y
CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=y
CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=y
CONFIG_DRM_PANEL_SAMSUNG_LD9040=y
CONFIG_DRM_PANEL_LG_LB035Q02=y
CONFIG_DRM_PANEL_LG_LG4573=y
CONFIG_DRM_PANEL_NEC_NL8048HL11=y
CONFIG_DRM_PANEL_NEWVISION_NV3052C=y
CONFIG_DRM_PANEL_NOVATEK_NT35510=y
CONFIG_DRM_PANEL_NOVATEK_NT35560=y
CONFIG_DRM_PANEL_NOVATEK_NT35950=y
CONFIG_DRM_PANEL_NOVATEK_NT36672A=y
CONFIG_DRM_PANEL_NOVATEK_NT39016=y
CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=y
CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=y
CONFIG_DRM_PANEL_ORISETECH_OTM8009A=y
CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=y
CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=y
CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=y
CONFIG_DRM_PANEL_RAYDIUM_RM67191=y
CONFIG_DRM_PANEL_RAYDIUM_RM68200=y
CONFIG_DRM_PANEL_RONBO_RB070D30=y
CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=y
CONFIG_DRM_PANEL_SAMSUNG_DB7430=y
CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y
CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y
CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=y
CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=y
CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI is not set
CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y
# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
# CONFIG_DRM_PANEL_TPO_TPG110 is not set
# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y
CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y
CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=y
CONFIG_DRM_PANEL_SHARP_LS037V7DW01=y
CONFIG_DRM_PANEL_SHARP_LS043T1LE01=y
CONFIG_DRM_PANEL_SHARP_LS060T1SX01=y
CONFIG_DRM_PANEL_SITRONIX_ST7701=y
CONFIG_DRM_PANEL_SITRONIX_ST7703=y
CONFIG_DRM_PANEL_SITRONIX_ST7789V=y
CONFIG_DRM_PANEL_SONY_ACX565AKM=y
CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=y
CONFIG_DRM_PANEL_TDO_TL070WSH30=y
CONFIG_DRM_PANEL_TPO_TD028TTEC1=y
CONFIG_DRM_PANEL_TPO_TD043MTEA1=y
CONFIG_DRM_PANEL_TPO_TPG110=y
CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=y
CONFIG_DRM_PANEL_VISIONOX_RM69299=y
CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y
CONFIG_DRM_PANEL_XINPENG_XPP055C272=y
# end of Display Panels
CONFIG_DRM_BRIDGE=y
@ -4321,7 +4368,7 @@ CONFIG_DRM_PANEL_BRIDGE=y
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_CHIPONE_ICN6211 is not set
# CONFIG_DRM_CHRONTEL_CH7033 is not set
# CONFIG_DRM_DISPLAY_CONNECTOR is not set
CONFIG_DRM_DISPLAY_CONNECTOR=y
# CONFIG_DRM_ITE_IT6505 is not set
# CONFIG_DRM_LONTIUM_LT8912B is not set
# CONFIG_DRM_LONTIUM_LT9211 is not set
@ -4359,6 +4406,7 @@ CONFIG_DRM_DW_HDMI=y
CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set
CONFIG_DRM_DW_HDMI_CEC=y
CONFIG_DRM_DW_MIPI_DSI=y
# end of Display Interface Bridges
# CONFIG_DRM_ETNAVIV is not set
@ -4458,7 +4506,7 @@ CONFIG_FB_MODE_HELPERS=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_KTD253 is not set
# CONFIG_BACKLIGHT_PWM is not set
CONFIG_BACKLIGHT_PWM=y
# CONFIG_BACKLIGHT_QCOM_WLED is not set
# CONFIG_BACKLIGHT_ADP8860 is not set
# CONFIG_BACKLIGHT_ADP8870 is not set
@ -4484,7 +4532,7 @@ CONFIG_DUMMY_CONSOLE_ROWS=25
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
# end of Console display driver support
@ -4748,8 +4796,8 @@ CONFIG_SND_SOC_MAX98357A=m
# CONFIG_SND_SOC_PCM5102A is not set
# CONFIG_SND_SOC_PCM512x_I2C is not set
# CONFIG_SND_SOC_PCM512x_SPI is not set
CONFIG_SND_SOC_RK3328=y
# CONFIG_SND_SOC_RK817 is not set
# CONFIG_SND_SOC_RK3328 is not set
CONFIG_SND_SOC_RK817=m
CONFIG_SND_SOC_RL6231=m
CONFIG_SND_SOC_RT5514=m
CONFIG_SND_SOC_RT5514_SPI=m
@ -4760,7 +4808,7 @@ CONFIG_SND_SOC_RT5645=m
# CONFIG_SND_SOC_RT5659 is not set
# CONFIG_SND_SOC_RT9120 is not set
# CONFIG_SND_SOC_SGTL5000 is not set
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
# CONFIG_SND_SOC_SIMPLE_MUX is not set
CONFIG_SND_SOC_SPDIF=y
# CONFIG_SND_SOC_SSM2305 is not set
@ -5252,7 +5300,8 @@ CONFIG_TYPEC_FUSB302=m
#
# USB Type-C Alternate Mode drivers
#
# CONFIG_TYPEC_DP_ALTMODE is not set
CONFIG_TYPEC_DP_ALTMODE=y
# CONFIG_TYPEC_NVIDIA_ALTMODE is not set
# end of USB Type-C Alternate Mode drivers
CONFIG_USB_ROLE_SWITCH=y
@ -5759,7 +5808,7 @@ CONFIG_ARM_MHU=y
CONFIG_ARM_MHU_V2=m
CONFIG_PLATFORM_MHU=y
# CONFIG_PL320_MBOX is not set
CONFIG_ROCKCHIP_MBOX=y
# CONFIG_ROCKCHIP_MBOX is not set
# CONFIG_ALTERA_MBOX is not set
# CONFIG_MAILBOX_TEST is not set
CONFIG_IOMMU_IOVA=y
@ -6461,12 +6510,12 @@ CONFIG_GENERIC_PHY_MIPI_DPHY=y
CONFIG_PHY_ROCKCHIP_DP=y
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_ROCKCHIP_INNO_HDMI=y
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
# CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
# CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set
CONFIG_PHY_ROCKCHIP_PCIE=m
CONFIG_PHY_ROCKCHIP_PCIE=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_USB=y
# CONFIG_PHY_SAMSUNG_USB2 is not set
@ -7276,6 +7325,7 @@ CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
# CONFIG_DEBUG_INFO_COMPRESSED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_BTF is not set
CONFIG_PAHOLE_HAS_SPLIT_BTF=y
# CONFIG_GDB_SCRIPTS is not set
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set

View File

@ -20,7 +20,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
index 02d5f5a8ca03..3897980d69d1 100644
index 528bb4e8ac77..c8315d703ad0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
@@ -42,6 +42,21 @@ led-user {
@ -98,7 +98,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index 6b5093a1a6cf..a848a2a2ab68 100644
index b2e040dffb59..169d4b1d0a34 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -131,6 +131,22 @@ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
@ -155,7 +155,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index a848a2a2ab68..e883afa83617 100644
index 169d4b1d0a34..f0f96c72ec51 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -147,6 +147,22 @@ regulator-state-mem {
@ -215,7 +215,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index e883afa83617..cd8cc0c3c68a 100644
index f0f96c72ec51..52a437f48301 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -472,6 +472,18 @@ codec {
@ -404,7 +404,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 117 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 5e34bd0b214d..7a8d55a898f5 100644
index 93d383b8be87..bc34061a421e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -86,6 +86,66 @@ vcc5v0_sys: vcc5v0-sys {
@ -3287,7 +3287,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
index 7a8d55a898f5..950613595f42 100644
index bc34061a421e..c282f6e79960 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
@@ -46,7 +46,7 @@ green_led: led-1 {
@ -4533,7 +4533,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
index 3897980d69d1..1f709e5d8a87 100644
index c8315d703ad0..0f623198970f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
@@ -69,6 +69,18 @@ sdio_pwrseq: sdio-pwrseq {
@ -4615,7 +4615,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index cd8cc0c3c68a..037a2c3b1602 100644
index 52a437f48301..28a1db4958c7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -484,6 +484,23 @@ &i2c4 {
@ -4673,7 +4673,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
index 037a2c3b1602..e35f6ce812bd 100644
index 28a1db4958c7..fb87a168fe96 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
@@ -67,6 +67,18 @@ vcc12v_dcin: vcc12v-dcin {

View File

@ -168,7 +168,7 @@ index cb2f1acab7cf..8446a1deffd8 100644
{ .format = V4L2_PIX_FMT_YVU410, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 4 },
{ .format = V4L2_PIX_FMT_YUV411P, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 4, .vdiv = 1 },
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index c314025d977e..298cb762b8d5 100644
index e6fd355a2e92..24771edaa4f2 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1354,6 +1354,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
@ -212,7 +212,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 4af5a831bde0..5590abfaa44d 100644
index 4fc167b42cf0..a8635105e387 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -896,9 +896,9 @@ static void config_registers(struct rkvdec_ctx *ctx,
@ -487,7 +487,7 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2 files changed, 37 insertions(+), 15 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 5590abfaa44d..09cab1e53377 100644
index a8635105e387..0069d3d198db 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -1031,19 +1031,14 @@ static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
@ -624,7 +624,7 @@ Signed-off-by: Alex Bee <knaerzche@gmail.com>
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-h264.c b/drivers/staging/media/rkvdec/rkvdec-h264.c
index 09cab1e53377..6536c123a243 100644
index 0069d3d198db..2c27acaba85e 100644
--- a/drivers/staging/media/rkvdec/rkvdec-h264.c
+++ b/drivers/staging/media/rkvdec/rkvdec-h264.c
@@ -655,13 +655,14 @@ static void assemble_hw_pps(struct rkvdec_ctx *ctx,

View File

@ -540,4 +540,3 @@ index 5519347232f6..431c4ec198be 100644
iommus = <&vdec_mmu>;
power-domains = <&power RK3328_PD_VIDEO>;
};

View File

@ -666,6 +666,7 @@ index a2f0860b20bb..8961f9c7885d 100644
.audio_startup = dw_hdmi_i2s_audio_startup,
.audio_shutdown = dw_hdmi_i2s_audio_shutdown,
.get_eld = dw_hdmi_i2s_get_eld,
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 18 Sep 2022 10:35:52 +0200

View File

@ -28,7 +28,7 @@ index cb86b429cfaa..a77122641d14 100644
+rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-hevc.o rkvdec-vp9.o
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
new file mode 100644
index 000000000000..fd87cbf9c1f8
index 000000000000..7a375a23eaf1
--- /dev/null
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -0,0 +1,2572 @@
@ -3118,7 +3118,7 @@ Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
index fd87cbf9c1f8..2fbed8d49a76 100644
index 7a375a23eaf1..580073d49b6a 100644
--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -10,6 +10,7 @@
@ -3194,7 +3194,7 @@ Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkvdec/rkvdec-hevc.c b/drivers/staging/media/rkvdec/rkvdec-hevc.c
index 2fbed8d49a76..4a15ebb94149 100644
index 580073d49b6a..ce15028918b2 100644
--- a/drivers/staging/media/rkvdec/rkvdec-hevc.c
+++ b/drivers/staging/media/rkvdec/rkvdec-hevc.c
@@ -2199,6 +2199,8 @@ static void assemble_hw_rps(struct rkvdec_ctx *ctx,

View File

@ -0,0 +1,150 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Francis Fan <francis.fan@rock-chips.com>
Date: Tue, 7 Nov 2017 17:50:11 +0800
Subject: [PATCH 1/6] rockchip: efuse: add support for RK322x non-secure efuse
block
Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 96 +++++++++++++++++++++++++++++++++--
1 file changed, 92 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0a..4c9239f7ba 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -27,6 +27,17 @@
#define RK3399_STROBE BIT(1)
#define RK3399_CSB BIT(0)
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK 0x3ff
+#define RK3288_NFUSES 32
+#define RK3288_BYTES_PER_FUSE 1
+#define RK3288_PGENB BIT(3)
+#define RK3288_LOAD BIT(2)
+#define RK3288_STROBE BIT(1)
+#define RK3288_CSB BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
struct rockchip_efuse_regs {
u32 ctrl; /* 0x00 efuse control register */
u32 dout; /* 0x04 efuse data out register */
@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
*/
struct udevice *dev;
- u8 fuses[128];
+ u8 fuses[128] = {0};
int ret;
/* retrieve the device */
@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
}
U_BOOT_CMD(
- rk3399_dump_efuses, 1, 1, dump_efuses,
+ rockchip_dump_efuses, 1, 1, dump_efuses,
"Dump the content of the efuses",
""
);
@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ u8 *buffer = buf;
+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+ if (size > (max_size - offset))
+ size = max_size - offset;
+
+ /* Switch to read mode */
+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+ udelay(1);
+
+ while (size--) {
+ writel(readl(&efuse->ctrl) &
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
+ &efuse->ctrl);
+ /* set addr */
+ writel(readl(&efuse->ctrl) |
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+ &efuse->ctrl);
+ udelay(1);
+ /* strobe low to high */
+ writel(readl(&efuse->ctrl) |
+ RK3288_STROBE, &efuse->ctrl);
+ ndelay(60);
+ /* read data */
+ *buffer++ = readl(&efuse->dout);
+ /* reset strobe to low */
+ writel(readl(&efuse->ctrl) &
+ (~RK3288_STROBE), &efuse->ctrl);
+ udelay(1);
+ }
+
+ /* Switch to standby mode */
+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+ return 0;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+ EFUSE_READ efuse_read = NULL;
+
+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+ if (!efuse_read)
+ return -ENOSYS;
+
+ return (*efuse_read)(dev, offset, buf, size);
}
static const struct misc_ops rockchip_efuse_ops = {
@@ -146,7 +206,35 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
}
static const struct udevice_id rockchip_efuse_ids[] = {
- { .compatible = "rockchip,rk3399-efuse" },
+ /* deprecated but kept around for dts binding compatibility */
+ {
+ .compatible = "rockchip,rockchip-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3066a-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3188-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3228-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3288-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3368-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3399-efuse",
+ .data = (ulong)&rockchip_rk3399_efuse_read,
+ },
{}
};

View File

@ -1,292 +0,0 @@
From ae3121ae4a50702c8e52078ed52bd279d339b68b Mon Sep 17 00:00:00 2001
From: Francis Fan <francis.fan@rock-chips.com>
Date: Tue, 7 Nov 2017 17:50:11 +0800
Subject: [PATCH] rockchip: efuse: add support for RK322x non-secure efuse
block
Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 96 +++++++++++++++++++++++++++++++++--
1 file changed, 92 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0a..85a9384581 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -27,6 +27,17 @@
#define RK3399_STROBE BIT(1)
#define RK3399_CSB BIT(0)
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK 0x3ff
+#define RK3288_NFUSES 32
+#define RK3288_BYTES_PER_FUSE 1
+#define RK3288_PGENB BIT(3)
+#define RK3288_LOAD BIT(2)
+#define RK3288_STROBE BIT(1)
+#define RK3288_CSB BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
struct rockchip_efuse_regs {
u32 ctrl; /* 0x00 efuse control register */
u32 dout; /* 0x04 efuse data out register */
@@ -53,7 +64,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
*/
struct udevice *dev;
- u8 fuses[128];
+ u8 fuses[128] = {0};
int ret;
/* retrieve the device */
@@ -77,7 +88,7 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
}
U_BOOT_CMD(
- rk3399_dump_efuses, 1, 1, dump_efuses,
+ rockchip_dump_efuses, 1, 1, dump_efuses,
"Dump the content of the efuses",
""
);
@@ -127,10 +138,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ u8 *buffer = buf;
+ int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+ if (size > (max_size - offset))
+ size = max_size - offset;
+
+ /* Switch to read mode */
+ writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+ udelay(1);
+
+ while (size--) {
+ writel(readl(&efuse->ctrl) &
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
+ &efuse->ctrl);
+ /* set addr */
+ writel(readl(&efuse->ctrl) |
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+ &efuse->ctrl);
+ udelay(1);
+ /* strobe low to high */
+ writel(readl(&efuse->ctrl) |
+ RK3288_STROBE, &efuse->ctrl);
+ ndelay(60);
+ /* read data */
+ *buffer++ = readl(&efuse->dout);
+ /* reset strobe to low */
+ writel(readl(&efuse->ctrl) &
+ (~RK3288_STROBE), &efuse->ctrl);
+ udelay(1);
+ }
+
+ /* Switch to standby mode */
+ writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+ return 0;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+ EFUSE_READ efuse_read = NULL;
+
+ efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+ if (!efuse_read)
+ return -ENOSYS;
+
+ return (*efuse_read)(dev, offset, buf, size);
}
static const struct misc_ops rockchip_efuse_ops = {
@@ -146,7 +206,35 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
}
static const struct udevice_id rockchip_efuse_ids[] = {
- { .compatible = "rockchip,rk3399-efuse" },
+ /* deprecated but kept around for dts binding compatibility */
+ {
+ .compatible = "rockchip,rockchip-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3066a-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3188-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3228-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3288-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3368-efuse",
+ .data = (ulong)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3399-efuse",
+ .data = (ulong)&rockchip_rk3399_efuse_read,
+ },
{}
};
From 8b1ce76598895a8979c98cdf27a408b19727d708 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 2 Aug 2018 20:33:16 +0800
Subject: [PATCH] rockchip: efuse: add support for RK3328 non-secure efuse
block
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 67 +++++++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 85a9384581..1b0e81f4ad 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -13,6 +13,7 @@
#include <dm.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <malloc.h>
#include <misc.h>
#define RK3399_A_SHIFT 16
@@ -36,6 +37,13 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT 0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENB BIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
struct rockchip_efuse_regs {
@@ -46,6 +54,10 @@ struct rockchip_efuse_regs {
u32 jtag_pass; /* 0x10 JTAG password */
u32 strobe_finish_ctrl;
/* 0x14 efuse strobe finish control register */
+ u32 int_status;/* 0x18 */
+ u32 reserved; /* 0x1c */
+ u32 dout2; /* 0x20 */
+ u32 auto_ctrl; /* 0x24 */
};
struct rockchip_efuse_plat {
@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buffer;
+ int ret = 0, i = 0, j = 0;
+
+ /* Max non-secure Byte */
+ if (size > 32)
+ size = 32;
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += 96;
+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_offset = offset % RK3399_BYTES_PER_FUSE;
+ addr_len = addr_end - addr_start;
+
+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+ if (!buffer)
+ return -ENOMEM;
+
+ for (j = 0; j < addr_len; j++) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ &efuse->auto_ctrl);
+ udelay(5);
+ status = readl(&efuse->int_status);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(&efuse->dout2);
+ writel(RK3328_INT_FINISH, &efuse->int_status);
+
+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+ i += RK3399_BYTES_PER_FUSE;
+ }
+ memcpy(buf, buffer + addr_offset, size);
+err:
+ free(buffer);
+
+ return ret;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -231,6 +294,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3368-efuse",
.data = (ulong)&rockchip_rk3288_efuse_read,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (ulong)&rockchip_rk3328_efuse_read,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (ulong)&rockchip_rk3399_efuse_read,
From add1c5f168cdf625813e5a159af1057e6a9f96e2 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 11 Sep 2022 10:56:43 +0200
Subject: [PATCH] arm: dts: enable efuse for RK3288
---
arch/arm/dts/rk3288.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 9fb6d86bc1..4d0a7190f0 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -866,8 +866,7 @@
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
- reg = <0xffb40000 0x10000>;
- status = "disabled";
+ reg = <0xffb40000 0x20>;
};
gic: interrupt-controller@ffc01000 {

View File

@ -0,0 +1,117 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Thu, 2 Aug 2018 20:33:16 +0800
Subject: [PATCH 2/6] rockchip: efuse: add support for RK3328 non-secure efuse
block
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
drivers/misc/rockchip-efuse.c | 67 +++++++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 4c9239f7ba..c75405bfcf 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -13,6 +13,7 @@
#include <dm.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <malloc.h>
#include <misc.h>
#define RK3399_A_SHIFT 16
@@ -36,6 +37,13 @@
#define RK3288_STROBE BIT(1)
#define RK3288_CSB BIT(0)
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_DOUT 0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_AUTO_ENB BIT(0)
+#define RK3328_AUTO_RD BIT(1)
+
typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
struct rockchip_efuse_regs {
@@ -46,6 +54,10 @@ struct rockchip_efuse_regs {
u32 jtag_pass; /* 0x10 JTAG password */
u32 strobe_finish_ctrl;
/* 0x14 efuse strobe finish control register */
+ u32 int_status;/* 0x18 */
+ u32 reserved; /* 0x1c */
+ u32 dout2; /* 0x20 */
+ u32 auto_ctrl; /* 0x24 */
};
struct rockchip_efuse_plat {
@@ -181,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *plat = dev_get_plat(dev);
+ struct rockchip_efuse_regs *efuse =
+ (struct rockchip_efuse_regs *)plat->base;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value, status;
+ u8 *buffer;
+ int ret = 0, i = 0, j = 0;
+
+ /* Max non-secure Byte */
+ if (size > 32)
+ size = 32;
+
+ /* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+ offset += 96;
+ addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+ RK3399_BYTES_PER_FUSE;
+ addr_offset = offset % RK3399_BYTES_PER_FUSE;
+ addr_len = addr_end - addr_start;
+
+ buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+ if (!buffer)
+ return -ENOMEM;
+
+ for (j = 0; j < addr_len; j++) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ &efuse->auto_ctrl);
+ udelay(5);
+ status = readl(&efuse->int_status);
+ if (!(status & RK3328_INT_FINISH)) {
+ ret = -EIO;
+ goto err;
+ }
+ out_value = readl(&efuse->dout2);
+ writel(RK3328_INT_FINISH, &efuse->int_status);
+
+ memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+ i += RK3399_BYTES_PER_FUSE;
+ }
+ memcpy(buf, buffer + addr_offset, size);
+err:
+ free(buffer);
+
+ return ret;
+}
+
static int rockchip_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -231,6 +294,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3368-efuse",
.data = (ulong)&rockchip_rk3288_efuse_read,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (ulong)&rockchip_rk3328_efuse_read,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (ulong)&rockchip_rk3399_efuse_read,

View File

@ -0,0 +1,23 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Sun, 11 Sep 2022 10:56:43 +0200
Subject: [PATCH 3/6] arm: dts: enable efuse for RK3288
---
arch/arm/dts/rk3288.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 53ee760b98..f923630f63 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -866,8 +866,7 @@
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
- reg = <0xffb40000 0x10000>;
- status = "disabled";
+ reg = <0xffb40000 0x20>;
};
gic: interrupt-controller@ffc01000 {

View File

@ -1,13 +0,0 @@
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 9eb696b141..3f3c77ca64 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -25,7 +25,7 @@
chosen {
u-boot,spl-boot-order = \
- "same-as-spl", &emmc, &sdmmc;
+ "same-as-spl", &sdmmc, &emmc;
};
dmc: dmc@ff610000 {

View File

@ -1,7 +1,7 @@
From 16bcb2e9a7e187d76d0f627668ad2babf66126e4 Mon Sep 17 00:00:00 2001
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Date: Sat, 23 Jul 2022 13:23:19 +0200
Subject: [PATCH] rockchip: rk3328: Set VOP QoS to high priority
Subject: [PATCH 4/6] rockchip: rk3328: Set VOP QoS to high priority
The default priority for the quality of service for the video
output results in unsightly glitches on the output whenever there

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@ -0,0 +1,26 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 31 Oct 2022 17:13:47 +0100
Subject: [PATCH 5/6] rockchip: rk3288: Pick SD card as first boot device
In order to be able to boot from SD card at SPL level, always check this first
and any other mmc device later.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm/dts/rk3288-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index e411445ed6..17f2dd4d12 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -25,7 +25,7 @@
chosen {
u-boot,spl-boot-order = \
- "same-as-spl", &emmc, &sdmmc;
+ "same-as-spl", &sdmmc, &emmc;
};
dmc: dmc@ff610000 {

View File

@ -0,0 +1,37 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 31 Oct 2022 17:16:07 +0100
Subject: [PATCH 6/6] Rockchip: rk3399-evb: Don't initalize i2c bus in SPL
Since we are using this device as fallback for boards which are not supported
by mainline u-boot in combination with vendor TPL/SPL, we need to make sure
that i2c is initalized in BL33 because vendor bootchain doesn't do that in
an earlier level.
---
arch/arm/dts/rk3399-evb-u-boot.dtsi | 10 +---------
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
index 5e39b1493d..18733da7f9 100644
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
@@ -9,18 +9,10 @@
/ {
chosen {
stdout-path = "serial2:1500000n8";
- u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
};
};
-&i2c0 {
- u-boot,dm-pre-reloc;
-};
-
-&rk808 {
- u-boot,dm-pre-reloc;
-};
-
&tcphy1 {
status = "okay";
};