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Allwinner: linux: various fixes
This commit is contained in:
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commit
f1b66b0e55
@ -1,21 +1,21 @@
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From 760dd4bfec9f57bb1260f7b3219054a2ad28ceb3 Mon Sep 17 00:00:00 2001
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From 444515ce8af5d0286e7e6d5505446f7c70ab7ec0 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Mon, 20 Jul 2020 21:34:48 +0000
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Subject: [PATCH 11/23] drm/bridge: dw-hdmi: support configuring phy for deep
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Subject: [PATCH 11/25] drm/bridge: dw-hdmi: support configuring phy for deep
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color
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Q: Should we rename dw_hdmi_curr_ctrl and dw_hdmi_phy_config mpixelclock to mtmdsclock ?
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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---
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drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 ++++++++++++-----
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1 file changed, 12 insertions(+), 5 deletions(-)
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drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 19 +++++++++++++------
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1 file changed, 13 insertions(+), 6 deletions(-)
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diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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index c00fb616b587..da2641a65e75 100644
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index c00fb616b587..8f0a8517ac74 100644
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--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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@@ -1578,6 +1578,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
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@@ -1578,20 +1578,21 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
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const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
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const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
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const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
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@ -23,7 +23,10 @@ index c00fb616b587..da2641a65e75 100644
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/* TOFIX Will need 420 specific PHY configuration tables */
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@@ -1587,11 +1588,11 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
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/* PLL/MPLL Cfg - always match on final entry */
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for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
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- if (mpixelclock <= mpll_config->mpixelclock)
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+ if (mtmdsclock <= mpll_config->mpixelclock)
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break;
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for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
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@ -1,7 +1,7 @@
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From d8126b4e7ec771a5be4ab9513aed390461a70d3d Mon Sep 17 00:00:00 2001
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From bf64e38ca38de03d894db29cf0f006a03ec93688 Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@gmail.com>
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Date: Sun, 24 Sep 2023 13:20:12 +0200
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Subject: [PATCH 13/23] WIP: drm/sun4i: de3: Add support for YUV420 output
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Subject: [PATCH 13/25] WIP: drm/sun4i: de3: Add support for YUV420 output
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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---
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@ -12,16 +12,16 @@ Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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drivers/gpu/drm/sun4i/sun50i_fmt.c | 74 ++++++++++
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drivers/gpu/drm/sun4i/sun50i_fmt.h | 30 ++++
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drivers/gpu/drm/sun4i/sun8i_csc.c | 172 +++++++++++++++++++++-
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drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 97 +++++++++++-
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drivers/gpu/drm/sun4i/sun8i_mixer.c | 51 ++++++-
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drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 121 ++++++++++++++-
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drivers/gpu/drm/sun4i/sun8i_mixer.c | 52 ++++++-
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drivers/gpu/drm/sun4i/sun8i_mixer.h | 2 +
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drivers/gpu/drm/sun4i/sunxi_engine.h | 48 ++++++
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11 files changed, 509 insertions(+), 25 deletions(-)
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drivers/gpu/drm/sun4i/sunxi_engine.h | 34 +++++
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11 files changed, 515 insertions(+), 30 deletions(-)
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create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.c
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create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.h
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diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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index 9c8c17827956..8b4b4d45c1c9 100644
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index 348f58b45e72..fc3c8c660d75 100644
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--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
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@@ -1019,19 +1019,15 @@ static void hdmi_video_sample(struct dw_hdmi *hdmi)
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@ -535,10 +535,10 @@ index 68d955c63b05..3b022bfb85ad 100644
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return;
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}
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diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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index 22e084989ee6..7309590feb56 100644
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index 22e084989ee6..0837e2576556 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c
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@@ -7,6 +7,7 @@
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@@ -7,18 +7,25 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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@ -546,18 +546,25 @@ index 22e084989ee6..7309590feb56 100644
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_bridge_connector.h>
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@@ -17,8 +18,10 @@
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#include <drm/drm_managed.h>
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#include <drm/drm_modeset_helper_vtables.h>
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#include <drm/drm_of.h>
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+#include <drm/drm_print.h>
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#include <drm/drm_simple_kms_helper.h>
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#include <media/cec-notifier.h>
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+#include <uapi/linux/media-bus-format.h>
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+
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+#include "sun4i_crtc.h"
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+#include "sun4i_tcon.h"
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#include "sun8i_dw_hdmi.h"
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#include "sun8i_tcon_top.h"
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+#include "sunxi_engine.h"
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#define bridge_to_sun8i_dw_hdmi(x) \
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container_of(x, struct sun8i_dw_hdmi, enc_bridge)
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@@ -64,16 +67,89 @@ static int sun8i_hdmi_enc_atomic_check(struct drm_bridge *bridge,
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@@ -64,16 +71,85 @@ static int sun8i_hdmi_enc_atomic_check(struct drm_bridge *bridge,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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@ -565,7 +572,6 @@ index 22e084989ee6..7309590feb56 100644
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+ struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(crtc_state->crtc);
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+ struct sunxi_engine *engine = crtc->engine;
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+ struct drm_connector_state *old_conn_state;
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+ enum drm_color_encoding encoding;
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+
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+ old_conn_state =
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drm_atomic_get_old_connector_state(conn_state->state,
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@ -577,7 +583,7 @@ index 22e084989ee6..7309590feb56 100644
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+ case DRM_MODE_COLORIMETRY_SYCC_601:
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+ case DRM_MODE_COLORIMETRY_OPYCC_601:
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+ case DRM_MODE_COLORIMETRY_BT601_YCC:
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+ encoding = DRM_COLOR_YCBCR_BT601;
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+ engine->encoding = DRM_COLOR_YCBCR_BT601;
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+ break;
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+
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+ default:
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@ -586,7 +592,7 @@ index 22e084989ee6..7309590feb56 100644
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+ case DRM_MODE_COLORIMETRY_XVYCC_709:
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+ case DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED:
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+ case DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT:
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+ encoding = DRM_COLOR_YCBCR_BT709;
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+ engine->encoding = DRM_COLOR_YCBCR_BT709;
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+ break;
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+
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+ case DRM_MODE_COLORIMETRY_BT2020_CYCC:
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@ -594,15 +600,12 @@ index 22e084989ee6..7309590feb56 100644
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+ case DRM_MODE_COLORIMETRY_BT2020_RGB:
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+ case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
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+ case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
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+ encoding = DRM_COLOR_YCBCR_BT2020;
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+ engine->encoding = DRM_COLOR_YCBCR_BT2020;
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+ break;
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+ }
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+
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+ if (crtc->engine->format != bridge_state->output_bus_cfg.format)
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+ crtc_state->mode_changed = true;
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+
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+ sunxi_engine_set_format(engine, bridge_state->output_bus_cfg.format,
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+ encoding);
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+ engine->format = bridge_state->output_bus_cfg.format;
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+ DRM_DEBUG_DRIVER("HDMI output bus format: 0x%04x\n", engine->format);
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+
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if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))
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crtc_state->mode_changed = true;
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@ -648,7 +651,7 @@ index 22e084989ee6..7309590feb56 100644
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static const struct drm_bridge_funcs sun8i_hdmi_enc_bridge_funcs = {
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.attach = sun8i_hdmi_enc_attach,
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.detach = sun8i_hdmi_enc_detach,
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@@ -81,6 +157,7 @@ static const struct drm_bridge_funcs sun8i_hdmi_enc_bridge_funcs = {
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@@ -81,21 +157,36 @@ static const struct drm_bridge_funcs sun8i_hdmi_enc_bridge_funcs = {
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.atomic_check = sun8i_hdmi_enc_atomic_check,
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.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
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@ -656,7 +659,41 @@ index 22e084989ee6..7309590feb56 100644
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.atomic_reset = drm_atomic_helper_bridge_reset,
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};
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@@ -114,6 +191,11 @@ sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data,
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-static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder,
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- struct drm_display_mode *mode,
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- struct drm_display_mode *adj_mode)
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+static void
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+sun8i_dw_hdmi_encoder_atomic_mode_set(struct drm_encoder *encoder,
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+ struct drm_crtc_state *crtc_state,
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+ struct drm_connector_state *conn_state)
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{
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+ struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(crtc_state->crtc);
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struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
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+ struct drm_display_mode *mode = &crtc_state->adjusted_mode;
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+ int div;
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- clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
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+ switch (crtc->engine->format) {
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+ case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
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+ case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
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+ div = 2;
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+ break;
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+ default:
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+ div = 1;
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+ break;
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+ }
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+
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+ clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000 / div);
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}
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static const struct drm_encoder_helper_funcs
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sun8i_dw_hdmi_encoder_helper_funcs = {
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- .mode_set = sun8i_dw_hdmi_encoder_mode_set,
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+ .atomic_mode_set = sun8i_dw_hdmi_encoder_atomic_mode_set,
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};
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static enum drm_mode_status
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@@ -114,6 +205,11 @@ sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data,
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const struct drm_display_info *info,
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const struct drm_display_mode *mode)
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{
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@ -668,7 +705,7 @@ index 22e084989ee6..7309590feb56 100644
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/*
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* Controller support maximum of 594 MHz, which correlates to
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* 4K@60Hz 4:4:4 or RGB.
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@@ -257,6 +339,8 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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@@ -257,6 +353,8 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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plat_data->mode_valid = hdmi->quirks->mode_valid;
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plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
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@ -677,7 +714,7 @@ index 22e084989ee6..7309590feb56 100644
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plat_data->output_port = 1;
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sun8i_hdmi_phy_set_ops(phy, plat_data);
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@@ -291,8 +375,17 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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@@ -291,8 +389,17 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
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hdmi->connector = connector;
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drm_connector_attach_encoder(connector, encoder);
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@ -697,7 +734,7 @@ index 22e084989ee6..7309590feb56 100644
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cec_fill_conn_info_from_drm(&conn_info, connector);
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diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
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index 01382860aaee..8e32d0b24ac9 100644
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index 01382860aaee..b1525906a25d 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
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@@ -22,7 +22,10 @@
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@ -711,7 +748,7 @@ index 01382860aaee..8e32d0b24ac9 100644
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#include "sun8i_mixer.h"
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#include "sun8i_ui_layer.h"
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#include "sun8i_vi_layer.h"
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@@ -326,12 +329,51 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine,
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@@ -326,12 +329,52 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine,
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DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n",
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interlaced ? "on" : "off");
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@ -738,7 +775,7 @@ index 01382860aaee..8e32d0b24ac9 100644
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+
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+ count = 0;
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+
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+ formats = kcalloc(8, sizeof(*formats), GFP_KERNEL);
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+ formats = kcalloc(5, sizeof(*formats), GFP_KERNEL);
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+ if (!formats)
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+ return NULL;
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+
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@ -746,6 +783,7 @@ index 01382860aaee..8e32d0b24ac9 100644
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+ formats[count++] = MEDIA_BUS_FMT_UYYVYY10_0_5X30;
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+ formats[count++] = MEDIA_BUS_FMT_YUV8_1X24;
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+ formats[count++] = MEDIA_BUS_FMT_UYVY8_1X16;
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+ formats[count++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
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+ }
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+
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+ formats[count++] = MEDIA_BUS_FMT_RGB888_1X24;
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@ -766,7 +804,7 @@ index 01382860aaee..8e32d0b24ac9 100644
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};
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static const struct regmap_config sun8i_mixer_regmap_config = {
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@@ -392,6 +434,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
|
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@@ -392,6 +435,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master,
|
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dev_set_drvdata(dev, mixer);
|
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mixer->engine.ops = &sun8i_engine_ops;
|
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mixer->engine.node = dev->of_node;
|
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@ -775,7 +813,7 @@ index 01382860aaee..8e32d0b24ac9 100644
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|
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if (of_property_present(dev->of_node, "iommus")) {
|
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/*
|
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@@ -653,6 +697,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = {
|
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@@ -653,6 +698,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = {
|
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static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = {
|
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.ccsc = CCSC_MIXER0_LAYOUT,
|
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.is_de3 = true,
|
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@ -804,7 +842,7 @@ index 85c94884fb9a..13401643c7bf 100644
|
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};
|
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|
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diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h
|
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index ec8cf9b2bda4..5e64cda5675a 100644
|
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index ec8cf9b2bda4..608a26c3f991 100644
|
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--- a/drivers/gpu/drm/sun4i/sunxi_engine.h
|
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+++ b/drivers/gpu/drm/sun4i/sunxi_engine.h
|
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@@ -6,6 +6,8 @@
|
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@ -816,7 +854,7 @@ index ec8cf9b2bda4..5e64cda5675a 100644
|
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struct drm_plane;
|
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struct drm_device;
|
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struct drm_crtc_state;
|
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@@ -120,6 +122,20 @@ struct sunxi_engine_ops {
|
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@@ -120,6 +122,17 @@ struct sunxi_engine_ops {
|
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*/
|
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void (*mode_set)(struct sunxi_engine *engine,
|
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const struct drm_display_mode *mode);
|
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@ -831,13 +869,10 @@ index ec8cf9b2bda4..5e64cda5675a 100644
|
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+ * This function is optional.
|
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+ */
|
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+ u32 *(*get_supported_fmts)(struct sunxi_engine *engine, u32 *num);
|
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+
|
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+ void (*set_format)(struct sunxi_engine *engine, u32 format,
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+ enum drm_color_encoding encoding);
|
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};
|
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|
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/**
|
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@@ -137,6 +153,9 @@ struct sunxi_engine {
|
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@@ -137,6 +150,9 @@ struct sunxi_engine {
|
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|
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int id;
|
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|
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@ -847,7 +882,7 @@ index ec8cf9b2bda4..5e64cda5675a 100644
|
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/* Engine list management */
|
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struct list_head list;
|
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};
|
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@@ -208,4 +227,33 @@ sunxi_engine_mode_set(struct sunxi_engine *engine,
|
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@@ -208,4 +224,22 @@ sunxi_engine_mode_set(struct sunxi_engine *engine,
|
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if (engine->ops && engine->ops->mode_set)
|
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engine->ops->mode_set(engine, mode);
|
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}
|
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@ -868,17 +903,6 @@ index ec8cf9b2bda4..5e64cda5675a 100644
|
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+ *num = 0;
|
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+
|
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+ return NULL;
|
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+}
|
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+
|
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+static inline void
|
||||
+sunxi_engine_set_format(struct sunxi_engine *engine, u32 format,
|
||||
+ enum drm_color_encoding encoding)
|
||||
+{
|
||||
+ if (engine->ops && engine->ops->set_format)
|
||||
+ return engine->ops->set_format(engine, format, encoding);
|
||||
+
|
||||
+ engine->format = format;
|
||||
+ engine->encoding = encoding;
|
||||
+}
|
||||
#endif /* _SUNXI_ENGINE_H_ */
|
||||
--
|
||||
|
@ -0,0 +1,42 @@
|
||||
From f3710b424a96078f416e1be9cf52b87eadabae78 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Adri=C3=A1n=20Larumbe?= <adrian.larumbe@collabora.com>
|
||||
Date: Sun, 25 Jun 2023 15:17:16 +0100
|
||||
Subject: [PATCH] drm/bridge: dw-hdmi: truly enforce 420-only formats when drm
|
||||
mode demands it
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The current output bus format selection logic is enforcing YUV420 even
|
||||
when the drm mode allows for other bus formats as well.
|
||||
Fix it by adding check for 420-only drm modes.
|
||||
|
||||
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
|
||||
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
Link: https://patchwork.freedesktop.org/patch/msgid/6e6a217c180584a67ed7992c785764ba54af9151.1687702042.git.adrian.larumbe@collabora.com
|
||||
---
|
||||
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 ++++---
|
||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
index 8e1a9854ebc0..55281f63a186 100644
|
||||
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
|
||||
@@ -2710,9 +2710,10 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
/* Default 8bit fallback */
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24;
|
||||
|
||||
- *num_output_fmts = i;
|
||||
-
|
||||
- return output_fmts;
|
||||
+ if (drm_mode_is_420_only(info, mode)) {
|
||||
+ *num_output_fmts = i;
|
||||
+ return output_fmts;
|
||||
+ }
|
||||
}
|
||||
|
||||
/*
|
||||
--
|
||||
2.42.0
|
||||
|
@ -0,0 +1,66 @@
|
||||
From edfe1a6c99aff85e97dc1600355a66bbcb417531 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Thu, 12 Oct 2023 20:25:42 +0200
|
||||
Subject: [PATCH 22/25] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate
|
||||
change
|
||||
|
||||
While PLL CPUX clock rate change when CPU is running from it works in
|
||||
vast majority of cases, now and then it causes instability. This leads
|
||||
to system crashes and other undefined behaviour. After a lot of testing
|
||||
(30+ hours) while also doing a lot of frequency switches, we can't
|
||||
observe any instability issues anymore when doing reparenting to stable
|
||||
clock like 24 MHz oscillator.
|
||||
|
||||
Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
|
||||
Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/
|
||||
Reported-by: Chad Wagner <wagnerch42@gmail.com>
|
||||
Tested-by: Chad Wagner <wagnerch42@gmail.com>
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 19 +++++++++++++++++--
|
||||
1 file changed, 17 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
index 42568c616181..892df807275c 100644
|
||||
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
@@ -1181,11 +1181,18 @@ static const u32 usb2_clk_regs[] = {
|
||||
SUN50I_H6_USB3_CLK_REG,
|
||||
};
|
||||
|
||||
+static struct ccu_mux_nb sun50i_h6_cpu_nb = {
|
||||
+ .common = &cpux_clk.common,
|
||||
+ .cm = &cpux_clk.mux,
|
||||
+ .delay_us = 1,
|
||||
+ .bypass_index = 0, /* index of 24 MHz oscillator */
|
||||
+};
|
||||
+
|
||||
static int sun50i_h6_ccu_probe(struct platform_device *pdev)
|
||||
{
|
||||
void __iomem *reg;
|
||||
+ int i, ret;
|
||||
u32 val;
|
||||
- int i;
|
||||
|
||||
reg = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(reg))
|
||||
@@ -1252,7 +1259,15 @@ static int sun50i_h6_ccu_probe(struct platform_device *pdev)
|
||||
val |= BIT(24);
|
||||
writel(val, reg + SUN50I_H6_HDMI_CEC_CLK_REG);
|
||||
|
||||
- return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc);
|
||||
+ ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h6_ccu_desc);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* Reparent CPU during PLL CPUX rate changes */
|
||||
+ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,
|
||||
+ &sun50i_h6_cpu_nb);
|
||||
+
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id sun50i_h6_ccu_ids[] = {
|
||||
--
|
||||
2.42.0
|
||||
|
@ -0,0 +1,37 @@
|
||||
From 5dd9978ccd81cbb48b57580d90a2ce4bd8305c26 Mon Sep 17 00:00:00 2001
|
||||
From: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
Date: Thu, 12 Oct 2023 20:19:38 +0200
|
||||
Subject: [PATCH 25/25] HACK: clk: sunxi-ng: unify parent for HDMI clocks
|
||||
|
||||
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
---
|
||||
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
index 892df807275c..b63e544c86a7 100644
|
||||
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
|
||||
@@ -653,7 +653,7 @@ static SUNXI_CCU_M_WITH_GATE(pcie_aux_clk, "pcie-aux", "osc24M", 0xab8,
|
||||
static SUNXI_CCU_GATE(bus_pcie_clk, "bus-pcie", "psi-ahb1-ahb2",
|
||||
0xabc, BIT(0), 0);
|
||||
|
||||
-static const char * const hdmi_parents[] = { "pll-video0", "pll-video1",
|
||||
+static const char * const hdmi_parents[] = { "osc24M", "pll-video1",
|
||||
"pll-video1-4x" };
|
||||
static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents, 0xb00,
|
||||
0, 4, /* M */
|
||||
@@ -707,8 +707,8 @@ static SUNXI_CCU_MUX_WITH_GATE(tcon_lcd0_clk, "tcon-lcd0",
|
||||
static SUNXI_CCU_GATE(bus_tcon_lcd0_clk, "bus-tcon-lcd0", "ahb3",
|
||||
0xb7c, BIT(0), 0);
|
||||
|
||||
-static const char * const tcon_tv0_parents[] = { "pll-video0",
|
||||
- "pll-video0-4x",
|
||||
+static const char * const tcon_tv0_parents[] = { "osc24M",
|
||||
+ "osc24M",
|
||||
"pll-video1",
|
||||
"pll-video1-4x" };
|
||||
static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_tv0_clk, "tcon-tv0",
|
||||
--
|
||||
2.42.0
|
||||
|
Loading…
x
Reference in New Issue
Block a user