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make more readable
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@ -538,11 +538,11 @@ uint64_t Scheduler::millis_64_(uint32_t now) {
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#ifdef ESPHOME_MULTI_CORE_NO_ATOMICS
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#ifdef ESPHOME_MULTI_CORE_NO_ATOMICS
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// This is the multi core no atomics implementation.
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// This is the multi core no atomics implementation.
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//
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//
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// The implementation handles the 32-bit rollover (every 49.7 days) by:
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// Without atomics, this implementation uses locks more aggressively:
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// 1. Using a lock when detecting rollover to ensure atomic update
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// 1. Always locks when near the rollover boundary (within 10 seconds)
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// 2. Restricting normal updates to forward movement within the same epoch
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// 2. Always locks when detecting a large backwards jump
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// This prevents race conditions at the rollover boundary without requiring
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// 3. Updates without lock in normal forward progression (accepting minor races)
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// 64-bit atomics or locking on every call.
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// This is less efficient but necessary without atomic operations.
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uint16_t major = this->millis_major_;
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uint16_t major = this->millis_major_;
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uint32_t last = this->last_millis_;
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uint32_t last = this->last_millis_;
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