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1 Commits

Author SHA1 Message Date
Joakim Sørensen
f97c1b7c40 Add missing version to test action 2023-11-01 09:36:29 +01:00
187 changed files with 19895 additions and 12797 deletions

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@@ -38,7 +38,6 @@ body:
- rpi3-64 (Raspberry Pi 3 64-bit OS)
- rpi4 (Raspberry Pi 4/400 32-bit OS)
- rpi4-64 (Raspberry Pi 4/400 64-bit OS)
- rpi5-64 (Raspberry Pi 5 64-bit OS)
- tinker (ASUS Tinker Board/Tinker Board S)
- yellow (Home Assistant Yellow)
- green (Home Assistant Green)
@@ -81,10 +80,10 @@ body:
attributes:
label: Anything in the Supervisor logs that might be useful for us?
description: >
Supervisor Logs can be found in [Settings -> System -> Logs](https://my.home-assistant.io/redirect/logs/?provider=supervisor)
then choose `Supervisor` in the top right. Alternatively enter `ha supervisor logs` in the Home Assistant CLI.
Supervisor Logs can be found in [Settings -> System -> Logs](https://my.home-assistant.io/redirect/logs/)
then choose `Supervisor` in the top right.
[![Open your Home Assistant instance and show your Supervisor system logs.](https://my.home-assistant.io/badges/supervisor_logs.svg)](https://my.home-assistant.io/redirect/logs/?provider=supervisor)
[![Open your Home Assistant instance and show your Supervisor system logs.](https://my.home-assistant.io/badges/supervisor_logs.svg)](https://my.home-assistant.io/redirect/supervisor_logs/)
render: txt
- type: textarea
validations:
@@ -92,8 +91,8 @@ body:
attributes:
label: Anything in the Host logs that might be useful for us?
description: >
Host Logs can be found in [Settings -> System -> Logs](https://my.home-assistant.io/redirect/logs/?provider=host)
then choose `Host` in the top right. Alternatively enter `ha host logs` in the Home Assistant CLI.
Host Logs can be found in [Settings -> System -> Logs](https://my.home-assistant.io/redirect/logs/)
then choose `Host` in the top right.
render: txt
- type: textarea
attributes:

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@@ -82,7 +82,6 @@ runs:
bump_entry /tmp/version/rpi-imager-haos.json "$INPUTS_VERSION" "${{ steps.validate-input.outputs.date }}" "rpi3-64" "RPi 3"
bump_entry /tmp/version/rpi-imager-haos.json "$INPUTS_VERSION" "${{ steps.validate-input.outputs.date }}" "rpi4-64" "RPi 4/400"
bump_entry /tmp/version/rpi-imager-haos.json "$INPUTS_VERSION" "${{ steps.validate-input.outputs.date }}" "rpi5-64" "RPi 5"
- shell: bash
env:

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@@ -44,7 +44,7 @@ jobs:
persist-credentials: false
- name: Setup Python version ${{ env.PYTHON_VERSION }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ env.PYTHON_VERSION }}
@@ -59,10 +59,10 @@ jobs:
aws s3api list-objects-v2 \
--bucket "${{ secrets.R2_OS_ARTIFACTS_BUCKET }}" \
--endpoint-url "${{ secrets.R2_OS_ARTIFACTS_ENDPOINT }}" \
--prefix "${{ inputs.version }}/" \
--query 'Contents[].Key' | jq 'map(split("/")[1]) | sort' > "${{ inputs.version }}.json"
--prefix "${{ github.event.inputs.version }}/" \
--query 'Contents[].Key' | jq 'map(split("/")[1]) | sort' > "${{ github.event.inputs.version }}.json"
aws s3 cp \
"${{ inputs.version }}.json" \
"${{ github.event.inputs.version }}.json" \
s3://${{ secrets.R2_OS_ARTIFACTS_BUCKET }}/indexes/ \
--endpoint-url "${{ secrets.R2_OS_ARTIFACTS_ENDPOINT }}"

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@@ -11,11 +11,6 @@ on:
description: 'List of boards to build (comma separated identifiers)'
required: false
type: string
publish:
description: 'Publish build artifacts to R2 (not applicable to forks)'
required: true
type: boolean
default: true
env:
PYTHON_VERSION: "3.10"
@@ -35,40 +30,18 @@ jobs:
channel: ${{ steps.channel.outputs.channel }}
matrix: ${{ steps.generate_matrix.outputs.result }}
build_container_image: ghcr.io/${{ github.repository_owner }}/haos-builder@${{ steps.build_haos_builder.outputs.digest }}
publish_build: ${{ steps.check_publish.outputs.publish_build }}
self_signed_cert: ${{ steps.generate_signing_key.outputs.self_signed_cert }}
steps:
- name: Checkout source
uses: actions/checkout@v4
with:
persist-credentials: false
- name: Check if build should be published
id: check_publish
env:
PUBLISH_FLAG: ${{ inputs.publish }}
run: |
if [ "${{ github.repository }}" == "home-assistant/operating-system" ]; then
if [ "${PUBLISH_FLAG}" != "true" ] && [ "${{ github.event_name }}" != "release" ]; then
echo "publish_build=false" >> "$GITHUB_OUTPUT"
else
echo "publish_build=true" >> "$GITHUB_OUTPUT"
fi
else
echo "publish_build=false" >> "$GITHUB_OUTPUT"
fi
- name: Generate development version
shell: bash
id: version_dev
if: ${{ github.event_name != 'release' }}
env:
PUBLISH_BUILD: ${{ steps.check_publish.outputs.publish_build }}
run: |
version_dev="dev$(date --utc +'%Y%m%d')"
if [ "${{ env.PUBLISH_BUILD }}" != "true" ]; then
version_dev="dev$(date +%s)"
fi
echo "Development version \"${version_dev}\""
echo "version_dev=${version_dev}" >> $GITHUB_OUTPUT
@@ -115,7 +88,7 @@ jobs:
fi
- name: Create build matrix
uses: actions/github-script@v7
uses: actions/github-script@v6
id: generate_matrix
with:
script: |
@@ -144,36 +117,16 @@ jobs:
username: ${{ github.repository_owner }}
password: ${{ secrets.GITHUB_TOKEN }}
- name: Build and Push
uses: docker/build-push-action@v5.1.0
uses: docker/build-push-action@v5.0.0
id: build_haos_builder
with:
context: .
file: Dockerfile
tags: ghcr.io/${{ github.repository_owner }}/haos-builder
cache-from: ghcr.io/${{ github.repository_owner }}/haos-builder:cache-${{ steps.version.outputs.version_main }}
cache-to: ghcr.io/${{ github.repository_owner }}/haos-builder:cache-${{ steps.version.outputs.version_main }}
cache-from: ghcr.io/${{ github.repository_owner }}/haos-builder:cache-${{ steps.version_main.outputs.version_main }}
cache-to: ghcr.io/${{ github.repository_owner }}/haos-builder:cache-${{ steps.version_main.outputs.version_main }}
push: true
- name: Generate self-signed certificate
id: generate_signing_key
env:
RAUC_CERTIFICATE: ${{ secrets.RAUC_CERTIFICATE }}
RAUC_PRIVATE_KEY: ${{ secrets.RAUC_PRIVATE_KEY }}
if: env.RAUC_CERTIFICATE == '' || env.RAUC_PRIVATE_KEY == ''
run: |
echo "::warning:: RAUC certificate or key is missing in the repository secrets. Building with a public self-signed certificate!"
buildroot-external/scripts/generate-signing-key.sh cert.pem key.pem
echo "self_signed_cert=true" >> $GITHUB_OUTPUT
- name: Create signing key
uses: actions/upload-artifact@v4
if: steps.generate_signing_key.outcome == 'success'
with:
name: signing-key
path: |
cert.pem
key.pem
build:
name: Build for ${{ matrix.board.id }}
permissions:
@@ -193,12 +146,12 @@ jobs:
- name: Setup Python version ${{ env.PYTHON_VERSION }}
if: ${{ github.event_name != 'release' }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ env.PYTHON_VERSION }}
- name: Install AWS CLI
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build == 'true' }}
if: ${{ github.event_name != 'release' }}
run: pip install awscli
- name: Set version suffix
@@ -209,7 +162,6 @@ jobs:
sed -i -E "s/(^VERSION_SUFFIX=\").*(\"$)/\1${VERSION_DEV}\2/" buildroot-external/meta
- name: 'Add release PKI certs'
if: ${{ needs.prepare.outputs.self_signed_cert != 'true' }}
env:
RAUC_CERTIFICATE: ${{ secrets.RAUC_CERTIFICATE }}
RAUC_PRIVATE_KEY: ${{ secrets.RAUC_PRIVATE_KEY }}
@@ -217,30 +169,17 @@ jobs:
echo -e "-----BEGIN CERTIFICATE-----\n${RAUC_CERTIFICATE}\n-----END CERTIFICATE-----" > cert.pem
echo -e "-----BEGIN PRIVATE KEY-----\n${RAUC_PRIVATE_KEY}\n-----END PRIVATE KEY-----" > key.pem
- name: Get self-signed certificate from the prepare job
if: ${{ needs.prepare.outputs.self_signed_cert == 'true' }}
uses: actions/download-artifact@v4
with:
name: signing-key
- name: Free space on build drive
run: |
# Inspired by https://github.com/easimon/maximize-build-space/blob/v7/action.yml
df -h
sudo rm -rf /usr/local/lib/android/sdk/ndk
sudo rm -rf /opt/hostedtoolcache/CodeQL
# Make sure cache action can restore this lcoation
sudo mkdir /mnt/cache
sudo mkdir /mnt/output
WORKSPACE_OWNER="$(stat -c '%U:%G' "${GITHUB_WORKSPACE}")"
# output directory is symlinked for easier access from workspace
# but for build container it must be mounted as a volume
sudo ln -sf /mnt/output "${GITHUB_WORKSPACE}/output"
sudo chown -R "${WORKSPACE_OWNER}" /mnt/cache
sudo chown -R "${WORKSPACE_OWNER}" /mnt/output
df -h
sudo chown -R runner:runner /mnt/cache
- name: "Restore cache: object files"
uses: actions/cache/restore@v4
uses: actions/cache/restore@v3
with:
path: /mnt/cache/cc
key: haos-cc-${{ matrix.board.id }}
@@ -249,27 +188,14 @@ jobs:
run: |
BUILDER_UID="$(id -u)"
BUILDER_GID="$(id -g)"
docker run --rm --privileged \
docker run --rm --privileged -v "${GITHUB_WORKSPACE}:/build" \
-e BUILDER_UID="${BUILDER_UID}" -e BUILDER_GID="${BUILDER_GID}" \
-v "${GITHUB_WORKSPACE}:/build" \
-v "/mnt/cache:/cache" \
-v "/mnt/output:/build/output" \
${{ needs.prepare.outputs.build_container_image }} \
make BUILDDIR=/build ${{ matrix.board.defconfig }}
- name: Check Linux config
run: |
docker run --rm --privileged \
-e BUILDER_UID="$(id -u)" -e BUILDER_GID="$(id -g)" \
-v "${GITHUB_WORKSPACE}:/build" \
-v "/mnt/cache:/cache" \
-v "/mnt/output:/build/output" \
${{ needs.prepare.outputs.build_container_image }} \
make -C buildroot O="/build/output" BR2_EXTERNAL="/build/buildroot-external" \
BR2_CHECK_DOTCONFIG_OPTS="--github-format --strip-path-prefix=/build/" linux-check-dotconfig
- name: Upload artifacts
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build == 'true' }}
if: ${{ github.event_name != 'release' }}
working-directory: output/images/
env:
AWS_ACCESS_KEY_ID: ${{ secrets.R2_OS_ARTIFACTS_ID }}
@@ -293,89 +219,22 @@ jobs:
run: |
echo "Cache size: $(du -sh /mnt/cache/cc)"
echo "Files total: $(find /mnt/cache/cc -mindepth 1 -type f | wc -l)"
echo "Old files to remove: $(find /mnt/cache/cc -mindepth 1 -type f -not -anewer output/Makefile | wc -l)"
find /mnt/cache/cc -mindepth 1 -type f -not -anewer output/Makefile -delete
echo "Cache size after pruning: $(du -sh /mnt/cache/cc)"
echo "Old files: $(find /mnt/cache/cc -mindepth 1 -type f -not -anewer output/Makefile | wc -l)"
- name: "Save cache: object files"
if: github.ref == 'refs/heads/dev'
uses: actions/cache/save@v4
uses: actions/cache/save@v3
with:
path: /mnt/cache/cc
key: haos-cc-${{ matrix.board.id }}-${{ github.run_id }}
- name: Generate build summary
run: |
echo "# ${{ matrix.board.id }} build summary" >> $GITHUB_STEP_SUMMARY
echo "## Artifacts" >> $GITHUB_STEP_SUMMARY
echo "| File | Size (bytes) | Size (formatted) |" >> $GITHUB_STEP_SUMMARY
echo "|:-|:-|:-|" >> $GITHUB_STEP_SUMMARY
for f in output/images/haos_*; do
echo "| $(basename $f) | $(du -b $f | cut -f1) | $(du -bh $f | cut -f1) |" >> $GITHUB_STEP_SUMMARY
done
echo "## Partitions" >> $GITHUB_STEP_SUMMARY
echo "| File | Size (bytes) | Size (formatted) |" >> $GITHUB_STEP_SUMMARY
echo "|:-|:-|:-|" >> $GITHUB_STEP_SUMMARY
for f in boot.vfat kernel.img rootfs.squashfs overlay.ext4 data.ext4; do
echo "| ${f} | $(du -b output/images/$f | cut -f1) | $(du -bh output/images/$f | cut -f1) |" >> $GITHUB_STEP_SUMMARY
done
- name: Upload OS image artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && matrix.board.id != 'ova' }}
- name: Upload ova image to artifacts for test job
uses: actions/upload-artifact@v3
if: ${{ matrix.board.id == 'ova' }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.img.xz
name: ova-image
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.img.xz
- name: Upload RAUC bundle artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.raucb
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.raucb
- name: Upload Open Virtualization Format (OVA) artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && matrix.board.id == 'ova' }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.ova
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.ova
- name: Upload QEMU disk image artifact
uses: actions/upload-artifact@v4
# Create artifact for ova every time - it's used by the called tests workflow
if: ${{ matrix.board.id == 'ova' || (github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && matrix.board.id == 'generic-aarch64') }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.qcow2.xz
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.qcow2.xz
- name: Upload VMware Virtual Machine Disk (VMDK) artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && (matrix.board.id == 'generic-aarch64' || matrix.board.id == 'ova') }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vmdk.zip
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vmdk.zip
- name: Upload VirtualBox Virtual Disk Image (VDI) artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && matrix.board.id == 'ova' }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vdi.zip
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vdi.zip
- name: Upload Virtual Hard Disk v2 (VHDX) artifact
uses: actions/upload-artifact@v4
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build != 'true' && matrix.board.id == 'ova' }}
with:
name: haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vhdx.zip
path: |
output/images/haos_${{ matrix.board.id }}-${{ needs.prepare.outputs.version_full }}.vhdx.zip
output/images/haos_ova*.qcow2.xz
test:
name: Test OS image
@@ -386,7 +245,7 @@ jobs:
update_index:
name: Update artifacts index
if: ${{ github.event_name != 'release' && needs.prepare.outputs.publish_build == 'true' }}
if: ${{ github.event_name != 'release' }}
needs: [ build, prepare ]
uses: home-assistant/operating-system/.github/workflows/artifacts-index.yaml@dev
with:
@@ -401,7 +260,7 @@ jobs:
bump_version:
name: Bump ${{ needs.prepare.outputs.channel }} channel version
if: ${{ github.repository == 'home-assistant/operating-system' && needs.prepare.outputs.publish_build == 'true' }}
if: ${{ github.repository == 'home-assistant/operating-system' }}
environment: ${{ needs.prepare.outputs.channel }}
needs: [ build, prepare ]
runs-on: ubuntu-22.04

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@@ -14,4 +14,4 @@ jobs:
action:
runs-on: ubuntu-latest
steps:
- uses: dessant/label-actions@v4.0.1
- uses: dessant/label-actions@v3.1.0

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@@ -41,12 +41,6 @@
"architecture": "aarch64",
"label": "board/odroid"
},
{
"id": "odroid-m1s",
"defconfig": "odroid_m1s",
"architecture": "aarch64",
"label": "board/odroid"
},
{
"id": "odroid-n2",
"defconfig": "odroid_n2",
@@ -89,12 +83,6 @@
"architecture": "aarch64",
"label": "board/raspberrypi"
},
{
"id": "rpi5-64",
"defconfig": "rpi5_64",
"architecture": "aarch64",
"label": "board/raspberrypi"
},
{
"id": "yellow",
"defconfig": "yellow",

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@@ -21,7 +21,7 @@ jobs:
- name: Check shell scripts
uses: ludeeus/action-shellcheck@2.0.0
with:
ignore_paths: buildroot
ignore: buildroot
- name: Check buildroot-external packages
run: |

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@@ -13,6 +13,6 @@ jobs:
pull-requests: read # for release-drafter/release-drafter to read PR content and labels
runs-on: ubuntu-latest
steps:
- uses: release-drafter/release-drafter@v6
- uses: release-drafter/release-drafter@v5
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

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@@ -19,7 +19,7 @@ jobs:
# - No PRs marked as no-stale or pinned
# - No issues marked as no-stale, help-wanted or pinned
- name: 90 days stale issues & PRs policy
uses: actions/stale@v9.0.0
uses: actions/stale@v8.0.0
with:
repo-token: ${{ secrets.GITHUB_TOKEN }}
days-before-stale: 90

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@@ -19,10 +19,6 @@ on:
required: false
type: boolean
default: true
version:
description: Version of HAOS to test (as used in the name of the qcow2 image artifact)
required: true
type: string
jobs:
test:
@@ -45,7 +41,7 @@ jobs:
sudo apt install -y qemu-system-x86 ovmf
- name: Setup Python
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: 3.12
@@ -60,9 +56,9 @@ jobs:
- name: Get OS image artifact
if: ${{ inputs.use-artifact }}
uses: actions/download-artifact@v4
uses: actions/download-artifact@v3
with:
name: haos_ova-${{ inputs.version }}.qcow2.xz
name: ova-image
- name: Extract OS image
run: |
@@ -74,7 +70,7 @@ jobs:
./tests/run_tests.sh
- name: Archive logs
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
if: always()
with:
name: logs
@@ -82,7 +78,7 @@ jobs:
tests/lg_logs/**
- name: Archive JUnit reports
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
if: always()
with:
name: junit_reports

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@@ -12,9 +12,8 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
gpg \
dirmngr \
software-properties-common \
&& curl -fsSL https://download.docker.com/linux/debian/gpg | gpg --dearmor -o /etc/apt/trusted.gpg.d/docker.gpg \
&& echo "deb [arch=$(dpkg --print-architecture) signed-by=/etc/apt/trusted.gpg.d/docker.gpg] \
https://download.docker.com/linux/debian $(lsb_release -cs) stable" > /etc/apt/sources.list.d/docker.list \
&& curl -fsSL https://download.docker.com/linux/debian/gpg | apt-key add - \
&& add-apt-repository "deb https://download.docker.com/linux/debian $(lsb_release -cs) stable" \
&& apt-get update && apt-get install -y --no-install-recommends \
docker-ce \
&& rm -rf /var/lib/apt/lists/*

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@@ -5,10 +5,11 @@
The following boards/devices are supported:
- Raspberry Pi
- Pi 5 ([4 GB](https://www.raspberrypi.com/products/raspberry-pi-5/?variant=raspberry-pi-5-4gb) and [8 GB](https://www.raspberrypi.com/products/raspberry-pi-5/?variant=raspberry-pi-5-8gb) model) 64-bit
- Pi 4 Model B ([1 GB](https://www.raspberrypi.com/products/raspberry-pi-4-model-b/?variant=raspberry-pi-4-model-b-1gb), [2 GB](https://www.raspberrypi.com/products/raspberry-pi-4-model-b/?variant=raspberry-pi-4-model-b-2gb), [4 GB](https://www.raspberrypi.com/products/raspberry-pi-4-model-b/?variant=raspberry-pi-4-model-b-4gb) and [8 GB](https://www.raspberrypi.com/products/raspberry-pi-4-model-b/?variant=raspberry-pi-4-model-b-8gb) model) 32-bit or 64-bit (recommended)
- [Pi 3 Model B](https://www.raspberrypi.com/products/raspberry-pi-3-model-b/) and [B+](https://www.raspberrypi.com/products/raspberry-pi-3-model-b-plus/) 32-bit or 64-bit (recommended)
- [Pi 2](https://www.raspberrypi.com/products/raspberry-pi-2-model-b/) (not recommended)
- [Pi Zero-W](https://www.raspberrypi.com/products/raspberry-pi-zero-w/) (not recommended)
- [Pi](https://www.raspberrypi.com/products/raspberry-pi-1-model-b-plus/) (not recommended)
- Hardkernel
- [ODROID-C2](https://www.hardkernel.com/shop/odroid-c2/) (discontinued)
- [ODROID-C4](https://www.hardkernel.com/shop/odroid-c4/)
@@ -38,7 +39,6 @@ Notes:
|Board|Build|Config|Docs|
|-----|----|------|----|
|Pi5 64-bit |`make rpi5_64` |[rpi5_64](../../buildroot-external/configs/rpi5_64_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi4B 64-bit |`make rpi4_64` |[rpi4_64](../../buildroot-external/configs/rpi4_64_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi4B 32-bit |`make rpi4` |[rpi4](../../buildroot-external/configs/rpi4_defconfig)|[raspberrypi](./raspberrypi/)|
|Pi3B 64-bit |`make rpi3_64` |[rpi3_64](../../buildroot-external/configs/rpi3_64_defconfig)|[raspberrypi](./raspberrypi/)|

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@@ -4,10 +4,10 @@
| Device | Release Date | Support | Config |
|---------------------|---------------|-----------------|--------------------|
| Raspberry Pi B/B+/A+|2012/2014/2014 | not recommended | [rpi](../../../buildroot-external/configs/rpi_defconfig) |
| Raspberry Pi 2 B |2015 | not recommended | [rpi2](../../../buildroot-external/configs/rpi2_defconfig) |
| Raspberry Pi 3 B/B+ |2016/2018 | yes | [rpi3](../../../buildroot-external/configs/rpi3_defconfig) / [rpi3_64](../../../buildroot-external/configs/rpi3_64_defconfig) |
| Raspberry Pi 4 B |2019 | yes | [rpi4](../../../buildroot-external/configs/rpi4_defconfig) / [rpi4_64](../../../buildroot-external/configs/rpi4_64_defconfig) |
| Raspberry Pi 5 |2023 | yes (beta) | [rpi5_64](../../../buildroot-external/configs/rpi5_64_defconfig) |
## Serial console

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@@ -5,21 +5,20 @@ Default Kernel tree: 6.1
| Board | Version |
|-------|---------|
| Open Virtual Appliance | 6.6.16 |
| Raspberry Pi | 6.1.73 |
| Raspberry Pi 0-W | 6.1.73 |
| Raspberry Pi 2 | 6.1.73 |
| Raspberry Pi 3 | 6.1.73 |
| Raspberry Pi 4 | 6.1.73 |
| Raspberry Pi 5 | 6.1.73 |
| Home Assistant Yellow | 6.1.73 |
| Home Assistant Green | 6.6.16 |
| Tinker Board | 6.6.16 |
| ODROID-C2 | 6.6.16 |
| ODROID-C4 | 6.6.16 |
| ODROID-M1 | 6.6.16 |
| ODROID-N2 | 6.6.16 |
| ODROID-XU4 | 6.6.16 |
| Generic aarch64 | 6.6.16 |
| Generic x86-64 | 6.6.16 |
| Khadas VIM3 | 6.6.16 |
| Open Virtual Appliance | 6.1.60 |
| Raspberry Pi | 6.1.58 |
| Raspberry Pi 0-W | 6.1.58 |
| Raspberry Pi 2 | 6.1.58 |
| Raspberry Pi 3 | 6.1.58 |
| Raspberry Pi 4 | 6.1.58 |
| Home Assistant Yellow | 6.1.58 |
| Home Assistant Green | 6.1.60 |
| Tinker Board | 6.1.60 |
| ODROID-C2 | 6.1.60 |
| ODROID-C4 | 6.1.60 |
| ODROID-M1 | 6.1.60 |
| ODROID-N2 | 6.1.60 |
| ODROID-XU4 | 6.1.60 |
| Generic aarch64 | 6.1.60 |
| Generic x86-64 | 6.1.60 |
| Khadas VIM3 | 6.1.60 |

View File

@@ -1,43 +1,17 @@
CONFIG_EFI_STUB=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
CONFIG_CONNECTOR=y
CONFIG_VSOCKETS=y
CONFIG_VIRTIO=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_BALLOON=m
CONFIG_VIRTIO_MEM=m
CONFIG_VIRTIO_INPUT=m
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_BLK_SCSI=y
CONFIG_VIRTIO_CONSOLE=m
CONFIG_VIRTIO_VSOCKETS=m
CONFIG_VIRTIO_MMIO=y
CONFIG_SCSI_VIRTIO=y
CONFIG_HW_RANDOM_VIRTIO=m
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
CONFIG_VIRTIO_IOMMU=m
CONFIG_CRYPTO_ENGINE=m
CONFIG_CRYPTO_DEV_VIRTIO=m
# options for backward compatibility
CONFIG_ARMV8_DEPRECATED=y
CONFIG_SWP_EMULATION=y
CONFIG_CP15_BARRIER_EMULATION=y
CONFIG_SETEND_EMULATION=y
# These options are needed for virtio-fs
CONFIG_FUSE_FS=y
CONFIG_VIRTIO_FS=y
CONFIG_DAX=y
CONFIG_FS_DAX=y
CONFIG_ZONE_DEVICE=y
CONFIG_DMI_SYSFS=m
CONFIG_FW_CFG_SYSFS=m
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_NVME_CORE=y
CONFIG_BLK_DEV_NVME=y
@@ -45,6 +19,7 @@ CONFIG_NVME_HWMON=y
CONFIG_DRM_VIRTIO_GPU=m
CONFIG_HYPERVISOR_GUEST=y
CONFIG_HYPERV=y
CONFIG_HYPERV_UTILS=m
CONFIG_HYPERV_BALLOON=m

View File

@@ -19,7 +19,8 @@ function hassos_pre_image() {
# SPL
create_spl_image
dd if="${BINARIES_DIR}/u-boot-rockchip.bin" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/u-boot-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=8192
}

File diff suppressed because it is too large Load Diff

View File

@@ -1,4 +1,5 @@
From b4d676729c5bee4b9adb85362f6f2e32f833b6c2 Mon Sep 17 00:00:00 2001
From 3553f8a938dbb498aa1846a37ea343b7f53739da Mon Sep 17 00:00:00 2001
Message-Id: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 17 Feb 2021 19:55:41 +0100
Subject: [PATCH] Revert "ARM: dts: rockchip: use DMA channels for UARTs for
@@ -6,13 +7,13 @@ Subject: [PATCH] Revert "ARM: dts: rockchip: use DMA channels for UARTs for
This reverts commit 3425fe335c29310f6628faf9a7947d07f32d8962.
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 8 --------
arch/arm/boot/dts/rk3288.dtsi | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index cb9cdaddffd4..51f1273d6beb 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 487b0e03d4b4..1569b1824c89 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -378,8 +378,6 @@ uart0: serial@ff180000 {
reg-io-width = <4>;
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
@@ -49,3 +50,6 @@ index cb9cdaddffd4..51f1273d6beb 100644
pinctrl-names = "default";
pinctrl-0 = <&uart4_xfer>;
status = "disabled";
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 02c7d9bb23f497993d52f5a41341ed955e6a2745 Mon Sep 17 00:00:00 2001
From 695638c05c0bb6f7bcc65e172dd132b3aa280b47 Mon Sep 17 00:00:00 2001
Message-Id: <695638c05c0bb6f7bcc65e172dd132b3aa280b47.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 22:15:14 +0100
Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
@@ -14,13 +17,13 @@ Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
[move change to rk3288-tinker.dtsi]
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 19 +++++++++++++++++++
arch/arm/boot/dts/rk3288-tinker.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 09618bb7d872..30430d2e64b9 100644
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -483,6 +483,25 @@ &sdio0 {
status = "okay";
};
@@ -47,3 +50,6 @@ index 09618bb7d872..30430d2e64b9 100644
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
--
2.39.1

View File

@@ -1,4 +1,7 @@
From bf7869033cf3caa50912cbdfa548428a6571c104 Mon Sep 17 00:00:00 2001
From d04122215cb56b57458e05b475e41744b8126533 Mon Sep 17 00:00:00 2001
Message-Id: <d04122215cb56b57458e05b475e41744b8126533.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 4 Sep 2020 21:57:55 +0200
Subject: [PATCH] ARM: dts: rockchip: enable I2C1/4 on rk3288-tinker
@@ -7,13 +10,13 @@ Enable I2C devices which are accessible via 40-pin header.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 8 ++++++++
arch/arm/boot/dts/rk3288-tinker.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 30430d2e64b9..395afc2b2283 100644
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -342,10 +342,18 @@ regulator-state-mem {
};
};
@@ -33,3 +36,6 @@ index 30430d2e64b9..395afc2b2283 100644
&i2c5 {
status = "okay";
};
--
2.39.1

View File

@@ -1,4 +1,7 @@
From a0ef6a86e96920a9cf703d8c65d0126494037d37 Mon Sep 17 00:00:00 2001
From 7d37754f29c379c5066c6abf38c8d01d654b1613 Mon Sep 17 00:00:00 2001
Message-Id: <7d37754f29c379c5066c6abf38c8d01d654b1613.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Thu, 19 Oct 2017 21:24:47 +0200
Subject: [PATCH] RK3288: DTSI: rk3288.dtsi: Add missing SPI2 pinctrl
@@ -10,13 +13,13 @@ This patch is taken from the patches provided by the ARMbian team.
Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 2 +-
arch/arm/boot/dts/rk3288.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 51f1273d6beb..d8663928bfe2 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1569b1824c89..478fd1bb85df 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -311,7 +311,7 @@ spi2: spi@ff130000 {
dma-names = "tx", "rx";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
@@ -26,3 +29,6 @@ index 51f1273d6beb..d8663928bfe2 100644
reg = <0x0 0xff130000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From e828e0fc2be98e5ad20c93981681505fc97b063b Mon Sep 17 00:00:00 2001
From 05fde1d1dbbe7805a58a8c445b8fb19e0df59826 Mon Sep 17 00:00:00 2001
Message-Id: <05fde1d1dbbe7805a58a8c445b8fb19e0df59826.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
Date: Mon, 5 Nov 2018 20:16:05 +0100
Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
@@ -7,13 +10,13 @@ Taken from the various patches provided by @TonyMac32 .
Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
---
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 2 +-
arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index 395afc2b2283..c7e79e594720 100644
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -184,7 +184,7 @@ vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
@@ -23,3 +26,6 @@ index 395afc2b2283..c7e79e594720 100644
regulator-name = "vdd_arm";
regulator-ramp-delay = <6000>;
regulator-state-mem {
--
2.39.1

View File

@@ -1,4 +1,7 @@
From ad1ffd6be5f54a0871e3c303602548687dfe0ffc Mon Sep 17 00:00:00 2001
From 940d61e1e04929166d5a2bcbc1934aa931952ca5 Mon Sep 17 00:00:00 2001
Message-Id: <940d61e1e04929166d5a2bcbc1934aa931952ca5.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: Myy Miouyouyou <myy@miouyouyou.fr>
Date: Sun, 7 Jan 2018 01:52:44 +0100
Subject: [PATCH] drivers: mmc: dw-mci-rockchip: Handle ASUS Tinkerboard reboot
@@ -21,7 +24,7 @@ Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
1 file changed, 66 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index b07190ba4b7a..0badaa1b404e 100644
index 2a99f15f527f..181718374429 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -12,6 +12,11 @@
@@ -111,3 +114,6 @@ index b07190ba4b7a..0badaa1b404e 100644
return 0;
}
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 4e6c3d013c847f199664a3075934f5ca52d8cba4 Mon Sep 17 00:00:00 2001
From 479e2acb95c09b15382b3766391294790ebd200b Mon Sep 17 00:00:00 2001
Message-Id: <479e2acb95c09b15382b3766391294790ebd200b.1676488094.git.stefan@agner.ch>
In-Reply-To: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
References: <3553f8a938dbb498aa1846a37ea343b7f53739da.1676488094.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Tue, 10 May 2022 22:57:26 +0200
Subject: [PATCH] ARM: dts: rockchip: Add Bluetooth to rk3288-tinker
@@ -8,13 +11,13 @@ for Realtek rtl8723bs Bluetooth device.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi | 26 +++++++++++++++++++
arch/arm/boot/dts/rk3288-tinker.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index c7e79e594720..5d261fae6e72 100644
--- a/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288-tinker.dtsi
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -386,6 +386,20 @@ bl_en: bl-en {
};
};
@@ -55,3 +58,6 @@ index c7e79e594720..5d261fae6e72 100644
};
&uart1 {
--
2.39.1

View File

@@ -1,32 +0,0 @@
From f597ec583c262ed4c3264ddf661e22b503fb8a11 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= <sairon@sairon.cz>
Date: Wed, 10 Jan 2024 16:29:59 +0100
Subject: [PATCH] usb-audio: add ASUS TinkerBoard's ALC4040
Converted to git-series patch from the original plain git diff file
buildroot-external/board/asus/tinker/patches/linux/3001_Tinkerboard-4.19-audio.patch
Co-authored-by: Pascal Vizeli <pascal.vizeli@syshack.ch>
---
sound/usb/card.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 1b2edc0fd2e9..3069ac5b6759 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -521,6 +521,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

View File

@@ -0,0 +1,19 @@
diff --git a/sound/usb/card.c b/sound/usb/card.c
index 2bfe4e80a..cea93aaf5 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -382,6 +382,14 @@ static void usb_audio_make_shortname(struct usb_device *dev,
}
strim(card->shortname);
+
+ /* Tinker Board ALC4040 CODEC */
+
+ if(USB_ID_VENDOR(chip->usb_id) == 0x0bda &&
+ USB_ID_PRODUCT(chip->usb_id) == 0x481a) {
+ strlcat(card->shortname, " OnBoard", sizeof(card->shortname));
+ }
+
}
static void usb_audio_make_longname(struct usb_device *dev,

View File

@@ -0,0 +1,37 @@
From 966cd1782632bc8279667955ec315e93c89495e6 Mon Sep 17 00:00:00 2001
Message-Id: <966cd1782632bc8279667955ec315e93c89495e6.1645627366.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 12:41:50 +0000
Subject: [PATCH 1/2] SPL: modify load address of U-Boot
Default load address of U-Boot is at sector 16384, which is where HAOS
has its first partition. Use 0x2000 (8192) instead.
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
configs/tinker-rk3288_defconfig | 1 +
configs/tinker-s-rk3288_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index a9c9a122f6..b839fdb570 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -92,3 +92,4 @@ CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index f367c9370f..c52b0753ec 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -94,3 +94,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
--
2.35.1

View File

@@ -1,7 +1,10 @@
From defc964eaa9f4ccc9cd1568ade4e4d81f35b9e07 Mon Sep 17 00:00:00 2001
From 98674c65a6595e7ac554f7ec9d6f0228556756f6 Mon Sep 17 00:00:00 2001
Message-Id: <98674c65a6595e7ac554f7ec9d6f0228556756f6.1645627366.git.stefan@agner.ch>
In-Reply-To: <966cd1782632bc8279667955ec315e93c89495e6.1645627366.git.stefan@agner.ch>
References: <966cd1782632bc8279667955ec315e93c89495e6.1645627366.git.stefan@agner.ch>
From: Pascal Vizeli <pvizeli@syshack.ch>
Date: Fri, 24 Apr 2020 11:37:55 +0000
Subject: [PATCH] pmic: enable LDO2 vcc33_mipi at bootup
Subject: [PATCH 2/2] pmic: enable LDO2 vcc33_mipi at bootup
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
---
@@ -61,5 +64,5 @@ index f85209c649..6fa1bb0c66 100644
+}
+#endif
--
2.43.0
2.35.1

View File

@@ -1,6 +1,3 @@
# CONFIG_USB_STORAGE is not set
# CONFIG_DOS_PARTITION is not set
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_PAD_TO=0x3f8000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x2000
# CONFIG_ENV_IS_IN_MMC is not set

File diff suppressed because it is too large Load Diff

View File

@@ -95,7 +95,7 @@ CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODULE_COMPRESS_NONE=y
CONFIG_MODULE_COMPRESS_XZ=y
CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y
CONFIG_BLK_DEV_THROTTLING_LOW=y
@@ -114,6 +114,8 @@ CONFIG_BFQ_GROUP_IOSCHED=y
CONFIG_BINFMT_MISC=m
CONFIG_ZSWAP=y
CONFIG_ZSWAP_DEFAULT_ON=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD=y
CONFIG_ZBUD=y
CONFIG_ZSMALLOC=y
CONFIG_SLAB_FREELIST_RANDOM=y
@@ -208,6 +210,7 @@ CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=m
CONFIG_NETFILTER_NETLINK_HOOK=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_SECMARK=y
CONFIG_NF_CONNTRACK_ZONES=y
CONFIG_NF_CONNTRACK_PROCFS=y
CONFIG_NF_CONNTRACK_EVENTS=y
@@ -240,6 +243,7 @@ CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_OBJREF=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
@@ -262,6 +266,7 @@ CONFIG_NETFILTER_XT_TARGET_AUDIT=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_HMARK=m
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
@@ -274,6 +279,7 @@ CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_TARGET_TEE=m
CONFIG_NETFILTER_XT_TARGET_TPROXY=m
CONFIG_NETFILTER_XT_TARGET_TRACE=m
CONFIG_NETFILTER_XT_TARGET_SECMARK=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
@@ -375,6 +381,7 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
@@ -480,8 +487,10 @@ CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y
CONFIG_IEEE802154_6LOWPAN=m
CONFIG_MAC802154=m
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
CONFIG_NET_SCH_ATM=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_MULTIQ=m
CONFIG_NET_SCH_RED=m
@@ -493,6 +502,7 @@ CONFIG_NET_SCH_CBS=m
CONFIG_NET_SCH_ETF=m
CONFIG_NET_SCH_TAPRIO=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_DRR=m
CONFIG_NET_SCH_MQPRIO=m
@@ -511,11 +521,14 @@ CONFIG_NET_SCH_PLUG=m
CONFIG_NET_SCH_ETS=m
CONFIG_NET_SCH_DEFAULT=y
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
CONFIG_CLS_U32_PERF=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
CONFIG_NET_CLS_FLOW=m
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_BPF=m
@@ -714,6 +727,7 @@ CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_DMI_SYSFS=y
CONFIG_ISCSI_IBFT=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_GNSS=m
@@ -751,6 +765,7 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=m
CONFIG_OF_OVERLAY=y
CONFIG_PARPORT=m
CONFIG_PARPORT_AX88796=m
CONFIG_BLK_DEV_NULL_BLK=m
CONFIG_ZRAM=m
CONFIG_ZRAM_WRITEBACK=y
@@ -796,6 +811,7 @@ CONFIG_BCM_VK=m
CONFIG_MISC_ALCOR_PCI=m
CONFIG_MISC_RTSX_PCI=m
CONFIG_MISC_RTSX_USB=m
CONFIG_HABANA_AI=m
CONFIG_UACCE=m
CONFIG_GP_PCI1XXXX=m
CONFIG_RAID_ATTRS=y
@@ -863,6 +879,7 @@ CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_DWC=m
CONFIG_AHCI_SUNXI=y
CONFIG_AHCI_TEGRA=y
CONFIG_AHCI_XGENE=y
CONFIG_SATA_INIC162X=m
CONFIG_SATA_ACARD_AHCI=m
CONFIG_SATA_SIL24=y
@@ -1071,6 +1088,7 @@ CONFIG_E1000=m
CONFIG_E1000E=m
CONFIG_IGB=m
CONFIG_IGBVF=m
CONFIG_IXGB=m
CONFIG_IXGBE=m
CONFIG_IXGBE_DCB=y
CONFIG_IXGBEVF=m
@@ -1115,6 +1133,7 @@ CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=y
CONFIG_DWMAC_SUNXI=m
CONFIG_DWMAC_SUN8I=m
CONFIG_DWMAC_LOONGSON=m
CONFIG_TEHUTI=m
CONFIG_XILINX_EMACLITE=m
CONFIG_XILINX_AXI_EMAC=m
@@ -1515,10 +1534,12 @@ CONFIG_TOUCHSCREEN_MSG2638=m
CONFIG_TOUCHSCREEN_MTOUCH=m
CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
CONFIG_TOUCHSCREEN_INEXIO=m
CONFIG_TOUCHSCREEN_MK712=m
CONFIG_TOUCHSCREEN_PENMOUNT=m
CONFIG_TOUCHSCREEN_EDT_FT5X06=m
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_UCB1400=m
CONFIG_TOUCHSCREEN_PIXCIR=m
CONFIG_TOUCHSCREEN_WDT87XX_I2C=m
CONFIG_TOUCHSCREEN_WM97XX=m
@@ -1590,6 +1611,7 @@ CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_TEGRA_TCU=y
CONFIG_SERIAL_JSM=m
@@ -1612,6 +1634,7 @@ CONFIG_SERIAL_LITEUART=m
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_MOXA_INTELLIO=m
CONFIG_MOXA_SMARTIO=m
CONFIG_SYNCLINK_GT=m
CONFIG_N_HDLC=m
CONFIG_N_GSM=m
CONFIG_NOZOMI=m
@@ -1632,6 +1655,7 @@ CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C=m
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_XILLYUSB=m
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_ARB_GPIO_CHALLENGE=m
CONFIG_I2C_MUX_GPIO=m
@@ -1684,6 +1708,7 @@ CONFIG_SPI_DW_PCI=m
CONFIG_SPI_DW_MMIO=m
CONFIG_SPI_HISI_KUNPENG=m
CONFIG_SPI_HISI_SFC_V3XX=m
CONFIG_SPI_NXP_FLEXSPI=m
CONFIG_SPI_GPIO=m
CONFIG_SPI_LM70_LLP=m
CONFIG_SPI_FSL_SPI=m
@@ -1768,6 +1793,7 @@ CONFIG_GPIO_BD9571MWV=m
CONFIG_GPIO_MAX77620=y
CONFIG_GPIO_MAX77650=m
CONFIG_GPIO_TQMX86=m
CONFIG_GPIO_UCB1400=m
CONFIG_GPIO_PCI_IDIO_16=m
CONFIG_GPIO_PCIE_IDIO_24=m
CONFIG_GPIO_RDC321X=m
@@ -1782,6 +1808,7 @@ CONFIG_GPIO_VIRTIO=m
CONFIG_W1_MASTER_MATROX=m
CONFIG_W1_MASTER_DS2490=m
CONFIG_W1_MASTER_DS2482=m
CONFIG_W1_MASTER_DS1WM=m
CONFIG_W1_MASTER_GPIO=m
CONFIG_W1_MASTER_SGI=m
CONFIG_W1_SLAVE_THERM=m
@@ -1999,6 +2026,7 @@ CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_SCH5627=m
CONFIG_SENSORS_SCH5636=m
CONFIG_SENSORS_STTS751=m
CONFIG_SENSORS_SMM665=m
CONFIG_SENSORS_ADC128D818=m
CONFIG_SENSORS_ADS7828=m
CONFIG_SENSORS_ADS7871=m
@@ -2078,12 +2106,13 @@ CONFIG_MFD_MAX77650=m
CONFIG_MFD_MT6370=m
CONFIG_MFD_OCELOT=m
CONFIG_MFD_NTXEC=m
CONFIG_UCB1400_CORE=m
CONFIG_MFD_SY7636A=m
CONFIG_MFD_RT4831=m
CONFIG_MFD_RT5033=m
CONFIG_MFD_RT5120=m
CONFIG_MFD_RC5T583=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_RK808=y
CONFIG_MFD_RN5T618=m
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SM501=m
@@ -2264,6 +2293,7 @@ CONFIG_VIDEO_GO7007_USB=m
CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_AU0828_RC=y
CONFIG_VIDEO_CX231XX=m
@@ -2317,6 +2347,8 @@ CONFIG_VIDEO_EM28XX=m
CONFIG_VIDEO_EM28XX_V4L2=m
CONFIG_VIDEO_EM28XX_ALSA=m
CONFIG_VIDEO_EM28XX_DVB=m
CONFIG_USB_AIRSPY=m
CONFIG_USB_HACKRF=m
CONFIG_MEDIA_PCI_SUPPORT=y
CONFIG_VIDEO_SOLO6X10=m
CONFIG_VIDEO_TW68=m
@@ -2324,6 +2356,8 @@ CONFIG_VIDEO_DT3155=m
CONFIG_VIDEO_IVTV=m
CONFIG_VIDEO_IVTV_ALSA=m
CONFIG_VIDEO_FB_IVTV=m
CONFIG_VIDEO_BT848=m
CONFIG_DVB_BT8XX=m
CONFIG_VIDEO_CX18=m
CONFIG_VIDEO_CX18_ALSA=m
CONFIG_VIDEO_CX23885=m
@@ -2350,6 +2384,24 @@ CONFIG_DVB_PLUTO2=m
CONFIG_DVB_PT1=m
CONFIG_DVB_PT3=m
CONFIG_DVB_SMIPCIE=m
CONFIG_RADIO_MAXIRADIO=m
CONFIG_RADIO_SAA7706H=m
CONFIG_RADIO_SHARK=m
CONFIG_RADIO_SHARK2=m
CONFIG_RADIO_SI4713=m
CONFIG_RADIO_TEA5764=m
CONFIG_RADIO_TEF6862=m
CONFIG_RADIO_WL1273=m
CONFIG_USB_DSBR=m
CONFIG_USB_KEENE=m
CONFIG_USB_MA901=m
CONFIG_USB_MR800=m
CONFIG_USB_RAREMONO=m
CONFIG_RADIO_SI470X=m
CONFIG_USB_SI470X=m
CONFIG_I2C_SI470X=m
CONFIG_USB_SI4713=m
CONFIG_PLATFORM_SI4713=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m
@@ -2387,6 +2439,7 @@ CONFIG_VIDEO_TVP514X=m
CONFIG_VIDEO_TVP7002=m
CONFIG_VIDEO_TW9910=m
CONFIG_VIDEO_VPX3220=m
CONFIG_VIDEO_AD9389B=m
CONFIG_VIDEO_ADV7170=m
CONFIG_VIDEO_ADV7175=m
CONFIG_VIDEO_ADV7343=m
@@ -2394,6 +2447,7 @@ CONFIG_VIDEO_ADV7393=m
CONFIG_VIDEO_AK881X=m
CONFIG_VIDEO_SAA7185=m
CONFIG_VIDEO_THS8200=m
CONFIG_SDR_MAX2175=m
CONFIG_VIDEO_I2C=m
CONFIG_VIDEO_ST_MIPID02=m
CONFIG_VIDEO_THS7303=m
@@ -2410,6 +2464,7 @@ CONFIG_DVB_HELENE=m
CONFIG_DVB_HORUS3A=m
CONFIG_DVB_LGS8GL5=m
CONFIG_DVB_LNBH29=m
CONFIG_DVB_DUMMY_FE=m
CONFIG_DRM=m
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DRM_DP_CEC=y
@@ -2525,6 +2580,7 @@ CONFIG_DRM_ETNAVIV=m
CONFIG_DRM_HISI_HIBMC=m
CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_LOGICVC=m
CONFIG_DRM_IMX_LCDIF=m
CONFIG_DRM_BOCHS=m
CONFIG_DRM_GM12U320=m
CONFIG_DRM_SIMPLEDRM=m
@@ -3063,6 +3119,7 @@ CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OXU210HP_HCD=m
CONFIG_USB_ISP116X_HCD=m
CONFIG_USB_FOTG210_HCD=m
CONFIG_USB_MAX3421_HCD=m
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
@@ -3173,6 +3230,7 @@ CONFIG_USB_LCD=m
CONFIG_USB_CYPRESS_CY7C63=m
CONFIG_USB_CYTHERM=m
CONFIG_USB_IDMOUSE=m
CONFIG_USB_FTDI_ELAN=m
CONFIG_USB_APPLEDISPLAY=m
CONFIG_APPLE_MFI_FASTCHARGE=m
CONFIG_USB_SISUSBVGA=m
@@ -3195,8 +3253,10 @@ CONFIG_USB_CXACRU=m
CONFIG_USB_UEAGLEATM=m
CONFIG_USB_XUSBATM=m
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=m
CONFIG_USB_ISP1301=m
CONFIG_U_SERIAL_CONSOLE=y
CONFIG_USB_FOTG210_UDC=m
CONFIG_USB_GR_UDC=m
CONFIG_USB_R8A66597=m
CONFIG_USB_PXA27X=m
@@ -3311,6 +3371,8 @@ CONFIG_MMC_SUNXI=m
CONFIG_MMC_HSQ=m
CONFIG_MMC_MTK=m
CONFIG_MMC_SDHCI_XENON=y
CONFIG_MMC_SDHCI_OMAP=m
CONFIG_MMC_SDHCI_AM654=m
CONFIG_SCSI_UFSHCD=y
CONFIG_SCSI_UFSHCD_PCI=m
CONFIG_SCSI_UFSHCD_PLATFORM=y
@@ -3341,6 +3403,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
@@ -3416,6 +3479,7 @@ CONFIG_DMA_SUN6I=m
CONFIG_DW_AXI_DMAC=m
CONFIG_FSL_EDMA=y
CONFIG_FSL_QDMA=m
CONFIG_HISI_DMA=m
CONFIG_MV_XOR_V2=y
CONFIG_PL330_DMA=y
CONFIG_PLX_DMA=m
@@ -3426,6 +3490,7 @@ CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_HIDMA=y
CONFIG_DW_DMAC=m
CONFIG_DW_DMAC_PCI=m
CONFIG_DW_EDMA_PCIE=m
CONFIG_SF_PDMA=m
CONFIG_ASYNC_TX_DMA=y
CONFIG_UDMABUF=y
@@ -3460,6 +3525,7 @@ CONFIG_RTLLIB=m
CONFIG_RTL8192E=m
CONFIG_RTL8723BS=m
CONFIG_R8712U=m
CONFIG_R8188EU=m
CONFIG_RTS5208=m
CONFIG_VT6655=m
CONFIG_VT6656=m
@@ -3809,6 +3875,7 @@ CONFIG_PWM_SUN4I=m
CONFIG_PWM_TEGRA=y
CONFIG_PWM_XILINX=m
CONFIG_RESET_TI_TPS380X=m
CONFIG_PHY_XGENE=y
CONFIG_PHY_CAN_TRANSCEIVER=m
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_SUN9I_USB=m
@@ -3864,6 +3931,8 @@ CONFIG_MUX_GPIO=m
CONFIG_MUX_MMIO=m
CONFIG_COUNTER=m
CONFIG_INTERRUPT_CNT=m
CONFIG_FTM_QUADDEC=m
CONFIG_INTEL_QEP=m
CONFIG_MOST=m
CONFIG_MOST_SND=m
CONFIG_VALIDATE_FS_PARSER=y
@@ -3906,7 +3975,7 @@ CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
CONFIG_QFMT_V1=m
CONFIG_QFMT_V2=m
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_FUSE_FS=y
CONFIG_CUSE=m
CONFIG_VIRTIO_FS=m
@@ -3951,7 +4020,7 @@ CONFIG_CRAMFS=m
CONFIG_CRAMFS_MTD=y
CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_DIRECT=y
CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_LZO=y
@@ -3967,6 +4036,7 @@ CONFIG_QNX4FS_FS=m
CONFIG_QNX6FS_FS=m
CONFIG_ROMFS_FS=m
CONFIG_PSTORE=y
CONFIG_PSTORE_LZ4HC_COMPRESS=m
CONFIG_PSTORE_RAM=m
CONFIG_PSTORE_BLK=m
CONFIG_SYSV_FS=m
@@ -4072,8 +4142,10 @@ CONFIG_LSM_MMAP_MIN_ADDR=0
CONFIG_HARDENED_USERCOPY=y
CONFIG_FORTIFY_SOURCE=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
CONFIG_SECURITY_SMACK=y
CONFIG_SECURITY_SMACK_NETFILTER=y
CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y
CONFIG_SECURITY_TOMOYO=y
CONFIG_SECURITY_APPARMOR=y
@@ -4197,6 +4269,7 @@ CONFIG_CRC4=m
CONFIG_XZ_DEC_MICROLZMA=y
CONFIG_XZ_DEC_TEST=m
CONFIG_DMA_RESTRICTED_POOL=y
CONFIG_DMA_PERNUMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=384
CONFIG_GLOB_SELFTEST=m
CONFIG_FONTS=y

View File

@@ -14,7 +14,8 @@ function hassos_pre_image() {
# SPL
create_spl_image
dd if="${BINARIES_DIR}/u-boot-rockchip.bin" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/u-boot.itb" of="${SPL_IMG}" conv=notrunc bs=512 seek=16384
}

View File

@@ -1,4 +1,3 @@
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_THERMAL_GOV_BANG_BANG=y

View File

@@ -0,0 +1,455 @@
From d388735d551e09b00317a509859fca51776b9826 Mon Sep 17 00:00:00 2001
Message-ID: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Dongjin Kim <tobetter@gmail.com>
Date: Fri, 30 Sep 2022 07:12:35 +0200
Subject: [PATCH] arm64: dts: rockchip: Add Hardkernel ODROID-M1 board
This patch is to add a device tree for new board Hardkernel ODROID-M1
based on Rockchip RK3568, includes basic peripherals -
uart/eMMC/uSD/i2c and on-board ethernet.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
[aurelien@aurel32.net: addressed issues from initial review]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-3-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 414 ++++++++++++++++++
2 files changed, 415 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 8c15593c0ca4..5dc1607b3ecf 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -71,4 +71,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
new file mode 100644
index 000000000000..b3016437640b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Hardkernel Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3568.dtsi"
+
+/ {
+ model = "Hardkernel ODROID-M1";
+ compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac0;
+ i2c0 = &i2c3;
+ i2c3 = &i2c0;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc0;
+ serial0 = &uart1;
+ serial1 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: led-0 {
+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ default-state = "keep";
+ linux,default-trigger = "default-on";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_power_pin>;
+ };
+ led_work: led-1 {
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_HEARTBEAT;
+ color = <LED_COLOR_ID_BLUE>;
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_work_pin>;
+ };
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&gmac0 {
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+ assigned-clock-rates = <0>, <125000000>;
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus>;
+ status = "okay";
+
+ tx_delay = <0x4f>;
+ rx_delay = <0x2d>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
+ reg = <0x1c>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc3v3_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-init-microvolt = <900000>;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ leds {
+ led_power_pin: led-power-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ led_work_pin: led-work-pin {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+ sd-uhs-sdr50;
+ vmmc-supply = <&vcc3v3_sd>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
--
2.41.0

View File

@@ -0,0 +1,38 @@
From 24048c1753916bd983746542b16d19d2b399eeb7 Mon Sep 17 00:00:00 2001
Message-ID: <24048c1753916bd983746542b16d19d2b399eeb7.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:36 +0200
Subject: [PATCH] arm64: dts: rockchip: add thermal support to ODROID-M1
Add the thermal nodes for the ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-4-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index b3016437640b..112c65af3f55 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -409,6 +409,12 @@ &sdmmc0 {
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
&uart2 {
status = "okay";
};
--
2.41.0

View File

@@ -0,0 +1,103 @@
From 982bb2beab8e38a7c0a365770be2ad9c5221a650 Mon Sep 17 00:00:00 2001
Message-ID: <982bb2beab8e38a7c0a365770be2ad9c5221a650.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:37 +0200
Subject: [PATCH] arm64: dts: rockchip: Add NOR flash to ODROID-M1
Enable the Rockchip Serial Flash Controller for the ODROID-M1 and add
the corresponding SPI NOR flash entry. The SFC is used in dual I/O mode
and not quad I/O mode, as the FSPI_D2 pin is shared with the EMMC_RSTn
pin.
The partitions addresses and sizes are taken from the ODROID-M1
Partition Table page on the ODROID wiki.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-5-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 112c65af3f55..94e839c9afab 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -351,6 +351,20 @@ rgmii_phy0: ethernet-phy@0 {
};
&pinctrl {
+ fspi {
+ fspi_dual_io_pins: fspi-dual-io-pins {
+ rockchip,pins =
+ /* fspi_clk */
+ <1 RK_PD0 1 &pcfg_pull_none>,
+ /* fspi_cs0n */
+ <1 RK_PD3 1 &pcfg_pull_none>,
+ /* fspi_d0 */
+ <1 RK_PD1 1 &pcfg_pull_none>,
+ /* fspi_d1 */
+ <1 RK_PD2 1 &pcfg_pull_none>;
+ };
+ };
+
leds {
led_power_pin: led-power-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -409,6 +423,50 @@ &sdmmc0 {
status = "okay";
};
+&sfc {
+ /* Dual I/O mode as the D2 pin conflicts with the eMMC */
+ pinctrl-0 = <&fspi_dual_io_pins>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SPL";
+ reg = <0x0 0xe0000>;
+ };
+ partition@e0000 {
+ label = "U-Boot Env";
+ reg = <0xe0000 0x20000>;
+ };
+ partition@100000 {
+ label = "U-Boot";
+ reg = <0x100000 0x200000>;
+ };
+ partition@300000 {
+ label = "splash";
+ reg = <0x300000 0x100000>;
+ };
+ partition@400000 {
+ label = "Filesystem";
+ reg = <0x400000 0xc00000>;
+ };
+ };
+ };
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <0>;
--
2.41.0

View File

@@ -0,0 +1,102 @@
From ae25f92a09abb7dd16a9ad3b74e0c105b385f214 Mon Sep 17 00:00:00 2001
Message-ID: <ae25f92a09abb7dd16a9ad3b74e0c105b385f214.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:38 +0200
Subject: [PATCH] arm64: dts: rockchip: Add analog audio on ODROID-M1
On the ODROID-M1, the I2S1 TDM controller is connected to the rk809
codec in I2S mode. It is used to provide a stereo headphones output and
a mono speaker output. A GPIO with an external pullup is used as an
headphone detection input.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-6-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 43 ++++++++++++++++++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 94e839c9afab..634c1bd80b4e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -59,6 +59,31 @@ led_work: led-1 {
};
};
+ rk809-sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det_pin>;
+ simple-audio-card,name = "Analog RK817";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
+ "Speaker", "Speaker";
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "Speaker", "SPKO";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -131,10 +156,15 @@ rk809: pmic@20 {
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
#clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
+ pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
@@ -340,6 +370,11 @@ regulator-state-mem {
};
};
+&i2s1_8ch {
+ rockchip,trcm-sync-tx-only;
+ status = "okay";
+};
+
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -379,6 +414,12 @@ pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ rk809 {
+ hp_det_pin: hp-det-pin {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
--
2.41.0

View File

@@ -0,0 +1,97 @@
From 3a1be3d8719ef6335385d4e5e456371e7bf7383f Mon Sep 17 00:00:00 2001
Message-ID: <3a1be3d8719ef6335385d4e5e456371e7bf7383f.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:39 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable vop2 and hdmi tx on ODROID-M1
Enable the RK356x Video Output Processor (VOP) 2 on ODROID M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-7-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 634c1bd80b4e..126b893048fe 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
@@ -37,6 +38,17 @@ dc_12v: dc-12v-regulator {
regulator-max-microvolt = <12000000>;
};
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -131,6 +143,24 @@ &gmac0_rgmii_clk
rx_delay = <0x2d>;
};
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -517,3 +547,20 @@ &tsadc {
&uart2 {
status = "okay";
};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.41.0

View File

@@ -0,0 +1,48 @@
From ded87dc761951205b8b9ba8ee4081e28a850a3db Mon Sep 17 00:00:00 2001
Message-ID: <ded87dc761951205b8b9ba8ee4081e28a850a3db.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:40 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable HDMI audio on ODROID-M1.
This enables the i2s0 controller and the hdmi-sound node on the
ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-8-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 126b893048fe..ac4e94d18feb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -161,6 +161,10 @@ hdmi_out_con: endpoint {
};
};
+&hdmi_sound {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -400,6 +404,10 @@ regulator-state-mem {
};
};
+&i2s0_8ch {
+ status = "okay";
+};
+
&i2s1_8ch {
rockchip,trcm-sync-tx-only;
status = "okay";
--
2.41.0

View File

@@ -0,0 +1,37 @@
From 13438a717627cae086cc3a1126552cffa2f4bd16 Mon Sep 17 00:00:00 2001
Message-ID: <13438a717627cae086cc3a1126552cffa2f4bd16.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:41 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the GPU on ODROID-M1
Enable the GPU core on the Rockchip RK3568 ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-9-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index ac4e94d18feb..e4b7699d3eea 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -143,6 +143,11 @@ &gmac0_rgmii_clk
rx_delay = <0x2d>;
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&hdmi {
avdd-0v9-supply = <&vdda0v9_image>;
avdd-1v8-supply = <&vcca1v8_image>;
--
2.41.0

View File

@@ -0,0 +1,111 @@
From 0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c Mon Sep 17 00:00:00 2001
Message-ID: <0f0a85a289b4d0fbd5c39eb5ddbb681a37ad490c.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:42 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 2.0 ports on ODROID-M1
The Rockchip RK3568 has two USB OHCI/EHCI controllers connected to a PHY
providing one host-only port and one OTG port. On the ODROID-M1, they
are both used in host mode. The USB ports are powered by a DC/DC
converter providing 5V and named VCC5V0_SYS on the schematics, followed
by a power switch.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-10-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index e4b7699d3eea..2e4cc20bd676 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -105,6 +105,28 @@ vcc3v3_sys: vcc3v3-sys-regulator {
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&cpu0 {
@@ -463,6 +485,15 @@ hp_det_pin: hp-det-pin {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pmu_io_domains {
@@ -561,6 +592,36 @@ &uart2 {
status = "okay";
};
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
--
2.41.0

View File

@@ -0,0 +1,114 @@
From d8abc451c669a8fd36b31db5cb96ec49da819124 Mon Sep 17 00:00:00 2001
Message-ID: <d8abc451c669a8fd36b31db5cb96ec49da819124.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:43 +0200
Subject: [PATCH] arm64: dts: rockchip: Enable the USB 3.0 ports on ODROID-M1
The Rockchip RK3568 has two USB XHCI controllers. The USB 2.0 signals
are connected to a PHY providing one host-only port and one OTG port.
The USB 3.0 signals are connected to two USB3.0/PCIE/SATA combo PHY.
The ODROID M1 has 2 type A USB 3.0 connectors, with the USB 3.0 signals
connected to the two combo PHYs. For the USB 2.0 signals, one connector
is connected to the host-only PHY and uses the same power switch as the
USB 2.0 ports. The other connector has its own power switch and is
connected to the OTG PHY, which is also connected to a device only
micro-USB connector. The purpose of this micro-USB connector is for
firmware update using the Rockusb vendor specific USB class. Therefore
it does not make sense to enable this port on Linux, and the PHY is
forced to host mode.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-11-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 49 ++++++++++++++++++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 2e4cc20bd676..9a84a7e76d7a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -127,6 +127,30 @@ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb_otg";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&combphy1 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
};
&cpu0 {
@@ -490,7 +514,7 @@ usb {
vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
- vcc5v0_usb_otg_en_pin: vcc5v0-usb-otg-en-pin {
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -600,6 +624,11 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
@@ -608,6 +637,24 @@ &usb_host1_ohci {
status = "okay";
};
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
&usb2phy1 {
status = "okay";
};
--
2.41.0

View File

@@ -0,0 +1,48 @@
From 2f6d4521403932ca22cb4dabef9033f1d52232ba Mon Sep 17 00:00:00 2001
Message-ID: <2f6d4521403932ca22cb4dabef9033f1d52232ba.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:44 +0200
Subject: [PATCH] arm64: dts: rockchip: Add SATA support to ODROID-M1
Enable the Combo PHY and SATA nodes in ODROID-M1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-12-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 9a84a7e76d7a..bd24ccf94e76 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -153,6 +153,11 @@ &combphy1 {
status = "okay";
};
+&combphy2 {
+ /* used for SATA */
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
@@ -538,6 +543,10 @@ &saradc {
status = "okay";
};
+&sata2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
--
2.41.0

View File

@@ -0,0 +1,80 @@
From 1572a9c5d9fa9f654fbc1909528ae5940ad34aa3 Mon Sep 17 00:00:00 2001
Message-ID: <1572a9c5d9fa9f654fbc1909528ae5940ad34aa3.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:45 +0200
Subject: [PATCH] arm64: dts: rockchip: Add PCIEe v3 nodes to ODROID-M1
Add nodes to ODROID-M1 to support PCIe v3 on the M2 slot.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-13-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3568-odroid-m1.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index bd24ccf94e76..2f685c606bb9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -96,6 +96,19 @@ simple-audio-card,codec {
};
};
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ enable-active-high;
+ gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie_en_pin>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -479,6 +492,18 @@ rgmii_phy0: ethernet-phy@0 {
};
};
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_pin>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
&pinctrl {
fspi {
fspi_dual_io_pins: fspi-dual-io-pins {
@@ -503,6 +528,15 @@ led_work_pin: led-work-pin {
};
};
+ pcie {
+ pcie_reset_pin: pcie-reset-pin {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
+ rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
--
2.41.0

View File

@@ -0,0 +1,54 @@
From b2eae73eeb32dd9383571de6af18fc8bd39aac3a Mon Sep 17 00:00:00 2001
Message-ID: <b2eae73eeb32dd9383571de6af18fc8bd39aac3a.1688490481.git.stefan@agner.ch>
In-Reply-To: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
References: <d388735d551e09b00317a509859fca51776b9826.1688490481.git.stefan@agner.ch>
From: Aurelien Jarno <aurelien@aurel32.net>
Date: Fri, 30 Sep 2022 07:12:46 +0200
Subject: [PATCH] arm64: dts: rockchip: Add IR receiver node to ODROID-M1
Add the infrared receiver and its associated pinctrl entry. Note that
there is an external pullup to VCC3V3_SYS.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20220930051246.391614-14-aurelien@aurel32.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 2f685c606bb9..59ecf868dbd0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -49,6 +49,13 @@ hdmi_con_in: endpoint {
};
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
leds {
compatible = "gpio-leds";
@@ -519,6 +526,13 @@ fspi_dual_io_pins: fspi-dual-io-pins {
};
};
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ /* external pullup to VCC3V3_SYS */
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
led_power_pin: led-power-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
--
2.41.0

View File

@@ -0,0 +1,48 @@
From acadbae38f91965f204d6a5d49eb8b578970b818 Mon Sep 17 00:00:00 2001
Message-ID: <acadbae38f91965f204d6a5d49eb8b578970b818.1689147150.git.stefan@agner.ch>
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 2 Jul 2023 20:47:17 +0000
Subject: [PATCH] ata: dwc_ahci: Fix support for other platforms
The dwc_ahci driver use platform specific defines, place the platform
specific code behind a ifdef CONFIG_ARCH_OMAP2PLUS to allow build and
use of the driver on Rockchip platform.
Fixes: 02a4b4297901 ("drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/ata/dwc_ahci.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c
index 826fea71cc..1dc91e7fce 100644
--- a/drivers/ata/dwc_ahci.c
+++ b/drivers/ata/dwc_ahci.c
@@ -13,7 +13,9 @@
#include <ahci.h>
#include <scsi.h>
#include <sata.h>
+#ifdef CONFIG_ARCH_OMAP2PLUS
#include <asm/arch/sata.h>
+#endif
#include <asm/io.h>
#include <generic-phy.h>
@@ -72,12 +74,14 @@ static int dwc_ahci_probe(struct udevice *dev)
return ret;
}
+#ifdef CONFIG_ARCH_OMAP2PLUS
if (priv->wrapper_base) {
u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
/* Enable SATA module, No Idle, No Standby */
writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG);
}
+#endif
return ahci_probe_scsi(dev, (ulong)priv->base);
}
--
2.41.0

View File

@@ -1,59 +1,73 @@
From f7bc9a62a5ff7e8b95d902103b12c6ace208d11a Mon Sep 17 00:00:00 2001
From: Dongjin Kim <tobetter@gmail.com>
Date: Thu, 25 Jan 2024 16:02:51 +0900
Subject: [PATCH] board: rockchip: Add Hardkernel ODROID-M1S
From e52e7ff196b942c8bf8bee9e74d4f24619934a1b Mon Sep 17 00:00:00 2001
Message-ID: <e52e7ff196b942c8bf8bee9e74d4f24619934a1b.1689147150.git.stefan@agner.ch>
In-Reply-To: <acadbae38f91965f204d6a5d49eb8b578970b818.1689147150.git.stefan@agner.ch>
References: <acadbae38f91965f204d6a5d49eb8b578970b818.1689147150.git.stefan@agner.ch>
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 2 Jul 2023 20:47:19 +0000
Subject: [PATCH] board: rockchip: Add Hardkernel ODROID-M1
Hardkernel ODROID-M1S is a single board computer with a RK3566 SoC,
a slightly modified version of the RK3566 SoC.
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.
Features tested on a ODROID-M1S 8GB v1.0 2023-08-10:
- SD-card boot
- eMMC boot
- PCIe/NVMe
Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Message ID: 20240125070252.2057679-1-tobetter@gmail.com
Device tree is imported from linux v6.4.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi | 28 +
arch/arm/dts/rk3566-odroid-m1s.dts | 665 +++++++++++++++++++++
arch/arm/mach-rockchip/rk3568/Kconfig | 6 +
board/hardkernel/odroid_m1s/Kconfig | 15 +
board/hardkernel/odroid_m1s/MAINTAINERS | 9 +
board/hardkernel/odroid_m1s/Makefile | 7 +
board/hardkernel/odroid_m1s/board.c | 81 +++
configs/odroid-m1s-rk3566_defconfig | 109 ++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/odroid_m1s.h | 12 +
10 files changed, 933 insertions(+)
create mode 100644 arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3566-odroid-m1s.dts
create mode 100644 board/hardkernel/odroid_m1s/Kconfig
create mode 100644 board/hardkernel/odroid_m1s/MAINTAINERS
create mode 100644 board/hardkernel/odroid_m1s/Makefile
create mode 100644 board/hardkernel/odroid_m1s/board.c
create mode 100644 configs/odroid-m1s-rk3566_defconfig
create mode 100644 include/configs/odroid_m1s.h
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi | 46 ++
arch/arm/dts/rk3568-odroid-m1.dts | 744 ++++++++++++++++++++++
board/rockchip/evb_rk3568/MAINTAINERS | 7 +
configs/odroid-m1-rk3568_defconfig | 103 +++
doc/board/rockchip/rockchip.rst | 1 +
6 files changed, 902 insertions(+)
create mode 100644 arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-odroid-m1.dts
create mode 100644 configs/odroid-m1-rk3568_defconfig
diff --git a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa60..334c1bafda 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -169,6 +169,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3566-anbernic-rgxx3.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-evb.dtb \
+ rk3568-odroid-m1.dtb \
rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
new file mode 100644
index 0000000000..33a1d142b8
index 0000000000..dc8ad98715
--- /dev/null
+++ b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+++ b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk356x-u-boot.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ aliases {
+ spi0 = &sfc;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = &sdmmc0, &sdhci;
+ };
+};
+
+&fspi_dual_io_pins {
+ bootph-all;
+};
+
+&sdhci {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
@@ -63,20 +77,34 @@ index 0000000000..33a1d142b8
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
+};
+
+&sfc {
+ bootph-pre-ram;
+ u-boot,spl-sfc-no-dma;
+
+ flash@0 {
+ bootph-pre-ram;
+ };
+};
+
+&uart2 {
+ bootph-all;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3566-odroid-m1s.dts b/arch/arm/dts/rk3566-odroid-m1s.dts
+
+&vcc5v0_usb_host {
+ /* Workaround until regulator implement basic reference counter */
+ regulator-always-on;
+};
diff --git a/arch/arm/dts/rk3568-odroid-m1.dts b/arch/arm/dts/rk3568-odroid-m1.dts
new file mode 100644
index 0000000000..73e29d80c7
index 0000000000..59ecf868db
--- /dev/null
+++ b/arch/arm/dts/rk3566-odroid-m1s.dts
@@ -0,0 +1,665 @@
+++ b/arch/arm/dts/rk3568-odroid-m1.dts
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Hardkernel Co., Ltd.
+ * Copyright (c) 2022 Hardkernel Co., Ltd.
+ *
+ */
+
@@ -85,14 +113,14 @@ index 0000000000..73e29d80c7
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3566.dtsi"
+#include "rk3568.dtsi"
+
+/ {
+ model = "Hardkernel ODROID-M1S";
+ compatible = "hardkernel,rk3568-odroid-m1s", "rockchip,rk3568";
+ model = "Hardkernel ODROID-M1";
+ compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac1;
+ ethernet0 = &gmac0;
+ i2c0 = &i2c3;
+ i2c3 = &i2c0;
+ mmc0 = &sdhci;
@@ -105,11 +133,13 @@ index 0000000000..73e29d80c7
+ stdout-path = "serial2:1500000n8";
+ };
+
+ gmac1_clkin: external-gmac1-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac1_clkin";
+ #clock-cells = <0>;
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ hdmi-con {
@@ -123,6 +153,13 @@ index 0000000000..73e29d80c7
+ };
+ };
+
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
@@ -145,21 +182,13 @@ index 0000000000..73e29d80c7
+ };
+ };
+
+ pcie20_3v3: pcie20-3v3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie20_en_pin>;
+ regulator-name = "pcie20_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ rk809-sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det_pin>;
+ simple-audio-card,name = "Analog RK817";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
@@ -178,23 +207,17 @@ index 0000000000..73e29d80c7
+ };
+ };
+
+ spdif_dit: spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ spdif_sound: spdif-sound {
+ compatible = "simple-audio-card";
+ status = "disabled";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_dit>;
+ };
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ enable-active-high;
+ gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie_en_pin>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
@@ -204,7 +227,7 @@ index 0000000000..73e29d80c7
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
@@ -214,49 +237,48 @@ index 0000000000..73e29d80c7
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v_dcin>;
+ };
+
+ vcc5v_dcin: vcc5v0-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+ pinctrl-names = "default";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "vcc5v0_usb_host";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+ pinctrl-names = "default";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "vcc5v0_usb_otg";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy1 {
+&combphy0 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&combphy1 {
+ /* Used for USB3 */
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
+&combphy2 {
+ /* used for SATA */
+ status = "okay";
+};
+
@@ -276,21 +298,20 @@ index 0000000000..73e29d80c7
+ cpu-supply = <&vdd_cpu>;
+};
+
+&gmac1 {
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
+&gmac0 {
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+ assigned-clock-rates = <0>, <125000000>;
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-handle = <&rgmii_phy0>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc3v3_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1m1_miim
+ &gmac1m1_tx_bus2
+ &gmac1m1_rx_bus2
+ &gmac1m1_rgmii_clk
+ &gmac1m1_rgmii_bus
+ &gmac1m1_clkinout>;
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus>;
+ status = "okay";
+
+ tx_delay = <0x4f>;
@@ -572,21 +593,50 @@ index 0000000000..73e29d80c7
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@0 {
+&mdio0 {
+ rgmii_phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie2x1 {
+ pinctrl-0 = <&pcie20m2_pins>;
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_pin>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+ vpcie3v3-supply = <&pcie20_3v3>;
+};
+
+&pinctrl {
+ fspi {
+ fspi_dual_io_pins: fspi-dual-io-pins {
+ rockchip,pins =
+ /* fspi_clk */
+ <1 RK_PD0 1 &pcfg_pull_none>,
+ /* fspi_cs0n */
+ <1 RK_PD3 1 &pcfg_pull_none>,
+ /* fspi_d0 */
+ <1 RK_PD1 1 &pcfg_pull_none>,
+ /* fspi_d1 */
+ <1 RK_PD2 1 &pcfg_pull_none>;
+ };
+ };
+
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ /* external pullup to VCC3V3_SYS */
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ led_power_pin: led-power-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -597,8 +647,11 @@ index 0000000000..73e29d80c7
+ };
+
+ pcie {
+ vcc3v3_pcie20_en_pin: vcc3v3-pcie20-en-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ pcie_reset_pin: pcie-reset-pin {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
+ rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
@@ -608,12 +661,18 @@ index 0000000000..73e29d80c7
+ };
+ };
+
+ rk809 {
+ hp_det_pin: hp-det-pin {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
@@ -624,7 +683,7 @@ index 0000000000..73e29d80c7
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
@@ -636,6 +695,10 @@ index 0000000000..73e29d80c7
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
@@ -660,6 +723,50 @@ index 0000000000..73e29d80c7
+ status = "okay";
+};
+
+&sfc {
+ /* Dual I/O mode as the D2 pin conflicts with the eMMC */
+ pinctrl-0 = <&fspi_dual_io_pins>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <2>;
+ spi-tx-bus-width = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SPL";
+ reg = <0x0 0xe0000>;
+ };
+ partition@e0000 {
+ label = "U-Boot Env";
+ reg = <0xe0000 0x20000>;
+ };
+ partition@100000 {
+ label = "U-Boot";
+ reg = <0x100000 0x200000>;
+ };
+ partition@300000 {
+ label = "splash";
+ reg = <0x300000 0x100000>;
+ };
+ partition@400000 {
+ label = "Filesystem";
+ reg = <0x400000 0xc00000>;
+ };
+ };
+ };
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
@@ -679,7 +786,7 @@ index 0000000000..73e29d80c7
+};
+
+&usb_host0_xhci {
+ dr_mode = "otg";
+ dr_mode = "host";
+ status = "okay";
+};
+
@@ -739,172 +846,30 @@ index 0000000000..73e29d80c7
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
index baa51349f4..2f03b983ee 100644
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568
help
Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS
index 6b2e7c7575..a5b59da0f7 100644
--- a/board/rockchip/evb_rk3568/MAINTAINERS
+++ b/board/rockchip/evb_rk3568/MAINTAINERS
@@ -7,6 +7,13 @@ F: configs/evb-rk3568_defconfig
F: arch/arm/dts/rk3568-evb-boot.dtsi
F: arch/arm/dts/rk3568-evb.dts
+config TARGET_ODROID_M1S_RK3566
+ bool "ODROID-M1S"
+ help
+ Hardkernel ODROID-M1S single board computer with a RK3566 SoC.
+
config TARGET_QUARTZ64_RK3566
bool "Pine64 Quartz64"
help
@@ -44,6 +49,7 @@ config SYS_MALLOC_F_LEN
source "board/rockchip/evb_rk3568/Kconfig"
source "board/anbernic/rgxx3_rk3566/Kconfig"
source "board/hardkernel/odroid_m1/Kconfig"
+source "board/hardkernel/odroid_m1s/Kconfig"
source "board/pine64/quartz64_rk3566/Kconfig"
endif
diff --git a/board/hardkernel/odroid_m1s/Kconfig b/board/hardkernel/odroid_m1s/Kconfig
new file mode 100644
index 0000000000..0acea61dac
--- /dev/null
+++ b/board/hardkernel/odroid_m1s/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ODROID_M1S_RK3566
+
+config SYS_BOARD
+ default "odroid_m1s"
+
+config SYS_VENDOR
+ default "hardkernel"
+
+config SYS_CONFIG_NAME
+ default "odroid_m1s"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/hardkernel/odroid_m1s/MAINTAINERS b/board/hardkernel/odroid_m1s/MAINTAINERS
new file mode 100644
index 0000000000..20fc277ccc
--- /dev/null
+++ b/board/hardkernel/odroid_m1s/MAINTAINERS
@@ -0,0 +1,9 @@
+ODROID-M1S
+M: Dongjin Kim <tobetter@gmail.com>
+ODROID-M1
+M: Jonas Karlman <jonas@kwiboo.se>
+S: Maintained
+F: arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
+F: arch/arm/dts/rk3566-odroid-m1s.dts
+F: board/hardkernel/odroid_m1s/
+F: board/hardkernel/odroid_m1s/board.c
+F: configs/odroid-m1s-rk3566_defconfig
+F: include/configs/odroid_m1s.h
diff --git a/board/hardkernel/odroid_m1s/Makefile b/board/hardkernel/odroid_m1s/Makefile
+F: configs/odroid-m1-rk3568_defconfig
+F: arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
+F: arch/arm/dts/rk3568-odroid-m1.dts
+
RADXA-CM3
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig
new file mode 100644
index 0000000000..6ca49c49b7
index 0000000000..d090196219
--- /dev/null
+++ b/board/hardkernel/odroid_m1s/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2024 Hardkernel Co,. Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += board.o
diff --git a/board/hardkernel/odroid_m1s/board.c b/board/hardkernel/odroid_m1s/board.c
new file mode 100644
index 0000000000..e87cfc4797
--- /dev/null
+++ b/board/hardkernel/odroid_m1s/board.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 Hardkernel Co., Ltd
+ */
+
+#include <asm/unaligned.h>
+#include <mmc.h>
+#include <net.h>
+#include <vsprintf.h>
+#include <asm/arch-rockchip/misc.h>
+
+#ifdef CONFIG_MISC_INIT_R
+
+/* Read first block 512 bytes from the first BOOT partition of eMMC
+ * that stores device identifcation sting in UUID type 1, this string
+ * is written in factory to give device seranl number and MAC address.
+ */
+static int odroid_setup_macaddr(void)
+{
+ struct mmc *mmc;
+ struct blk_desc *desc;
+ unsigned long mac_addr;
+ unsigned long count;
+ int ret;
+ u8 buf[512];
+
+ mmc = find_mmc_device(0);
+ if (!mmc)
+ return -ENODEV;
+
+ desc = mmc_get_blk_desc(mmc);
+
+ // Switch to the first BOOT partition
+ ret = blk_select_hwpart_devnum(UCLASS_MMC, 0, 1);
+ if (ret)
+ return -EIO;
+
+ count = blk_dread(desc, 0, 1, (void *)buf);
+
+ // Switch back to USER partition
+ ret = blk_dselect_hwpart(desc, 0);
+ if (ret || count != 1)
+ return -EIO;
+
+ *(char *)(buf + 36) = 0;
+
+ // Serial number
+ env_set("serial#", (char *)buf);
+
+ // MAC address
+ mac_addr = cpu_to_be64(simple_strtoul((char *)buf + 24, NULL, 16)) >> 16;
+
+ eth_env_set_enetaddr("ethaddr", (unsigned char *)&mac_addr);
+ eth_env_set_enetaddr("eth1addr", (unsigned char *)&mac_addr);
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ const u32 cpuid_offset = CFG_CPUID_OFFSET;
+ const u32 cpuid_length = 0x10;
+ u8 cpuid[cpuid_length];
+ int ret;
+
+ ret = odroid_setup_macaddr();
+ if (ret) {
+ ret = rockchip_setup_macaddr();
+ if (ret)
+ return ret;
+ }
+
+ ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+ if (ret)
+ return ret;
+
+ ret = rockchip_cpuid_set(cpuid, cpuid_length);
+
+ return ret;
+}
+#endif
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
new file mode 100644
index 0000000000..d70a10dc08
--- /dev/null
+++ b/configs/odroid-m1s-rk3566_defconfig
@@ -0,0 +1,109 @@
+++ b/configs/odroid-m1-rk3568_defconfig
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
@@ -917,13 +882,12 @@ index 0000000000..d70a10dc08
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="rk3566-odroid-m1s"
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_ODROID_M1S_RK3566=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
@@ -938,7 +902,7 @@ index 0000000000..d70a10dc08
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-odroid-m1s.dtb"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-odroid-m1.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
@@ -959,15 +923,12 @@ index 0000000000..d70a10dc08
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_INI=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_CRAMFS=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
@@ -982,15 +943,14 @@ index 0000000000..d70a10dc08
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=4
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_PCIE=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
@@ -1002,6 +962,7 @@ index 0000000000..d70a10dc08
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
@@ -1011,39 +972,19 @@ index 0000000000..d70a10dc08
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_FS_CRAMFS=y
+CONFIG_ERRNO_STR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0800
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 18d0b6f089..3ce9966fc1 100644
index 99376fb54c..b3de15b36a 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -93,6 +93,7 @@ List of mainline supported Rockchip boards:
@@ -95,6 +95,7 @@ List of mainline supported Rockchip boards:
* rk3566
- Anbernic RGxx3 (anbernic-rgxx3-rk3566)
+ - Hardkernel ODROID-M1S (odroid-m1s-rk3566)
- Pine64 Quartz64-A Board (quartz64-a-rk3566)
- Pine64 Quartz64-B Board (quartz64-b-rk3566)
- Pine64 SOQuartz on Blade (soquartz-blade-rk3566)
diff --git a/include/configs/odroid_m1s.h b/include/configs/odroid_m1s.h
new file mode 100644
index 0000000000..b271861388
--- /dev/null
+++ b/include/configs/odroid_m1s.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __ODROID_M1S_H
+#define __ODROID_M1S_H
+
+#include <configs/rk3568_common.h>
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
+#endif
* rk3568
- Rockchip Evb-RK3568 (evb-rk3568)
+ - Hardkernel ODROID-M1 (odroid-m1-rk3568)
* rk3588
- Rockchip EVB (evb-rk3588)
--
2.40.1
2.41.0

View File

@@ -1,2 +1,5 @@
# CONFIG_DWC_ETH_QOS is not set
# CONFIG_DWC_ETH_QOS_ROCKCHIP is not set
CONFIG_DOS_PARTITION=y
# CONFIG_EFI_PARTITION is not set
# CONFIG_USB_STORAGE is not set
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y

View File

@@ -1,24 +0,0 @@
#!/bin/bash
# shellcheck disable=SC2155
function hassos_pre_image() {
local BOOT_DATA="$(path_boot_dir)"
local SPL_IMG="$(path_spl_img)"
cp "${BINARIES_DIR}/boot.scr" "${BOOT_DATA}/boot.scr"
cp "${BINARIES_DIR}"/*.dtb "${BOOT_DATA}/"
cp "${BOARD_DIR}/boot-env.txt" "${BOOT_DATA}/haos-config.txt"
cp "${BOARD_DIR}/cmdline.txt" "${BOOT_DATA}/cmdline.txt"
# SPL
create_spl_image
dd if="${BINARIES_DIR}/u-boot-rockchip.bin" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
}
function hassos_post_image() {
convert_disk_image_xz
}

View File

@@ -1,12 +0,0 @@
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_THERMAL_GOV_BANG_BANG=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
# CONFIG_DW_WATCHDOG is not set

View File

@@ -1,12 +0,0 @@
BOARD_ID=odroid-m1s
BOARD_NAME="Hardkernel ODROID-M1S"
CHASSIS=embedded
BOOTLOADER=uboot
KERNEL_FILE=Image
BOOT_SYS=gpt
BOOT_SIZE=16M
BOOT_SPL=true
BOOT_SPL_SIZE=16M
BOOT_ENV_SIZE=0x8000
SUPERVISOR_MACHINE=odroid-m1
SUPERVISOR_ARCH=aarch64

View File

@@ -1,896 +0,0 @@
From 83dadbe0a615f6fc7550dec98dee938647050990 Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Sun, 28 Jan 2024 18:52:26 +1100
Subject: [PATCH] arm64: dts: rockchip: Import Hardkernel ODROID-M1S board
Odroid-m1s is in the process of being upstreamed.
For now sync dts for Odroid-m1s:
https://github.com/tobetter/linux/blob/ae33b445578884c70d7bfc5d6d519de4db815ccd/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3566-odroid-m1s.dts | 861 ++++++++++++++++++
2 files changed, 862 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 8c15593c0ca4..362359684ed0 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -63,6 +63,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-odroid-m1s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
new file mode 100644
index 000000000000..1cad9217c374
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
@@ -0,0 +1,861 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Hardkernel Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+
+#include "rk3566.dtsi"
+
+/ {
+ model = "Hardkernel ODROID-M1S";
+ compatible = "rockchip,rk3566-odroid-m1", "rockchip,rk3566";
+
+ aliases {
+ ethernet1 = &gmac1;
+ i2c0 = &i2c3;
+ i2c3 = &i2c0;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc0;
+ serial0 = &uart1;
+ serial1 = &uart0;
+ };
+
+ chosen: chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ gmac1_clkin: external-gmac1-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac1_clkin";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ status = "okay";
+
+ red_led: red {
+ gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_power_en>;
+ };
+ blue_led: blue {
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ function = LED_FUNCTION_HEARTBEAT;
+ color = <LED_COLOR_ID_BLUE>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_work_en>;
+ };
+ };
+
+ pcie20_3v3: pcie20-3v3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie20_3v3_en>;
+ regulator-name = "pcie20_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ rk809-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "ODROID-M1-FRONT";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rk809>;
+ };
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v_dcin: vcc5v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v_dcin>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_otg: vcc5v0-otg-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
+ regulator-name = "vcc5v0_usb_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb3-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
+ regulator-name = "vcc5v0_usb_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy1 {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&combphy2 {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&display_subsystem {
+ status = "okay";
+};
+
+&gmac1 {
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_3v3>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1m1_miim
+ &gmac1m1_tx_bus2
+ &gmac1m1_rx_bus2
+ &gmac1m1_rgmii_clk
+ &gmac1m1_rgmii_bus
+ &gmac1m1_clkinout>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ /* Reset time is 20ms, 100ms for rtl8211f */
+ snps,reset-delays-us = <0 20000 100000>;
+ tx_delay = <0x4f>;
+ rx_delay = <0x2d>;
+ phy-handle = <&rgmii_phy1>;
+ status = "okay";
+};
+
+&gpio0 {
+ gpio-line-names =
+ /* GPIO0_A0-A3 */
+ "", "", "", "",
+ /* GPIO0_A4-A7 */
+ "", "", "", "",
+
+ /* GPIO0_B0-B3 */
+ "", "", "", "PIN_28",
+ /* GPIO0_B4-B7 */
+ "PIN_27", "PIN_33", "PIN_7", "",
+
+ /* GPIO0_C0-C3 */
+ "PIN_11", "PIN_13", "PIN_15", "",
+ /* GPIO0_C4-C7 */
+ "", "", "", "",
+
+ /* GPIO0_D0-D3 */
+ "", "", "", "",
+ /* GPIO0_D4-D7 */
+ "", "", "", "";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /* GPIO1_A0-A3 */
+ "", "", "", "",
+ /* GPIO1_A4-A7 */
+ "", "", "", "",
+
+ /* GPIO1_B0-B3 */
+ "", "", "", "",
+ /* GPIO1_B4-B7 */
+ "", "", "", "",
+
+ /* GPIO1_C0-C3 */
+ "", "", "", "",
+ /* GPIO1_C4-C7 */
+ "", "", "", "",
+
+ /* GPIO1_D0-D3 */
+ "", "", "", "",
+ /* GPIO1_D4-D7 */
+ "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ /* GPIO2_A0-A3 */
+ "", "", "", "PIN_10",
+ /* GPIO2_A4-A7 */
+ "PIN_8", "PINN_35", "PIN_36", "PIN_12",
+
+ /* GPIO2_B0-B3 */
+ "PIN_22", "PIN_26", "PIN_32", "",
+ /* GPIO2_B4-B7 */
+ "", "PIN_16", "PIN_18", "PIN_31",
+
+ /* GPIO2_C0-C3 */
+ "PIN_29", "", "", "",
+ /* GPIO2_C4-C7 */
+ "", "", "", "",
+
+ /* GPIO2_D0-D3 */
+ "", "", "", "",
+ /* GPIO2_D4-D7 */
+ "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ /* GPIO3_A0-A3 */
+ "", "PIN_24", "", "",
+ /* GPIO3_A4-A7 */
+ "", "", "", "",
+
+ /* GPIO3_B0-B3 */
+ "", "", "", "EXTPIN_13",
+ /* GPIO3_B4-B7 */
+ "EXTPIN_14", "PIN_5", "PIN_3", "",
+
+ /* GPIO3_C0-C3 */
+ "", "PIN_19", "PIN_21", "PIN_23",
+ /* GPIO3_C4-C7 */
+ "EXTPIN_11", "EXTPIN_12", "", "",
+
+ /* GPIO3_D0-D3 */
+ "", "", "", "",
+ /* GPIO3_D4-D7 */
+ "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ /* GPIO4_A0-A3 */
+ "", "", "", "",
+ /* GPIO4_A4-A7 */
+ "", "", "", "",
+
+ /* GPIO4_B0-B3 */
+ "", "", "", "",
+ /* GPIO4_B4-B7 */
+ "", "", "", "",
+
+ /* GPIO4_C0-C3 */
+ "", "", "", "",
+ /* GPIO4_C4-C7 */
+ "", "", "", "",
+
+ /* GPIO4_D0-D3 */
+ "", "", "", "",
+ /* GPIO4_D4-D7 */
+ "", "", "", "";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
+ simple-audio-card,name = "ODROID-M1-HDMI";
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ vdd_cpu: tcs4525@1c {
+ compatible = "tcs,tcs452x";
+ reg = <0x1c>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "fan53555-reg";
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1390000>;
+ regulator-init-microvolt = <900000>;
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
+ #clock-cells = <1>;
+ clock-names = "mclk";
+ clocks = <&cru I2S1_MCLKOUT_TX>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
+ rockchip,system-power-controller;
+ #sound-dai-cells = <0>;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-init-microvolt = <900000>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_logic";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-init-microvolt = <900000>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_gpu";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-init-microvolt = <900000>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_npu";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdda0v9_image";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdda_0v9";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdda0v9_pmu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vccio_acodec";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3_pmu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_ddr: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pmu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_image";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_3v3";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_sd";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "disabled";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2m1_xfer>;
+
+ clock-frequency = <400000>;
+};
+
+&i2c3 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3m1_xfer>;
+};
+
+&i2s0_8ch {
+ status = "okay";
+};
+
+&i2s1_8ch {
+ status = "okay";
+ rockchip,clk-trcm = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s1m0_sclktx
+ &i2s1m0_lrcktx
+ &i2s1m0_sdi0
+ &i2s1m0_sdo0>;
+};
+
+&mdio1 {
+ rgmii_phy1: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ };
+};
+
+&pcie2x1 {
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&pcie20_3v3>;
+ pinctrl-0 = <&pcie20m2_pins>;
+ status = "okay";
+};
+
+&pinctrl {
+ gmac1 {
+ gmac1m1_miim: gmac1m1-miim {
+ rockchip,pins =
+ /* gmac1_mdcm1 */
+ <4 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_mdiom1 */
+ <4 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
+ };
+
+ gmac1m1_clkinout: gmac1m1-clkinout {
+ rockchip,pins =
+ /* gmac1_mclkinoutm1 */
+ <4 RK_PC1 3 &pcfg_pull_none_drv_level_15>;
+ };
+
+ gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
+ rockchip,pins =
+ /* gmac1_rxd0m1 */
+ <4 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_rxd1m1 */
+ <4 RK_PB0 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_rxdvcrsm1 */
+ <4 RK_PB1 3 &pcfg_pull_none_drv_level_15>;
+ };
+
+ gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
+ rockchip,pins =
+ /* gmac1_txd0m1 */
+ <4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_txd1m1 */
+ <4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_txenm1 */
+ <4 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
+ };
+
+ gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
+ rockchip,pins =
+ /* gmac1_rxclkm1 */
+ <4 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_txclkm1 */
+ <4 RK_PA0 3 &pcfg_pull_none_drv_level_15>;
+ };
+
+ gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
+ rockchip,pins =
+ /* gmac1_rxd2m1 */
+ <4 RK_PA1 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_rxd3m1 */
+ <4 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_txd2m1 */
+ <3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
+ /* gmac1_txd3m1 */
+ <3 RK_PD7 3 &pcfg_pull_none_drv_level_15>;
+ };
+ };
+
+ leds {
+ led_power_en: led_power_en {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ led_work_en: led_work_en {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie20_3v3_en: pcie20-3v3-en {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic_int {
+ rockchip,pins =
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_usb_otg_en: vcc5v0-otg-en {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_usb_host_en: vcc5v0-usb3-en {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_3v3>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_3v3>;
+ vccio7-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pwm1 {
+ status = "disabled";
+ pinctrl-0 = <&pwm1m1_pins>;
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_sys>;
+ vqmmc-supply = <&vccio_sd>;
+ status = "okay";
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&uart1 {
+ dma-names = "tx", "rx";
+ /* uart1 uart1-with-ctsrts */
+ pinctrl-0 = <&uart1m1_xfer>;
+ pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
+ status = "disabled";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ vbus-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.40.1

View File

@@ -1,335 +0,0 @@
From eb02261dd6c88a7fcf3c28e59a7976905815fa6b Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Sun, 28 Jan 2024 18:55:57 +1100
Subject: [PATCH] arm64: dts: clean up as required for mainline linux
---
.../boot/dts/rockchip/rk3566-odroid-m1s.dts | 212 +++---------------
1 file changed, 27 insertions(+), 185 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
index 1cad9217c374..cbf2495901d7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
@@ -18,12 +18,8 @@ / {
aliases {
ethernet1 = &gmac1;
- i2c0 = &i2c3;
- i2c3 = &i2c0;
mmc0 = &sdhci;
mmc1 = &sdmmc0;
- serial0 = &uart1;
- serial1 = &uart0;
};
chosen: chosen {
@@ -52,7 +48,7 @@ leds {
compatible = "gpio-leds";
status = "okay";
- red_led: red {
+ red_led: led-0 {
gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
function = LED_FUNCTION_POWER;
@@ -60,7 +56,7 @@ red_led: red {
pinctrl-names = "default";
pinctrl-0 = <&led_power_en>;
};
- blue_led: blue {
+ blue_led: led-1 {
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
@@ -97,6 +93,25 @@ simple-audio-card,codec {
};
};
+ spdif_dit: spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ spdif_sound: spdif-sound {
+ compatible = "simple-audio-card";
+ status = "disabled";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_dit>;
+ };
+ };
+
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -164,7 +179,6 @@ vcc5v0_usb_host: vcc5v0-usb3-regulator {
};
&combphy1 {
- phy-supply = <&vcc5v0_usb_host>;
status = "okay";
};
@@ -215,121 +229,6 @@ &gmac1m1_rgmii_bus
status = "okay";
};
-&gpio0 {
- gpio-line-names =
- /* GPIO0_A0-A3 */
- "", "", "", "",
- /* GPIO0_A4-A7 */
- "", "", "", "",
-
- /* GPIO0_B0-B3 */
- "", "", "", "PIN_28",
- /* GPIO0_B4-B7 */
- "PIN_27", "PIN_33", "PIN_7", "",
-
- /* GPIO0_C0-C3 */
- "PIN_11", "PIN_13", "PIN_15", "",
- /* GPIO0_C4-C7 */
- "", "", "", "",
-
- /* GPIO0_D0-D3 */
- "", "", "", "",
- /* GPIO0_D4-D7 */
- "", "", "", "";
-};
-
-&gpio1 {
- gpio-line-names =
- /* GPIO1_A0-A3 */
- "", "", "", "",
- /* GPIO1_A4-A7 */
- "", "", "", "",
-
- /* GPIO1_B0-B3 */
- "", "", "", "",
- /* GPIO1_B4-B7 */
- "", "", "", "",
-
- /* GPIO1_C0-C3 */
- "", "", "", "",
- /* GPIO1_C4-C7 */
- "", "", "", "",
-
- /* GPIO1_D0-D3 */
- "", "", "", "",
- /* GPIO1_D4-D7 */
- "", "", "", "";
-};
-
-&gpio2 {
- gpio-line-names =
- /* GPIO2_A0-A3 */
- "", "", "", "PIN_10",
- /* GPIO2_A4-A7 */
- "PIN_8", "PINN_35", "PIN_36", "PIN_12",
-
- /* GPIO2_B0-B3 */
- "PIN_22", "PIN_26", "PIN_32", "",
- /* GPIO2_B4-B7 */
- "", "PIN_16", "PIN_18", "PIN_31",
-
- /* GPIO2_C0-C3 */
- "PIN_29", "", "", "",
- /* GPIO2_C4-C7 */
- "", "", "", "",
-
- /* GPIO2_D0-D3 */
- "", "", "", "",
- /* GPIO2_D4-D7 */
- "", "", "", "";
-};
-
-&gpio3 {
- gpio-line-names =
- /* GPIO3_A0-A3 */
- "", "PIN_24", "", "",
- /* GPIO3_A4-A7 */
- "", "", "", "",
-
- /* GPIO3_B0-B3 */
- "", "", "", "EXTPIN_13",
- /* GPIO3_B4-B7 */
- "EXTPIN_14", "PIN_5", "PIN_3", "",
-
- /* GPIO3_C0-C3 */
- "", "PIN_19", "PIN_21", "PIN_23",
- /* GPIO3_C4-C7 */
- "EXTPIN_11", "EXTPIN_12", "", "",
-
- /* GPIO3_D0-D3 */
- "", "", "", "",
- /* GPIO3_D4-D7 */
- "", "", "", "";
-};
-
-&gpio4 {
- gpio-line-names =
- /* GPIO4_A0-A3 */
- "", "", "", "",
- /* GPIO4_A4-A7 */
- "", "", "", "",
-
- /* GPIO4_B0-B3 */
- "", "", "", "",
- /* GPIO4_B4-B7 */
- "", "", "", "",
-
- /* GPIO4_C0-C3 */
- "", "", "", "",
- /* GPIO4_C4-C7 */
- "", "", "", "",
-
- /* GPIO4_D0-D3 */
- "", "", "", "",
- /* GPIO4_D4-D7 */
- "", "", "", "";
-};
-
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
@@ -368,7 +267,6 @@ vdd_cpu: tcs4525@1c {
regulator-name = "vdd_cpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
- regulator-init-microvolt = <900000>;
regulator-ramp-delay = <2300>;
fcs,suspend-voltage-selector = <1>;
regulator-boot-on;
@@ -409,7 +307,6 @@ vdd_logic: DCDC_REG1 {
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
- regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
@@ -423,7 +320,6 @@ vdd_gpu: DCDC_REG2 {
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
- regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu";
@@ -447,7 +343,6 @@ vdd_npu: DCDC_REG4 {
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
- regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_npu";
@@ -587,6 +482,9 @@ regulator-state-mem {
};
};
};
+ codec {
+ rockchip,mic-in-differential;
+ };
};
};
@@ -611,7 +509,7 @@ &i2s0_8ch {
&i2s1_8ch {
status = "okay";
- rockchip,clk-trcm = <1>;
+ rockchip,trcm-sync-tx-only;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
@@ -620,7 +518,7 @@ &i2s1m0_sdi0
};
&mdio1 {
- rgmii_phy1: phy@0 {
+ rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
@@ -634,62 +532,6 @@ &pcie2x1 {
};
&pinctrl {
- gmac1 {
- gmac1m1_miim: gmac1m1-miim {
- rockchip,pins =
- /* gmac1_mdcm1 */
- <4 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_mdiom1 */
- <4 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m1_clkinout: gmac1m1-clkinout {
- rockchip,pins =
- /* gmac1_mclkinoutm1 */
- <4 RK_PC1 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
- rockchip,pins =
- /* gmac1_rxd0m1 */
- <4 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxd1m1 */
- <4 RK_PB0 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxdvcrsm1 */
- <4 RK_PB1 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
- rockchip,pins =
- /* gmac1_txd0m1 */
- <4 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd1m1 */
- <4 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txenm1 */
- <4 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
- rockchip,pins =
- /* gmac1_rxclkm1 */
- <4 RK_PA3 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txclkm1 */
- <4 RK_PA0 3 &pcfg_pull_none_drv_level_15>;
- };
-
- gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
- rockchip,pins =
- /* gmac1_rxd2m1 */
- <4 RK_PA1 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_rxd3m1 */
- <4 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd2m1 */
- <3 RK_PD6 3 &pcfg_pull_none_drv_level_15>,
- /* gmac1_txd3m1 */
- <3 RK_PD7 3 &pcfg_pull_none_drv_level_15>;
- };
- };
-
leds {
led_power_en: led_power_en {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -825,7 +667,7 @@ &usb2phy0_host {
};
&usb2phy0_otg {
- vbus-supply = <&vcc5v0_usb_otg>;
+ phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
--
2.40.1

View File

@@ -1,43 +0,0 @@
From 641ec8e05726d42c8ec7fa3bda1d8a64f126b475 Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Fri, 12 Jan 2024 22:32:56 +1100
Subject: [PATCH] arm64: dts: fix vdd_cpu regulator for mainline
---
.../arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
index cbf2495901d7..a5d9216b544b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
@@ -259,18 +259,19 @@ &hdmi_sound {
&i2c0 {
status = "okay";
- vdd_cpu: tcs4525@1c {
- compatible = "tcs,tcs452x";
+
+ vdd_cpu: regulator@1c {
+ compatible = "tcs,tcs4525";
reg = <0x1c>;
- vin-supply = <&vcc5v0_sys>;
- regulator-compatible = "fan53555-reg";
+ fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-ramp-delay = <2300>;
- fcs,suspend-voltage-selector = <1>;
- regulator-boot-on;
- regulator-always-on;
+ vin-supply = <&vcc3v3_sys>;
+
regulator-state-mem {
regulator-off-in-suspend;
};
--
2.40.1

View File

@@ -1,51 +0,0 @@
From b4d16cd88ec2701dcb15b9519a79288ea5d2bfec Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Sat, 3 Feb 2024 23:40:16 +1100
Subject: [PATCH] Remove deprecated snps,reset properties
---
arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
index b8adfd7024f9..e755d00b1d4f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-odroid-m1s.dts
@@ -192,8 +192,9 @@ &gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
clock_in_out = "input";
- phy-supply = <&vcc_3v3>;
+ phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii";
+ phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
@@ -201,13 +202,8 @@ &gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&gmac1m1_clkinout>;
- snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- /* Reset time is 20ms, 100ms for rtl8211f */
- snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x4f>;
rx_delay = <0x2d>;
- phy-handle = <&rgmii_phy1>;
status = "okay";
};
@@ -504,6 +500,9 @@ &mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
--
2.40.1

View File

@@ -1,48 +0,0 @@
From ed61d0b5f18bf333ff7f35fc8546dd58d227b12f Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Sat, 3 Feb 2024 18:38:49 +1100
Subject: [PATCH] Apply fixes for mainline u-boot
---
arch/arm/dts/rk3566-odroid-m1s.dts | 6 +-----
configs/odroid-m1s-rk3566_defconfig | 1 -
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/dts/rk3566-odroid-m1s.dts b/arch/arm/dts/rk3566-odroid-m1s.dts
index 73e29d80c7..2dba07ba19 100644
--- a/arch/arm/dts/rk3566-odroid-m1s.dts
+++ b/arch/arm/dts/rk3566-odroid-m1s.dts
@@ -17,12 +17,8 @@
aliases {
ethernet0 = &gmac1;
- i2c0 = &i2c3;
- i2c3 = &i2c0;
mmc0 = &sdhci;
mmc1 = &sdmmc0;
- serial0 = &uart1;
- serial1 = &uart0;
};
chosen {
@@ -578,7 +574,7 @@
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
- sd-uhs-sdr50;
+ sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
index d70a10dc08..61b6962063 100644
--- a/configs/odroid-m1s-rk3566_defconfig
+++ b/configs/odroid-m1s-rk3566_defconfig
@@ -106,4 +106,3 @@ CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_FS_CRAMFS=y
CONFIG_ERRNO_STR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0800
--
2.40.1

View File

@@ -1,44 +0,0 @@
From 2a1d8f586799e4166e802babcce18c9980aa1f44 Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Thu, 1 Feb 2024 17:50:46 +1100
Subject: [PATCH] Improve reliability of eMMC
Cherry-picked from:
20240126232615.6826-2-jonas@kwiboo.se
---
arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi | 4 ----
configs/odroid-m1s-rk3566_defconfig | 2 ++
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
index 33a1d142b8..04d0cd17ef 100644
--- a/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-odroid-m1s-u-boot.dtsi
@@ -14,11 +14,7 @@
&sdhci {
cap-mmc-highspeed;
- mmc-ddr-1_8v;
mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
};
&uart2 {
diff --git a/configs/odroid-m1s-rk3566_defconfig b/configs/odroid-m1s-rk3566_defconfig
index 61b6962063..7920ef224d 100644
--- a/configs/odroid-m1s-rk3566_defconfig
+++ b/configs/odroid-m1s-rk3566_defconfig
@@ -70,6 +70,8 @@ CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
--
2.40.1

View File

@@ -1,52 +0,0 @@
From 65a304151817626157e7be4e7e1581cdddca2a02 Mon Sep 17 00:00:00 2001
From: Tim Lunn <tim@feathertop.org>
Date: Sat, 3 Feb 2024 23:42:47 +1100
Subject: [PATCH] Fix ethernet properties
---
arch/arm/dts/rk3566-odroid-m1s.dts | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/rk3566-odroid-m1s.dts b/arch/arm/dts/rk3566-odroid-m1s.dts
index 2dba07ba19..73b545109d 100644
--- a/arch/arm/dts/rk3566-odroid-m1s.dts
+++ b/arch/arm/dts/rk3566-odroid-m1s.dts
@@ -197,10 +197,9 @@
};
&gmac1 {
- assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
- assigned-clock-rates = <0>, <125000000>;
- assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
- clock_in_out = "output";
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
+ clock_in_out = "input";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii";
phy-supply = <&vcc3v3_sys>;
@@ -211,10 +210,9 @@
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&gmac1m1_clkinout>;
- status = "okay";
-
tx_delay = <0x4f>;
rx_delay = <0x2d>;
+ status = "okay";
};
&gpu {
@@ -496,6 +494,9 @@
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
};
};
--
2.40.1

View File

@@ -1,98 +0,0 @@
part start ${devtype} ${devnum} hassos-bootstate mmc_env
${devtype} dev ${devnum}
setenv loadbootstate " \
echo 'loading env...'; \
${devtype} read ${ramdisk_addr_r} ${mmc_env} 0x40; \
env import -c ${ramdisk_addr_r} 0x8000;"
setenv storebootstate " \
echo 'storing env...'; \
env export -c -s 0x8000 ${ramdisk_addr_r} BOOT_ORDER BOOT_A_LEFT BOOT_B_LEFT MACHINE_ID; \
${devtype} write ${ramdisk_addr_r} ${mmc_env} 0x40;"
run loadbootstate
test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B"
test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3
test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3
# Allows ConditionFirstBoot=
test -n "${MACHINE_ID}" || setenv BOOT_CONDITION "systemd.condition-first-boot=true"
# HassOS bootargs
setenv bootargs_hassos "zram.enabled=1 zram.num_devices=3 systemd.machine_id=${MACHINE_ID} fsck.repair=yes ${BOOT_CONDITION}"
# HassOS system A/B
setenv bootargs_a "root=PARTUUID=8d3d53e3-6d49-4c38-8349-aff6859e82fd rootfstype=squashfs ro rootwait"
setenv bootargs_b "root=PARTUUID=a3ec664e-32ce-4665-95ea-7ae90ce9aa20 rootfstype=squashfs ro rootwait"
part number ${devtype} ${devnum} hassos-boot boot_partnum
# Load environment from haos-config.txt
if test -e ${devtype} ${devnum}:${boot_partnum} haos-config.txt; then
fatload ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} haos-config.txt
env import -t ${ramdisk_addr_r} ${filesize}
fi
# Load extraargs
fileenv ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} cmdline.txt cmdline
# Load device tree
setenv fdtfile rk3566-odroid-m1s.dtb
echo "Loading standard device tree ${fdtfile}"
fatload ${devtype} ${devnum}:${boot_partnum} ${fdt_addr_r} ${fdtfile}
fdt addr ${fdt_addr_r}
# load dt overlays
fdt resize 65536
for overlay_file in ${overlays}; do
if fatload ${devtype} ${devnum}:${boot_partnum} ${ramdisk_addr_r} overlays/${overlay_file}.dtbo; then
echo "Applying kernel provided DT overlay ${overlay_file}.dtbo"
fdt apply ${ramdisk_addr_r} || setenv overlay_error "true"
fi
done
if test "${overlay_error}" = "true"; then
echo "Error applying DT overlays, restoring original DT"
fatload ${devtype} ${devnum}:${boot_partnum} ${fdt_addr_r} ${fdtfile}
fi
setenv bootargs
for BOOT_SLOT in "${BOOT_ORDER}"; do
if test "x${bootargs}" != "x"; then
# skip remaining slots
elif test "x${BOOT_SLOT}" = "xA"; then
if test ${BOOT_A_LEFT} -gt 0; then
setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1
echo "Trying to boot slot A, ${BOOT_A_LEFT} attempts remaining. Loading kernel ..."
part number ${devtype} ${devnum} hassos-kernel0 kernel_partnum
if load ${devtype} ${devnum}:${kernel_partnum} ${kernel_addr_r} Image; then
setenv bootargs "${bootargs_hassos} ${bootargs_a} rauc.slot=A ${cmdline}"
fi
fi
elif test "x${BOOT_SLOT}" = "xB"; then
if test ${BOOT_B_LEFT} -gt 0; then
setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1
echo "Trying to boot slot B, ${BOOT_B_LEFT} attempts remaining. Loading kernel ..."
part number ${devtype} ${devnum} hassos-kernel1 kernel_partnum
if load ${devtype} ${devnum}:${kernel_partnum} ${kernel_addr_r} Image; then
setenv bootargs "${bootargs_hassos} ${bootargs_b} rauc.slot=B ${cmdline}"
fi
fi
fi
done
if test -n "${bootargs}"; then
run storebootstate
else
echo "No valid slot found, resetting tries to 3"
setenv BOOT_A_LEFT 3
setenv BOOT_B_LEFT 3
run storebootstate
reset
fi
echo "Starting kernel"
booti ${kernel_addr_r} - ${fdt_addr_r}
echo "Boot failed, resetting..."
reset

View File

@@ -1,4 +1,3 @@
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_THERMAL_GOV_BANG_BANG=y

View File

@@ -1,6 +1 @@
CONFIG_KERNEL_LZ4=y
# CONFIG_KERNEL_GZIP is not set
# CONFIG_S3C2410_WATCHDOG is not set
# CONFIG_PROVE_LOCKING is not set

View File

@@ -0,0 +1,61 @@
From d6b82edb420c7df4fa8bb0924dae2476beb649a2 Mon Sep 17 00:00:00 2001
Message-Id: <d6b82edb420c7df4fa8bb0924dae2476beb649a2.1622398359.git.stefan@agner.ch>
From: "charles.park" <charles.park@hardkernel.com>
Date: Fri, 1 Jun 2018 18:12:01 +0900
Subject: [PATCH] ODROID-XU4: Update hack avoiding the invalid temperature by
TMU broken
Change-Id: I6092834427950a50746535458e99bf7089212044
---
drivers/thermal/thermal_helpers.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/thermal/thermal_helpers.c b/drivers/thermal/thermal_helpers.c
index c94bc824e5d3..2880126c5861 100644
--- a/drivers/thermal/thermal_helpers.c
+++ b/drivers/thermal/thermal_helpers.c
@@ -75,6 +75,10 @@ EXPORT_SYMBOL(get_thermal_instance);
*
* Return: On success returns 0, an error code otherwise
*/
+
+#define CRITICAL_TEMP 120000
+int thermal_zone_data[4] = { 0, };
+
int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
{
int ret = -EINVAL;
@@ -108,6 +112,30 @@ int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp)
*temp = tz->emul_temperature;
}
+ /* save thermal_zone data */
+ if (!ret)
+ thermal_zone_data[tz->id] = *temp;
+ /*
+ * This case is that the thermal sensor is broken.
+ * That's not real temperature. Set the fake temperature value in order to
+ * avoid reaching the ciritical temperature.
+ */
+ if ((thermal_zone_data[tz->id] > CRITICAL_TEMP) && (tz->id != 4)) {
+ int i, broken_sensor = 0, correct_temp = 0;
+ for (i = 0; i < 4; i++) {
+ if ((thermal_zone_data[i] <= CRITICAL_TEMP) &&
+ (correct_temp <= thermal_zone_data[i]))
+ correct_temp = thermal_zone_data[i];
+ if (thermal_zone_data[i] > CRITICAL_TEMP)
+ broken_sensor++;
+ }
+ /*
+ * if all thermal sensor broken then critical temperature data send
+ * for system poweroff.
+ */
+ *temp = (broken_sensor == 4) ? CRITICAL_TEMP : correct_temp;
+ }
+
mutex_unlock(&tz->lock);
exit:
return ret;
--
2.31.1

View File

@@ -1,4 +1,5 @@
From c51639443d3c90127a77f1534e39dd01fac1577f Mon Sep 17 00:00:00 2001
From e7d59e0444170873e945a0675ed1565a65c99e17 Mon Sep 17 00:00:00 2001
Message-Id: <e7d59e0444170873e945a0675ed1565a65c99e17.1676489173.git.stefan@agner.ch>
From: memeka <mihailescu2m@gmail.com>
Date: Fri, 18 Jan 2019 14:36:21 +1030
Subject: [PATCH] ODROID-XU4: regulator: s2mps11: add ethernet power reset in
@@ -16,7 +17,7 @@ Signed-off-by: Marian Mihailescu <mihailescu2m@gmail.com>
1 file changed, 55 insertions(+)
diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index 570b61420f3a..286b606660a4 100644
index ebc67e3ddd4f..51f128076db9 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -1117,6 +1117,57 @@ static const struct regulator_desc s2mpu02_regulators[] = {
@@ -88,3 +89,6 @@ index 570b61420f3a..286b606660a4 100644
out:
kfree(rdata);
--
2.39.1

View File

@@ -0,0 +1,30 @@
From 24252c65cfea76c5724044381bafb587a9fecd6a Mon Sep 17 00:00:00 2001
Message-Id: <24252c65cfea76c5724044381bafb587a9fecd6a.1676446297.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 15 Feb 2023 08:30:41 +0100
Subject: [PATCH] samsung: common: ignore if CROS EC is not supported
If the CROS device class is not compiled in, uclass returns not
supported. Ignore this case as well.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
board/samsung/common/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 16ce5cb892..663d7ca991 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -223,7 +223,7 @@ int board_late_init(void)
char mmcbootdev_str[16];
ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
- if (ret && ret != -ENODEV) {
+ if (ret && ret != -ENODEV && ret != -EPFNOSUPPORT) {
/* Force console on */
gd->flags &= ~GD_FLG_SILENT;
--
2.39.1

View File

@@ -1,4 +1,5 @@
From e780a5f405a02e3102c471415f7b0ad73a5cc036 Mon Sep 17 00:00:00 2001
From 86f6a398d2c080f92d51048ededf45efbe3a96d4 Mon Sep 17 00:00:00 2001
Message-Id: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 11:20:48 +0100
Subject: [PATCH] arm64: dts: meson: g12b: add power button support
@@ -9,15 +10,15 @@ button press is triggered.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 11 +++++++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index 9e12a34b2840..c27eae6488ce 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -38,6 +38,17 @@ fan: gpio-fan {
#cooling-cells = <2>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index fd3fa82e4c33..06bdba57b04c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -39,6 +39,17 @@ emmc_pwrseq: emmc-pwrseq {
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
+ gpio-keys-polled {
@@ -34,3 +35,6 @@ index 9e12a34b2840..c27eae6488ce 100644
leds {
compatible = "gpio-leds";
--
2.39.1

View File

@@ -1,4 +1,7 @@
From cff7ba94733d9103487d87a6474e2ab026bd718c Mon Sep 17 00:00:00 2001
From e269c47ef68371dbed1ff5919a67fcc385d8c6da Mon Sep 17 00:00:00 2001
Message-Id: <e269c47ef68371dbed1ff5919a67fcc385d8c6da.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 11:38:54 +0100
Subject: [PATCH] arm64: dts: meson: g12b: add GPIO fan support
@@ -9,15 +12,15 @@ cannot be modulated.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 11 +++++++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index c27eae6488ce..db8a2dfaf0b3 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -49,6 +49,17 @@ power-button {
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 06bdba57b04c..bcf6d8eacd6e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -39,6 +39,17 @@ emmc_pwrseq: emmc-pwrseq {
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
+ /*
@@ -31,6 +34,9 @@ index c27eae6488ce..db8a2dfaf0b3 100644
+ status = "okay";
+ };
+
leds {
compatible = "gpio-leds";
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 8d781fc504780a3aa8ef751724e3749c2bfda7a9 Mon Sep 17 00:00:00 2001
From 8c3e65cf09d62797a2fe50234f30f33f6e4eda44 Mon Sep 17 00:00:00 2001
Message-Id: <8c3e65cf09d62797a2fe50234f30f33f6e4eda44.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 11 Jan 2021 15:53:55 +0100
Subject: [PATCH] arm64: dts: meson: g12b: odroid-n2: add fan as cooling device
@@ -13,14 +16,14 @@ downstream kernel.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
.../boot/dts/amlogic/meson-g12b-odroid.dtsi | 38 +++++++++++++++++++
.../dts/amlogic/meson-g12b-odroid-n2.dtsi | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index db8a2dfaf0b3..843e66332369 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
@@ -245,6 +245,44 @@ &clkc_audio {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index bcf6d8eacd6e..6dcf990e0efc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -390,6 +390,44 @@ &clkc_audio {
status = "okay";
};
@@ -65,3 +68,6 @@ index db8a2dfaf0b3..843e66332369 100644
&cpu0 {
cpu-supply = <&vddcpu_b>;
operating-points-v2 = <&cpu_opp_table_0>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 01ac730fa92a030690a7701c9b8781bc4ef7bcae Mon Sep 17 00:00:00 2001
From 433c5a06b1195e2e689f8d260ec471caca2fa1b6 Mon Sep 17 00:00:00 2001
Message-Id: <433c5a06b1195e2e689f8d260ec471caca2fa1b6.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Fri, 27 Mar 2020 17:05:22 +0900
Subject: [PATCH] arm64: dts: meson: add uart_A node
@@ -8,23 +11,23 @@ available as UART by default.
Signed-off-by: Stefan Agner <stefan@agner.ch>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi | 7 +++++++
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
index 843e66332369..61caadd679e2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 6dcf990e0efc..7eaaced7893b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -12,6 +12,7 @@
/ {
aliases {
serial0 = &uart_AO;
+ serial1 = &uart_A;
ethernet0 = &ethmac;
rtc0 = &rtc;
rtc1 = &vrtc;
};
@@ -496,6 +497,12 @@ &uart_AO {
pinctrl-names = "default";
@@ -730,6 +731,12 @@ &toddr_c {
status = "okay";
};
+&uart_A {
@@ -33,6 +36,9 @@ index 843e66332369..61caadd679e2 100644
+ pinctrl-names = "default";
+};
+
&usb {
&uart_AO {
status = "okay";
};
pinctrl-0 = <&uart_ao_a_pins>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From f5676219e12b48a0f591e911797304fae05ca78c Mon Sep 17 00:00:00 2001
From 00129576fb656015b66958f4d7370ee7e2d990e2 Mon Sep 17 00:00:00 2001
Message-Id: <00129576fb656015b66958f4d7370ee7e2d990e2.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Thu, 29 Apr 2021 21:32:43 +0200
Subject: [PATCH] arm64: dts: meson: add i2c2 node to ODROID N2/N2+
@@ -13,11 +16,11 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
index 91c9769fda20..ececc6b17639 100644
index 7eaaced7893b..8d183253389c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi
@@ -248,6 +248,12 @@ usb-hub-hog {
};
@@ -588,6 +588,12 @@ &ir {
linux,rc-map-name = "rc-odroid";
};
+&i2c2 {
@@ -29,3 +32,6 @@ index 91c9769fda20..ececc6b17639 100644
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 1c9c3ca476adf09884295e9f8298288ea497e5ac Mon Sep 17 00:00:00 2001
From d6b1ddfb5816b887470452920d273661e361632d Mon Sep 17 00:00:00 2001
Message-Id: <d6b1ddfb5816b887470452920d273661e361632d.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Tue, 1 Mar 2022 21:51:50 +0100
Subject: [PATCH] ODROID-C4: arm64/dts: add uart_A node
@@ -8,7 +11,7 @@ Subject: [PATCH] ODROID-C4: arm64/dts: add uart_A node
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index 1db2327bbd13..e67869fbb460 100644
index ddb1b345397f..49b88c1e11cd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -10,8 +10,9 @@
@@ -22,7 +25,7 @@ index 1db2327bbd13..e67869fbb460 100644
};
chosen {
@@ -449,6 +450,12 @@ &tohdmitx {
@@ -450,6 +451,12 @@ &tohdmitx {
status = "okay";
};
@@ -35,3 +38,6 @@ index 1db2327bbd13..e67869fbb460 100644
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 9cd343da01d9b69ad33444105208949775c909b4 Mon Sep 17 00:00:00 2001
From a78a968b4a51a32f44c170c591a46b27326b97f2 Mon Sep 17 00:00:00 2001
Message-Id: <a78a968b4a51a32f44c170c591a46b27326b97f2.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Tue, 1 Mar 2022 21:53:32 +0100
Subject: [PATCH] ODROID-C4: arm64/dts: add i2c2, i2c3 node
@@ -8,7 +11,7 @@ Subject: [PATCH] ODROID-C4: arm64/dts: add i2c2, i2c3 node
1 file changed, 53 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
index e67869fbb460..90d2eea7fe24 100644
index 49b88c1e11cd..b8d88310ae3a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
@@ -11,6 +11,8 @@
@@ -20,7 +23,7 @@ index e67869fbb460..90d2eea7fe24 100644
serial0 = &uart_AO;
serial1 = &uart_A;
};
@@ -386,6 +388,57 @@ &ir {
@@ -387,6 +389,57 @@ &ir {
pinctrl-names = "default";
};
@@ -78,3 +81,6 @@ index e67869fbb460..90d2eea7fe24 100644
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 299d45dd82df026c0164e170d476b56eada4aa77 Mon Sep 17 00:00:00 2001
From 8263e17f170296c28d3a781d5b05e59778fe4a27 Mon Sep 17 00:00:00 2001
Message-Id: <8263e17f170296c28d3a781d5b05e59778fe4a27.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 15 Feb 2023 20:15:07 +0100
Subject: [PATCH] arm64: dts: amlogic: add uartA/uartC to ODROID-C2
@@ -9,7 +12,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index e6d2de7c45a9..c6a38d890db5 100644
index 201596247fd9..b2cb12fb46fd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -17,6 +17,8 @@ / {
@@ -21,7 +24,7 @@ index e6d2de7c45a9..c6a38d890db5 100644
ethernet0 = &ethmac;
};
@@ -383,6 +385,18 @@ &uart_AO {
@@ -399,6 +401,18 @@ &uart_AO {
pinctrl-names = "default";
};
@@ -40,3 +43,6 @@ index e6d2de7c45a9..c6a38d890db5 100644
&usb0_phy {
status = "disabled";
phy-supply = <&usb_otg_pwr>;
--
2.39.1

View File

@@ -1,4 +1,7 @@
From 61a378b42a2f61589cc62ff85334dd607014cb6d Mon Sep 17 00:00:00 2001
From ceef8d62bcf0c2c7b3e96831e85a872009657cf0 Mon Sep 17 00:00:00 2001
Message-Id: <ceef8d62bcf0c2c7b3e96831e85a872009657cf0.1676488652.git.stefan@agner.ch>
In-Reply-To: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
References: <86f6a398d2c080f92d51048ededf45efbe3a96d4.1676488652.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 15 Feb 2023 20:16:29 +0100
Subject: [PATCH] arm64: dts: amlogic: meson-gx: add missing pins for I2C A/B
@@ -9,7 +12,7 @@ Signed-off-by: Stefan Agner <stefan@agner.ch>
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 12ef6e81c8bd..90ae81493de2 100644
index 7c029f552a23..b3c22861b022 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -333,6 +333,8 @@ &hwrng {
@@ -30,3 +33,6 @@ index 12ef6e81c8bd..90ae81493de2 100644
};
&i2c_C {
--
2.39.1

View File

@@ -1,4 +1,5 @@
From 11f015e13ef0442b6d2bb734954291abde415f73 Mon Sep 17 00:00:00 2001
From 5d2feca5947f84259bae41730ce54231578b37be Mon Sep 17 00:00:00 2001
Message-Id: <5d2feca5947f84259bae41730ce54231578b37be.1645627508.git.stefan@agner.ch>
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Mon, 2 Sep 2019 15:42:04 +0200
Subject: [PATCH] HACK: mmc: meson-gx: limit to 24MHz
@@ -22,5 +23,5 @@ index fcf4f03d1e..6ded4b619b 100644
cfg->name = dev->name;
--
2.43.0
2.35.1

View File

@@ -6,6 +6,8 @@ CONFIG_PREEMPT=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_MEMCG=y
@@ -158,9 +160,10 @@ CONFIG_PCI_IOV=y
CONFIG_HOTPLUG_PCI=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCIE_DW_PLAT_HOST=y
CONFIG_PCI_MESON=y
# CONFIG_PCI_MESON is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_SIMPLE_PM_BUS=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAW_NAND=y
@@ -259,6 +262,7 @@ CONFIG_RTL8192CU=m
CONFIG_WL18XX=m
CONFIG_WLCORE_SDIO=m
# CONFIG_XEN_NETDEV_FRONTEND is not set
CONFIG_INPUT_POLLDEV=m
CONFIG_INPUT_MATRIXKMAP=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
@@ -290,11 +294,11 @@ CONFIG_IPMI_HANDLER=m
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_CAVIUM=m
CONFIG_HW_RANDOM_OPTEE=m
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_GPIO=m
@@ -302,9 +306,11 @@ CONFIG_I2C_MESON=y
CONFIG_I2C_RK3X=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=m
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_MESON_SPICC=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_PL022=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=m
CONFIG_PINCTRL=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
@@ -357,7 +363,7 @@ CONFIG_MFD_BD9571MWV=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_HI6421_PMIC=y
CONFIG_MFD_MAX77620=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_RK808=y
CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_ROHM_BD718XX=y
CONFIG_MFD_KHADAS_MCU=y
@@ -443,14 +449,21 @@ CONFIG_USB_GSPCA_VICAM=m
CONFIG_USB_GSPCA_XIRLINK_CIT=m
CONFIG_USB_GSPCA_ZC3XX=m
CONFIG_USB_PWC=m
CONFIG_VIDEO_CPIA2=m
CONFIG_USB_ZR364XX=m
CONFIG_USB_STKWEBCAM=m
CONFIG_USB_S2255=m
CONFIG_VIDEO_USBTV=m
CONFIG_VIDEO_PVRUSB2=m
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_AU0828=m
CONFIG_VIDEO_CX231XX=m
CONFIG_VIDEO_CX231XX_ALSA=m
CONFIG_VIDEO_CX231XX_DVB=m
CONFIG_VIDEO_TM6000=m
CONFIG_VIDEO_TM6000_ALSA=m
CONFIG_VIDEO_TM6000_DVB=m
CONFIG_VIDEO_EM28XX=m
CONFIG_VIDEO_EM28XX_V4L2=m
CONFIG_VIDEO_EM28XX_ALSA=m
@@ -471,7 +484,6 @@ CONFIG_DRM_PANFROST=m
CONFIG_FB=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=m
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_DYNAMIC_MINORS=y
@@ -482,15 +494,16 @@ CONFIG_SND_SOC=y
CONFIG_SND_MESON_AXG_SOUND_CARD=y
CONFIG_SND_MESON_GX_SOUND_CARD=y
CONFIG_SND_SOC_AK4613=m
CONFIG_SND_SOC_DMIC=y
CONFIG_SND_SOC_DMIC=m
CONFIG_SND_SOC_ES7134=m
CONFIG_SND_SOC_ES7241=m
CONFIG_SND_SOC_MAX98357A=y
CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
CONFIG_SND_SOC_SPDIF=y
CONFIG_SND_SOC_SPDIF=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD=m
CONFIG_HIDRAW=y
CONFIG_I2C_HID=m
CONFIG_USB=y
CONFIG_USB_OTG=y
CONFIG_USB_XHCI_HCD=y
@@ -578,9 +591,12 @@ CONFIG_VIRTIO_MMIO=y
# CONFIG_XEN_GNTDEV is not set
# CONFIG_XEN_GRANT_DEV_ALLOC is not set
CONFIG_STAGING=y
CONFIG_STAGING_GASKET_FRAMEWORK=m
CONFIG_STAGING_APEX_DRIVER=m
CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_CS2000_CP=y
CONFIG_COMMON_CLK_S2MPS11=y
CONFIG_CLK_QORIQ=y
CONFIG_COMMON_CLK_XGENE=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_HWSPINLOCK=y
@@ -597,8 +613,11 @@ CONFIG_SENSORS_ISL29018=m
CONFIG_MPL3115=m
CONFIG_PWM=y
CONFIG_PWM_MESON=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_FSL_IMX8MQ_USB=y
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_PHY_SAMSUNG_USB2=y
CONFIG_MESON_EFUSE=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_EXT3_FS=m
@@ -611,7 +630,7 @@ CONFIG_F2FS_FS=m
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=m
CONFIG_CUSE=m
CONFIG_OVERLAY_FS=y

View File

@@ -14,7 +14,8 @@ function hassos_pre_image() {
# SPL
create_spl_image
dd if="${BINARIES_DIR}/u-boot-rockchip.bin" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
dd if="${BINARIES_DIR}/u-boot.itb" of="${SPL_IMG}" conv=notrunc bs=512 seek=16384
}

View File

@@ -1,4 +1,3 @@
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_THERMAL_GOV_BANG_BANG=y
@@ -9,6 +8,7 @@ CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
# CONFIG_RTC_DRV_RK808 is not set
CONFIG_REGULATOR_RK808=y
CONFIG_REGULATOR_RK860X=y
# CONFIG_DW_WATCHDOG is not set

View File

@@ -0,0 +1,662 @@
From b7957b94fe2649a1e8032b10ea293b106cda4532 Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Thu, 6 Jul 2023 10:04:39 +0000
Subject: [PATCH 1/2] drivers: regulator: Supports rk860x
---
drivers/regulator/Kconfig | 11 +
drivers/regulator/Makefile | 1 +
drivers/regulator/rk860x-regulator.c | 607 +++++++++++++++++++++++++++
3 files changed, 619 insertions(+)
create mode 100644 drivers/regulator/rk860x-regulator.c
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 070e4403c..6a3c00c24 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -1047,6 +1047,17 @@ config REGULATOR_RK808
through regulator interface. The device supports multiple DCDC/LDO
outputs which can be controlled by i2c communication.
+config REGULATOR_RK860X
+ tristate "Rockchip RK860X Regulator"
+ depends on I2C
+ select REGMAP_I2C
+ help
+ This driver supports Rockchip RK860X Digitally Programmable
+ Buck Regulator. The RK860X is a step-down switching voltage
+ regulator that delivers a digitally programmable output from an
+ input voltage supply of 2.5V to 5.5V. The output voltage is
+ programmed through an I2C interface.
+
config REGULATOR_RN5T618
tristate "Ricoh RN5T567/618 voltage regulators"
depends on MFD_RN5T618
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 5962307e1..76a156e98 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -125,6 +125,7 @@ obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
obj-$(CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY) += rpi-panel-attiny-regulator.o
obj-$(CONFIG_REGULATOR_RC5T583) += rc5t583-regulator.o
obj-$(CONFIG_REGULATOR_RK808) += rk808-regulator.o
+obj-$(CONFIG_REGULATOR_RK860X) += rk860x-regulator.o
obj-$(CONFIG_REGULATOR_RN5T618) += rn5t618-regulator.o
obj-$(CONFIG_REGULATOR_ROHM) += rohm-regulator.o
obj-$(CONFIG_REGULATOR_RT4801) += rt4801-regulator.o
diff --git a/drivers/regulator/rk860x-regulator.c b/drivers/regulator/rk860x-regulator.c
new file mode 100644
index 000000000..4596761bd
--- /dev/null
+++ b/drivers/regulator/rk860x-regulator.c
@@ -0,0 +1,607 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/param.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/slab.h>
+
+/* Voltage setting */
+
+#define RK860X_VSEL0_A 0x00
+#define RK860X_VSEL1_A 0x01
+#define RK860X_VSEL0_B 0x06
+#define RK860X_VSEL1_B 0x07
+#define RK860X_MAX_SET 0x08
+
+/* Control register */
+#define RK860X_CONTROL 0x02
+/* IC Type */
+#define RK860X_ID1 0x03
+/* IC mask version */
+#define RK860X_ID2 0x04
+/* Monitor register */
+#define RK860X_MONITOR 0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN BIT(7)
+#define VSEL_MODE BIT(6)
+#define VSEL_A_NSEL_MASK 0x3F
+#define VSEL_B_NSEL_MASK 0xff
+
+/* Chip ID */
+#define DIE_ID 0x0f
+#define DIE_REV 0x0f
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG BIT(7)
+#define CTL_SLEW_MASK (0x7 << 4)
+#define CTL_SLEW_SHIFT 4
+#define CTL_RESET BIT(2)
+
+#define RK860X_NVOLTAGES_64 64
+#define RK860X_NVOLTAGES_160 160
+
+/* IC Type */
+enum {
+ RK860X_CHIP_ID_00 = 0,
+ RK860X_CHIP_ID_01,
+ RK860X_CHIP_ID_02,
+ RK860X_CHIP_ID_03,
+};
+
+struct rk860x_platform_data {
+ struct regulator_init_data *regulator;
+ unsigned int slew_rate;
+ /* Sleep VSEL ID */
+ unsigned int sleep_vsel_id;
+ int limit_volt;
+ struct gpio_desc *vsel_gpio;
+};
+
+struct rk860x_device_info {
+ struct regmap *regmap;
+ struct device *dev;
+ struct regulator_desc desc;
+ struct regulator_dev *rdev;
+ struct regulator_init_data *regulator;
+ /* IC Type and Rev */
+ int chip_id;
+ /* Voltage setting register */
+ unsigned int vol_reg;
+ unsigned int sleep_reg;
+ unsigned int en_reg;
+ unsigned int sleep_en_reg;
+ unsigned int mode_reg;
+ unsigned int vol_mask;
+ unsigned int mode_mask;
+ unsigned int slew_reg;
+ unsigned int slew_mask;
+ unsigned int slew_shift;
+ /* Voltage range and step(linear) */
+ unsigned int vsel_min;
+ unsigned int vsel_step;
+ unsigned int n_voltages;
+ /* Voltage slew rate limiting */
+ unsigned int slew_rate;
+ struct gpio_desc *vsel_gpio;
+ unsigned int sleep_vsel_id;
+};
+
+static unsigned int rk860x_map_mode(unsigned int mode)
+{
+ return mode == REGULATOR_MODE_FAST ?
+ REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
+}
+
+static int rk860x_get_voltage(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret;
+
+ ret = regmap_read(di->regmap, RK860X_MAX_SET, &val);
+ if (ret < 0)
+ return ret;
+ ret = regulator_get_voltage_sel_regmap(rdev);
+ if (ret > val)
+ return val;
+
+ return ret;
+}
+
+static int rk860x_set_suspend_voltage(struct regulator_dev *rdev, int uV)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = regulator_map_voltage_linear(rdev, uV, uV);
+ if (ret < 0)
+ return ret;
+ ret = regmap_update_bits(di->regmap, di->sleep_reg,
+ di->vol_mask, ret);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static int rk860x_set_suspend_enable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ return regmap_update_bits(di->regmap, di->sleep_en_reg,
+ VSEL_BUCK_EN, VSEL_BUCK_EN);
+}
+
+static int rk860x_set_suspend_disable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ return regmap_update_bits(di->regmap, di->sleep_en_reg,
+ VSEL_BUCK_EN, 0);
+}
+
+static int rk860x_resume(struct regulator_dev *rdev)
+{
+ int ret;
+
+ if (!rdev->constraints->state_mem.changeable)
+ return 0;
+
+ ret = rk860x_set_suspend_enable(rdev);
+ if (ret)
+ return ret;
+
+ return regulator_suspend_enable(rdev, PM_SUSPEND_MEM);
+}
+
+static int rk860x_set_enable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ if (di->vsel_gpio) {
+ gpiod_set_raw_value(di->vsel_gpio, !di->sleep_vsel_id);
+ return 0;
+ }
+
+ return regmap_update_bits(di->regmap, di->en_reg,
+ VSEL_BUCK_EN, VSEL_BUCK_EN);
+}
+
+static int rk860x_set_disable(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ if (di->vsel_gpio) {
+ gpiod_set_raw_value(di->vsel_gpio, di->sleep_vsel_id);
+ return 0;
+ }
+
+ return regmap_update_bits(di->regmap, di->en_reg,
+ VSEL_BUCK_EN, 0);
+}
+
+static int rk860x_is_enabled(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret = 0;
+
+ if (di->vsel_gpio) {
+ if (di->sleep_vsel_id)
+ return !gpiod_get_raw_value(di->vsel_gpio);
+ else
+ return gpiod_get_raw_value(di->vsel_gpio);
+ }
+
+ ret = regmap_read(di->regmap, di->en_reg, &val);
+ if (ret < 0)
+ return ret;
+ if (val & VSEL_BUCK_EN)
+ return 1;
+ else
+ return 0;
+}
+
+static int rk860x_set_mode(struct regulator_dev *rdev, unsigned int mode)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+
+ switch (mode) {
+ case REGULATOR_MODE_FAST:
+ regmap_update_bits(di->regmap, di->mode_reg,
+ di->mode_mask, di->mode_mask);
+ break;
+ case REGULATOR_MODE_NORMAL:
+ regmap_update_bits(di->regmap, di->mode_reg, di->mode_mask, 0);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static unsigned int rk860x_get_mode(struct regulator_dev *rdev)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ unsigned int val;
+ int ret = 0;
+
+ ret = regmap_read(di->regmap, di->mode_reg, &val);
+ if (ret < 0)
+ return ret;
+ if (val & di->mode_mask)
+ return REGULATOR_MODE_FAST;
+ else
+ return REGULATOR_MODE_NORMAL;
+}
+
+static const int slew_rates[] = {
+ 64000,
+ 32000,
+ 16000,
+ 8000,
+ 4000,
+ 2000,
+ 1000,
+ 500,
+};
+
+static int rk860x_set_ramp(struct regulator_dev *rdev, int ramp)
+{
+ struct rk860x_device_info *di = rdev_get_drvdata(rdev);
+ int regval = -1, i;
+ const int *slew_rate_t;
+ int slew_rate_n;
+
+ slew_rate_t = slew_rates;
+ slew_rate_n = ARRAY_SIZE(slew_rates);
+
+ for (i = 0; i < slew_rate_n; i++) {
+ if (ramp <= slew_rate_t[i])
+ regval = i;
+ else
+ break;
+ }
+
+ if (regval < 0) {
+ dev_err(di->dev, "unsupported ramp value %d\n", ramp);
+ return -EINVAL;
+ }
+
+ return regmap_update_bits(di->regmap, di->slew_reg,
+ di->slew_mask, regval << di->slew_shift);
+}
+
+static const struct regulator_ops rk860x_regulator_ops = {
+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
+ .get_voltage_sel = rk860x_get_voltage,
+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
+ .map_voltage = regulator_map_voltage_linear,
+ .list_voltage = regulator_list_voltage_linear,
+ .set_suspend_voltage = rk860x_set_suspend_voltage,
+ .enable = rk860x_set_enable,
+ .disable = rk860x_set_disable,
+ .is_enabled = rk860x_is_enabled,
+ .set_mode = rk860x_set_mode,
+ .get_mode = rk860x_get_mode,
+ .set_ramp_delay = rk860x_set_ramp,
+ .set_suspend_enable = rk860x_set_suspend_enable,
+ .set_suspend_disable = rk860x_set_suspend_disable,
+ .resume = rk860x_resume,
+};
+
+/* For 00,01 options:
+ * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
+ * For 02,03 options:
+ * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
+ */
+static int rk860x_device_setup(struct rk860x_device_info *di,
+ struct rk860x_platform_data *pdata)
+{
+ int ret = 0;
+ u32 val = 0;
+
+ switch (di->chip_id) {
+ case RK860X_CHIP_ID_00:
+ case RK860X_CHIP_ID_01:
+ di->vsel_min = 712500;
+ di->vsel_step = 12500;
+ di->n_voltages = RK860X_NVOLTAGES_64;
+ di->vol_mask = VSEL_A_NSEL_MASK;
+ if (di->sleep_vsel_id) {
+ di->sleep_reg = RK860X_VSEL1_A;
+ di->vol_reg = RK860X_VSEL0_A;
+ di->mode_reg = RK860X_VSEL0_A;
+ di->en_reg = RK860X_VSEL0_A;
+ di->sleep_en_reg = RK860X_VSEL1_A;
+ } else {
+ di->sleep_reg = RK860X_VSEL0_A;
+ di->vol_reg = RK860X_VSEL1_A;
+ di->mode_reg = RK860X_VSEL1_A;
+ di->en_reg = RK860X_VSEL1_A;
+ di->sleep_en_reg = RK860X_VSEL0_A;
+ }
+ break;
+ case RK860X_CHIP_ID_02:
+ case RK860X_CHIP_ID_03:
+ di->vsel_min = 500000;
+ di->vsel_step = 6250;
+ di->n_voltages = RK860X_NVOLTAGES_160;
+ di->vol_mask = VSEL_B_NSEL_MASK;
+ if (di->sleep_vsel_id) {
+ di->sleep_reg = RK860X_VSEL1_B;
+ di->vol_reg = RK860X_VSEL0_B;
+ di->mode_reg = RK860X_VSEL0_A;
+ di->en_reg = RK860X_VSEL0_A;
+ di->sleep_en_reg = RK860X_VSEL1_A;
+ } else {
+ di->sleep_reg = RK860X_VSEL0_B;
+ di->vol_reg = RK860X_VSEL1_B;
+ di->mode_reg = RK860X_VSEL1_A;
+ di->en_reg = RK860X_VSEL1_A;
+ di->sleep_en_reg = RK860X_VSEL0_A;
+ }
+ break;
+ default:
+ dev_err(di->dev, "Chip ID %d not supported!\n", di->chip_id);
+ return -EINVAL;
+ }
+
+ di->mode_mask = VSEL_MODE;
+ di->slew_reg = RK860X_CONTROL;
+ di->slew_mask = CTL_SLEW_MASK;
+ di->slew_shift = CTL_SLEW_SHIFT;
+
+ if (pdata->limit_volt) {
+ if (pdata->limit_volt < di->vsel_min ||
+ pdata->limit_volt > 1500000)
+ pdata->limit_volt = 1500000;
+ val = (pdata->limit_volt - di->vsel_min) / di->vsel_step;
+ ret = regmap_write(di->regmap, RK860X_MAX_SET, val);
+ if (ret < 0) {
+ dev_err(di->dev, "Failed to set limit voltage!\n");
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
+static int rk860x_regulator_register(struct rk860x_device_info *di,
+ struct regulator_config *config)
+{
+ struct regulator_desc *rdesc = &di->desc;
+
+ rdesc->name = "rk860x-reg";
+ rdesc->supply_name = "vin";
+ rdesc->ops = &rk860x_regulator_ops;
+ rdesc->type = REGULATOR_VOLTAGE;
+ rdesc->n_voltages = di->n_voltages;
+ rdesc->enable_reg = di->en_reg;
+ rdesc->enable_mask = VSEL_BUCK_EN;
+ rdesc->min_uV = di->vsel_min;
+ rdesc->uV_step = di->vsel_step;
+ rdesc->vsel_reg = di->vol_reg;
+ rdesc->vsel_mask = di->vol_mask;
+ rdesc->owner = THIS_MODULE;
+ rdesc->enable_time = 400;
+
+ di->rdev = devm_regulator_register(di->dev, &di->desc, config);
+ return PTR_ERR_OR_ZERO(di->rdev);
+}
+
+static const struct regmap_config rk860x_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+};
+
+static struct rk860x_platform_data *
+rk860x_parse_dt(struct device *dev, struct device_node *np,
+ const struct regulator_desc *desc)
+{
+ struct rk860x_platform_data *pdata;
+ int ret, flag, limit_volt;
+ u32 tmp;
+
+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return NULL;
+
+ pdata->regulator = of_get_regulator_init_data(dev, np, desc);
+ pdata->regulator->constraints.initial_state = PM_SUSPEND_MEM;
+
+ if (!(of_property_read_u32(np, "limit-microvolt", &limit_volt)))
+ pdata->limit_volt = limit_volt;
+
+ ret = of_property_read_u32(np, "rockchip,suspend-voltage-selector",
+ &tmp);
+ if (!ret)
+ pdata->sleep_vsel_id = tmp;
+
+ if (pdata->sleep_vsel_id)
+ flag = GPIOD_OUT_LOW;
+ else
+ flag = GPIOD_OUT_HIGH;
+
+ pdata->vsel_gpio = devm_gpiod_get_index_optional(dev, "vsel", 0, flag);
+ if (IS_ERR(pdata->vsel_gpio)) {
+ ret = PTR_ERR(pdata->vsel_gpio);
+ dev_err(dev, "failed to get vesl gpio (%d)\n", ret);
+ pdata->vsel_gpio = NULL;
+ }
+
+ return pdata;
+}
+
+static const struct of_device_id rk860x_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk8600",
+ .data = (void *)RK860X_CHIP_ID_00
+ },
+ {
+ .compatible = "rockchip,rk8601",
+ .data = (void *)RK860X_CHIP_ID_01
+ },
+ {
+ .compatible = "rockchip,rk8602",
+ .data = (void *)RK860X_CHIP_ID_02
+ },
+ {
+ .compatible = "rockchip,rk8603",
+ .data = (void *)RK860X_CHIP_ID_03
+ },
+
+ { }
+};
+MODULE_DEVICE_TABLE(of, rk860x_dt_ids);
+
+static int rk860x_regulator_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device_node *np = client->dev.of_node;
+ struct rk860x_device_info *di;
+ struct rk860x_platform_data *pdata;
+ struct regulator_config config = { };
+ unsigned int val;
+ int ret;
+
+ di = devm_kzalloc(&client->dev, sizeof(*di), GFP_KERNEL);
+ if (!di)
+ return -ENOMEM;
+
+ di->desc.of_map_mode = rk860x_map_mode;
+
+ pdata = dev_get_platdata(&client->dev);
+ if (!pdata)
+ pdata = rk860x_parse_dt(&client->dev, np, &di->desc);
+
+ if (!pdata || !pdata->regulator) {
+ dev_err(&client->dev, "Platform data not found!\n");
+ return -ENODEV;
+ }
+
+ di->vsel_gpio = pdata->vsel_gpio;
+ di->sleep_vsel_id = pdata->sleep_vsel_id;
+
+ di->regulator = pdata->regulator;
+ if (client->dev.of_node) {
+ di->chip_id =
+ (unsigned long)of_device_get_match_data(&client->dev);
+ } else {
+ /* if no ramp constraint set, get the pdata ramp_delay */
+ if (!di->regulator->constraints.ramp_delay) {
+ int slew_idx = (pdata->slew_rate & 0x7)
+ ? pdata->slew_rate : 0;
+
+ di->regulator->constraints.ramp_delay =
+ slew_rates[slew_idx];
+ }
+ di->chip_id = id->driver_data;
+ }
+
+ di->regmap = devm_regmap_init_i2c(client, &rk860x_regmap_config);
+ if (IS_ERR(di->regmap)) {
+ dev_err(&client->dev, "Failed to allocate regmap!\n");
+ return PTR_ERR(di->regmap);
+ }
+ di->dev = &client->dev;
+ i2c_set_clientdata(client, di);
+ /* Get chip ID */
+ ret = regmap_read(di->regmap, RK860X_ID1, &val);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to get chip ID!\n");
+ return ret;
+ }
+
+ switch (di->chip_id) {
+ case RK860X_CHIP_ID_00:
+ case RK860X_CHIP_ID_01:
+ if ((val & DIE_ID) != 0x8) {
+ dev_err(&client->dev, "Failed to match chip ID!\n");
+ return -EINVAL;
+ }
+ break;
+ case RK860X_CHIP_ID_02:
+ case RK860X_CHIP_ID_03:
+ if ((val & DIE_ID) != 0xa) {
+ dev_err(&client->dev, "Failed to match chip ID!\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Device init */
+ ret = rk860x_device_setup(di, pdata);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to setup device!\n");
+ return ret;
+ }
+ /* Register regulator */
+ config.dev = di->dev;
+ config.init_data = di->regulator;
+ config.regmap = di->regmap;
+ config.driver_data = di;
+ config.of_node = np;
+
+ ret = rk860x_regulator_register(di, &config);
+ if (ret < 0)
+ dev_err(&client->dev, "Failed to register regulator!\n");
+
+ return ret;
+}
+
+static void rk860x_regulator_shutdown(struct i2c_client *client)
+{
+ struct rk860x_device_info *di;
+ int ret;
+
+ di = i2c_get_clientdata(client);
+
+ dev_info(di->dev, "rk860..... reset\n");
+
+ ret = regmap_update_bits(di->regmap, di->slew_reg,
+ CTL_RESET, CTL_RESET);
+
+ if (ret < 0)
+ dev_err(di->dev, "force rk860x_reset error! ret=%d\n", ret);
+ else
+ dev_info(di->dev, "force rk860x_reset ok!\n");
+}
+
+static const struct i2c_device_id rk860x_id[] = {
+ { .name = "rk8600", .driver_data = RK860X_CHIP_ID_00 },
+ { .name = "rk8601", .driver_data = RK860X_CHIP_ID_01 },
+ { .name = "rk8602", .driver_data = RK860X_CHIP_ID_02 },
+ { .name = "rk8603", .driver_data = RK860X_CHIP_ID_03 },
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, rk860x_id);
+
+static struct i2c_driver rk860x_regulator_driver = {
+ .driver = {
+ .name = "rk860-regulator",
+ .of_match_table = of_match_ptr(rk860x_dt_ids),
+ },
+ .probe = rk860x_regulator_probe,
+ .shutdown = rk860x_regulator_shutdown,
+ .id_table = rk860x_id,
+};
+
+module_i2c_driver(rk860x_regulator_driver);
+
+MODULE_AUTHOR("Elaine Zhang <zhangqing@rock-chips.com>");
+MODULE_DESCRIPTION("rk860x regulator driver");
+MODULE_LICENSE("GPL v2");
--
2.25.1

View File

@@ -1,37 +1,29 @@
From 9b1367f47f2e790f155d4aab39878233eedf7b22 Mon Sep 17 00:00:00 2001
From 2a76efca88402072b61e4cb83d6707400da8dfae Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Thu, 6 Jul 2023 10:05:04 +0000
Subject: [PATCH] arm64: dts: rockchip: Add NabuCasa Green board
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Subject: [PATCH 2/2] arm64: dts: rockchip: Add NabuCasa Green board
[Replaced custom rk860x driver with upstream fan53555]
Signed-off-by: Jan Čermák <sairon@sairon.cz>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3566-ha-green.dts | 684 ++++++++++++++++++
2 files changed, 685 insertions(+)
.../boot/dts/rockchip/rk3566-ha-green.dts | 685 ++++++++++++++++++
2 files changed, 686 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index e7728007fd1b..475becd793ac 100644
index 8c15593c0..997051975 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353ps.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
@@ -72,3 +72,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ha-green.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
new file mode 100644
index 000000000000..b5e4a67b3fc7
index 000000000..d0830df48
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -0,0 +1,684 @@
@@ -0,0 +1,685 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Seeed Co., Ltd.
@@ -236,15 +228,16 @@ index 000000000000..b5e4a67b3fc7
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@41 {
+ compatible = "rockchip,rk8600";
+ vdd_cpu: rk8601@41 {
+ compatible = "rockchip,rk8601";
+ reg = <0x41>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "rk860x-reg";
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ rockchip,suspend-voltage-selector = <1>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
@@ -716,3 +709,6 @@ index 000000000000..b5e4a67b3fc7
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.25.1

View File

@@ -1,18 +1,18 @@
From be773999495258994d1df04448a4de43d58db9c4 Mon Sep 17 00:00:00 2001
From e86272fa8063a047a55a9548400a95742f1c2d2a Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Wed, 12 Jul 2023 02:33:03 +0000
Subject: [PATCH] drivers: mfd: rk808: set PWRON_LP_OFF_TIME 12s
---
drivers/mfd/rk8xx-core.c | 1 +
drivers/mfd/rk808.c | 1 +
include/linux/mfd/rk808.h | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c
index a577f950c632..418a4506c99e 100644
--- a/drivers/mfd/rk8xx-core.c
+++ b/drivers/mfd/rk8xx-core.c
@@ -232,6 +232,7 @@ static const struct rk808_reg_data rk817_pre_init_reg[] = {
diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index e00da7c7e..ae3c99809 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -300,6 +300,7 @@ static const struct rk808_reg_data rk817_pre_init_reg[] = {
{RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
{RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
RK817_HOTDIE_105 | RK817_TSD_140},
@@ -21,10 +21,10 @@ index a577f950c632..418a4506c99e 100644
static const struct rk808_reg_data rk818_pre_init_reg[] = {
diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h
index 78e167a92483..0bd7031966d6 100644
index 9af1f3105..d02e56e09 100644
--- a/include/linux/mfd/rk808.h
+++ b/include/linux/mfd/rk808.h
@@ -1052,6 +1052,11 @@ enum rk809_reg_id {
@@ -644,6 +644,11 @@ enum rk809_reg_id {
#define RK817_ON_SOURCE_REG 0xf5
#define RK817_OFF_SOURCE_REG 0xf6
@@ -36,3 +36,6 @@ index 78e167a92483..0bd7031966d6 100644
/* INTERRUPT REGISTER */
#define RK817_INT_STS_REG0 0xf8
#define RK817_INT_STS_MSK_REG0 0xf9
--
2.25.1

View File

@@ -1,4 +1,4 @@
From 41026603d639007895de1f48437813f78edb62ea Mon Sep 17 00:00:00 2001
From 5f1f9863bf1031e608537945fdc97e099cb9e42c Mon Sep 17 00:00:00 2001
From: Zhangqun Ming <north_sea@qq.com>
Date: Sat, 15 Jul 2023 08:28:16 +0000
Subject: [PATCH] arch: arm64: dts: green: Remove spiflash partitions
@@ -8,10 +8,10 @@ Subject: [PATCH] arch: arm64: dts: green: Remove spiflash partitions
1 file changed, 2 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index b5e4a67b3fc7..debb9459a5aa 100644
index d0830df48..66ef38600 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -565,36 +565,9 @@ &sfc {
@@ -566,36 +566,9 @@ &sfc {
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
@@ -50,3 +50,6 @@ index b5e4a67b3fc7..debb9459a5aa 100644
};
};
--
2.25.1

View File

@@ -1,4 +1,7 @@
From 0c8b1453993f15715836123bfc7c164e568913f2 Mon Sep 17 00:00:00 2001
From 32ee0c67a53f541f42b3a953e992bac12d5375d6 Mon Sep 17 00:00:00 2001
Message-ID: <32ee0c67a53f541f42b3a953e992bac12d5375d6.1689754249.git.stefan@agner.ch>
In-Reply-To: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1689754249.git.stefan@agner.ch>
References: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1689754249.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Wed, 19 Jul 2023 10:08:06 +0200
Subject: [PATCH] Input: rk805-pwrkey: reverse polarity of pwrkey
@@ -33,3 +36,6 @@ index 76873aa005b4..139419033c84 100644
input_sync(pwr);
return IRQ_HANDLED;
--
2.41.0

View File

@@ -1,4 +1,4 @@
From 858d26179ee3a06fc7ebadf2c49dc337a7a98485 Mon Sep 17 00:00:00 2001
From 10c2c3afa62f58c4f795a0777aa8635428e3c78a Mon Sep 17 00:00:00 2001
From: zhangcy <chengyu.zhang@seeed.cc>
Date: Mon, 14 Aug 2023 01:27:34 +0000
Subject: [PATCH] green: emmc use HS200 mode
@@ -8,10 +8,10 @@ Subject: [PATCH] green: emmc use HS200 mode
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index debb9459a5aa..e4b1e80641b9 100644
index f742b904a..3b564950f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -532,6 +532,7 @@ &saradc {
@@ -533,6 +533,7 @@ &saradc {
&sdhci {
bus-width = <8>;
@@ -19,3 +19,6 @@ index debb9459a5aa..e4b1e80641b9 100644
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
--
2.25.1

View File

@@ -1,4 +1,7 @@
From 6b926b041e939655d3a88202bde32f4901459a65 Mon Sep 17 00:00:00 2001
From 6c1abc949a978492bd9a1b30f4faaa2329d93068 Mon Sep 17 00:00:00 2001
Message-ID: <6c1abc949a978492bd9a1b30f4faaa2329d93068.1693860223.git.stefan@agner.ch>
In-Reply-To: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1693860223.git.stefan@agner.ch>
References: <fa0e84b5fbb7b6ce0b161bfcfe495f3648d02110.1693860223.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Mon, 4 Sep 2023 22:36:10 +0200
Subject: [PATCH] arch: arm64: dts: green: Improve LED representation
@@ -9,7 +12,7 @@ Fix color and use labels/node names according to the LEDs functionality.
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
index e4b1e80641b9..1d0db11db3e0 100644
index 5be4368767a1..d4bd90b7f0d6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-ha-green.dts
@@ -48,16 +48,18 @@ hdmi_con_in: endpoint {
@@ -44,3 +47,6 @@ index e4b1e80641b9..1d0db11db3e0 100644
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_YELLOW>;
--
2.42.0

View File

@@ -1,7 +1,8 @@
From 501ac314ef709d6ecac3047310d5e48a473df638 Mon Sep 17 00:00:00 2001
From 2ab36c774a9f16c10a2bffeb602a9c914ffacd00 Mon Sep 17 00:00:00 2001
Message-ID: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Zhangqun Ming <north_sea@qq.com>
Date: Thu, 6 Jul 2023 10:06:35 +0000
Subject: [PATCH] arch: arm: dts: Add NabuCasa Green board
Subject: [PATCH 1/9] arch: arm: dts: Add NabuCasa Green board
---
arch/arm/dts/Makefile | 1 +
@@ -14,17 +15,17 @@ Subject: [PATCH] arch: arm: dts: Add NabuCasa Green board
create mode 100644 configs/green_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9d28a485be..f78839f9cc 100644
index 480269fa60..b82ebfe371 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -172,6 +172,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
@@ -167,6 +167,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3566-anbernic-rgxx3.dtb \
+ rk3566-ha-green.dtb \
rk3566-quartz64-a.dtb \
rk3566-quartz64-b.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-evb.dtb \
rk3568-rock-3a.dtb
diff --git a/arch/arm/dts/rk3566-ha-green-u-boot.dtsi b/arch/arm/dts/rk3566-ha-green-u-boot.dtsi
new file mode 100644
index 0000000000..83fa66d591
@@ -831,5 +832,5 @@ index 0000000000..0617d308aa
+# CONFIG_BINMAN_FDT is not set
+CONFIG_ERRNO_STR=y
--
2.43.0
2.41.0

View File

@@ -1,7 +1,10 @@
From 6441bdb22a25649ff8fd69aa8f8a7285d9c37266 Mon Sep 17 00:00:00 2001
From d4f52bc53540341dcb3408a3f2d4ec8bd1fe260a Mon Sep 17 00:00:00 2001
Message-ID: <d4f52bc53540341dcb3408a3f2d4ec8bd1fe260a.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Zhangqun Ming <north_sea@qq.com>
Date: Fri, 14 Jul 2023 14:13:39 +0000
Subject: [PATCH] configs: green: Support USB boot
Subject: [PATCH 2/9] configs: green: Support USB boot
---
configs/green_defconfig | 52 ++++++++++++++++++++++++++++-------------
@@ -113,5 +116,5 @@ index 0617d308aa..14960b67d2 100644
+CONFIG_USB_DWC3=y
CONFIG_ERRNO_STR=y
--
2.43.0
2.41.0

View File

@@ -1,7 +1,10 @@
From d8b8b614d19dbb3fa004677a2c2e50b685a80192 Mon Sep 17 00:00:00 2001
From c59235f8be1bdd261e1677177c1bef1bee1025ea Mon Sep 17 00:00:00 2001
Message-ID: <c59235f8be1bdd261e1677177c1bef1bee1025ea.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Zhangqun Ming <north_sea@qq.com>
Date: Fri, 14 Jul 2023 14:14:10 +0000
Subject: [PATCH] arch: arm: dts: rk3566: green: boot order
Subject: [PATCH 3/9] arch: arm: dts: rk3566: green: boot order
---
arch/arm/dts/rk3566-ha-green-u-boot.dtsi | 6 +++++-
@@ -46,5 +49,5 @@ index 15d2b73433..bf0f81c3a1 100644
reg = <0>;
spi-max-frequency = <100000000>;
--
2.43.0
2.41.0

View File

@@ -1,7 +1,10 @@
From e14d7d56b293ba01c5b73a4b3483795d78c75172 Mon Sep 17 00:00:00 2001
From e525d29174f335fe9aa72da8642699609631b2be Mon Sep 17 00:00:00 2001
Message-ID: <e525d29174f335fe9aa72da8642699609631b2be.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Zhangqun Ming <north_sea@qq.com>
Date: Sat, 15 Jul 2023 08:46:09 +0000
Subject: [PATCH] arch: arm: dts: green: spi nor uboot
Subject: [PATCH 4/9] arch: arm: dts: green: spi nor uboot
---
arch/arm/dts/rk3566-ha-green-u-boot.dtsi | 88 +++++++++++++++++++++++-
@@ -151,5 +154,5 @@ index 14960b67d2..5f94c06279 100644
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
--
2.43.0
2.41.0

View File

@@ -1,7 +1,11 @@
From acec57c77e10230fc32820046301cb2a59c431d4 Mon Sep 17 00:00:00 2001
From 0088369711a0b57b598121dad60b52de0426a180 Mon Sep 17 00:00:00 2001
Message-ID: <0088369711a0b57b598121dad60b52de0426a180.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Thu, 17 Aug 2023 17:38:13 +0200
Subject: [PATCH] board: green: add Green board to read board specific EEPROM
Subject: [PATCH 5/9] board: green: add Green board to read board specific
EEPROM
Use board specific code to read serial number and MAC address from
on-board I2C EEPROM.
@@ -40,7 +44,7 @@ index ea9d358099..91afadf0e6 100644
&i2s0_8ch {
diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig
index baa51349f4..42652dec03 100644
index 94e04b79e7..5858c3921d 100644
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
@@ -17,6 +17,12 @@ config TARGET_ANBERNIC_RGXX3_RK3566
@@ -53,15 +57,14 @@ index baa51349f4..42652dec03 100644
+ Nabu Casa's Home Assistant Green single board computer with a RK3566
+ SoC.
+
config TARGET_ODROID_M1_RK3568
bool "ODROID-M1"
help
@@ -44,6 +50,7 @@ config SYS_MALLOC_F_LEN
endchoice
config ROCKCHIP_BOOT_MODE_REG
@@ -33,5 +39,6 @@ config SYS_MALLOC_F_LEN
source "board/rockchip/evb_rk3568/Kconfig"
source "board/anbernic/rgxx3_rk3566/Kconfig"
source "board/hardkernel/odroid_m1/Kconfig"
+source "board/nabucasa/ha-green/Kconfig"
source "board/pine64/quartz64_rk3566/Kconfig"
endif
diff --git a/board/nabucasa/ha-green/Kconfig b/board/nabucasa/ha-green/Kconfig
@@ -204,5 +207,5 @@ index 0000000000..e42d9c8e8c
+
+#endif
--
2.43.0
2.41.0

View File

@@ -1,7 +1,10 @@
From 51f1bdec59b8f62ac00a37e97a7bb8ebfc9f61d7 Mon Sep 17 00:00:00 2001
From 9fd3b62354064d44fd391907f48d7800c6839c8a Mon Sep 17 00:00:00 2001
Message-ID: <9fd3b62354064d44fd391907f48d7800c6839c8a.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: syan <syan.cham@gmail.com>
Date: Mon, 31 Jul 2023 09:39:55 +0000
Subject: [PATCH] green: spl loader uboot order: sd-emmc-spi_nor
Subject: [PATCH 6/9] green: spl loader uboot order: sd-emmc-spi_nor
---
arch/arm/dts/rk3566-ha-green-u-boot.dtsi | 2 +-
@@ -21,5 +24,5 @@ index fa98078fce..48d7b61513 100644
};
--
2.43.0
2.41.0

View File

@@ -0,0 +1,76 @@
From 59eeea1cb0b1a0b254c759dceeface686aa8f24b Mon Sep 17 00:00:00 2001
Message-ID: <59eeea1cb0b1a0b254c759dceeface686aa8f24b.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 28 Jul 2023 12:05:40 +0000
Subject: [PATCH 7/9] rockchip: rk3568-rock-3a: Fix SPI Flash alias
The commit 64f79f88a751 ("rockchip: rk3568-rock-3a: Enable boot from SPI
NOR flash") enabled SPI flash support by overriding the spi0 alias.
Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and
SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled
support for parsing and auto discovery of parameters, SFDP.
Fixes: 64f79f88a751 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 52f6b96d27c8aabca697ac395e86a3481f1c53b7)
---
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 4 ----
arch/arm/dts/rk356x-u-boot.dtsi | 1 +
configs/rock-3a-rk3568_defconfig | 3 +++
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index bbf54f888f..cb40dc31d1 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -7,10 +7,6 @@
#include "rk356x-u-boot.dtsi"
/ {
- aliases {
- spi0 = &sfc;
- };
-
chosen {
stdout-path = &uart2;
};
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index c340c2bba6..e7b46bb2d4 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -9,6 +9,7 @@
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc0;
+ spi4 = &sfc;
};
chosen {
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index 753d03914d..92eb6b3f1c 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -54,6 +54,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -66,6 +67,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=4
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
--
2.41.0

View File

@@ -1,7 +1,10 @@
From 0142d1a99d2aa4a6dad7181dcd74958b2ee0fe31 Mon Sep 17 00:00:00 2001
From 24c253f85e04cc09b675c41490bad0c69338c2c6 Mon Sep 17 00:00:00 2001
Message-ID: <24c253f85e04cc09b675c41490bad0c69338c2c6.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Thu, 17 Aug 2023 17:51:07 +0200
Subject: [PATCH] green: Fix SPI Flash alias
Subject: [PATCH 8/9] green: Fix SPI Flash alias
Use the commonly used SPI flash bus 4. This allows to access SPI NOR
flash from regular U-Boot as well.
@@ -39,5 +42,5 @@ index a97391f295..71c9257d7d 100644
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
--
2.43.0
2.41.0

View File

@@ -1,7 +1,10 @@
From 846df62342a4904a91aace66e9204ae3ed4ca0af Mon Sep 17 00:00:00 2001
From c0ee04d554802a7b7af3e6ec6b3d9b4160c75126 Mon Sep 17 00:00:00 2001
Message-ID: <c0ee04d554802a7b7af3e6ec6b3d9b4160c75126.1692346980.git.stefan@agner.ch>
In-Reply-To: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
References: <2ab36c774a9f16c10a2bffeb602a9c914ffacd00.1692346980.git.stefan@agner.ch>
From: Stefan Agner <stefan@agner.ch>
Date: Fri, 18 Aug 2023 10:06:24 +0200
Subject: [PATCH] arch: arm: dts: green: drop SPI NOR flash partitions
Subject: [PATCH 9/9] arch: arm: dts: green: drop SPI NOR flash partitions
---
arch/arm/dts/rk3566-ha-green.dts | 27 ---------------------------
@@ -46,5 +49,5 @@ index 91afadf0e6..68d836911e 100644
};
--
2.43.0
2.41.0

File diff suppressed because it is too large Load Diff

View File

@@ -1,19 +1,27 @@
CONFIG_KERNEL_LZ4=y
# CONFIG_KERNEL_GZIP is not set
CONFIG_EFI_STUB=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_INTEL_IDLE=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_SCSI_LOWLEVEL=y
CONFIG_SCSI_HPSA=y
CONFIG_USB_XHCI_HCD=y
CONFIG_BLK_DEV_NVME=y
CONFIG_WLAN_VENDOR_INTEL=y
CONFIG_IWL4965=m
CONFIG_IWL3945=m
CONFIG_IWLWIFI=m
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_WLAN_VENDOR_REALTEK=y
CONFIG_RTL_CARDS=m
CONFIG_RTL8723BE=y
CONFIG_RTL8723BS=y
CONFIG_RTW88=m
CONFIG_RTW88_8821CE=m
CONFIG_BCMA=m
@@ -22,9 +30,6 @@ CONFIG_SYSFB=y
CONFIG_FB=y
CONFIG_FB_EFI=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_DRM=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_AMDGPU=m
@@ -33,8 +38,6 @@ CONFIG_DRM_I915_CAPTURE_ERROR=y
CONFIG_DRM_I915_COMPRESS_ERROR=y
CONFIG_DRM_I915_USERPTR=y
CONFIG_PWM=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=m
@@ -43,15 +46,8 @@ CONFIG_MMC_BLOCK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ACPI=y
CONFIG_MMC_SDHCI_PCI=y
CONFIG_MMC_REALTEK_PCI=m
CONFIG_MMC_REALTEK_USB=m
CONFIG_X86_INTEL_LPSS=y
CONFIG_MISC_RTSX_PCI=m
CONFIG_MISC_RTSX_USB=m
CONFIG_SND_HDA_I915=y
CONFIG_SND_SOC=m
CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
@@ -70,6 +66,7 @@ CONFIG_SND_SOC_INTEL_CFL=m
CONFIG_SND_SOC_INTEL_CML_H=m
CONFIG_SND_SOC_INTEL_CML_LP=m
CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=m
CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=m
CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=y
CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m
CONFIG_SND_SOC_ACPI_INTEL_MATCH=m
@@ -77,8 +74,13 @@ CONFIG_SND_SOC_INTEL_MACH=y
CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES=y
CONFIG_SND_SOC_INTEL_HDA_DSP_COMMON=m
CONFIG_SND_SOC_INTEL_SOF_MAXIM_COMMON=m
CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH=m
CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m
CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
CONFIG_SND_SOC_INTEL_BYTCR_WM5102_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
@@ -87,15 +89,38 @@ CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH=m
CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m
CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m
# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set
CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_DA7219_MAX98357A_GENERIC=m
CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_COMMON=m
CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
CONFIG_SND_SOC_INTEL_SOF_WM8804_MACH=m
CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m
CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m
CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH=m
CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH=m
CONFIG_SND_SOC_INTEL_GLK_DA7219_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_GLK_RT5682_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_SKL_HDA_DSP_GENERIC_MACH=m
CONFIG_SND_SOC_INTEL_SOF_RT5682_MACH=m
CONFIG_SND_SOC_INTEL_SOF_CS42L42_MACH=m
CONFIG_SND_SOC_INTEL_SOF_PCM512x_MACH=m
CONFIG_SND_SOC_INTEL_SOF_ES8336_MACH=m
CONFIG_SND_SOC_INTEL_CML_LP_DA7219_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH=m
CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH=m
CONFIG_SND_SOC_INTEL_EHL_RT5660_MACH=m
CONFIG_SND_SOC_INTEL_SOUNDWIRE_SOF_MACH=m
CONFIG_SND_SOC_MTK_BTCVSD=m
CONFIG_SND_SOC_SOF_TOPLEVEL=y
CONFIG_SND_SOC_SOF_PCI_DEV=m
CONFIG_SND_SOC_SOF_PCI=m
CONFIG_SND_SOC_SOF_ACPI=m
CONFIG_SND_SOC_SOF_ACPI_DEV=m
# CONFIG_SND_SOC_SOF_DEBUG_PROBES is not set
CONFIG_SND_SOC_SOF=m
CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE=y
CONFIG_SND_SOC_SOF_INTEL_TOPLEVEL=y
@@ -125,6 +150,7 @@ CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC=y
CONFIG_SND_SOC_SOF_HDA_LINK_BASELINE=m
CONFIG_SND_SOC_SOF_HDA=m
CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=m
CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=m
CONFIG_SND_SOC_SOF_XTENSA=m
CONFIG_THINKPAD_ACPI=m
@@ -134,13 +160,13 @@ CONFIG_SENSORS_CORETEMP=m
CONFIG_UHID=y
CONFIG_LPC_ICH=y
CONFIG_ITCO_WDT=y
CONFIG_IT87_WDT=y
CONFIG_RAS=y
CONFIG_EDAC=y
CONFIG_EDAC_DECODE_MCE=m
CONFIG_EDAC_GHES=y
CONFIG_EDAC_AMD64=m
CONFIG_EDAC_E752X=m
CONFIG_EDAC_I82975X=m
@@ -162,13 +188,13 @@ CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX=m
CONFIG_I2C_TINY_USB=m
CONFIG_I2C_DLN2=m
CONFIG_SPI_DLN2=m
CONFIG_GPIO_DLN2=m
CONFIG_MFD_DLN2=m
CONFIG_DLN2_ADC=m
CONFIG_IIO=m
CONFIG_BMP280=m

View File

@@ -1,23 +1,14 @@
CONFIG_KERNEL_LZ4=y
# CONFIG_KERNEL_GZIP is not set
CONFIG_EFI_STUB=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_HOTPLUG_CPU=y
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_ACPI_HOTPLUG_MEMORY=y
CONFIG_DMI_SYSFS=m
CONFIG_FW_CFG_SYSFS=m
CONFIG_VMXNET3=y
CONFIG_VMWARE_VMCI_VSOCKETS=m
CONFIG_VMWARE_PVSCSI=y
CONFIG_VMWARE_VMCI_VSOCKETS=y
CONFIG_VMWARE_VMCI=y
CONFIG_VMWARE_BALLOON=y
CONFIG_VMWARE_PVSCSI=y
@@ -26,7 +17,7 @@ CONFIG_VMWARE_PVSCSI=y
CONFIG_NET_9P=m
CONFIG_NET_9P_VIRTIO=m
CONFIG_9P_FS=m
CONFIG_9P_FS_POSIX_ACL=y
CONFIG_9P_FS_POSIX_ACL=m
CONFIG_PCI=y
CONFIG_VSOCKETS=m
CONFIG_VIRTIO_VSOCKETS_COMMON=m
@@ -39,9 +30,9 @@ CONFIG_VIRTIO=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_BALLOON=m
CONFIG_VIRTIO_MEM=m
CONFIG_VIRTIO_INPUT=m
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_BLK_SCSI=y
CONFIG_VIRTIO_CONSOLE=m
CONFIG_VIRTIO_VSOCKETS=m
CONFIG_VIRTIO_MMIO=y
@@ -57,6 +48,7 @@ CONFIG_FUSE_FS=y
CONFIG_VIRTIO_FS=y
CONFIG_DAX=y
CONFIG_FS_DAX=y
CONFIG_DAX_DRIVER=y
CONFIG_ZONE_DEVICE=y
CONFIG_FUSION=y
@@ -66,6 +58,7 @@ CONFIG_FUSION_MAX_SGE=128
CONFIG_SCSI_LOWLEVEL=y
CONFIG_USB_XHCI_HCD=y
CONFIG_BLK_DEV_NVME=y
CONFIG_PARAVIRT=y
CONFIG_PARAVIRT_SPINLOCKS=y
@@ -77,6 +70,17 @@ CONFIG_SND_XEN_FRONTEND=y
CONFIG_XEN_PVCALLS_FRONTEND=m
CONFIG_XEN_WDT=y
CONFIG_WLAN_VENDOR_INTEL=y
CONFIG_IWL4965=m
CONFIG_IWL3945=m
CONFIG_IWLWIFI=m
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_WLAN_VENDOR_REALTEK=y
CONFIG_RTL_CARDS=m
CONFIG_RTL8723BE=y
CONFIG_BCMA=m
CONFIG_SYSFB=y
@@ -85,20 +89,10 @@ CONFIG_SYSFB_SIMPLEFB=y
CONFIG_FB=y
CONFIG_FB_EFI=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ACPI=y
CONFIG_MMC_SDHCI_PCI=y
CONFIG_X86_INTEL_LPSS=y
CONFIG_DRM=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_SIMPLEDRM=y
CONFIG_DRM_XEN_FRONTEND=y
CONFIG_DRM_XEN=y
CONFIG_HYPERVISOR_GUEST=y
CONFIG_HYPERV=y
@@ -118,10 +112,4 @@ CONFIG_I40EVF=m
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
# x86-specific network driver, requires more options from device-support.config fragment
CONFIG_DWMAC_INTEL=m
CONFIG_I6300ESB_WDT=y
CONFIG_I2C=y
CONFIG_I2C_MUX=y

Some files were not shown because too many files have changed in this diff Show More