Merge pull request #783 from home-assistant/dev

Release 5.0 dev

.github/ISSUE_TEMPLATE.md

@@ -0,0 +1,34 @@
+<!-- READ THIS FIRST:
+- If you need additional help with this template please refer to https://www.home-assistant.io/help/reporting_issues/
+- Make sure you are running the latest version before reporting an issue: https://github.com/home-assistant/core/releases
+- Do not report issues for integrations here, please refer to https://github.com/home-assistant/core/issues
+- This is for bugs only. Feature and enhancement requests should go in our community forum: https://community.home-assistant.io/c/feature-requests
+- Provide as many details as possible. Paste logs, configuration sample and code into the backticks. Do not delete any text from this template!
+- If you have a problem with an add-on, make an issue in its repository.
+- If you are using Raspberry Pi overlays in config.txt and your system doesn't work anymore please report this to the Raspberry Pi kernel project.
+
+-->
+
+**HassOS release with the issue:**
+<!--
+- Frontend -> Configuration -> Info
+- Or use this command: hass --version
+-->
+
+**Supervisor logs:**
+<!--
+- Frontend -> Supervisor -> System
+- Or use this command: ha su logs
+-->
+
+**Journal logs:**
+<!--
+- use this command: journalctl
+-->
+
+**Kernel logs:**
+<!--
+- use this command: dmesg
+-->
+
+**Description of problem:**

Dockerfile

@@ -1,4 +1,4 @@
-FROM ubuntu:18.04
+FROM debian:buster
 
 # Set shell
 SHELL ["/bin/bash", "-o", "pipefail", "-c"]
@@ -9,17 +9,35 @@ RUN apt-get update && apt-get install -y --no-install-recommends \
         ca-certificates \
         curl \
         gpg-agent \
+        gpg \
+        dirmngr \
         software-properties-common \
-    && curl -fsSL https://download.docker.com/linux/ubuntu/gpg | apt-key add - \
-    && add-apt-repository "deb https://download.docker.com/linux/ubuntu $(lsb_release -cs) stable" \
+    && curl -fsSL https://download.docker.com/linux/debian/gpg | apt-key add - \
+    && add-apt-repository "deb https://download.docker.com/linux/debian $(lsb_release -cs) stable" \
     && apt-get update && apt-get install -y --no-install-recommends \
         docker-ce \
     && rm -rf /var/lib/apt/lists/*
 
-# Build Tools
+# Build tools
 RUN apt-get update && apt-get install -y --no-install-recommends \
-        wget patch vim cpio python unzip rsync bc bzip2 ncurses-dev sudo \
-        git make g++ file perl bash binutils locales qemu-utils bison flex \
+        bash \
+        bc \
+        binutils \
+        build-essential \
+        bzip2 \
+        cpio \
+        file \
+        git \
+        make \
+        ncurses-dev \
+        patch \
+        perl \
+        python \
+        rsync \
+        sudo \
+        unzip \
+        wget \
+        qemu-utils \
     && rm -rf /var/lib/apt/lists/*
 
 # Init entry

Documentation/bluetooth.md

@@ -1,9 +1,9 @@
 # Bluetooth
 
-We support `bluetoothctl` on host. Later we want also support Bluetooth trought UI.
+We support `bluetoothctl` on the host. Later we want to support Bluetooth through the UI.
 All pairs and settings are persistent over reboots and updates.
 
-If you want setup Bluetooth on host, use the `bluetoothctl` utility.
+If you want to setup Bluetooth on the host, use the `bluetoothctl` utility.
 
 ## Scan devices
 

Documentation/boards/hardkernel/odroid-n2.md

@@ -0,0 +1,14 @@
+# Odroid-N2
+
+## eMMC
+
+eMMC support is provided transparently. Just flash the image to the eMMC board as you would an SD card.
+
+## Console
+
+By default, console access is granted over the serial header and over HDMI. Certain startup messages will only appear on the serial console by default. To show the messages on the HDMI console instead, swap the order of the two consoles in the `cmdline.txt` file on the boot partition. You can also delete the AML0 console if you don't plan on using the serial adapter.
+eg. `console=ttyAML0,115200n8 console=tty0`
+
+## GPIO
+
+Refer to [the odroid wiki](https://wiki.odroid.com/odroid-n2/hardware/expansion_connectors).

Documentation/boards/nuc.md

@@ -8,7 +8,8 @@ Requirements:
 - UEFI boot
 - SATA/AHCI storage
 - Supported NIC:
-  - Intel Gigabit NIC (e1000, e1000e, igb)
+  - Intel Gigabit NIC (e1000, igb - via Linux mainline)
+  - Intel PCIe Gigabit NIC (e1000e - via out-of-tree module in *buildroot-external/package/intel-e1000e*)
   - Realtek Gigabit NIC (r8169)
   - Intel Wireless Wifi 802.11ac (iwlwifi, see below)
 
@@ -17,6 +18,8 @@ Requirements:
 | Device | Quirks | 
 |--------|-----------|
 | Intel NUC5CPYH |  |
+| Intel NUC6CAYH |  |
+| Intel NUC10I3FNK2 |  |
 | Gigabyte GB-BPCE-3455 | needs 'nomodeset' in cmdline.txt if you want a console |
 
 

Documentation/boards/orangepi.md

@@ -1,20 +0,0 @@
-# Raspberry PI
-
-Supported Hardware:
-
-| Device | Board | 
-|--------|-----------|
-| Orange Pi Prime | opi-prime |
-
-## Serial console
-
-The serial port on the Orange Pi Prime is a 3 pin header located between the
-power and reset buttons. The pins are labelled away from the board edge. Flow
-control must be disabled in order to send data. The serial specs are 3.3V TTL,
-115200,8,n,1
-
-## I2C
-
-Add `dtparam=i2c0=on` to `cmdline.txt`
-
-[config]: ../configuration.md#automatic

Documentation/boards/raspberrypi.md

@@ -31,8 +31,13 @@ i2c-bcm2708
 
 ## USB Boot
 
-USB mass storage boot is available on Raspberry Pi 3B, 3B+, 3A+, and 2B v1.2.
-To enable USB boot, add `program_usb_boot_mode=1` into `config.txt`. Note that this **permanently** alters the one-time programmable memory of the device.
+USB mass storage boot is available on Raspberry Pi 4 (64-bit only), 3B, 3B+, 3A+, and 2B v1.2.
+
+For Raspberry 3B, 3A+ and 2B v1.2, to enable USB boot, add `program_usb_boot_mode=1` into `config.txt`. Note that this **permanently** alters the one-time programmable memory of the device.
+
+For Raspberry 4, make sure to update the bootloader to a stable release
+supporting USB mass storage boot (see
+[bcm2711_bootloader_config.md](https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md#usbmassstorageboot). If no SD card is used add `sd_poll_once=on` to `dtparam` in `config.txt` (comma separated). This gets rid of `mmc0: timeout waiting for hardware interrupt` kernel errors.
 
 For more information see [RaspberryPi](https://www.raspberrypi.org/documentation/hardware/raspberrypi/bootmodes/msd.md).
 

Documentation/boards/tinker.md

@@ -5,11 +5,13 @@ Supported Hardware:
 | Device | Board | 
 |--------|-----------|
 | Tinker RK3288 | tinker |
-| Tinker S RK3288 | tinker |
+| Tinker S RK3288 |  |
 
+<!--
 ## eMMC
 
 eMMC support is provided transparently. Just flash the image to the eMMC by connecting your Tinker Board S to your PC via Micro-USB.
+-->
 
 ## Serial console
 

Documentation/build.md

@@ -1,21 +0,0 @@
-# Building
-
-Running `sudo ./enter.sh` will get you into the build Docker container.   
-`make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
-
-## Scripts
-
-
-
-## Helpers
-
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external xy_defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-menuconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-menuconfig`
-
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external savedefconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external linux-update-defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external barebox-update-defconfig`
-- `make -C /build/buildroot BR2_EXTERNAL=/build/buildroot-external busybox-update-config`

Documentation/configuration.md

@@ -3,7 +3,7 @@
 ## Automatic
 
 You can use an USB drive with HassOS to configure network options, SSH access to the host and to install updates.
-Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG`. Alternative you can create a `CONFIG` folder inside boot partition. Use the following directory structure within the USB drive:
+Format a USB stick with FAT32/EXT4/NTFS and name it `CONFIG` (in all capitals). Alternative you can create a `CONFIG` folder inside the `boot` partition. Use the following directory structure within the USB drive:
 
 ```text
 network/
@@ -19,12 +19,12 @@ hassos-xy.raucb
 - The `modules` folder is for modules-load configuration files.
 - The `modprobe` folder is for modules configuration files (/etc/modprobe.d)
 - The `udev` folder is for udev rules files.
-- The `authorized_keys` file activates debug SSH access on port `22222`. See [Debugging Hassio][debug-hassio].
+- The `authorized_keys` file activates debug SSH access on port `22222`. See [Debugging Home Assistant][debug-homeassistant].
 - The `timesyncd.conf` file allow you to set different NTP servers. HassOS won't boot without correct working time servers!
 - The `hassos-*.raucb` file is a firmware OTA update which will be installed. These can be found on on the [release][hassos-release] page.
 
-You can put this USB stick into the device and it will be read on startup. You can also trigger this process later over the
-API/UI or by calling `systemctl restart hassos-config` on the host.
+You can put this USB stick into the device and it will be read on startup and files written to the correct places. You can also trigger this process later over the
+API/UI or by calling `systemctl restart hassos-config` on the host. *The USB Stick just needs to be inserted to the device during this setup process and can be disconnected afterwards.*
 
 ## Local
 
@@ -47,7 +47,9 @@ You can manual add, edit or remove connections configurations from `/etc/Network
 ### NTP
 
 You can manual edit the systemd timesync file on `/etc/systemd/timesyncd.conf`.
-Our default ntp configuration look like:
+
+Our default NTP configuration look like:
+
 ```
 [Time]
 NTP=time1.google.com time2.google.com time3.google.com
@@ -57,4 +59,4 @@ FallbackNTP=0.pool.ntp.org 1.pool.ntp.org 2.pool.ntp.org 3.pool.ntp.org
 [systemd-modules]: https://www.freedesktop.org/software/systemd/man/modules-load.d.html
 [network.md]: network.md
 [hassos-release]: https://github.com/home-assistant/hassos/releases/
-[debug-hassio]: https://developers.home-assistant.io/docs/en/hassio_debugging.html
+[debug-homeassistant]: https://developers.home-assistant.io/docs/operating-system/debugging

Documentation/deployment.md

@@ -2,8 +2,8 @@
 
 We provide 3 different types of release builds:
 
-- development (beta/dev)
-- staging (rc)
+- development (dev)
+- staging (beta)
 - production (stable)
 
 ## Versioning
@@ -15,7 +15,7 @@ The development number they will be bump for the stable release version and the
 
 The branch `dev` ist the actual development branch and from there we never make a release. The `master` branch contains the development version and from there we build a beta release.
 
-If we create a new staging/productive release, we create a new branch `rel-{MAJOR}`. They will be used for the whole cycle of this release.
+If we create a new productive/staging release, we create a new branch `rel-{MAJOR}`. They will be used for the whole cycle of this release.
 
 ## Upload release files
 

Documentation/development.md

@@ -3,22 +3,57 @@
 ## Boot system
 
 `BOOT_SYS`:
+
 - efi
-- hyprid
-- spl
+- hybrid
 - mbr
 
-HassOS is basicly used GPT. But for use GPT we need own the first 1024 of
-boot drive. Is that not possible, you can use MBR for your device, they work also with SPLs.
+HassOS is using GPT. But to use GPT we need own the first 1024 of boot drive. Is that's not possible, you can use MBR for your device. This also work with SPLs.
 
-Hyprid and SPL use both a hyprid MBR/GPT table but SPL move the GPT header 8MB for give space to write SPL and boot images before.
+Hybrid and SPL use both a hybrid MBR/GPT table but SPL move the GPT header 8 MB for give space to write SPL and boot images before.
+
+`BOOT_SPL`:
+
+- true
+- false
+
+Enable SPL update handling.
 
 `BOOTLOADER`:
-- uboot
+
+- U-Boot
 - barebox
 
-We support mainly uboot but for uefi system we can also use barebox. In future we hope to remove barebox with uboot also on uefi.
+We support mainly U-Boot but for UEFI systems we can also use [barebox](https://barebox.org/). In the future, we hope to remove barebox with U-Boot also on UEFI.
 
 `DISK_SIZE`:
+
 Default 2. That is the size of end image in GB.
 
+## Supervisor
+
+`SUPERVISOR_MACHINE`:
+
+- intel-nuc
+- odroid-c2
+- odroid-n2
+- odroid-xu
+- qemuarm
+- qemuarm-64
+- qemux86
+- qemux86-64
+- raspberrypi
+- raspberrypi2
+- raspberrypi3
+- raspberrypi4
+- raspberrypi3-64
+- raspberrypi4-64
+- tinker
+
+`SUPERVISOR_ARCH`:
+
+- amd64
+- i386
+- armhf
+- armv7
+- aarch64

Documentation/getting_started_development.md

@@ -1,11 +1,10 @@
-Getting started with Hassos development using Docker on GNU/Linux
-=================================================================
+# Getting started with HassOS development using Docker on GNU/Linux
 
-First, install **docker** for your distribution - I'd advise to use your distro's provided packages, since that will make sure permissions et al. are sanely set up for what you are about to run. You're also expected to have your current user properly set up in in your sudoers policy, so that this account may elevate to root and execute arbitrary commands as UID 0 (this is required, since at some point during the build process, a new loopback device-backed filesystem image will be mounted inside a docker container - which requires a "privileged" container to run, which can only be done as root).
+First, install `docker-ce` for your distribution. I'd advise to use your distro's provided packages, since that will make sure permissions et al. are sanely set up for what you are about to run. You're also expected to have your current user properly set up in in your sudoers policy, so that this account may elevate to root and execute arbitrary commands as UID 0 (this is required, since at some point during the build process, a new loopback device-backed filesystem image will be mounted inside a Docker container - which requires a "privileged" container to run, which can only be done as root).
 
-Next, make sure the docker daemon is running:
+Next, make sure the Docker daemon is running:
 
-```
+```bash
 $ sudo systemctl status docker
 ● docker.service - Docker Application Container Engine
    Loaded: loaded (/usr/lib/systemd/system/docker.service; disabled; vendor preset: disabled)
@@ -15,7 +14,7 @@ $ sudo systemctl status docker
 
 My desktop distro doesn't start newly installed services by default, which means I'll have to manually fire up the `docker` service:
 
-```
+```bash
 $ sudo systemctl start docker
 $ sudo systemctl --no-pager status docker -n0
 ● docker.service - Docker Application Container Engine
@@ -30,9 +29,9 @@ $ sudo systemctl --no-pager status docker -n0
            └─1539 docker-containerd --config /var/run/docker/containerd/containerd.toml
 ```
 
-Now, change your working directory to your hassos repo checkout (please adapt pathnames as needed), make sure your intended changes to the source tree are applied (and committed, ideally :)), and execute the `enter.sh` helper script:
+Now, change your working directory to your home-assistant/operating-system repository checkout (please adapt path names as needed), make sure your intended changes to the source tree are applied (and committed, ideally :)), and execute the `enter.sh` helper script:
 
-```
+```bash
 $ cd ~/codebase/hassos/
 $ sudo scripts/enter.sh
 Sending build context to Docker daemon  30.48MB
@@ -43,24 +42,24 @@ Successfully built 4dc25a21556b
 Successfully tagged hassbuildroot:latest
 ```
 
-Note that the current iteration of `enter.sh` will try to load the **overlayfs** kernel module, which is not strictly required for docker's operation, as far as I can tell. It's OK if loading that module fails; the shell script will continue executing. If everything works out, you will find yourself in an interactive login shell inside your docker container/build environment, where you can peek around:
+Note that the current iteration of `enter.sh` will try to load the **overlayfs** kernel module, which is not strictly required for Docker's operation, as far as I can tell. It's OK if loading that module fails; the shell script will continue executing. If everything works out, you will find yourself in an interactive login shell inside your Docker container/build environment, where you can peek around:
 
-```
+```bash
 root@somehashinhex:/build#
 root@somehashinhex:/build# make help
 [...]
 ```
 
-The _hassos_ developers provide a Makefile that will build hassos images for a (rather long!) list of targets. For example run the command below to start building the _ova_ variant, and go make a cup of tea. Or fifteen.
+The HassOS developers provide a `Makefile` that will build HassOS images for a list of targets. For example run the command below to start building the _ova_ variant, and go make a cup of tea. Or fifteen.
 
-```
+```bash
 root@0db6f7079872:/build# make ova
 [...]
 ```
 
 That will result in a single VMDK image file at the very end of the build process. This image file is a compressed block device dump with a proper GPT partition table, prepared to ship into any OVA-compatible hypervisor's innards. For me, the end of the **ova** build steps looks like this:
 
-```
+```bash
 [...]
 2097152+0 records out
 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 12.2145 s, 87.9 MB/s
@@ -74,33 +73,29 @@ make: Leaving directory '/build/buildroot'
 
 The artifacts you just built are placed in the `target/` subdirectory:
 
-```
+```bash
 root@fd292c061896:/build# ls -lh release/
 total 141M
 -rw-r--r-- 1 root root 141M Oct 10 20:22 hassos_ova-2.2.vmdk.gz
 ```
 
-In order to be able to use this image file with the **qemu** hypervisor, you'll need to unpack it, and convert it to an image format that qemu can work with. Conveniently, the _hassos_ buildenv already provides all the tools we need for this conversion:
+In order to be able to use this image file with the QEMU hypervisor, you'll need to unpack it, and convert it to an image format that QEMU can work with. Conveniently, the HassOS buildenv already provides all the tools we need for this conversion:
 
-```
-root@fd292c061896:/build# gunzip release/hassos_ova-2.2.vmdk.gz
-root@fd292c061896:/build# qemu-img convert -O qcow2 release/hassos_ova-2.2.vmdk release/hassos_ova-2.2.qcow2
+```bash
+root@fd292c061896:/build# gunzip release/hassos_ova-2.2.qcow2.gz
 root@fd292c061896:/build# ls -lh release/
 total 673M
 -rw-r--r-- 1 root root 337M Oct 10 20:25 hassos_ova-2.2.qcow2
--rw-r--r-- 1 root root 337M Oct 10 20:22 hassos_ova-2.2.vmdk
 ```
 
 Now, exit the docker container's environment, and find the build artifacts in the `releases/` directory beneath your repository checkout dir. (The generated files will be owned by _root_; make sure to `chown` them to your user account, if needed.)
 
-From there, qemu can try to boot it. Since the generated image assumes UEFI support in the host/hypervisor, this is slightly more tricky than with "classic"(/legacy) MBR-based images. On the *Debian* host I use to run my qemu virtual machine on, you'll need to install the **ovmf** package, which is described as providing "UEFI firmware for 64-bit x86 virtual machines". That package will install a _TianoCore_-derived qemu UEFI image build at `/usr/share/OVMF/OVMF_CODE.fd`, which we'll use with qemu to boot the generated qcow2 image. (Please adapt pathnames as necessary, for example if you have installed the ovmf firmware image at another location.)
+From there, QEMU can try to boot it. Since the generated image assumes UEFI support in the host/hypervisor, this is slightly more tricky than with "classic"(/legacy) MBR-based images. On the *Debian* host I use to run my QEMU virtual machine on, you'll need to install the **ovmf** package which provides the "UEFI firmware for 64-bit x86 virtual machines". That package will install a **TianoCore**-derived QEMU UEFI image build at `/usr/share/OVMF/OVMF_CODE.fd`, which we'll use with QEMU to boot the generated qcow2 image. (Please adapt path names as necessary, for example if you have installed the ovmf firmware image at another location.)
 
-```
+```bash
 $ /usr/bin/qemu-system-x86_64 -enable-kvm -name hassos_ova -smp 2 -m 1024 -drive file=release/hassos_ova-2.2.qcow2,index=0,media=disk,if=ide,cache=none,format=qcow2 -drive file=/usr/share/ovmf/x64/OVMF_CODE.fd,if=pflash,format=raw,readonly=on
 ```
 
-This should pop up qemu's SDL frontend, displaying _hassos_' VT/CLI environment. Specifying addtional options and flags to qemu for network access, keyboard layout et al. are left as an exercise for the reader.
+This should pop up QEMU's SDL frontend, displaying _hassos_' VT/CLI environment. Specifying additional options and flags to QEMU for network access, keyboard layout et al. are left as an exercise for the reader.
 
-After the boot process has finished, you can log in to _hassos_ without a password, providing *root* as the username. From there, executing `login` on the *hassio>* shell prompt will yield a root shell in the host OS.
-
-Happy hacking! :)
+After the boot process has finished, you can log in to _hassos_ without a password, providing *root* as the username. From there, executing `login` on the *ha>* shell prompt will yield a root shell in the host OS.

Documentation/kernel.md

@@ -1,12 +1,18 @@
 
 # Kernel Version
 
+Default Kernel tree: 5.4
+
 | Board | Version |
 |-------|---------|
-| Open Virtual Applicance | 4.19.72 |
-| Raspberry Pi | 4.19.71 |
-| Tinker Board | 4.19.72 |
-| Odroid-C2 | 4.19.72 |
-| Odroid-XU4 | 4.19.72 |
-| Orangepi-Prime | 4.19.72 |
-| Intel NUC | 4.19.72 |
+| Open Virtual Applicance | 5.4.53 |
+| Raspberry Pi | 4.19.127 |
+| Raspberry Pi 0-W | 4.19.127 |
+| Raspberry Pi 2 | 4.19.127 |
+| Raspberry Pi 3 | 4.19.127 |
+| Raspberry Pi 4 | 4.19.127 |
+| Tinker Board | 5.4.53 |
+| Odroid-C2 | 5.7.10 |
+| Odroid-N2 | 5.7.10 |
+| Odroid-XU4 | 5.7.10 |
+| Intel NUC | 5.4.53 |

Documentation/network.md

@@ -1,14 +1,18 @@
 # Network
 
-HassOS uses NetworkManager to control the host network. In future releases, you will be able to set up the configuration using the API/UI. Currently only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive and imported to the host as described in [Configuration][configuration-usb].
+HassOS uses NetworkManager to control the host network.
 
-## Configuration Examples
+## Configure network
 
-You can read the [Official Manual][keyfile] or find many configuration examples across the internet. The system is read-only, if you don't want the IP address to change on every boot, you should set the UUID property with a generic [UUID4][uuid]. Inside `\CONFIG\network\` on the USB or SD, create a file called `my-network` and add the appropriate contents below:
+Only a manual configuration using NetworkManager connection files is supported. Without a configuration file, the device will use DHCP by default. These network connection files can be placed on a USB drive and imported to the host as described in [Configuration][configuration-usb].
+
+## Configuration examples
+
+You can read the [NetworkManager manual][nm-manual] or find many configuration examples across the internet. Keep in mind that the system is read-only. If you don't want the IP address to change on every boot, you should modify the UUID property to a generic [UUID4][uuid]. Inside the `\CONFIG\network\` directory on the USB drive or SD card, create a file called `my-network` and add the appropriate contents below:
 
 ### Default
 
-We have a preinstalled connection profile:
+A preinstalled connection profile is provided by default:
 
 ```ini
 [connection]
@@ -24,7 +28,7 @@ addr-gen-mode=stable-privacy
 method=auto
 ```
 
-### LAN
+### Wired connection to the LAN
 
 ```ini
 [connection]
@@ -40,7 +44,7 @@ addr-gen-mode=stable-privacy
 method=auto
 ```
 
-### Wireless WPA/PSK
+### Wireless LAN WPA/PSK
 
 ```ini
 [connection]
@@ -74,10 +78,11 @@ Replace the following configuration:
 ```ini
 [ipv4]
 method=manual
-address=192.168.1.111/24,192.168.1.1
+address=192.168.1.111/24;192.168.1.1
 dns=8.8.8.8;8.8.4.4;
 ```
-For address, the value before the comma is the IP address and subnet prefix bitlength; the second value is the IP address of the gateway.
+
+For `address`, the value before the semicolon is the IP address and subnet prefix bitlength. The second value (after the semicolon) is the IP address of the local gateway.
 
 ## Tips
 
@@ -86,59 +91,63 @@ For address, the value before the comma is the IP address and subnet prefix bitl
 If you want to reset the network configuration back to the default DHCP settings, use the following commands on the host:
 
 ```bash
-$ rm /etc/NetworkManager/system-connections/*
-$ cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/
-$ nmcli con reload
+# rm /etc/NetworkManager/system-connections/*
+# cp /usr/share/system-connections/* /etc/NetworkManager/system-connections/
+# nmcli con reload
 ```
 
 ### Powersave
 
-If you have trouble with powersave you can do following:
+If you have trouble with powersave then apply the following changes:
 
 ```ini
 [wifi]
 # Values are 0 (use default), 1 (ignore/don't touch), 2 (disable) or 3 (enable).
 powersave=0
 ```
-## Using nmcli to set a static IPV4 address
 
-Log into the HASSOS base system via a console:
+## Using `nmcli` to set a static IPv4 address
 
+Log into the the HassOS base system via a console:
+
+```bash
+Welcome to Home Assistant
+homeassistant login:
 ```
-Welcome to HassOS
-Hassio login:
+
+- Login as `root` (no password needed). At the `ha >` prompt, type `login` (as instructed).
+
+From there you use the `nmcli` configuration tool.
+
+- `# nmcli con show` will list the "HassOS default" connection in use.
+- `# nmcli con show "HassOS default"` will list all the properties of the connection.
+
+To start editing the configuration setting for "HassOS default":
+
+```bash
+# nmcli con edit "HassOS default"
 ```
-Login as `root` (no password needed)
-
-At the `hassio >` prompt, type `login` (as instructed).
-
-From here you will use the `nmcli` configuration tool.
-
-`# nmcli connection show` will list the “HassOS default” connection in use.
-
-`# nmcli con show "HassOS default"` will list all the properties of the connection.
-
-`# nmcli con edit "HassOS default"` will put you in a position to edit the connection.
-
-`nmcli> print ipv4` will show you the ipv4 properties of this connection.
 
 To add your static IP address (select 'yes' for manual method);
-```
+
+```bash
 nmcli> set ipv4.addresses 192.168.100.10/24
 Do you also want to set 'ipv4.method' to 'manual'? [yes]:
 ```
-In addition I have found it is wise to set the dns server and the local gateway.  For most home routers these will be the same address.  If you are using Pi-Hole you can set the dns to that.
-```
+
+In addition, it's recommended to set the DNS server and the local gateway. For most home routers the DNS server will have the same IP address as the router itself. If you are using Pi-Hole or a third-party DNS system then you can set the DNS server to that.
+
+```bash
 nmcli> set ipv4.dns 192.168.100.1
 nmcli> set ipv4.gateway 192.168.100.1
-nmcli> save
-nmcli> quit
 ```
 
+`nmcli> print ipv4` will show you the IPv4 properties of this connection. With `nmcli> save` you will save the changes afterwards.
+
 If you now view the default connection `cat /etc/NetworkManager/system-connections/default` you should see the method is manual and the address is set.
 
-Doing a `nmcli con reload` does not always work so restart the VM.
+Doing a `nmcli con reload` does not always work, so restart the virtual machine or the physical system.
 
-[keyfile]: https://developer.gnome.org/NetworkManager/stable/nm-settings.html
+[nm-manual]: https://developer.gnome.org/NetworkManager/stable/NetworkManager.conf.html
 [configuration-usb]: configuration.md
 [uuid]: https://www.uuidgenerator.net/

Documentation/partition.md

@@ -0,0 +1,68 @@
+# Partition
+
+The partition layout is a bit different than for regular setups. We prefer GPT, if possible. With SoCs which don't support GPT, we use the hybrid GPT. For more details about this topic, please refer to the [development](development.md) documentation.
+
+The system is designed to have as less as possible write operations on the storage media. Which means that we have basically only write during the OTA update and 5-6 times per week on the overlay part. The data partition is having I/O. This is the reason which is should be run on a different drive.
+
+A visual representation looks like this:
+
+```text
+-------------------------
+|       Bootloader      |
+-------------------------
+|       Kernel A        |
+-------------------------
+|       System A        |
+|                       |
+-------------------------
+|       Kernel B        |
+-------------------------
+|       System B        |
+|                       |
+-------------------------
+|       Bootstate       |
+-------------------------
+|       Overlay         |
+|                       |
+...
+
+-------------------------
+|       Data            |
+|                       |
+-------------------------
+```
+
+Sometime the bootloader part can look different because there can be firmware or SPLs for boot the CPU on the SoC.
+
+## Data
+
+The data partition is the only partition with real I/O. It will be expanded automatically at boot to the full size of the disk.
+
+
+## Using datactl to move the data partition.
+
+In a Home Assistant OS installation, the data is stored on the `/mnt/data` partition of the SD card. This is the only read+write partition on the SD drive. Using the `datactl` move command, this partition can be moved off of the SD card onto an externally connected drive, leaving the rest of the read-only system on the SD.
+
+The storage capacity of the external drive must be larger than the storage capacity of the existing SD card.
+
+The command needs to be run from the host console by either connecting a keyboard and monitor or making use of the [debug ssh access](https://developers.home-assistant.io/docs/operating-system/debugging/) over port 22222. The command will not work from within an SSH add-on container.
+
+Log in as `root` to get to the Home Assistant CLI and then enter `login` to continue to the host.
+
+Confirm your USB SSD/HD is connected and recognized using `fdisk -l`.
+
+It is recommended to use fdisk to remove the existing partition(s) before proceeding.
+
+- Type `fdisk /dev/XXX` (replacing XXX with your drive)
+- Type `d` to delete a partition.
+- Continue if needed, then write the changes.
+
+Creating a new partition is not necessary.
+
+With the drive now prepared, use the below command (again, replacing XXX with your drive)
+
+```sh
+$ datactl move /dev/xxx
+```
+
+Hit any key to continue, and then the move will happen after the next reboot. Once complete, the external drive will be owned and used by the system.

README.md

@@ -1,15 +1,18 @@
-[![Build Status](https://dev.azure.com/home-assistant/Hass.io/_apis/build/status/hassos?branchName=dev)](https://dev.azure.com/home-assistant/Hass.io/_build/latest?definitionId=13&branchName=dev)
+# Home Assistant Operating system
 
-# HassOS
-Hass.io OS based on [buildroot](https://buildroot.org/). It's a hypervisor for Docker and supports various kind of IoT hardware. It is also available as virtual appliance. The whole system is optimized for embedded system and  security. You can update the system simple with OTA updates or offline updates.
+Home Assistant Operating System (HassOS) is based on [buildroot](https://buildroot.org/). It's a hypervisor for Docker and supports various kind of hardware. It is also available as virtual appliance for different virtualization solutions. The whole system is optimized for hosting [Home Assistant](https://www.home-assistant.io) and its features (to be precise, the [Add-ons](https://www.home-assistant.io/addons/)). You can update the system by using OTA updates or offline updates.
+
+This is an embedded Linux which works different than a normal Linux distribution. The system is designed to run with minimal I/O and is optimized for its tasks.
+
+If you don't have experience with embedded systems, buildroot or the build process Linux distributions, then please read up on those topics. All provided documentation here is focusing on developers with a background on embedded systems or a strong understanding of the internal workings of operating systems.
 
 ## Focus
 
 - Barebox as bootloader on EFI
-- U-Boot as bootloader on IoT
+- U-Boot as bootloader
+- Linux/Buildroot LTS
 - RAUC for OTA updates
 - SquashFS LZ4 as filesystem
-- Docker 18.09.0
+- Docker-CE
 - AppArmor protected
-- ZRAM LZ4 for /tmp, /var, swap
-- Run every supervisor
+- ZRAM LZ4 for `/tmp`, `/var` and swap

azure-pipelines-ci.yml

@@ -10,9 +10,9 @@ pr:
 
 variables:
   - name: versionHadolint
-    value: 'v1.16.3'
+    value: 'v1.17.2'
   - name: versionShellCheck
-    value: 'v0.6.0'
+    value: 'v0.7.0'
 
 jobs:
 
@@ -38,11 +38,15 @@ jobs:
       sudo docker pull koalaman/shellcheck:$(versionShellCheck)
     displayName: 'Install ShellCheck'
   - script: |
+      set -e
+
+      # Check build script
       sudo docker run --rm -i \
         -v $(pwd):/mnt:ro koalaman/shellcheck:$(versionShellCheck) \
           scripts/*.sh \
           buildroot-external/scripts/*.sh \
           buildroot-external/board/**/*.sh \
+          buildroot-external/rootfs-overlay/usr/bin/* \
           buildroot-external/rootfs-overlay/usr/sbin/* \
           buildroot-external/rootfs-overlay/usr/libexec/* \
           buildroot-external/rootfs-overlay/usr/lib/rauc/*

azure-pipelines-release.yml

@@ -11,9 +11,9 @@ pr: none
 
 variables:
   - name: versionGHR
-    value: 'v0.12.1'
+    value: 'v0.13.0'
   - group: github
-  - group: hassos
+  - group: rauc
 
 jobs:
 
@@ -46,10 +46,10 @@ jobs:
         board: 'intel_nuc'
       OdroidC2:
         board: 'odroid_c2'
+      OdroidN2:
+        board: 'odroid_n2'
       OdroidXU4:
         board: 'odroid_xu4'
-      OrangePiPrime:
-        board: 'opi_prime'
       RaspberryPi:
         board: 'rpi'
       RaspberryPi0-W:
@@ -91,5 +91,5 @@ jobs:
         hassos:azure make $(board)
     displayName: 'Build $(board)'
   - script: |
-      ./ghr -t $(githubToken) $(Build.SourceBranchName) release/
+      ./ghr -t $(githubToken) -replace $(Build.SourceBranchName) release/
     displayName: 'Upload $(board)'

buildroot-external/Config.in

@@ -1,6 +1,8 @@
-source "$BR2_EXTERNAL_HASSOS_PATH/package/hassos/Config.in"
+source "$BR2_EXTERNAL_HASSOS_PATH/package/hassio/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/libapparmor/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/apparmor/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-bcm43xx/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/bluetooth-rtl8723/Config.in"
 source "$BR2_EXTERNAL_HASSOS_PATH/package/hardkernel-boot/Config.in"
+source "$BR2_EXTERNAL_HASSOS_PATH/package/qemu-guest-agent/Config.in"
+source "$BR2_EXTERNAL_HASSOS_PATH/package/intel-e1000e/Config.in"

buildroot-external/board/asus/hassos-hook.sh

@@ -12,14 +12,15 @@ function hassos_pre_image() {
     echo "console=tty1" > "${BOOT_DATA}/cmdline.txt"
 
     # Create boot binary
-    rm -f "${BINARIES_DIR}/u-boot-spl-dtb.img"
-    mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-spl-dtb.bin" "${BINARIES_DIR}/u-boot-spl-dtb.img"
-    cat "${BINARIES_DIR}/u-boot-dtb.bin" >> "${BINARIES_DIR}/u-boot-spl-dtb.img"
+    rm -f "${BINARIES_DIR}/idbloader.img"
+    mkimage -n rk3288 -T rksd -d "${BINARIES_DIR}/u-boot-tpl.bin" "${BINARIES_DIR}/idbloader.img"
+    cat "${BINARIES_DIR}/u-boot-spl.bin" >> "${BINARIES_DIR}/idbloader.img"
 
     # SPL
     create_spl_image
 
-    dd if="${BINARIES_DIR}/u-boot-spl-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
+    dd if="${BINARIES_DIR}/idbloader.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=64
+    dd if="${BINARIES_DIR}/u-boot-dtb.img" of="${SPL_IMG}" conv=notrunc bs=512 seek=12288
 }
 
 

buildroot-external/board/asus/tinker/meta

@@ -3,5 +3,8 @@ BOARD_NAME="Asus TinkerBoard"
 CHASSIS=embedded
 BOOTLOADER=uboot
 KERNEL_FILE=zImage
-BOOT_SYS=spl
+BOOT_SYS=hyprid
+BOOT_SPL=true
 BOOT_ENV_SIZE=0x8000
+SUPERVISOR_MACHINE=tinker
+SUPERVISOR_ARCH=armv7

buildroot-external/board/asus/tinker/patches/linux/0001-Mali-midgard-r19p0-fixes-for-4.13-kernels.patch

@@ -1,122 +0,0 @@
-From 7ba71967a2678e119bcd819ac92d08bd038e1879 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 17 Jul 2017 18:34:33 +0000
-Subject: [PATCH 5/5] Mali midgard r19p0 fixes for 4.13 kernels
-
-Mostly due to DMA structure members renamed, and some signatures
-modifications done during the development of Linux 4.11.
-
-* mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to take only vmf
-  11bac80004499ea59f361ef2a5516c84b6eab675
-  v4.11-rc1
-
-* sched/headers: Move task->mm handling methods to <linux/sched/mm.h>
-  68e21be2916b359fd8afb536c1911dc014cfd03e
-  v4.11-rc1
-
-* sched/headers: Move task-stack related APIs from <linux/sched.h> to
-  <linux/sched/task_stack.h>
-  f3ac60671954c8d413532627b1be13a76f394c49
-  v4.11-rc1
-
-* dma-fence: Introduce drm_fence_set_error() helper
-  a009e975da5c7d42a7f5eaadc54946eb5f76c9af
-  v4.11-rc1
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase.h           |  4 ++++
- drivers/gpu/arm/midgard/mali_kbase_fence.h     |  4 ++++
- drivers/gpu/arm/midgard/mali_kbase_mem_linux.c |  6 ++++++
- drivers/gpu/arm/midgard/mali_kbase_sync_file.c | 12 ++++++++++++
- 4 files changed, 26 insertions(+)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
-index d77f186..5ee47c4 100644
---- a/drivers/gpu/arm/midgard/mali_kbase.h
-+++ b/drivers/gpu/arm/midgard/mali_kbase.h
-@@ -35,6 +35,10 @@
- #include <linux/mutex.h>
- #include <linux/rwsem.h>
- #include <linux/sched.h>
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
-+#include <linux/sched/task_stack.h>
-+#include <linux/sched/mm.h>
-+#endif
- #include <linux/slab.h>
- #include <linux/spinlock.h>
- #include <linux/vmalloc.h>
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_fence.h b/drivers/gpu/arm/midgard/mali_kbase_fence.h
-index 8d39299..3c2e3a9 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_fence.h
-+++ b/drivers/gpu/arm/midgard/mali_kbase_fence.h
-@@ -134,7 +134,11 @@ static inline bool kbase_fence_out_is_ours(struct kbase_jd_atom *katom)
- static inline int kbase_fence_out_signal(struct kbase_jd_atom *katom,
- 					 int status)
- {
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
- 	katom->dma_fence.fence->status = status;
-+#else
-+	katom->dma_fence.fence->error = status;
-+#endif
- 	return dma_fence_signal(katom->dma_fence.fence);
- }
- 
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
-index b1f2c46..896aa35 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
-@@ -1788,8 +1788,14 @@ static void kbase_cpu_vm_close(struct vm_area_struct *vma)
- KBASE_EXPORT_TEST_API(kbase_cpu_vm_close);
- 
- 
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
- static int kbase_cpu_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
- {
-+#else
-+static int kbase_cpu_vm_fault(struct vm_fault *vmf)
-+{
-+	struct vm_area_struct *vma = vmf->vma;
-+#endif
- 	struct kbase_cpu_mapping *map = vma->vm_private_data;
- 	pgoff_t rel_pgoff;
- 	size_t i;
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
-index 4e1621c..d84a54e 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
-@@ -161,8 +161,13 @@ static void kbase_fence_wait_callback(struct dma_fence *fence,
- 	struct kbase_context *kctx = katom->kctx;
- 
- 	/* Cancel atom if fence is erroneous */
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
- 	if (dma_fence_is_signaled(kcb->fence) && kcb->fence->status < 0)
- 		katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
-+#else
-+	if (dma_fence_is_signaled(kcb->fence) && kcb->fence->error < 0)
-+		katom->event_code = BASE_JD_EVENT_JOB_CANCELLED;
-+#endif
- 
- 	if (kbase_fence_dep_count_dec_and_test(katom)) {
- 		/* We take responsibility of handling this */
-@@ -273,10 +278,17 @@ static void kbase_sync_fence_info_get(struct dma_fence *fence,
- 	 * 1 : signaled
- 	 */
- 	if (dma_fence_is_signaled(fence)) {
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0))
- 		if (fence->status < 0)
- 			info->status = fence->status; /* signaled with error */
- 		else
- 			info->status = 1; /* signaled with success */
-+#else
-+		if (fence->error < 0)
-+			info->status = fence->error; /* signaled with error */
-+		else
-+			info->status = 1; /* signaled with success */
-+#endif
- 	} else  {
- 		info->status = 0; /* still active (unsignaled) */
- 	}
--- 
-2.10.2
-

buildroot-external/board/asus/tinker/patches/linux/0002-Using-the-new-header-on-4.12-kernels-for-copy_-_user.patch

@@ -1,36 +0,0 @@
-From f76c9c58669a3bba0456191431be558ab8054f50 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 17 Jul 2017 11:43:00 +0000
-Subject: [PATCH 3/5] Using the new header on 4.12 kernels for copy_*_user
-
-These changes are due to :
-* generic ...copy_..._user primitives
-  d597580d373774b1bdab84b3d26ff0b55162b916
-  Version : 4.12-rc1
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/base/ump/src/linux/ump_kernel_linux.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/base/ump/src/linux/ump_kernel_linux.c b/drivers/base/ump/src/linux/ump_kernel_linux.c
-index d6c3c53..bb3a7f0 100644
---- a/drivers/base/ump/src/linux/ump_kernel_linux.c
-+++ b/drivers/base/ump/src/linux/ump_kernel_linux.c
-@@ -20,7 +20,12 @@
- #include <linux/ump-ioctl.h>
- #include <linux/ump.h>
- 
--#include <asm/uaccess.h>	         /* copy_*_user */
-+#include <linux/version.h>
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)
-+#include <asm/uaccess.h>             /* copy_*_user */
-+#else
-+#include <linux/uaccess.h>           /* copy_*_user */
-+#endif
- #include <linux/compat.h>
- #include <linux/module.h>            /* kernel module definitions */
- #include <linux/fs.h>                /* file system operations */
--- 
-2.10.2
-

buildroot-external/board/asus/tinker/patches/linux/0003-Adapt-get_user_pages-calls-to-use-the-new-calling-pr.patch

@@ -1,46 +0,0 @@
-From 63c110cdebc2c692964e1250c6f74f9e8c47c85d Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Tue, 10 Jan 2017 04:28:48 +0000
-Subject: [PATCH 4/5] Adapt get_user_pages calls to use the new calling
- procedure
-
-These changes are due to this commit:
-mm: replace get_user_pages_remote() write/force parameters with gup_flags
-9beae1ea89305a9667ceaab6d0bf46a045ad71e7
-Kernel: 4.9.0-rc
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/base/ump/src/linux/ump_kernel_linux_mem.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
-index 9186dd0..def4c0e 100644
---- a/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
-+++ b/drivers/base/ump/src/linux/ump_kernel_linux_mem.c
-@@ -35,6 +35,10 @@
- #include <ump_arch.h>
- #include <common/ump_kernel_priv.h>
- 
-+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0))
-+#include <linux/pfn_t.h>
-+#endif
-+
- static void umpp_vm_close(struct vm_area_struct *vma)
- {
- 	umpp_cpu_mapping * mapping;
-@@ -222,7 +226,11 @@ int umpp_linux_mmap(struct file * filp, struct vm_area_struct * vma)
- 				paddr = alloc->block_array[block_idx].addr;
- 			}
- 
-+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,0))
- 			err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), paddr >> PAGE_SHIFT);
-+#else
-+			err = vm_insert_mixed(vma, vma->vm_start + (i << PAGE_SHIFT), __pfn_to_pfn_t(paddr >> PAGE_SHIFT, PFN_DEV));
-+#endif
- 			paddr += PAGE_SIZE;
- 		}
- 
--- 
-2.10.2
-

buildroot-external/board/asus/tinker/patches/linux/0004-Don-t-be-TOO-severe-when-looking-for-the-IRQ-names.patch

@@ -1,40 +0,0 @@
-From 7c27055687c595e9f9eca484314f4fe3866a4260 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Tue, 18 Jul 2017 17:35:16 +0000
-Subject: [PATCH 2/2] Don't be TOO severe when looking for the IRQ names
-
-Using strncmp with an all caps result in the driver being unable to
-initialize itself when using the mainlined RK3288 DTS files, since they
-define the IRQ names as "job", "mmu" and "gpu" instead of "JOB", "MMU"
-and "GPU".
-
-strncmp calls have been replaced by strncasecmp calls in order to
-avoid such issue.
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-index 0cccb0b..9cc65d2 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-@@ -938,11 +938,11 @@ static int assign_irqs(struct platform_device *pdev)
- 		}
- 
- #ifdef CONFIG_OF
--		if (!strncmp(irq_res->name, "JOB", 4)) {
-+		if (!strncasecmp(irq_res->name, "JOB", 4)) {
- 			irqtag = JOB_IRQ_TAG;
--		} else if (!strncmp(irq_res->name, "MMU", 4)) {
-+		} else if (!strncasecmp(irq_res->name, "MMU", 4)) {
- 			irqtag = MMU_IRQ_TAG;
--		} else if (!strncmp(irq_res->name, "GPU", 4)) {
-+		} else if (!strncasecmp(irq_res->name, "GPU", 4)) {
- 			irqtag = GPU_IRQ_TAG;
- 		} else {
- 			dev_err(&pdev->dev, "Invalid irq res name: '%s'\n",
--- 
-2.10.2
-

buildroot-external/board/asus/tinker/patches/linux/0005-Added-the-new-compatible-list-mainly-used-by-Rockchi.patch

@@ -1,42 +0,0 @@
-From ef7689887c31d2b1336e14f2c089185e8f60a9f1 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 7 Aug 2017 19:22:39 +0000
-Subject: [PATCH] Added the new "compatible" list, mainly used by Rockchip
-
-Because, you know, all the Mali Midgard GPU used to define the GPU
-using the 'compatible = "arm,mali-midgard"' property, which worked fine.
-
-But it was removed.
-
-They replaced the "arm,mali-midgard" node by "arm,mali-tXXX" where XXX
-is the GPU series, and added "arm,rk3288-mali" which is used by nothing.
-
-Which broke the Mali Midgard GPL kernel driver.
-
-This patch fixes this issue.
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-index 27dcd9c1..cc4932a4 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-@@ -4742,6 +4742,12 @@ static const struct dev_pm_ops kbase_pm_ops = {
- static const struct of_device_id kbase_dt_ids[] = {
- 	{ .compatible = "arm,malit6xx" },
- 	{ .compatible = "arm,mali-midgard" },
-+	{ .compatible = "arm,mali-t720" },
-+	{ .compatible = "arm,mali-t760" },
-+	{ .compatible = "arm,mali-t820" },
-+	{ .compatible = "arm,mali-t830" },
-+	{ .compatible = "arm,mali-t860" },
-+	{ .compatible = "arm,mali-t880" },
- 	{ /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, kbase_dt_ids);
--- 
-2.13.0
-

buildroot-external/board/asus/tinker/patches/linux/0006-gpu-arm-Midgard-setup_timer-timer_setup.patch

@@ -1,98 +0,0 @@
-From ee7f0a678fff8316ec0be973f1b3780a63f50942 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Mon, 11 Dec 2017 21:04:56 +0100
-Subject: [PATCH] gpu: arm: Midgard: setup_timer() -> timer_setup()
-
-This patch is due the changes provoked by series of commit ending
-at 513ae785c63c30741e46f43960213d4ae5382ec0, and removing the
-setup_timer macros.
-The previous patches replaced made sure that timers were all set
-up with setup_timer and replaced setup_timer calls by timer_setup
-calls.
-
-This changed was introduced in the 4.15-rc1.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase.h          | 2 +-
- drivers/gpu/arm/midgard/mali_kbase_context.c  | 4 ++--
- drivers/gpu/arm/midgard/mali_kbase_softjobs.c | 4 ++--
- drivers/gpu/arm/midgard/mali_kbase_tlstream.c | 6 ++----
- 4 files changed, 7 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase.h b/drivers/gpu/arm/midgard/mali_kbase.h
-index a4ceab9e0..27bde3b71 100644
---- a/drivers/gpu/arm/midgard/mali_kbase.h
-+++ b/drivers/gpu/arm/midgard/mali_kbase.h
-@@ -213,7 +213,7 @@ int kbase_soft_event_update(struct kbase_context *kctx,
- 
- bool kbase_replay_process(struct kbase_jd_atom *katom);
- 
--void kbasep_soft_job_timeout_worker(unsigned long data);
-+void kbasep_soft_job_timeout_worker(struct timer_list *t);
- void kbasep_complete_triggered_soft_events(struct kbase_context *kctx, u64 evt);
- 
- /* api used internally for register access. Contains validation and tracing */
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_context.c b/drivers/gpu/arm/midgard/mali_kbase_context.c
-index f43db48fd..589df768c 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_context.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_context.c
-@@ -165,9 +165,9 @@ kbase_create_context(struct kbase_device *kbdev, bool is_compat)
- 
- 	mutex_init(&kctx->vinstr_cli_lock);
- 
--	setup_timer(&kctx->soft_job_timeout,
-+	timer_setup(&kctx->soft_job_timeout,
- 		    kbasep_soft_job_timeout_worker,
--		    (uintptr_t)kctx);
-+		    0);
- 
- 	return kctx;
- 
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
-index 127ada07f..019edf562 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
-@@ -370,9 +370,9 @@ static void kbase_fence_debug_timeout(struct kbase_jd_atom *katom)
- }
- #endif /* CONFIG_MALI_FENCE_DEBUG */
- 
--void kbasep_soft_job_timeout_worker(unsigned long data)
-+void kbasep_soft_job_timeout_worker(struct timer_list *t)
- {
--	struct kbase_context *kctx = (struct kbase_context *)data;
-+	struct kbase_context *kctx = from_timer(kctx, t, soft_job_timeout);
- 	u32 timeout_ms = (u32)atomic_read(
- 			&kctx->kbdev->js_data.soft_job_timeout_ms);
- 	struct timer_list *timer = &kctx->soft_job_timeout;
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
-index d01aa23b2..11d8b59c7 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_tlstream.c
-@@ -1042,13 +1042,11 @@ static void kbasep_tlstream_flush_stream(enum tl_stream_type stype)
-  * Timer is executed periodically to check if any of the stream contains
-  * buffer ready to be submitted to user space.
-  */
--static void kbasep_tlstream_autoflush_timer_callback(unsigned long data)
-+static void kbasep_tlstream_autoflush_timer_callback(struct timer_list *unused)
- {
- 	enum tl_stream_type stype;
- 	int                 rcode;
- 
--	CSTD_UNUSED(data);
--
- 	for (stype = 0; stype < TL_STREAM_TYPE_COUNT; stype++) {
- 		struct tl_stream *stream = tl_stream[stype];
- 		unsigned long    flags;
-@@ -1371,7 +1369,7 @@ int kbase_tlstream_init(void)
- 
- 	/* Initialize autoflush timer. */
- 	atomic_set(&autoflush_timer_active, 0);
--	setup_timer(&autoflush_timer,
-+	timer_setup(&autoflush_timer,
- 			kbasep_tlstream_autoflush_timer_callback,
- 			0);
- 
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/0007-drivers-gpu-Arm-Midgard-Replace-ACCESS_ONCE-by-READ_.patch

@@ -1,35 +0,0 @@
-From 44a5ba2e969adfb64c84f294c16490194988dcc7 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Sun, 24 Dec 2017 19:30:12 +0100
-Subject: [PATCH] drivers: gpu: Arm: Midgard: Replace ACCESS_ONCE by READ_ONCE
-
-The ACCESS_ONCE macro has now been removed in the 4.15.0-rc4,
-and every ACCESS_ONCE call has been replaced by either READ_ONCE or
-WRITE_ONCE calls.
-Since the Midgard GPU drivers are not mainlined, the change
-needs to be applied manually.
-
-See commit b899a850431e2dd0943205a63a68573f3e312d0d and its parents,
-for more informations.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_mem.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_mem.h b/drivers/gpu/arm/midgard/mali_kbase_mem.h
-index e9a8d5dd6..eac685699 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_mem.h
-+++ b/drivers/gpu/arm/midgard/mali_kbase_mem.h
-@@ -591,7 +591,7 @@ void kbase_mem_pool_free_pages(struct kbase_mem_pool *pool, size_t nr_pages,
-  */
- static inline size_t kbase_mem_pool_size(struct kbase_mem_pool *pool)
- {
--	return ACCESS_ONCE(pool->cur_size);
-+	return READ_ONCE(pool->cur_size);
- }
- 
- /**
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/0008-gpu-arm-midgard-Remove-sys_close-references.patch

@@ -1,32 +0,0 @@
-From 47e8aad9419ff8843a373c3e5aa2c9d261d8cd07 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Mon, 23 Apr 2018 20:54:13 +0200
-Subject: [PATCH] gpu: arm: midgard: Remove sys_close references
-
-sys_close is now replaced by ksys_close in an effort to remove
-in-kernel system calls references.
-
-See 2ca2a09d6215fd9621aa3e2db7cc9428a61f2911 and
-https://lkml.org/lkml/2018/3/25/93 for more details.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_sync.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_sync.h b/drivers/gpu/arm/midgard/mali_kbase_sync.h
-index de72147d..33b58059 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_sync.h
-+++ b/drivers/gpu/arm/midgard/mali_kbase_sync.h
-@@ -156,7 +156,7 @@ void kbase_sync_fence_out_remove(struct kbase_jd_atom *katom);
-  */
- static inline void kbase_sync_fence_close_fd(int fd)
- {
--	sys_close(fd);
-+	ksys_close(fd);
- }
- 
- /**
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/0009-GPU-ARM-Midgard-Adapt-to-the-new-mmap-call-checks.patch

@@ -1,34 +0,0 @@
-From 9812105eb6220863af05fc72591118f0a48e1c4e Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Mon, 21 May 2018 22:32:59 +0200
-Subject: [PATCH] GPU: ARM: Midgard: Adapt to the new mmap call checks.
-
-Now, I don't know if this driver is just one of these "buggy" drivers
-Linus is talking about, or if this is just standard GPU procedure.
-
-Anyway, this patch is due to this change by Linus Torvalds :
-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=be83bbf806822b1b89e0a0f23cd87cddc409e429
-
-And the fix is inspired by :
-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76ef6b28ea4f81c3d511866a9b31392caa833126
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-index cc4932a4ead7..89b4cca27cf1 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-@@ -1087,6 +1087,7 @@ static int kbase_open(struct inode *inode, struct file *filp)
- 
- 	init_waitqueue_head(&kctx->event_queue);
- 	filp->private_data = kctx;
-+	filp->f_mode |= FMODE_UNSIGNED_OFFSET;
- 	kctx->filp = filp;
- 
- 	if (kbdev->infinite_cache_active_default)
--- 
-2.17.0
-

buildroot-external/board/asus/tinker/patches/linux/0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch

@@ -1,76 +0,0 @@
-From 9bf91a052d8ceddfd5808547a51e167fb7463754 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Wed, 18 Jul 2018 19:59:21 +0200
-Subject: [PATCH] GPU: Mali: Midgard: remove rcu_read_lock references
-
-This patch is actually based on @mihailescu2m patch.
-This removes references to rcu_read_lock when acquiring the OPP table,
-as it is useless since.
-See :
-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/base/power/opp/core.c?id=5b650b388844f26c61c70564865598836d05dcb3
-
-The current rcu_read_lock actually generates some issues with recent
-kernels.
-See here :
-https://community.arm.com/graphics/f/discussions/9207/midgard-r20p0-kernel-drivers-errors
-
-The patch has been recreated since it does not apply directly on r19p0
-sources (I guess the affected line numbers slightly differ...).
-
-@mihailescu2m patch for the Mali Midgard r20p0 kernel driver can be
-acquired here :
-https://github.com/mihailescu2m/linux/commit/bbe73c3c1143e5991bdcaee3afaecf5c31af0647
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
-index e280322e..bf69d897 100644
---- a/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
-+++ b/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
-@@ -87,10 +87,9 @@ kbase_devfreq_target(struct device *dev, unsigned long *target_freq, u32 flags)
- 
- 	freq = *target_freq;
- 
--	rcu_read_lock();
- 	opp = devfreq_recommended_opp(dev, &freq, flags);
- 	voltage = dev_pm_opp_get_voltage(opp);
--	rcu_read_unlock();
-+
- 	if (IS_ERR_OR_NULL(opp)) {
- 		dev_err(dev, "Failed to get opp (%ld)\n", PTR_ERR(opp));
- 		return PTR_ERR(opp);
-@@ -186,20 +185,17 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
- 	unsigned long freq;
- 	struct dev_pm_opp *opp;
- 
--	rcu_read_lock();
- 	count = dev_pm_opp_get_opp_count(kbdev->dev);
- 	if (count < 0) {
- 		rcu_read_unlock();
- 		return count;
- 	}
--	rcu_read_unlock();
- 
- 	dp->freq_table = kmalloc_array(count, sizeof(dp->freq_table[0]),
- 				GFP_KERNEL);
- 	if (!dp->freq_table)
- 		return -ENOMEM;
- 
--	rcu_read_lock();
- 	for (i = 0, freq = ULONG_MAX; i < count; i++, freq--) {
- 		opp = dev_pm_opp_find_freq_floor(kbdev->dev, &freq);
- 		if (IS_ERR(opp))
-@@ -207,7 +203,6 @@ static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
- 
- 		dp->freq_table[i] = freq;
- 	}
--	rcu_read_unlock();
- 
- 	if (count != i)
- 		dev_warn(kbdev->dev, "Unable to enumerate all OPPs (%d!=%d\n",
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/1-2-regulator-act8865-add-restart-handler-for-act8846.patch

@@ -9,9 +9,9 @@ index 2ff73d7..836d10b 100644
 --- a/drivers/regulator/act8865-regulator.c
 +++ b/drivers/regulator/act8865-regulator.c
 @@ -27,6 +27,7 @@
- #include <linux/of_device.h>
  #include <linux/regulator/of_regulator.h>
  #include <linux/regmap.h>
+ #include <dt-bindings/regulator/active-semi,8865-regulator.h>
 +#include <linux/reboot.h>
  
  /*

buildroot-external/board/asus/tinker/patches/linux/1001-drivers-Integrating-Mali-Midgard-video-and-gpu-drive.patch

@@ -1,39 +0,0 @@
-From fe85565d9ed8212cbda2148d4731418a36a8d088 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Mon, 11 Dec 2017 21:53:28 +0100
-Subject: [PATCH 1/3] drivers: Integrating Mali Midgard video and gpu drivers.
-
-I'm dropping the UMP drivers. They are not maintained.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/gpu/Makefile  | 2 +-
- drivers/video/Kconfig | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
-index e9ed439a5..66386b42a 100644
---- a/drivers/gpu/Makefile
-+++ b/drivers/gpu/Makefile
-@@ -2,5 +2,5 @@
- # taken to initialize them in the correct order. Link order is the only way
- # to ensure this currently.
- obj-$(CONFIG_TEGRA_HOST1X)	+= host1x/
--obj-y			+= drm/ vga/
-+obj-y			+= drm/ vga/ arm/
- obj-$(CONFIG_IMX_IPUV3_CORE)	+= ipu-v3/
-diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 3c20af999..041e15f2c 100644
---- a/drivers/video/Kconfig
-+++ b/drivers/video/Kconfig
-@@ -17,6 +17,7 @@ source "drivers/gpu/vga/Kconfig"
- 
- source "drivers/gpu/host1x/Kconfig"
- source "drivers/gpu/ipu-v3/Kconfig"
-+source "drivers/gpu/arm/midgard/Kconfig"
- 
- source "drivers/gpu/drm/Kconfig"
- 
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/1004-Remove-the-dependency-to-the-clk_mali-symbol.patch

@@ -1,30 +0,0 @@
-From 239a5e3016b7f676bc3f56ea509ed172bf954001 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Sat, 22 Jul 2017 04:07:36 +0000
-Subject: [PATCH] Remove the dependency to the clk_mali symbol.
-
-Inspired by @wzzy2 patch
-
-https://github.com/rockchip-linux/rockchip_forwardports/commit/359865c617129fe5fcc5530f4a88abcfaa6a5cb4
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/gpu/arm/midgard/mali_kbase_core_linux.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-index 9cc65d2..27dcd9c 100644
---- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-+++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
-@@ -3793,7 +3793,7 @@ static int power_control_init(struct platform_device *pdev)
- 	}
- #endif /* LINUX_VERSION_CODE >= 3, 12, 0 */
- 
--	kbdev->clock = clk_get(kbdev->dev, "clk_mali");
-+	kbdev->clock = of_clk_get(kbdev->dev->of_node, 0);
- 	if (IS_ERR_OR_NULL(kbdev->clock)) {
- 		err = PTR_ERR(kbdev->clock);
- 		kbdev->clock = NULL;
--- 
-2.10.2
-

buildroot-external/board/asus/tinker/patches/linux/1005-ASUS-Tinkerboard-Stupid-reboot.patch

@@ -1,157 +0,0 @@
-From bf9b932f6ae506baf5b79c8407089448ed77fc56 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Sun, 17 Dec 2017 16:15:03 +0100
-Subject: [PATCH] ASUS Tinkerboard: Stupid reboot patch
-
-This patch is ugly as shit and will be reworked when possible.
-
-Meanwhile, this fixes an issue with the ASUS Tinkerboard which
-cannot reboot correctly. The issue is that the MMC hardware is
-shutdown during the reboot phase and is not powered again after
-the power cycle, leading to a dead board awaiting a hard power
-cycle.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/mmc/host/dw_mmc-rockchip.c | 24 ++++++++++++++++++++++++
- drivers/mmc/host/dw_mmc.c          | 28 ++++++++++++++++++++++++++++
- include/linux/reboot.h             |  2 ++
- kernel/reboot.c                    |  1 +
- 4 files changed, 55 insertions(+)
-
-diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
-index a3f1c2b30..52c13733f 100644
---- a/drivers/mmc/host/dw_mmc-rockchip.c
-+++ b/drivers/mmc/host/dw_mmc-rockchip.c
-@@ -14,10 +14,12 @@
- #include <linux/of_address.h>
- #include <linux/mmc/slot-gpio.h>
- #include <linux/pm_runtime.h>
-+#include <linux/regulator/consumer.h> // Stupid Tinkerboard Hack
- #include <linux/slab.h>
- 
- #include "dw_mmc.h"
- #include "dw_mmc-pltfm.h"
-+#include "../core/core.h" // Stupid Tinkerboard Hack
- 
- #define RK3288_CLKGEN_DIV       2
- 
-@@ -365,6 +367,27 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev)
- 	return 0;
- }
- 
-+/* Stupid Tinkerboard Hack */
-+static void dw_mci_rockchip_platfm_shutdown(struct platform_device *pdev)
-+{
-+	struct dw_mci *host = platform_get_drvdata(pdev);
-+	struct mmc_host *mmc = host->slot->mmc;
-+	int ret;
-+
-+	if(of_machine_is_compatible("asus,rk3288-tinker")){
-+
-+		mmc_power_off(mmc);
-+
-+		mdelay(20);
-+
-+		if (!IS_ERR(mmc->supply.vmmc))
-+			ret = regulator_enable(mmc->supply.vmmc);
-+
-+		if (!IS_ERR(mmc->supply.vqmmc))
-+			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
-+	}
-+}
-+
- static int dw_mci_rockchip_remove(struct platform_device *pdev)
- {
- 	pm_runtime_get_sync(&pdev->dev);
-@@ -385,6 +408,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
- static struct platform_driver dw_mci_rockchip_pltfm_driver = {
- 	.probe		= dw_mci_rockchip_probe,
- 	.remove		= dw_mci_rockchip_remove,
-+	.shutdown	= dw_mci_rockchip_platfm_shutdown, // Stupid Tinkerboard Hack
- 	.driver		= {
- 		.name		= "dwmmc_rockchip",
- 		.of_match_table	= dw_mci_rockchip_match,
-diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
-index 0aa39975f..70f7ce21b 100644
---- a/drivers/mmc/host/dw_mmc.c
-+++ b/drivers/mmc/host/dw_mmc.c
-@@ -39,8 +39,10 @@
- #include <linux/of.h>
- #include <linux/of_gpio.h>
- #include <linux/mmc/slot-gpio.h>
-+#include <linux/reboot.h> // Stupid Tinkerboard Hack
- 
- #include "dw_mmc.h"
-+#include "../core/core.h" // Stupid Tinkerboard Hack
- 
- /* Common flag combinations */
- #define DW_MCI_DATA_ERROR_FLAGS	(SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
-@@ -2778,6 +2780,29 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
-+/* Stupid Tinkerboard Hack */
-+struct dw_mci *mSdhost;
-+void setmmcEmergency() {
-+	struct mmc_host *mmc;
-+	int ret;
-+
-+	printk(KERN_ERR "Emergency route taken.\n");
-+	if (of_machine_is_compatible("asus,rk3288-tinker")) {
-+		mmc = mSdhost->slot->mmc;
-+
-+		mmc_power_off(mmc);
-+
-+		mdelay(20);
-+
-+		if (!IS_ERR(mmc->supply.vmmc))
-+			ret = regulator_enable(mmc->supply.vmmc);
-+
-+		if (!IS_ERR(mmc->supply.vqmmc))
-+			regulator_set_voltage(mmc->supply.vqmmc, 3000000, 3300000);
-+	}
-+}
-+EXPORT_SYMBOL(setmmcEmergency);
-+
- static int dw_mci_init_slot(struct dw_mci *host)
- {
- 	struct mmc_host *mmc;
-@@ -2809,6 +2834,9 @@ static int dw_mci_init_slot(struct dw_mci *host)
- 		mmc->f_max = freq[1];
- 	}
- 
-+	/* Stupid Tinkerboard Hack */
-+	if (of_find_property(host->dev->of_node, "supports-sd", NULL))
-+		mSdhost = host;
- 	/*if there are external regulators, get them*/
- 	ret = mmc_regulator_get_supply(mmc);
- 	if (ret)
-diff --git a/include/linux/reboot.h b/include/linux/reboot.h
-index e63799a6e..057d3ce0c 100644
---- a/include/linux/reboot.h
-+++ b/include/linux/reboot.h
-@@ -77,6 +77,8 @@ extern char poweroff_cmd[POWEROFF_CMD_PATH_LEN];
- 
- extern void orderly_poweroff(bool force);
- extern void orderly_reboot(void);
-+/* Stupid Tinkerboard Hack */
-+extern void setmmcEmergency(void);
- 
- /*
-  * Emergency restart, callable from an interrupt handler.
-diff --git a/kernel/reboot.c b/kernel/reboot.c
-index e4ced883d..c8e678ce6 100644
---- a/kernel/reboot.c
-+++ b/kernel/reboot.c
-@@ -61,6 +61,7 @@ void (*pm_power_off_prepare)(void);
- void emergency_restart(void)
- {
- 	kmsg_dump(KMSG_DUMP_EMERG);
-+	setmmcEmergency(); // Stupid Tinkerboard Hack
- 	machine_emergency_restart();
- }
- EXPORT_SYMBOL_GPL(emergency_restart);
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/1006-soc-rockchip-power-domain-export-idle-request.patch

@@ -1,82 +0,0 @@
-From 4ffe79de7272234408a9179aa4c403ee1b67a362 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 7 Dec 2017 21:27:52 +0100
-Subject: [PATCH] soc: rockchip: power-domain: export idle request
-
-We need to put the power status of HEVC/RKVDEC IP into IDLE
-unless we can't reset that IP or the SoC would crash down.
-rockchip_pmu_idle_request(dev, true)---> enter idle
-rockchip_pmu_idle_request(dev, false)---> exit idle
-
-Only the video codec drivers of rockchip platform would
-request this patch currently.
-
-I am not sure whether it is necessary to add a new function
-at generic power domain. I want someone give me some advises
-here.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
- include/linux/rockchip_pmu.h      | 15 +++++++++++++++
- 2 files changed, 38 insertions(+)
- create mode 100644 include/linux/rockchip_pmu.h
-
-diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
-index 40b75748..0006ed53 100644
---- a/drivers/soc/rockchip/pm_domains.c
-+++ b/drivers/soc/rockchip/pm_domains.c
-@@ -180,6 +180,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
- 	return 0;
- }
- 
-+int rockchip_pmu_idle_request(struct device *dev, bool idle)
-+{
-+	struct generic_pm_domain *genpd;
-+	struct rockchip_pm_domain *pd;
-+	int ret;
-+
-+	if (IS_ERR_OR_NULL(dev))
-+		return -EINVAL;
-+
-+	if (IS_ERR_OR_NULL(dev->pm_domain))
-+		return -EINVAL;
-+
-+	genpd = pd_to_genpd(dev->pm_domain);
-+	pd = to_rockchip_pd(genpd);
-+
-+	mutex_lock(&pd->pmu->mutex);
-+	ret = rockchip_pmu_set_idle_request(pd, idle);
-+	mutex_unlock(&pd->pmu->mutex);
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL(rockchip_pmu_idle_request);
-+
- static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
- {
- 	int i;
-diff --git a/include/linux/rockchip_pmu.h b/include/linux/rockchip_pmu.h
-new file mode 100644
-index 00000000..720b3314
---- /dev/null
-+++ b/include/linux/rockchip_pmu.h
-@@ -0,0 +1,15 @@
-+/*
-+ * pm_domain.h - Definitions and headers related to device power domains.
-+ *
-+ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
-+ *
-+ * This file is released under the GPLv2.
-+ */
-+
-+#ifndef _LINUX_ROCKCHIP_PM_H
-+#define _LINUX_ROCKCHIP_PM_H
-+#include <linux/device.h>
-+
-+int rockchip_pmu_idle_request(struct device *dev, bool idle);
-+
-+#endif /* _LINUX_ROCKCHIP_PM_H */
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/1008-rockchip-dwc2-usb-partial-power-down.patch

@@ -1,44 +0,0 @@
-From 04fbf78e4e569bf872f1ffcb0a6f9b89569dc913 Mon Sep 17 00:00:00 2001
-From: Hal Emmerich <hal@halemmerich.com>
-Date: Thu, 19 Jul 2018 21:48:08 -0500
-Subject: [PATCH] usb: dwc2: disable power_down on rockchip devices
-
- The bug would let the usb controller enter partial power down,
- which was formally known as hibernate, upon boot if nothing was plugged
- in to the port. Partial power down couldn't be exited properly, so any
- usb devices plugged in after boot would not be usable.
-
- Before the name change, params.hibernation was false by default, so
- _dwc2_hcd_suspend() would skip entering hibernation. With the
- rename, _dwc2_hcd_suspend() was changed to use  params.power_down
- to decide whether or not to enter partial power down.
-
- Since params.power_down is non-zero by default, it needs to be set
- to 0 for rockchip devices to restore functionality.
-
- This bug was reported in the linux-usb thread:
- REGRESSION: usb: dwc2: USB device not seen after boot
-
- The commit that caused this regression is:
- 6d23ee9caa6790aea047f9aca7f3c03cb8d96eb6
-
-Signed-off-by: Hal Emmerich <hal@halemmerich.com>
----
- drivers/usb/dwc2/params.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
-index f03e418..492607a 100644
---- a/drivers/usb/dwc2/params.c
-+++ b/drivers/usb/dwc2/params.c
-@@ -82,6 +82,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
- 	p->host_perio_tx_fifo_size = 256;
- 	p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
- 		GAHBCFG_HBSTLEN_SHIFT;
-+	p->power_down = 0;
- }
- 
- static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/1009-drivers-clk-rk3288-support-for-dedicating-NPLL-to-a-.patch

@@ -1,228 +0,0 @@
-From bc16cd0aa3cdaaff27b9bf2d3282ccfff81d8784 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Sat, 29 Sep 2018 02:56:32 +0200
-Subject: [PATCH 5/6] drivers: clk-rk3288: support for dedicating NPLL to a VOP
-
-This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
-https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
-https://www.spinics.net/lists/arm-kernel/msg673156.html
-
-I'm not really sure what this does exactly. It basically sets the
-parent clock of the newly added clocks, if the newly added property
-"rockchip,npll-for-vop" is detected and set.
-
-I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
-so I cannot comment on what it's doing and if it's a good idea in
-general.
-
-The only thing I know from this patchset is that it works and have
-resolved some purple line issue at the left of my HDMI screen, when
-connected to MiQi or Tinkerboard devices.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- drivers/clk/rockchip/clk-rk3288.c | 98 ++++++++++++++++++++++++++++++++-------
- drivers/clk/rockchip/clk.h        |  3 ++
- 2 files changed, 85 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
-index fd2058f7d..b5b56169d 100644
---- a/drivers/clk/rockchip/clk-rk3288.c
-+++ b/drivers/clk/rockchip/clk-rk3288.c
-@@ -83,22 +83,43 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
- 	RK3066_PLL_RATE( 768000000, 1, 64, 2),
- 	RK3066_PLL_RATE( 742500000, 8, 495, 2),
- 	RK3066_PLL_RATE( 696000000, 1, 58, 2),
-+	RK3066_PLL_RATE_NB(621000000, 1, 207, 8, 1),
- 	RK3066_PLL_RATE( 600000000, 1, 50, 2),
- 	RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1),
- 	RK3066_PLL_RATE( 552000000, 1, 46, 2),
- 	RK3066_PLL_RATE( 504000000, 1, 84, 4),
- 	RK3066_PLL_RATE( 500000000, 3, 125, 2),
- 	RK3066_PLL_RATE( 456000000, 1, 76, 4),
-+	RK3066_PLL_RATE( 428000000, 1, 107, 6),
- 	RK3066_PLL_RATE( 408000000, 1, 68, 4),
- 	RK3066_PLL_RATE( 400000000, 3, 100, 2),
-+	RK3066_PLL_RATE_NB( 394000000, 1, 197, 12, 1),
- 	RK3066_PLL_RATE( 384000000, 2, 128, 4),
- 	RK3066_PLL_RATE( 360000000, 1, 60, 4),
-+	RK3066_PLL_RATE_NB( 356000000, 1, 178, 12, 1),
-+	RK3066_PLL_RATE_NB( 324000000, 1, 189, 14, 1),
- 	RK3066_PLL_RATE( 312000000, 1, 52, 4),
--	RK3066_PLL_RATE( 300000000, 1, 50, 4),
--	RK3066_PLL_RATE( 297000000, 2, 198, 8),
-+	RK3066_PLL_RATE_NB( 308000000, 1, 154, 12, 1),
-+	RK3066_PLL_RATE_NB( 303000000, 1, 202, 16, 1),
-+	RK3066_PLL_RATE( 300000000, 1, 75, 6),
-+	RK3066_PLL_RATE_NB( 297750000, 2, 397, 16, 1),
-+	RK3066_PLL_RATE_NB( 293250000, 2, 391, 16, 1),
-+	RK3066_PLL_RATE_NB( 292500000, 1, 195, 16, 1),
-+	RK3066_PLL_RATE( 273600000, 1, 114, 10),
-+	RK3066_PLL_RATE_NB( 273000000, 1, 182, 16, 1),
-+	RK3066_PLL_RATE_NB( 270000000, 1, 180, 16, 1),
-+	RK3066_PLL_RATE_NB( 266250000, 2, 355, 16, 1),
-+	RK3066_PLL_RATE_NB( 256500000, 1, 171, 16, 1),
- 	RK3066_PLL_RATE( 252000000, 1, 84, 8),
--	RK3066_PLL_RATE( 216000000, 1, 72, 8),
--	RK3066_PLL_RATE( 148500000, 2, 99, 8),
-+	RK3066_PLL_RATE_NB( 250500000, 1, 167, 16, 1),
-+	RK3066_PLL_RATE_NB( 243428571, 1, 142, 14, 1),
-+	RK3066_PLL_RATE( 238000000, 1, 119, 12),
-+	RK3066_PLL_RATE_NB( 219750000, 2, 293, 16, 1),
-+	RK3066_PLL_RATE_NB( 216000000, 1, 144, 16, 1),
-+	RK3066_PLL_RATE_NB( 213000000, 1, 142, 16, 1),
-+	RK3066_PLL_RATE( 195428571, 1, 114, 14),
-+	RK3066_PLL_RATE( 160000000, 1, 80, 12),
-+	RK3066_PLL_RATE( 157500000, 1, 105, 16),
- 	RK3066_PLL_RATE( 126000000, 1, 84, 16),
- 	RK3066_PLL_RATE(  48000000, 1, 64, 32),
- 	{ /* sentinel */ },
-@@ -194,10 +215,14 @@ PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr" };
- PNAME(mux_aclk_cpu_src_p)	= { "cpll_aclk_cpu", "gpll_aclk_cpu" };
- 
- PNAME(mux_pll_src_cpll_gpll_p)		= { "cpll", "gpll" };
--PNAME(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
--PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
-+PNAME_ED(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
-+
-+PNAME_ED(mux_pll_src_cgn_pll_nonvop_p)	= { "cpll", "gpll", "npll" };
-+PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
-+PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
-+
- PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "usbphy480m_src" };
--PNAME(mux_pll_src_cpll_gll_usb_npll_p)	= { "cpll", "gpll", "usbphy480m_src", "npll" };
-+PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
- 
- PNAME(mux_mmc_src_p)	= { "cpll", "gpll", "xin24m", "xin24m" };
- PNAME(mux_i2s_pre_p)	= { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
-@@ -443,24 +468,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
- 			RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 4, GFLAGS),
- 
--	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cgn_pll_vop0_p, 0,
- 			RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 1, GFLAGS),
--	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cgn_pll_vop1_p, 0,
- 			RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 3, GFLAGS),
- 
- 	COMPOSITE_NODIV(SCLK_EDP_24M, "sclk_edp_24m", mux_edp_24m_p, 0,
- 			RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
- 			RK3288_CLKGATE_CON(3), 12, GFLAGS),
--	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 13, GFLAGS),
- 
--	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 14, GFLAGS),
--	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
- 			RK3288_CLKGATE_CON(3), 15, GFLAGS),
- 
-@@ -469,16 +494,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
- 	GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
- 			RK3288_CLKGATE_CON(5), 11, GFLAGS),
- 
--	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(13), 13, GFLAGS),
- 	DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
- 			RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
- 
--	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(13), 14, GFLAGS),
--	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(13), 15, GFLAGS),
- 
-@@ -552,7 +577,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
- 	COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
- 			RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(4), 11, GFLAGS),
--	COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
-+	COMPOSITE(0, "sclk_tsp", mux_pll_src_cgn_pll_nonvop_p, 0,
- 			RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
- 			RK3288_CLKGATE_CON(4), 10, GFLAGS),
- 
-@@ -912,6 +937,7 @@ static void __init rk3288_clk_init(struct device_node *np)
- {
- 	struct rockchip_clk_provider *ctx;
- 	struct clk *clk;
-+	s32 npll_vop = -1;
- 
- 	rk3288_cru_base = of_iomap(np, 0);
- 	if (!rk3288_cru_base) {
-@@ -919,6 +945,46 @@ static void __init rk3288_clk_init(struct device_node *np)
- 		return;
- 	}
- 
-+	if (!of_property_read_s32(np, "rockchip,npll-for-vop", &npll_vop)) {
-+		if ((npll_vop < -1) || (npll_vop > 1)) {
-+			pr_warn("%s: invalid VOP to dedicate NPLL to: %d\n",
-+				__func__, npll_vop);
-+		} else if (npll_vop >= 0) {
-+			unsigned int vop_clk_id;
-+			const char ** npll_names;
-+			const char ** non_npll_names;
-+			int i;
-+
-+			/* Firstly, not-VOP needs to not use npll */
-+			mux_pll_src_npll_cpll_gpll_p[0] = "dummy_npll";
-+			mux_pll_src_cgn_pll_nonvop_p[2] = "dummy_npll";
-+			mux_pll_src_cpll_gll_usb_npll_p[3] = "dummy_npll";
-+
-+			/* Then the npll VOP needs to only use npll, and the other one not use npll. */
-+			if (npll_vop) {
-+				vop_clk_id = DCLK_VOP1;
-+				npll_names = mux_pll_src_cgn_pll_vop1_p;
-+				non_npll_names = mux_pll_src_cgn_pll_vop0_p;
-+			} else {
-+				vop_clk_id = DCLK_VOP0;
-+				npll_names = mux_pll_src_cgn_pll_vop0_p;
-+				non_npll_names = mux_pll_src_cgn_pll_vop1_p;
-+			}
-+			npll_names[0] = "dummy_cpll";
-+			npll_names[1] = "dummy_gpll";
-+			non_npll_names[2] = "dummy_npll";
-+
-+			/* Lastly the npll-dedicated-VOP needs to be able to control npll. */
-+			for (i = 0; i < ARRAY_SIZE(rk3288_clk_branches); i++) {
-+				if (rk3288_clk_branches[i].id == vop_clk_id) {
-+					rk3288_clk_branches[i].flags |= CLK_SET_RATE_PARENT;
-+					break;
-+				}
-+			}
-+			pr_debug("%s: npll dedicated for VOP %d\n", __func__, npll_vop);
-+		}
-+	}
-+
- 	ctx = rockchip_clk_init(np, rk3288_cru_base, CLK_NR_CLKS);
- 	if (IS_ERR(ctx)) {
- 		pr_err("%s: rockchip clk init failed\n", __func__);
-diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
-index 6b53fff4c..dbda9d281 100644
---- a/drivers/clk/rockchip/clk.h
-+++ b/drivers/clk/rockchip/clk.h
-@@ -382,6 +382,9 @@ struct clk *rockchip_clk_register_muxgrf(const char *name,
- 
- #define PNAME(x) static const char *const x[] __initconst
- 
-+/* For when you want to be able to modify the pointers. */
-+#define PNAME_ED(x) static const char * x[] __initdata
-+
- enum rockchip_clk_branch_type {
- 	branch_composite,
- 	branch_mux,
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/1010-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch

@@ -1,424 +0,0 @@
-From 6c86916e81fa18394d9b57b4af44f9948e100e96 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Sat, 29 Sep 2018 03:02:10 +0200
-Subject: [PATCH 6/6] drm: dw_hdmi-rockchip: better clock selection logic and
- dts-based rate list
-
-This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
-https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
-https://www.spinics.net/lists/arm-kernel/msg673156.html
-
-The original description was :
-    This contains traces of the following commits from the ChromeOS 3.14
-    tree, which improve RF/EMI performance and detach the clock selection
-    logic from the HDMI PHY configurations, plus support for configuring
-    the allowed clock rates via device tree as they are dependent on
-    PLL configuration and maybe even the PCB layout and other hardware things,
-    eg. interference to wifi or such (EMI).
-
-    Rates that were allowed previous to this patch are added as the fallback
-    list if no dts configuration exists.
-
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Adjust rockchip_mpll_cfg for 146.25
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: expand the informal mpll config
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: add slop to more tables
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: redo rockchip hdmi to allow slop
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Use auto-generated tables
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Fixup the clock to be what we expect
-    CHROMIUM: drm/rockchip: hdmi: adjust cklvl & txlvl for RF/EMI
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Set cur_ctr to 0 always
-    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Decrease slop
-
-https://www.spinics.net/lists/arm-kernel/msg673163.html
-
-This is the patch that takes into account the new property
-"rockchip,hdmi-rates-hz" that allows the definition of the HDMI
-frequencies in the DTS file.
-This also change a lot of HDMI frequencies definition, so that
-*will* require some extensive testing.
-
-Still, if it works fine, this should make tinkering the HDMI
-frequencies easier, in case you have a very special HDMI screen.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 269 ++++++++++++++++++----------
- 1 file changed, 175 insertions(+), 94 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-index 11309a2a4..740b0aeea 100644
---- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
-@@ -49,122 +49,141 @@ struct rockchip_hdmi {
- 	struct clk *vpll_clk;
- 	struct clk *grf_clk;
- 	struct dw_hdmi *hdmi;
-+	u32* rates;
-+	u32 rates_cnt;
- };
- 
-+#define CLK_SLOP(clk)		((clk) / 1000)
-+#define CLK_PLUS_SLOP(clk)	((clk) + CLK_SLOP(clk))
-+
- #define to_rockchip_hdmi(x)	container_of(x, struct rockchip_hdmi, x)
- 
-+/* These were the rates allowed by the driver before rates list in device tree,
-+ * so keep them around as a fallback */
-+static const u32 dw_hdmi_fallback_rates[] = {
-+	27000000,
-+	36000000,
-+	40000000,
-+	54000000,
-+	65000000,
-+	66000000,
-+	74250000,
-+	83500000,
-+	106500000,
-+	108000000,
-+	146250000,
-+	148500000
-+};
-+
- static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
- 	{
--		27000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+		30666000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2153, 0x0000 },
-+			{ 0x40f3, 0x0000 },
-+		},
-+	},  {
-+		36800000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2153, 0x0000 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		36000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+	},  {
-+		46000000, {
-+			{ 0x00b3, 0x0000 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		40000000, {
--			{ 0x00b3, 0x0000},
--			{ 0x2153, 0x0000},
--			{ 0x40f3, 0x0000}
-+	},  {
-+		61333000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x40a2, 0x0001 },
- 		},
--	}, {
--		54000000, {
--			{ 0x0072, 0x0001},
--			{ 0x2142, 0x0001},
--			{ 0x40a2, 0x0001},
-+	},  {
-+		73600000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2142, 0x0001 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		65000000, {
--			{ 0x0072, 0x0001},
--			{ 0x2142, 0x0001},
--			{ 0x40a2, 0x0001},
-+	},  {
-+		92000000, {
-+			{ 0x0072, 0x0001 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		66000000, {
--			{ 0x013e, 0x0003},
--			{ 0x217e, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		122666000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4061, 0x0002 },
- 		},
--	}, {
--		74250000, {
--			{ 0x0072, 0x0001},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		147200000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x2145, 0x0002 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		83500000, {
--			{ 0x0072, 0x0001},
-+	},  {
-+		184000000, {
-+			{ 0x0051, 0x0002 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		108000000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		226666000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x4064, 0x0003 },
- 		},
--	}, {
--		106500000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		272000000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x214c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
- 		},
--	}, {
--		146250000, {
--			{ 0x0051, 0x0002},
--			{ 0x2145, 0x0002},
--			{ 0x4061, 0x0002}
-+	},  {
-+		340000000, {
-+			{ 0x0040, 0x0003 },
-+			{ 0x3b4c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
- 		},
--	}, {
--		148500000, {
--			{ 0x0051, 0x0003},
--			{ 0x214c, 0x0003},
--			{ 0x4064, 0x0003}
-+	},  {
-+		600000000, {
-+			{ 0x1a40, 0x0003 },
-+			{ 0x3b4c, 0x0003 },
-+			{ 0x5a64, 0x0003 },
- 		},
--	}, {
-+	},  {
- 		~0UL, {
--			{ 0x00a0, 0x000a },
--			{ 0x2001, 0x000f },
--			{ 0x4002, 0x000f },
-+			{ 0x0000, 0x0000 },
-+			{ 0x0000, 0x0000 },
-+			{ 0x0000, 0x0000 },
- 		},
- 	}
- };
- 
- static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
--	/*      pixelclk    bpp8    bpp10   bpp12 */
-+	/*      pixelclk     bpp8    bpp10   bpp12 */
- 	{
--		40000000,  { 0x0018, 0x0018, 0x0018 },
--	}, {
--		65000000,  { 0x0028, 0x0028, 0x0028 },
--	}, {
--		66000000,  { 0x0038, 0x0038, 0x0038 },
--	}, {
--		74250000,  { 0x0028, 0x0038, 0x0038 },
--	}, {
--		83500000,  { 0x0028, 0x0038, 0x0038 },
--	}, {
--		146250000, { 0x0038, 0x0038, 0x0038 },
--	}, {
--		148500000, { 0x0000, 0x0038, 0x0038 },
--	}, {
--		~0UL,      { 0x0000, 0x0000, 0x0000},
--	}
-+		600000000, { 0x0000, 0x0000, 0x0000 },
-+	},  {
-+		~0UL,      { 0x0000, 0x0000, 0x0000 },
-+	},
- };
- 
- static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
- 	/*pixelclk   symbol   term   vlev*/
--	{ 74250000,  0x8009, 0x0004, 0x0272},
--	{ 148500000, 0x802b, 0x0004, 0x028d},
--	{ 297000000, 0x8039, 0x0005, 0x028d},
--	{ ~0UL,	     0x0000, 0x0000, 0x0000}
-+	{ CLK_PLUS_SLOP(74250000),  0x8009, 0x0004, 0x0272},
-+	{ CLK_PLUS_SLOP(165000000), 0x802b, 0x0004, 0x0209},
-+	{ CLK_PLUS_SLOP(297000000), 0x8039, 0x0005, 0x028d},
-+	{ ~0UL,	                    0x0000, 0x0000, 0x0000}
- };
- 
- static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
- {
- 	struct device_node *np = hdmi->dev->of_node;
-+	int rates_cnt;
- 
- 	hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
- 	if (IS_ERR(hdmi->regmap)) {
-@@ -192,26 +211,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
- 		return PTR_ERR(hdmi->grf_clk);
- 	}
- 
-+	if ((rates_cnt = of_property_count_u32_elems(np, "rockchip,hdmi-rates-hz")) > 0) {
-+		int rv;
-+		u32 *rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
-+		if (!rates)
-+			return -ENOMEM;
-+		rv = of_property_read_u32_array(np, "rockchip,hdmi-rates-hz", rates, rates_cnt);
-+		if (rv)
-+			return rv;
-+		hdmi->rates = rates;
-+		hdmi->rates_cnt = rates_cnt;
-+	} else {
-+		rates_cnt = ARRAY_SIZE(dw_hdmi_fallback_rates);
-+		hdmi->rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
-+		if (!hdmi->rates)
-+			return -ENOMEM;
-+		memcpy(hdmi->rates, dw_hdmi_fallback_rates, rates_cnt * sizeof(u32));
-+		hdmi->rates_cnt = rates_cnt;
-+	}
-+
-+
- 	return 0;
- }
- 
- static enum drm_mode_status
--dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
-+dw_hdmi_rockchip_encoder_mode_valid(struct drm_encoder *encoder,
- 			    const struct drm_display_mode *mode)
- {
--	const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
-+	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
- 	int pclk = mode->clock * 1000;
--	bool valid = false;
-+	int num_rates = hdmi->rates_cnt;
- 	int i;
- 
--	for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
--		if (pclk == mpll_cfg[i].mpixelclock) {
--			valid = true;
--			break;
--		}
-+	/*
-+	 * Pixel clocks we support are always < 2GHz and so fit in an
-+	 * int.  We should make sure source rate does too so we don't get
-+	 * overflow when we multiply by 1000.
-+	 */
-+	if (mode->clock > INT_MAX / 1000)
-+		return MODE_BAD;
-+
-+	for (i = 0; i < num_rates; i++) {
-+		int slop = CLK_SLOP(pclk);
-+
-+		if ((pclk >= hdmi->rates[i] - slop) &&
-+		    (pclk <= hdmi->rates[i] + slop))
-+			return MODE_OK;
- 	}
- 
--	return (valid) ? MODE_OK : MODE_BAD;
-+	return MODE_BAD;
- }
- 
- static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
-@@ -227,7 +275,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
- 				    const struct drm_display_mode *mode,
- 				    struct drm_display_mode *adj_mode)
- {
--	return true;
-+	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
-+	int pclk = adj_mode->clock * 1000;
-+	int best_diff = INT_MAX;
-+	int best_clock = 0;
-+	int slop;
-+	int i;
-+
-+	/* Pick the best clock */
-+	for (i = 0; i < hdmi->rates_cnt; i++) {
-+		int diff = hdmi->rates[i] - pclk;
-+
-+		if (diff < 0)
-+			diff = -diff;
-+		if (diff < best_diff) {
-+			best_diff = diff;
-+			best_clock = hdmi->rates[i];
-+
-+			/* Bail early if we're exact */
-+			if (best_diff == 0)
-+				return true;
-+		}
-+	}
-+
-+	/* Double check that it's OK */
-+	slop = CLK_SLOP(pclk);
-+	if ((pclk >= best_clock - slop) && (pclk <= best_clock + slop)) {
-+		adj_mode->clock = DIV_ROUND_UP(best_clock, 1000);
-+		return true;
-+	}
-+
-+	/* Shoudn't be here; we should have said rate wasn't valid */
-+	dev_warn(hdmi->dev, "tried to set invalid rate %d\n", adj_mode->clock);
-+	return false;
- }
- 
- static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
-@@ -280,6 +360,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
- }
- 
- static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
-+	.mode_valid = dw_hdmi_rockchip_encoder_mode_valid,
- 	.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
- 	.mode_set   = dw_hdmi_rockchip_encoder_mode_set,
- 	.enable     = dw_hdmi_rockchip_encoder_enable,
-@@ -294,7 +375,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
- };
- 
- static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
--	.mode_valid = dw_hdmi_rockchip_mode_valid,
- 	.mpll_cfg   = rockchip_mpll_cfg,
- 	.cur_ctr    = rockchip_cur_ctr,
- 	.phy_config = rockchip_phy_config,
-@@ -308,7 +388,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
- };
- 
- static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
--	.mode_valid = dw_hdmi_rockchip_mode_valid,
- 	.mpll_cfg   = rockchip_mpll_cfg,
- 	.cur_ctr    = rockchip_cur_ctr,
- 	.phy_config = rockchip_phy_config,
-@@ -387,6 +466,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
- 	 */
- 	if (IS_ERR(hdmi->hdmi)) {
- 		ret = PTR_ERR(hdmi->hdmi);
-+		devm_kfree(hdmi->dev, hdmi->rates);
- 		drm_encoder_cleanup(encoder);
- 		clk_disable_unprepare(hdmi->vpll_clk);
- 	}
-@@ -399,6 +479,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
- {
- 	struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
- 
-+	devm_kfree(hdmi->dev, hdmi->rates);
- 	dw_hdmi_unbind(hdmi->hdmi);
- 	clk_disable_unprepare(hdmi->vpll_clk);
- }
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/1013-ARM-DTS-rk3288-tinker-Enabling-SDIO-and-Wifi.patch

@@ -0,0 +1,98 @@
+From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 21:58:56 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
+
+Adding the appropriate nodes in order to exploit the WiFi capabilities
+of the board.
+Since these capabilities are provided through SDIO, and the SDIO
+nodes were not defined, these were added too.
+
+These seems to depend on each other so they are added in one big
+patch.
+
+Split if necessary.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 62 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 1e43527aa..d4df13bed 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -6,8 +6,70 @@
+ /dts-v1/;
+ 
+ #include "rk3288-tinker.dtsi"
++#include <dt-bindings/clock/rockchip,rk808.h>
+ 
+ / {
+ 	model = "Rockchip RK3288 Asus Tinker Board";
+ 	compatible = "asus,rk3288-tinker", "rockchip,rk3288";
++
++	/* This is essential to get SDIO devices working.
++	   The Wifi depends on SDIO ! */
++	sdio_pwrseq: sdio-pwrseq {
++		compatible = "mmc-pwrseq-simple";
++		clocks = <&rk808 RK808_CLKOUT1>;
++		clock-names = "ext_clock";
++		pinctrl-names = "default";
++		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
++
++		/*
++		 * On the module itself this is one of these (depending
++		 * on the actual card populated):
++		 * - SDIO_RESET_L_WL_REG_ON
++		 * - PDN (power down when low)
++		 */
++		reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
++	};
++
++	wireless-wlan {
++		compatible = "wlan-platdata";
++		rockchip,grf = <&grf>;
++		sdio_vref = <1800>;
++		status = "okay";
++		wifi_chip_type = "8723bs";
++		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
++	};
++};
++
++&io_domains {
++	wifi-supply = <&vcc_18>;
++};
++
++&pinctrl {
++	sdio-pwrseq {
++		wifi_enable_h: wifienable-h {
++			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++
++		chip_enable_h: chip-enable-h {
++			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++&sdio0 {
++	bus-width = <4>;
++	cap-sd-highspeed;
++	cap-sdio-irq;
++	clock-frequency = <50000000>;
++	clock-freq-min-max = <200000 50000000>;
++	disable-wp;
++	keep-power-in-suspend;
++	mmc-pwrseq = <&sdio_pwrseq>;
++	non-removable;
++	num-slots = <1>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
++	sd-uhs-sdr104;
++	status = "okay";
++	supports-sdio;
+ };
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch

@@ -0,0 +1,62 @@
+From 2c2e60256f2cbb2fce50a6317f85b1500efd1a6c Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:03:26 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Setup the Bluetooth UART pins
+
+The most essential being the RTS pin, which is clearly needed to
+upload the initial configuration into the Realtek Bluetooth
+chip, and make the Bluetooth chip work.
+
+Now, the Bluetooth chip also needs 3 other GPIOS to be enabled.
+I'll see how I do that through the DTS file in a near future.
+
+The 3 GPIOS being :
+Bluetooth Reset : <&gpio4 29 GPIO_ACTIVE_HIGH>
+Bluetooth Wake  : <&gpio4 26 GPIO_ACTIVE_HIGH>
+Bluetooth Wake_Host_IRQ : <&gpio4 31 GPIO_ACTIVE_HIGH>
+
+These are currently setup manually, through scripts. But it seems that
+GPIO handling through /sys entries might not be possible in the long
+term, the replacement being libgpio.
+Anyway, if you're interesting in enabling the Bluetooth GPIO by hand,
+here are the commands :
+
+cd /sys/class/gpio &&
+echo 146 > export &&
+echo 149 > export &&
+echo 151 > export &&
+echo high > gpio146/direction &&
+echo high > gpio149/direction &&
+echo high > gpio151/direction
+
+Resetting the chip is done like this :
+
+echo "Resetting the Bluetooth chip"
+cd /sys/class/gpio/gpio149 &&
+echo 0 > value &&
+sleep 1 &&
+echo 1 > value &&
+sleep 1
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index d4df13bed..b92e59c1e 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -73,3 +73,9 @@
+ 	status = "okay";
+ 	supports-sdio;
+ };
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
++};
++
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1015-ARM-DTSI-rk3288-tinker-Improving-the-CPU-max-voltage.patch

@@ -0,0 +1,28 @@
+From ebc29962ac27264772a4227f5abd6900cb72fa79 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:16:05 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Improving the CPU max voltage
+
+Taken from the various patches provided by @TonyMac32 .
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index aa107ee41..3da1c830f 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -164,7 +164,7 @@
+ 				regulator-always-on;
+ 				regulator-boot-on;
+ 				regulator-min-microvolt = <750000>;
+-				regulator-max-microvolt = <1350000>;
++				regulator-max-microvolt = <1450000>;
+ 				regulator-name = "vdd_arm";
+ 				regulator-ramp-delay = <6000>;
+ 				regulator-state-mem {
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1016-ARM-DTSI-rk3288-tinker-Setting-up-the-SD-regulators.patch

@@ -0,0 +1,31 @@
+From 3dacea70a8e434008f5b1f119a7f7da9aebc772c Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:18:58 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Setting up the SD regulators
+
+Some are needed and some are not. Playing with these parameters is
+required to get reboot working on these boards.
+
+I still can't believe that these boards can't soft reset correctly.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index 3da1c830f..dd1090728 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -254,7 +254,8 @@
+ 			};
+ 
+ 			vccio_sd: LDO_REG5 {
++				regulator-always-on;
+ 				regulator-boot-on;
+ 				regulator-min-microvolt = <1800000>;
+ 				regulator-max-microvolt = <3300000>;
+ 				regulator-name = "vccio_sd";
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch

@@ -0,0 +1,53 @@
+From a72e0749acad92df7b854e38e97e1dc7b4799abe Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:11:24 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Defined the I2C interfaces
+
+And all the hardware behind.
+
+Taken from @TonyMac32, Butchered by @Miouyouyou .
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index b92e59c1e..96d05fc6b 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -40,6 +40,31 @@
+ 	};
+ };
+ 
++&i2c1 {
++	status = "okay";
++};
++
++&i2c2 {
++	afc0:af-controller@0 {
++		status = "okay";
++		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
++		reg = <0x0 0x0c>;
++	};
++
++	eeprom:m24c08@50 {
++		compatible = "at,24c08";
++		reg = <0x50>;
++	};
++};
++
++&i2c3 {
++	status = "okay";
++};
++
++&i2c4 {
++	status = "okay";
++};
++
+ &io_domains {
+ 	wifi-supply = <&vcc_18>;
+ };
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1018-ARM-DTS-rk3288-tinker-Defining-the-SPI-interface.patch

@@ -0,0 +1,50 @@
+From b24b8f83e150811ad54ee2a4843e44cd1421fafa Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 22:15:14 +0100
+Subject: [PATCH] ARM: DTS: rk3288-tinker: Defining the SPI interface
+
+Taken from, and tested by @TonyMac32 .
+
+Well, the original one was tested by him but I had to adapt the
+registers definitions to the new 64-bits LPAE-compliant syntax.
+
+Therefore that *might* break, along with a few other patches.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dts | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
+index 96d05fc6b..17bfea298 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dts
++++ b/arch/arm/boot/dts/rk3288-tinker.dts
+@@ -99,6 +99,25 @@
+ 	supports-sdio;
+ };
+ 
++&spi2 {
++	max-freq = <50000000>;
++	status = "okay";
++
++	spidev@0 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x0 0>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++
++	spidev@1 {
++		compatible = "rockchip,spi_tinker";
++		reg = <0x1>;
++		spi-max-frequency = <50000000>;
++		spi-cpha = <1>;
++	};
++};
++
+ &uart0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1019-ARM-DTSI-rk3288-tinker-Defining-SDMMC-properties.patch

@@ -0,0 +1,33 @@
+From 487db7cefc9861fdaf30579c378a98f0360690ae Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 20:27:14 +0100
+Subject: [PATCH] ARM: DTSI: rk3288-tinker: Defining SDMMC properties
+
+I never knew if these properties were required to fix the dreaded
+reboot issue...
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-tinker.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index dd1090728..8edd6f681 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -436,7 +436,12 @@
+ 	disable-wp;			/* wp not hooked up */
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	sd-uhs-sdr104;
+ 	status = "okay";
++	supports-sd;
+ 	vmmc-supply = <&vcc33_sd>;
+ 	vqmmc-supply = <&vccio_sd>;
+ };
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1020-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch

@@ -0,0 +1,48 @@
+From d3d3fe433d9038dcd1a98f4d6711c0777ed06703 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 25 Jun 2018 17:08:32 +0200
+Subject: [PATCH 26/26] ARM: DTSI: rk3288: Set the VPU MMU power domains
+
+Without that, the auto-activation of the VPU hardware IOMMU fails
+when enabling the hardware, before the "probe" phase of its device
+driver.
+
+Basically, when loading a "of_platform" device driver targeting
+the VPU devices, you'll get these errors without this patch :
+
+[12753.996950] rk_iommu ff9c0440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning
+[12754.007483] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
+[12754.026652] rk_iommu ff9c0440.iommu: Disable paging request timed out, status: 0xffffffff
+[12754.045975] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
+
+When using this patch, the errors disappear.
+
+This seems to be due to the IOMMU device sharing the same power domain
+than the device.
+When loading an "of_platform" driver, the kernel logic seems to try
+enabling the associated IOMMU device before letting the driver handles
+anything with the actual VPU hardware.
+It appears that setting the power domain of the VPU IOMMU nodes let the
+IOMMU driver enable the IOMMU shared power domain, and make the IOMMU
+device useable.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 45ec4e89..46e1b8e2 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1262,6 +1263,7 @@
+ 		interrupt-names = "hevc_mmu";
+ 		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
+ 		clock-names = "aclk", "iface";
++		power-domains = <&power RK3288_PD_HEVC>;
+ 		#iommu-cells = <0>;
+ 		status = "disabled";
+ 	};
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1023-dts-rk3288-support-for-dedicating-npll-to-a-vop.patch

@@ -0,0 +1,46 @@
+From 4ab4f88649468dada5d609e1a6f8a71a7d5610c9 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Sat, 29 Sep 2018 02:48:59 +0200
+Subject: [PATCH 4/6] dts: rk3288: support for dedicating npll to a vop
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+The original description was :
+
+    Add the VOP DCLKs to the assigned clocks list so their
+    parents can be set in the dts include files for
+    devices that do dedicate npll to a vop.
+
+https://www.spinics.net/lists/arm-kernel/msg673162.html
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288.dtsi | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index d23c7fa55..ff04aab5e 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -867,12 +867,14 @@
+ 		rockchip,grf = <&grf>;
+ 		#clock-cells = <1>;
+ 		#reset-cells = <1>;
+-		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
++		assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
++				  <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+ 				  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
+ 				  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
+ 				  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
+ 				  <&cru PCLK_PERI>;
+-		assigned-clock-rates = <594000000>, <400000000>,
++		assigned-clock-rates = <0>, <0>,
++				       <594000000>, <400000000>,
+ 				       <500000000>, <300000000>,
+ 				       <150000000>, <75000000>,
+ 				       <300000000>, <150000000>,
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1024-arm-dts-veyron-Added-a-flag-to-disable-cache-flush-d.patch

@@ -0,0 +1,32 @@
+From 9177b30ab083dbda2bede3b3d61ef71ad4b1ffe0 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Thu, 1 Nov 2018 21:31:26 +0100
+Subject: [PATCH 2/2] arm: dts: veyron: Added a flag to disable cache flush
+ during reset
+
+Flushing the MMC cache of ASUS Chromebooks during initialization or
+"recovery" generates 10 minutes hangup, according to @SolidHal.
+
+This is an adaptation of @SolidHal, in order to pinpoint the fix to
+Veyron Chromebooks, and avoiding issues other RK3288 boards.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ arch/arm/boot/dts/rk3288-veyron.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
+index 2075120cf..fa4951fd7 100644
+--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
++++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
+@@ -123,6 +123,7 @@
+ 	mmc-hs200-1_8v;
+ 	mmc-pwrseq = <&emmc_pwrseq>;
+ 	non-removable;
++	no-recovery-cache-flush;
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ };
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/1100-media-Add-JPEG_RAW-format.patch

@@ -1,63 +0,0 @@
-From 1680a655127a62e74cbcfb84782e04a9c55dcf81 Mon Sep 17 00:00:00 2001
-From: Shunqian Zheng <zhengsq@rock-chips.com>
-Date: Wed, 5 Sep 2018 19:00:09 -0300
-Subject: [PATCH 3/6] media: Add JPEG_RAW format
-
-Add V4L2_PIX_FMT_JPEG_RAW format that does not contain
-JPEG header in the output frame.
-
-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
-Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
----
- Documentation/media/uapi/v4l/pixfmt-compressed.rst | 9 +++++++++
- drivers/media/v4l2-core/v4l2-ioctl.c               | 1 +
- include/uapi/linux/videodev2.h                     | 1 +
- 3 files changed, 11 insertions(+)
-
-diff --git a/Documentation/media/uapi/v4l/pixfmt-compressed.rst b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-index d382e7a5..4dffe400 100644
---- a/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-+++ b/Documentation/media/uapi/v4l/pixfmt-compressed.rst
-@@ -23,6 +23,15 @@ Compressed Formats
-       - 'JPEG'
-       - TBD. See also :ref:`VIDIOC_G_JPEGCOMP <VIDIOC_G_JPEGCOMP>`,
- 	:ref:`VIDIOC_S_JPEGCOMP <VIDIOC_G_JPEGCOMP>`.
-+    * .. _V4L2-PIX-FMT-JPEG-RAW:
-+
-+      - ``V4L2_PIX_FMT_JPEG_RAW``
-+      - 'Raw JPEG'
-+      - Raw JPEG bitstream, containing a compressed payload. This format
-+        contains an image scan, i.e. without any metadata or headers.
-+        The user is expected to set the needed metadata such as
-+        quantization and entropy encoding tables, via ``V4L2_CID_JPEG``
-+        controls, see :ref:`jpeg-control-id`.
-     * .. _V4L2-PIX-FMT-MPEG:
- 
-       - ``V4L2_PIX_FMT_MPEG``
-diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
-index 54afc9c7..0dcd95f4 100644
---- a/drivers/media/v4l2-core/v4l2-ioctl.c
-+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
-@@ -1301,6 +1301,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
- 		/* Max description length mask:	descr = "0123456789012345678901234567890" */
- 		case V4L2_PIX_FMT_MJPEG:	descr = "Motion-JPEG"; break;
- 		case V4L2_PIX_FMT_JPEG:		descr = "JFIF JPEG"; break;
-+		case V4L2_PIX_FMT_JPEG_RAW:	descr = "Raw JPEG"; break;
- 		case V4L2_PIX_FMT_DV:		descr = "1394"; break;
- 		case V4L2_PIX_FMT_MPEG:		descr = "MPEG-1/2/4"; break;
- 		case V4L2_PIX_FMT_H264:		descr = "H.264"; break;
-diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index 5d1a3685..f271048c 100644
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -627,6 +627,7 @@ struct v4l2_pix_format {
- /* compressed formats */
- #define V4L2_PIX_FMT_MJPEG    v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG   */
- #define V4L2_PIX_FMT_JPEG     v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG     */
-+#define V4L2_PIX_FMT_JPEG_RAW v4l2_fourcc('J', 'P', 'G', 'R') /* JFIF JPEG RAW without headers */
- #define V4L2_PIX_FMT_DV       v4l2_fourcc('d', 'v', 's', 'd') /* 1394          */
- #define V4L2_PIX_FMT_MPEG     v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */
- #define V4L2_PIX_FMT_H264     v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/1101-media-Add-controls-for-JPEG-quantization-tables.patch

@@ -1,153 +0,0 @@
-From 82da876c36ccc7791d5b20e7ee8b50379f7b19aa Mon Sep 17 00:00:00 2001
-From: Shunqian Zheng <zhengsq@rock-chips.com>
-Date: Wed, 5 Sep 2018 19:00:10 -0300
-Subject: [PATCH 4/6] media: Add controls for JPEG quantization tables
-
-Add V4L2_CID_JPEG_QUANTIZATION compound control to allow userspace
-configure the JPEG quantization tables.
-
-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
-Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
----
- Documentation/media/uapi/v4l/extended-controls.rst | 31 ++++++++++++++++++++++
- Documentation/media/videodev2.h.rst.exceptions     |  1 +
- drivers/media/v4l2-core/v4l2-ctrls.c               | 10 +++++++
- include/uapi/linux/v4l2-controls.h                 | 12 +++++++++
- include/uapi/linux/videodev2.h                     |  1 +
- 5 files changed, 55 insertions(+)
-
-diff --git a/Documentation/media/uapi/v4l/extended-controls.rst b/Documentation/media/uapi/v4l/extended-controls.rst
-index 9f7312bf..1335d27d 100644
---- a/Documentation/media/uapi/v4l/extended-controls.rst
-+++ b/Documentation/media/uapi/v4l/extended-controls.rst
-@@ -3354,7 +3354,38 @@ JPEG Control IDs
-     Specify which JPEG markers are included in compressed stream. This
-     control is valid only for encoders.
- 
-+.. _jpeg-quant-tables-control:
- 
-+``V4L2_CID_JPEG_QUANTIZATION (struct)``
-+    Specifies the luma and chroma quantization matrices for encoding
-+    or decoding a V4L2_PIX_FMT_JPEG_RAW format buffer. The :ref:`itu-t81`
-+    specification allows 8-bit quantization coefficients for
-+    baseline profile images, and 8-bit or 16-bit for extended profile
-+    images. Supporting or not 16-bit precision coefficients is driver-specific.
-+    Coefficients must be set in JPEG zigzag scan order.
-+
-+
-+.. c:type:: struct v4l2_ctrl_jpeg_quantization
-+
-+.. cssclass:: longtable
-+
-+.. flat-table:: struct v4l2_ctrl_jpeg_quantization
-+    :header-rows:  0
-+    :stub-columns: 0
-+    :widths:       1 1 2
-+
-+    * - __u8
-+      - ``precision``
-+      - Specifies the coefficient precision. User shall set 0
-+        for 8-bit, and 1 for 16-bit.
-+
-+    * - __u16
-+      - ``luma_quantization_matrix[64]``
-+      - Sets the luma quantization table.
-+
-+    * - __u16
-+      - ``chroma_quantization_matrix[64]``
-+      - Sets the chroma quantization table.
- 
- .. flat-table::
-     :header-rows:  0
-diff --git a/Documentation/media/videodev2.h.rst.exceptions b/Documentation/media/videodev2.h.rst.exceptions
-index ca9f0edc..a0a38e92 100644
---- a/Documentation/media/videodev2.h.rst.exceptions
-+++ b/Documentation/media/videodev2.h.rst.exceptions
-@@ -129,6 +129,7 @@ replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type`
- replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type`
-+replace symbol V4L2_CTRL_TYPE_JPEG_QUANTIZATION :c:type:`v4l2_ctrl_type`
- 
- # V4L2 capability defines
- replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities
-diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c
-index 599c1cbf..305bd7a9 100644
---- a/drivers/media/v4l2-core/v4l2-ctrls.c
-+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
-@@ -999,6 +999,7 @@ const char *v4l2_ctrl_get_name(u32 id)
- 	case V4L2_CID_JPEG_RESTART_INTERVAL:	return "Restart Interval";
- 	case V4L2_CID_JPEG_COMPRESSION_QUALITY:	return "Compression Quality";
- 	case V4L2_CID_JPEG_ACTIVE_MARKER:	return "Active Markers";
-+	case V4L2_CID_JPEG_QUANTIZATION:	return "JPEG Quantization Tables";
- 
- 	/* Image source controls */
- 	/* Keep the order of the 'case's the same as in v4l2-controls.h! */
-@@ -1286,6 +1287,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type,
- 	case V4L2_CID_DETECT_MD_REGION_GRID:
- 		*type = V4L2_CTRL_TYPE_U8;
- 		break;
-+	case V4L2_CID_JPEG_QUANTIZATION:
-+		*type = V4L2_CTRL_TYPE_JPEG_QUANTIZATION;
-+		break;
- 	case V4L2_CID_DETECT_MD_THRESHOLD_GRID:
- 		*type = V4L2_CTRL_TYPE_U16;
- 		break;
-@@ -1612,6 +1616,9 @@ static int std_validate(const struct v4l2_ctrl *ctrl, u32 idx,
- 			return -ERANGE;
- 		return 0;
- 
-+	case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
-+		return 0;
-+
- 	default:
- 		return -EINVAL;
- 	}
-@@ -2133,6 +2140,9 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl,
- 	case V4L2_CTRL_TYPE_U32:
- 		elem_size = sizeof(u32);
- 		break;
-+	case V4L2_CTRL_TYPE_JPEG_QUANTIZATION:
-+		elem_size = sizeof(struct v4l2_ctrl_jpeg_quantization);
-+		break;
- 	default:
- 		if (type < V4L2_CTRL_COMPOUND_TYPES)
- 			elem_size = sizeof(s32);
-diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h
-index e4ee10ee..856b3325 100644
---- a/include/uapi/linux/v4l2-controls.h
-+++ b/include/uapi/linux/v4l2-controls.h
-@@ -987,6 +987,18 @@ enum v4l2_jpeg_chroma_subsampling {
- #define	V4L2_JPEG_ACTIVE_MARKER_DQT		(1 << 17)
- #define	V4L2_JPEG_ACTIVE_MARKER_DHT		(1 << 18)
- 
-+#define V4L2_CID_JPEG_QUANTIZATION		(V4L2_CID_JPEG_CLASS_BASE + 5)
-+struct v4l2_ctrl_jpeg_quantization {
-+	/* ITU-T.81 specifies two quantization coefficient precisions:
-+	 * 8-bit for baseline profile,
-+	 * 8-bit or 16-bit for extended profile.
-+	 *
-+	 * User shall set "precision" to 0 for 8-bit and 1 for 16-bit.
-+	 */
-+	__u8	precision;
-+	__u16	luma_quantization_matrix[64];
-+	__u16	chroma_quantization_matrix[64];
-+};
- 
- /* Image source controls */
- #define V4L2_CID_IMAGE_SOURCE_CLASS_BASE	(V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
-diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index f271048c..e998d074 100644
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -1630,6 +1630,7 @@ enum v4l2_ctrl_type {
- 	V4L2_CTRL_TYPE_U8	     = 0x0100,
- 	V4L2_CTRL_TYPE_U16	     = 0x0101,
- 	V4L2_CTRL_TYPE_U32	     = 0x0102,
-+	V4L2_CTRL_TYPE_JPEG_QUANTIZATION = 0x0103,
- };
- 
- /*  Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/2004-ARM-dts-rockchip-add-support-for-1800-MHz-operation-.patch

@@ -1,41 +0,0 @@
-From e7e092be197c51b4d222a3b4e6638318067b7e6a Mon Sep 17 00:00:00 2001
-From: Willy Tarreau <w@1wt.eu>
-Date: Tue, 2 Aug 2016 08:20:53 +0200
-Subject: [PATCH 07/28] ARM: dts: rockchip: add support for 1800 MHz operation
- on MiQi board
-
-This board happily supports 1800 MHz operations (and even more), so
-let's enable it.
-
-Signed-off-by: Willy Tarreau <w@1wt.eu>
-(cherry picked from commit a0b82a29e7873a81f49ac5f50be3df1c7d312a14)
----
- arch/arm/boot/dts/rk3288-miqi.dts | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
-index 0e383595..80603a3d 100644
---- a/arch/arm/boot/dts/rk3288-miqi.dts
-+++ b/arch/arm/boot/dts/rk3288-miqi.dts
-@@ -126,6 +126,18 @@
- 
- &cpu0 {
- 	cpu0-supply = <&vdd_cpu>;
-+	operating-points = <
-+		/* KHz    uV */
-+		1800000 1400000
-+		1704000 1350000
-+		1608000 1300000
-+		1512000 1250000
-+		1416000 1200000
-+		1200000 1100000
-+		1008000 1050000
-+		 816000 1000000
-+		 600000  900000
-+	>;
- };
- 
- &emmc {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2005-Readapt-ARM-dts-rockchip-miqi-add-turbo-mode-operati.patch

@@ -1,170 +0,0 @@
-From de9dcd5ecab0686022eee243464f35d2c7a34c97 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 16 Jan 2017 12:44:56 +0000
-Subject: [PATCH 08/28] Readapt: ARM: dts: rockchip: miqi: add turbo-mode
- operating points
-
-Readaptation of Willy Tarreau patch.
-
-Here's the original commit message:
-
-By switching to opp-v2 we can declare "turbo-mode" operating points
-which are only enabled when /sys/devices/system/cpu/cpufreq/boost is
-set. It is convenient because it allows to boot, set a safe powersave
-governor, enable boost, limit scaling_max_freq to a safe value, then
-change the governor to performance or ondemand, and the frequency can
-then be manually adjusted by only touching scaling_max_freq.
-
-New values are 1896, 1920, 1992, 2016, 2040 MHz, 2064, 2088, 2112,
-2136, 2160, 2184, 2208. MiQi boards work fine up to 2112 with a very
-good power supply (5.2V/3A real) and a strong heatsink. Higher
-frequencies may randomly work. At least 1992 is rock solid for hours
-using "openssl speed -multi 4". The other ones have only been tested
-for a few minutes. Frequencies of 1896 and 1920 MHz use 1.425V.
-1992 MHz uses 1.45V. 2016, 2040 and 2064 use 1.475V. 2088 and above
-use 1.500V. 2160, 2184 and 2208 cause the lowest frequency to be
-picked. It's obvious that it's a sign issue somewhere in the kernel
-but this one was not found yet.
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-miqi.dts | 120 +++++++++++++++++++++++++++++++++-----
- 1 file changed, 107 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
-index 80603a3d..d7fde483 100644
---- a/arch/arm/boot/dts/rk3288-miqi.dts
-+++ b/arch/arm/boot/dts/rk3288-miqi.dts
-@@ -122,22 +122,116 @@
- 		regulator-always-on;
- 		regulator-boot-on;
- 	};
--};
- 
-+
-+	cpu0_opp_table: opp_table0 {
-+		compatible = "operating-points-v2";
-+		opp-shared;
-+
-+		opp@600000000 {
-+			opp-hz = /bits/ 64 <600000000>;
-+			opp-microvolt = <900000>;
-+		};
-+		opp@816000000 {
-+			opp-hz = /bits/ 64 <816000000>;
-+			opp-microvolt = <1000000>;
-+		};
-+		opp@1008000000 {
-+			opp-hz = /bits/ 64 <1008000000>;
-+			opp-microvolt = <1050000>;
-+		};
-+		opp@1200000000 {
-+			opp-hz = /bits/ 64 <1200000000>;
-+			opp-microvolt = <1100000>;
-+		};
-+		opp@1416000000 {
-+			opp-hz = /bits/ 64 <1416000000>;
-+			opp-microvolt = <1200000>;
-+		};
-+		opp@1512000000 {
-+			opp-hz = /bits/ 64 <1512000000>;
-+			opp-microvolt = <1250000>;
-+		};
-+		opp@1608000000 {
-+			opp-hz = /bits/ 64 <1608000000>;
-+			opp-microvolt = <1300000>;
-+		};
-+		opp@1704000000 {
-+			opp-hz = /bits/ 64 <1704000000>;
-+			opp-microvolt = <1350000>;
-+		};
-+		opp@1800000000 {
-+			opp-hz = /bits/ 64 <1800000000>;
-+			opp-microvolt = <1400000>;
-+		};
-+		/* boot-only frequencies below */
-+		opp@1896000000 {
-+			opp-hz = /bits/ 64 <1896000000>;
-+			opp-microvolt = <1425000>;
-+			turbo-mode;
-+		};
-+		opp@1920000000 {
-+			opp-hz = /bits/ 64 <1920000000>;
-+			opp-microvolt = <1425000>;
-+			turbo-mode;
-+		};
-+		opp@1992000000 {
-+			opp-hz = /bits/ 64 <1992000000>;
-+			opp-microvolt = <1450000>;
-+			turbo-mode;
-+		};
-+		opp@2016000000 {
-+			opp-hz = /bits/ 64 <2016000000>;
-+			opp-microvolt = <1475000>;
-+			turbo-mode;
-+		};
-+		opp@2040000000 {
-+			opp-hz = /bits/ 64 <2040000000>;
-+			opp-microvolt = <1475000>;
-+			turbo-mode;
-+		};
-+		opp@2064000000 {
-+			opp-hz = /bits/ 64 <2064000000>;
-+			opp-microvolt = <1475000>;
-+			turbo-mode;
-+		};
-+		opp@2088000000 {
-+			opp-hz = /bits/ 64 <2088000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+		opp@2112000000 {
-+			opp-hz = /bits/ 64 <2112000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+		opp@2136000000 {
-+			opp-hz = /bits/ 64 <2136000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+		opp@2160000000 {
-+			opp-hz = /bits/ 64 <2160000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+		opp@2184000000 {
-+			opp-hz = /bits/ 64 <2184000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+		opp@2208000000 {
-+			opp-hz = /bits/ 64 <2208000000>;
-+			opp-microvolt = <1500000>;
-+			turbo-mode;
-+		};
-+	};
-+};
-+ 
- &cpu0 {
- 	cpu0-supply = <&vdd_cpu>;
--	operating-points = <
--		/* KHz    uV */
--		1800000 1400000
--		1704000 1350000
--		1608000 1300000
--		1512000 1250000
--		1416000 1200000
--		1200000 1100000
--		1008000 1050000
--		 816000 1000000
--		 600000  900000
--	>;
-+
-+	operating-points-v2 = <&cpu0_opp_table>;
- };
- 
- &emmc {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2006-ARM-DTSI-rk3288-Missing-GRF-handles.patch

@@ -1,61 +0,0 @@
-From 771bcfe1735e42650b763e52a042a9fd98b2fa5b Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 21:20:43 +0200
-Subject: [PATCH 09/28] ARM: DTSI: rk3288.dtsi: Missing GRF handles
-
-Add missing GRF handles.
-
-This patch is taken from the patches provided by the ARMbian team.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 356ed1e6..5b789528 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -547,6 +547,7 @@
- 		pinctrl-2 = <&otp_gpio>;
- 		#thermal-sensor-cells = <1>;
- 		rockchip,hw-tshut-temp = <95000>;
-+		rockchip,grf = <&grf>;
- 		status = "disabled";
- 	};
- 
-@@ -655,6 +656,7 @@
- 		pinctrl-0 = <&pwm0_pin>;
- 		clocks = <&cru PCLK_PWM>;
- 		clock-names = "pwm";
-+		rockchip,grf = <&grf>;
- 		status = "disabled";
- 	};
- 
-@@ -666,6 +668,7 @@
- 		pinctrl-0 = <&pwm1_pin>;
- 		clocks = <&cru PCLK_PWM>;
- 		clock-names = "pwm";
-+		rockchip,grf = <&grf>;
- 		status = "disabled";
- 	};
- 
-@@ -677,6 +680,7 @@
- 		pinctrl-0 = <&pwm2_pin>;
- 		clocks = <&cru PCLK_PWM>;
- 		clock-names = "pwm";
-+		rockchip,grf = <&grf>;
- 		status = "disabled";
- 	};
- 
-@@ -688,6 +692,7 @@
- 		pinctrl-0 = <&pwm3_pin>;
- 		clocks = <&cru PCLK_PWM>;
- 		clock-names = "pwm";
-+		rockchip,grf = <&grf>;
- 		status = "disabled";
- 	};
- 
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2006-soc-rockchip-power-domain-export-idle-request.patch

@@ -0,0 +1,74 @@
+From e7b60b10cf3fd2f4374ab26c314383121c27fe82 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Tue, 22 Jan 2019 21:24:37 +0100
+Subject: [PATCH] soc: rockchip: power-domain: export idle request for RKMPP
+
+This function, and the added header, are required by the RKMPP driver,
+provided by Randy Li. However, I can't attest that the provided code
+is correct.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/soc/rockchip/pm_domains.c | 23 +++++++++++++++++++++++
+ include/soc/rockchip/pm_domains.h | 15 +++++++++++++++
+ 2 files changed, 38 insertions(+)
+ create mode 100644 include/soc/rockchip/pm_domains.h
+
+diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
+index 847c7c482..3e2e252cb 100644
+--- a/drivers/soc/rockchip/pm_domains.c
++++ b/drivers/soc/rockchip/pm_domains.c
+@@ -199,6 +199,29 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
+ 	return 0;
+ }
+ 
++int rockchip_pmu_idle_request(struct device *dev, bool idle)
++{
++	struct generic_pm_domain *genpd;
++	struct rockchip_pm_domain *pd;
++	int ret;
++
++	if (IS_ERR_OR_NULL(dev))
++		return -EINVAL;
++
++	if (IS_ERR_OR_NULL(dev->pm_domain))
++		return -EINVAL;
++
++	genpd = pd_to_genpd(dev->pm_domain);
++	pd = to_rockchip_pd(genpd);
++
++	mutex_lock(&pd->pmu->mutex);
++	ret = rockchip_pmu_set_idle_request(pd, idle);
++	mutex_unlock(&pd->pmu->mutex);
++
++	return ret;
++}
++EXPORT_SYMBOL(rockchip_pmu_idle_request);
++
+ static int rockchip_pmu_save_qos(struct rockchip_pm_domain *pd)
+ {
+ 	int i;
+diff --git a/include/soc/rockchip/pm_domains.h b/include/soc/rockchip/pm_domains.h
+new file mode 100644
+index 000000000..720b3314e
+--- /dev/null
++++ b/include/soc/rockchip/pm_domains.h
+@@ -0,0 +1,15 @@
++/*
++ * pm_domain.h - Definitions and headers related to device power domains.
++ *
++ * Copyright (C) 2017 Randy Li <ayaka@soulik.info>.
++ *
++ * This file is released under the GPLv2.
++ */
++
++#ifndef _LINUX_ROCKCHIP_PM_H
++#define _LINUX_ROCKCHIP_PM_H
++#include <linux/device.h>
++
++int rockchip_pmu_idle_request(struct device *dev, bool idle);
++
++#endif /* _LINUX_ROCKCHIP_PM_H */
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/2007-drivers-wifi-ath9k-reverse-do-not-use-bulk-on-EP3-and-EP4.patch

@@ -0,0 +1,101 @@
+FROM: Solidhal <hal@halemmerich.com>
+
+This patch reverses commit 2b721118b7821107757eb1d37af4b60e877b27e7, as can bee seen here:
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2b721118b7821107757eb1d37af4b60e877b27e7
+
+This commit caused issues on veyron speedy with ath9k and dwc2 drivers. Any ath9k device (ar9271) 
+would intermittently work, most of the time ending in errors as can bee seen here:
+https://github.com/SolidHal/PrawnOS/issues/38
+This commit fixes that issue.
+This is only a temporary work around while a permenant fix is found, as this commit seems to only cause issues
+with dwc2
+
+diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
+--- b/drivers/net/wireless/ath/ath9k/hif_usb.c
++++ a/drivers/net/wireless/ath/ath9k/hif_usb.c
+@@ -115,10 +115,10 @@
+ 	cmd->skb = skb;
+ 	cmd->hif_dev = hif_dev;
+ 
++	usb_fill_bulk_urb(urb, hif_dev->udev,
++			 usb_sndbulkpipe(hif_dev->udev, USB_REG_OUT_PIPE),
+-	usb_fill_int_urb(urb, hif_dev->udev,
+-			 usb_sndintpipe(hif_dev->udev, USB_REG_OUT_PIPE),
+ 			 skb->data, skb->len,
++			 hif_usb_regout_cb, cmd);
+-			 hif_usb_regout_cb, cmd, 1);
+ 
+ 	usb_anchor_urb(urb, &hif_dev->regout_submitted);
+ 	ret = usb_submit_urb(urb, GFP_KERNEL);
+@@ -723,11 +723,11 @@
+ 			return;
+ 		}
+ 
++		usb_fill_bulk_urb(urb, hif_dev->udev,
++				 usb_rcvbulkpipe(hif_dev->udev,
+-		usb_fill_int_urb(urb, hif_dev->udev,
+-				 usb_rcvintpipe(hif_dev->udev,
+ 						 USB_REG_IN_PIPE),
+ 				 nskb->data, MAX_REG_IN_BUF_SIZE,
++				 ath9k_hif_usb_reg_in_cb, nskb);
+-				 ath9k_hif_usb_reg_in_cb, nskb, 1);
+ 	}
+ 
+ resubmit:
+@@ -909,11 +909,11 @@
+ 		rx_buf->hif_dev = hif_dev;
+ 		rx_buf->skb = skb;
+ 
++		usb_fill_bulk_urb(urb, hif_dev->udev,
++				  usb_rcvbulkpipe(hif_dev->udev,
+-		usb_fill_int_urb(urb, hif_dev->udev,
+-				  usb_rcvintpipe(hif_dev->udev,
+ 						  USB_REG_IN_PIPE),
+ 				  skb->data, MAX_REG_IN_BUF_SIZE,
++				  ath9k_hif_usb_reg_in_cb, skb);
+-				  ath9k_hif_usb_reg_in_cb, rx_buf, 1);
+ 
+ 		/* Anchor URB */
+ 		usb_anchor_urb(urb, &hif_dev->reg_in_submitted);
+@@ -1031,7 +1031,9 @@
+ 
+ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
+ {
++	struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
++	struct usb_endpoint_descriptor *endp;
++	int ret, idx;
+-	int ret;
+ 
+ 	ret = ath9k_hif_usb_download_fw(hif_dev);
+ 	if (ret) {
+@@ -1041,6 +1043,20 @@
+ 		return ret;
+ 	}
+ 
++	/* On downloading the firmware to the target, the USB descriptor of EP4
++	 * is 'patched' to change the type of the endpoint to Bulk. This will
++	 * bring down CPU usage during the scan period.
++	 */
++	for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) {
++		endp = &alt->endpoint[idx].desc;
++		if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
++				== USB_ENDPOINT_XFER_INT) {
++			endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK;
++			endp->bmAttributes |= USB_ENDPOINT_XFER_BULK;
++			endp->bInterval = 0;
++		}
++	}
++
+ 	/* Alloc URBs */
+ 	ret = ath9k_hif_usb_alloc_urbs(hif_dev);
+ 	if (ret) {
+@@ -1252,7 +1268,7 @@
+ 	if (!buf)
+ 		return;
+ 
++	ret = usb_bulk_msg(udev, usb_sndbulkpipe(udev, USB_REG_OUT_PIPE),
+-	ret = usb_interrupt_msg(udev, usb_sndintpipe(udev, USB_REG_OUT_PIPE),
+ 			   buf, 4, NULL, USB_MSG_TIMEOUT);
+ 	if (ret)
+ 		dev_err(&udev->dev, "ath9k_htc: USB reboot failed\n");
+

buildroot-external/board/asus/tinker/patches/linux/2008-Added-support-for-Tinkerboard-s-SPI-interface.patch

@@ -1,27 +0,0 @@
-From af8d73ec0df1dde1e2fe1674c5708d4c30385ba9 Mon Sep 17 00:00:00 2001
-From: Myy <myy@miouyouyou.fr>
-Date: Mon, 5 Jun 2017 12:37:17 +0000
-Subject: [PATCH 11/28] Added support for Tinkerboard's SPI interface
-
-Imported from ARMbian
-
-Signed-off-by: Myy <myy@miouyouyou.fr>
----
- drivers/spi/spidev.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
-index cda10719..a6287475 100644
---- a/drivers/spi/spidev.c
-+++ b/drivers/spi/spidev.c
-@@ -669,6 +669,7 @@ static const struct of_device_id spidev_dt_ids[] = {
- 	{ .compatible = "lineartechnology,ltc2488" },
- 	{ .compatible = "ge,achc" },
- 	{ .compatible = "semtech,sx1301" },
-+	{ .compatible = "rockchip,spi_tinker" },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, spidev_dt_ids);
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2008-clk-rockchip-rk3288-Support-for-dedicating-NPLL-to-a.patch

@@ -0,0 +1,178 @@
+From e03d074b8ec00718337e7373e991912f6b6f9a52 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 19:53:43 +0100
+Subject: [PATCH] clk: rockchip: rk3288: Support for dedicating NPLL to a VOP
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+I'm not really sure what this does exactly. It basically sets the
+parent clock of the newly added clocks, if the newly added property
+"rockchip,npll-for-vop" is detected and set.
+
+I have no clear idea how HDMI Neuronal PLL (and PLL in general) work,
+so I cannot comment on what it's doing and if it's a good idea in
+general.
+
+Now, I still have to test if that patch does anything useful on
+RK3288 boards. If it doesn't, I might just throw it away on next
+versions.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+ drivers/clk/rockchip/clk-rk3288.c | 68 ++++++++++++++++++++++++++++++++-------
+ drivers/clk/rockchip/clk.h        |  3 ++
+ 2 files changed, 59 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
+index 13b38cb89..0d8b99b6b 100644
+--- a/drivers/clk/rockchip/clk-rk3288.c
++++ b/drivers/clk/rockchip/clk-rk3288.c
+@@ -215,10 +215,13 @@ PNAME(mux_ddrphy_p)		= { "dpll_ddr", "gpll_ddr" };
+ PNAME(mux_aclk_cpu_src_p)	= { "cpll_aclk_cpu", "gpll_aclk_cpu" };
+ 
+ PNAME(mux_pll_src_cpll_gpll_p)		= { "cpll", "gpll" };
+-PNAME(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
+-PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_npll_cpll_gpll_p)	= { "npll", "cpll", "gpll" };
++
++PNAME_ED(mux_pll_src_cgn_pll_nonvop_p)	= { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_cgn_pll_vop0_p) = { "cpll", "gpll", "npll" };
++PNAME_ED(mux_pll_src_cgn_pll_vop1_p) = { "cpll", "gpll", "npll" };
+ PNAME(mux_pll_src_cpll_gpll_usb480m_p)	= { "cpll", "gpll", "unstable:usbphy480m_src" };
+-PNAME(mux_pll_src_cpll_gll_usb_npll_p)	= { "cpll", "gpll", "unstable:usbphy480m_src", "npll" };
++PNAME_ED(mux_pll_src_cpll_gll_usb_npll_p) = { "cpll", "gpll", "usbphy480m_src", "npll" };
+ 
+ PNAME(mux_mmc_src_p)	= { "cpll", "gpll", "xin24m", "xin24m" };
+ PNAME(mux_i2s_pre_p)	= { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" };
+@@ -464,24 +467,24 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 			RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 4, GFLAGS),
+ 
+-	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cgn_pll_vop0_p, 0,
+ 			RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 1, GFLAGS),
+-	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cgn_pll_vop1_p, 0,
+ 			RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 3, GFLAGS),
+ 
+ 	COMPOSITE_NODIV(SCLK_EDP_24M, "sclk_edp_24m", mux_edp_24m_p, 0,
+ 			RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
+ 			RK3288_CLKGATE_CON(3), 12, GFLAGS),
+-	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 13, GFLAGS),
+ 
+-	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 14, GFLAGS),
+-	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
+ 			RK3288_CLKGATE_CON(3), 15, GFLAGS),
+ 
+@@ -490,16 +493,16 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
+ 			RK3288_CLKGATE_CON(5), 11, GFLAGS),
+ 
+-	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 13, GFLAGS),
+ 	DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
+ 			RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
+ 
+-	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 14, GFLAGS),
+-	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(13), 15, GFLAGS),
+ 
+@@ -573,7 +576,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
+ 	COMPOSITE(0, "sclk_tspout", mux_tspout_p, 0,
+ 			RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(4), 11, GFLAGS),
+-	COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
++	COMPOSITE(0, "sclk_tsp", mux_pll_src_cgn_pll_nonvop_p, 0,
+ 			RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
+ 			RK3288_CLKGATE_CON(4), 10, GFLAGS),
+ 
+@@ -933,5 +936,6 @@ static void __init rk3288_clk_init(struct device_node *np)
+ {
+ 	struct rockchip_clk_provider *ctx;
++	s32 npll_vop = -1;
+ 
+ 	rk3288_cru_base = of_iomap(np, 0);
+ 	if (!rk3288_cru_base) {
+@@ -940,6 +944,46 @@ static void __init rk3288_clk_init(struct device_node *np)
+ 		return;
+ 	}
+ 
++	if (!of_property_read_s32(np, "rockchip,npll-for-vop", &npll_vop)) {
++		if ((npll_vop < -1) || (npll_vop > 1)) {
++			pr_warn("%s: invalid VOP to dedicate NPLL to: %d\n",
++				__func__, npll_vop);
++		} else if (npll_vop >= 0) {
++			unsigned int vop_clk_id;
++			const char ** npll_names;
++			const char ** non_npll_names;
++			int i;
++
++			/* Firstly, not-VOP needs to not use npll */
++			mux_pll_src_npll_cpll_gpll_p[0] = "dummy_npll";
++			mux_pll_src_cgn_pll_nonvop_p[2] = "dummy_npll";
++			mux_pll_src_cpll_gll_usb_npll_p[3] = "dummy_npll";
++
++			/* Then the npll VOP needs to only use npll, and the other one not use npll. */
++			if (npll_vop) {
++				vop_clk_id = DCLK_VOP1;
++				npll_names = mux_pll_src_cgn_pll_vop1_p;
++				non_npll_names = mux_pll_src_cgn_pll_vop0_p;
++			} else {
++				vop_clk_id = DCLK_VOP0;
++				npll_names = mux_pll_src_cgn_pll_vop0_p;
++				non_npll_names = mux_pll_src_cgn_pll_vop1_p;
++			}
++			npll_names[0] = "dummy_cpll";
++			npll_names[1] = "dummy_gpll";
++			non_npll_names[2] = "dummy_npll";
++
++			/* Lastly the npll-dedicated-VOP needs to be able to control npll. */
++			for (i = 0; i < ARRAY_SIZE(rk3288_clk_branches); i++) {
++				if (rk3288_clk_branches[i].id == vop_clk_id) {
++					rk3288_clk_branches[i].flags |= CLK_SET_RATE_PARENT;
++					break;
++				}
++			}
++			pr_debug("%s: npll dedicated for VOP %d\n", __func__, npll_vop);
++		}
++	}
++
+ 	ctx = rockchip_clk_init(np, rk3288_cru_base, CLK_NR_CLKS);
+ 	if (IS_ERR(ctx)) {
+ 		pr_err("%s: rockchip clk init failed\n", __func__);
+diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
+index 6b53fff4c..dbda9d281 100644
+--- a/drivers/clk/rockchip/clk.h
++++ b/drivers/clk/rockchip/clk.h
+@@ -382,6 +382,9 @@ struct clk *rockchip_clk_register_muxgrf(const char *name,
+ 
+ #define PNAME(x) static const char *const x[] __initconst
+ 
++/* For when you want to be able to modify the pointers. */
++#define PNAME_ED(x) static const char * x[] __initdata
++
+ enum rockchip_clk_branch_type {
+ 	branch_composite,
+ 	branch_mux,
+-- 
+2.16.4
+

buildroot-external/board/asus/tinker/patches/linux/2009-ARM-DTSI-rk3288-Adding-cells-addresses-and-size.patch

@@ -1,56 +0,0 @@
-From 7af8d2bf732cb3baab7d926ed8a7e061e7a09ad9 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 21:39:00 +0200
-Subject: [PATCH 13/28] ARM: DTSI: rk3288.dtsi: Adding cells addresses and
- sizes of MMC nodes
-
-Imported from the Rockchip 4.4 patches.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index be985f02..14ef8202 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -236,6 +236,8 @@
- 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- 		fifo-depth = <0x100>;
- 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
- 		reg = <0x0 0xff0c0000 0x0 0x4000>;
- 		resets = <&cru SRST_MMC0>;
- 		reset-names = "reset";
-@@ -250,6 +252,8 @@
- 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- 		fifo-depth = <0x100>;
- 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
- 		reg = <0x0 0xff0d0000 0x0 0x4000>;
- 		resets = <&cru SRST_SDIO0>;
- 		reset-names = "reset";
-@@ -264,6 +268,8 @@
- 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- 		fifo-depth = <0x100>;
- 		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
- 		reg = <0x0 0xff0e0000 0x0 0x4000>;
- 		resets = <&cru SRST_SDIO1>;
- 		reset-names = "reset";
-@@ -278,6 +284,8 @@
- 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
- 		fifo-depth = <0x100>;
- 		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
- 		reg = <0x0 0xff0f0000 0x0 0x4000>;
- 		resets = <&cru SRST_EMMC>;
- 		reset-names = "reset";
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2009-drm-dw_hdmi-rockchip-better-clock-selection-logic-an.patch

@@ -0,0 +1,434 @@
+From 6c86916e81fa18394d9b57b4af44f9948e100e96 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Sat, 29 Sep 2018 03:02:10 +0200
+Subject: [PATCH 6/6] drm: dw_hdmi-rockchip: better clock selection logic and
+ dts-based rate list
+
+This patch is taken from Urja Rannikko ( @urjaman ) patchset here :
+https://github.com/urjaman/arch-c201/blob/master/linux-c201/0020-RK3288-HDMI-clock-hacks-combined.patch
+https://www.spinics.net/lists/arm-kernel/msg673156.html
+
+The original description was :
+    This contains traces of the following commits from the ChromeOS 3.14
+    tree, which improve RF/EMI performance and detach the clock selection
+    logic from the HDMI PHY configurations, plus support for configuring
+    the allowed clock rates via device tree as they are dependent on
+    PLL configuration and maybe even the PCB layout and other hardware things,
+    eg. interference to wifi or such (EMI).
+
+    Rates that were allowed previous to this patch are added as the fallback
+    list if no dts configuration exists.
+
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Adjust rockchip_mpll_cfg for 146.25
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: expand the informal mpll config
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: add slop to more tables
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: redo rockchip hdmi to allow slop
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Use auto-generated tables
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Fixup the clock to be what we expect
+    CHROMIUM: drm/rockchip: hdmi: adjust cklvl & txlvl for RF/EMI
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Set cur_ctr to 0 always
+    CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Decrease slop
+
+https://www.spinics.net/lists/arm-kernel/msg673163.html
+
+This is the patch that takes into account the new property
+"rockchip,hdmi-rates-hz" that allows the definition of the HDMI
+frequencies in the DTS file.
+This also change a lot of HDMI frequencies definition, so that
+*will* require some extensive testing.
+
+Still, if it works fine, this should make tinkering the HDMI
+frequencies easier, in case you have a very special HDMI screen.
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+index cdc304d4c..91c7dc07b 100644
+--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
++++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+@@ -73,122 +73,141 @@ struct rockchip_hdmi {
+ 	struct clk *grf_clk;
+ 	struct dw_hdmi *hdmi;
+ 	struct phy *phy;
++	u32* rates;
++	u32 rates_cnt;
+ };
+ 
++#define CLK_SLOP(clk)		((clk) / 1000)
++#define CLK_PLUS_SLOP(clk)	((clk) + CLK_SLOP(clk))
++
+ #define to_rockchip_hdmi(x)	container_of(x, struct rockchip_hdmi, x)
+ 
++/* These were the rates allowed by the driver before rates list in device tree,
++ * so keep them around as a fallback */
++static const u32 dw_hdmi_fallback_rates[] = {
++	27000000,
++	36000000,
++	40000000,
++	54000000,
++	65000000,
++	66000000,
++	74250000,
++	83500000,
++	106500000,
++	108000000,
++	146250000,
++	148500000
++};
++
+ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
+ 	{
+-		27000000, {
+-			{ 0x00b3, 0x0000},
+-			{ 0x2153, 0x0000},
+-			{ 0x40f3, 0x0000}
++		30666000, {
++			{ 0x00b3, 0x0000 },
++			{ 0x2153, 0x0000 },
++			{ 0x40f3, 0x0000 },
++		},
++	},  {
++		36800000, {
++			{ 0x00b3, 0x0000 },
++			{ 0x2153, 0x0000 },
++			{ 0x40a2, 0x0001 },
+ 		},
+-	}, {
+-		36000000, {
+-			{ 0x00b3, 0x0000},
+-			{ 0x2153, 0x0000},
+-			{ 0x40f3, 0x0000}
++	},  {
++		46000000, {
++			{ 0x00b3, 0x0000 },
++			{ 0x2142, 0x0001 },
++			{ 0x40a2, 0x0001 },
+ 		},
+-	}, {
+-		40000000, {
+-			{ 0x00b3, 0x0000},
+-			{ 0x2153, 0x0000},
+-			{ 0x40f3, 0x0000}
++	},  {
++		61333000, {
++			{ 0x0072, 0x0001 },
++			{ 0x2142, 0x0001 },
++			{ 0x40a2, 0x0001 },
+ 		},
+-	}, {
+-		54000000, {
+-			{ 0x0072, 0x0001},
+-			{ 0x2142, 0x0001},
+-			{ 0x40a2, 0x0001},
++	},  {
++		73600000, {
++			{ 0x0072, 0x0001 },
++			{ 0x2142, 0x0001 },
++			{ 0x4061, 0x0002 },
+ 		},
+-	}, {
+-		65000000, {
+-			{ 0x0072, 0x0001},
+-			{ 0x2142, 0x0001},
+-			{ 0x40a2, 0x0001},
++	},  {
++		92000000, {
++			{ 0x0072, 0x0001 },
++			{ 0x2145, 0x0002 },
++			{ 0x4061, 0x0002 },
+ 		},
+-	}, {
+-		66000000, {
+-			{ 0x013e, 0x0003},
+-			{ 0x217e, 0x0002},
+-			{ 0x4061, 0x0002}
++	},  {
++		122666000, {
++			{ 0x0051, 0x0002 },
++			{ 0x2145, 0x0002 },
++			{ 0x4061, 0x0002 },
+ 		},
+-	}, {
+-		74250000, {
+-			{ 0x0072, 0x0001},
+-			{ 0x2145, 0x0002},
+-			{ 0x4061, 0x0002}
++	},  {
++		147200000, {
++			{ 0x0051, 0x0002 },
++			{ 0x2145, 0x0002 },
++			{ 0x4064, 0x0003 },
+ 		},
+-	}, {
+-		83500000, {
+-			{ 0x0072, 0x0001},
++	},  {
++		184000000, {
++			{ 0x0051, 0x0002 },
++			{ 0x214c, 0x0003 },
++			{ 0x4064, 0x0003 },
+ 		},
+-	}, {
+-		108000000, {
+-			{ 0x0051, 0x0002},
+-			{ 0x2145, 0x0002},
+-			{ 0x4061, 0x0002}
++	},  {
++		226666000, {
++			{ 0x0040, 0x0003 },
++			{ 0x214c, 0x0003 },
++			{ 0x4064, 0x0003 },
+ 		},
+-	}, {
+-		106500000, {
+-			{ 0x0051, 0x0002},
+-			{ 0x2145, 0x0002},
+-			{ 0x4061, 0x0002}
++	},  {
++		272000000, {
++			{ 0x0040, 0x0003 },
++			{ 0x214c, 0x0003 },
++			{ 0x5a64, 0x0003 },
+ 		},
+-	}, {
+-		146250000, {
+-			{ 0x0051, 0x0002},
+-			{ 0x2145, 0x0002},
+-			{ 0x4061, 0x0002}
++	},  {
++		340000000, {
++			{ 0x0040, 0x0003 },
++			{ 0x3b4c, 0x0003 },
++			{ 0x5a64, 0x0003 },
+ 		},
+-	}, {
+-		148500000, {
+-			{ 0x0051, 0x0003},
+-			{ 0x214c, 0x0003},
+-			{ 0x4064, 0x0003}
++	},  {
++		600000000, {
++			{ 0x1a40, 0x0003 },
++			{ 0x3b4c, 0x0003 },
++			{ 0x5a64, 0x0003 },
+ 		},
+-	}, {
++	},  {
+ 		~0UL, {
+-			{ 0x00a0, 0x000a },
+-			{ 0x2001, 0x000f },
+-			{ 0x4002, 0x000f },
++			{ 0x0000, 0x0000 },
++			{ 0x0000, 0x0000 },
++			{ 0x0000, 0x0000 },
+ 		},
+ 	}
+ };
+ 
+ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
+-	/*      pixelclk    bpp8    bpp10   bpp12 */
++	/*      pixelclk     bpp8    bpp10   bpp12 */
+ 	{
+-		40000000,  { 0x0018, 0x0018, 0x0018 },
+-	}, {
+-		65000000,  { 0x0028, 0x0028, 0x0028 },
+-	}, {
+-		66000000,  { 0x0038, 0x0038, 0x0038 },
+-	}, {
+-		74250000,  { 0x0028, 0x0038, 0x0038 },
+-	}, {
+-		83500000,  { 0x0028, 0x0038, 0x0038 },
+-	}, {
+-		146250000, { 0x0038, 0x0038, 0x0038 },
+-	}, {
+-		148500000, { 0x0000, 0x0038, 0x0038 },
+-	}, {
+-		~0UL,      { 0x0000, 0x0000, 0x0000},
+-	}
++		600000000, { 0x0000, 0x0000, 0x0000 },
++	},  {
++		~0UL,      { 0x0000, 0x0000, 0x0000 },
++	},
+ };
+ 
+ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+ 	/*pixelclk   symbol   term   vlev*/
+-	{ 74250000,  0x8009, 0x0004, 0x0272},
+-	{ 148500000, 0x802b, 0x0004, 0x028d},
+-	{ 297000000, 0x8039, 0x0005, 0x028d},
+-	{ ~0UL,	     0x0000, 0x0000, 0x0000}
++	{ CLK_PLUS_SLOP(74250000),  0x8009, 0x0004, 0x0272},
++	{ CLK_PLUS_SLOP(165000000), 0x802b, 0x0004, 0x0209},
++	{ CLK_PLUS_SLOP(297000000), 0x8039, 0x0005, 0x028d},
++	{ ~0UL,	                    0x0000, 0x0000, 0x0000}
+ };
+ 
+ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
+ {
+ 	struct device_node *np = hdmi->dev->of_node;
++	int rates_cnt;
+ 
+ 	hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+ 	if (IS_ERR(hdmi->regmap)) {
+@@ -216,26 +235,55 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
+ 		return PTR_ERR(hdmi->grf_clk);
+ 	}
+ 
++	if ((rates_cnt = of_property_count_u32_elems(np, "rockchip,hdmi-rates-hz")) > 0) {
++		int rv;
++		u32 *rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
++		if (!rates)
++			return -ENOMEM;
++		rv = of_property_read_u32_array(np, "rockchip,hdmi-rates-hz", rates, rates_cnt);
++		if (rv)
++			return rv;
++		hdmi->rates = rates;
++		hdmi->rates_cnt = rates_cnt;
++	} else {
++		rates_cnt = ARRAY_SIZE(dw_hdmi_fallback_rates);
++		hdmi->rates = devm_kmalloc_array(hdmi->dev, rates_cnt, sizeof(u32), GFP_KERNEL);
++		if (!hdmi->rates)
++			return -ENOMEM;
++		memcpy(hdmi->rates, dw_hdmi_fallback_rates, rates_cnt * sizeof(u32));
++		hdmi->rates_cnt = rates_cnt;
++	}
++
++
+ 	return 0;
+ }
+ 
+ static enum drm_mode_status
+-dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
++dw_hdmi_rockchip_encoder_mode_valid(struct drm_encoder *encoder,
+ 			    const struct drm_display_mode *mode)
+ {
+-	const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg;
++	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
+ 	int pclk = mode->clock * 1000;
+-	bool valid = false;
++	int num_rates = hdmi->rates_cnt;
+ 	int i;
+ 
+-	for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) {
+-		if (pclk == mpll_cfg[i].mpixelclock) {
+-			valid = true;
+-			break;
+-		}
++	/*
++	 * Pixel clocks we support are always < 2GHz and so fit in an
++	 * int.  We should make sure source rate does too so we don't get
++	 * overflow when we multiply by 1000.
++	 */
++	if (mode->clock > INT_MAX / 1000)
++		return MODE_BAD;
++
++	for (i = 0; i < num_rates; i++) {
++		int slop = CLK_SLOP(pclk);
++
++		if ((pclk >= hdmi->rates[i] - slop) &&
++		    (pclk <= hdmi->rates[i] + slop))
++			return MODE_OK;
+ 	}
+ 
+-	return (valid) ? MODE_OK : MODE_BAD;
++	return MODE_BAD;
+ }
+ 
+ static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = {
+@@ -251,7 +299,39 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder,
+ 				    const struct drm_display_mode *mode,
+ 				    struct drm_display_mode *adj_mode)
+ {
+-	return true;
++	struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
++	int pclk = adj_mode->clock * 1000;
++	int best_diff = INT_MAX;
++	int best_clock = 0;
++	int slop;
++	int i;
++
++	/* Pick the best clock */
++	for (i = 0; i < hdmi->rates_cnt; i++) {
++		int diff = hdmi->rates[i] - pclk;
++
++		if (diff < 0)
++			diff = -diff;
++		if (diff < best_diff) {
++			best_diff = diff;
++			best_clock = hdmi->rates[i];
++
++			/* Bail early if we're exact */
++			if (best_diff == 0)
++				return true;
++		}
++	}
++
++	/* Double check that it's OK */
++	slop = CLK_SLOP(pclk);
++	if ((pclk >= best_clock - slop) && (pclk <= best_clock + slop)) {
++		adj_mode->clock = DIV_ROUND_UP(best_clock, 1000);
++		return true;
++	}
++
++	/* Shoudn't be here; we should have said rate wasn't valid */
++	dev_warn(hdmi->dev, "tried to set invalid rate %d\n", adj_mode->clock);
++	return false;
+ }
+ 
+ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder,
+@@ -307,6 +387,7 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
+ }
+ 
+ static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
++	.mode_valid = dw_hdmi_rockchip_encoder_mode_valid,
+ 	.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
+ 	.mode_set   = dw_hdmi_rockchip_encoder_mode_set,
+ 	.enable     = dw_hdmi_rockchip_encoder_enable,
+@@ -406,7 +487,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = {
+ };
+ 
+ static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
+-	.mode_valid = dw_hdmi_rockchip_mode_valid,
+ 	.mpll_cfg = rockchip_mpll_cfg,
+ 	.cur_ctr = rockchip_cur_ctr,
+ 	.phy_config = rockchip_phy_config,
+@@ -423,7 +503,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = {
+ };
+ 
+ static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
+-	.mode_valid = dw_hdmi_rockchip_mode_valid,
+ 	.mpll_cfg   = rockchip_mpll_cfg,
+ 	.cur_ctr    = rockchip_cur_ctr,
+ 	.phy_config = rockchip_phy_config,
+@@ -443,7 +522,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = {
+ };
+ 
+ static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
+-	.mode_valid = dw_hdmi_rockchip_mode_valid,
+ 	.mpll_cfg = rockchip_mpll_cfg,
+ 	.cur_ctr = rockchip_cur_ctr,
+ 	.phy_config = rockchip_phy_config,
+@@ -460,7 +538,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = {
+ };
+ 
+ static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
+-	.mode_valid = dw_hdmi_rockchip_mode_valid,
+ 	.mpll_cfg   = rockchip_mpll_cfg,
+ 	.cur_ctr    = rockchip_cur_ctr,
+ 	.phy_config = rockchip_phy_config,
+@@ -558,6 +635,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
+ 	 */
+ 	if (IS_ERR(hdmi->hdmi)) {
+ 		ret = PTR_ERR(hdmi->hdmi);
++		devm_kfree(hdmi->dev, hdmi->rates);
+ 		drm_encoder_cleanup(encoder);
+ 		clk_disable_unprepare(hdmi->vpll_clk);
+ 	}
+@@ -570,6 +648,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
+ {
+ 	struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
+ 
++	devm_kfree(hdmi->dev, hdmi->rates);
+ 	dw_hdmi_unbind(hdmi->hdmi);
+ 	clk_disable_unprepare(hdmi->vpll_clk);
+ }

buildroot-external/board/asus/tinker/patches/linux/2013-ARM-DTS-rk3288-tinker-Enabling-SDIO-Wireless-and.patch

@@ -1,165 +0,0 @@
-From 2715f4a9ab5c169c546029a61eebb0bde6619b0e Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:12:48 +0200
-Subject: [PATCH 18/28] ARM: DTS: rk3288-tinker.dts: Enabling SDIO, Wireless
- and Bluetooth
-
-Adding the appropriate nodes in order to exploit the WiFi capabilities
-of the board.
-Since these capabilities are provided through SDIO, and the SDIO
-nodes were not defined, these were added too.
-
-These seems to depend on each other so they are added in one big
-patch.
-
-Split if necessary.
-
-Bluetooth and uart0 (AKA Bluetooth UART) definitions were also added
-in order to deal with all the wireless techs in one patch.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 82 ++++++++++++++++++++++++++++++++++++-
- 1 file changed, 81 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 346b0d8b..c552fd95 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -44,6 +44,7 @@
- 
- #include "rk3288.dtsi"
- #include <dt-bindings/input/input.h>
-+#include <dt-bindings/clock/rockchip,rk808.h>
- 
- / {
- 	model = "Rockchip RK3288 Tinker Board";
-@@ -114,6 +115,24 @@
- 		};
- 	};
- 
-+	/* This is essential to get SDIO devices working.
-+	   The Wifi depends on SDIO ! */
-+	sdio_pwrseq: sdio-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		clocks = <&rk808 RK808_CLKOUT1>;
-+		clock-names = "ext_clock";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
-+
-+		/*
-+		 * On the module itself this is one of these (depending
-+		 * on the actual card populated):
-+		 * - SDIO_RESET_L_WL_REG_ON
-+		 * - PDN (power down when low)
-+		 */
-+		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
-+	};
-+
- 	vcc_sys: vsys-regulator {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc_sys";
-@@ -134,6 +153,28 @@
- 		startup-delay-us = <100000>;
- 		vin-supply = <&vcc_io>;
- 	};
-+
-+	wireless-wlan {
-+		compatible = "wlan-platdata";
-+		rockchip,grf = <&grf>;
-+		wifi_chip_type = "8723bs";
-+		sdio_vref = <1800>;
-+		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+
-+	wireless-bluetooth {
-+		compatible = "bluetooth-platdata";
-+		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-+		pinctrl-names = "default","rts_gpio";
-+		pinctrl-0 = <&uart0_rts>;
-+		pinctrl-1 = <&uart0_gpios>;
-+		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
-+		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
-+		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+
- };
- 
- &cpu0 {
-@@ -373,10 +414,30 @@
- 
- &io_domains {
- 	status = "okay";
--
-+	rockchip,grf = <&grf>;
-+	wifi-supply = <&vcc_18>;
- 	sdcard-supply = <&vccio_sd>;
- };
- 
-+&sdio0 {
-+	status = "okay";
-+	clock-frequency = <50000000>;
-+	clock-freq-min-max = <200000 50000000>;
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	cap-sdio-irq;
-+	disable-wp;
-+	keep-power-in-suspend;
-+	mmc-pwrseq = <&sdio_pwrseq>;
-+	non-removable;
-+	num-slots = <1>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
-+	sd-uhs-sdr104;
-+	supports-sdio;
-+
-+};
-+
- &pinctrl {
- 	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
- 		drive-strength = <8>;
-@@ -422,6 +483,16 @@
- 		};
- 	};
- 
-+	sdio-pwrseq {
-+		wifi_enable_h: wifienable-h {
-+			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+
-+		chip_enable_h: chip-enable-h {
-+			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
- 	sdmmc {
- 		sdmmc_bus4: sdmmc-bus4 {
- 			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
-@@ -453,6 +524,13 @@
- 			rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
- 		};
- 	};
-+
-+	wireless-bluetooth {
-+		uart0_gpios: uart0-gpios {
-+			rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
- };
- 
- &pwm0 {
-@@ -485,6 +563,8 @@
- 
- &uart0 {
- 	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
- };
- 
- &uart1 {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2013-spi-Added-support-for-Tinkerboard-s-SPI-interface.patch

@@ -0,0 +1,22 @@
+From d4d128324b8f8a9f5c441203d94703e41fa07df3 Mon Sep 17 00:00:00 2001
+From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
+Date: Mon, 5 Nov 2018 19:57:56 +0100
+Subject: [PATCH] spi: Added support for Tinkerboard's SPI interface
+
+Imported from ARMbian
+
+Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
+---
+
+diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
+index 255786f2e..3a3f2e6fd 100644
+--- a/drivers/spi/spidev.c
++++ b/drivers/spi/spidev.c
+@@ -665,6 +665,7 @@ static const struct of_device_id spidev_dt_ids[] = {
+ 	{ .compatible = "lwn,bk4" },
+ 	{ .compatible = "dh,dhcom-board" },
+ 	{ .compatible = "menlo,m53cpld" },
++	{ .compatible = "rockchip,spi_tinker" },
+ 	{},
+ };
+ MODULE_DEVICE_TABLE(of, spidev_dt_ids);

buildroot-external/board/asus/tinker/patches/linux/2014-ARM-DTS-rk3288-tinker-Setup-the-Bluetooth-UART-pins.patch

@@ -1,30 +0,0 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 07b4af4..7755426 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -162,7 +162,7 @@
- 		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
- 		status = "okay";
- 	};
--
-+/*
- 	wireless-bluetooth {
- 		compatible = "bluetooth-platdata";
- 		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-@@ -174,6 +174,7 @@
- 		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
- 		status = "okay";
- 	};
-+*/
- 
- };
- 
-@@ -620,7 +621,7 @@
- &uart0 {
- 	status = "okay";
- 	pinctrl-names = "default";
--	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
-+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>,  <&uart0_rts>;
- };
- 
- &uart1 {

buildroot-external/board/asus/tinker/patches/linux/2015-ARM-DTS-rk3288-tinker-Improving-the-CPU-max-volt.patch

@@ -1,29 +0,0 @@
-From d4775f623b25009039a8ef3f28332033c7766ecc Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:20:33 +0200
-Subject: [PATCH 19/28] ARM: DTS: rk3288-tinker.dts: Improving the CPU max
- voltage
-
-Taken from the various patches provided by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index c552fd95..4ce94698 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -243,7 +243,7 @@
- 				regulator-always-on;
- 				regulator-boot-on;
- 				regulator-min-microvolt = <750000>;
--				regulator-max-microvolt = <1350000>;
-+				regulator-max-microvolt = <1450000>;
- 				regulator-name = "vdd_arm";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2016-ARM-DTS-rk3288-tinker-Setting-up-the-SD-regulato.patch

@@ -1,40 +0,0 @@
-From 39e50ab508d8104a733771a8681908a66a300edd Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:25:03 +0200
-Subject: [PATCH 20/28] ARM: DTS: rk3288-tinker.dts: Setting up the SD
- regulators
-
-Some are needed and some are not. Playing with these parameters is
-required to get reboot working on these boards.
-
-I still can't believe that these boards can't soft reset correctly.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 4ce94698..90c1a251 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -333,6 +333,8 @@
- 			};
- 
- 			vccio_sd: LDO_REG5 {
-+				regulator-always-on;
-+				regulator-boot-on;
- 				regulator-min-microvolt = <1800000>;
- 				regulator-max-microvolt = <3300000>;
- 				regulator-name = "vccio_sd";
-@@ -379,7 +381,6 @@
- 			};
- 
- 			vcc33_sd: SWITCH_REG1 {
--				regulator-always-on;
- 				regulator-boot-on;
- 				regulator-name = "vcc33_sd";
- 				regulator-state-mem {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2017-ARM-DTS-rk3288-tinker-Defined-the-I2C-interfaces.patch

@@ -1,53 +0,0 @@
-From b0a552add28bf4590b979abb3530b14b6811eec1 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:33:39 +0200
-Subject: [PATCH 21/28] ARM: DTS: rk3288-tinker.dts: Defined the I2C interfaces
-
-And all the hardware behind.
-
-Taken from, and tested by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 90c1a251..67a3ce6f 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -400,8 +400,31 @@
- 	};
- };
- 
-+&i2c1 {
-+	status = "okay";
-+};
-+
- &i2c2 {
- 	status = "okay";
-+
-+	afc0:af-controller@0 {
-+		status = "okay";
-+		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
-+		reg = <0x0c>;
-+	};
-+
-+	eeprom:m24c08@50 {
-+		compatible = "at,24c08";
-+		reg = <0x50>;
-+	};
-+};
-+
-+&i2c3 {
-+	status = "okay";
-+};
-+
-+&i2c4 {
-+	status = "okay";
- };
- 
- &i2c5 {
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Add-the-MIPI-DSI-node.patch.disabled

@@ -1,35 +0,0 @@
-From 8ca607f3fe77c80a3367d8363703d5dc1d6781d4 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:36:02 +0200
-Subject: [PATCH 22/28] ARM: DTS: rk3288-tinker.dts: Add the MIPI DSI node
-
-Taken from, and tested by @TonyMac32 .
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 67a3ce6f..6f4c0843 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -443,6 +443,15 @@
- 	sdcard-supply = <&vccio_sd>;
- };
- 
-+&mipi_dsi {
-+	status = "okay";
-+	mipi_panel: mipi-panel {
-+		compatible ="asus,tc358762";
-+		reg = <0x0 0>;
-+		status = "okay";
-+	};
-+};
-+
- &sdio0 {
- 	status = "okay";
- 	clock-frequency = <50000000>;
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2019-ARM-DTS-rk3288-tinker-Defining-SDMMC-properties.patch

@@ -1,33 +0,0 @@
-From 58d72a1cc693c4c08391487476d0cd6d167a57cf Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Thu, 19 Oct 2017 22:48:36 +0200
-Subject: [PATCH 24/28] ARM: DTS: rk3288-tinker.dts: Defining SDMMC properties
-
-I never knew if these properties were required to fix the dreaded
-reboot issue...
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index f4b4525c..a0663425 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -601,7 +601,12 @@
- 	disable-wp;			/* wp not hooked up */
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
-+	sd-uhs-sdr12;
-+	sd-uhs-sdr25;
-+	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
- 	status = "okay";
-+	supports-sd;
- 	vmmc-supply = <&vcc33_sd>;
- 	vqmmc-supply = <&vccio_sd>;
- };
--- 
-2.11.0
-

buildroot-external/board/asus/tinker/patches/linux/2020-ARM-DTSI-rk3288-Define-the-VPU-services.patch

@@ -1,107 +0,0 @@
-From f4480cb8198085607c15e523b49aa21bc38cf62c Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:47:33 +0100
-Subject: [PATCH 1/5] ARM: DTSI: rk3288.dtsi: Define the VPU services
-
-Still, you will need appropriate drivers to use them.
-
-Contrary to the previous versions of this patch, these services are :
-* NOT enabled by default;
-* MUST be activated in each individual DTS;
-
-I currently do not own enough RK3288 boards to ensure that the
-VPU and HEVC MMU + services can be activated without issues.
-
-Still this patch does not generate issues like the previous one AND
-still enable these services on boot, when activated properly in
-individual DTS files.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 63 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 30b04257..bc3601ac 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1182,6 +1182,27 @@
- 		status = "disabled";
- 	};
- 
-+	vpu_service: vpu-service@ff9a0000 {
-+		compatible = "rockchip,vpu_service";
-+		reg = <0x0 0xff9a0000 0x0 0x800>;
-+		interrupts = 
-+			<GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "irq_enc", "irq_dec";
-+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-+		clock-names = "aclk_vcodec", "hclk_vcodec";
-+		power-domains = <&power RK3288_PD_VIDEO>;
-+		rockchip,grf = <&grf>;
-+		resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
-+		reset-names = "video_a", "video_h";
-+		iommus = <&vpu_mmu>;
-+		iommu_enabled = <1>;
-+		dev_mode = <0>;
-+		status = "disabled";
-+		/* 0 means ion, 1 means drm */
-+		allocator = <1>;
-+	};
-+
- 	hevc_mmu: iommu@ff9c0440 {
- 		compatible = "rockchip,iommu";
- 		reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
-@@ -1191,6 +1212,48 @@
- 		status = "disabled";
- 	};
- 
-+	hevc_service: hevc-service@ff9c0000 {
-+		compatible = "rockchip,hevc_service";
-+		reg = <0x0 0xff9c0000 0x0 0x400>;
-+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "irq_dec";
-+		clocks =
-+			<&cru ACLK_HEVC>,
-+			<&cru HCLK_HEVC>,
-+			<&cru SCLK_HEVC_CORE>,
-+			<&cru SCLK_HEVC_CABAC>;
-+		clock-names =
-+			"aclk_vcodec",
-+			"hclk_vcodec",
-+			"clk_core",
-+			"clk_cabac";
-+		/*
-+		* The 4K hevc would also work well with 500/125/300/300,
-+		* no more err irq and reset request.
-+		*/
-+		assigned-clocks = 
-+			<&cru ACLK_HEVC>,
-+			<&cru HCLK_HEVC>,
-+			<&cru SCLK_HEVC_CORE>,
-+			<&cru SCLK_HEVC_CABAC>;
-+		assigned-clock-rates =
-+			<400000000>,
-+			<100000000>,
-+			<300000000>,
-+			<300000000>;
-+
-+		resets = <&cru SRST_HEVC>;
-+		reset-names = "video";
-+		power-domains = <&power RK3288_PD_HEVC>;
-+		rockchip,grf = <&grf>;
-+		dev_mode = <1>;
-+		iommus = <&hevc_mmu>;
-+		iommu_enabled = <1>;
-+		status = "disabled";
-+		/* 0 means ion, 1 means drm */
-+		allocator = <1>;
-+	};
-+
- 	gpu: gpu@ffa30000 {
- 		compatible = "rockchip,rk3288-mali", "arm,mali-t760";
- 		reg = <0x0 0xffa30000 0x0 0x10000>;
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/2021-ARM-DTS-rk3288-miqi-Enable-the-Video-encoding-MM.patch

@@ -1,57 +0,0 @@
-From 647d6012849191e9909a8acb0fc9ae5df1afc747 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:51:31 +0100
-Subject: [PATCH 2/5] ARM: DTS: rk3288-miqi.dts: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU service;
-* HEVC MMU;
-* HEVC service;
-on MiQi devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-miqi.dts | 18 +++++++++++++++++-
- 1 file changed, 17 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
-index d7fde483..dd785c70 100644
---- a/arch/arm/boot/dts/rk3288-miqi.dts
-+++ b/arch/arm/boot/dts/rk3288-miqi.dts
-@@ -124,7 +124,7 @@
- 	};
- 
- 
--	cpu0_opp_table: opp_table0 {
-+	cpu0_opp_table: opp_table {
- 		compatible = "operating-points-v2";
- 		opp-shared;
- 
-@@ -575,6 +575,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/2022-ARM-DTS-rk3288-tinker-Enable-the-Video-encoding-MMU-.patch

@@ -1,48 +0,0 @@
-From 092c26ead2eb4035a57217f8705c9deed3bfb927 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:54:22 +0100
-Subject: [PATCH 3/5] ARM: DTS: rk3288-tinker: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for ASUS Tinkerboard devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-tinker.dts | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index a0663425..07b4af4f 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -671,6 +671,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/2023-ARM-DTSI-rk3288-firefly-Enable-the-Video-encoding-MM.patch

@@ -1,49 +0,0 @@
-From 2769b0e656d849c5d652c75db71ce0faff1c0551 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:56:45 +0100
-Subject: [PATCH 4/5] ARM: DTSI: rk3288-firefly: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for RK3288 Firefly devices.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-firefly.dtsi | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
-index b9e6f3a9..9961acce 100644
---- a/arch/arm/boot/dts/rk3288-firefly.dtsi
-+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
-@@ -606,6 +606,23 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
-+
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/2024-ARM-DTSI-rk3288-veyron-Enable-the-Video-encoding-MMU.patch

@@ -1,48 +0,0 @@
-From 4766516bcbf023813ad883c2d61c422316770d12 Mon Sep 17 00:00:00 2001
-From: Myy Miouyouyou <myy@miouyouyou.fr>
-Date: Tue, 21 Nov 2017 21:58:22 +0100
-Subject: [PATCH 5/5] ARM: DTSI: rk3288-veyron: Enable the Video encoding MMU
- and services
-
-Enable the :
-* VPU MMU;
-* VPU Service;
-* HEVC MMU;
-* HEVC Service;
-for RK3288 Chromebook laptops.
-
-Signed-off-by: Myy Miouyouyou <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
-index 6e5bd897..517b9242 100644
---- a/arch/arm/boot/dts/rk3288-veyron.dtsi
-+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
-@@ -450,6 +450,22 @@
- 	status = "okay";
- };
- 
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
- &wdt {
- 	status = "okay";
- };
--- 
-2.14.1
-

buildroot-external/board/asus/tinker/patches/linux/2025-ARM-DTSI-rk3288-Renamed-the-VPU-services-clocks.patch

@@ -1,39 +0,0 @@
-From 29ef524e8890bbfd24602a61e14234259df92349 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Mon, 25 Jun 2018 17:05:37 +0200
-Subject: [PATCH 25/26] ARM: DTSI: rk3288: Renamed the VPU services clocks
-
-In order to conform to the naming scheme used in the whole DTSI.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 796609e3..45ec4e89 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1242,7 +1242,7 @@
- 			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- 		interrupt-names = "irq_enc", "irq_dec";
- 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
--		clock-names = "aclk_vcodec", "hclk_vcodec";
-+		clock-names = "aclk", "iface";
- 		power-domains = <&power RK3288_PD_VIDEO>;
- 		rockchip,grf = <&grf>;
- 		resets = <&cru SRST_VCODEC_AXI>, <&cru SRST_VCODEC_AHB>;
-@@ -1277,8 +1277,8 @@
- 			<&cru SCLK_HEVC_CORE>,
- 			<&cru SCLK_HEVC_CABAC>;
- 		clock-names =
--			"aclk_vcodec",
--			"hclk_vcodec",
-+			"aclk",
-+			"iface",
- 			"clk_core",
- 			"clk_cabac";
- 		/*
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/2026-ARM-DTSI-rk3288-Set-the-VPU-MMU-power-domains.patch

@@ -1,56 +0,0 @@
-From d3d3fe433d9038dcd1a98f4d6711c0777ed06703 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Mon, 25 Jun 2018 17:08:32 +0200
-Subject: [PATCH 26/26] ARM: DTSI: rk3288: Set the VPU MMU power domains
-
-Without that, the auto-activation of the VPU hardware IOMMU fails
-when enabling the hardware, before the "probe" phase of its device
-driver.
-
-Basically, when loading a "of_platform" device driver targeting
-the VPU devices, you'll get these errors without this patch :
-
-[12753.996950] rk_iommu ff9c0440.iommu: Error during raw reset. MMU_DTE_ADDR is not functioning
-[12754.007483] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
-[12754.026652] rk_iommu ff9c0440.iommu: Disable paging request timed out, status: 0xffffffff
-[12754.045975] rk_iommu ff9c0440.iommu: Disable stall request timed out, status: 0xffffffff
-
-When using this patch, the errors disappear.
-
-This seems to be due to the IOMMU device sharing the same power domain
-than the device.
-When loading an "of_platform" driver, the kernel logic seems to try
-enabling the associated IOMMU device before letting the driver handles
-anything with the actual VPU hardware.
-It appears that setting the power domain of the VPU IOMMU nodes let the
-IOMMU driver enable the IOMMU shared power domain, and make the IOMMU
-device useable.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 45ec4e89..46e1b8e2 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1230,6 +1230,7 @@
- 		interrupt-names = "vpu_mmu";
- 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
- 		clock-names = "aclk", "iface";
-+		power-domains = <&power RK3288_PD_VIDEO>;
- 		#iommu-cells = <0>;
- 		status = "disabled";
- 	};
-@@ -1262,6 +1263,7 @@
- 		interrupt-names = "hevc_mmu";
- 		clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
- 		clock-names = "aclk", "iface";
-+		power-domains = <&power RK3288_PD_HEVC>;
- 		#iommu-cells = <0>;
- 		status = "disabled";
- 	};
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/2027-ARM-dtsi-The-VPU-service-as-defined-in-the-V4L2-driv.patch

@@ -1,43 +0,0 @@
-From 7f8607ba9a20f8ddb5c24559d9b875af762d4717 Mon Sep 17 00:00:00 2001
-From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
-Date: Tue, 11 Sep 2018 02:55:55 +0200
-Subject: [PATCH] ARM: dtsi: The VPU service as defined in the V4L2 driver
-
-Let's try the V4L2 road.
-They've got a lot of things ready, like an entire H264
-movie with the V4L2 data of *every frame*.
-
-That might help in this endless endeavour.
-
-Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
----
- arch/arm/boot/dts/rk3288.dtsi | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 72c36af6..d23c7fa5 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1246,7 +1246,18 @@
- 		clock-names = "aclk", "iface";
- 		power-domains = <&power RK3288_PD_VIDEO>;
- 		#iommu-cells = <0>;
--		status = "disabled";
-+	};
-+
-+	vpu: video-codec@ff9a0000 {
-+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
-+		clock-names = "aclk", "hclk";
-+		compatible = "rockchip,rk3288-vpu";
-+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
-+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-+		interrupt-names = "vepu", "vdpu";
-+		iommus = <&vpu_mmu>;
-+		power-domains = <&power RK3288_PD_VIDEO>;
-+		reg = <0x0 0xff9a0000 0x0 0x800>;
- 	};
- 
- 	hevc_mmu: iommu@ff9c0440 {
--- 
-2.16.4
-

buildroot-external/board/asus/tinker/patches/linux/261_gpiomem_driver.patch

@@ -0,0 +1,395 @@
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index e5b7ef1a5..f88c913ff 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -544,3 +544,6 @@
+ &wdt {
+ 	status = "okay";
+ };
++&gpiomem {
++    status = "okay";
++};
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index f3ca55496..14bbcb192 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -1418,6 +1418,12 @@
+ 		interrupts = <GIC_PPI 9 0xf04>;
+ 	};
+ 
++	gpiomem: rk3288-gpiomem@ff750000 {
++		compatible = "rockchip,rk3288-gpiomem";
++		reg = <0x0 0xff750000 0x0 0x1000>;
++		status = "disabled";
++	};
++
+ 	pinctrl: pinctrl {
+ 		compatible = "rockchip,rk3288-pinctrl";
+ 		rockchip,grf = <&grf>;
+
+diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
+index 3143db5..9c18b74 100644
+--- a/drivers/char/Kconfig
++++ b/drivers/char/Kconfig
+@@ -5,6 +5,7 @@
+ menu "Character devices"
+ 
+ source "drivers/tty/Kconfig"
++source "drivers/char/rockchip/Kconfig"
+ 
+ config DEVMEM
+ 	bool "/dev/mem virtual device support"
+diff --git a/drivers/char/Makefile b/drivers/char/Makefile
+index d8a7579..290cb32 100644
+--- a/drivers/char/Makefile
++++ b/drivers/char/Makefile
+@@ -51,6 +51,8 @@ obj-$(CONFIG_PS3_FLASH)		+= ps3flash.o
+ obj-$(CONFIG_JS_RTC)		+= js-rtc.o
+ js-rtc-y = rtc.o
+ 
++obj-$(CONFIG_ARCH_ROCKCHIP)	+= rockchip/
++
+ obj-$(CONFIG_XILLYBUS)		+= xillybus/
+ obj-$(CONFIG_POWERNV_OP_PANEL)	+= powernv-op-panel.o
+ obj-$(CONFIG_ADI)		+= adi.o
+diff --git a/drivers/char/rockchip/Kconfig b/drivers/char/rockchip/Kconfig
+new file mode 100644
+index 0000000..6e97486
+--- /dev/null
++++ b/drivers/char/rockchip/Kconfig
+@@ -0,0 +1,16 @@
++#
++# Broadcom char driver config
++#
++
++menuconfig RK_CHAR_DRIVERS
++	bool "Rockchip Char Drivers"
++	help
++	  Rockchip's char drivers
++
++config RK3288_DEVGPIOMEM
++	tristate "/dev/gpiomem rootless GPIO access via mmap() on the RK3288"
++	default y
++	help
++		Provides users with root-free access to the GPIO registers
++		on the 3288. Calling mmap(/dev/gpiomem) will map the GPIO
++		register page to the user's pointer.
+\ No newline at end of file
+diff --git a/drivers/char/rockchip/Makefile b/drivers/char/rockchip/Makefile
+new file mode 100644
+index 0000000..2287ec2
+--- /dev/null
++++ b/drivers/char/rockchip/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_RK3288_DEVGPIOMEM)+= rk3288-gpiomem.o
+\ No newline at end of file
+diff --git a/drivers/char/rockchip/rk3288-gpiomem.c b/drivers/char/rockchip/rk3288-gpiomem.c
+new file mode 100644
+index 0000000..984471c
+--- /dev/null
++++ b/drivers/char/rockchip/rk3288-gpiomem.c
+@@ -0,0 +1,303 @@
++/**
++ * GPIO memory device driver
++ *
++ * Creates a chardev /dev/gpiomem which will provide user access to
++ * the rk3288's GPIO registers when it is mmap()'d.
++ * No longer need root for user GPIO access, but without relaxing permissions
++ * on /dev/mem.
++ *
++ * Written by Luke Wren <luke@raspberrypi.org>
++ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ *    notice, this list of conditions, and the following disclaimer,
++ *    without modification.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ *    notice, this list of conditions and the following disclaimer in the
++ *    documentation and/or other materials provided with the distribution.
++ * 3. The names of the above-listed copyright holders may not be used
++ *    to endorse or promote products derived from this software without
++ *    specific prior written permission.
++ *
++ * ALTERNATIVELY, this software may be distributed under the terms of the
++ * GNU General Public License ("GPL") version 2, as published by the Free
++ * Software Foundation.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <linux/cdev.h>
++#include <linux/pagemap.h>
++#include <linux/io.h>
++
++#define DEVICE_NAME "rk3288-gpiomem"
++#define DRIVER_NAME "gpiomem-rk3288"
++#define DEVICE_MINOR 0
++
++struct rk3288_gpiomem_instance {
++	unsigned long gpio_regs_phys;
++	struct device *dev;
++};
++
++static struct cdev rk3288_gpiomem_cdev;
++static dev_t rk3288_gpiomem_devid;
++static struct class *rk3288_gpiomem_class;
++static struct device *rk3288_gpiomem_dev;
++static struct rk3288_gpiomem_instance *inst;
++
++
++/****************************************************************************
++*
++*   GPIO mem chardev file ops
++*
++***************************************************************************/
++
++static int rk3288_gpiomem_open(struct inode *inode, struct file *file)
++{
++	int dev = iminor(inode);
++	int ret = 0;
++
++	if (dev != DEVICE_MINOR) {
++		dev_err(inst->dev, "Unknown minor device: %d", dev);
++		ret = -ENXIO;
++	}
++	return ret;
++}
++
++static int rk3288_gpiomem_release(struct inode *inode, struct file *file)
++{
++	int dev = iminor(inode);
++	int ret = 0;
++
++	if (dev != DEVICE_MINOR) {
++		dev_err(inst->dev, "Unknown minor device %d", dev);
++		ret = -ENXIO;
++	}
++	return ret;
++}
++
++static const struct vm_operations_struct rk3288_gpiomem_vm_ops = {
++#ifdef CONFIG_HAVE_IOREMAP_PROT
++	.access = generic_access_phys
++#endif
++};
++static int address_is_allowed(unsigned long pfn, unsigned long size)
++{
++    unsigned long address = pfn << PAGE_SHIFT;
++
++    dev_info(inst->dev, "address_is_allowed.pfn: 0x%08lx", address);
++
++    switch(address) {
++
++        case 0xff750000:
++        case 0xff760000:
++        case 0xff780000:
++        case 0xff790000:
++        case 0xff7a0000:
++        case 0xff7b0000:
++        case 0xff7c0000:
++        case 0xff7d0000:
++        case 0xff7e0000:
++        case 0xff7f0000:
++        case 0xff7f2000:
++        case 0xff770000:
++        case 0xff730000:
++        case 0xff680000:
++            dev_info(inst->dev, "address_is_allowed.return 1");
++            return 1;
++            break; 
++        default :
++            dev_info(inst->dev, "address_is_allowed.return 0");
++	        return 0;
++    }
++}
++
++static int rk3288_gpiomem_mmap(struct file *file, struct vm_area_struct *vma)
++{
++
++    size_t size;
++
++	size = vma->vm_end - vma->vm_start;
++
++
++	if (!address_is_allowed(vma->vm_pgoff, size))
++		return -EPERM;
++
++	vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_pgoff,
++						 size,
++						 vma->vm_page_prot);
++
++	vma->vm_ops =  &rk3288_gpiomem_vm_ops;
++
++	/* Remap-pfn-range will mark the range VM_IO */
++	if (remap_pfn_range(vma,
++			    vma->vm_start,
++			    vma->vm_pgoff,
++			    size,
++			    vma->vm_page_prot)) {
++		return -EAGAIN;
++	}
++
++	return 0;
++}
++
++static const struct file_operations
++rk3288_gpiomem_fops = {
++	.owner = THIS_MODULE,
++	.open = rk3288_gpiomem_open,
++	.release = rk3288_gpiomem_release,
++	.mmap = rk3288_gpiomem_mmap,
++};
++
++static int rk3288_gpiomem_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
++{
++    add_uevent_var(env, "DEVMODE=%#o", 0666);
++    return 0;
++}
++
++ /****************************************************************************
++*
++*   Probe and remove functions
++*
++***************************************************************************/
++
++
++static int rk3288_gpiomem_probe(struct platform_device *pdev)
++{
++	int err;
++	void *ptr_err;
++	struct device *dev = &pdev->dev;
++	struct resource *ioresource;
++
++	/* Allocate buffers and instance data */
++
++	inst = kzalloc(sizeof(struct rk3288_gpiomem_instance), GFP_KERNEL);
++
++	if (!inst) {
++		err = -ENOMEM;
++		goto failed_inst_alloc;
++	}
++
++	inst->dev = dev;
++
++	ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (ioresource) {
++		inst->gpio_regs_phys = ioresource->start;
++	} else {
++		dev_err(inst->dev, "failed to get IO resource");
++		err = -ENOENT;
++		goto failed_get_resource;
++	}
++
++	/* Create character device entries */
++
++	err = alloc_chrdev_region(&rk3288_gpiomem_devid,
++				  DEVICE_MINOR, 1, DEVICE_NAME);
++	if (err != 0) {
++		dev_err(inst->dev, "unable to allocate device number");
++		goto failed_alloc_chrdev;
++	}
++	cdev_init(&rk3288_gpiomem_cdev, &rk3288_gpiomem_fops);
++	rk3288_gpiomem_cdev.owner = THIS_MODULE;
++	err = cdev_add(&rk3288_gpiomem_cdev, rk3288_gpiomem_devid, 1);
++	if (err != 0) {
++		dev_err(inst->dev, "unable to register device");
++		goto failed_cdev_add;
++	}
++
++	/* Create sysfs entries */
++
++	rk3288_gpiomem_class = class_create(THIS_MODULE, DEVICE_NAME);
++	ptr_err = rk3288_gpiomem_class;
++	if (IS_ERR(ptr_err))
++		goto failed_class_create;
++	rk3288_gpiomem_class->dev_uevent = rk3288_gpiomem_dev_uevent;
++	rk3288_gpiomem_dev = device_create(rk3288_gpiomem_class, NULL,
++					rk3288_gpiomem_devid, NULL,
++					"gpiomem");
++	ptr_err = rk3288_gpiomem_dev;
++	if (IS_ERR(ptr_err))
++		goto failed_device_create;
++
++	dev_info(inst->dev, "Initialised: Registers at 0x%08lx",
++		inst->gpio_regs_phys);
++
++	return 0;
++
++failed_device_create:
++	class_destroy(rk3288_gpiomem_class);
++failed_class_create:
++	cdev_del(&rk3288_gpiomem_cdev);
++	err = PTR_ERR(ptr_err);
++failed_cdev_add:
++	unregister_chrdev_region(rk3288_gpiomem_devid, 1);
++failed_alloc_chrdev:
++failed_get_resource:
++	kfree(inst);
++failed_inst_alloc:
++	dev_err(inst->dev, "could not load rk3288_gpiomem");
++	return err;
++}
++
++static int rk3288_gpiomem_remove(struct platform_device *pdev)
++{
++	struct device *dev = inst->dev;
++
++	kfree(inst);
++	device_destroy(rk3288_gpiomem_class, rk3288_gpiomem_devid);
++	class_destroy(rk3288_gpiomem_class);
++	cdev_del(&rk3288_gpiomem_cdev);
++	unregister_chrdev_region(rk3288_gpiomem_devid, 1);
++
++	dev_info(dev, "GPIO mem driver removed - OK");
++	return 0;
++}
++
++ /****************************************************************************
++*
++*   Register the driver with device tree
++*
++***************************************************************************/
++
++static const struct of_device_id rk3288_gpiomem_of_match[] = {
++	{.compatible = "rockchip,rk3288-gpiomem",},
++	{ /* sentinel */ },
++};
++
++MODULE_DEVICE_TABLE(of, rk3288_gpiomem_of_match);
++
++static struct platform_driver rk3288_gpiomem_driver = {
++	.probe = rk3288_gpiomem_probe,
++	.remove = rk3288_gpiomem_remove,
++	.driver = {
++		   .name = DRIVER_NAME,
++		   .owner = THIS_MODULE,
++		   .of_match_table = rk3288_gpiomem_of_match,
++		   },
++};
++
++module_platform_driver(rk3288_gpiomem_driver);
++
++MODULE_ALIAS("platform:gpiomem-rk3288");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("gpiomem driver for accessing GPIO from userspace");
++MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
+\ No newline at end of file

buildroot-external/board/asus/tinker/patches/linux/3000_RK3288-Tinkerboard-add-1.7_1.8Ghz_OPP.patch

@@ -1,45 +0,0 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 2601316da..08ec7aa4b 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -210,8 +210,8 @@
- 			vdd_cpu: DCDC_REG1 {
- 				regulator-always-on;
- 				regulator-boot-on;
--				regulator-min-microvolt = <750000>;
--				regulator-max-microvolt = <1450000>;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
- 				regulator-name = "vdd_arm";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
-@@ -222,8 +222,8 @@
- 			vdd_gpu: DCDC_REG2 {
- 				regulator-always-on;
- 				regulator-boot-on;
--				regulator-min-microvolt = <850000>;
--				regulator-max-microvolt = <1250000>;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
- 				regulator-name = "vdd_gpu";
- 				regulator-ramp-delay = <6000>;
- 				regulator-state-mem {
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 22bcaaa29..2fcd46098 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -149,6 +149,14 @@
- 			opp-hz = /bits/ 64 <1608000000>;
- 			opp-microvolt = <1350000>;
- 		};
-+		opp@1704000000 {
-+			opp-hz = /bits/ 64 <1704000000>;
-+			opp-microvolt = <1350000>;
-+		};
-+		opp@1800000000 {
-+			opp-hz = /bits/ 64 <1800000000>;
-+			opp-microvolt = <1400000>;
-+		};
- 	};
- 
- 	amba {

buildroot-external/board/asus/tinker/patches/linux/ARM-DTSI-rk3288-add-usbphy-reset.patch

@@ -1,31 +0,0 @@
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 0840ffb3..5393f2cd 100644
---- a/arch/arm/boot/dts/rk3288.dtsi
-+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -894,6 +894,8 @@
- 				reg = <0x320>;
- 				clocks = <&cru SCLK_OTGPHY0>;
- 				clock-names = "phyclk";
-+				resets = <&cru SRST_USBOTG_PHY>;
-+				reset-names = "phy-reset";
- 				#clock-cells = <0>;
- 			};
- 
-@@ -902,6 +904,8 @@
- 				reg = <0x334>;
- 				clocks = <&cru SCLK_OTGPHY1>;
- 				clock-names = "phyclk";
-+				resets = <&cru SRST_USBHOST0_PHY>;
-+				reset-names = "phy-reset";
- 				#clock-cells = <0>;
- 			};
- 
-@@ -910,6 +914,8 @@
- 				reg = <0x348>;
- 				clocks = <&cru SCLK_OTGPHY2>;
- 				clock-names = "phyclk";
-+				resets = <&cru SRST_USBHOST1_PHY>;
-+				reset-names = "phy-reset";
- 				#clock-cells = <0>;
- 			};
- 		};

buildroot-external/board/asus/tinker/patches/linux/RK3288-1.8GHz-and-boost.patch

@@ -0,0 +1,80 @@
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 58bd91539..9c0dac199 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -153,6 +153,75 @@
+ 			opp-hz = /bits/ 64 <1608000000>;
+ 			opp-microvolt = <1350000>;
+ 		};
++		opp@1704000000 {
++			opp-hz = /bits/ 64 <1704000000>;
++			opp-microvolt = <1350000>;
++		};
++		opp@1800000000 {
++			opp-hz = /bits/ 64 <1800000000>;
++			opp-microvolt = <1400000>;
++		};
++		/* boot-only frequencies below */
++		opp@1896000000 {
++			opp-hz = /bits/ 64 <1896000000>;
++			opp-microvolt = <1425000>;
++			turbo-mode;
++		};
++		opp@1920000000 {
++			opp-hz = /bits/ 64 <1920000000>;
++			opp-microvolt = <1425000>;
++			turbo-mode;
++		};
++		opp@1992000000 {
++			opp-hz = /bits/ 64 <1992000000>;
++			opp-microvolt = <1450000>;
++			turbo-mode;
++		};
++		opp@2016000000 {
++			opp-hz = /bits/ 64 <2016000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2040000000 {
++			opp-hz = /bits/ 64 <2040000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2064000000 {
++			opp-hz = /bits/ 64 <2064000000>;
++			opp-microvolt = <1475000>;
++			turbo-mode;
++		};
++		opp@2088000000 {
++			opp-hz = /bits/ 64 <2088000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2112000000 {
++			opp-hz = /bits/ 64 <2112000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2136000000 {
++			opp-hz = /bits/ 64 <2136000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2160000000 {
++			opp-hz = /bits/ 64 <2160000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2184000000 {
++			opp-hz = /bits/ 64 <2184000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
++		opp@2208000000 {
++			opp-hz = /bits/ 64 <2208000000>;
++			opp-microvolt = <1500000>;
++			turbo-mode;
++		};
+ 	};
+ 
+ 	amba {

buildroot-external/board/asus/tinker/patches/linux/assert-phy-reset-when-waking-up-in-rk3288-platform.patch

@@ -1,68 +0,0 @@
-diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
-index cc9c93af..3ff41d87 100644
---- a/drivers/usb/dwc2/core.h
-+++ b/drivers/usb/dwc2/core.h
-@@ -1021,6 +1021,7 @@ struct dwc2_hsotg {
- 	u16 frame_number;
- 
- 	struct phy *phy;
-+	struct work_struct phy_rst_work;
- 	struct usb_phy *uphy;
- 	struct dwc2_hsotg_plat *plat;
- 	struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
-diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
-index 19ae2595..f1270bf1 100644
---- a/drivers/usb/dwc2/core_intr.c
-+++ b/drivers/usb/dwc2/core_intr.c
-@@ -396,6 +396,7 @@ static void dwc2_wakeup_from_lpm_l1(struct dwc2_hsotg *hsotg)
- static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
- {
- 	int ret;
-+	struct device_node *np = hsotg->dev->of_node;
- 
- 	/* Clear interrupt */
- 	dwc2_writel(hsotg, GINTSTS_WKUPINT, GINTSTS);
-@@ -435,6 +436,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
- 			/* Restart the Phy Clock */
- 			pcgcctl &= ~PCGCTL_STOPPCLK;
- 			dwc2_writel(hsotg, pcgcctl, PCGCTL);
-+
-+			/*
-+			 * It is a quirk in Rockchip RK3288, causing by
-+			 * a hardware bug. This will propagate out and
-+			 * eventually we'll re-enumerate the device.
-+			 * Not great but the best we can do.
-+			*/
-+			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
-+				schedule_work(&hsotg->phy_rst_work);
-+
- 			mod_timer(&hsotg->wkp_timer,
- 				  jiffies + msecs_to_jiffies(71));
- 		} else {
-diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
-index 57764289..748763bd 100644
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -208,6 +208,14 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
- 	return ret;
- }
- 
-+/* Only used to reset usb phy at interrupter runtime */
-+static void dwc2_reset_phy_work(struct work_struct *data)
-+{
-+	struct dwc2_hsotg *hsotg = container_of(data, struct dwc2_hsotg,
-+			phy_rst_work);
-+	phy_reset(hsotg->phy);
-+}
-+
- static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
- {
- 	int i, ret;
-@@ -252,6 +260,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
- 			return ret;
- 		}
- 	}
-+	INIT_WORK(&hsotg->phy_rst_work, dwc2_reset_phy_work);
- 
- 	if (!hsotg->phy) {
- 		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);

buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-enable-emmc-support.patch

@@ -1,25 +1,25 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 77554262..57cce114 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -612,6 +612,20 @@
- 	vqmmc-supply = <&vccio_sd>;
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index f88c913ff..7f04ccbdf 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -547,3 +547,20 @@
+ &gpiomem {
+     status = "okay";
  };
- 
++
 +&emmc {
-+	bus-width = <8>;
-+	cap-mmc-highspeed;
-+	disable-wp;
-+	non-removable;
-+	num-slots = <1>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
-+	max-frequency = <150000000>;
-+	mmc-hs200-1_8v;
-+	mmc-ddr-1_8v;
-+	status = "okay";
++    bus-width = <8>;
++    cap-mmc-highspeed;
++    non-removable;
++    pinctrl-names = "default";
++    pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
++    max-frequency = <150000000>;
++    mmc-hs200-1_8v;
++    mmc-ddr-1_8v;
++    status = "okay";
 +};
 +
- &tsadc {
- 	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
- 	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
++&hdmi {
++    pinctrl-names = "default";
++    pinctrl-0 = <&hdmi_cec_c0>;
++};

buildroot-external/board/asus/tinker/patches/linux/board-tinkerboard-support-older-eMMC-installs.patch

@@ -1,665 +0,0 @@
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 2d0b2f4c4..d5c9022e7 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -859,6 +859,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
- 	rk3288-firefly-beta.dtb \
- 	rk3288-firefly.dtb \
- 	rk3288-firefly-reload.dtb \
-+	rk3288-miniarm.dtb \
- 	rk3288-miqi.dtb \
- 	rk3288-phycore-rdk.dtb \
- 	rk3288-popmetal.dtb \
-diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
-new file mode 100644
-index 000000000..d0961c35d
---- /dev/null
-+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
-@@ -0,0 +1,647 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
-+ */
-+
-+/dts-v1/;
-+
-+#include "rk3288.dtsi"
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/clock/rockchip,rk808.h>
-+
-+/ {
-+	model = "Rockchip RK3288 Tinker Board";
-+	compatible = "asus,rk3288-tinker", "rockchip,rk3288";
-+
-+	chosen {
-+		stdout-path = "serial2:115200n8";
-+	};
-+
-+	memory {
-+		reg = <0x0 0x0 0x0 0x80000000>;
-+		device_type = "memory";
-+	};
-+
-+	ext_gmac: external-gmac-clock {
-+		compatible = "fixed-clock";
-+		#clock-cells = <0>;
-+		clock-frequency = <125000000>;
-+		clock-output-names = "ext_gmac";
-+	};
-+
-+	gpio-keys {
-+		compatible = "gpio-keys";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		autorepeat;
-+
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pwrbtn>;
-+
-+		button@0 {
-+			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
-+			linux,code = <KEY_POWER>;
-+			label = "GPIO Key Power";
-+			linux,input-type = <1>;
-+			wakeup-source;
-+			debounce-interval = <100>;
-+		};
-+	};
-+
-+	gpio-leds {
-+		compatible = "gpio-leds";
-+
-+		act-led {
-+			gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger="mmc0";
-+		};
-+
-+		heartbeat-led {
-+			gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger="heartbeat";
-+		};
-+
-+		pwr-led {
-+			gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
-+			linux,default-trigger = "default-on";
-+		};
-+	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,format = "i2s";
-+		simple-audio-card,name = "rockchip,tinker-codec";
-+		simple-audio-card,mclk-fs = <512>;
-+
-+		simple-audio-card,codec {
-+			sound-dai = <&hdmi>;
-+		};
-+
-+		simple-audio-card,cpu {
-+			sound-dai = <&i2s>;
-+		};
-+	};
-+
-+	/* This is essential to get SDIO devices working.
-+	   The Wifi depends on SDIO ! */
-+	sdio_pwrseq: sdio-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		clocks = <&rk808 RK808_CLKOUT1>;
-+		clock-names = "ext_clock";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
-+
-+		/*
-+		 * On the module itself this is one of these (depending
-+		 * on the actual card populated):
-+		 * - SDIO_RESET_L_WL_REG_ON
-+		 * - PDN (power down when low)
-+		 */
-+		reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>, <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>;
-+	};
-+
-+	vcc_sys: vsys-regulator {
-+		compatible = "regulator-fixed";
-+		regulator-name = "vcc_sys";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	vcc_sd: sdmmc-regulator {
-+		compatible = "regulator-fixed";
-+		gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&sdmmc_pwr>;
-+		regulator-name = "vcc_sd";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		startup-delay-us = <100000>;
-+		vin-supply = <&vcc_io>;
-+	};
-+
-+	wireless-wlan {
-+		compatible = "wlan-platdata";
-+		rockchip,grf = <&grf>;
-+		wifi_chip_type = "8723bs";
-+		sdio_vref = <1800>;
-+		WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+/*
-+	wireless-bluetooth {
-+		compatible = "bluetooth-platdata";
-+		uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-+		pinctrl-names = "default","rts_gpio";
-+		pinctrl-0 = <&uart0_rts>;
-+		pinctrl-1 = <&uart0_gpios>;
-+		BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
-+		BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
-+		BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
-+		status = "okay";
-+	};
-+*/
-+
-+};
-+
-+&cpu0 {
-+	cpu0-supply = <&vdd_cpu>;
-+};
-+
-+&gmac {
-+	assigned-clocks = <&cru SCLK_MAC>;
-+	assigned-clock-parents = <&ext_gmac>;
-+	clock_in_out = "input";
-+	phy-mode = "rgmii";
-+	phy-supply = <&vcc33_lan>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&rgmii_pins>;
-+	snps,reset-gpio = <&gpio4 7 0>;
-+	snps,reset-active-low;
-+	snps,reset-delays-us = <0 10000 1000000>;
-+	tx_delay = <0x30>;
-+	rx_delay = <0x10>;
-+	status = "ok";
-+};
-+
-+&gpu {
-+	mali-supply = <&vdd_gpu>;
-+	status = "okay";
-+};
-+
-+&hdmi {
-+	ddc-i2c-bus = <&i2c5>;
-+	status = "okay";
-+};
-+
-+&i2c0 {
-+	clock-frequency = <400000>;
-+	status = "okay";
-+
-+	rk808: pmic@1b {
-+		compatible = "rockchip,rk808";
-+		reg = <0x1b>;
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-+		#clock-cells = <1>;
-+		clock-output-names = "xin32k", "rk808-clkout2";
-+		dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>,
-+				<&gpio0 12 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>;
-+		rockchip,system-power-controller;
-+		wakeup-source;
-+
-+		vcc1-supply = <&vcc_sys>;
-+		vcc2-supply = <&vcc_sys>;
-+		vcc3-supply = <&vcc_sys>;
-+		vcc4-supply = <&vcc_sys>;
-+		vcc6-supply = <&vcc_sys>;
-+		vcc7-supply = <&vcc_sys>;
-+		vcc8-supply = <&vcc_io>;
-+		vcc9-supply = <&vcc_io>;
-+		vcc10-supply = <&vcc_io>;
-+		vcc11-supply = <&vcc_sys>;
-+		vcc12-supply = <&vcc_io>;
-+		vddio-supply = <&vcc_io>;
-+
-+		regulators {
-+			vdd_cpu: DCDC_REG1 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
-+				regulator-name = "vdd_arm";
-+				regulator-ramp-delay = <6000>;
-+				regulator-state-mem {
-+					regulator-off-in-suspend;
-+				};
-+			};
-+
-+			vdd_gpu: DCDC_REG2 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <712500>;
-+				regulator-max-microvolt = <1500000>;
-+				regulator-name = "vdd_gpu";
-+				regulator-ramp-delay = <6000>;
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1000000>;
-+				};
-+			};
-+
-+			vcc_ddr: DCDC_REG3 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-name = "vcc_ddr";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+				};
-+			};
-+
-+			vcc_io: DCDC_REG4 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc_io";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <3300000>;
-+				};
-+			};
-+
-+			vcc18_ldo1: LDO_REG1 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc18_ldo1";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1800000>;
-+				};
-+			};
-+
-+			vcc33_mipi: LDO_REG2 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <3300000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vcc33_mipi";
-+				regulator-state-mem {
-+					regulator-off-in-suspend;
-+				};
-+			};
-+
-+			vdd_10: LDO_REG3 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1000000>;
-+				regulator-max-microvolt = <1000000>;
-+				regulator-name = "vdd_10";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1000000>;
-+				};
-+			};
-+
-+			vcc18_codec: LDO_REG4 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc18_codec";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1800000>;
-+				};
-+			};
-+
-+			vccio_sd: LDO_REG5 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <3300000>;
-+				regulator-name = "vccio_sd";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <3300000>;
-+				};
-+			};
-+
-+			vdd10_lcd: LDO_REG6 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1000000>;
-+				regulator-max-microvolt = <1000000>;
-+				regulator-name = "vdd10_lcd";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1000000>;
-+				};
-+			};
-+
-+			vcc_18: LDO_REG7 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc_18";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1800000>;
-+				};
-+			};
-+
-+			vcc18_lcd: LDO_REG8 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-name = "vcc18_lcd";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+					regulator-suspend-microvolt = <1800000>;
-+				};
-+			};
-+
-+			vcc33_sd: SWITCH_REG1 {
-+				regulator-boot-on;
-+				regulator-name = "vcc33_sd";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+				};
-+			};
-+
-+			vcc33_lan: SWITCH_REG2 {
-+				regulator-always-on;
-+				regulator-boot-on;
-+				regulator-name = "vcc33_lan";
-+				regulator-state-mem {
-+					regulator-on-in-suspend;
-+				};
-+			};
-+		};
-+	};
-+};
-+
-+&i2c1 {
-+	status = "okay";
-+};
-+
-+&i2c2 {
-+	status = "okay";
-+
-+	afc0:af-controller@0 {
-+		status = "okay";
-+		compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
-+		reg = <0x0c>;
-+	};
-+
-+	eeprom:m24c08@50 {
-+		compatible = "at,24c08";
-+		reg = <0x50>;
-+	};
-+};
-+
-+&i2c3 {
-+	status = "okay";
-+};
-+
-+&i2c4 {
-+	status = "okay";
-+};
-+
-+&i2c5 {
-+	status = "okay";
-+};
-+
-+&i2s {
-+	#sound-dai-cells = <0>;
-+	status = "okay";
-+};
-+
-+&io_domains {
-+	status = "okay";
-+	rockchip,grf = <&grf>;
-+	wifi-supply = <&vcc_18>;
-+	sdcard-supply = <&vccio_sd>;
-+};
-+
-+&sdio0 {
-+	status = "okay";
-+	clock-frequency = <50000000>;
-+	clock-freq-min-max = <200000 50000000>;
-+	bus-width = <4>;
-+	cap-sd-highspeed;
-+	cap-sdio-irq;
-+	disable-wp;
-+	keep-power-in-suspend;
-+	mmc-pwrseq = <&sdio_pwrseq>;
-+	non-removable;
-+	num-slots = <1>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
-+	sd-uhs-sdr104;
-+	supports-sdio;
-+
-+};
-+
-+&pinctrl {
-+	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
-+		drive-strength = <8>;
-+	};
-+
-+	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
-+		bias-pull-up;
-+		drive-strength = <8>;
-+	};
-+
-+	backlight {
-+		bl_en: bl-en {
-+			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+	buttons {
-+		pwrbtn: pwrbtn {
-+			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
-+		};
-+	};
-+
-+	eth_phy {
-+		eth_phy_pwr: eth-phy-pwr {
-+			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+	pmic {
-+		pmic_int: pmic-int {
-+			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
-+					&pcfg_pull_up>;
-+		};
-+
-+		dvs_1: dvs-1 {
-+			rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
-+					&pcfg_pull_down>;
-+		};
-+
-+		dvs_2: dvs-2 {
-+			rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
-+					&pcfg_pull_down>;
-+		};
-+	};
-+
-+	sdio-pwrseq {
-+		wifi_enable_h: wifienable-h {
-+			rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+
-+		chip_enable_h: chip-enable-h {
-+			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+	sdmmc {
-+		sdmmc_bus4: sdmmc-bus4 {
-+			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
-+					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
-+					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
-+					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
-+		};
-+
-+		sdmmc_clk: sdmmc-clk {
-+			rockchip,pins = <6 20 RK_FUNC_1 \
-+					&pcfg_pull_none_drv_8ma>;
-+		};
-+
-+		sdmmc_cmd: sdmmc-cmd {
-+			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
-+		};
-+
-+		sdmmc_pwr: sdmmc-pwr {
-+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+	usb {
-+		host_vbus_drv: host-vbus-drv {
-+			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+
-+		pwr_3g: pwr-3g {
-+			rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+	wireless-bluetooth {
-+		uart0_gpios: uart0-gpios {
-+			rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
-+		};
-+	};
-+
-+};
-+
-+&pwm0 {
-+	status = "okay";
-+};
-+
-+&saradc {
-+	vref-supply = <&vcc18_ldo1>;
-+	status ="okay";
-+};
-+
-+&sdmmc {
-+	bus-width = <4>;
-+	cap-mmc-highspeed;
-+	cap-sd-highspeed;
-+	card-detect-delay = <200>;
-+	disable-wp;			/* wp not hooked up */
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
-+	sd-uhs-sdr12;
-+	sd-uhs-sdr25;
-+	sd-uhs-sdr50;
-+	sd-uhs-sdr104;
-+	status = "okay";
-+	supports-sd;
-+	vmmc-supply = <&vcc33_sd>;
-+	vqmmc-supply = <&vccio_sd>;
-+};
-+
-+&emmc {
-+	bus-width = <8>;
-+	cap-mmc-highspeed;
-+	disable-wp;
-+	non-removable;
-+	num-slots = <1>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
-+	max-frequency = <150000000>;
-+	mmc-hs200-1_8v;
-+	mmc-ddr-1_8v;
-+	status = "okay";
-+};
-+
-+&tsadc {
-+	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
-+	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
-+	status = "okay";
-+};
-+
-+&uart0 {
-+	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>,  <&uart0_rts>;
-+};
-+
-+&uart1 {
-+	status = "okay";
-+};
-+
-+&uart2 {
-+	status = "okay";
-+};
-+
-+&uart3 {
-+	status = "okay";
-+};
-+
-+&uart4 {
-+	status = "okay";
-+};
-+
-+&usbphy {
-+	status = "okay";
-+};
-+
-+&usb_host0_ehci {
-+	status = "okay";
-+};
-+
-+&usb_host1 {
-+	status = "okay";
-+};
-+
-+&usb_otg {
-+	status= "okay";
-+};
-+
-+&vopb {
-+	status = "okay";
-+};
-+
-+&vopb_mmu {
-+	status = "okay";
-+};
-+
-+&vopl {
-+	status = "okay";
-+};
-+
-+&vopl_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_mmu {
-+	status = "okay";
-+};
-+
-+&vpu_service {
-+	status = "okay";
-+};
-+
-+&hevc_mmu {
-+	status = "okay";
-+};
-+
-+&hevc_service {
-+	status = "okay";
-+};
-+
-+&wdt {
-+	status = "okay";
-+};

buildroot-external/board/asus/tinker/patches/linux/general-adjust-tinker-dts-hdmi-sound.patch

@@ -1,8 +1,8 @@
-diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
-index 958c0f3bf..59b8d8eac 100644
---- a/arch/arm/boot/dts/rk3288-tinker.dts
-+++ b/arch/arm/boot/dts/rk3288-tinker.dts
-@@ -70,7 +70,7 @@
+diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
+index 01be2bca9..5439e29e0 100644
+--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
++++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
+@@ -64,7 +64,7 @@
  	sound {
  		compatible = "simple-audio-card";
  		simple-audio-card,format = "i2s";

buildroot-external/board/asus/tinker/patches/linux/general-fix-reboot-from-kwiboo.patch

@@ -0,0 +1,19 @@
+diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
+index 5bd58b95d..48ebe081f 100644
+--- a/drivers/mmc/core/core.c
++++ b/drivers/mmc/core/core.c
+@@ -1684,6 +1684,14 @@ void mmc_power_off(struct mmc_host *host)
+ 	if (host->ios.power_mode == MMC_POWER_OFF)
+ 		return;
+ 
++        mmc_set_initial_signal_voltage(host);
++
++        /*
++         * This delay should be sufficient to allow the power supply
++         * to reach the minimum voltage.
++         */
++        mmc_delay(host->ios.power_delay_ms);
++
+ 	mmc_pwrseq_power_off(host);
+ 
+ 	host->ios.clock = 0;

buildroot-external/board/asus/tinker/patches/linux/general-increasing_DMA_block_memory_allocation_to_2048.patch

@@ -1,27 +0,0 @@
-diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
-index 3216e09..21bce28
---- a/arch/arm64/mm/dma-mapping.c
-+++ b/arch/arm64/mm/dma-mapping.c
-@@ -44,7 +44,7 @@ static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
-
- static struct gen_pool *atomic_pool;
-
--#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
-+#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_2M
- static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
-
- static int __init early_coherent_pool(char *p)
-
-diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
-index ada8eb2..8df220f
---- a/arch/arm/mm/dma-mapping.c
-+++ b/arch/arm/mm/dma-mapping.c
-@@ -381,7 +381,7 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
- 			VM_ARM_DMA_CONSISTENT | VM_USERMAP);
- }
-
--#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_256K
-+#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_2M
- static struct gen_pool *atomic_pool __ro_after_init;
-
- static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;

buildroot-external/board/asus/tinker/patches/linux/remove-broken-dtb.patch

@@ -0,0 +1,22 @@
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index a98dee2ae..d3cef7033 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -916,17 +916,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
+ 	rk3288-rock2-square.dtb \
+ 	rk3288-tinker.dtb \
+ 	rk3288-tinker-s.dtb \
+-	rk3288-veyron-brain.dtb \
+-	rk3288-veyron-fievel.dtb \
+-	rk3288-veyron-jaq.dtb \
+-	rk3288-veyron-jerry.dtb \
+-	rk3288-veyron-mickey.dtb \
+-	rk3288-veyron-mighty.dtb \
+-	rk3288-veyron-minnie.dtb \
+-	rk3288-veyron-pinky.dtb \
+-	rk3288-veyron-speedy.dtb \
+-	rk3288-veyron-tiger.dtb \
+ 	rk3288-vyasa.dtb
+ dtb-$(CONFIG_ARCH_S3C24XX) += \
+ 	s3c2416-smdk2416.dtb
+ dtb-$(CONFIG_ARCH_S3C64XX) += \